1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Miscellaneous Port Control Register"]
28unsafe impl ::core::marker::Send for super::Pmisc {}
29unsafe impl ::core::marker::Sync for super::Pmisc {}
30impl super::Pmisc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Ethernet Control Register"]
38 #[inline(always)]
39 pub const fn pfenet(
40 &self,
41 ) -> &'static crate::common::Reg<self::Pfenet_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Pfenet_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "Write-Protect Register"]
50 #[inline(always)]
51 pub const fn pwpr(&self) -> &'static crate::common::Reg<self::Pwpr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Pwpr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(3usize),
55 )
56 }
57 }
58}
59#[doc(hidden)]
60#[derive(Copy, Clone, Eq, PartialEq)]
61pub struct Pfenet_SPEC;
62impl crate::sealed::RegSpec for Pfenet_SPEC {
63 type DataType = u8;
64}
65
66#[doc = "Ethernet Control Register"]
67pub type Pfenet = crate::RegValueT<Pfenet_SPEC>;
68
69impl Pfenet {
70 #[doc = "Ethernet Mode Setting ch0"]
71 #[inline(always)]
72 pub fn phymode0(
73 self,
74 ) -> crate::common::RegisterField<
75 4,
76 0x1,
77 1,
78 0,
79 pfenet::Phymode0,
80 pfenet::Phymode0,
81 Pfenet_SPEC,
82 crate::common::RW,
83 > {
84 crate::common::RegisterField::<
85 4,
86 0x1,
87 1,
88 0,
89 pfenet::Phymode0,
90 pfenet::Phymode0,
91 Pfenet_SPEC,
92 crate::common::RW,
93 >::from_register(self, 0)
94 }
95}
96impl ::core::default::Default for Pfenet {
97 #[inline(always)]
98 fn default() -> Pfenet {
99 <crate::RegValueT<Pfenet_SPEC> as RegisterValue<_>>::new(0)
100 }
101}
102pub mod pfenet {
103
104 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
105 pub struct Phymode0_SPEC;
106 pub type Phymode0 = crate::EnumBitfieldStruct<u8, Phymode0_SPEC>;
107 impl Phymode0 {
108 #[doc = "RMII mode (ETHERC channel 0)"]
109 pub const _0: Self = Self::new(0);
110
111 #[doc = "MII mode (ETHERC channel 0)"]
112 pub const _1: Self = Self::new(1);
113 }
114}
115#[doc(hidden)]
116#[derive(Copy, Clone, Eq, PartialEq)]
117pub struct Pwpr_SPEC;
118impl crate::sealed::RegSpec for Pwpr_SPEC {
119 type DataType = u8;
120}
121
122#[doc = "Write-Protect Register"]
123pub type Pwpr = crate::RegValueT<Pwpr_SPEC>;
124
125impl Pwpr {
126 #[doc = "PFSWE Bit Write Disable"]
127 #[inline(always)]
128 pub fn bowi(
129 self,
130 ) -> crate::common::RegisterField<
131 7,
132 0x1,
133 1,
134 0,
135 pwpr::Bowi,
136 pwpr::Bowi,
137 Pwpr_SPEC,
138 crate::common::RW,
139 > {
140 crate::common::RegisterField::<
141 7,
142 0x1,
143 1,
144 0,
145 pwpr::Bowi,
146 pwpr::Bowi,
147 Pwpr_SPEC,
148 crate::common::RW,
149 >::from_register(self, 0)
150 }
151
152 #[doc = "PFS Register Write Enable"]
153 #[inline(always)]
154 pub fn pfswe(
155 self,
156 ) -> crate::common::RegisterField<
157 6,
158 0x1,
159 1,
160 0,
161 pwpr::Pfswe,
162 pwpr::Pfswe,
163 Pwpr_SPEC,
164 crate::common::RW,
165 > {
166 crate::common::RegisterField::<
167 6,
168 0x1,
169 1,
170 0,
171 pwpr::Pfswe,
172 pwpr::Pfswe,
173 Pwpr_SPEC,
174 crate::common::RW,
175 >::from_register(self, 0)
176 }
177}
178impl ::core::default::Default for Pwpr {
179 #[inline(always)]
180 fn default() -> Pwpr {
181 <crate::RegValueT<Pwpr_SPEC> as RegisterValue<_>>::new(128)
182 }
183}
184pub mod pwpr {
185
186 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
187 pub struct Bowi_SPEC;
188 pub type Bowi = crate::EnumBitfieldStruct<u8, Bowi_SPEC>;
189 impl Bowi {
190 #[doc = "Writing to the PFSWE bit is enabled"]
191 pub const _0: Self = Self::new(0);
192
193 #[doc = "Writing to the PFSWE bit is disabled"]
194 pub const _1: Self = Self::new(1);
195 }
196 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
197 pub struct Pfswe_SPEC;
198 pub type Pfswe = crate::EnumBitfieldStruct<u8, Pfswe_SPEC>;
199 impl Pfswe {
200 #[doc = "Writing to the PFS register is disabled"]
201 pub const _0: Self = Self::new(0);
202
203 #[doc = "Writing to the PFS register is enabled"]
204 pub const _1: Self = Self::new(1);
205 }
206}