1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM Timer 0 (32-bit Enhanced High Resolution)"]
28unsafe impl ::core::marker::Send for super::Gpt32Eh0 {}
29unsafe impl ::core::marker::Sync for super::Gpt32Eh0 {}
30impl super::Gpt32Eh0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "General PWM Timer Write-Protection Register"]
38 #[inline(always)]
39 pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "General PWM Timer Software Start Register"]
48 #[inline(always)]
49 pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "General PWM Timer Software Stop Register"]
58 #[inline(always)]
59 pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(8usize),
63 )
64 }
65 }
66
67 #[doc = "General PWM Timer Software Clear Register"]
68 #[inline(always)]
69 pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70 unsafe {
71 crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72 self._svd2pac_as_ptr().add(12usize),
73 )
74 }
75 }
76
77 #[doc = "General PWM Timer Start Source Select Register"]
78 #[inline(always)]
79 pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(16usize),
83 )
84 }
85 }
86
87 #[doc = "General PWM Timer Stop Source Select Register"]
88 #[inline(always)]
89 pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(20usize),
93 )
94 }
95 }
96
97 #[doc = "General PWM Timer Clear Source Select Register"]
98 #[inline(always)]
99 pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100 unsafe {
101 crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102 self._svd2pac_as_ptr().add(24usize),
103 )
104 }
105 }
106
107 #[doc = "General PWM Timer Up Count Source Select Register"]
108 #[inline(always)]
109 pub const fn gtupsr(
110 &self,
111 ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(28usize),
115 )
116 }
117 }
118
119 #[doc = "General PWM Timer Down Count Source Select Register"]
120 #[inline(always)]
121 pub const fn gtdnsr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(32usize),
127 )
128 }
129 }
130
131 #[doc = "General PWM Timer Input Capture Source Select Register A"]
132 #[inline(always)]
133 pub const fn gticasr(
134 &self,
135 ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(36usize),
139 )
140 }
141 }
142
143 #[doc = "General PWM Timer Input Capture Source Select Register B"]
144 #[inline(always)]
145 pub const fn gticbsr(
146 &self,
147 ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148 unsafe {
149 crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150 self._svd2pac_as_ptr().add(40usize),
151 )
152 }
153 }
154
155 #[doc = "General PWM Timer Control Register"]
156 #[inline(always)]
157 pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158 unsafe {
159 crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160 self._svd2pac_as_ptr().add(44usize),
161 )
162 }
163 }
164
165 #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166 #[inline(always)]
167 pub const fn gtuddtyc(
168 &self,
169 ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170 unsafe {
171 crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172 self._svd2pac_as_ptr().add(48usize),
173 )
174 }
175 }
176
177 #[doc = "General PWM Timer I/O Control Register"]
178 #[inline(always)]
179 pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180 unsafe {
181 crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182 self._svd2pac_as_ptr().add(52usize),
183 )
184 }
185 }
186
187 #[doc = "General PWM Timer Interrupt Output Setting Register"]
188 #[inline(always)]
189 pub const fn gtintad(
190 &self,
191 ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192 unsafe {
193 crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194 self._svd2pac_as_ptr().add(56usize),
195 )
196 }
197 }
198
199 #[doc = "General PWM Timer Status Register"]
200 #[inline(always)]
201 pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202 unsafe {
203 crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204 self._svd2pac_as_ptr().add(60usize),
205 )
206 }
207 }
208
209 #[doc = "General PWM Timer Buffer Enable Register"]
210 #[inline(always)]
211 pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212 unsafe {
213 crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214 self._svd2pac_as_ptr().add(64usize),
215 )
216 }
217 }
218
219 #[doc = "General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register"]
220 #[inline(always)]
221 pub const fn gtitc(&self) -> &'static crate::common::Reg<self::Gtitc_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::Gtitc_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(68usize),
225 )
226 }
227 }
228
229 #[doc = "General PWM Timer Counter"]
230 #[inline(always)]
231 pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
232 unsafe {
233 crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
234 self._svd2pac_as_ptr().add(72usize),
235 )
236 }
237 }
238
239 #[doc = "General PWM Timer Compare Capture Register A"]
240 #[inline(always)]
241 pub const fn gtccra(
242 &self,
243 ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
244 unsafe {
245 crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
246 self._svd2pac_as_ptr().add(76usize),
247 )
248 }
249 }
250
251 #[doc = "General PWM Timer Compare Capture Register B"]
252 #[inline(always)]
253 pub const fn gtccrb(
254 &self,
255 ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(80usize),
259 )
260 }
261 }
262
263 #[doc = "General PWM Timer Compare Capture Register C"]
264 #[inline(always)]
265 pub const fn gtccrc(
266 &self,
267 ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
268 unsafe {
269 crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
270 self._svd2pac_as_ptr().add(84usize),
271 )
272 }
273 }
274
275 #[doc = "General PWM Timer Compare Capture Register E"]
276 #[inline(always)]
277 pub const fn gtccre(
278 &self,
279 ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
280 unsafe {
281 crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
282 self._svd2pac_as_ptr().add(88usize),
283 )
284 }
285 }
286
287 #[doc = "General PWM Timer Compare Capture Register D"]
288 #[inline(always)]
289 pub const fn gtccrd(
290 &self,
291 ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
292 unsafe {
293 crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
294 self._svd2pac_as_ptr().add(92usize),
295 )
296 }
297 }
298
299 #[doc = "General PWM Timer Compare Capture Register F"]
300 #[inline(always)]
301 pub const fn gtccrf(
302 &self,
303 ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
304 unsafe {
305 crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
306 self._svd2pac_as_ptr().add(96usize),
307 )
308 }
309 }
310
311 #[doc = "General PWM Timer Cycle Setting Register"]
312 #[inline(always)]
313 pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(100usize),
317 )
318 }
319 }
320
321 #[doc = "General PWM Timer Cycle Setting Buffer Register"]
322 #[inline(always)]
323 pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(104usize),
327 )
328 }
329 }
330
331 #[doc = "General PWM Timer Cycle Setting Double-Buffer Register"]
332 #[inline(always)]
333 pub const fn gtpdbr(
334 &self,
335 ) -> &'static crate::common::Reg<self::Gtpdbr_SPEC, crate::common::RW> {
336 unsafe {
337 crate::common::Reg::<self::Gtpdbr_SPEC, crate::common::RW>::from_ptr(
338 self._svd2pac_as_ptr().add(108usize),
339 )
340 }
341 }
342
343 #[doc = "A/D Converter Start Request Timing Register A"]
344 #[inline(always)]
345 pub const fn gtadtra(
346 &self,
347 ) -> &'static crate::common::Reg<self::Gtadtra_SPEC, crate::common::RW> {
348 unsafe {
349 crate::common::Reg::<self::Gtadtra_SPEC, crate::common::RW>::from_ptr(
350 self._svd2pac_as_ptr().add(112usize),
351 )
352 }
353 }
354
355 #[doc = "A/D Converter Start Request Timing Register B"]
356 #[inline(always)]
357 pub const fn gtadtrb(
358 &self,
359 ) -> &'static crate::common::Reg<self::Gtadtrb_SPEC, crate::common::RW> {
360 unsafe {
361 crate::common::Reg::<self::Gtadtrb_SPEC, crate::common::RW>::from_ptr(
362 self._svd2pac_as_ptr().add(124usize),
363 )
364 }
365 }
366
367 #[doc = "A/D Converter Start Request Timing Buffer Register A"]
368 #[inline(always)]
369 pub const fn gtadtbra(
370 &self,
371 ) -> &'static crate::common::Reg<self::Gtadtbra_SPEC, crate::common::RW> {
372 unsafe {
373 crate::common::Reg::<self::Gtadtbra_SPEC, crate::common::RW>::from_ptr(
374 self._svd2pac_as_ptr().add(116usize),
375 )
376 }
377 }
378
379 #[doc = "A/D Converter Start Request Timing Buffer Register B"]
380 #[inline(always)]
381 pub const fn gtadtbrb(
382 &self,
383 ) -> &'static crate::common::Reg<self::Gtadtbrb_SPEC, crate::common::RW> {
384 unsafe {
385 crate::common::Reg::<self::Gtadtbrb_SPEC, crate::common::RW>::from_ptr(
386 self._svd2pac_as_ptr().add(128usize),
387 )
388 }
389 }
390
391 #[doc = "A/D Converter Start Request Timing Double-Buffer Register A"]
392 #[inline(always)]
393 pub const fn gtadtdbra(
394 &self,
395 ) -> &'static crate::common::Reg<self::Gtadtdbra_SPEC, crate::common::RW> {
396 unsafe {
397 crate::common::Reg::<self::Gtadtdbra_SPEC, crate::common::RW>::from_ptr(
398 self._svd2pac_as_ptr().add(120usize),
399 )
400 }
401 }
402
403 #[doc = "A/D Converter Start Request Timing Double-Buffer Register B"]
404 #[inline(always)]
405 pub const fn gtadtdbrb(
406 &self,
407 ) -> &'static crate::common::Reg<self::Gtadtdbrb_SPEC, crate::common::RW> {
408 unsafe {
409 crate::common::Reg::<self::Gtadtdbrb_SPEC, crate::common::RW>::from_ptr(
410 self._svd2pac_as_ptr().add(132usize),
411 )
412 }
413 }
414
415 #[doc = "General PWM Timer Dead Time Control Register"]
416 #[inline(always)]
417 pub const fn gtdtcr(
418 &self,
419 ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
420 unsafe {
421 crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
422 self._svd2pac_as_ptr().add(136usize),
423 )
424 }
425 }
426
427 #[doc = "General PWM Timer Dead Time Value Register U"]
428 #[inline(always)]
429 pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
430 unsafe {
431 crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
432 self._svd2pac_as_ptr().add(140usize),
433 )
434 }
435 }
436
437 #[doc = "General PWM Timer Dead Time Value Register D"]
438 #[inline(always)]
439 pub const fn gtdvd(&self) -> &'static crate::common::Reg<self::Gtdvd_SPEC, crate::common::RW> {
440 unsafe {
441 crate::common::Reg::<self::Gtdvd_SPEC, crate::common::RW>::from_ptr(
442 self._svd2pac_as_ptr().add(144usize),
443 )
444 }
445 }
446
447 #[doc = "General PWM Timer Dead Time Buffer Register U"]
448 #[inline(always)]
449 pub const fn gtdbu(&self) -> &'static crate::common::Reg<self::Gtdbu_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Gtdbu_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(148usize),
453 )
454 }
455 }
456
457 #[doc = "General PWM Timer Dead Time Buffer Register D"]
458 #[inline(always)]
459 pub const fn gtdbd(&self) -> &'static crate::common::Reg<self::Gtdbd_SPEC, crate::common::RW> {
460 unsafe {
461 crate::common::Reg::<self::Gtdbd_SPEC, crate::common::RW>::from_ptr(
462 self._svd2pac_as_ptr().add(152usize),
463 )
464 }
465 }
466
467 #[doc = "General PWM Timer Output Protection Function Status Register"]
468 #[inline(always)]
469 pub const fn gtsos(&self) -> &'static crate::common::Reg<self::Gtsos_SPEC, crate::common::R> {
470 unsafe {
471 crate::common::Reg::<self::Gtsos_SPEC, crate::common::R>::from_ptr(
472 self._svd2pac_as_ptr().add(156usize),
473 )
474 }
475 }
476
477 #[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
478 #[inline(always)]
479 pub const fn gtsotr(
480 &self,
481 ) -> &'static crate::common::Reg<self::Gtsotr_SPEC, crate::common::RW> {
482 unsafe {
483 crate::common::Reg::<self::Gtsotr_SPEC, crate::common::RW>::from_ptr(
484 self._svd2pac_as_ptr().add(160usize),
485 )
486 }
487 }
488}
489#[doc(hidden)]
490#[derive(Copy, Clone, Eq, PartialEq)]
491pub struct Gtwp_SPEC;
492impl crate::sealed::RegSpec for Gtwp_SPEC {
493 type DataType = u32;
494}
495
496#[doc = "General PWM Timer Write-Protection Register"]
497pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
498
499impl Gtwp {
500 #[doc = "GTWP Key Code"]
501 #[inline(always)]
502 pub fn prkey(
503 self,
504 ) -> crate::common::RegisterField<
505 8,
506 0xff,
507 1,
508 0,
509 gtwp::Prkey,
510 gtwp::Prkey,
511 Gtwp_SPEC,
512 crate::common::W,
513 > {
514 crate::common::RegisterField::<
515 8,
516 0xff,
517 1,
518 0,
519 gtwp::Prkey,
520 gtwp::Prkey,
521 Gtwp_SPEC,
522 crate::common::W,
523 >::from_register(self, 0)
524 }
525
526 #[doc = "Register Write Disable"]
527 #[inline(always)]
528 pub fn wp(
529 self,
530 ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
531 {
532 crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
533 }
534}
535impl ::core::default::Default for Gtwp {
536 #[inline(always)]
537 fn default() -> Gtwp {
538 <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
539 }
540}
541pub mod gtwp {
542
543 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
544 pub struct Prkey_SPEC;
545 pub type Prkey = crate::EnumBitfieldStruct<u8, Prkey_SPEC>;
546 impl Prkey {
547 #[doc = "Written to these bits, the WP bits write is permitted."]
548 pub const _0_X_A_5: Self = Self::new(165);
549 }
550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
551 pub struct Wp_SPEC;
552 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
553 impl Wp {
554 #[doc = "Enable writes to the register"]
555 pub const _0: Self = Self::new(0);
556
557 #[doc = "Disable writes to the register"]
558 pub const _1: Self = Self::new(1);
559 }
560}
561#[doc(hidden)]
562#[derive(Copy, Clone, Eq, PartialEq)]
563pub struct Gtstr_SPEC;
564impl crate::sealed::RegSpec for Gtstr_SPEC {
565 type DataType = u32;
566}
567
568#[doc = "General PWM Timer Software Start Register"]
569pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
570
571impl Gtstr {
572 #[doc = "Channel 13 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
573 #[inline(always)]
574 pub fn cstrt13(
575 self,
576 ) -> crate::common::RegisterField<
577 13,
578 0x1,
579 1,
580 0,
581 gtstr::Cstrt13,
582 gtstr::Cstrt13,
583 Gtstr_SPEC,
584 crate::common::RW,
585 > {
586 crate::common::RegisterField::<
587 13,
588 0x1,
589 1,
590 0,
591 gtstr::Cstrt13,
592 gtstr::Cstrt13,
593 Gtstr_SPEC,
594 crate::common::RW,
595 >::from_register(self, 0)
596 }
597
598 #[doc = "Channel 12 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
599 #[inline(always)]
600 pub fn cstrt12(
601 self,
602 ) -> crate::common::RegisterField<
603 12,
604 0x1,
605 1,
606 0,
607 gtstr::Cstrt12,
608 gtstr::Cstrt12,
609 Gtstr_SPEC,
610 crate::common::RW,
611 > {
612 crate::common::RegisterField::<
613 12,
614 0x1,
615 1,
616 0,
617 gtstr::Cstrt12,
618 gtstr::Cstrt12,
619 Gtstr_SPEC,
620 crate::common::RW,
621 >::from_register(self, 0)
622 }
623
624 #[doc = "Channel 11 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
625 #[inline(always)]
626 pub fn cstrt11(
627 self,
628 ) -> crate::common::RegisterField<
629 11,
630 0x1,
631 1,
632 0,
633 gtstr::Cstrt11,
634 gtstr::Cstrt11,
635 Gtstr_SPEC,
636 crate::common::RW,
637 > {
638 crate::common::RegisterField::<
639 11,
640 0x1,
641 1,
642 0,
643 gtstr::Cstrt11,
644 gtstr::Cstrt11,
645 Gtstr_SPEC,
646 crate::common::RW,
647 >::from_register(self, 0)
648 }
649
650 #[doc = "Channel 10 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
651 #[inline(always)]
652 pub fn cstrt10(
653 self,
654 ) -> crate::common::RegisterField<
655 10,
656 0x1,
657 1,
658 0,
659 gtstr::Cstrt10,
660 gtstr::Cstrt10,
661 Gtstr_SPEC,
662 crate::common::RW,
663 > {
664 crate::common::RegisterField::<
665 10,
666 0x1,
667 1,
668 0,
669 gtstr::Cstrt10,
670 gtstr::Cstrt10,
671 Gtstr_SPEC,
672 crate::common::RW,
673 >::from_register(self, 0)
674 }
675
676 #[doc = "Channel 9 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
677 #[inline(always)]
678 pub fn cstrt9(
679 self,
680 ) -> crate::common::RegisterField<
681 9,
682 0x1,
683 1,
684 0,
685 gtstr::Cstrt9,
686 gtstr::Cstrt9,
687 Gtstr_SPEC,
688 crate::common::RW,
689 > {
690 crate::common::RegisterField::<
691 9,
692 0x1,
693 1,
694 0,
695 gtstr::Cstrt9,
696 gtstr::Cstrt9,
697 Gtstr_SPEC,
698 crate::common::RW,
699 >::from_register(self, 0)
700 }
701
702 #[doc = "Channel 8 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
703 #[inline(always)]
704 pub fn cstrt8(
705 self,
706 ) -> crate::common::RegisterField<
707 8,
708 0x1,
709 1,
710 0,
711 gtstr::Cstrt8,
712 gtstr::Cstrt8,
713 Gtstr_SPEC,
714 crate::common::RW,
715 > {
716 crate::common::RegisterField::<
717 8,
718 0x1,
719 1,
720 0,
721 gtstr::Cstrt8,
722 gtstr::Cstrt8,
723 Gtstr_SPEC,
724 crate::common::RW,
725 >::from_register(self, 0)
726 }
727
728 #[doc = "Channel 7 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
729 #[inline(always)]
730 pub fn cstrt7(
731 self,
732 ) -> crate::common::RegisterField<
733 7,
734 0x1,
735 1,
736 0,
737 gtstr::Cstrt7,
738 gtstr::Cstrt7,
739 Gtstr_SPEC,
740 crate::common::RW,
741 > {
742 crate::common::RegisterField::<
743 7,
744 0x1,
745 1,
746 0,
747 gtstr::Cstrt7,
748 gtstr::Cstrt7,
749 Gtstr_SPEC,
750 crate::common::RW,
751 >::from_register(self, 0)
752 }
753
754 #[doc = "Channel 6 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
755 #[inline(always)]
756 pub fn cstrt6(
757 self,
758 ) -> crate::common::RegisterField<
759 6,
760 0x1,
761 1,
762 0,
763 gtstr::Cstrt6,
764 gtstr::Cstrt6,
765 Gtstr_SPEC,
766 crate::common::RW,
767 > {
768 crate::common::RegisterField::<
769 6,
770 0x1,
771 1,
772 0,
773 gtstr::Cstrt6,
774 gtstr::Cstrt6,
775 Gtstr_SPEC,
776 crate::common::RW,
777 >::from_register(self, 0)
778 }
779
780 #[doc = "Channel 5 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
781 #[inline(always)]
782 pub fn cstrt5(
783 self,
784 ) -> crate::common::RegisterField<
785 5,
786 0x1,
787 1,
788 0,
789 gtstr::Cstrt5,
790 gtstr::Cstrt5,
791 Gtstr_SPEC,
792 crate::common::RW,
793 > {
794 crate::common::RegisterField::<
795 5,
796 0x1,
797 1,
798 0,
799 gtstr::Cstrt5,
800 gtstr::Cstrt5,
801 Gtstr_SPEC,
802 crate::common::RW,
803 >::from_register(self, 0)
804 }
805
806 #[doc = "Channel 4 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
807 #[inline(always)]
808 pub fn cstrt4(
809 self,
810 ) -> crate::common::RegisterField<
811 4,
812 0x1,
813 1,
814 0,
815 gtstr::Cstrt4,
816 gtstr::Cstrt4,
817 Gtstr_SPEC,
818 crate::common::RW,
819 > {
820 crate::common::RegisterField::<
821 4,
822 0x1,
823 1,
824 0,
825 gtstr::Cstrt4,
826 gtstr::Cstrt4,
827 Gtstr_SPEC,
828 crate::common::RW,
829 >::from_register(self, 0)
830 }
831
832 #[doc = "Channel 3 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
833 #[inline(always)]
834 pub fn cstrt3(
835 self,
836 ) -> crate::common::RegisterField<
837 3,
838 0x1,
839 1,
840 0,
841 gtstr::Cstrt3,
842 gtstr::Cstrt3,
843 Gtstr_SPEC,
844 crate::common::RW,
845 > {
846 crate::common::RegisterField::<
847 3,
848 0x1,
849 1,
850 0,
851 gtstr::Cstrt3,
852 gtstr::Cstrt3,
853 Gtstr_SPEC,
854 crate::common::RW,
855 >::from_register(self, 0)
856 }
857
858 #[doc = "Channel 2 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
859 #[inline(always)]
860 pub fn cstrt2(
861 self,
862 ) -> crate::common::RegisterField<
863 2,
864 0x1,
865 1,
866 0,
867 gtstr::Cstrt2,
868 gtstr::Cstrt2,
869 Gtstr_SPEC,
870 crate::common::RW,
871 > {
872 crate::common::RegisterField::<
873 2,
874 0x1,
875 1,
876 0,
877 gtstr::Cstrt2,
878 gtstr::Cstrt2,
879 Gtstr_SPEC,
880 crate::common::RW,
881 >::from_register(self, 0)
882 }
883
884 #[doc = "Channel 1 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
885 #[inline(always)]
886 pub fn cstrt1(
887 self,
888 ) -> crate::common::RegisterField<
889 1,
890 0x1,
891 1,
892 0,
893 gtstr::Cstrt1,
894 gtstr::Cstrt1,
895 Gtstr_SPEC,
896 crate::common::RW,
897 > {
898 crate::common::RegisterField::<
899 1,
900 0x1,
901 1,
902 0,
903 gtstr::Cstrt1,
904 gtstr::Cstrt1,
905 Gtstr_SPEC,
906 crate::common::RW,
907 >::from_register(self, 0)
908 }
909
910 #[doc = "Channel 0 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
911 #[inline(always)]
912 pub fn cstrt0(
913 self,
914 ) -> crate::common::RegisterField<
915 0,
916 0x1,
917 1,
918 0,
919 gtstr::Cstrt0,
920 gtstr::Cstrt0,
921 Gtstr_SPEC,
922 crate::common::RW,
923 > {
924 crate::common::RegisterField::<
925 0,
926 0x1,
927 1,
928 0,
929 gtstr::Cstrt0,
930 gtstr::Cstrt0,
931 Gtstr_SPEC,
932 crate::common::RW,
933 >::from_register(self, 0)
934 }
935}
936impl ::core::default::Default for Gtstr {
937 #[inline(always)]
938 fn default() -> Gtstr {
939 <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
940 }
941}
942pub mod gtstr {
943
944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
945 pub struct Cstrt13_SPEC;
946 pub type Cstrt13 = crate::EnumBitfieldStruct<u8, Cstrt13_SPEC>;
947 impl Cstrt13 {
948 #[doc = "No effect (write) / counter stop (read)"]
949 pub const _0: Self = Self::new(0);
950
951 #[doc = "GPT3213.GTCNT counter starts (write) / Counter running (read)"]
952 pub const _1: Self = Self::new(1);
953 }
954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
955 pub struct Cstrt12_SPEC;
956 pub type Cstrt12 = crate::EnumBitfieldStruct<u8, Cstrt12_SPEC>;
957 impl Cstrt12 {
958 #[doc = "No effect (write) / counter stop (read)"]
959 pub const _0: Self = Self::new(0);
960
961 #[doc = "GPT3212.GTCNT counter starts (write) / Counter running (read)"]
962 pub const _1: Self = Self::new(1);
963 }
964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
965 pub struct Cstrt11_SPEC;
966 pub type Cstrt11 = crate::EnumBitfieldStruct<u8, Cstrt11_SPEC>;
967 impl Cstrt11 {
968 #[doc = "No effect (write) / counter stop (read)"]
969 pub const _0: Self = Self::new(0);
970
971 #[doc = "GPT3211.GTCNT counter starts (write) / Counter running (read)"]
972 pub const _1: Self = Self::new(1);
973 }
974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
975 pub struct Cstrt10_SPEC;
976 pub type Cstrt10 = crate::EnumBitfieldStruct<u8, Cstrt10_SPEC>;
977 impl Cstrt10 {
978 #[doc = "No effect (write) / counter stop (read)"]
979 pub const _0: Self = Self::new(0);
980
981 #[doc = "GPT3210.GTCNT counter starts (write) / Counter running (read)"]
982 pub const _1: Self = Self::new(1);
983 }
984 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
985 pub struct Cstrt9_SPEC;
986 pub type Cstrt9 = crate::EnumBitfieldStruct<u8, Cstrt9_SPEC>;
987 impl Cstrt9 {
988 #[doc = "No effect (write) / counter stop (read)"]
989 pub const _0: Self = Self::new(0);
990
991 #[doc = "GPT329.GTCNT counter starts (write) / Counter running (read)"]
992 pub const _1: Self = Self::new(1);
993 }
994 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
995 pub struct Cstrt8_SPEC;
996 pub type Cstrt8 = crate::EnumBitfieldStruct<u8, Cstrt8_SPEC>;
997 impl Cstrt8 {
998 #[doc = "No effect (write) / counter stop (read)"]
999 pub const _0: Self = Self::new(0);
1000
1001 #[doc = "GPT328.GTCNT counter starts (write) / Counter running (read)"]
1002 pub const _1: Self = Self::new(1);
1003 }
1004 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1005 pub struct Cstrt7_SPEC;
1006 pub type Cstrt7 = crate::EnumBitfieldStruct<u8, Cstrt7_SPEC>;
1007 impl Cstrt7 {
1008 #[doc = "No effect (write) / counter stop (read)"]
1009 pub const _0: Self = Self::new(0);
1010
1011 #[doc = "GPT32E7.GTCNT counter starts (write) / Counter running (read)"]
1012 pub const _1: Self = Self::new(1);
1013 }
1014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1015 pub struct Cstrt6_SPEC;
1016 pub type Cstrt6 = crate::EnumBitfieldStruct<u8, Cstrt6_SPEC>;
1017 impl Cstrt6 {
1018 #[doc = "No effect (write) / counter stop (read)"]
1019 pub const _0: Self = Self::new(0);
1020
1021 #[doc = "GPT32E6.GTCNT counter starts (write) / Counter running (read)"]
1022 pub const _1: Self = Self::new(1);
1023 }
1024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1025 pub struct Cstrt5_SPEC;
1026 pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
1027 impl Cstrt5 {
1028 #[doc = "No effect (write) / counter stop (read)"]
1029 pub const _0: Self = Self::new(0);
1030
1031 #[doc = "GPT32E5.GTCNT counter starts (write) / Counter running (read)"]
1032 pub const _1: Self = Self::new(1);
1033 }
1034 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1035 pub struct Cstrt4_SPEC;
1036 pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
1037 impl Cstrt4 {
1038 #[doc = "No effect (write) / counter stop (read)"]
1039 pub const _0: Self = Self::new(0);
1040
1041 #[doc = "GPT32E4.GTCNT counter starts (write) / Counter running (read)"]
1042 pub const _1: Self = Self::new(1);
1043 }
1044 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1045 pub struct Cstrt3_SPEC;
1046 pub type Cstrt3 = crate::EnumBitfieldStruct<u8, Cstrt3_SPEC>;
1047 impl Cstrt3 {
1048 #[doc = "No effect (write) / counter stop (read)"]
1049 pub const _0: Self = Self::new(0);
1050
1051 #[doc = "GPT32EH3.GTCNT counter starts (write) / Counter running (read)"]
1052 pub const _1: Self = Self::new(1);
1053 }
1054 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1055 pub struct Cstrt2_SPEC;
1056 pub type Cstrt2 = crate::EnumBitfieldStruct<u8, Cstrt2_SPEC>;
1057 impl Cstrt2 {
1058 #[doc = "No effect (write) / counter stop (read)"]
1059 pub const _0: Self = Self::new(0);
1060
1061 #[doc = "GPT32EH2.GTCNT counter starts (write) / Counter running (read)"]
1062 pub const _1: Self = Self::new(1);
1063 }
1064 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1065 pub struct Cstrt1_SPEC;
1066 pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
1067 impl Cstrt1 {
1068 #[doc = "No effect (write) / counter stop (read)"]
1069 pub const _0: Self = Self::new(0);
1070
1071 #[doc = "GPT32EH1.GTCNT counter starts (write) / Counter running (read)"]
1072 pub const _1: Self = Self::new(1);
1073 }
1074 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1075 pub struct Cstrt0_SPEC;
1076 pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
1077 impl Cstrt0 {
1078 #[doc = "No effect (write) / counter stop (read)"]
1079 pub const _0: Self = Self::new(0);
1080
1081 #[doc = "GPT32EH0.GTCNT counter starts (write) / Counter running (read)"]
1082 pub const _1: Self = Self::new(1);
1083 }
1084}
1085#[doc(hidden)]
1086#[derive(Copy, Clone, Eq, PartialEq)]
1087pub struct Gtstp_SPEC;
1088impl crate::sealed::RegSpec for Gtstp_SPEC {
1089 type DataType = u32;
1090}
1091
1092#[doc = "General PWM Timer Software Stop Register"]
1093pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
1094
1095impl Gtstp {
1096 #[doc = "Channel 13 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1097 #[inline(always)]
1098 pub fn cstop13(
1099 self,
1100 ) -> crate::common::RegisterField<
1101 13,
1102 0x1,
1103 1,
1104 0,
1105 gtstp::Cstop13,
1106 gtstp::Cstop13,
1107 Gtstp_SPEC,
1108 crate::common::RW,
1109 > {
1110 crate::common::RegisterField::<
1111 13,
1112 0x1,
1113 1,
1114 0,
1115 gtstp::Cstop13,
1116 gtstp::Cstop13,
1117 Gtstp_SPEC,
1118 crate::common::RW,
1119 >::from_register(self, 0)
1120 }
1121
1122 #[doc = "Channel 12 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1123 #[inline(always)]
1124 pub fn cstop12(
1125 self,
1126 ) -> crate::common::RegisterField<
1127 12,
1128 0x1,
1129 1,
1130 0,
1131 gtstp::Cstop12,
1132 gtstp::Cstop12,
1133 Gtstp_SPEC,
1134 crate::common::RW,
1135 > {
1136 crate::common::RegisterField::<
1137 12,
1138 0x1,
1139 1,
1140 0,
1141 gtstp::Cstop12,
1142 gtstp::Cstop12,
1143 Gtstp_SPEC,
1144 crate::common::RW,
1145 >::from_register(self, 0)
1146 }
1147
1148 #[doc = "Channel 11 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1149 #[inline(always)]
1150 pub fn cstop11(
1151 self,
1152 ) -> crate::common::RegisterField<
1153 11,
1154 0x1,
1155 1,
1156 0,
1157 gtstp::Cstop11,
1158 gtstp::Cstop11,
1159 Gtstp_SPEC,
1160 crate::common::RW,
1161 > {
1162 crate::common::RegisterField::<
1163 11,
1164 0x1,
1165 1,
1166 0,
1167 gtstp::Cstop11,
1168 gtstp::Cstop11,
1169 Gtstp_SPEC,
1170 crate::common::RW,
1171 >::from_register(self, 0)
1172 }
1173
1174 #[doc = "Channel 10 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1175 #[inline(always)]
1176 pub fn cstop10(
1177 self,
1178 ) -> crate::common::RegisterField<
1179 10,
1180 0x1,
1181 1,
1182 0,
1183 gtstp::Cstop10,
1184 gtstp::Cstop10,
1185 Gtstp_SPEC,
1186 crate::common::RW,
1187 > {
1188 crate::common::RegisterField::<
1189 10,
1190 0x1,
1191 1,
1192 0,
1193 gtstp::Cstop10,
1194 gtstp::Cstop10,
1195 Gtstp_SPEC,
1196 crate::common::RW,
1197 >::from_register(self, 0)
1198 }
1199
1200 #[doc = "Channel 9 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1201 #[inline(always)]
1202 pub fn cstop9(
1203 self,
1204 ) -> crate::common::RegisterField<
1205 9,
1206 0x1,
1207 1,
1208 0,
1209 gtstp::Cstop9,
1210 gtstp::Cstop9,
1211 Gtstp_SPEC,
1212 crate::common::RW,
1213 > {
1214 crate::common::RegisterField::<
1215 9,
1216 0x1,
1217 1,
1218 0,
1219 gtstp::Cstop9,
1220 gtstp::Cstop9,
1221 Gtstp_SPEC,
1222 crate::common::RW,
1223 >::from_register(self, 0)
1224 }
1225
1226 #[doc = "Channel 8 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1227 #[inline(always)]
1228 pub fn cstop8(
1229 self,
1230 ) -> crate::common::RegisterField<
1231 8,
1232 0x1,
1233 1,
1234 0,
1235 gtstp::Cstop8,
1236 gtstp::Cstop8,
1237 Gtstp_SPEC,
1238 crate::common::RW,
1239 > {
1240 crate::common::RegisterField::<
1241 8,
1242 0x1,
1243 1,
1244 0,
1245 gtstp::Cstop8,
1246 gtstp::Cstop8,
1247 Gtstp_SPEC,
1248 crate::common::RW,
1249 >::from_register(self, 0)
1250 }
1251
1252 #[doc = "Channel 7 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1253 #[inline(always)]
1254 pub fn cstop7(
1255 self,
1256 ) -> crate::common::RegisterField<
1257 7,
1258 0x1,
1259 1,
1260 0,
1261 gtstp::Cstop7,
1262 gtstp::Cstop7,
1263 Gtstp_SPEC,
1264 crate::common::RW,
1265 > {
1266 crate::common::RegisterField::<
1267 7,
1268 0x1,
1269 1,
1270 0,
1271 gtstp::Cstop7,
1272 gtstp::Cstop7,
1273 Gtstp_SPEC,
1274 crate::common::RW,
1275 >::from_register(self, 0)
1276 }
1277
1278 #[doc = "Channel 6 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1279 #[inline(always)]
1280 pub fn cstop6(
1281 self,
1282 ) -> crate::common::RegisterField<
1283 6,
1284 0x1,
1285 1,
1286 0,
1287 gtstp::Cstop6,
1288 gtstp::Cstop6,
1289 Gtstp_SPEC,
1290 crate::common::RW,
1291 > {
1292 crate::common::RegisterField::<
1293 6,
1294 0x1,
1295 1,
1296 0,
1297 gtstp::Cstop6,
1298 gtstp::Cstop6,
1299 Gtstp_SPEC,
1300 crate::common::RW,
1301 >::from_register(self, 0)
1302 }
1303
1304 #[doc = "Channel 5 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1305 #[inline(always)]
1306 pub fn cstop5(
1307 self,
1308 ) -> crate::common::RegisterField<
1309 5,
1310 0x1,
1311 1,
1312 0,
1313 gtstp::Cstop5,
1314 gtstp::Cstop5,
1315 Gtstp_SPEC,
1316 crate::common::RW,
1317 > {
1318 crate::common::RegisterField::<
1319 5,
1320 0x1,
1321 1,
1322 0,
1323 gtstp::Cstop5,
1324 gtstp::Cstop5,
1325 Gtstp_SPEC,
1326 crate::common::RW,
1327 >::from_register(self, 0)
1328 }
1329
1330 #[doc = "Channel 4 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1331 #[inline(always)]
1332 pub fn cstop4(
1333 self,
1334 ) -> crate::common::RegisterField<
1335 4,
1336 0x1,
1337 1,
1338 0,
1339 gtstp::Cstop4,
1340 gtstp::Cstop4,
1341 Gtstp_SPEC,
1342 crate::common::RW,
1343 > {
1344 crate::common::RegisterField::<
1345 4,
1346 0x1,
1347 1,
1348 0,
1349 gtstp::Cstop4,
1350 gtstp::Cstop4,
1351 Gtstp_SPEC,
1352 crate::common::RW,
1353 >::from_register(self, 0)
1354 }
1355
1356 #[doc = "Channel 3 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1357 #[inline(always)]
1358 pub fn cstop3(
1359 self,
1360 ) -> crate::common::RegisterField<
1361 3,
1362 0x1,
1363 1,
1364 0,
1365 gtstp::Cstop3,
1366 gtstp::Cstop3,
1367 Gtstp_SPEC,
1368 crate::common::RW,
1369 > {
1370 crate::common::RegisterField::<
1371 3,
1372 0x1,
1373 1,
1374 0,
1375 gtstp::Cstop3,
1376 gtstp::Cstop3,
1377 Gtstp_SPEC,
1378 crate::common::RW,
1379 >::from_register(self, 0)
1380 }
1381
1382 #[doc = "Channel 2 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1383 #[inline(always)]
1384 pub fn cstop2(
1385 self,
1386 ) -> crate::common::RegisterField<
1387 2,
1388 0x1,
1389 1,
1390 0,
1391 gtstp::Cstop2,
1392 gtstp::Cstop2,
1393 Gtstp_SPEC,
1394 crate::common::RW,
1395 > {
1396 crate::common::RegisterField::<
1397 2,
1398 0x1,
1399 1,
1400 0,
1401 gtstp::Cstop2,
1402 gtstp::Cstop2,
1403 Gtstp_SPEC,
1404 crate::common::RW,
1405 >::from_register(self, 0)
1406 }
1407
1408 #[doc = "Channel 1 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1409 #[inline(always)]
1410 pub fn cstop1(
1411 self,
1412 ) -> crate::common::RegisterField<
1413 1,
1414 0x1,
1415 1,
1416 0,
1417 gtstp::Cstop1,
1418 gtstp::Cstop1,
1419 Gtstp_SPEC,
1420 crate::common::RW,
1421 > {
1422 crate::common::RegisterField::<
1423 1,
1424 0x1,
1425 1,
1426 0,
1427 gtstp::Cstop1,
1428 gtstp::Cstop1,
1429 Gtstp_SPEC,
1430 crate::common::RW,
1431 >::from_register(self, 0)
1432 }
1433
1434 #[doc = "Channel 0 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1435 #[inline(always)]
1436 pub fn cstop0(
1437 self,
1438 ) -> crate::common::RegisterField<
1439 0,
1440 0x1,
1441 1,
1442 0,
1443 gtstp::Cstop0,
1444 gtstp::Cstop0,
1445 Gtstp_SPEC,
1446 crate::common::RW,
1447 > {
1448 crate::common::RegisterField::<
1449 0,
1450 0x1,
1451 1,
1452 0,
1453 gtstp::Cstop0,
1454 gtstp::Cstop0,
1455 Gtstp_SPEC,
1456 crate::common::RW,
1457 >::from_register(self, 0)
1458 }
1459}
1460impl ::core::default::Default for Gtstp {
1461 #[inline(always)]
1462 fn default() -> Gtstp {
1463 <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1464 }
1465}
1466pub mod gtstp {
1467
1468 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1469 pub struct Cstop13_SPEC;
1470 pub type Cstop13 = crate::EnumBitfieldStruct<u8, Cstop13_SPEC>;
1471 impl Cstop13 {
1472 #[doc = "No effect (write) / counter running (read)"]
1473 pub const _0: Self = Self::new(0);
1474
1475 #[doc = "GPT3213.GTCNT counter stops (write) / Counter stop (read)"]
1476 pub const _1: Self = Self::new(1);
1477 }
1478 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1479 pub struct Cstop12_SPEC;
1480 pub type Cstop12 = crate::EnumBitfieldStruct<u8, Cstop12_SPEC>;
1481 impl Cstop12 {
1482 #[doc = "No effect (write) / counter running (read)"]
1483 pub const _0: Self = Self::new(0);
1484
1485 #[doc = "GPT3212.GTCNT counter stops (write) / Counter stop (read)"]
1486 pub const _1: Self = Self::new(1);
1487 }
1488 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1489 pub struct Cstop11_SPEC;
1490 pub type Cstop11 = crate::EnumBitfieldStruct<u8, Cstop11_SPEC>;
1491 impl Cstop11 {
1492 #[doc = "No effect (write) / counter running (read)"]
1493 pub const _0: Self = Self::new(0);
1494
1495 #[doc = "GPT3211.GTCNT counter stops (write) / Counter stop (read)"]
1496 pub const _1: Self = Self::new(1);
1497 }
1498 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1499 pub struct Cstop10_SPEC;
1500 pub type Cstop10 = crate::EnumBitfieldStruct<u8, Cstop10_SPEC>;
1501 impl Cstop10 {
1502 #[doc = "No effect (write) / counter running (read)"]
1503 pub const _0: Self = Self::new(0);
1504
1505 #[doc = "GPT3210.GTCNT counter stops (write) / Counter stop (read)"]
1506 pub const _1: Self = Self::new(1);
1507 }
1508 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1509 pub struct Cstop9_SPEC;
1510 pub type Cstop9 = crate::EnumBitfieldStruct<u8, Cstop9_SPEC>;
1511 impl Cstop9 {
1512 #[doc = "No effect (write) / counter running (read)"]
1513 pub const _0: Self = Self::new(0);
1514
1515 #[doc = "GPT329.GTCNT counter stops (write) / Counter stop (read)"]
1516 pub const _1: Self = Self::new(1);
1517 }
1518 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1519 pub struct Cstop8_SPEC;
1520 pub type Cstop8 = crate::EnumBitfieldStruct<u8, Cstop8_SPEC>;
1521 impl Cstop8 {
1522 #[doc = "No effect (write) / counter running (read)"]
1523 pub const _0: Self = Self::new(0);
1524
1525 #[doc = "GPT328.GTCNT counter stops (write) / Counter stop (read)"]
1526 pub const _1: Self = Self::new(1);
1527 }
1528 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1529 pub struct Cstop7_SPEC;
1530 pub type Cstop7 = crate::EnumBitfieldStruct<u8, Cstop7_SPEC>;
1531 impl Cstop7 {
1532 #[doc = "No effect (write) / counter running (read)"]
1533 pub const _0: Self = Self::new(0);
1534
1535 #[doc = "GPT32E7.GTCNT counter stops (write) / Counter stop (read)"]
1536 pub const _1: Self = Self::new(1);
1537 }
1538 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1539 pub struct Cstop6_SPEC;
1540 pub type Cstop6 = crate::EnumBitfieldStruct<u8, Cstop6_SPEC>;
1541 impl Cstop6 {
1542 #[doc = "No effect (write) / counter running (read)"]
1543 pub const _0: Self = Self::new(0);
1544
1545 #[doc = "GPT32E6.GTCNT counter stops (write) / Counter stop (read)"]
1546 pub const _1: Self = Self::new(1);
1547 }
1548 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1549 pub struct Cstop5_SPEC;
1550 pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1551 impl Cstop5 {
1552 #[doc = "No effect (write) / counter running (read)"]
1553 pub const _0: Self = Self::new(0);
1554
1555 #[doc = "GPT32E5.GTCNT counter stops (write) / Counter stop (read)"]
1556 pub const _1: Self = Self::new(1);
1557 }
1558 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1559 pub struct Cstop4_SPEC;
1560 pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1561 impl Cstop4 {
1562 #[doc = "No effect (write) / counter running (read)"]
1563 pub const _0: Self = Self::new(0);
1564
1565 #[doc = "GPT32E4.GTCNT counter stops (write) / Counter stop (read)"]
1566 pub const _1: Self = Self::new(1);
1567 }
1568 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1569 pub struct Cstop3_SPEC;
1570 pub type Cstop3 = crate::EnumBitfieldStruct<u8, Cstop3_SPEC>;
1571 impl Cstop3 {
1572 #[doc = "No effect (write) / counter running (read)"]
1573 pub const _0: Self = Self::new(0);
1574
1575 #[doc = "GPT32EH3.GTCNT counter stops (write) / Counter stop (read)"]
1576 pub const _1: Self = Self::new(1);
1577 }
1578 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1579 pub struct Cstop2_SPEC;
1580 pub type Cstop2 = crate::EnumBitfieldStruct<u8, Cstop2_SPEC>;
1581 impl Cstop2 {
1582 #[doc = "No effect (write) / counter running (read)"]
1583 pub const _0: Self = Self::new(0);
1584
1585 #[doc = "GPT32EH2.GTCNT counter stops (write) / Counter stop (read)"]
1586 pub const _1: Self = Self::new(1);
1587 }
1588 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1589 pub struct Cstop1_SPEC;
1590 pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1591 impl Cstop1 {
1592 #[doc = "No effect (write) / counter running (read)"]
1593 pub const _0: Self = Self::new(0);
1594
1595 #[doc = "GPT32EH1.GTCNT counter stops (write) / Counter stop (read)"]
1596 pub const _1: Self = Self::new(1);
1597 }
1598 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1599 pub struct Cstop0_SPEC;
1600 pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1601 impl Cstop0 {
1602 #[doc = "No effect (write) / counter running (read)"]
1603 pub const _0: Self = Self::new(0);
1604
1605 #[doc = "GPT32EH0.GTCNT counter stops (write) / Counter stop (read)"]
1606 pub const _1: Self = Self::new(1);
1607 }
1608}
1609#[doc(hidden)]
1610#[derive(Copy, Clone, Eq, PartialEq)]
1611pub struct Gtclr_SPEC;
1612impl crate::sealed::RegSpec for Gtclr_SPEC {
1613 type DataType = u32;
1614}
1615
1616#[doc = "General PWM Timer Software Clear Register"]
1617pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1618
1619impl Gtclr {
1620 #[doc = "Channel 13 GTCNT Count Clear"]
1621 #[inline(always)]
1622 pub fn cclr13(
1623 self,
1624 ) -> crate::common::RegisterField<
1625 13,
1626 0x1,
1627 1,
1628 0,
1629 gtclr::Cclr13,
1630 gtclr::Cclr13,
1631 Gtclr_SPEC,
1632 crate::common::W,
1633 > {
1634 crate::common::RegisterField::<
1635 13,
1636 0x1,
1637 1,
1638 0,
1639 gtclr::Cclr13,
1640 gtclr::Cclr13,
1641 Gtclr_SPEC,
1642 crate::common::W,
1643 >::from_register(self, 0)
1644 }
1645
1646 #[doc = "Channel 12 GTCNT Count Clear"]
1647 #[inline(always)]
1648 pub fn cclr12(
1649 self,
1650 ) -> crate::common::RegisterField<
1651 12,
1652 0x1,
1653 1,
1654 0,
1655 gtclr::Cclr12,
1656 gtclr::Cclr12,
1657 Gtclr_SPEC,
1658 crate::common::W,
1659 > {
1660 crate::common::RegisterField::<
1661 12,
1662 0x1,
1663 1,
1664 0,
1665 gtclr::Cclr12,
1666 gtclr::Cclr12,
1667 Gtclr_SPEC,
1668 crate::common::W,
1669 >::from_register(self, 0)
1670 }
1671
1672 #[doc = "Channel 11 GTCNT Count Clear"]
1673 #[inline(always)]
1674 pub fn cclr11(
1675 self,
1676 ) -> crate::common::RegisterField<
1677 11,
1678 0x1,
1679 1,
1680 0,
1681 gtclr::Cclr11,
1682 gtclr::Cclr11,
1683 Gtclr_SPEC,
1684 crate::common::W,
1685 > {
1686 crate::common::RegisterField::<
1687 11,
1688 0x1,
1689 1,
1690 0,
1691 gtclr::Cclr11,
1692 gtclr::Cclr11,
1693 Gtclr_SPEC,
1694 crate::common::W,
1695 >::from_register(self, 0)
1696 }
1697
1698 #[doc = "Channel 10 GTCNT Count Clear"]
1699 #[inline(always)]
1700 pub fn cclr10(
1701 self,
1702 ) -> crate::common::RegisterField<
1703 10,
1704 0x1,
1705 1,
1706 0,
1707 gtclr::Cclr10,
1708 gtclr::Cclr10,
1709 Gtclr_SPEC,
1710 crate::common::W,
1711 > {
1712 crate::common::RegisterField::<
1713 10,
1714 0x1,
1715 1,
1716 0,
1717 gtclr::Cclr10,
1718 gtclr::Cclr10,
1719 Gtclr_SPEC,
1720 crate::common::W,
1721 >::from_register(self, 0)
1722 }
1723
1724 #[doc = "Channel 9 GTCNT Count Clear"]
1725 #[inline(always)]
1726 pub fn cclr9(
1727 self,
1728 ) -> crate::common::RegisterField<
1729 9,
1730 0x1,
1731 1,
1732 0,
1733 gtclr::Cclr9,
1734 gtclr::Cclr9,
1735 Gtclr_SPEC,
1736 crate::common::W,
1737 > {
1738 crate::common::RegisterField::<
1739 9,
1740 0x1,
1741 1,
1742 0,
1743 gtclr::Cclr9,
1744 gtclr::Cclr9,
1745 Gtclr_SPEC,
1746 crate::common::W,
1747 >::from_register(self, 0)
1748 }
1749
1750 #[doc = "Channel 8 GTCNT Count Clear"]
1751 #[inline(always)]
1752 pub fn cclr8(
1753 self,
1754 ) -> crate::common::RegisterField<
1755 8,
1756 0x1,
1757 1,
1758 0,
1759 gtclr::Cclr8,
1760 gtclr::Cclr8,
1761 Gtclr_SPEC,
1762 crate::common::W,
1763 > {
1764 crate::common::RegisterField::<
1765 8,
1766 0x1,
1767 1,
1768 0,
1769 gtclr::Cclr8,
1770 gtclr::Cclr8,
1771 Gtclr_SPEC,
1772 crate::common::W,
1773 >::from_register(self, 0)
1774 }
1775
1776 #[doc = "Channel 7 GTCNT Count Clear"]
1777 #[inline(always)]
1778 pub fn cclr7(
1779 self,
1780 ) -> crate::common::RegisterField<
1781 7,
1782 0x1,
1783 1,
1784 0,
1785 gtclr::Cclr7,
1786 gtclr::Cclr7,
1787 Gtclr_SPEC,
1788 crate::common::W,
1789 > {
1790 crate::common::RegisterField::<
1791 7,
1792 0x1,
1793 1,
1794 0,
1795 gtclr::Cclr7,
1796 gtclr::Cclr7,
1797 Gtclr_SPEC,
1798 crate::common::W,
1799 >::from_register(self, 0)
1800 }
1801
1802 #[doc = "Channel 6 GTCNT Count Clear"]
1803 #[inline(always)]
1804 pub fn cclr6(
1805 self,
1806 ) -> crate::common::RegisterField<
1807 6,
1808 0x1,
1809 1,
1810 0,
1811 gtclr::Cclr6,
1812 gtclr::Cclr6,
1813 Gtclr_SPEC,
1814 crate::common::W,
1815 > {
1816 crate::common::RegisterField::<
1817 6,
1818 0x1,
1819 1,
1820 0,
1821 gtclr::Cclr6,
1822 gtclr::Cclr6,
1823 Gtclr_SPEC,
1824 crate::common::W,
1825 >::from_register(self, 0)
1826 }
1827
1828 #[doc = "Channel 5 GTCNT Count Clear"]
1829 #[inline(always)]
1830 pub fn cclr5(
1831 self,
1832 ) -> crate::common::RegisterField<
1833 5,
1834 0x1,
1835 1,
1836 0,
1837 gtclr::Cclr5,
1838 gtclr::Cclr5,
1839 Gtclr_SPEC,
1840 crate::common::W,
1841 > {
1842 crate::common::RegisterField::<
1843 5,
1844 0x1,
1845 1,
1846 0,
1847 gtclr::Cclr5,
1848 gtclr::Cclr5,
1849 Gtclr_SPEC,
1850 crate::common::W,
1851 >::from_register(self, 0)
1852 }
1853
1854 #[doc = "Channel 4 GTCNT Count Clear"]
1855 #[inline(always)]
1856 pub fn cclr4(
1857 self,
1858 ) -> crate::common::RegisterField<
1859 4,
1860 0x1,
1861 1,
1862 0,
1863 gtclr::Cclr4,
1864 gtclr::Cclr4,
1865 Gtclr_SPEC,
1866 crate::common::W,
1867 > {
1868 crate::common::RegisterField::<
1869 4,
1870 0x1,
1871 1,
1872 0,
1873 gtclr::Cclr4,
1874 gtclr::Cclr4,
1875 Gtclr_SPEC,
1876 crate::common::W,
1877 >::from_register(self, 0)
1878 }
1879
1880 #[doc = "Channel 3 GTCNT Count Clear"]
1881 #[inline(always)]
1882 pub fn cclr3(
1883 self,
1884 ) -> crate::common::RegisterField<
1885 3,
1886 0x1,
1887 1,
1888 0,
1889 gtclr::Cclr3,
1890 gtclr::Cclr3,
1891 Gtclr_SPEC,
1892 crate::common::W,
1893 > {
1894 crate::common::RegisterField::<
1895 3,
1896 0x1,
1897 1,
1898 0,
1899 gtclr::Cclr3,
1900 gtclr::Cclr3,
1901 Gtclr_SPEC,
1902 crate::common::W,
1903 >::from_register(self, 0)
1904 }
1905
1906 #[doc = "Channel 2 GTCNT Count Clear"]
1907 #[inline(always)]
1908 pub fn cclr2(
1909 self,
1910 ) -> crate::common::RegisterField<
1911 2,
1912 0x1,
1913 1,
1914 0,
1915 gtclr::Cclr2,
1916 gtclr::Cclr2,
1917 Gtclr_SPEC,
1918 crate::common::W,
1919 > {
1920 crate::common::RegisterField::<
1921 2,
1922 0x1,
1923 1,
1924 0,
1925 gtclr::Cclr2,
1926 gtclr::Cclr2,
1927 Gtclr_SPEC,
1928 crate::common::W,
1929 >::from_register(self, 0)
1930 }
1931
1932 #[doc = "Channel 1 GTCNT Count Clear"]
1933 #[inline(always)]
1934 pub fn cclr1(
1935 self,
1936 ) -> crate::common::RegisterField<
1937 1,
1938 0x1,
1939 1,
1940 0,
1941 gtclr::Cclr1,
1942 gtclr::Cclr1,
1943 Gtclr_SPEC,
1944 crate::common::W,
1945 > {
1946 crate::common::RegisterField::<
1947 1,
1948 0x1,
1949 1,
1950 0,
1951 gtclr::Cclr1,
1952 gtclr::Cclr1,
1953 Gtclr_SPEC,
1954 crate::common::W,
1955 >::from_register(self, 0)
1956 }
1957
1958 #[doc = "Channel 0 GTCNT Count Clear"]
1959 #[inline(always)]
1960 pub fn cclr0(
1961 self,
1962 ) -> crate::common::RegisterField<
1963 0,
1964 0x1,
1965 1,
1966 0,
1967 gtclr::Cclr0,
1968 gtclr::Cclr0,
1969 Gtclr_SPEC,
1970 crate::common::W,
1971 > {
1972 crate::common::RegisterField::<
1973 0,
1974 0x1,
1975 1,
1976 0,
1977 gtclr::Cclr0,
1978 gtclr::Cclr0,
1979 Gtclr_SPEC,
1980 crate::common::W,
1981 >::from_register(self, 0)
1982 }
1983}
1984impl ::core::default::Default for Gtclr {
1985 #[inline(always)]
1986 fn default() -> Gtclr {
1987 <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1988 }
1989}
1990pub mod gtclr {
1991
1992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1993 pub struct Cclr13_SPEC;
1994 pub type Cclr13 = crate::EnumBitfieldStruct<u8, Cclr13_SPEC>;
1995 impl Cclr13 {
1996 #[doc = "No effect"]
1997 pub const _0: Self = Self::new(0);
1998
1999 #[doc = "GPT3213.GTCNT counter clears"]
2000 pub const _1: Self = Self::new(1);
2001 }
2002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003 pub struct Cclr12_SPEC;
2004 pub type Cclr12 = crate::EnumBitfieldStruct<u8, Cclr12_SPEC>;
2005 impl Cclr12 {
2006 #[doc = "No effect"]
2007 pub const _0: Self = Self::new(0);
2008
2009 #[doc = "GPT3212.GTCNT counter clears"]
2010 pub const _1: Self = Self::new(1);
2011 }
2012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2013 pub struct Cclr11_SPEC;
2014 pub type Cclr11 = crate::EnumBitfieldStruct<u8, Cclr11_SPEC>;
2015 impl Cclr11 {
2016 #[doc = "No effect"]
2017 pub const _0: Self = Self::new(0);
2018
2019 #[doc = "GPT3211.GTCNT counter clears"]
2020 pub const _1: Self = Self::new(1);
2021 }
2022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2023 pub struct Cclr10_SPEC;
2024 pub type Cclr10 = crate::EnumBitfieldStruct<u8, Cclr10_SPEC>;
2025 impl Cclr10 {
2026 #[doc = "No effect"]
2027 pub const _0: Self = Self::new(0);
2028
2029 #[doc = "GPT3210.GTCNT counter clears"]
2030 pub const _1: Self = Self::new(1);
2031 }
2032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2033 pub struct Cclr9_SPEC;
2034 pub type Cclr9 = crate::EnumBitfieldStruct<u8, Cclr9_SPEC>;
2035 impl Cclr9 {
2036 #[doc = "No effect"]
2037 pub const _0: Self = Self::new(0);
2038
2039 #[doc = "GPT329.GTCNT counter clears"]
2040 pub const _1: Self = Self::new(1);
2041 }
2042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2043 pub struct Cclr8_SPEC;
2044 pub type Cclr8 = crate::EnumBitfieldStruct<u8, Cclr8_SPEC>;
2045 impl Cclr8 {
2046 #[doc = "No effect"]
2047 pub const _0: Self = Self::new(0);
2048
2049 #[doc = "GPT328.GTCNT counter clears"]
2050 pub const _1: Self = Self::new(1);
2051 }
2052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2053 pub struct Cclr7_SPEC;
2054 pub type Cclr7 = crate::EnumBitfieldStruct<u8, Cclr7_SPEC>;
2055 impl Cclr7 {
2056 #[doc = "No effect"]
2057 pub const _0: Self = Self::new(0);
2058
2059 #[doc = "GPT32E7.GTCNT counter clears"]
2060 pub const _1: Self = Self::new(1);
2061 }
2062 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2063 pub struct Cclr6_SPEC;
2064 pub type Cclr6 = crate::EnumBitfieldStruct<u8, Cclr6_SPEC>;
2065 impl Cclr6 {
2066 #[doc = "No effect"]
2067 pub const _0: Self = Self::new(0);
2068
2069 #[doc = "GPT32E6.GTCNT counter clears"]
2070 pub const _1: Self = Self::new(1);
2071 }
2072 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2073 pub struct Cclr5_SPEC;
2074 pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
2075 impl Cclr5 {
2076 #[doc = "No effect"]
2077 pub const _0: Self = Self::new(0);
2078
2079 #[doc = "GPT32E5.GTCNT counter clears"]
2080 pub const _1: Self = Self::new(1);
2081 }
2082 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2083 pub struct Cclr4_SPEC;
2084 pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
2085 impl Cclr4 {
2086 #[doc = "No effect"]
2087 pub const _0: Self = Self::new(0);
2088
2089 #[doc = "GPT32E4.GTCNT counter clears"]
2090 pub const _1: Self = Self::new(1);
2091 }
2092 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2093 pub struct Cclr3_SPEC;
2094 pub type Cclr3 = crate::EnumBitfieldStruct<u8, Cclr3_SPEC>;
2095 impl Cclr3 {
2096 #[doc = "No effect"]
2097 pub const _0: Self = Self::new(0);
2098
2099 #[doc = "GPT32EH3.GTCNT counter clears"]
2100 pub const _1: Self = Self::new(1);
2101 }
2102 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2103 pub struct Cclr2_SPEC;
2104 pub type Cclr2 = crate::EnumBitfieldStruct<u8, Cclr2_SPEC>;
2105 impl Cclr2 {
2106 #[doc = "No effect"]
2107 pub const _0: Self = Self::new(0);
2108
2109 #[doc = "GPT32EH2.GTCNT counter clears"]
2110 pub const _1: Self = Self::new(1);
2111 }
2112 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2113 pub struct Cclr1_SPEC;
2114 pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
2115 impl Cclr1 {
2116 #[doc = "No effect"]
2117 pub const _0: Self = Self::new(0);
2118
2119 #[doc = "GPT32EH1.GTCNT counter clears"]
2120 pub const _1: Self = Self::new(1);
2121 }
2122 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2123 pub struct Cclr0_SPEC;
2124 pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
2125 impl Cclr0 {
2126 #[doc = "No effect"]
2127 pub const _0: Self = Self::new(0);
2128
2129 #[doc = "GPT32EH0.GTCNT counter clears"]
2130 pub const _1: Self = Self::new(1);
2131 }
2132}
2133#[doc(hidden)]
2134#[derive(Copy, Clone, Eq, PartialEq)]
2135pub struct Gtssr_SPEC;
2136impl crate::sealed::RegSpec for Gtssr_SPEC {
2137 type DataType = u32;
2138}
2139
2140#[doc = "General PWM Timer Start Source Select Register"]
2141pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
2142
2143impl Gtssr {
2144 #[doc = "Software Source Counter Start Enable"]
2145 #[inline(always)]
2146 pub fn cstrt(
2147 self,
2148 ) -> crate::common::RegisterField<
2149 31,
2150 0x1,
2151 1,
2152 0,
2153 gtssr::Cstrt,
2154 gtssr::Cstrt,
2155 Gtssr_SPEC,
2156 crate::common::RW,
2157 > {
2158 crate::common::RegisterField::<
2159 31,
2160 0x1,
2161 1,
2162 0,
2163 gtssr::Cstrt,
2164 gtssr::Cstrt,
2165 Gtssr_SPEC,
2166 crate::common::RW,
2167 >::from_register(self, 0)
2168 }
2169
2170 #[doc = "ELC_GPTH Event Source Counter Start Enable"]
2171 #[inline(always)]
2172 pub fn sselch(
2173 self,
2174 ) -> crate::common::RegisterField<
2175 23,
2176 0x1,
2177 1,
2178 0,
2179 gtssr::Sselch,
2180 gtssr::Sselch,
2181 Gtssr_SPEC,
2182 crate::common::RW,
2183 > {
2184 crate::common::RegisterField::<
2185 23,
2186 0x1,
2187 1,
2188 0,
2189 gtssr::Sselch,
2190 gtssr::Sselch,
2191 Gtssr_SPEC,
2192 crate::common::RW,
2193 >::from_register(self, 0)
2194 }
2195
2196 #[doc = "ELC_GPTG Event Source Counter Start Enable"]
2197 #[inline(always)]
2198 pub fn sselcg(
2199 self,
2200 ) -> crate::common::RegisterField<
2201 22,
2202 0x1,
2203 1,
2204 0,
2205 gtssr::Sselcg,
2206 gtssr::Sselcg,
2207 Gtssr_SPEC,
2208 crate::common::RW,
2209 > {
2210 crate::common::RegisterField::<
2211 22,
2212 0x1,
2213 1,
2214 0,
2215 gtssr::Sselcg,
2216 gtssr::Sselcg,
2217 Gtssr_SPEC,
2218 crate::common::RW,
2219 >::from_register(self, 0)
2220 }
2221
2222 #[doc = "ELC_GPTF Event Source Counter Start Enable"]
2223 #[inline(always)]
2224 pub fn sselcf(
2225 self,
2226 ) -> crate::common::RegisterField<
2227 21,
2228 0x1,
2229 1,
2230 0,
2231 gtssr::Sselcf,
2232 gtssr::Sselcf,
2233 Gtssr_SPEC,
2234 crate::common::RW,
2235 > {
2236 crate::common::RegisterField::<
2237 21,
2238 0x1,
2239 1,
2240 0,
2241 gtssr::Sselcf,
2242 gtssr::Sselcf,
2243 Gtssr_SPEC,
2244 crate::common::RW,
2245 >::from_register(self, 0)
2246 }
2247
2248 #[doc = "ELC_GPTE Event Source Counter Start Enable"]
2249 #[inline(always)]
2250 pub fn sselce(
2251 self,
2252 ) -> crate::common::RegisterField<
2253 20,
2254 0x1,
2255 1,
2256 0,
2257 gtssr::Sselce,
2258 gtssr::Sselce,
2259 Gtssr_SPEC,
2260 crate::common::RW,
2261 > {
2262 crate::common::RegisterField::<
2263 20,
2264 0x1,
2265 1,
2266 0,
2267 gtssr::Sselce,
2268 gtssr::Sselce,
2269 Gtssr_SPEC,
2270 crate::common::RW,
2271 >::from_register(self, 0)
2272 }
2273
2274 #[doc = "ELC_GPTD Event Source Counter Start Enable"]
2275 #[inline(always)]
2276 pub fn sselcd(
2277 self,
2278 ) -> crate::common::RegisterField<
2279 19,
2280 0x1,
2281 1,
2282 0,
2283 gtssr::Sselcd,
2284 gtssr::Sselcd,
2285 Gtssr_SPEC,
2286 crate::common::RW,
2287 > {
2288 crate::common::RegisterField::<
2289 19,
2290 0x1,
2291 1,
2292 0,
2293 gtssr::Sselcd,
2294 gtssr::Sselcd,
2295 Gtssr_SPEC,
2296 crate::common::RW,
2297 >::from_register(self, 0)
2298 }
2299
2300 #[doc = "ELC_GPTC Event Source Counter Start Enable"]
2301 #[inline(always)]
2302 pub fn sselcc(
2303 self,
2304 ) -> crate::common::RegisterField<
2305 18,
2306 0x1,
2307 1,
2308 0,
2309 gtssr::Sselcc,
2310 gtssr::Sselcc,
2311 Gtssr_SPEC,
2312 crate::common::RW,
2313 > {
2314 crate::common::RegisterField::<
2315 18,
2316 0x1,
2317 1,
2318 0,
2319 gtssr::Sselcc,
2320 gtssr::Sselcc,
2321 Gtssr_SPEC,
2322 crate::common::RW,
2323 >::from_register(self, 0)
2324 }
2325
2326 #[doc = "ELC_GPTB Event Source Counter Start Enable"]
2327 #[inline(always)]
2328 pub fn sselcb(
2329 self,
2330 ) -> crate::common::RegisterField<
2331 17,
2332 0x1,
2333 1,
2334 0,
2335 gtssr::Sselcb,
2336 gtssr::Sselcb,
2337 Gtssr_SPEC,
2338 crate::common::RW,
2339 > {
2340 crate::common::RegisterField::<
2341 17,
2342 0x1,
2343 1,
2344 0,
2345 gtssr::Sselcb,
2346 gtssr::Sselcb,
2347 Gtssr_SPEC,
2348 crate::common::RW,
2349 >::from_register(self, 0)
2350 }
2351
2352 #[doc = "ELC_GPTA Event Source Counter Start Enable"]
2353 #[inline(always)]
2354 pub fn sselca(
2355 self,
2356 ) -> crate::common::RegisterField<
2357 16,
2358 0x1,
2359 1,
2360 0,
2361 gtssr::Sselca,
2362 gtssr::Sselca,
2363 Gtssr_SPEC,
2364 crate::common::RW,
2365 > {
2366 crate::common::RegisterField::<
2367 16,
2368 0x1,
2369 1,
2370 0,
2371 gtssr::Sselca,
2372 gtssr::Sselca,
2373 Gtssr_SPEC,
2374 crate::common::RW,
2375 >::from_register(self, 0)
2376 }
2377
2378 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable"]
2379 #[inline(always)]
2380 pub fn sscbfah(
2381 self,
2382 ) -> crate::common::RegisterField<
2383 15,
2384 0x1,
2385 1,
2386 0,
2387 gtssr::Sscbfah,
2388 gtssr::Sscbfah,
2389 Gtssr_SPEC,
2390 crate::common::RW,
2391 > {
2392 crate::common::RegisterField::<
2393 15,
2394 0x1,
2395 1,
2396 0,
2397 gtssr::Sscbfah,
2398 gtssr::Sscbfah,
2399 Gtssr_SPEC,
2400 crate::common::RW,
2401 >::from_register(self, 0)
2402 }
2403
2404 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable"]
2405 #[inline(always)]
2406 pub fn sscbfal(
2407 self,
2408 ) -> crate::common::RegisterField<
2409 14,
2410 0x1,
2411 1,
2412 0,
2413 gtssr::Sscbfal,
2414 gtssr::Sscbfal,
2415 Gtssr_SPEC,
2416 crate::common::RW,
2417 > {
2418 crate::common::RegisterField::<
2419 14,
2420 0x1,
2421 1,
2422 0,
2423 gtssr::Sscbfal,
2424 gtssr::Sscbfal,
2425 Gtssr_SPEC,
2426 crate::common::RW,
2427 >::from_register(self, 0)
2428 }
2429
2430 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable"]
2431 #[inline(always)]
2432 pub fn sscbrah(
2433 self,
2434 ) -> crate::common::RegisterField<
2435 13,
2436 0x1,
2437 1,
2438 0,
2439 gtssr::Sscbrah,
2440 gtssr::Sscbrah,
2441 Gtssr_SPEC,
2442 crate::common::RW,
2443 > {
2444 crate::common::RegisterField::<
2445 13,
2446 0x1,
2447 1,
2448 0,
2449 gtssr::Sscbrah,
2450 gtssr::Sscbrah,
2451 Gtssr_SPEC,
2452 crate::common::RW,
2453 >::from_register(self, 0)
2454 }
2455
2456 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable"]
2457 #[inline(always)]
2458 pub fn sscbral(
2459 self,
2460 ) -> crate::common::RegisterField<
2461 12,
2462 0x1,
2463 1,
2464 0,
2465 gtssr::Sscbral,
2466 gtssr::Sscbral,
2467 Gtssr_SPEC,
2468 crate::common::RW,
2469 > {
2470 crate::common::RegisterField::<
2471 12,
2472 0x1,
2473 1,
2474 0,
2475 gtssr::Sscbral,
2476 gtssr::Sscbral,
2477 Gtssr_SPEC,
2478 crate::common::RW,
2479 >::from_register(self, 0)
2480 }
2481
2482 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable"]
2483 #[inline(always)]
2484 pub fn sscafbh(
2485 self,
2486 ) -> crate::common::RegisterField<
2487 11,
2488 0x1,
2489 1,
2490 0,
2491 gtssr::Sscafbh,
2492 gtssr::Sscafbh,
2493 Gtssr_SPEC,
2494 crate::common::RW,
2495 > {
2496 crate::common::RegisterField::<
2497 11,
2498 0x1,
2499 1,
2500 0,
2501 gtssr::Sscafbh,
2502 gtssr::Sscafbh,
2503 Gtssr_SPEC,
2504 crate::common::RW,
2505 >::from_register(self, 0)
2506 }
2507
2508 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable"]
2509 #[inline(always)]
2510 pub fn sscafbl(
2511 self,
2512 ) -> crate::common::RegisterField<
2513 10,
2514 0x1,
2515 1,
2516 0,
2517 gtssr::Sscafbl,
2518 gtssr::Sscafbl,
2519 Gtssr_SPEC,
2520 crate::common::RW,
2521 > {
2522 crate::common::RegisterField::<
2523 10,
2524 0x1,
2525 1,
2526 0,
2527 gtssr::Sscafbl,
2528 gtssr::Sscafbl,
2529 Gtssr_SPEC,
2530 crate::common::RW,
2531 >::from_register(self, 0)
2532 }
2533
2534 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable"]
2535 #[inline(always)]
2536 pub fn sscarbh(
2537 self,
2538 ) -> crate::common::RegisterField<
2539 9,
2540 0x1,
2541 1,
2542 0,
2543 gtssr::Sscarbh,
2544 gtssr::Sscarbh,
2545 Gtssr_SPEC,
2546 crate::common::RW,
2547 > {
2548 crate::common::RegisterField::<
2549 9,
2550 0x1,
2551 1,
2552 0,
2553 gtssr::Sscarbh,
2554 gtssr::Sscarbh,
2555 Gtssr_SPEC,
2556 crate::common::RW,
2557 >::from_register(self, 0)
2558 }
2559
2560 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable"]
2561 #[inline(always)]
2562 pub fn sscarbl(
2563 self,
2564 ) -> crate::common::RegisterField<
2565 8,
2566 0x1,
2567 1,
2568 0,
2569 gtssr::Sscarbl,
2570 gtssr::Sscarbl,
2571 Gtssr_SPEC,
2572 crate::common::RW,
2573 > {
2574 crate::common::RegisterField::<
2575 8,
2576 0x1,
2577 1,
2578 0,
2579 gtssr::Sscarbl,
2580 gtssr::Sscarbl,
2581 Gtssr_SPEC,
2582 crate::common::RW,
2583 >::from_register(self, 0)
2584 }
2585
2586 #[doc = "GTETRGD Pin Falling Input Source Counter Start Enable"]
2587 #[inline(always)]
2588 pub fn ssgtrgdf(
2589 self,
2590 ) -> crate::common::RegisterField<
2591 7,
2592 0x1,
2593 1,
2594 0,
2595 gtssr::Ssgtrgdf,
2596 gtssr::Ssgtrgdf,
2597 Gtssr_SPEC,
2598 crate::common::RW,
2599 > {
2600 crate::common::RegisterField::<
2601 7,
2602 0x1,
2603 1,
2604 0,
2605 gtssr::Ssgtrgdf,
2606 gtssr::Ssgtrgdf,
2607 Gtssr_SPEC,
2608 crate::common::RW,
2609 >::from_register(self, 0)
2610 }
2611
2612 #[doc = "GTETRGD Pin Rising Input Source Counter Start Enable"]
2613 #[inline(always)]
2614 pub fn ssgtrgdr(
2615 self,
2616 ) -> crate::common::RegisterField<
2617 6,
2618 0x1,
2619 1,
2620 0,
2621 gtssr::Ssgtrgdr,
2622 gtssr::Ssgtrgdr,
2623 Gtssr_SPEC,
2624 crate::common::RW,
2625 > {
2626 crate::common::RegisterField::<
2627 6,
2628 0x1,
2629 1,
2630 0,
2631 gtssr::Ssgtrgdr,
2632 gtssr::Ssgtrgdr,
2633 Gtssr_SPEC,
2634 crate::common::RW,
2635 >::from_register(self, 0)
2636 }
2637
2638 #[doc = "GTETRGC Pin Falling Input Source Counter Start Enable"]
2639 #[inline(always)]
2640 pub fn ssgtrgcf(
2641 self,
2642 ) -> crate::common::RegisterField<
2643 5,
2644 0x1,
2645 1,
2646 0,
2647 gtssr::Ssgtrgcf,
2648 gtssr::Ssgtrgcf,
2649 Gtssr_SPEC,
2650 crate::common::RW,
2651 > {
2652 crate::common::RegisterField::<
2653 5,
2654 0x1,
2655 1,
2656 0,
2657 gtssr::Ssgtrgcf,
2658 gtssr::Ssgtrgcf,
2659 Gtssr_SPEC,
2660 crate::common::RW,
2661 >::from_register(self, 0)
2662 }
2663
2664 #[doc = "GTETRGC Pin Rising Input Source Counter Start Enable"]
2665 #[inline(always)]
2666 pub fn ssgtrgcr(
2667 self,
2668 ) -> crate::common::RegisterField<
2669 4,
2670 0x1,
2671 1,
2672 0,
2673 gtssr::Ssgtrgcr,
2674 gtssr::Ssgtrgcr,
2675 Gtssr_SPEC,
2676 crate::common::RW,
2677 > {
2678 crate::common::RegisterField::<
2679 4,
2680 0x1,
2681 1,
2682 0,
2683 gtssr::Ssgtrgcr,
2684 gtssr::Ssgtrgcr,
2685 Gtssr_SPEC,
2686 crate::common::RW,
2687 >::from_register(self, 0)
2688 }
2689
2690 #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
2691 #[inline(always)]
2692 pub fn ssgtrgbf(
2693 self,
2694 ) -> crate::common::RegisterField<
2695 3,
2696 0x1,
2697 1,
2698 0,
2699 gtssr::Ssgtrgbf,
2700 gtssr::Ssgtrgbf,
2701 Gtssr_SPEC,
2702 crate::common::RW,
2703 > {
2704 crate::common::RegisterField::<
2705 3,
2706 0x1,
2707 1,
2708 0,
2709 gtssr::Ssgtrgbf,
2710 gtssr::Ssgtrgbf,
2711 Gtssr_SPEC,
2712 crate::common::RW,
2713 >::from_register(self, 0)
2714 }
2715
2716 #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
2717 #[inline(always)]
2718 pub fn ssgtrgbr(
2719 self,
2720 ) -> crate::common::RegisterField<
2721 2,
2722 0x1,
2723 1,
2724 0,
2725 gtssr::Ssgtrgbr,
2726 gtssr::Ssgtrgbr,
2727 Gtssr_SPEC,
2728 crate::common::RW,
2729 > {
2730 crate::common::RegisterField::<
2731 2,
2732 0x1,
2733 1,
2734 0,
2735 gtssr::Ssgtrgbr,
2736 gtssr::Ssgtrgbr,
2737 Gtssr_SPEC,
2738 crate::common::RW,
2739 >::from_register(self, 0)
2740 }
2741
2742 #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
2743 #[inline(always)]
2744 pub fn ssgtrgaf(
2745 self,
2746 ) -> crate::common::RegisterField<
2747 1,
2748 0x1,
2749 1,
2750 0,
2751 gtssr::Ssgtrgaf,
2752 gtssr::Ssgtrgaf,
2753 Gtssr_SPEC,
2754 crate::common::RW,
2755 > {
2756 crate::common::RegisterField::<
2757 1,
2758 0x1,
2759 1,
2760 0,
2761 gtssr::Ssgtrgaf,
2762 gtssr::Ssgtrgaf,
2763 Gtssr_SPEC,
2764 crate::common::RW,
2765 >::from_register(self, 0)
2766 }
2767
2768 #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
2769 #[inline(always)]
2770 pub fn ssgtrgar(
2771 self,
2772 ) -> crate::common::RegisterField<
2773 0,
2774 0x1,
2775 1,
2776 0,
2777 gtssr::Ssgtrgar,
2778 gtssr::Ssgtrgar,
2779 Gtssr_SPEC,
2780 crate::common::RW,
2781 > {
2782 crate::common::RegisterField::<
2783 0,
2784 0x1,
2785 1,
2786 0,
2787 gtssr::Ssgtrgar,
2788 gtssr::Ssgtrgar,
2789 Gtssr_SPEC,
2790 crate::common::RW,
2791 >::from_register(self, 0)
2792 }
2793}
2794impl ::core::default::Default for Gtssr {
2795 #[inline(always)]
2796 fn default() -> Gtssr {
2797 <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
2798 }
2799}
2800pub mod gtssr {
2801
2802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2803 pub struct Cstrt_SPEC;
2804 pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2805 impl Cstrt {
2806 #[doc = "Disable counter start by the GTSTR register"]
2807 pub const _0: Self = Self::new(0);
2808
2809 #[doc = "Enable counter start by the GTSTR register"]
2810 pub const _1: Self = Self::new(1);
2811 }
2812 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2813 pub struct Sselch_SPEC;
2814 pub type Sselch = crate::EnumBitfieldStruct<u8, Sselch_SPEC>;
2815 impl Sselch {
2816 #[doc = "Disable counter start on ELC_GPTH input"]
2817 pub const _0: Self = Self::new(0);
2818
2819 #[doc = "Enable counter start on ELC_GPTH input."]
2820 pub const _1: Self = Self::new(1);
2821 }
2822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2823 pub struct Sselcg_SPEC;
2824 pub type Sselcg = crate::EnumBitfieldStruct<u8, Sselcg_SPEC>;
2825 impl Sselcg {
2826 #[doc = "Disable counter start on ELC_GPTG input"]
2827 pub const _0: Self = Self::new(0);
2828
2829 #[doc = "Enable counter start on ELC_GPTG input."]
2830 pub const _1: Self = Self::new(1);
2831 }
2832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2833 pub struct Sselcf_SPEC;
2834 pub type Sselcf = crate::EnumBitfieldStruct<u8, Sselcf_SPEC>;
2835 impl Sselcf {
2836 #[doc = "Disable counter start on ELC_GPTF input"]
2837 pub const _0: Self = Self::new(0);
2838
2839 #[doc = "Enable counter start on ELC_GPTF input"]
2840 pub const _1: Self = Self::new(1);
2841 }
2842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2843 pub struct Sselce_SPEC;
2844 pub type Sselce = crate::EnumBitfieldStruct<u8, Sselce_SPEC>;
2845 impl Sselce {
2846 #[doc = "Disable counter start on ELC_GPTE input"]
2847 pub const _0: Self = Self::new(0);
2848
2849 #[doc = "Enable counter start on ELC_GPTE input"]
2850 pub const _1: Self = Self::new(1);
2851 }
2852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2853 pub struct Sselcd_SPEC;
2854 pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2855 impl Sselcd {
2856 #[doc = "Disable counter start on ELC_GPTD input"]
2857 pub const _0: Self = Self::new(0);
2858
2859 #[doc = "Enable counter start on ELC_GPTD input."]
2860 pub const _1: Self = Self::new(1);
2861 }
2862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2863 pub struct Sselcc_SPEC;
2864 pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2865 impl Sselcc {
2866 #[doc = "Disable counter start on ELC_GPTC input"]
2867 pub const _0: Self = Self::new(0);
2868
2869 #[doc = "Enable counter start on ELC_GPTC input."]
2870 pub const _1: Self = Self::new(1);
2871 }
2872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2873 pub struct Sselcb_SPEC;
2874 pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2875 impl Sselcb {
2876 #[doc = "Disable counter start on ELC_GPTB input"]
2877 pub const _0: Self = Self::new(0);
2878
2879 #[doc = "Enable counter start on ELC_GPTB input."]
2880 pub const _1: Self = Self::new(1);
2881 }
2882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2883 pub struct Sselca_SPEC;
2884 pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2885 impl Sselca {
2886 #[doc = "Disable counter start on ELC_GPTA input"]
2887 pub const _0: Self = Self::new(0);
2888
2889 #[doc = "Enable counter start on ELC_GPTA input."]
2890 pub const _1: Self = Self::new(1);
2891 }
2892 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2893 pub struct Sscbfah_SPEC;
2894 pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2895 impl Sscbfah {
2896 #[doc = "Disable counter start on the falling edge of GTIOCB input when GTIOCA input is 1"]
2897 pub const _0: Self = Self::new(0);
2898
2899 #[doc = "Enable counter start on the falling edge of GTIOCB input when GTIOCA input is 1."]
2900 pub const _1: Self = Self::new(1);
2901 }
2902 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2903 pub struct Sscbfal_SPEC;
2904 pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2905 impl Sscbfal {
2906 #[doc = "Disable counter start on the falling edge of GTIOCB input when GTIOCA input is 0"]
2907 pub const _0: Self = Self::new(0);
2908
2909 #[doc = "Enable counter start on the falling edge of GTIOCB input when GTIOCA input is 0."]
2910 pub const _1: Self = Self::new(1);
2911 }
2912 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2913 pub struct Sscbrah_SPEC;
2914 pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2915 impl Sscbrah {
2916 #[doc = "Disable counter start on the rising edge of GTIOCB input when GTIOCA input is 1"]
2917 pub const _0: Self = Self::new(0);
2918
2919 #[doc = "Enable counter start on the rising edge of GTIOCB input when GTIOCA input is 1."]
2920 pub const _1: Self = Self::new(1);
2921 }
2922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2923 pub struct Sscbral_SPEC;
2924 pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2925 impl Sscbral {
2926 #[doc = "Disable counter start on the rising edge of GTIOCB input when GTIOCA input is 0"]
2927 pub const _0: Self = Self::new(0);
2928
2929 #[doc = "Enable counter start on the rising edge of GTIOCB input when GTIOCA input is 0."]
2930 pub const _1: Self = Self::new(1);
2931 }
2932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2933 pub struct Sscafbh_SPEC;
2934 pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2935 impl Sscafbh {
2936 #[doc = "Disable counter start on the falling edge of GTIOCA input when GTIOCB input is 1"]
2937 pub const _0: Self = Self::new(0);
2938
2939 #[doc = "Enable counter start on the falling edge of GTIOCA input when GTIOCB input is 1."]
2940 pub const _1: Self = Self::new(1);
2941 }
2942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2943 pub struct Sscafbl_SPEC;
2944 pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2945 impl Sscafbl {
2946 #[doc = "Disable counter start on the falling edge of GTIOCA input when GTIOCB input is 0"]
2947 pub const _0: Self = Self::new(0);
2948
2949 #[doc = "Enable counter start on the falling edge of GTIOCA input when GTIOCB input is 0."]
2950 pub const _1: Self = Self::new(1);
2951 }
2952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2953 pub struct Sscarbh_SPEC;
2954 pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
2955 impl Sscarbh {
2956 #[doc = "Disable counter start on the rising edge of GTIOCA input when GTIOCB input is 1"]
2957 pub const _0: Self = Self::new(0);
2958
2959 #[doc = "Enable counter start on the rising edge of GTIOCA input when GTIOCB input is 1"]
2960 pub const _1: Self = Self::new(1);
2961 }
2962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2963 pub struct Sscarbl_SPEC;
2964 pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
2965 impl Sscarbl {
2966 #[doc = "Disable counter start on the rising edge of GTIOCA input when GTIOCB input is 0"]
2967 pub const _0: Self = Self::new(0);
2968
2969 #[doc = "Enable counter start on the rising edge of GTIOCA input when GTIOCB input is 0."]
2970 pub const _1: Self = Self::new(1);
2971 }
2972 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2973 pub struct Ssgtrgdf_SPEC;
2974 pub type Ssgtrgdf = crate::EnumBitfieldStruct<u8, Ssgtrgdf_SPEC>;
2975 impl Ssgtrgdf {
2976 #[doc = "Disable counter start on the falling edge of GTETRGD input"]
2977 pub const _0: Self = Self::new(0);
2978
2979 #[doc = "Enable counter start on the falling edge of GTETRGD input."]
2980 pub const _1: Self = Self::new(1);
2981 }
2982 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2983 pub struct Ssgtrgdr_SPEC;
2984 pub type Ssgtrgdr = crate::EnumBitfieldStruct<u8, Ssgtrgdr_SPEC>;
2985 impl Ssgtrgdr {
2986 #[doc = "Disable counter start on the rising edge of GTETRGD input"]
2987 pub const _0: Self = Self::new(0);
2988
2989 #[doc = "Enable counter start on the rising edge of GTETRGD input"]
2990 pub const _1: Self = Self::new(1);
2991 }
2992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2993 pub struct Ssgtrgcf_SPEC;
2994 pub type Ssgtrgcf = crate::EnumBitfieldStruct<u8, Ssgtrgcf_SPEC>;
2995 impl Ssgtrgcf {
2996 #[doc = "Disable counter start on the falling edge of GTETRGC input"]
2997 pub const _0: Self = Self::new(0);
2998
2999 #[doc = "Enable counter start on the falling edge of GTETRGC input"]
3000 pub const _1: Self = Self::new(1);
3001 }
3002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3003 pub struct Ssgtrgcr_SPEC;
3004 pub type Ssgtrgcr = crate::EnumBitfieldStruct<u8, Ssgtrgcr_SPEC>;
3005 impl Ssgtrgcr {
3006 #[doc = "Disable counter start on the rising edge of GTETRGC input"]
3007 pub const _0: Self = Self::new(0);
3008
3009 #[doc = "Enable counter start on the rising edge of GTETRGC input"]
3010 pub const _1: Self = Self::new(1);
3011 }
3012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3013 pub struct Ssgtrgbf_SPEC;
3014 pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
3015 impl Ssgtrgbf {
3016 #[doc = "Disable counter start on the falling edge of GTETRGB input"]
3017 pub const _0: Self = Self::new(0);
3018
3019 #[doc = "Enable counter start on the falling edge of GTETRGB input"]
3020 pub const _1: Self = Self::new(1);
3021 }
3022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3023 pub struct Ssgtrgbr_SPEC;
3024 pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
3025 impl Ssgtrgbr {
3026 #[doc = "Disable counter start on the rising edge of GTETRGB input"]
3027 pub const _0: Self = Self::new(0);
3028
3029 #[doc = "Enable counter start on the rising edge of GTETRGB input."]
3030 pub const _1: Self = Self::new(1);
3031 }
3032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3033 pub struct Ssgtrgaf_SPEC;
3034 pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
3035 impl Ssgtrgaf {
3036 #[doc = "Disable counter start on the falling edge of GTETRGA input"]
3037 pub const _0: Self = Self::new(0);
3038
3039 #[doc = "Enable counter start on the falling edge of GTETRGA input"]
3040 pub const _1: Self = Self::new(1);
3041 }
3042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3043 pub struct Ssgtrgar_SPEC;
3044 pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
3045 impl Ssgtrgar {
3046 #[doc = "Disable counter start on the rising edge of GTETRGA input"]
3047 pub const _0: Self = Self::new(0);
3048
3049 #[doc = "Enable counter start on the rising edge of GTETRGA input."]
3050 pub const _1: Self = Self::new(1);
3051 }
3052}
3053#[doc(hidden)]
3054#[derive(Copy, Clone, Eq, PartialEq)]
3055pub struct Gtpsr_SPEC;
3056impl crate::sealed::RegSpec for Gtpsr_SPEC {
3057 type DataType = u32;
3058}
3059
3060#[doc = "General PWM Timer Stop Source Select Register"]
3061pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
3062
3063impl Gtpsr {
3064 #[doc = "Software Source Counter Stop Enable"]
3065 #[inline(always)]
3066 pub fn cstop(
3067 self,
3068 ) -> crate::common::RegisterField<
3069 31,
3070 0x1,
3071 1,
3072 0,
3073 gtpsr::Cstop,
3074 gtpsr::Cstop,
3075 Gtpsr_SPEC,
3076 crate::common::RW,
3077 > {
3078 crate::common::RegisterField::<
3079 31,
3080 0x1,
3081 1,
3082 0,
3083 gtpsr::Cstop,
3084 gtpsr::Cstop,
3085 Gtpsr_SPEC,
3086 crate::common::RW,
3087 >::from_register(self, 0)
3088 }
3089
3090 #[doc = "ELC_GPTH Event Source Counter Stop Enable"]
3091 #[inline(always)]
3092 pub fn pselch(
3093 self,
3094 ) -> crate::common::RegisterField<
3095 23,
3096 0x1,
3097 1,
3098 0,
3099 gtpsr::Pselch,
3100 gtpsr::Pselch,
3101 Gtpsr_SPEC,
3102 crate::common::RW,
3103 > {
3104 crate::common::RegisterField::<
3105 23,
3106 0x1,
3107 1,
3108 0,
3109 gtpsr::Pselch,
3110 gtpsr::Pselch,
3111 Gtpsr_SPEC,
3112 crate::common::RW,
3113 >::from_register(self, 0)
3114 }
3115
3116 #[doc = "ELC_GPTG Event Source Counter Stop Enable"]
3117 #[inline(always)]
3118 pub fn pselcg(
3119 self,
3120 ) -> crate::common::RegisterField<
3121 22,
3122 0x1,
3123 1,
3124 0,
3125 gtpsr::Pselcg,
3126 gtpsr::Pselcg,
3127 Gtpsr_SPEC,
3128 crate::common::RW,
3129 > {
3130 crate::common::RegisterField::<
3131 22,
3132 0x1,
3133 1,
3134 0,
3135 gtpsr::Pselcg,
3136 gtpsr::Pselcg,
3137 Gtpsr_SPEC,
3138 crate::common::RW,
3139 >::from_register(self, 0)
3140 }
3141
3142 #[doc = "ELC_GPTF Event Source Counter Stop Enable"]
3143 #[inline(always)]
3144 pub fn pselcf(
3145 self,
3146 ) -> crate::common::RegisterField<
3147 21,
3148 0x1,
3149 1,
3150 0,
3151 gtpsr::Pselcf,
3152 gtpsr::Pselcf,
3153 Gtpsr_SPEC,
3154 crate::common::RW,
3155 > {
3156 crate::common::RegisterField::<
3157 21,
3158 0x1,
3159 1,
3160 0,
3161 gtpsr::Pselcf,
3162 gtpsr::Pselcf,
3163 Gtpsr_SPEC,
3164 crate::common::RW,
3165 >::from_register(self, 0)
3166 }
3167
3168 #[doc = "ELC_GPTE Event Source Counter Stop Enable"]
3169 #[inline(always)]
3170 pub fn pselce(
3171 self,
3172 ) -> crate::common::RegisterField<
3173 20,
3174 0x1,
3175 1,
3176 0,
3177 gtpsr::Pselce,
3178 gtpsr::Pselce,
3179 Gtpsr_SPEC,
3180 crate::common::RW,
3181 > {
3182 crate::common::RegisterField::<
3183 20,
3184 0x1,
3185 1,
3186 0,
3187 gtpsr::Pselce,
3188 gtpsr::Pselce,
3189 Gtpsr_SPEC,
3190 crate::common::RW,
3191 >::from_register(self, 0)
3192 }
3193
3194 #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
3195 #[inline(always)]
3196 pub fn pselcd(
3197 self,
3198 ) -> crate::common::RegisterField<
3199 19,
3200 0x1,
3201 1,
3202 0,
3203 gtpsr::Pselcd,
3204 gtpsr::Pselcd,
3205 Gtpsr_SPEC,
3206 crate::common::RW,
3207 > {
3208 crate::common::RegisterField::<
3209 19,
3210 0x1,
3211 1,
3212 0,
3213 gtpsr::Pselcd,
3214 gtpsr::Pselcd,
3215 Gtpsr_SPEC,
3216 crate::common::RW,
3217 >::from_register(self, 0)
3218 }
3219
3220 #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
3221 #[inline(always)]
3222 pub fn pselcc(
3223 self,
3224 ) -> crate::common::RegisterField<
3225 18,
3226 0x1,
3227 1,
3228 0,
3229 gtpsr::Pselcc,
3230 gtpsr::Pselcc,
3231 Gtpsr_SPEC,
3232 crate::common::RW,
3233 > {
3234 crate::common::RegisterField::<
3235 18,
3236 0x1,
3237 1,
3238 0,
3239 gtpsr::Pselcc,
3240 gtpsr::Pselcc,
3241 Gtpsr_SPEC,
3242 crate::common::RW,
3243 >::from_register(self, 0)
3244 }
3245
3246 #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
3247 #[inline(always)]
3248 pub fn pselcb(
3249 self,
3250 ) -> crate::common::RegisterField<
3251 17,
3252 0x1,
3253 1,
3254 0,
3255 gtpsr::Pselcb,
3256 gtpsr::Pselcb,
3257 Gtpsr_SPEC,
3258 crate::common::RW,
3259 > {
3260 crate::common::RegisterField::<
3261 17,
3262 0x1,
3263 1,
3264 0,
3265 gtpsr::Pselcb,
3266 gtpsr::Pselcb,
3267 Gtpsr_SPEC,
3268 crate::common::RW,
3269 >::from_register(self, 0)
3270 }
3271
3272 #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
3273 #[inline(always)]
3274 pub fn pselca(
3275 self,
3276 ) -> crate::common::RegisterField<
3277 16,
3278 0x1,
3279 1,
3280 0,
3281 gtpsr::Pselca,
3282 gtpsr::Pselca,
3283 Gtpsr_SPEC,
3284 crate::common::RW,
3285 > {
3286 crate::common::RegisterField::<
3287 16,
3288 0x1,
3289 1,
3290 0,
3291 gtpsr::Pselca,
3292 gtpsr::Pselca,
3293 Gtpsr_SPEC,
3294 crate::common::RW,
3295 >::from_register(self, 0)
3296 }
3297
3298 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable"]
3299 #[inline(always)]
3300 pub fn pscbfah(
3301 self,
3302 ) -> crate::common::RegisterField<
3303 15,
3304 0x1,
3305 1,
3306 0,
3307 gtpsr::Pscbfah,
3308 gtpsr::Pscbfah,
3309 Gtpsr_SPEC,
3310 crate::common::RW,
3311 > {
3312 crate::common::RegisterField::<
3313 15,
3314 0x1,
3315 1,
3316 0,
3317 gtpsr::Pscbfah,
3318 gtpsr::Pscbfah,
3319 Gtpsr_SPEC,
3320 crate::common::RW,
3321 >::from_register(self, 0)
3322 }
3323
3324 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable"]
3325 #[inline(always)]
3326 pub fn pscbfal(
3327 self,
3328 ) -> crate::common::RegisterField<
3329 14,
3330 0x1,
3331 1,
3332 0,
3333 gtpsr::Pscbfal,
3334 gtpsr::Pscbfal,
3335 Gtpsr_SPEC,
3336 crate::common::RW,
3337 > {
3338 crate::common::RegisterField::<
3339 14,
3340 0x1,
3341 1,
3342 0,
3343 gtpsr::Pscbfal,
3344 gtpsr::Pscbfal,
3345 Gtpsr_SPEC,
3346 crate::common::RW,
3347 >::from_register(self, 0)
3348 }
3349
3350 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable"]
3351 #[inline(always)]
3352 pub fn pscbrah(
3353 self,
3354 ) -> crate::common::RegisterField<
3355 13,
3356 0x1,
3357 1,
3358 0,
3359 gtpsr::Pscbrah,
3360 gtpsr::Pscbrah,
3361 Gtpsr_SPEC,
3362 crate::common::RW,
3363 > {
3364 crate::common::RegisterField::<
3365 13,
3366 0x1,
3367 1,
3368 0,
3369 gtpsr::Pscbrah,
3370 gtpsr::Pscbrah,
3371 Gtpsr_SPEC,
3372 crate::common::RW,
3373 >::from_register(self, 0)
3374 }
3375
3376 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable"]
3377 #[inline(always)]
3378 pub fn pscbral(
3379 self,
3380 ) -> crate::common::RegisterField<
3381 12,
3382 0x1,
3383 1,
3384 0,
3385 gtpsr::Pscbral,
3386 gtpsr::Pscbral,
3387 Gtpsr_SPEC,
3388 crate::common::RW,
3389 > {
3390 crate::common::RegisterField::<
3391 12,
3392 0x1,
3393 1,
3394 0,
3395 gtpsr::Pscbral,
3396 gtpsr::Pscbral,
3397 Gtpsr_SPEC,
3398 crate::common::RW,
3399 >::from_register(self, 0)
3400 }
3401
3402 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable"]
3403 #[inline(always)]
3404 pub fn pscafbh(
3405 self,
3406 ) -> crate::common::RegisterField<
3407 11,
3408 0x1,
3409 1,
3410 0,
3411 gtpsr::Pscafbh,
3412 gtpsr::Pscafbh,
3413 Gtpsr_SPEC,
3414 crate::common::RW,
3415 > {
3416 crate::common::RegisterField::<
3417 11,
3418 0x1,
3419 1,
3420 0,
3421 gtpsr::Pscafbh,
3422 gtpsr::Pscafbh,
3423 Gtpsr_SPEC,
3424 crate::common::RW,
3425 >::from_register(self, 0)
3426 }
3427
3428 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable"]
3429 #[inline(always)]
3430 pub fn pscafbl(
3431 self,
3432 ) -> crate::common::RegisterField<
3433 10,
3434 0x1,
3435 1,
3436 0,
3437 gtpsr::Pscafbl,
3438 gtpsr::Pscafbl,
3439 Gtpsr_SPEC,
3440 crate::common::RW,
3441 > {
3442 crate::common::RegisterField::<
3443 10,
3444 0x1,
3445 1,
3446 0,
3447 gtpsr::Pscafbl,
3448 gtpsr::Pscafbl,
3449 Gtpsr_SPEC,
3450 crate::common::RW,
3451 >::from_register(self, 0)
3452 }
3453
3454 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable"]
3455 #[inline(always)]
3456 pub fn pscarbh(
3457 self,
3458 ) -> crate::common::RegisterField<
3459 9,
3460 0x1,
3461 1,
3462 0,
3463 gtpsr::Pscarbh,
3464 gtpsr::Pscarbh,
3465 Gtpsr_SPEC,
3466 crate::common::RW,
3467 > {
3468 crate::common::RegisterField::<
3469 9,
3470 0x1,
3471 1,
3472 0,
3473 gtpsr::Pscarbh,
3474 gtpsr::Pscarbh,
3475 Gtpsr_SPEC,
3476 crate::common::RW,
3477 >::from_register(self, 0)
3478 }
3479
3480 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable"]
3481 #[inline(always)]
3482 pub fn pscarbl(
3483 self,
3484 ) -> crate::common::RegisterField<
3485 8,
3486 0x1,
3487 1,
3488 0,
3489 gtpsr::Pscarbl,
3490 gtpsr::Pscarbl,
3491 Gtpsr_SPEC,
3492 crate::common::RW,
3493 > {
3494 crate::common::RegisterField::<
3495 8,
3496 0x1,
3497 1,
3498 0,
3499 gtpsr::Pscarbl,
3500 gtpsr::Pscarbl,
3501 Gtpsr_SPEC,
3502 crate::common::RW,
3503 >::from_register(self, 0)
3504 }
3505
3506 #[doc = "GTETRGD Pin Falling Input Source Counter Stop Enable"]
3507 #[inline(always)]
3508 pub fn psgtrgdf(
3509 self,
3510 ) -> crate::common::RegisterField<
3511 7,
3512 0x1,
3513 1,
3514 0,
3515 gtpsr::Psgtrgdf,
3516 gtpsr::Psgtrgdf,
3517 Gtpsr_SPEC,
3518 crate::common::RW,
3519 > {
3520 crate::common::RegisterField::<
3521 7,
3522 0x1,
3523 1,
3524 0,
3525 gtpsr::Psgtrgdf,
3526 gtpsr::Psgtrgdf,
3527 Gtpsr_SPEC,
3528 crate::common::RW,
3529 >::from_register(self, 0)
3530 }
3531
3532 #[doc = "GTETRGD Pin Rising Input Source Counter Stop Enable"]
3533 #[inline(always)]
3534 pub fn psgtrgdr(
3535 self,
3536 ) -> crate::common::RegisterField<
3537 6,
3538 0x1,
3539 1,
3540 0,
3541 gtpsr::Psgtrgdr,
3542 gtpsr::Psgtrgdr,
3543 Gtpsr_SPEC,
3544 crate::common::RW,
3545 > {
3546 crate::common::RegisterField::<
3547 6,
3548 0x1,
3549 1,
3550 0,
3551 gtpsr::Psgtrgdr,
3552 gtpsr::Psgtrgdr,
3553 Gtpsr_SPEC,
3554 crate::common::RW,
3555 >::from_register(self, 0)
3556 }
3557
3558 #[doc = "GTETRGC Pin Falling Input Source Counter Stop Enable"]
3559 #[inline(always)]
3560 pub fn psgtrgcf(
3561 self,
3562 ) -> crate::common::RegisterField<
3563 5,
3564 0x1,
3565 1,
3566 0,
3567 gtpsr::Psgtrgcf,
3568 gtpsr::Psgtrgcf,
3569 Gtpsr_SPEC,
3570 crate::common::RW,
3571 > {
3572 crate::common::RegisterField::<
3573 5,
3574 0x1,
3575 1,
3576 0,
3577 gtpsr::Psgtrgcf,
3578 gtpsr::Psgtrgcf,
3579 Gtpsr_SPEC,
3580 crate::common::RW,
3581 >::from_register(self, 0)
3582 }
3583
3584 #[doc = "GTETRGC Pin Rising Input Source Counter Stop Enable"]
3585 #[inline(always)]
3586 pub fn psgtrgcr(
3587 self,
3588 ) -> crate::common::RegisterField<
3589 4,
3590 0x1,
3591 1,
3592 0,
3593 gtpsr::Psgtrgcr,
3594 gtpsr::Psgtrgcr,
3595 Gtpsr_SPEC,
3596 crate::common::RW,
3597 > {
3598 crate::common::RegisterField::<
3599 4,
3600 0x1,
3601 1,
3602 0,
3603 gtpsr::Psgtrgcr,
3604 gtpsr::Psgtrgcr,
3605 Gtpsr_SPEC,
3606 crate::common::RW,
3607 >::from_register(self, 0)
3608 }
3609
3610 #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
3611 #[inline(always)]
3612 pub fn psgtrgbf(
3613 self,
3614 ) -> crate::common::RegisterField<
3615 3,
3616 0x1,
3617 1,
3618 0,
3619 gtpsr::Psgtrgbf,
3620 gtpsr::Psgtrgbf,
3621 Gtpsr_SPEC,
3622 crate::common::RW,
3623 > {
3624 crate::common::RegisterField::<
3625 3,
3626 0x1,
3627 1,
3628 0,
3629 gtpsr::Psgtrgbf,
3630 gtpsr::Psgtrgbf,
3631 Gtpsr_SPEC,
3632 crate::common::RW,
3633 >::from_register(self, 0)
3634 }
3635
3636 #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
3637 #[inline(always)]
3638 pub fn psgtrgbr(
3639 self,
3640 ) -> crate::common::RegisterField<
3641 2,
3642 0x1,
3643 1,
3644 0,
3645 gtpsr::Psgtrgbr,
3646 gtpsr::Psgtrgbr,
3647 Gtpsr_SPEC,
3648 crate::common::RW,
3649 > {
3650 crate::common::RegisterField::<
3651 2,
3652 0x1,
3653 1,
3654 0,
3655 gtpsr::Psgtrgbr,
3656 gtpsr::Psgtrgbr,
3657 Gtpsr_SPEC,
3658 crate::common::RW,
3659 >::from_register(self, 0)
3660 }
3661
3662 #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
3663 #[inline(always)]
3664 pub fn psgtrgaf(
3665 self,
3666 ) -> crate::common::RegisterField<
3667 1,
3668 0x1,
3669 1,
3670 0,
3671 gtpsr::Psgtrgaf,
3672 gtpsr::Psgtrgaf,
3673 Gtpsr_SPEC,
3674 crate::common::RW,
3675 > {
3676 crate::common::RegisterField::<
3677 1,
3678 0x1,
3679 1,
3680 0,
3681 gtpsr::Psgtrgaf,
3682 gtpsr::Psgtrgaf,
3683 Gtpsr_SPEC,
3684 crate::common::RW,
3685 >::from_register(self, 0)
3686 }
3687
3688 #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
3689 #[inline(always)]
3690 pub fn psgtrgar(
3691 self,
3692 ) -> crate::common::RegisterField<
3693 0,
3694 0x1,
3695 1,
3696 0,
3697 gtpsr::Psgtrgar,
3698 gtpsr::Psgtrgar,
3699 Gtpsr_SPEC,
3700 crate::common::RW,
3701 > {
3702 crate::common::RegisterField::<
3703 0,
3704 0x1,
3705 1,
3706 0,
3707 gtpsr::Psgtrgar,
3708 gtpsr::Psgtrgar,
3709 Gtpsr_SPEC,
3710 crate::common::RW,
3711 >::from_register(self, 0)
3712 }
3713}
3714impl ::core::default::Default for Gtpsr {
3715 #[inline(always)]
3716 fn default() -> Gtpsr {
3717 <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
3718 }
3719}
3720pub mod gtpsr {
3721
3722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3723 pub struct Cstop_SPEC;
3724 pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
3725 impl Cstop {
3726 #[doc = "Disable counter stop by the GTSTP register"]
3727 pub const _0: Self = Self::new(0);
3728
3729 #[doc = "Enable counter stop by the GTSTP register"]
3730 pub const _1: Self = Self::new(1);
3731 }
3732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3733 pub struct Pselch_SPEC;
3734 pub type Pselch = crate::EnumBitfieldStruct<u8, Pselch_SPEC>;
3735 impl Pselch {
3736 #[doc = "Disable counter stop on ELC_GPTH input"]
3737 pub const _0: Self = Self::new(0);
3738
3739 #[doc = "Enable counter stop on ELC_GPTH input"]
3740 pub const _1: Self = Self::new(1);
3741 }
3742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3743 pub struct Pselcg_SPEC;
3744 pub type Pselcg = crate::EnumBitfieldStruct<u8, Pselcg_SPEC>;
3745 impl Pselcg {
3746 #[doc = "Disable counter stop on ELC_GPTG input"]
3747 pub const _0: Self = Self::new(0);
3748
3749 #[doc = "Enable counter stop on ELC_GPTG input"]
3750 pub const _1: Self = Self::new(1);
3751 }
3752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3753 pub struct Pselcf_SPEC;
3754 pub type Pselcf = crate::EnumBitfieldStruct<u8, Pselcf_SPEC>;
3755 impl Pselcf {
3756 #[doc = "Disable counter stop on ELC_GPTF input"]
3757 pub const _0: Self = Self::new(0);
3758
3759 #[doc = "Enable counter stop on ELC_GPTF input"]
3760 pub const _1: Self = Self::new(1);
3761 }
3762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3763 pub struct Pselce_SPEC;
3764 pub type Pselce = crate::EnumBitfieldStruct<u8, Pselce_SPEC>;
3765 impl Pselce {
3766 #[doc = "Disable counter stop on ELC_GPTE input"]
3767 pub const _0: Self = Self::new(0);
3768
3769 #[doc = "Enable counter stop on ELC_GPTE input"]
3770 pub const _1: Self = Self::new(1);
3771 }
3772 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3773 pub struct Pselcd_SPEC;
3774 pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
3775 impl Pselcd {
3776 #[doc = "Disable counter stop on ELC_GPTD input"]
3777 pub const _0: Self = Self::new(0);
3778
3779 #[doc = "Enable counter stop on ELC_GPTD input"]
3780 pub const _1: Self = Self::new(1);
3781 }
3782 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3783 pub struct Pselcc_SPEC;
3784 pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
3785 impl Pselcc {
3786 #[doc = "Disable counter stop on ELC_GPTC input"]
3787 pub const _0: Self = Self::new(0);
3788
3789 #[doc = "Enable counter stop on ELC_GPTC input"]
3790 pub const _1: Self = Self::new(1);
3791 }
3792 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3793 pub struct Pselcb_SPEC;
3794 pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
3795 impl Pselcb {
3796 #[doc = "Disable counter stop on ELC_GPTB input"]
3797 pub const _0: Self = Self::new(0);
3798
3799 #[doc = "Enable counter stop on ELC_GPTB input"]
3800 pub const _1: Self = Self::new(1);
3801 }
3802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3803 pub struct Pselca_SPEC;
3804 pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
3805 impl Pselca {
3806 #[doc = "Disable counter stop on ELC_GPTA input"]
3807 pub const _0: Self = Self::new(0);
3808
3809 #[doc = "Enable counter stop on ELC_GPTA input"]
3810 pub const _1: Self = Self::new(1);
3811 }
3812 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3813 pub struct Pscbfah_SPEC;
3814 pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
3815 impl Pscbfah {
3816 #[doc = "Disable counter stop on the falling edge of GTIOCB input when GTIOCA input is 1"]
3817 pub const _0: Self = Self::new(0);
3818
3819 #[doc = "Enable counter stop on the falling edge of GTIOCB input when GTIOCA input is 1"]
3820 pub const _1: Self = Self::new(1);
3821 }
3822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3823 pub struct Pscbfal_SPEC;
3824 pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
3825 impl Pscbfal {
3826 #[doc = "Disable counter stop on the falling edge of GTIOCB input when GTIOCA input is 0"]
3827 pub const _0: Self = Self::new(0);
3828
3829 #[doc = "Enable counter stop on the falling edge of GTIOCB input when GTIOCA input is 0"]
3830 pub const _1: Self = Self::new(1);
3831 }
3832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3833 pub struct Pscbrah_SPEC;
3834 pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
3835 impl Pscbrah {
3836 #[doc = "Disable counter stop on the rising edge of GTIOCB input when GTIOCA input is 1"]
3837 pub const _0: Self = Self::new(0);
3838
3839 #[doc = "Enable counter stop on the rising edge of GTIOCB input when GTIOCA input is 1"]
3840 pub const _1: Self = Self::new(1);
3841 }
3842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3843 pub struct Pscbral_SPEC;
3844 pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
3845 impl Pscbral {
3846 #[doc = "Disable counter stop on the rising edge of GTIOCB input when GTIOCA input is 0"]
3847 pub const _0: Self = Self::new(0);
3848
3849 #[doc = "Enable counter stop on the rising edge of GTIOCB input when GTIOCA input is 0"]
3850 pub const _1: Self = Self::new(1);
3851 }
3852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3853 pub struct Pscafbh_SPEC;
3854 pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
3855 impl Pscafbh {
3856 #[doc = "Disable counter stop on the falling edge of GTIOCA input when GTIOCB input is 1"]
3857 pub const _0: Self = Self::new(0);
3858
3859 #[doc = "Enable counter stop on the falling edge of GTIOCA input when GTIOCB input is 1"]
3860 pub const _1: Self = Self::new(1);
3861 }
3862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3863 pub struct Pscafbl_SPEC;
3864 pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
3865 impl Pscafbl {
3866 #[doc = "Disable counter stop on the falling edge of GTIOCA input when GTIOCB input is 0"]
3867 pub const _0: Self = Self::new(0);
3868
3869 #[doc = "Enable counter stop on the falling edge of GTIOCA input when GTIOCB input is 0"]
3870 pub const _1: Self = Self::new(1);
3871 }
3872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3873 pub struct Pscarbh_SPEC;
3874 pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
3875 impl Pscarbh {
3876 #[doc = "Disable counter stop on the rising edge of GTIOCA input when GTIOCB input is 1"]
3877 pub const _0: Self = Self::new(0);
3878
3879 #[doc = "Enable counter stop on the rising edge of GTIOCA input when GTIOCB input is 1"]
3880 pub const _1: Self = Self::new(1);
3881 }
3882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3883 pub struct Pscarbl_SPEC;
3884 pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
3885 impl Pscarbl {
3886 #[doc = "Disable counter stop on the rising edge of GTIOCA input when GTIOCB input is 0"]
3887 pub const _0: Self = Self::new(0);
3888
3889 #[doc = "Enable counter stop on the rising edge of GTIOCA input when GTIOCB input is 0"]
3890 pub const _1: Self = Self::new(1);
3891 }
3892 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3893 pub struct Psgtrgdf_SPEC;
3894 pub type Psgtrgdf = crate::EnumBitfieldStruct<u8, Psgtrgdf_SPEC>;
3895 impl Psgtrgdf {
3896 #[doc = "Disable counter stop on the falling edge of GTETRGD input"]
3897 pub const _0: Self = Self::new(0);
3898
3899 #[doc = "Enable counter stop on the falling edge of GTETRGD input"]
3900 pub const _1: Self = Self::new(1);
3901 }
3902 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3903 pub struct Psgtrgdr_SPEC;
3904 pub type Psgtrgdr = crate::EnumBitfieldStruct<u8, Psgtrgdr_SPEC>;
3905 impl Psgtrgdr {
3906 #[doc = "Disable counter stop on the rising edge of GTETRGD input"]
3907 pub const _0: Self = Self::new(0);
3908
3909 #[doc = "Enable counter stop on the rising edge of GTETRGD input"]
3910 pub const _1: Self = Self::new(1);
3911 }
3912 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3913 pub struct Psgtrgcf_SPEC;
3914 pub type Psgtrgcf = crate::EnumBitfieldStruct<u8, Psgtrgcf_SPEC>;
3915 impl Psgtrgcf {
3916 #[doc = "Disable counter stop on the falling edge of GTETRGC input"]
3917 pub const _0: Self = Self::new(0);
3918
3919 #[doc = "Enable counter stop on the falling edge of GTETRGC input"]
3920 pub const _1: Self = Self::new(1);
3921 }
3922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3923 pub struct Psgtrgcr_SPEC;
3924 pub type Psgtrgcr = crate::EnumBitfieldStruct<u8, Psgtrgcr_SPEC>;
3925 impl Psgtrgcr {
3926 #[doc = "Disable counter stop on the rising edge of GTETRGC input"]
3927 pub const _0: Self = Self::new(0);
3928
3929 #[doc = "Enable counter stop on the rising edge of GTETRGC input"]
3930 pub const _1: Self = Self::new(1);
3931 }
3932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3933 pub struct Psgtrgbf_SPEC;
3934 pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
3935 impl Psgtrgbf {
3936 #[doc = "Disable counter stop on the falling edge of GTETRGB input"]
3937 pub const _0: Self = Self::new(0);
3938
3939 #[doc = "Enable counter stop on the falling edge of GTETRGB input"]
3940 pub const _1: Self = Self::new(1);
3941 }
3942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3943 pub struct Psgtrgbr_SPEC;
3944 pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
3945 impl Psgtrgbr {
3946 #[doc = "Disable counter stop on the rising edge of GTETRGB input"]
3947 pub const _0: Self = Self::new(0);
3948
3949 #[doc = "Enable counter stop on the rising edge of GTETRGB input"]
3950 pub const _1: Self = Self::new(1);
3951 }
3952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3953 pub struct Psgtrgaf_SPEC;
3954 pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
3955 impl Psgtrgaf {
3956 #[doc = "Disable counter stop on the falling edge of GTETRGA input"]
3957 pub const _0: Self = Self::new(0);
3958
3959 #[doc = "Enable counter stop on the falling edge of GTETRGA input"]
3960 pub const _1: Self = Self::new(1);
3961 }
3962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3963 pub struct Psgtrgar_SPEC;
3964 pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
3965 impl Psgtrgar {
3966 #[doc = "Disable counter stop on the rising edge of GTETRGA input"]
3967 pub const _0: Self = Self::new(0);
3968
3969 #[doc = "Enable counter stop on the rising edge of GTETRGA input"]
3970 pub const _1: Self = Self::new(1);
3971 }
3972}
3973#[doc(hidden)]
3974#[derive(Copy, Clone, Eq, PartialEq)]
3975pub struct Gtcsr_SPEC;
3976impl crate::sealed::RegSpec for Gtcsr_SPEC {
3977 type DataType = u32;
3978}
3979
3980#[doc = "General PWM Timer Clear Source Select Register"]
3981pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
3982
3983impl Gtcsr {
3984 #[doc = "Software Source Counter Clear Enable"]
3985 #[inline(always)]
3986 pub fn cclr(
3987 self,
3988 ) -> crate::common::RegisterField<
3989 31,
3990 0x1,
3991 1,
3992 0,
3993 gtcsr::Cclr,
3994 gtcsr::Cclr,
3995 Gtcsr_SPEC,
3996 crate::common::RW,
3997 > {
3998 crate::common::RegisterField::<
3999 31,
4000 0x1,
4001 1,
4002 0,
4003 gtcsr::Cclr,
4004 gtcsr::Cclr,
4005 Gtcsr_SPEC,
4006 crate::common::RW,
4007 >::from_register(self, 0)
4008 }
4009
4010 #[doc = "ELC_GPTH Event Source Counter Clear Enable"]
4011 #[inline(always)]
4012 pub fn cselch(
4013 self,
4014 ) -> crate::common::RegisterField<
4015 23,
4016 0x1,
4017 1,
4018 0,
4019 gtcsr::Cselch,
4020 gtcsr::Cselch,
4021 Gtcsr_SPEC,
4022 crate::common::RW,
4023 > {
4024 crate::common::RegisterField::<
4025 23,
4026 0x1,
4027 1,
4028 0,
4029 gtcsr::Cselch,
4030 gtcsr::Cselch,
4031 Gtcsr_SPEC,
4032 crate::common::RW,
4033 >::from_register(self, 0)
4034 }
4035
4036 #[doc = "ELC_GPTG Event Source Counter Clear Enable"]
4037 #[inline(always)]
4038 pub fn cselcg(
4039 self,
4040 ) -> crate::common::RegisterField<
4041 22,
4042 0x1,
4043 1,
4044 0,
4045 gtcsr::Cselcg,
4046 gtcsr::Cselcg,
4047 Gtcsr_SPEC,
4048 crate::common::RW,
4049 > {
4050 crate::common::RegisterField::<
4051 22,
4052 0x1,
4053 1,
4054 0,
4055 gtcsr::Cselcg,
4056 gtcsr::Cselcg,
4057 Gtcsr_SPEC,
4058 crate::common::RW,
4059 >::from_register(self, 0)
4060 }
4061
4062 #[doc = "ELC_GPTF Event Source Counter Clear Enable"]
4063 #[inline(always)]
4064 pub fn cselcf(
4065 self,
4066 ) -> crate::common::RegisterField<
4067 21,
4068 0x1,
4069 1,
4070 0,
4071 gtcsr::Cselcf,
4072 gtcsr::Cselcf,
4073 Gtcsr_SPEC,
4074 crate::common::RW,
4075 > {
4076 crate::common::RegisterField::<
4077 21,
4078 0x1,
4079 1,
4080 0,
4081 gtcsr::Cselcf,
4082 gtcsr::Cselcf,
4083 Gtcsr_SPEC,
4084 crate::common::RW,
4085 >::from_register(self, 0)
4086 }
4087
4088 #[doc = "ELC_GPTE Event Source Counter Clear Enable"]
4089 #[inline(always)]
4090 pub fn cselce(
4091 self,
4092 ) -> crate::common::RegisterField<
4093 20,
4094 0x1,
4095 1,
4096 0,
4097 gtcsr::Cselce,
4098 gtcsr::Cselce,
4099 Gtcsr_SPEC,
4100 crate::common::RW,
4101 > {
4102 crate::common::RegisterField::<
4103 20,
4104 0x1,
4105 1,
4106 0,
4107 gtcsr::Cselce,
4108 gtcsr::Cselce,
4109 Gtcsr_SPEC,
4110 crate::common::RW,
4111 >::from_register(self, 0)
4112 }
4113
4114 #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
4115 #[inline(always)]
4116 pub fn cselcd(
4117 self,
4118 ) -> crate::common::RegisterField<
4119 19,
4120 0x1,
4121 1,
4122 0,
4123 gtcsr::Cselcd,
4124 gtcsr::Cselcd,
4125 Gtcsr_SPEC,
4126 crate::common::RW,
4127 > {
4128 crate::common::RegisterField::<
4129 19,
4130 0x1,
4131 1,
4132 0,
4133 gtcsr::Cselcd,
4134 gtcsr::Cselcd,
4135 Gtcsr_SPEC,
4136 crate::common::RW,
4137 >::from_register(self, 0)
4138 }
4139
4140 #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
4141 #[inline(always)]
4142 pub fn cselcc(
4143 self,
4144 ) -> crate::common::RegisterField<
4145 18,
4146 0x1,
4147 1,
4148 0,
4149 gtcsr::Cselcc,
4150 gtcsr::Cselcc,
4151 Gtcsr_SPEC,
4152 crate::common::RW,
4153 > {
4154 crate::common::RegisterField::<
4155 18,
4156 0x1,
4157 1,
4158 0,
4159 gtcsr::Cselcc,
4160 gtcsr::Cselcc,
4161 Gtcsr_SPEC,
4162 crate::common::RW,
4163 >::from_register(self, 0)
4164 }
4165
4166 #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
4167 #[inline(always)]
4168 pub fn cselcb(
4169 self,
4170 ) -> crate::common::RegisterField<
4171 17,
4172 0x1,
4173 1,
4174 0,
4175 gtcsr::Cselcb,
4176 gtcsr::Cselcb,
4177 Gtcsr_SPEC,
4178 crate::common::RW,
4179 > {
4180 crate::common::RegisterField::<
4181 17,
4182 0x1,
4183 1,
4184 0,
4185 gtcsr::Cselcb,
4186 gtcsr::Cselcb,
4187 Gtcsr_SPEC,
4188 crate::common::RW,
4189 >::from_register(self, 0)
4190 }
4191
4192 #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
4193 #[inline(always)]
4194 pub fn cselca(
4195 self,
4196 ) -> crate::common::RegisterField<
4197 16,
4198 0x1,
4199 1,
4200 0,
4201 gtcsr::Cselca,
4202 gtcsr::Cselca,
4203 Gtcsr_SPEC,
4204 crate::common::RW,
4205 > {
4206 crate::common::RegisterField::<
4207 16,
4208 0x1,
4209 1,
4210 0,
4211 gtcsr::Cselca,
4212 gtcsr::Cselca,
4213 Gtcsr_SPEC,
4214 crate::common::RW,
4215 >::from_register(self, 0)
4216 }
4217
4218 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable"]
4219 #[inline(always)]
4220 pub fn cscbfah(
4221 self,
4222 ) -> crate::common::RegisterField<
4223 15,
4224 0x1,
4225 1,
4226 0,
4227 gtcsr::Cscbfah,
4228 gtcsr::Cscbfah,
4229 Gtcsr_SPEC,
4230 crate::common::RW,
4231 > {
4232 crate::common::RegisterField::<
4233 15,
4234 0x1,
4235 1,
4236 0,
4237 gtcsr::Cscbfah,
4238 gtcsr::Cscbfah,
4239 Gtcsr_SPEC,
4240 crate::common::RW,
4241 >::from_register(self, 0)
4242 }
4243
4244 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable"]
4245 #[inline(always)]
4246 pub fn cscbfal(
4247 self,
4248 ) -> crate::common::RegisterField<
4249 14,
4250 0x1,
4251 1,
4252 0,
4253 gtcsr::Cscbfal,
4254 gtcsr::Cscbfal,
4255 Gtcsr_SPEC,
4256 crate::common::RW,
4257 > {
4258 crate::common::RegisterField::<
4259 14,
4260 0x1,
4261 1,
4262 0,
4263 gtcsr::Cscbfal,
4264 gtcsr::Cscbfal,
4265 Gtcsr_SPEC,
4266 crate::common::RW,
4267 >::from_register(self, 0)
4268 }
4269
4270 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable"]
4271 #[inline(always)]
4272 pub fn cscbrah(
4273 self,
4274 ) -> crate::common::RegisterField<
4275 13,
4276 0x1,
4277 1,
4278 0,
4279 gtcsr::Cscbrah,
4280 gtcsr::Cscbrah,
4281 Gtcsr_SPEC,
4282 crate::common::RW,
4283 > {
4284 crate::common::RegisterField::<
4285 13,
4286 0x1,
4287 1,
4288 0,
4289 gtcsr::Cscbrah,
4290 gtcsr::Cscbrah,
4291 Gtcsr_SPEC,
4292 crate::common::RW,
4293 >::from_register(self, 0)
4294 }
4295
4296 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable"]
4297 #[inline(always)]
4298 pub fn cscbral(
4299 self,
4300 ) -> crate::common::RegisterField<
4301 12,
4302 0x1,
4303 1,
4304 0,
4305 gtcsr::Cscbral,
4306 gtcsr::Cscbral,
4307 Gtcsr_SPEC,
4308 crate::common::RW,
4309 > {
4310 crate::common::RegisterField::<
4311 12,
4312 0x1,
4313 1,
4314 0,
4315 gtcsr::Cscbral,
4316 gtcsr::Cscbral,
4317 Gtcsr_SPEC,
4318 crate::common::RW,
4319 >::from_register(self, 0)
4320 }
4321
4322 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable"]
4323 #[inline(always)]
4324 pub fn cscafbh(
4325 self,
4326 ) -> crate::common::RegisterField<
4327 11,
4328 0x1,
4329 1,
4330 0,
4331 gtcsr::Cscafbh,
4332 gtcsr::Cscafbh,
4333 Gtcsr_SPEC,
4334 crate::common::RW,
4335 > {
4336 crate::common::RegisterField::<
4337 11,
4338 0x1,
4339 1,
4340 0,
4341 gtcsr::Cscafbh,
4342 gtcsr::Cscafbh,
4343 Gtcsr_SPEC,
4344 crate::common::RW,
4345 >::from_register(self, 0)
4346 }
4347
4348 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable"]
4349 #[inline(always)]
4350 pub fn cscafbl(
4351 self,
4352 ) -> crate::common::RegisterField<
4353 10,
4354 0x1,
4355 1,
4356 0,
4357 gtcsr::Cscafbl,
4358 gtcsr::Cscafbl,
4359 Gtcsr_SPEC,
4360 crate::common::RW,
4361 > {
4362 crate::common::RegisterField::<
4363 10,
4364 0x1,
4365 1,
4366 0,
4367 gtcsr::Cscafbl,
4368 gtcsr::Cscafbl,
4369 Gtcsr_SPEC,
4370 crate::common::RW,
4371 >::from_register(self, 0)
4372 }
4373
4374 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable"]
4375 #[inline(always)]
4376 pub fn cscarbh(
4377 self,
4378 ) -> crate::common::RegisterField<
4379 9,
4380 0x1,
4381 1,
4382 0,
4383 gtcsr::Cscarbh,
4384 gtcsr::Cscarbh,
4385 Gtcsr_SPEC,
4386 crate::common::RW,
4387 > {
4388 crate::common::RegisterField::<
4389 9,
4390 0x1,
4391 1,
4392 0,
4393 gtcsr::Cscarbh,
4394 gtcsr::Cscarbh,
4395 Gtcsr_SPEC,
4396 crate::common::RW,
4397 >::from_register(self, 0)
4398 }
4399
4400 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable"]
4401 #[inline(always)]
4402 pub fn cscarbl(
4403 self,
4404 ) -> crate::common::RegisterField<
4405 8,
4406 0x1,
4407 1,
4408 0,
4409 gtcsr::Cscarbl,
4410 gtcsr::Cscarbl,
4411 Gtcsr_SPEC,
4412 crate::common::RW,
4413 > {
4414 crate::common::RegisterField::<
4415 8,
4416 0x1,
4417 1,
4418 0,
4419 gtcsr::Cscarbl,
4420 gtcsr::Cscarbl,
4421 Gtcsr_SPEC,
4422 crate::common::RW,
4423 >::from_register(self, 0)
4424 }
4425
4426 #[doc = "GTETRGD Pin Falling Input Source Counter Clear Enable"]
4427 #[inline(always)]
4428 pub fn csgtrgdf(
4429 self,
4430 ) -> crate::common::RegisterField<
4431 7,
4432 0x1,
4433 1,
4434 0,
4435 gtcsr::Csgtrgdf,
4436 gtcsr::Csgtrgdf,
4437 Gtcsr_SPEC,
4438 crate::common::RW,
4439 > {
4440 crate::common::RegisterField::<
4441 7,
4442 0x1,
4443 1,
4444 0,
4445 gtcsr::Csgtrgdf,
4446 gtcsr::Csgtrgdf,
4447 Gtcsr_SPEC,
4448 crate::common::RW,
4449 >::from_register(self, 0)
4450 }
4451
4452 #[doc = "GTETRGD Pin Rising Input Source Counter Clear Enable"]
4453 #[inline(always)]
4454 pub fn csgtrgdr(
4455 self,
4456 ) -> crate::common::RegisterField<
4457 6,
4458 0x1,
4459 1,
4460 0,
4461 gtcsr::Csgtrgdr,
4462 gtcsr::Csgtrgdr,
4463 Gtcsr_SPEC,
4464 crate::common::RW,
4465 > {
4466 crate::common::RegisterField::<
4467 6,
4468 0x1,
4469 1,
4470 0,
4471 gtcsr::Csgtrgdr,
4472 gtcsr::Csgtrgdr,
4473 Gtcsr_SPEC,
4474 crate::common::RW,
4475 >::from_register(self, 0)
4476 }
4477
4478 #[doc = "GTETRGC Pin Falling Input Source Counter Clear Enable"]
4479 #[inline(always)]
4480 pub fn csgtrgcf(
4481 self,
4482 ) -> crate::common::RegisterField<
4483 5,
4484 0x1,
4485 1,
4486 0,
4487 gtcsr::Csgtrgcf,
4488 gtcsr::Csgtrgcf,
4489 Gtcsr_SPEC,
4490 crate::common::RW,
4491 > {
4492 crate::common::RegisterField::<
4493 5,
4494 0x1,
4495 1,
4496 0,
4497 gtcsr::Csgtrgcf,
4498 gtcsr::Csgtrgcf,
4499 Gtcsr_SPEC,
4500 crate::common::RW,
4501 >::from_register(self, 0)
4502 }
4503
4504 #[doc = "GTETRGC Pin Rising Input Source Counter Clear Enable"]
4505 #[inline(always)]
4506 pub fn csgtrgcr(
4507 self,
4508 ) -> crate::common::RegisterField<
4509 4,
4510 0x1,
4511 1,
4512 0,
4513 gtcsr::Csgtrgcr,
4514 gtcsr::Csgtrgcr,
4515 Gtcsr_SPEC,
4516 crate::common::RW,
4517 > {
4518 crate::common::RegisterField::<
4519 4,
4520 0x1,
4521 1,
4522 0,
4523 gtcsr::Csgtrgcr,
4524 gtcsr::Csgtrgcr,
4525 Gtcsr_SPEC,
4526 crate::common::RW,
4527 >::from_register(self, 0)
4528 }
4529
4530 #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
4531 #[inline(always)]
4532 pub fn csgtrgbf(
4533 self,
4534 ) -> crate::common::RegisterField<
4535 3,
4536 0x1,
4537 1,
4538 0,
4539 gtcsr::Csgtrgbf,
4540 gtcsr::Csgtrgbf,
4541 Gtcsr_SPEC,
4542 crate::common::RW,
4543 > {
4544 crate::common::RegisterField::<
4545 3,
4546 0x1,
4547 1,
4548 0,
4549 gtcsr::Csgtrgbf,
4550 gtcsr::Csgtrgbf,
4551 Gtcsr_SPEC,
4552 crate::common::RW,
4553 >::from_register(self, 0)
4554 }
4555
4556 #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
4557 #[inline(always)]
4558 pub fn csgtrgbr(
4559 self,
4560 ) -> crate::common::RegisterField<
4561 2,
4562 0x1,
4563 1,
4564 0,
4565 gtcsr::Csgtrgbr,
4566 gtcsr::Csgtrgbr,
4567 Gtcsr_SPEC,
4568 crate::common::RW,
4569 > {
4570 crate::common::RegisterField::<
4571 2,
4572 0x1,
4573 1,
4574 0,
4575 gtcsr::Csgtrgbr,
4576 gtcsr::Csgtrgbr,
4577 Gtcsr_SPEC,
4578 crate::common::RW,
4579 >::from_register(self, 0)
4580 }
4581
4582 #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
4583 #[inline(always)]
4584 pub fn csgtrgaf(
4585 self,
4586 ) -> crate::common::RegisterField<
4587 1,
4588 0x1,
4589 1,
4590 0,
4591 gtcsr::Csgtrgaf,
4592 gtcsr::Csgtrgaf,
4593 Gtcsr_SPEC,
4594 crate::common::RW,
4595 > {
4596 crate::common::RegisterField::<
4597 1,
4598 0x1,
4599 1,
4600 0,
4601 gtcsr::Csgtrgaf,
4602 gtcsr::Csgtrgaf,
4603 Gtcsr_SPEC,
4604 crate::common::RW,
4605 >::from_register(self, 0)
4606 }
4607
4608 #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
4609 #[inline(always)]
4610 pub fn csgtrgar(
4611 self,
4612 ) -> crate::common::RegisterField<
4613 0,
4614 0x1,
4615 1,
4616 0,
4617 gtcsr::Csgtrgar,
4618 gtcsr::Csgtrgar,
4619 Gtcsr_SPEC,
4620 crate::common::RW,
4621 > {
4622 crate::common::RegisterField::<
4623 0,
4624 0x1,
4625 1,
4626 0,
4627 gtcsr::Csgtrgar,
4628 gtcsr::Csgtrgar,
4629 Gtcsr_SPEC,
4630 crate::common::RW,
4631 >::from_register(self, 0)
4632 }
4633}
4634impl ::core::default::Default for Gtcsr {
4635 #[inline(always)]
4636 fn default() -> Gtcsr {
4637 <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
4638 }
4639}
4640pub mod gtcsr {
4641
4642 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4643 pub struct Cclr_SPEC;
4644 pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
4645 impl Cclr {
4646 #[doc = "Disable counter clear by the GTCLR register"]
4647 pub const _0: Self = Self::new(0);
4648
4649 #[doc = "Enable counter clear by the GTCLR register"]
4650 pub const _1: Self = Self::new(1);
4651 }
4652 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4653 pub struct Cselch_SPEC;
4654 pub type Cselch = crate::EnumBitfieldStruct<u8, Cselch_SPEC>;
4655 impl Cselch {
4656 #[doc = "Disable counter clear on ELC_GPTH input"]
4657 pub const _0: Self = Self::new(0);
4658
4659 #[doc = "Enable counter clear on ELC_GPTH input"]
4660 pub const _1: Self = Self::new(1);
4661 }
4662 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4663 pub struct Cselcg_SPEC;
4664 pub type Cselcg = crate::EnumBitfieldStruct<u8, Cselcg_SPEC>;
4665 impl Cselcg {
4666 #[doc = "Disable counter clear on ELC_GPTG input"]
4667 pub const _0: Self = Self::new(0);
4668
4669 #[doc = "Enable counter clear on ELC_GPTG input"]
4670 pub const _1: Self = Self::new(1);
4671 }
4672 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4673 pub struct Cselcf_SPEC;
4674 pub type Cselcf = crate::EnumBitfieldStruct<u8, Cselcf_SPEC>;
4675 impl Cselcf {
4676 #[doc = "Disable counter clear on ELC_GPTF input"]
4677 pub const _0: Self = Self::new(0);
4678
4679 #[doc = "Enable counter clear on ELC_GPTF input"]
4680 pub const _1: Self = Self::new(1);
4681 }
4682 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4683 pub struct Cselce_SPEC;
4684 pub type Cselce = crate::EnumBitfieldStruct<u8, Cselce_SPEC>;
4685 impl Cselce {
4686 #[doc = "Disable counter clear on ELC_GPTE input"]
4687 pub const _0: Self = Self::new(0);
4688
4689 #[doc = "Enable counter clear on ELC_GPTE input"]
4690 pub const _1: Self = Self::new(1);
4691 }
4692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4693 pub struct Cselcd_SPEC;
4694 pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
4695 impl Cselcd {
4696 #[doc = "Disable counter clear on ELC_GPTD input"]
4697 pub const _0: Self = Self::new(0);
4698
4699 #[doc = "Enable counter clear on ELC_GPTD input"]
4700 pub const _1: Self = Self::new(1);
4701 }
4702 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4703 pub struct Cselcc_SPEC;
4704 pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
4705 impl Cselcc {
4706 #[doc = "Disable counter clear on ELC_GPTC input"]
4707 pub const _0: Self = Self::new(0);
4708
4709 #[doc = "Enable counter clear on ELC_GPTC input"]
4710 pub const _1: Self = Self::new(1);
4711 }
4712 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4713 pub struct Cselcb_SPEC;
4714 pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
4715 impl Cselcb {
4716 #[doc = "Disable counter clear on ELC_GPTB input"]
4717 pub const _0: Self = Self::new(0);
4718
4719 #[doc = "Enable counter clear on ELC_GPTB input"]
4720 pub const _1: Self = Self::new(1);
4721 }
4722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4723 pub struct Cselca_SPEC;
4724 pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
4725 impl Cselca {
4726 #[doc = "Disable counter clear on ELC_GPTA input"]
4727 pub const _0: Self = Self::new(0);
4728
4729 #[doc = "Enable counter clear on ELC_GPTA input"]
4730 pub const _1: Self = Self::new(1);
4731 }
4732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4733 pub struct Cscbfah_SPEC;
4734 pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
4735 impl Cscbfah {
4736 #[doc = "Disable counter clear on the falling edge of GTIOCB input when GTIOCA input is 1"]
4737 pub const _0: Self = Self::new(0);
4738
4739 #[doc = "Enable counter clear on the falling edge of GTIOCB input when GTIOCA input is 1"]
4740 pub const _1: Self = Self::new(1);
4741 }
4742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4743 pub struct Cscbfal_SPEC;
4744 pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
4745 impl Cscbfal {
4746 #[doc = "Disable counter clear on the falling edge of GTIOCB input when GTIOCA input is 0"]
4747 pub const _0: Self = Self::new(0);
4748
4749 #[doc = "Enable counter clear on the falling edge of GTIOCB input when GTIOCA input is 0"]
4750 pub const _1: Self = Self::new(1);
4751 }
4752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4753 pub struct Cscbrah_SPEC;
4754 pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
4755 impl Cscbrah {
4756 #[doc = "Disable counter clear on the rising edge of GTIOCB input when GTIOCA input is 1"]
4757 pub const _0: Self = Self::new(0);
4758
4759 #[doc = "Enable counter clear on the rising edge of GTIOCB input when GTIOCA input is 1"]
4760 pub const _1: Self = Self::new(1);
4761 }
4762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4763 pub struct Cscbral_SPEC;
4764 pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
4765 impl Cscbral {
4766 #[doc = "Disable counter clear on the rising edge of GTIOCB input when GTIOCA input is 0"]
4767 pub const _0: Self = Self::new(0);
4768
4769 #[doc = "Enable counter clear on the rising edge of GTIOCB input when GTIOCA input is 0"]
4770 pub const _1: Self = Self::new(1);
4771 }
4772 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4773 pub struct Cscafbh_SPEC;
4774 pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
4775 impl Cscafbh {
4776 #[doc = "Disable counter clear on the falling edge of GTIOCA input when GTIOCB input is 1"]
4777 pub const _0: Self = Self::new(0);
4778
4779 #[doc = "Enable counter clear on the falling edge of GTIOCA input when GTIOCB input is 1"]
4780 pub const _1: Self = Self::new(1);
4781 }
4782 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4783 pub struct Cscafbl_SPEC;
4784 pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
4785 impl Cscafbl {
4786 #[doc = "Disable counter clear on the falling edge of GTIOCA input when GTIOCB input is 0"]
4787 pub const _0: Self = Self::new(0);
4788
4789 #[doc = "Enable counter clear on the falling edge of GTIOCA input when GTIOCB input is 0"]
4790 pub const _1: Self = Self::new(1);
4791 }
4792 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4793 pub struct Cscarbh_SPEC;
4794 pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
4795 impl Cscarbh {
4796 #[doc = "Disable counter clear on the rising edge of GTIOCA input when GTIOCB input is 1"]
4797 pub const _0: Self = Self::new(0);
4798
4799 #[doc = "Enable counter clear on the rising edge of GTIOCA input when GTIOCB input is 1"]
4800 pub const _1: Self = Self::new(1);
4801 }
4802 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4803 pub struct Cscarbl_SPEC;
4804 pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
4805 impl Cscarbl {
4806 #[doc = "Disable counter clear on the rising edge of GTIOCA input when GTIOCB input is 0"]
4807 pub const _0: Self = Self::new(0);
4808
4809 #[doc = "Enable counter clear on the rising edge of GTIOCA input when GTIOCB input is 0"]
4810 pub const _1: Self = Self::new(1);
4811 }
4812 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4813 pub struct Csgtrgdf_SPEC;
4814 pub type Csgtrgdf = crate::EnumBitfieldStruct<u8, Csgtrgdf_SPEC>;
4815 impl Csgtrgdf {
4816 #[doc = "Disable counter clear on the falling edge of GTETRGD input"]
4817 pub const _0: Self = Self::new(0);
4818
4819 #[doc = "Enable counter clear on the falling edge of GTETRGD input"]
4820 pub const _1: Self = Self::new(1);
4821 }
4822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4823 pub struct Csgtrgdr_SPEC;
4824 pub type Csgtrgdr = crate::EnumBitfieldStruct<u8, Csgtrgdr_SPEC>;
4825 impl Csgtrgdr {
4826 #[doc = "Disable counter clear on the rising edge of GTETRGD input"]
4827 pub const _0: Self = Self::new(0);
4828
4829 #[doc = "Enable counter clear on the rising edge of GTETRGD input"]
4830 pub const _1: Self = Self::new(1);
4831 }
4832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4833 pub struct Csgtrgcf_SPEC;
4834 pub type Csgtrgcf = crate::EnumBitfieldStruct<u8, Csgtrgcf_SPEC>;
4835 impl Csgtrgcf {
4836 #[doc = "Disable counter clear on the falling edge of GTETRGC input"]
4837 pub const _0: Self = Self::new(0);
4838
4839 #[doc = "Enable counter clear on the falling edge of GTETRGC input"]
4840 pub const _1: Self = Self::new(1);
4841 }
4842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4843 pub struct Csgtrgcr_SPEC;
4844 pub type Csgtrgcr = crate::EnumBitfieldStruct<u8, Csgtrgcr_SPEC>;
4845 impl Csgtrgcr {
4846 #[doc = "Disable counter clear on the rising edge of GTETRGC input"]
4847 pub const _0: Self = Self::new(0);
4848
4849 #[doc = "Enable counter clear on the rising edge of GTETRGC input"]
4850 pub const _1: Self = Self::new(1);
4851 }
4852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4853 pub struct Csgtrgbf_SPEC;
4854 pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
4855 impl Csgtrgbf {
4856 #[doc = "Disable counter clear on the falling edge of GTETRGB input"]
4857 pub const _0: Self = Self::new(0);
4858
4859 #[doc = "Enable counter clear on the falling edge of GTETRGB input"]
4860 pub const _1: Self = Self::new(1);
4861 }
4862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4863 pub struct Csgtrgbr_SPEC;
4864 pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
4865 impl Csgtrgbr {
4866 #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
4867 pub const _0: Self = Self::new(0);
4868
4869 #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
4870 pub const _1: Self = Self::new(1);
4871 }
4872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4873 pub struct Csgtrgaf_SPEC;
4874 pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
4875 impl Csgtrgaf {
4876 #[doc = "Disable counter clear on the falling edge of GTETRGA input"]
4877 pub const _0: Self = Self::new(0);
4878
4879 #[doc = "Enable counter clear on the falling edge of GTETRGA input"]
4880 pub const _1: Self = Self::new(1);
4881 }
4882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4883 pub struct Csgtrgar_SPEC;
4884 pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
4885 impl Csgtrgar {
4886 #[doc = "Disable counter clear on the rising edge of GTETRGA input"]
4887 pub const _0: Self = Self::new(0);
4888
4889 #[doc = "Enable counter clear on the rising edge of GTETRGA input"]
4890 pub const _1: Self = Self::new(1);
4891 }
4892}
4893#[doc(hidden)]
4894#[derive(Copy, Clone, Eq, PartialEq)]
4895pub struct Gtupsr_SPEC;
4896impl crate::sealed::RegSpec for Gtupsr_SPEC {
4897 type DataType = u32;
4898}
4899
4900#[doc = "General PWM Timer Up Count Source Select Register"]
4901pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
4902
4903impl Gtupsr {
4904 #[doc = "ELC_GPTH Event Source Counter Count Up Enable"]
4905 #[inline(always)]
4906 pub fn uselch(
4907 self,
4908 ) -> crate::common::RegisterField<
4909 23,
4910 0x1,
4911 1,
4912 0,
4913 gtupsr::Uselch,
4914 gtupsr::Uselch,
4915 Gtupsr_SPEC,
4916 crate::common::RW,
4917 > {
4918 crate::common::RegisterField::<
4919 23,
4920 0x1,
4921 1,
4922 0,
4923 gtupsr::Uselch,
4924 gtupsr::Uselch,
4925 Gtupsr_SPEC,
4926 crate::common::RW,
4927 >::from_register(self, 0)
4928 }
4929
4930 #[doc = "ELC_GPTG Event Source Counter Count Up Enable"]
4931 #[inline(always)]
4932 pub fn uselcg(
4933 self,
4934 ) -> crate::common::RegisterField<
4935 22,
4936 0x1,
4937 1,
4938 0,
4939 gtupsr::Uselcg,
4940 gtupsr::Uselcg,
4941 Gtupsr_SPEC,
4942 crate::common::RW,
4943 > {
4944 crate::common::RegisterField::<
4945 22,
4946 0x1,
4947 1,
4948 0,
4949 gtupsr::Uselcg,
4950 gtupsr::Uselcg,
4951 Gtupsr_SPEC,
4952 crate::common::RW,
4953 >::from_register(self, 0)
4954 }
4955
4956 #[doc = "ELC_GPTF Event Source Counter Count Up Enable"]
4957 #[inline(always)]
4958 pub fn uselcf(
4959 self,
4960 ) -> crate::common::RegisterField<
4961 21,
4962 0x1,
4963 1,
4964 0,
4965 gtupsr::Uselcf,
4966 gtupsr::Uselcf,
4967 Gtupsr_SPEC,
4968 crate::common::RW,
4969 > {
4970 crate::common::RegisterField::<
4971 21,
4972 0x1,
4973 1,
4974 0,
4975 gtupsr::Uselcf,
4976 gtupsr::Uselcf,
4977 Gtupsr_SPEC,
4978 crate::common::RW,
4979 >::from_register(self, 0)
4980 }
4981
4982 #[doc = "ELC_GPTE Event Source Counter Count Up Enable"]
4983 #[inline(always)]
4984 pub fn uselce(
4985 self,
4986 ) -> crate::common::RegisterField<
4987 20,
4988 0x1,
4989 1,
4990 0,
4991 gtupsr::Uselce,
4992 gtupsr::Uselce,
4993 Gtupsr_SPEC,
4994 crate::common::RW,
4995 > {
4996 crate::common::RegisterField::<
4997 20,
4998 0x1,
4999 1,
5000 0,
5001 gtupsr::Uselce,
5002 gtupsr::Uselce,
5003 Gtupsr_SPEC,
5004 crate::common::RW,
5005 >::from_register(self, 0)
5006 }
5007
5008 #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
5009 #[inline(always)]
5010 pub fn uselcd(
5011 self,
5012 ) -> crate::common::RegisterField<
5013 19,
5014 0x1,
5015 1,
5016 0,
5017 gtupsr::Uselcd,
5018 gtupsr::Uselcd,
5019 Gtupsr_SPEC,
5020 crate::common::RW,
5021 > {
5022 crate::common::RegisterField::<
5023 19,
5024 0x1,
5025 1,
5026 0,
5027 gtupsr::Uselcd,
5028 gtupsr::Uselcd,
5029 Gtupsr_SPEC,
5030 crate::common::RW,
5031 >::from_register(self, 0)
5032 }
5033
5034 #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
5035 #[inline(always)]
5036 pub fn uselcc(
5037 self,
5038 ) -> crate::common::RegisterField<
5039 18,
5040 0x1,
5041 1,
5042 0,
5043 gtupsr::Uselcc,
5044 gtupsr::Uselcc,
5045 Gtupsr_SPEC,
5046 crate::common::RW,
5047 > {
5048 crate::common::RegisterField::<
5049 18,
5050 0x1,
5051 1,
5052 0,
5053 gtupsr::Uselcc,
5054 gtupsr::Uselcc,
5055 Gtupsr_SPEC,
5056 crate::common::RW,
5057 >::from_register(self, 0)
5058 }
5059
5060 #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
5061 #[inline(always)]
5062 pub fn uselcb(
5063 self,
5064 ) -> crate::common::RegisterField<
5065 17,
5066 0x1,
5067 1,
5068 0,
5069 gtupsr::Uselcb,
5070 gtupsr::Uselcb,
5071 Gtupsr_SPEC,
5072 crate::common::RW,
5073 > {
5074 crate::common::RegisterField::<
5075 17,
5076 0x1,
5077 1,
5078 0,
5079 gtupsr::Uselcb,
5080 gtupsr::Uselcb,
5081 Gtupsr_SPEC,
5082 crate::common::RW,
5083 >::from_register(self, 0)
5084 }
5085
5086 #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
5087 #[inline(always)]
5088 pub fn uselca(
5089 self,
5090 ) -> crate::common::RegisterField<
5091 16,
5092 0x1,
5093 1,
5094 0,
5095 gtupsr::Uselca,
5096 gtupsr::Uselca,
5097 Gtupsr_SPEC,
5098 crate::common::RW,
5099 > {
5100 crate::common::RegisterField::<
5101 16,
5102 0x1,
5103 1,
5104 0,
5105 gtupsr::Uselca,
5106 gtupsr::Uselca,
5107 Gtupsr_SPEC,
5108 crate::common::RW,
5109 >::from_register(self, 0)
5110 }
5111
5112 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable"]
5113 #[inline(always)]
5114 pub fn uscbfah(
5115 self,
5116 ) -> crate::common::RegisterField<
5117 15,
5118 0x1,
5119 1,
5120 0,
5121 gtupsr::Uscbfah,
5122 gtupsr::Uscbfah,
5123 Gtupsr_SPEC,
5124 crate::common::RW,
5125 > {
5126 crate::common::RegisterField::<
5127 15,
5128 0x1,
5129 1,
5130 0,
5131 gtupsr::Uscbfah,
5132 gtupsr::Uscbfah,
5133 Gtupsr_SPEC,
5134 crate::common::RW,
5135 >::from_register(self, 0)
5136 }
5137
5138 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable"]
5139 #[inline(always)]
5140 pub fn uscbfal(
5141 self,
5142 ) -> crate::common::RegisterField<
5143 14,
5144 0x1,
5145 1,
5146 0,
5147 gtupsr::Uscbfal,
5148 gtupsr::Uscbfal,
5149 Gtupsr_SPEC,
5150 crate::common::RW,
5151 > {
5152 crate::common::RegisterField::<
5153 14,
5154 0x1,
5155 1,
5156 0,
5157 gtupsr::Uscbfal,
5158 gtupsr::Uscbfal,
5159 Gtupsr_SPEC,
5160 crate::common::RW,
5161 >::from_register(self, 0)
5162 }
5163
5164 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable"]
5165 #[inline(always)]
5166 pub fn uscbrah(
5167 self,
5168 ) -> crate::common::RegisterField<
5169 13,
5170 0x1,
5171 1,
5172 0,
5173 gtupsr::Uscbrah,
5174 gtupsr::Uscbrah,
5175 Gtupsr_SPEC,
5176 crate::common::RW,
5177 > {
5178 crate::common::RegisterField::<
5179 13,
5180 0x1,
5181 1,
5182 0,
5183 gtupsr::Uscbrah,
5184 gtupsr::Uscbrah,
5185 Gtupsr_SPEC,
5186 crate::common::RW,
5187 >::from_register(self, 0)
5188 }
5189
5190 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable"]
5191 #[inline(always)]
5192 pub fn uscbral(
5193 self,
5194 ) -> crate::common::RegisterField<
5195 12,
5196 0x1,
5197 1,
5198 0,
5199 gtupsr::Uscbral,
5200 gtupsr::Uscbral,
5201 Gtupsr_SPEC,
5202 crate::common::RW,
5203 > {
5204 crate::common::RegisterField::<
5205 12,
5206 0x1,
5207 1,
5208 0,
5209 gtupsr::Uscbral,
5210 gtupsr::Uscbral,
5211 Gtupsr_SPEC,
5212 crate::common::RW,
5213 >::from_register(self, 0)
5214 }
5215
5216 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable"]
5217 #[inline(always)]
5218 pub fn uscafbh(
5219 self,
5220 ) -> crate::common::RegisterField<
5221 11,
5222 0x1,
5223 1,
5224 0,
5225 gtupsr::Uscafbh,
5226 gtupsr::Uscafbh,
5227 Gtupsr_SPEC,
5228 crate::common::RW,
5229 > {
5230 crate::common::RegisterField::<
5231 11,
5232 0x1,
5233 1,
5234 0,
5235 gtupsr::Uscafbh,
5236 gtupsr::Uscafbh,
5237 Gtupsr_SPEC,
5238 crate::common::RW,
5239 >::from_register(self, 0)
5240 }
5241
5242 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable"]
5243 #[inline(always)]
5244 pub fn uscafbl(
5245 self,
5246 ) -> crate::common::RegisterField<
5247 10,
5248 0x1,
5249 1,
5250 0,
5251 gtupsr::Uscafbl,
5252 gtupsr::Uscafbl,
5253 Gtupsr_SPEC,
5254 crate::common::RW,
5255 > {
5256 crate::common::RegisterField::<
5257 10,
5258 0x1,
5259 1,
5260 0,
5261 gtupsr::Uscafbl,
5262 gtupsr::Uscafbl,
5263 Gtupsr_SPEC,
5264 crate::common::RW,
5265 >::from_register(self, 0)
5266 }
5267
5268 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable"]
5269 #[inline(always)]
5270 pub fn uscarbh(
5271 self,
5272 ) -> crate::common::RegisterField<
5273 9,
5274 0x1,
5275 1,
5276 0,
5277 gtupsr::Uscarbh,
5278 gtupsr::Uscarbh,
5279 Gtupsr_SPEC,
5280 crate::common::RW,
5281 > {
5282 crate::common::RegisterField::<
5283 9,
5284 0x1,
5285 1,
5286 0,
5287 gtupsr::Uscarbh,
5288 gtupsr::Uscarbh,
5289 Gtupsr_SPEC,
5290 crate::common::RW,
5291 >::from_register(self, 0)
5292 }
5293
5294 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable"]
5295 #[inline(always)]
5296 pub fn uscarbl(
5297 self,
5298 ) -> crate::common::RegisterField<
5299 8,
5300 0x1,
5301 1,
5302 0,
5303 gtupsr::Uscarbl,
5304 gtupsr::Uscarbl,
5305 Gtupsr_SPEC,
5306 crate::common::RW,
5307 > {
5308 crate::common::RegisterField::<
5309 8,
5310 0x1,
5311 1,
5312 0,
5313 gtupsr::Uscarbl,
5314 gtupsr::Uscarbl,
5315 Gtupsr_SPEC,
5316 crate::common::RW,
5317 >::from_register(self, 0)
5318 }
5319
5320 #[doc = "GTETRGD Pin Falling Input Source Counter Count Up Enable"]
5321 #[inline(always)]
5322 pub fn usgtrgdf(
5323 self,
5324 ) -> crate::common::RegisterField<
5325 7,
5326 0x1,
5327 1,
5328 0,
5329 gtupsr::Usgtrgdf,
5330 gtupsr::Usgtrgdf,
5331 Gtupsr_SPEC,
5332 crate::common::RW,
5333 > {
5334 crate::common::RegisterField::<
5335 7,
5336 0x1,
5337 1,
5338 0,
5339 gtupsr::Usgtrgdf,
5340 gtupsr::Usgtrgdf,
5341 Gtupsr_SPEC,
5342 crate::common::RW,
5343 >::from_register(self, 0)
5344 }
5345
5346 #[doc = "GTETRGD Pin Rising Input Source Counter Count Up Enable"]
5347 #[inline(always)]
5348 pub fn usgtrgdr(
5349 self,
5350 ) -> crate::common::RegisterField<
5351 6,
5352 0x1,
5353 1,
5354 0,
5355 gtupsr::Usgtrgdr,
5356 gtupsr::Usgtrgdr,
5357 Gtupsr_SPEC,
5358 crate::common::RW,
5359 > {
5360 crate::common::RegisterField::<
5361 6,
5362 0x1,
5363 1,
5364 0,
5365 gtupsr::Usgtrgdr,
5366 gtupsr::Usgtrgdr,
5367 Gtupsr_SPEC,
5368 crate::common::RW,
5369 >::from_register(self, 0)
5370 }
5371
5372 #[doc = "GTETRGC Pin Falling Input Source Counter Count Up Enable"]
5373 #[inline(always)]
5374 pub fn usgtrgcf(
5375 self,
5376 ) -> crate::common::RegisterField<
5377 5,
5378 0x1,
5379 1,
5380 0,
5381 gtupsr::Usgtrgcf,
5382 gtupsr::Usgtrgcf,
5383 Gtupsr_SPEC,
5384 crate::common::RW,
5385 > {
5386 crate::common::RegisterField::<
5387 5,
5388 0x1,
5389 1,
5390 0,
5391 gtupsr::Usgtrgcf,
5392 gtupsr::Usgtrgcf,
5393 Gtupsr_SPEC,
5394 crate::common::RW,
5395 >::from_register(self, 0)
5396 }
5397
5398 #[doc = "GTETRGC Pin Rising Input Source Counter Count Up Enable"]
5399 #[inline(always)]
5400 pub fn usgtrgcr(
5401 self,
5402 ) -> crate::common::RegisterField<
5403 4,
5404 0x1,
5405 1,
5406 0,
5407 gtupsr::Usgtrgcr,
5408 gtupsr::Usgtrgcr,
5409 Gtupsr_SPEC,
5410 crate::common::RW,
5411 > {
5412 crate::common::RegisterField::<
5413 4,
5414 0x1,
5415 1,
5416 0,
5417 gtupsr::Usgtrgcr,
5418 gtupsr::Usgtrgcr,
5419 Gtupsr_SPEC,
5420 crate::common::RW,
5421 >::from_register(self, 0)
5422 }
5423
5424 #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
5425 #[inline(always)]
5426 pub fn usgtrgbf(
5427 self,
5428 ) -> crate::common::RegisterField<
5429 3,
5430 0x1,
5431 1,
5432 0,
5433 gtupsr::Usgtrgbf,
5434 gtupsr::Usgtrgbf,
5435 Gtupsr_SPEC,
5436 crate::common::RW,
5437 > {
5438 crate::common::RegisterField::<
5439 3,
5440 0x1,
5441 1,
5442 0,
5443 gtupsr::Usgtrgbf,
5444 gtupsr::Usgtrgbf,
5445 Gtupsr_SPEC,
5446 crate::common::RW,
5447 >::from_register(self, 0)
5448 }
5449
5450 #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
5451 #[inline(always)]
5452 pub fn usgtrgbr(
5453 self,
5454 ) -> crate::common::RegisterField<
5455 2,
5456 0x1,
5457 1,
5458 0,
5459 gtupsr::Usgtrgbr,
5460 gtupsr::Usgtrgbr,
5461 Gtupsr_SPEC,
5462 crate::common::RW,
5463 > {
5464 crate::common::RegisterField::<
5465 2,
5466 0x1,
5467 1,
5468 0,
5469 gtupsr::Usgtrgbr,
5470 gtupsr::Usgtrgbr,
5471 Gtupsr_SPEC,
5472 crate::common::RW,
5473 >::from_register(self, 0)
5474 }
5475
5476 #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
5477 #[inline(always)]
5478 pub fn usgtrgaf(
5479 self,
5480 ) -> crate::common::RegisterField<
5481 1,
5482 0x1,
5483 1,
5484 0,
5485 gtupsr::Usgtrgaf,
5486 gtupsr::Usgtrgaf,
5487 Gtupsr_SPEC,
5488 crate::common::RW,
5489 > {
5490 crate::common::RegisterField::<
5491 1,
5492 0x1,
5493 1,
5494 0,
5495 gtupsr::Usgtrgaf,
5496 gtupsr::Usgtrgaf,
5497 Gtupsr_SPEC,
5498 crate::common::RW,
5499 >::from_register(self, 0)
5500 }
5501
5502 #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
5503 #[inline(always)]
5504 pub fn usgtrgar(
5505 self,
5506 ) -> crate::common::RegisterField<
5507 0,
5508 0x1,
5509 1,
5510 0,
5511 gtupsr::Usgtrgar,
5512 gtupsr::Usgtrgar,
5513 Gtupsr_SPEC,
5514 crate::common::RW,
5515 > {
5516 crate::common::RegisterField::<
5517 0,
5518 0x1,
5519 1,
5520 0,
5521 gtupsr::Usgtrgar,
5522 gtupsr::Usgtrgar,
5523 Gtupsr_SPEC,
5524 crate::common::RW,
5525 >::from_register(self, 0)
5526 }
5527}
5528impl ::core::default::Default for Gtupsr {
5529 #[inline(always)]
5530 fn default() -> Gtupsr {
5531 <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
5532 }
5533}
5534pub mod gtupsr {
5535
5536 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5537 pub struct Uselch_SPEC;
5538 pub type Uselch = crate::EnumBitfieldStruct<u8, Uselch_SPEC>;
5539 impl Uselch {
5540 #[doc = "Disable counter count up on ELC_GPTH input"]
5541 pub const _0: Self = Self::new(0);
5542
5543 #[doc = "Enable counter count up on ELC_GPTH input."]
5544 pub const _1: Self = Self::new(1);
5545 }
5546 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5547 pub struct Uselcg_SPEC;
5548 pub type Uselcg = crate::EnumBitfieldStruct<u8, Uselcg_SPEC>;
5549 impl Uselcg {
5550 #[doc = "Disable counter count up on ELC_GPTG input"]
5551 pub const _0: Self = Self::new(0);
5552
5553 #[doc = "Enable counter count up on ELC_GPTG input."]
5554 pub const _1: Self = Self::new(1);
5555 }
5556 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5557 pub struct Uselcf_SPEC;
5558 pub type Uselcf = crate::EnumBitfieldStruct<u8, Uselcf_SPEC>;
5559 impl Uselcf {
5560 #[doc = "Disable counter count up on ELC_GPTF input"]
5561 pub const _0: Self = Self::new(0);
5562
5563 #[doc = "Enable counter count up on ELC_GPTF input."]
5564 pub const _1: Self = Self::new(1);
5565 }
5566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5567 pub struct Uselce_SPEC;
5568 pub type Uselce = crate::EnumBitfieldStruct<u8, Uselce_SPEC>;
5569 impl Uselce {
5570 #[doc = "Disable counter count up on ELC_GPTE input"]
5571 pub const _0: Self = Self::new(0);
5572
5573 #[doc = "Enable counter count up on ELC_GPTE input.put"]
5574 pub const _1: Self = Self::new(1);
5575 }
5576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5577 pub struct Uselcd_SPEC;
5578 pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
5579 impl Uselcd {
5580 #[doc = "Disable counter count up on ELC_GPTD input"]
5581 pub const _0: Self = Self::new(0);
5582
5583 #[doc = "Enable counter count up on ELC_GPTD input"]
5584 pub const _1: Self = Self::new(1);
5585 }
5586 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5587 pub struct Uselcc_SPEC;
5588 pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
5589 impl Uselcc {
5590 #[doc = "Disable counter count up on ELC_GPTC input"]
5591 pub const _0: Self = Self::new(0);
5592
5593 #[doc = "Enable counter count up on ELC_GPTC input."]
5594 pub const _1: Self = Self::new(1);
5595 }
5596 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5597 pub struct Uselcb_SPEC;
5598 pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
5599 impl Uselcb {
5600 #[doc = "Disable counter count up on ELC_GPTB input"]
5601 pub const _0: Self = Self::new(0);
5602
5603 #[doc = "Enable counter count up on ELC_GPTB input."]
5604 pub const _1: Self = Self::new(1);
5605 }
5606 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5607 pub struct Uselca_SPEC;
5608 pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
5609 impl Uselca {
5610 #[doc = "Disable counter count up on ELC_GPTA input"]
5611 pub const _0: Self = Self::new(0);
5612
5613 #[doc = "Enable counter count up on ELC_GPTA input."]
5614 pub const _1: Self = Self::new(1);
5615 }
5616 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5617 pub struct Uscbfah_SPEC;
5618 pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
5619 impl Uscbfah {
5620 #[doc = "Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1"]
5621 pub const _0: Self = Self::new(0);
5622
5623 #[doc = "Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1."]
5624 pub const _1: Self = Self::new(1);
5625 }
5626 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5627 pub struct Uscbfal_SPEC;
5628 pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
5629 impl Uscbfal {
5630 #[doc = "Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0"]
5631 pub const _0: Self = Self::new(0);
5632
5633 #[doc = "Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0."]
5634 pub const _1: Self = Self::new(1);
5635 }
5636 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5637 pub struct Uscbrah_SPEC;
5638 pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
5639 impl Uscbrah {
5640 #[doc = "Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1"]
5641 pub const _0: Self = Self::new(0);
5642
5643 #[doc = "Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1."]
5644 pub const _1: Self = Self::new(1);
5645 }
5646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5647 pub struct Uscbral_SPEC;
5648 pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
5649 impl Uscbral {
5650 #[doc = "Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0"]
5651 pub const _0: Self = Self::new(0);
5652
5653 #[doc = "Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0."]
5654 pub const _1: Self = Self::new(1);
5655 }
5656 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5657 pub struct Uscafbh_SPEC;
5658 pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
5659 impl Uscafbh {
5660 #[doc = "Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1"]
5661 pub const _0: Self = Self::new(0);
5662
5663 #[doc = "Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1."]
5664 pub const _1: Self = Self::new(1);
5665 }
5666 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5667 pub struct Uscafbl_SPEC;
5668 pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
5669 impl Uscafbl {
5670 #[doc = "Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0"]
5671 pub const _0: Self = Self::new(0);
5672
5673 #[doc = "Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0."]
5674 pub const _1: Self = Self::new(1);
5675 }
5676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5677 pub struct Uscarbh_SPEC;
5678 pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
5679 impl Uscarbh {
5680 #[doc = "Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1"]
5681 pub const _0: Self = Self::new(0);
5682
5683 #[doc = "Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1."]
5684 pub const _1: Self = Self::new(1);
5685 }
5686 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5687 pub struct Uscarbl_SPEC;
5688 pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
5689 impl Uscarbl {
5690 #[doc = "Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0"]
5691 pub const _0: Self = Self::new(0);
5692
5693 #[doc = "Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0."]
5694 pub const _1: Self = Self::new(1);
5695 }
5696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5697 pub struct Usgtrgdf_SPEC;
5698 pub type Usgtrgdf = crate::EnumBitfieldStruct<u8, Usgtrgdf_SPEC>;
5699 impl Usgtrgdf {
5700 #[doc = "Disable counter count up on the falling edge of GTETRGD input"]
5701 pub const _0: Self = Self::new(0);
5702
5703 #[doc = "Enable counter count up on the falling edge of GTETRGD input."]
5704 pub const _1: Self = Self::new(1);
5705 }
5706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5707 pub struct Usgtrgdr_SPEC;
5708 pub type Usgtrgdr = crate::EnumBitfieldStruct<u8, Usgtrgdr_SPEC>;
5709 impl Usgtrgdr {
5710 #[doc = "Disable counter count up on the rising edge of GTETRGD input"]
5711 pub const _0: Self = Self::new(0);
5712
5713 #[doc = "Enable counter count up on the rising edge of GTETRGD input"]
5714 pub const _1: Self = Self::new(1);
5715 }
5716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5717 pub struct Usgtrgcf_SPEC;
5718 pub type Usgtrgcf = crate::EnumBitfieldStruct<u8, Usgtrgcf_SPEC>;
5719 impl Usgtrgcf {
5720 #[doc = "Disable counter count up on the falling edge of GTETRGC input"]
5721 pub const _0: Self = Self::new(0);
5722
5723 #[doc = "Enable counter count up on the falling edge of GTETRGC input."]
5724 pub const _1: Self = Self::new(1);
5725 }
5726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5727 pub struct Usgtrgcr_SPEC;
5728 pub type Usgtrgcr = crate::EnumBitfieldStruct<u8, Usgtrgcr_SPEC>;
5729 impl Usgtrgcr {
5730 #[doc = "Disable counter count up on the rising edge of GTETRGC input"]
5731 pub const _0: Self = Self::new(0);
5732
5733 #[doc = "Enable counter count up on the rising edge of GTETRGC input"]
5734 pub const _1: Self = Self::new(1);
5735 }
5736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5737 pub struct Usgtrgbf_SPEC;
5738 pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
5739 impl Usgtrgbf {
5740 #[doc = "Disable counter count up on the falling edge of GTETRGB input"]
5741 pub const _0: Self = Self::new(0);
5742
5743 #[doc = "Enable counter count up on the falling edge of GTETRGB input."]
5744 pub const _1: Self = Self::new(1);
5745 }
5746 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5747 pub struct Usgtrgbr_SPEC;
5748 pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
5749 impl Usgtrgbr {
5750 #[doc = "Disable counter count up on the rising edge of GTETRGB input"]
5751 pub const _0: Self = Self::new(0);
5752
5753 #[doc = "Enable counter count up on the rising edge of GTETRGB input."]
5754 pub const _1: Self = Self::new(1);
5755 }
5756 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5757 pub struct Usgtrgaf_SPEC;
5758 pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
5759 impl Usgtrgaf {
5760 #[doc = "Disable counter count up on the falling edge of GTETRGA input"]
5761 pub const _0: Self = Self::new(0);
5762
5763 #[doc = "Enable counter count up on the falling edge of GTETRGA input."]
5764 pub const _1: Self = Self::new(1);
5765 }
5766 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5767 pub struct Usgtrgar_SPEC;
5768 pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
5769 impl Usgtrgar {
5770 #[doc = "Disable counter count up on the rising edge of GTETRGA input"]
5771 pub const _0: Self = Self::new(0);
5772
5773 #[doc = "Enable counter count up on the rising edge of GTETRGA input"]
5774 pub const _1: Self = Self::new(1);
5775 }
5776}
5777#[doc(hidden)]
5778#[derive(Copy, Clone, Eq, PartialEq)]
5779pub struct Gtdnsr_SPEC;
5780impl crate::sealed::RegSpec for Gtdnsr_SPEC {
5781 type DataType = u32;
5782}
5783
5784#[doc = "General PWM Timer Down Count Source Select Register"]
5785pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
5786
5787impl Gtdnsr {
5788 #[doc = "ELC_GPTH Event Source Counter Count Down Enable"]
5789 #[inline(always)]
5790 pub fn dselch(
5791 self,
5792 ) -> crate::common::RegisterField<
5793 23,
5794 0x1,
5795 1,
5796 0,
5797 gtdnsr::Dselch,
5798 gtdnsr::Dselch,
5799 Gtdnsr_SPEC,
5800 crate::common::RW,
5801 > {
5802 crate::common::RegisterField::<
5803 23,
5804 0x1,
5805 1,
5806 0,
5807 gtdnsr::Dselch,
5808 gtdnsr::Dselch,
5809 Gtdnsr_SPEC,
5810 crate::common::RW,
5811 >::from_register(self, 0)
5812 }
5813
5814 #[doc = "ELC_GPTG Event Source Counter Count Down Enable"]
5815 #[inline(always)]
5816 pub fn dselcg(
5817 self,
5818 ) -> crate::common::RegisterField<
5819 22,
5820 0x1,
5821 1,
5822 0,
5823 gtdnsr::Dselcg,
5824 gtdnsr::Dselcg,
5825 Gtdnsr_SPEC,
5826 crate::common::RW,
5827 > {
5828 crate::common::RegisterField::<
5829 22,
5830 0x1,
5831 1,
5832 0,
5833 gtdnsr::Dselcg,
5834 gtdnsr::Dselcg,
5835 Gtdnsr_SPEC,
5836 crate::common::RW,
5837 >::from_register(self, 0)
5838 }
5839
5840 #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5841 #[inline(always)]
5842 pub fn dselcf(
5843 self,
5844 ) -> crate::common::RegisterField<
5845 21,
5846 0x1,
5847 1,
5848 0,
5849 gtdnsr::Dselcf,
5850 gtdnsr::Dselcf,
5851 Gtdnsr_SPEC,
5852 crate::common::RW,
5853 > {
5854 crate::common::RegisterField::<
5855 21,
5856 0x1,
5857 1,
5858 0,
5859 gtdnsr::Dselcf,
5860 gtdnsr::Dselcf,
5861 Gtdnsr_SPEC,
5862 crate::common::RW,
5863 >::from_register(self, 0)
5864 }
5865
5866 #[doc = "ELC_GPTE Event Source Counter Count Down Enable"]
5867 #[inline(always)]
5868 pub fn dselce(
5869 self,
5870 ) -> crate::common::RegisterField<
5871 20,
5872 0x1,
5873 1,
5874 0,
5875 gtdnsr::Dselce,
5876 gtdnsr::Dselce,
5877 Gtdnsr_SPEC,
5878 crate::common::RW,
5879 > {
5880 crate::common::RegisterField::<
5881 20,
5882 0x1,
5883 1,
5884 0,
5885 gtdnsr::Dselce,
5886 gtdnsr::Dselce,
5887 Gtdnsr_SPEC,
5888 crate::common::RW,
5889 >::from_register(self, 0)
5890 }
5891
5892 #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
5893 #[inline(always)]
5894 pub fn dselcd(
5895 self,
5896 ) -> crate::common::RegisterField<
5897 19,
5898 0x1,
5899 1,
5900 0,
5901 gtdnsr::Dselcd,
5902 gtdnsr::Dselcd,
5903 Gtdnsr_SPEC,
5904 crate::common::RW,
5905 > {
5906 crate::common::RegisterField::<
5907 19,
5908 0x1,
5909 1,
5910 0,
5911 gtdnsr::Dselcd,
5912 gtdnsr::Dselcd,
5913 Gtdnsr_SPEC,
5914 crate::common::RW,
5915 >::from_register(self, 0)
5916 }
5917
5918 #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
5919 #[inline(always)]
5920 pub fn dselcc(
5921 self,
5922 ) -> crate::common::RegisterField<
5923 18,
5924 0x1,
5925 1,
5926 0,
5927 gtdnsr::Dselcc,
5928 gtdnsr::Dselcc,
5929 Gtdnsr_SPEC,
5930 crate::common::RW,
5931 > {
5932 crate::common::RegisterField::<
5933 18,
5934 0x1,
5935 1,
5936 0,
5937 gtdnsr::Dselcc,
5938 gtdnsr::Dselcc,
5939 Gtdnsr_SPEC,
5940 crate::common::RW,
5941 >::from_register(self, 0)
5942 }
5943
5944 #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
5945 #[inline(always)]
5946 pub fn dselcb(
5947 self,
5948 ) -> crate::common::RegisterField<
5949 17,
5950 0x1,
5951 1,
5952 0,
5953 gtdnsr::Dselcb,
5954 gtdnsr::Dselcb,
5955 Gtdnsr_SPEC,
5956 crate::common::RW,
5957 > {
5958 crate::common::RegisterField::<
5959 17,
5960 0x1,
5961 1,
5962 0,
5963 gtdnsr::Dselcb,
5964 gtdnsr::Dselcb,
5965 Gtdnsr_SPEC,
5966 crate::common::RW,
5967 >::from_register(self, 0)
5968 }
5969
5970 #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
5971 #[inline(always)]
5972 pub fn dselca(
5973 self,
5974 ) -> crate::common::RegisterField<
5975 16,
5976 0x1,
5977 1,
5978 0,
5979 gtdnsr::Dselca,
5980 gtdnsr::Dselca,
5981 Gtdnsr_SPEC,
5982 crate::common::RW,
5983 > {
5984 crate::common::RegisterField::<
5985 16,
5986 0x1,
5987 1,
5988 0,
5989 gtdnsr::Dselca,
5990 gtdnsr::Dselca,
5991 Gtdnsr_SPEC,
5992 crate::common::RW,
5993 >::from_register(self, 0)
5994 }
5995
5996 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable"]
5997 #[inline(always)]
5998 pub fn dscbfah(
5999 self,
6000 ) -> crate::common::RegisterField<
6001 15,
6002 0x1,
6003 1,
6004 0,
6005 gtdnsr::Dscbfah,
6006 gtdnsr::Dscbfah,
6007 Gtdnsr_SPEC,
6008 crate::common::RW,
6009 > {
6010 crate::common::RegisterField::<
6011 15,
6012 0x1,
6013 1,
6014 0,
6015 gtdnsr::Dscbfah,
6016 gtdnsr::Dscbfah,
6017 Gtdnsr_SPEC,
6018 crate::common::RW,
6019 >::from_register(self, 0)
6020 }
6021
6022 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable"]
6023 #[inline(always)]
6024 pub fn dscbfal(
6025 self,
6026 ) -> crate::common::RegisterField<
6027 14,
6028 0x1,
6029 1,
6030 0,
6031 gtdnsr::Dscbfal,
6032 gtdnsr::Dscbfal,
6033 Gtdnsr_SPEC,
6034 crate::common::RW,
6035 > {
6036 crate::common::RegisterField::<
6037 14,
6038 0x1,
6039 1,
6040 0,
6041 gtdnsr::Dscbfal,
6042 gtdnsr::Dscbfal,
6043 Gtdnsr_SPEC,
6044 crate::common::RW,
6045 >::from_register(self, 0)
6046 }
6047
6048 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable"]
6049 #[inline(always)]
6050 pub fn dscbrah(
6051 self,
6052 ) -> crate::common::RegisterField<
6053 13,
6054 0x1,
6055 1,
6056 0,
6057 gtdnsr::Dscbrah,
6058 gtdnsr::Dscbrah,
6059 Gtdnsr_SPEC,
6060 crate::common::RW,
6061 > {
6062 crate::common::RegisterField::<
6063 13,
6064 0x1,
6065 1,
6066 0,
6067 gtdnsr::Dscbrah,
6068 gtdnsr::Dscbrah,
6069 Gtdnsr_SPEC,
6070 crate::common::RW,
6071 >::from_register(self, 0)
6072 }
6073
6074 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable"]
6075 #[inline(always)]
6076 pub fn dscbral(
6077 self,
6078 ) -> crate::common::RegisterField<
6079 12,
6080 0x1,
6081 1,
6082 0,
6083 gtdnsr::Dscbral,
6084 gtdnsr::Dscbral,
6085 Gtdnsr_SPEC,
6086 crate::common::RW,
6087 > {
6088 crate::common::RegisterField::<
6089 12,
6090 0x1,
6091 1,
6092 0,
6093 gtdnsr::Dscbral,
6094 gtdnsr::Dscbral,
6095 Gtdnsr_SPEC,
6096 crate::common::RW,
6097 >::from_register(self, 0)
6098 }
6099
6100 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable"]
6101 #[inline(always)]
6102 pub fn dscafbh(
6103 self,
6104 ) -> crate::common::RegisterField<
6105 11,
6106 0x1,
6107 1,
6108 0,
6109 gtdnsr::Dscafbh,
6110 gtdnsr::Dscafbh,
6111 Gtdnsr_SPEC,
6112 crate::common::RW,
6113 > {
6114 crate::common::RegisterField::<
6115 11,
6116 0x1,
6117 1,
6118 0,
6119 gtdnsr::Dscafbh,
6120 gtdnsr::Dscafbh,
6121 Gtdnsr_SPEC,
6122 crate::common::RW,
6123 >::from_register(self, 0)
6124 }
6125
6126 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable"]
6127 #[inline(always)]
6128 pub fn dscafbl(
6129 self,
6130 ) -> crate::common::RegisterField<
6131 10,
6132 0x1,
6133 1,
6134 0,
6135 gtdnsr::Dscafbl,
6136 gtdnsr::Dscafbl,
6137 Gtdnsr_SPEC,
6138 crate::common::RW,
6139 > {
6140 crate::common::RegisterField::<
6141 10,
6142 0x1,
6143 1,
6144 0,
6145 gtdnsr::Dscafbl,
6146 gtdnsr::Dscafbl,
6147 Gtdnsr_SPEC,
6148 crate::common::RW,
6149 >::from_register(self, 0)
6150 }
6151
6152 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable"]
6153 #[inline(always)]
6154 pub fn dscarbh(
6155 self,
6156 ) -> crate::common::RegisterField<
6157 9,
6158 0x1,
6159 1,
6160 0,
6161 gtdnsr::Dscarbh,
6162 gtdnsr::Dscarbh,
6163 Gtdnsr_SPEC,
6164 crate::common::RW,
6165 > {
6166 crate::common::RegisterField::<
6167 9,
6168 0x1,
6169 1,
6170 0,
6171 gtdnsr::Dscarbh,
6172 gtdnsr::Dscarbh,
6173 Gtdnsr_SPEC,
6174 crate::common::RW,
6175 >::from_register(self, 0)
6176 }
6177
6178 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable"]
6179 #[inline(always)]
6180 pub fn dscarbl(
6181 self,
6182 ) -> crate::common::RegisterField<
6183 8,
6184 0x1,
6185 1,
6186 0,
6187 gtdnsr::Dscarbl,
6188 gtdnsr::Dscarbl,
6189 Gtdnsr_SPEC,
6190 crate::common::RW,
6191 > {
6192 crate::common::RegisterField::<
6193 8,
6194 0x1,
6195 1,
6196 0,
6197 gtdnsr::Dscarbl,
6198 gtdnsr::Dscarbl,
6199 Gtdnsr_SPEC,
6200 crate::common::RW,
6201 >::from_register(self, 0)
6202 }
6203
6204 #[doc = "GTETRGD Pin Falling Input Source Counter Count Down Enable"]
6205 #[inline(always)]
6206 pub fn dsgtrgdf(
6207 self,
6208 ) -> crate::common::RegisterField<
6209 7,
6210 0x1,
6211 1,
6212 0,
6213 gtdnsr::Dsgtrgdf,
6214 gtdnsr::Dsgtrgdf,
6215 Gtdnsr_SPEC,
6216 crate::common::RW,
6217 > {
6218 crate::common::RegisterField::<
6219 7,
6220 0x1,
6221 1,
6222 0,
6223 gtdnsr::Dsgtrgdf,
6224 gtdnsr::Dsgtrgdf,
6225 Gtdnsr_SPEC,
6226 crate::common::RW,
6227 >::from_register(self, 0)
6228 }
6229
6230 #[doc = "GTETRGD Pin Rising Input Source Counter Count Down Enable"]
6231 #[inline(always)]
6232 pub fn dsgtrgdr(
6233 self,
6234 ) -> crate::common::RegisterField<
6235 6,
6236 0x1,
6237 1,
6238 0,
6239 gtdnsr::Dsgtrgdr,
6240 gtdnsr::Dsgtrgdr,
6241 Gtdnsr_SPEC,
6242 crate::common::RW,
6243 > {
6244 crate::common::RegisterField::<
6245 6,
6246 0x1,
6247 1,
6248 0,
6249 gtdnsr::Dsgtrgdr,
6250 gtdnsr::Dsgtrgdr,
6251 Gtdnsr_SPEC,
6252 crate::common::RW,
6253 >::from_register(self, 0)
6254 }
6255
6256 #[doc = "GTETRGC Pin Falling Input Source Counter Count Down Enable"]
6257 #[inline(always)]
6258 pub fn dsgtrgcf(
6259 self,
6260 ) -> crate::common::RegisterField<
6261 5,
6262 0x1,
6263 1,
6264 0,
6265 gtdnsr::Dsgtrgcf,
6266 gtdnsr::Dsgtrgcf,
6267 Gtdnsr_SPEC,
6268 crate::common::RW,
6269 > {
6270 crate::common::RegisterField::<
6271 5,
6272 0x1,
6273 1,
6274 0,
6275 gtdnsr::Dsgtrgcf,
6276 gtdnsr::Dsgtrgcf,
6277 Gtdnsr_SPEC,
6278 crate::common::RW,
6279 >::from_register(self, 0)
6280 }
6281
6282 #[doc = "GTETRGC Pin Rising Input Source Counter Count Down Enable"]
6283 #[inline(always)]
6284 pub fn dsgtrgcr(
6285 self,
6286 ) -> crate::common::RegisterField<
6287 4,
6288 0x1,
6289 1,
6290 0,
6291 gtdnsr::Dsgtrgcr,
6292 gtdnsr::Dsgtrgcr,
6293 Gtdnsr_SPEC,
6294 crate::common::RW,
6295 > {
6296 crate::common::RegisterField::<
6297 4,
6298 0x1,
6299 1,
6300 0,
6301 gtdnsr::Dsgtrgcr,
6302 gtdnsr::Dsgtrgcr,
6303 Gtdnsr_SPEC,
6304 crate::common::RW,
6305 >::from_register(self, 0)
6306 }
6307
6308 #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
6309 #[inline(always)]
6310 pub fn dsgtrgbf(
6311 self,
6312 ) -> crate::common::RegisterField<
6313 3,
6314 0x1,
6315 1,
6316 0,
6317 gtdnsr::Dsgtrgbf,
6318 gtdnsr::Dsgtrgbf,
6319 Gtdnsr_SPEC,
6320 crate::common::RW,
6321 > {
6322 crate::common::RegisterField::<
6323 3,
6324 0x1,
6325 1,
6326 0,
6327 gtdnsr::Dsgtrgbf,
6328 gtdnsr::Dsgtrgbf,
6329 Gtdnsr_SPEC,
6330 crate::common::RW,
6331 >::from_register(self, 0)
6332 }
6333
6334 #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
6335 #[inline(always)]
6336 pub fn dsgtrgbr(
6337 self,
6338 ) -> crate::common::RegisterField<
6339 2,
6340 0x1,
6341 1,
6342 0,
6343 gtdnsr::Dsgtrgbr,
6344 gtdnsr::Dsgtrgbr,
6345 Gtdnsr_SPEC,
6346 crate::common::RW,
6347 > {
6348 crate::common::RegisterField::<
6349 2,
6350 0x1,
6351 1,
6352 0,
6353 gtdnsr::Dsgtrgbr,
6354 gtdnsr::Dsgtrgbr,
6355 Gtdnsr_SPEC,
6356 crate::common::RW,
6357 >::from_register(self, 0)
6358 }
6359
6360 #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
6361 #[inline(always)]
6362 pub fn dsgtrgaf(
6363 self,
6364 ) -> crate::common::RegisterField<
6365 1,
6366 0x1,
6367 1,
6368 0,
6369 gtdnsr::Dsgtrgaf,
6370 gtdnsr::Dsgtrgaf,
6371 Gtdnsr_SPEC,
6372 crate::common::RW,
6373 > {
6374 crate::common::RegisterField::<
6375 1,
6376 0x1,
6377 1,
6378 0,
6379 gtdnsr::Dsgtrgaf,
6380 gtdnsr::Dsgtrgaf,
6381 Gtdnsr_SPEC,
6382 crate::common::RW,
6383 >::from_register(self, 0)
6384 }
6385
6386 #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
6387 #[inline(always)]
6388 pub fn dsgtrgar(
6389 self,
6390 ) -> crate::common::RegisterField<
6391 0,
6392 0x1,
6393 1,
6394 0,
6395 gtdnsr::Dsgtrgar,
6396 gtdnsr::Dsgtrgar,
6397 Gtdnsr_SPEC,
6398 crate::common::RW,
6399 > {
6400 crate::common::RegisterField::<
6401 0,
6402 0x1,
6403 1,
6404 0,
6405 gtdnsr::Dsgtrgar,
6406 gtdnsr::Dsgtrgar,
6407 Gtdnsr_SPEC,
6408 crate::common::RW,
6409 >::from_register(self, 0)
6410 }
6411}
6412impl ::core::default::Default for Gtdnsr {
6413 #[inline(always)]
6414 fn default() -> Gtdnsr {
6415 <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
6416 }
6417}
6418pub mod gtdnsr {
6419
6420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6421 pub struct Dselch_SPEC;
6422 pub type Dselch = crate::EnumBitfieldStruct<u8, Dselch_SPEC>;
6423 impl Dselch {
6424 #[doc = "Disable counter count down on ELC_GPTH input"]
6425 pub const _0: Self = Self::new(0);
6426
6427 #[doc = "Enable counter count down on ELC_GPTH input."]
6428 pub const _1: Self = Self::new(1);
6429 }
6430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6431 pub struct Dselcg_SPEC;
6432 pub type Dselcg = crate::EnumBitfieldStruct<u8, Dselcg_SPEC>;
6433 impl Dselcg {
6434 #[doc = "Disable counter count down on ELC_GPTG input"]
6435 pub const _0: Self = Self::new(0);
6436
6437 #[doc = "Enable counter count down on ELC_GPTG input."]
6438 pub const _1: Self = Self::new(1);
6439 }
6440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6441 pub struct Dselcf_SPEC;
6442 pub type Dselcf = crate::EnumBitfieldStruct<u8, Dselcf_SPEC>;
6443 impl Dselcf {
6444 #[doc = "Disable counter count down on ELC_GPTF input"]
6445 pub const _0: Self = Self::new(0);
6446
6447 #[doc = "Enable counter count down on ELC_GPTF input."]
6448 pub const _1: Self = Self::new(1);
6449 }
6450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6451 pub struct Dselce_SPEC;
6452 pub type Dselce = crate::EnumBitfieldStruct<u8, Dselce_SPEC>;
6453 impl Dselce {
6454 #[doc = "Disable counter count down on ELC_GPTE input"]
6455 pub const _0: Self = Self::new(0);
6456
6457 #[doc = "Enable counter count down on ELC_GPTE input."]
6458 pub const _1: Self = Self::new(1);
6459 }
6460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6461 pub struct Dselcd_SPEC;
6462 pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
6463 impl Dselcd {
6464 #[doc = "Disable counter count down on ELC_GPTD input"]
6465 pub const _0: Self = Self::new(0);
6466
6467 #[doc = "Enable counter count down on ELC_GPTD input."]
6468 pub const _1: Self = Self::new(1);
6469 }
6470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6471 pub struct Dselcc_SPEC;
6472 pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
6473 impl Dselcc {
6474 #[doc = "Disable counter count down on ELC_GPTC input"]
6475 pub const _0: Self = Self::new(0);
6476
6477 #[doc = "Enable counter count down on ELC_GPTC input."]
6478 pub const _1: Self = Self::new(1);
6479 }
6480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6481 pub struct Dselcb_SPEC;
6482 pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
6483 impl Dselcb {
6484 #[doc = "Disable counter count down on ELC_GPTB input"]
6485 pub const _0: Self = Self::new(0);
6486
6487 #[doc = "Enable counter count down on ELC_GPTB input."]
6488 pub const _1: Self = Self::new(1);
6489 }
6490 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6491 pub struct Dselca_SPEC;
6492 pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
6493 impl Dselca {
6494 #[doc = "Disable counter count down on ELC_GPTA input"]
6495 pub const _0: Self = Self::new(0);
6496
6497 #[doc = "Enable counter count down on ELC_GPTA input."]
6498 pub const _1: Self = Self::new(1);
6499 }
6500 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6501 pub struct Dscbfah_SPEC;
6502 pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
6503 impl Dscbfah {
6504 #[doc = "Disable counter count down on the falling edge of GTIOCB input when GTIOCA input is 1"]
6505 pub const _0: Self = Self::new(0);
6506
6507 #[doc = "Enable counter count down on the falling edge of GTIOCB input when GTIOCA input is 1."]
6508 pub const _1: Self = Self::new(1);
6509 }
6510 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6511 pub struct Dscbfal_SPEC;
6512 pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
6513 impl Dscbfal {
6514 #[doc = "Disable counter count down on the falling edge of GTIOCB input when GTIOCA input is 0"]
6515 pub const _0: Self = Self::new(0);
6516
6517 #[doc = "Enable counter count down on the falling edge of GTIOCB input when GTIOCA input is 0."]
6518 pub const _1: Self = Self::new(1);
6519 }
6520 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6521 pub struct Dscbrah_SPEC;
6522 pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
6523 impl Dscbrah {
6524 #[doc = "Disable counter count down on the rising edge of GTIOCB input when GTIOCA input is 1"]
6525 pub const _0: Self = Self::new(0);
6526
6527 #[doc = "Enable counter count down on the rising edge of GTIOCB input when GTIOCA input is 1."]
6528 pub const _1: Self = Self::new(1);
6529 }
6530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6531 pub struct Dscbral_SPEC;
6532 pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
6533 impl Dscbral {
6534 #[doc = "Disable counter count down on the rising edge of GTIOCB input when GTIOCA input is 0"]
6535 pub const _0: Self = Self::new(0);
6536
6537 #[doc = "Enable counter count down on the rising edge of GTIOCB input when GTIOCA input is 0."]
6538 pub const _1: Self = Self::new(1);
6539 }
6540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6541 pub struct Dscafbh_SPEC;
6542 pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
6543 impl Dscafbh {
6544 #[doc = "Disable counter count down on the falling edge of GTIOCA input when GTIOCB input is 1"]
6545 pub const _0: Self = Self::new(0);
6546
6547 #[doc = "Enable counter count down on the falling edge of GTIOCA input when GTIOCB input is 1."]
6548 pub const _1: Self = Self::new(1);
6549 }
6550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6551 pub struct Dscafbl_SPEC;
6552 pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
6553 impl Dscafbl {
6554 #[doc = "Disable counter count down on the falling edge of GTIOCA input when GTIOCB input is 0"]
6555 pub const _0: Self = Self::new(0);
6556
6557 #[doc = "Enable counter count down on the falling edge of GTIOCA input when GTIOCB input is 0"]
6558 pub const _1: Self = Self::new(1);
6559 }
6560 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6561 pub struct Dscarbh_SPEC;
6562 pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
6563 impl Dscarbh {
6564 #[doc = "Disable counter count down on the rising edge of GTIOCA input when GTIOCB input is 1"]
6565 pub const _0: Self = Self::new(0);
6566
6567 #[doc = "Enable counter count down on the rising edge of GTIOCA input when GTIOCB input is 1."]
6568 pub const _1: Self = Self::new(1);
6569 }
6570 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6571 pub struct Dscarbl_SPEC;
6572 pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
6573 impl Dscarbl {
6574 #[doc = "Disable counter count down on the rising edge of GTIOCA input when GTIOCB input is 0"]
6575 pub const _0: Self = Self::new(0);
6576
6577 #[doc = "Enable counter count down on the rising edge of GTIOCA input when GTIOCB input is 0."]
6578 pub const _1: Self = Self::new(1);
6579 }
6580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6581 pub struct Dsgtrgdf_SPEC;
6582 pub type Dsgtrgdf = crate::EnumBitfieldStruct<u8, Dsgtrgdf_SPEC>;
6583 impl Dsgtrgdf {
6584 #[doc = "Disable counter count down on the falling edge of GTETRGD input"]
6585 pub const _0: Self = Self::new(0);
6586
6587 #[doc = "Enable counter count down on the falling edge of GTETRGD input."]
6588 pub const _1: Self = Self::new(1);
6589 }
6590 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6591 pub struct Dsgtrgdr_SPEC;
6592 pub type Dsgtrgdr = crate::EnumBitfieldStruct<u8, Dsgtrgdr_SPEC>;
6593 impl Dsgtrgdr {
6594 #[doc = "Disable counter count down on the rising edge of GTETRGD input"]
6595 pub const _0: Self = Self::new(0);
6596
6597 #[doc = "Enable counter count down on the rising edge of GTETRGD input."]
6598 pub const _1: Self = Self::new(1);
6599 }
6600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6601 pub struct Dsgtrgcf_SPEC;
6602 pub type Dsgtrgcf = crate::EnumBitfieldStruct<u8, Dsgtrgcf_SPEC>;
6603 impl Dsgtrgcf {
6604 #[doc = "Disable counter count down on the falling edge of GTETRGC input"]
6605 pub const _0: Self = Self::new(0);
6606
6607 #[doc = "Enable counter count down on the falling edge of GTETRGC input."]
6608 pub const _1: Self = Self::new(1);
6609 }
6610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6611 pub struct Dsgtrgcr_SPEC;
6612 pub type Dsgtrgcr = crate::EnumBitfieldStruct<u8, Dsgtrgcr_SPEC>;
6613 impl Dsgtrgcr {
6614 #[doc = "Disable counter count down on the rising edge of GTETRGC input"]
6615 pub const _0: Self = Self::new(0);
6616
6617 #[doc = "Enable counter count down on the rising edge of GTETRGC input"]
6618 pub const _1: Self = Self::new(1);
6619 }
6620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6621 pub struct Dsgtrgbf_SPEC;
6622 pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
6623 impl Dsgtrgbf {
6624 #[doc = "Disable counter count down on the falling edge of GTETRGB input"]
6625 pub const _0: Self = Self::new(0);
6626
6627 #[doc = "Enable counter count down on the falling edge of GTETRGB input."]
6628 pub const _1: Self = Self::new(1);
6629 }
6630 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6631 pub struct Dsgtrgbr_SPEC;
6632 pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
6633 impl Dsgtrgbr {
6634 #[doc = "Disable counter count down on the rising edge of GTETRGB input"]
6635 pub const _0: Self = Self::new(0);
6636
6637 #[doc = "Enable counter count down on the rising edge of GTETRGB input."]
6638 pub const _1: Self = Self::new(1);
6639 }
6640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6641 pub struct Dsgtrgaf_SPEC;
6642 pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
6643 impl Dsgtrgaf {
6644 #[doc = "Disable counter count down on the falling edge of GTETRGA input"]
6645 pub const _0: Self = Self::new(0);
6646
6647 #[doc = "Enable counter count down on the falling edge of GTETRGA input."]
6648 pub const _1: Self = Self::new(1);
6649 }
6650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6651 pub struct Dsgtrgar_SPEC;
6652 pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
6653 impl Dsgtrgar {
6654 #[doc = "Disable counter count down on the rising edge of GTETRGA input"]
6655 pub const _0: Self = Self::new(0);
6656
6657 #[doc = "Enable counter count down on the rising edge of GTETRGA input"]
6658 pub const _1: Self = Self::new(1);
6659 }
6660}
6661#[doc(hidden)]
6662#[derive(Copy, Clone, Eq, PartialEq)]
6663pub struct Gticasr_SPEC;
6664impl crate::sealed::RegSpec for Gticasr_SPEC {
6665 type DataType = u32;
6666}
6667
6668#[doc = "General PWM Timer Input Capture Source Select Register A"]
6669pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
6670
6671impl Gticasr {
6672 #[doc = "ELC_GPTH Event Source GTCCRA Input Capture Enable"]
6673 #[inline(always)]
6674 pub fn aselch(
6675 self,
6676 ) -> crate::common::RegisterField<
6677 23,
6678 0x1,
6679 1,
6680 0,
6681 gticasr::Aselch,
6682 gticasr::Aselch,
6683 Gticasr_SPEC,
6684 crate::common::RW,
6685 > {
6686 crate::common::RegisterField::<
6687 23,
6688 0x1,
6689 1,
6690 0,
6691 gticasr::Aselch,
6692 gticasr::Aselch,
6693 Gticasr_SPEC,
6694 crate::common::RW,
6695 >::from_register(self, 0)
6696 }
6697
6698 #[doc = "ELC_GPTG Event Source GTCCRA Input Capture Enable"]
6699 #[inline(always)]
6700 pub fn aselcg(
6701 self,
6702 ) -> crate::common::RegisterField<
6703 22,
6704 0x1,
6705 1,
6706 0,
6707 gticasr::Aselcg,
6708 gticasr::Aselcg,
6709 Gticasr_SPEC,
6710 crate::common::RW,
6711 > {
6712 crate::common::RegisterField::<
6713 22,
6714 0x1,
6715 1,
6716 0,
6717 gticasr::Aselcg,
6718 gticasr::Aselcg,
6719 Gticasr_SPEC,
6720 crate::common::RW,
6721 >::from_register(self, 0)
6722 }
6723
6724 #[doc = "ELC_GPTF Event Source GTCCRA Input Capture Enable"]
6725 #[inline(always)]
6726 pub fn aselcf(
6727 self,
6728 ) -> crate::common::RegisterField<
6729 21,
6730 0x1,
6731 1,
6732 0,
6733 gticasr::Aselcf,
6734 gticasr::Aselcf,
6735 Gticasr_SPEC,
6736 crate::common::RW,
6737 > {
6738 crate::common::RegisterField::<
6739 21,
6740 0x1,
6741 1,
6742 0,
6743 gticasr::Aselcf,
6744 gticasr::Aselcf,
6745 Gticasr_SPEC,
6746 crate::common::RW,
6747 >::from_register(self, 0)
6748 }
6749
6750 #[doc = "ELC_GPTE Event Source GTCCRA Input Capture Enable"]
6751 #[inline(always)]
6752 pub fn aselce(
6753 self,
6754 ) -> crate::common::RegisterField<
6755 20,
6756 0x1,
6757 1,
6758 0,
6759 gticasr::Aselce,
6760 gticasr::Aselce,
6761 Gticasr_SPEC,
6762 crate::common::RW,
6763 > {
6764 crate::common::RegisterField::<
6765 20,
6766 0x1,
6767 1,
6768 0,
6769 gticasr::Aselce,
6770 gticasr::Aselce,
6771 Gticasr_SPEC,
6772 crate::common::RW,
6773 >::from_register(self, 0)
6774 }
6775
6776 #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
6777 #[inline(always)]
6778 pub fn aselcd(
6779 self,
6780 ) -> crate::common::RegisterField<
6781 19,
6782 0x1,
6783 1,
6784 0,
6785 gticasr::Aselcd,
6786 gticasr::Aselcd,
6787 Gticasr_SPEC,
6788 crate::common::RW,
6789 > {
6790 crate::common::RegisterField::<
6791 19,
6792 0x1,
6793 1,
6794 0,
6795 gticasr::Aselcd,
6796 gticasr::Aselcd,
6797 Gticasr_SPEC,
6798 crate::common::RW,
6799 >::from_register(self, 0)
6800 }
6801
6802 #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
6803 #[inline(always)]
6804 pub fn aselcc(
6805 self,
6806 ) -> crate::common::RegisterField<
6807 18,
6808 0x1,
6809 1,
6810 0,
6811 gticasr::Aselcc,
6812 gticasr::Aselcc,
6813 Gticasr_SPEC,
6814 crate::common::RW,
6815 > {
6816 crate::common::RegisterField::<
6817 18,
6818 0x1,
6819 1,
6820 0,
6821 gticasr::Aselcc,
6822 gticasr::Aselcc,
6823 Gticasr_SPEC,
6824 crate::common::RW,
6825 >::from_register(self, 0)
6826 }
6827
6828 #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
6829 #[inline(always)]
6830 pub fn aselcb(
6831 self,
6832 ) -> crate::common::RegisterField<
6833 17,
6834 0x1,
6835 1,
6836 0,
6837 gticasr::Aselcb,
6838 gticasr::Aselcb,
6839 Gticasr_SPEC,
6840 crate::common::RW,
6841 > {
6842 crate::common::RegisterField::<
6843 17,
6844 0x1,
6845 1,
6846 0,
6847 gticasr::Aselcb,
6848 gticasr::Aselcb,
6849 Gticasr_SPEC,
6850 crate::common::RW,
6851 >::from_register(self, 0)
6852 }
6853
6854 #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
6855 #[inline(always)]
6856 pub fn aselca(
6857 self,
6858 ) -> crate::common::RegisterField<
6859 16,
6860 0x1,
6861 1,
6862 0,
6863 gticasr::Aselca,
6864 gticasr::Aselca,
6865 Gticasr_SPEC,
6866 crate::common::RW,
6867 > {
6868 crate::common::RegisterField::<
6869 16,
6870 0x1,
6871 1,
6872 0,
6873 gticasr::Aselca,
6874 gticasr::Aselca,
6875 Gticasr_SPEC,
6876 crate::common::RW,
6877 >::from_register(self, 0)
6878 }
6879
6880 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable"]
6881 #[inline(always)]
6882 pub fn ascbfah(
6883 self,
6884 ) -> crate::common::RegisterField<
6885 15,
6886 0x1,
6887 1,
6888 0,
6889 gticasr::Ascbfah,
6890 gticasr::Ascbfah,
6891 Gticasr_SPEC,
6892 crate::common::RW,
6893 > {
6894 crate::common::RegisterField::<
6895 15,
6896 0x1,
6897 1,
6898 0,
6899 gticasr::Ascbfah,
6900 gticasr::Ascbfah,
6901 Gticasr_SPEC,
6902 crate::common::RW,
6903 >::from_register(self, 0)
6904 }
6905
6906 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable"]
6907 #[inline(always)]
6908 pub fn ascbfal(
6909 self,
6910 ) -> crate::common::RegisterField<
6911 14,
6912 0x1,
6913 1,
6914 0,
6915 gticasr::Ascbfal,
6916 gticasr::Ascbfal,
6917 Gticasr_SPEC,
6918 crate::common::RW,
6919 > {
6920 crate::common::RegisterField::<
6921 14,
6922 0x1,
6923 1,
6924 0,
6925 gticasr::Ascbfal,
6926 gticasr::Ascbfal,
6927 Gticasr_SPEC,
6928 crate::common::RW,
6929 >::from_register(self, 0)
6930 }
6931
6932 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable"]
6933 #[inline(always)]
6934 pub fn ascbrah(
6935 self,
6936 ) -> crate::common::RegisterField<
6937 13,
6938 0x1,
6939 1,
6940 0,
6941 gticasr::Ascbrah,
6942 gticasr::Ascbrah,
6943 Gticasr_SPEC,
6944 crate::common::RW,
6945 > {
6946 crate::common::RegisterField::<
6947 13,
6948 0x1,
6949 1,
6950 0,
6951 gticasr::Ascbrah,
6952 gticasr::Ascbrah,
6953 Gticasr_SPEC,
6954 crate::common::RW,
6955 >::from_register(self, 0)
6956 }
6957
6958 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable"]
6959 #[inline(always)]
6960 pub fn ascbral(
6961 self,
6962 ) -> crate::common::RegisterField<
6963 12,
6964 0x1,
6965 1,
6966 0,
6967 gticasr::Ascbral,
6968 gticasr::Ascbral,
6969 Gticasr_SPEC,
6970 crate::common::RW,
6971 > {
6972 crate::common::RegisterField::<
6973 12,
6974 0x1,
6975 1,
6976 0,
6977 gticasr::Ascbral,
6978 gticasr::Ascbral,
6979 Gticasr_SPEC,
6980 crate::common::RW,
6981 >::from_register(self, 0)
6982 }
6983
6984 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable"]
6985 #[inline(always)]
6986 pub fn ascafbh(
6987 self,
6988 ) -> crate::common::RegisterField<
6989 11,
6990 0x1,
6991 1,
6992 0,
6993 gticasr::Ascafbh,
6994 gticasr::Ascafbh,
6995 Gticasr_SPEC,
6996 crate::common::RW,
6997 > {
6998 crate::common::RegisterField::<
6999 11,
7000 0x1,
7001 1,
7002 0,
7003 gticasr::Ascafbh,
7004 gticasr::Ascafbh,
7005 Gticasr_SPEC,
7006 crate::common::RW,
7007 >::from_register(self, 0)
7008 }
7009
7010 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable"]
7011 #[inline(always)]
7012 pub fn ascafbl(
7013 self,
7014 ) -> crate::common::RegisterField<
7015 10,
7016 0x1,
7017 1,
7018 0,
7019 gticasr::Ascafbl,
7020 gticasr::Ascafbl,
7021 Gticasr_SPEC,
7022 crate::common::RW,
7023 > {
7024 crate::common::RegisterField::<
7025 10,
7026 0x1,
7027 1,
7028 0,
7029 gticasr::Ascafbl,
7030 gticasr::Ascafbl,
7031 Gticasr_SPEC,
7032 crate::common::RW,
7033 >::from_register(self, 0)
7034 }
7035
7036 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable"]
7037 #[inline(always)]
7038 pub fn ascarbh(
7039 self,
7040 ) -> crate::common::RegisterField<
7041 9,
7042 0x1,
7043 1,
7044 0,
7045 gticasr::Ascarbh,
7046 gticasr::Ascarbh,
7047 Gticasr_SPEC,
7048 crate::common::RW,
7049 > {
7050 crate::common::RegisterField::<
7051 9,
7052 0x1,
7053 1,
7054 0,
7055 gticasr::Ascarbh,
7056 gticasr::Ascarbh,
7057 Gticasr_SPEC,
7058 crate::common::RW,
7059 >::from_register(self, 0)
7060 }
7061
7062 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable"]
7063 #[inline(always)]
7064 pub fn ascarbl(
7065 self,
7066 ) -> crate::common::RegisterField<
7067 8,
7068 0x1,
7069 1,
7070 0,
7071 gticasr::Ascarbl,
7072 gticasr::Ascarbl,
7073 Gticasr_SPEC,
7074 crate::common::RW,
7075 > {
7076 crate::common::RegisterField::<
7077 8,
7078 0x1,
7079 1,
7080 0,
7081 gticasr::Ascarbl,
7082 gticasr::Ascarbl,
7083 Gticasr_SPEC,
7084 crate::common::RW,
7085 >::from_register(self, 0)
7086 }
7087
7088 #[doc = "GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable"]
7089 #[inline(always)]
7090 pub fn asgtrgdf(
7091 self,
7092 ) -> crate::common::RegisterField<
7093 7,
7094 0x1,
7095 1,
7096 0,
7097 gticasr::Asgtrgdf,
7098 gticasr::Asgtrgdf,
7099 Gticasr_SPEC,
7100 crate::common::RW,
7101 > {
7102 crate::common::RegisterField::<
7103 7,
7104 0x1,
7105 1,
7106 0,
7107 gticasr::Asgtrgdf,
7108 gticasr::Asgtrgdf,
7109 Gticasr_SPEC,
7110 crate::common::RW,
7111 >::from_register(self, 0)
7112 }
7113
7114 #[doc = "GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable"]
7115 #[inline(always)]
7116 pub fn asgtrgdr(
7117 self,
7118 ) -> crate::common::RegisterField<
7119 6,
7120 0x1,
7121 1,
7122 0,
7123 gticasr::Asgtrgdr,
7124 gticasr::Asgtrgdr,
7125 Gticasr_SPEC,
7126 crate::common::RW,
7127 > {
7128 crate::common::RegisterField::<
7129 6,
7130 0x1,
7131 1,
7132 0,
7133 gticasr::Asgtrgdr,
7134 gticasr::Asgtrgdr,
7135 Gticasr_SPEC,
7136 crate::common::RW,
7137 >::from_register(self, 0)
7138 }
7139
7140 #[doc = "GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable"]
7141 #[inline(always)]
7142 pub fn asgtrgcf(
7143 self,
7144 ) -> crate::common::RegisterField<
7145 5,
7146 0x1,
7147 1,
7148 0,
7149 gticasr::Asgtrgcf,
7150 gticasr::Asgtrgcf,
7151 Gticasr_SPEC,
7152 crate::common::RW,
7153 > {
7154 crate::common::RegisterField::<
7155 5,
7156 0x1,
7157 1,
7158 0,
7159 gticasr::Asgtrgcf,
7160 gticasr::Asgtrgcf,
7161 Gticasr_SPEC,
7162 crate::common::RW,
7163 >::from_register(self, 0)
7164 }
7165
7166 #[doc = "GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable"]
7167 #[inline(always)]
7168 pub fn asgtrgcr(
7169 self,
7170 ) -> crate::common::RegisterField<
7171 4,
7172 0x1,
7173 1,
7174 0,
7175 gticasr::Asgtrgcr,
7176 gticasr::Asgtrgcr,
7177 Gticasr_SPEC,
7178 crate::common::RW,
7179 > {
7180 crate::common::RegisterField::<
7181 4,
7182 0x1,
7183 1,
7184 0,
7185 gticasr::Asgtrgcr,
7186 gticasr::Asgtrgcr,
7187 Gticasr_SPEC,
7188 crate::common::RW,
7189 >::from_register(self, 0)
7190 }
7191
7192 #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
7193 #[inline(always)]
7194 pub fn asgtrgbf(
7195 self,
7196 ) -> crate::common::RegisterField<
7197 3,
7198 0x1,
7199 1,
7200 0,
7201 gticasr::Asgtrgbf,
7202 gticasr::Asgtrgbf,
7203 Gticasr_SPEC,
7204 crate::common::RW,
7205 > {
7206 crate::common::RegisterField::<
7207 3,
7208 0x1,
7209 1,
7210 0,
7211 gticasr::Asgtrgbf,
7212 gticasr::Asgtrgbf,
7213 Gticasr_SPEC,
7214 crate::common::RW,
7215 >::from_register(self, 0)
7216 }
7217
7218 #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
7219 #[inline(always)]
7220 pub fn asgtrgbr(
7221 self,
7222 ) -> crate::common::RegisterField<
7223 2,
7224 0x1,
7225 1,
7226 0,
7227 gticasr::Asgtrgbr,
7228 gticasr::Asgtrgbr,
7229 Gticasr_SPEC,
7230 crate::common::RW,
7231 > {
7232 crate::common::RegisterField::<
7233 2,
7234 0x1,
7235 1,
7236 0,
7237 gticasr::Asgtrgbr,
7238 gticasr::Asgtrgbr,
7239 Gticasr_SPEC,
7240 crate::common::RW,
7241 >::from_register(self, 0)
7242 }
7243
7244 #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
7245 #[inline(always)]
7246 pub fn asgtrgaf(
7247 self,
7248 ) -> crate::common::RegisterField<
7249 1,
7250 0x1,
7251 1,
7252 0,
7253 gticasr::Asgtrgaf,
7254 gticasr::Asgtrgaf,
7255 Gticasr_SPEC,
7256 crate::common::RW,
7257 > {
7258 crate::common::RegisterField::<
7259 1,
7260 0x1,
7261 1,
7262 0,
7263 gticasr::Asgtrgaf,
7264 gticasr::Asgtrgaf,
7265 Gticasr_SPEC,
7266 crate::common::RW,
7267 >::from_register(self, 0)
7268 }
7269
7270 #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
7271 #[inline(always)]
7272 pub fn asgtrgar(
7273 self,
7274 ) -> crate::common::RegisterField<
7275 0,
7276 0x1,
7277 1,
7278 0,
7279 gticasr::Asgtrgar,
7280 gticasr::Asgtrgar,
7281 Gticasr_SPEC,
7282 crate::common::RW,
7283 > {
7284 crate::common::RegisterField::<
7285 0,
7286 0x1,
7287 1,
7288 0,
7289 gticasr::Asgtrgar,
7290 gticasr::Asgtrgar,
7291 Gticasr_SPEC,
7292 crate::common::RW,
7293 >::from_register(self, 0)
7294 }
7295}
7296impl ::core::default::Default for Gticasr {
7297 #[inline(always)]
7298 fn default() -> Gticasr {
7299 <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
7300 }
7301}
7302pub mod gticasr {
7303
7304 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7305 pub struct Aselch_SPEC;
7306 pub type Aselch = crate::EnumBitfieldStruct<u8, Aselch_SPEC>;
7307 impl Aselch {
7308 #[doc = "Disable GTCCRA input capture on ELC_GPTH input"]
7309 pub const _0: Self = Self::new(0);
7310
7311 #[doc = "Enable GTCCRA input capture on ELC_GPTH input"]
7312 pub const _1: Self = Self::new(1);
7313 }
7314 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7315 pub struct Aselcg_SPEC;
7316 pub type Aselcg = crate::EnumBitfieldStruct<u8, Aselcg_SPEC>;
7317 impl Aselcg {
7318 #[doc = "Disable GTCCRA input capture on ELC_GPTG input"]
7319 pub const _0: Self = Self::new(0);
7320
7321 #[doc = "Enable GTCCRA input capture on ELC_GPTG input."]
7322 pub const _1: Self = Self::new(1);
7323 }
7324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7325 pub struct Aselcf_SPEC;
7326 pub type Aselcf = crate::EnumBitfieldStruct<u8, Aselcf_SPEC>;
7327 impl Aselcf {
7328 #[doc = "Disable GTCCRA input capture on ELC_GPTF input"]
7329 pub const _0: Self = Self::new(0);
7330
7331 #[doc = "Enable GTCCRA input capture on ELC_GPTF input."]
7332 pub const _1: Self = Self::new(1);
7333 }
7334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7335 pub struct Aselce_SPEC;
7336 pub type Aselce = crate::EnumBitfieldStruct<u8, Aselce_SPEC>;
7337 impl Aselce {
7338 #[doc = "Disable GTCCRA input capture on ELC_GPTE input"]
7339 pub const _0: Self = Self::new(0);
7340
7341 #[doc = "Enable GTCCRA input capture on ELC_GPTE input."]
7342 pub const _1: Self = Self::new(1);
7343 }
7344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7345 pub struct Aselcd_SPEC;
7346 pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
7347 impl Aselcd {
7348 #[doc = "Disable GTCCRA input capture on ELC_GPTD input"]
7349 pub const _0: Self = Self::new(0);
7350
7351 #[doc = "Enable GTCCRA input capture on ELC_GPTD input."]
7352 pub const _1: Self = Self::new(1);
7353 }
7354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7355 pub struct Aselcc_SPEC;
7356 pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
7357 impl Aselcc {
7358 #[doc = "Disable GTCCRA input capture on ELC_GPTC input"]
7359 pub const _0: Self = Self::new(0);
7360
7361 #[doc = "Enable GTCCRA input capture on ELC_GPTC input."]
7362 pub const _1: Self = Self::new(1);
7363 }
7364 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7365 pub struct Aselcb_SPEC;
7366 pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
7367 impl Aselcb {
7368 #[doc = "Disable GTCCRA input capture on ELC_GPTB input"]
7369 pub const _0: Self = Self::new(0);
7370
7371 #[doc = "Enable GTCCRA input capture on ELC_GPTB input"]
7372 pub const _1: Self = Self::new(1);
7373 }
7374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7375 pub struct Aselca_SPEC;
7376 pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
7377 impl Aselca {
7378 #[doc = "Disable GTCCRA input capture on ELC_GPTA input"]
7379 pub const _0: Self = Self::new(0);
7380
7381 #[doc = "Enable GTCCRA input capture on ELC_GPTA input."]
7382 pub const _1: Self = Self::new(1);
7383 }
7384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7385 pub struct Ascbfah_SPEC;
7386 pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
7387 impl Ascbfah {
7388 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 1"]
7389 pub const _0: Self = Self::new(0);
7390
7391 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 1."]
7392 pub const _1: Self = Self::new(1);
7393 }
7394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7395 pub struct Ascbfal_SPEC;
7396 pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
7397 impl Ascbfal {
7398 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 0"]
7399 pub const _0: Self = Self::new(0);
7400
7401 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 0."]
7402 pub const _1: Self = Self::new(1);
7403 }
7404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7405 pub struct Ascbrah_SPEC;
7406 pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
7407 impl Ascbrah {
7408 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 1"]
7409 pub const _0: Self = Self::new(0);
7410
7411 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 1."]
7412 pub const _1: Self = Self::new(1);
7413 }
7414 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7415 pub struct Ascbral_SPEC;
7416 pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
7417 impl Ascbral {
7418 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 0"]
7419 pub const _0: Self = Self::new(0);
7420
7421 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 0."]
7422 pub const _1: Self = Self::new(1);
7423 }
7424 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7425 pub struct Ascafbh_SPEC;
7426 pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
7427 impl Ascafbh {
7428 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 1"]
7429 pub const _0: Self = Self::new(0);
7430
7431 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 1."]
7432 pub const _1: Self = Self::new(1);
7433 }
7434 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7435 pub struct Ascafbl_SPEC;
7436 pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
7437 impl Ascafbl {
7438 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 0"]
7439 pub const _0: Self = Self::new(0);
7440
7441 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 0."]
7442 pub const _1: Self = Self::new(1);
7443 }
7444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7445 pub struct Ascarbh_SPEC;
7446 pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
7447 impl Ascarbh {
7448 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 1"]
7449 pub const _0: Self = Self::new(0);
7450
7451 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 1."]
7452 pub const _1: Self = Self::new(1);
7453 }
7454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7455 pub struct Ascarbl_SPEC;
7456 pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
7457 impl Ascarbl {
7458 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 0"]
7459 pub const _0: Self = Self::new(0);
7460
7461 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 0."]
7462 pub const _1: Self = Self::new(1);
7463 }
7464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7465 pub struct Asgtrgdf_SPEC;
7466 pub type Asgtrgdf = crate::EnumBitfieldStruct<u8, Asgtrgdf_SPEC>;
7467 impl Asgtrgdf {
7468 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGD input"]
7469 pub const _0: Self = Self::new(0);
7470
7471 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGD input."]
7472 pub const _1: Self = Self::new(1);
7473 }
7474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7475 pub struct Asgtrgdr_SPEC;
7476 pub type Asgtrgdr = crate::EnumBitfieldStruct<u8, Asgtrgdr_SPEC>;
7477 impl Asgtrgdr {
7478 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGD input"]
7479 pub const _0: Self = Self::new(0);
7480
7481 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGD input."]
7482 pub const _1: Self = Self::new(1);
7483 }
7484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7485 pub struct Asgtrgcf_SPEC;
7486 pub type Asgtrgcf = crate::EnumBitfieldStruct<u8, Asgtrgcf_SPEC>;
7487 impl Asgtrgcf {
7488 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGC input"]
7489 pub const _0: Self = Self::new(0);
7490
7491 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGC input"]
7492 pub const _1: Self = Self::new(1);
7493 }
7494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7495 pub struct Asgtrgcr_SPEC;
7496 pub type Asgtrgcr = crate::EnumBitfieldStruct<u8, Asgtrgcr_SPEC>;
7497 impl Asgtrgcr {
7498 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGC input"]
7499 pub const _0: Self = Self::new(0);
7500
7501 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGC input."]
7502 pub const _1: Self = Self::new(1);
7503 }
7504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7505 pub struct Asgtrgbf_SPEC;
7506 pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
7507 impl Asgtrgbf {
7508 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGB input"]
7509 pub const _0: Self = Self::new(0);
7510
7511 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGB input."]
7512 pub const _1: Self = Self::new(1);
7513 }
7514 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7515 pub struct Asgtrgbr_SPEC;
7516 pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
7517 impl Asgtrgbr {
7518 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGB input"]
7519 pub const _0: Self = Self::new(0);
7520
7521 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGB input."]
7522 pub const _1: Self = Self::new(1);
7523 }
7524 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7525 pub struct Asgtrgaf_SPEC;
7526 pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
7527 impl Asgtrgaf {
7528 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGA input"]
7529 pub const _0: Self = Self::new(0);
7530
7531 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGA input."]
7532 pub const _1: Self = Self::new(1);
7533 }
7534 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7535 pub struct Asgtrgar_SPEC;
7536 pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
7537 impl Asgtrgar {
7538 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGA input"]
7539 pub const _0: Self = Self::new(0);
7540
7541 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGA input."]
7542 pub const _1: Self = Self::new(1);
7543 }
7544}
7545#[doc(hidden)]
7546#[derive(Copy, Clone, Eq, PartialEq)]
7547pub struct Gticbsr_SPEC;
7548impl crate::sealed::RegSpec for Gticbsr_SPEC {
7549 type DataType = u32;
7550}
7551
7552#[doc = "General PWM Timer Input Capture Source Select Register B"]
7553pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
7554
7555impl Gticbsr {
7556 #[doc = "ELC_GPTH Event Source GTCCRB Input Capture Enable"]
7557 #[inline(always)]
7558 pub fn bselch(
7559 self,
7560 ) -> crate::common::RegisterField<
7561 23,
7562 0x1,
7563 1,
7564 0,
7565 gticbsr::Bselch,
7566 gticbsr::Bselch,
7567 Gticbsr_SPEC,
7568 crate::common::RW,
7569 > {
7570 crate::common::RegisterField::<
7571 23,
7572 0x1,
7573 1,
7574 0,
7575 gticbsr::Bselch,
7576 gticbsr::Bselch,
7577 Gticbsr_SPEC,
7578 crate::common::RW,
7579 >::from_register(self, 0)
7580 }
7581
7582 #[doc = "ELC_GPTG Event Source GTCCRB Input Capture Enable"]
7583 #[inline(always)]
7584 pub fn bselcg(
7585 self,
7586 ) -> crate::common::RegisterField<
7587 22,
7588 0x1,
7589 1,
7590 0,
7591 gticbsr::Bselcg,
7592 gticbsr::Bselcg,
7593 Gticbsr_SPEC,
7594 crate::common::RW,
7595 > {
7596 crate::common::RegisterField::<
7597 22,
7598 0x1,
7599 1,
7600 0,
7601 gticbsr::Bselcg,
7602 gticbsr::Bselcg,
7603 Gticbsr_SPEC,
7604 crate::common::RW,
7605 >::from_register(self, 0)
7606 }
7607
7608 #[doc = "ELC_GPTF Event Source GTCCRB Input Capture Enable"]
7609 #[inline(always)]
7610 pub fn bselcf(
7611 self,
7612 ) -> crate::common::RegisterField<
7613 21,
7614 0x1,
7615 1,
7616 0,
7617 gticbsr::Bselcf,
7618 gticbsr::Bselcf,
7619 Gticbsr_SPEC,
7620 crate::common::RW,
7621 > {
7622 crate::common::RegisterField::<
7623 21,
7624 0x1,
7625 1,
7626 0,
7627 gticbsr::Bselcf,
7628 gticbsr::Bselcf,
7629 Gticbsr_SPEC,
7630 crate::common::RW,
7631 >::from_register(self, 0)
7632 }
7633
7634 #[doc = "ELC_GPTE Event Source GTCCRB Input Capture Enable"]
7635 #[inline(always)]
7636 pub fn bselce(
7637 self,
7638 ) -> crate::common::RegisterField<
7639 20,
7640 0x1,
7641 1,
7642 0,
7643 gticbsr::Bselce,
7644 gticbsr::Bselce,
7645 Gticbsr_SPEC,
7646 crate::common::RW,
7647 > {
7648 crate::common::RegisterField::<
7649 20,
7650 0x1,
7651 1,
7652 0,
7653 gticbsr::Bselce,
7654 gticbsr::Bselce,
7655 Gticbsr_SPEC,
7656 crate::common::RW,
7657 >::from_register(self, 0)
7658 }
7659
7660 #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
7661 #[inline(always)]
7662 pub fn bselcd(
7663 self,
7664 ) -> crate::common::RegisterField<
7665 19,
7666 0x1,
7667 1,
7668 0,
7669 gticbsr::Bselcd,
7670 gticbsr::Bselcd,
7671 Gticbsr_SPEC,
7672 crate::common::RW,
7673 > {
7674 crate::common::RegisterField::<
7675 19,
7676 0x1,
7677 1,
7678 0,
7679 gticbsr::Bselcd,
7680 gticbsr::Bselcd,
7681 Gticbsr_SPEC,
7682 crate::common::RW,
7683 >::from_register(self, 0)
7684 }
7685
7686 #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
7687 #[inline(always)]
7688 pub fn bselcc(
7689 self,
7690 ) -> crate::common::RegisterField<
7691 18,
7692 0x1,
7693 1,
7694 0,
7695 gticbsr::Bselcc,
7696 gticbsr::Bselcc,
7697 Gticbsr_SPEC,
7698 crate::common::RW,
7699 > {
7700 crate::common::RegisterField::<
7701 18,
7702 0x1,
7703 1,
7704 0,
7705 gticbsr::Bselcc,
7706 gticbsr::Bselcc,
7707 Gticbsr_SPEC,
7708 crate::common::RW,
7709 >::from_register(self, 0)
7710 }
7711
7712 #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
7713 #[inline(always)]
7714 pub fn bselcb(
7715 self,
7716 ) -> crate::common::RegisterField<
7717 17,
7718 0x1,
7719 1,
7720 0,
7721 gticbsr::Bselcb,
7722 gticbsr::Bselcb,
7723 Gticbsr_SPEC,
7724 crate::common::RW,
7725 > {
7726 crate::common::RegisterField::<
7727 17,
7728 0x1,
7729 1,
7730 0,
7731 gticbsr::Bselcb,
7732 gticbsr::Bselcb,
7733 Gticbsr_SPEC,
7734 crate::common::RW,
7735 >::from_register(self, 0)
7736 }
7737
7738 #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
7739 #[inline(always)]
7740 pub fn bselca(
7741 self,
7742 ) -> crate::common::RegisterField<
7743 16,
7744 0x1,
7745 1,
7746 0,
7747 gticbsr::Bselca,
7748 gticbsr::Bselca,
7749 Gticbsr_SPEC,
7750 crate::common::RW,
7751 > {
7752 crate::common::RegisterField::<
7753 16,
7754 0x1,
7755 1,
7756 0,
7757 gticbsr::Bselca,
7758 gticbsr::Bselca,
7759 Gticbsr_SPEC,
7760 crate::common::RW,
7761 >::from_register(self, 0)
7762 }
7763
7764 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable"]
7765 #[inline(always)]
7766 pub fn bscbfah(
7767 self,
7768 ) -> crate::common::RegisterField<
7769 15,
7770 0x1,
7771 1,
7772 0,
7773 gticbsr::Bscbfah,
7774 gticbsr::Bscbfah,
7775 Gticbsr_SPEC,
7776 crate::common::RW,
7777 > {
7778 crate::common::RegisterField::<
7779 15,
7780 0x1,
7781 1,
7782 0,
7783 gticbsr::Bscbfah,
7784 gticbsr::Bscbfah,
7785 Gticbsr_SPEC,
7786 crate::common::RW,
7787 >::from_register(self, 0)
7788 }
7789
7790 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable"]
7791 #[inline(always)]
7792 pub fn bscbfal(
7793 self,
7794 ) -> crate::common::RegisterField<
7795 14,
7796 0x1,
7797 1,
7798 0,
7799 gticbsr::Bscbfal,
7800 gticbsr::Bscbfal,
7801 Gticbsr_SPEC,
7802 crate::common::RW,
7803 > {
7804 crate::common::RegisterField::<
7805 14,
7806 0x1,
7807 1,
7808 0,
7809 gticbsr::Bscbfal,
7810 gticbsr::Bscbfal,
7811 Gticbsr_SPEC,
7812 crate::common::RW,
7813 >::from_register(self, 0)
7814 }
7815
7816 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable"]
7817 #[inline(always)]
7818 pub fn bscbrah(
7819 self,
7820 ) -> crate::common::RegisterField<
7821 13,
7822 0x1,
7823 1,
7824 0,
7825 gticbsr::Bscbrah,
7826 gticbsr::Bscbrah,
7827 Gticbsr_SPEC,
7828 crate::common::RW,
7829 > {
7830 crate::common::RegisterField::<
7831 13,
7832 0x1,
7833 1,
7834 0,
7835 gticbsr::Bscbrah,
7836 gticbsr::Bscbrah,
7837 Gticbsr_SPEC,
7838 crate::common::RW,
7839 >::from_register(self, 0)
7840 }
7841
7842 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable"]
7843 #[inline(always)]
7844 pub fn bscbral(
7845 self,
7846 ) -> crate::common::RegisterField<
7847 12,
7848 0x1,
7849 1,
7850 0,
7851 gticbsr::Bscbral,
7852 gticbsr::Bscbral,
7853 Gticbsr_SPEC,
7854 crate::common::RW,
7855 > {
7856 crate::common::RegisterField::<
7857 12,
7858 0x1,
7859 1,
7860 0,
7861 gticbsr::Bscbral,
7862 gticbsr::Bscbral,
7863 Gticbsr_SPEC,
7864 crate::common::RW,
7865 >::from_register(self, 0)
7866 }
7867
7868 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable"]
7869 #[inline(always)]
7870 pub fn bscafbh(
7871 self,
7872 ) -> crate::common::RegisterField<
7873 11,
7874 0x1,
7875 1,
7876 0,
7877 gticbsr::Bscafbh,
7878 gticbsr::Bscafbh,
7879 Gticbsr_SPEC,
7880 crate::common::RW,
7881 > {
7882 crate::common::RegisterField::<
7883 11,
7884 0x1,
7885 1,
7886 0,
7887 gticbsr::Bscafbh,
7888 gticbsr::Bscafbh,
7889 Gticbsr_SPEC,
7890 crate::common::RW,
7891 >::from_register(self, 0)
7892 }
7893
7894 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable"]
7895 #[inline(always)]
7896 pub fn bscafbl(
7897 self,
7898 ) -> crate::common::RegisterField<
7899 10,
7900 0x1,
7901 1,
7902 0,
7903 gticbsr::Bscafbl,
7904 gticbsr::Bscafbl,
7905 Gticbsr_SPEC,
7906 crate::common::RW,
7907 > {
7908 crate::common::RegisterField::<
7909 10,
7910 0x1,
7911 1,
7912 0,
7913 gticbsr::Bscafbl,
7914 gticbsr::Bscafbl,
7915 Gticbsr_SPEC,
7916 crate::common::RW,
7917 >::from_register(self, 0)
7918 }
7919
7920 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable"]
7921 #[inline(always)]
7922 pub fn bscarbh(
7923 self,
7924 ) -> crate::common::RegisterField<
7925 9,
7926 0x1,
7927 1,
7928 0,
7929 gticbsr::Bscarbh,
7930 gticbsr::Bscarbh,
7931 Gticbsr_SPEC,
7932 crate::common::RW,
7933 > {
7934 crate::common::RegisterField::<
7935 9,
7936 0x1,
7937 1,
7938 0,
7939 gticbsr::Bscarbh,
7940 gticbsr::Bscarbh,
7941 Gticbsr_SPEC,
7942 crate::common::RW,
7943 >::from_register(self, 0)
7944 }
7945
7946 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable"]
7947 #[inline(always)]
7948 pub fn bscarbl(
7949 self,
7950 ) -> crate::common::RegisterField<
7951 8,
7952 0x1,
7953 1,
7954 0,
7955 gticbsr::Bscarbl,
7956 gticbsr::Bscarbl,
7957 Gticbsr_SPEC,
7958 crate::common::RW,
7959 > {
7960 crate::common::RegisterField::<
7961 8,
7962 0x1,
7963 1,
7964 0,
7965 gticbsr::Bscarbl,
7966 gticbsr::Bscarbl,
7967 Gticbsr_SPEC,
7968 crate::common::RW,
7969 >::from_register(self, 0)
7970 }
7971
7972 #[doc = "GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable"]
7973 #[inline(always)]
7974 pub fn bsgtrgdf(
7975 self,
7976 ) -> crate::common::RegisterField<
7977 7,
7978 0x1,
7979 1,
7980 0,
7981 gticbsr::Bsgtrgdf,
7982 gticbsr::Bsgtrgdf,
7983 Gticbsr_SPEC,
7984 crate::common::RW,
7985 > {
7986 crate::common::RegisterField::<
7987 7,
7988 0x1,
7989 1,
7990 0,
7991 gticbsr::Bsgtrgdf,
7992 gticbsr::Bsgtrgdf,
7993 Gticbsr_SPEC,
7994 crate::common::RW,
7995 >::from_register(self, 0)
7996 }
7997
7998 #[doc = "GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable"]
7999 #[inline(always)]
8000 pub fn bsgtrgdr(
8001 self,
8002 ) -> crate::common::RegisterField<
8003 6,
8004 0x1,
8005 1,
8006 0,
8007 gticbsr::Bsgtrgdr,
8008 gticbsr::Bsgtrgdr,
8009 Gticbsr_SPEC,
8010 crate::common::RW,
8011 > {
8012 crate::common::RegisterField::<
8013 6,
8014 0x1,
8015 1,
8016 0,
8017 gticbsr::Bsgtrgdr,
8018 gticbsr::Bsgtrgdr,
8019 Gticbsr_SPEC,
8020 crate::common::RW,
8021 >::from_register(self, 0)
8022 }
8023
8024 #[doc = "GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable"]
8025 #[inline(always)]
8026 pub fn bsgtrgcf(
8027 self,
8028 ) -> crate::common::RegisterField<
8029 5,
8030 0x1,
8031 1,
8032 0,
8033 gticbsr::Bsgtrgcf,
8034 gticbsr::Bsgtrgcf,
8035 Gticbsr_SPEC,
8036 crate::common::RW,
8037 > {
8038 crate::common::RegisterField::<
8039 5,
8040 0x1,
8041 1,
8042 0,
8043 gticbsr::Bsgtrgcf,
8044 gticbsr::Bsgtrgcf,
8045 Gticbsr_SPEC,
8046 crate::common::RW,
8047 >::from_register(self, 0)
8048 }
8049
8050 #[doc = "GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable"]
8051 #[inline(always)]
8052 pub fn bsgtrgcr(
8053 self,
8054 ) -> crate::common::RegisterField<
8055 4,
8056 0x1,
8057 1,
8058 0,
8059 gticbsr::Bsgtrgcr,
8060 gticbsr::Bsgtrgcr,
8061 Gticbsr_SPEC,
8062 crate::common::RW,
8063 > {
8064 crate::common::RegisterField::<
8065 4,
8066 0x1,
8067 1,
8068 0,
8069 gticbsr::Bsgtrgcr,
8070 gticbsr::Bsgtrgcr,
8071 Gticbsr_SPEC,
8072 crate::common::RW,
8073 >::from_register(self, 0)
8074 }
8075
8076 #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
8077 #[inline(always)]
8078 pub fn bsgtrgbf(
8079 self,
8080 ) -> crate::common::RegisterField<
8081 3,
8082 0x1,
8083 1,
8084 0,
8085 gticbsr::Bsgtrgbf,
8086 gticbsr::Bsgtrgbf,
8087 Gticbsr_SPEC,
8088 crate::common::RW,
8089 > {
8090 crate::common::RegisterField::<
8091 3,
8092 0x1,
8093 1,
8094 0,
8095 gticbsr::Bsgtrgbf,
8096 gticbsr::Bsgtrgbf,
8097 Gticbsr_SPEC,
8098 crate::common::RW,
8099 >::from_register(self, 0)
8100 }
8101
8102 #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
8103 #[inline(always)]
8104 pub fn bsgtrgbr(
8105 self,
8106 ) -> crate::common::RegisterField<
8107 2,
8108 0x1,
8109 1,
8110 0,
8111 gticbsr::Bsgtrgbr,
8112 gticbsr::Bsgtrgbr,
8113 Gticbsr_SPEC,
8114 crate::common::RW,
8115 > {
8116 crate::common::RegisterField::<
8117 2,
8118 0x1,
8119 1,
8120 0,
8121 gticbsr::Bsgtrgbr,
8122 gticbsr::Bsgtrgbr,
8123 Gticbsr_SPEC,
8124 crate::common::RW,
8125 >::from_register(self, 0)
8126 }
8127
8128 #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
8129 #[inline(always)]
8130 pub fn bsgtrgaf(
8131 self,
8132 ) -> crate::common::RegisterField<
8133 1,
8134 0x1,
8135 1,
8136 0,
8137 gticbsr::Bsgtrgaf,
8138 gticbsr::Bsgtrgaf,
8139 Gticbsr_SPEC,
8140 crate::common::RW,
8141 > {
8142 crate::common::RegisterField::<
8143 1,
8144 0x1,
8145 1,
8146 0,
8147 gticbsr::Bsgtrgaf,
8148 gticbsr::Bsgtrgaf,
8149 Gticbsr_SPEC,
8150 crate::common::RW,
8151 >::from_register(self, 0)
8152 }
8153
8154 #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
8155 #[inline(always)]
8156 pub fn bsgtrgar(
8157 self,
8158 ) -> crate::common::RegisterField<
8159 0,
8160 0x1,
8161 1,
8162 0,
8163 gticbsr::Bsgtrgar,
8164 gticbsr::Bsgtrgar,
8165 Gticbsr_SPEC,
8166 crate::common::RW,
8167 > {
8168 crate::common::RegisterField::<
8169 0,
8170 0x1,
8171 1,
8172 0,
8173 gticbsr::Bsgtrgar,
8174 gticbsr::Bsgtrgar,
8175 Gticbsr_SPEC,
8176 crate::common::RW,
8177 >::from_register(self, 0)
8178 }
8179}
8180impl ::core::default::Default for Gticbsr {
8181 #[inline(always)]
8182 fn default() -> Gticbsr {
8183 <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
8184 }
8185}
8186pub mod gticbsr {
8187
8188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8189 pub struct Bselch_SPEC;
8190 pub type Bselch = crate::EnumBitfieldStruct<u8, Bselch_SPEC>;
8191 impl Bselch {
8192 #[doc = "Disable GTCCRB input capture on ELC_GPTH input"]
8193 pub const _0: Self = Self::new(0);
8194
8195 #[doc = "Enable GTCCRB input capture on ELC_GPTH input."]
8196 pub const _1: Self = Self::new(1);
8197 }
8198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8199 pub struct Bselcg_SPEC;
8200 pub type Bselcg = crate::EnumBitfieldStruct<u8, Bselcg_SPEC>;
8201 impl Bselcg {
8202 #[doc = "Disable GTCCRB input capture on ELC_GPTG input"]
8203 pub const _0: Self = Self::new(0);
8204
8205 #[doc = "Enable GTCCRB input capture on ELC_GPTG input."]
8206 pub const _1: Self = Self::new(1);
8207 }
8208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8209 pub struct Bselcf_SPEC;
8210 pub type Bselcf = crate::EnumBitfieldStruct<u8, Bselcf_SPEC>;
8211 impl Bselcf {
8212 #[doc = "Disable GTCCRB input capture on ELC_GPTF input"]
8213 pub const _0: Self = Self::new(0);
8214
8215 #[doc = "Enable GTCCRB input capture on ELC_GPTF input."]
8216 pub const _1: Self = Self::new(1);
8217 }
8218 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8219 pub struct Bselce_SPEC;
8220 pub type Bselce = crate::EnumBitfieldStruct<u8, Bselce_SPEC>;
8221 impl Bselce {
8222 #[doc = "Disable GTCCRB input capture on ELC_GPTE input"]
8223 pub const _0: Self = Self::new(0);
8224
8225 #[doc = "Enable GTCCRB input capture on ELC_GPTE input"]
8226 pub const _1: Self = Self::new(1);
8227 }
8228 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8229 pub struct Bselcd_SPEC;
8230 pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
8231 impl Bselcd {
8232 #[doc = "Disable GTCCRB input capture on ELC_GPTD input"]
8233 pub const _0: Self = Self::new(0);
8234
8235 #[doc = "Enable GTCCRB input capture on ELC_GPTD input."]
8236 pub const _1: Self = Self::new(1);
8237 }
8238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8239 pub struct Bselcc_SPEC;
8240 pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
8241 impl Bselcc {
8242 #[doc = "Disable GTCCRB input capture on ELC_GPTC input"]
8243 pub const _0: Self = Self::new(0);
8244
8245 #[doc = "Enable GTCCRB input capture on ELC_GPTC input"]
8246 pub const _1: Self = Self::new(1);
8247 }
8248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8249 pub struct Bselcb_SPEC;
8250 pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
8251 impl Bselcb {
8252 #[doc = "Disable GTCCRB input capture on ELC_GPTB input"]
8253 pub const _0: Self = Self::new(0);
8254
8255 #[doc = "Enable GTCCRB input capture on ELC_GPTB input."]
8256 pub const _1: Self = Self::new(1);
8257 }
8258 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8259 pub struct Bselca_SPEC;
8260 pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
8261 impl Bselca {
8262 #[doc = "Disable GTCCRB input capture on ELC_GPTA input"]
8263 pub const _0: Self = Self::new(0);
8264
8265 #[doc = "Enable GTCCRB input capture on ELC_GPTA input."]
8266 pub const _1: Self = Self::new(1);
8267 }
8268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8269 pub struct Bscbfah_SPEC;
8270 pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
8271 impl Bscbfah {
8272 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 1"]
8273 pub const _0: Self = Self::new(0);
8274
8275 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 1."]
8276 pub const _1: Self = Self::new(1);
8277 }
8278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8279 pub struct Bscbfal_SPEC;
8280 pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
8281 impl Bscbfal {
8282 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 0"]
8283 pub const _0: Self = Self::new(0);
8284
8285 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 0."]
8286 pub const _1: Self = Self::new(1);
8287 }
8288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8289 pub struct Bscbrah_SPEC;
8290 pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
8291 impl Bscbrah {
8292 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 1"]
8293 pub const _0: Self = Self::new(0);
8294
8295 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 1."]
8296 pub const _1: Self = Self::new(1);
8297 }
8298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8299 pub struct Bscbral_SPEC;
8300 pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
8301 impl Bscbral {
8302 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 0"]
8303 pub const _0: Self = Self::new(0);
8304
8305 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 0."]
8306 pub const _1: Self = Self::new(1);
8307 }
8308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8309 pub struct Bscafbh_SPEC;
8310 pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
8311 impl Bscafbh {
8312 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 1"]
8313 pub const _0: Self = Self::new(0);
8314
8315 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 1."]
8316 pub const _1: Self = Self::new(1);
8317 }
8318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8319 pub struct Bscafbl_SPEC;
8320 pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
8321 impl Bscafbl {
8322 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 0"]
8323 pub const _0: Self = Self::new(0);
8324
8325 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 0."]
8326 pub const _1: Self = Self::new(1);
8327 }
8328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8329 pub struct Bscarbh_SPEC;
8330 pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
8331 impl Bscarbh {
8332 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 1"]
8333 pub const _0: Self = Self::new(0);
8334
8335 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 1."]
8336 pub const _1: Self = Self::new(1);
8337 }
8338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8339 pub struct Bscarbl_SPEC;
8340 pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
8341 impl Bscarbl {
8342 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 0"]
8343 pub const _0: Self = Self::new(0);
8344
8345 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 0."]
8346 pub const _1: Self = Self::new(1);
8347 }
8348 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8349 pub struct Bsgtrgdf_SPEC;
8350 pub type Bsgtrgdf = crate::EnumBitfieldStruct<u8, Bsgtrgdf_SPEC>;
8351 impl Bsgtrgdf {
8352 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGD input"]
8353 pub const _0: Self = Self::new(0);
8354
8355 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGD input."]
8356 pub const _1: Self = Self::new(1);
8357 }
8358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8359 pub struct Bsgtrgdr_SPEC;
8360 pub type Bsgtrgdr = crate::EnumBitfieldStruct<u8, Bsgtrgdr_SPEC>;
8361 impl Bsgtrgdr {
8362 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGD input"]
8363 pub const _0: Self = Self::new(0);
8364
8365 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGD input."]
8366 pub const _1: Self = Self::new(1);
8367 }
8368 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8369 pub struct Bsgtrgcf_SPEC;
8370 pub type Bsgtrgcf = crate::EnumBitfieldStruct<u8, Bsgtrgcf_SPEC>;
8371 impl Bsgtrgcf {
8372 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGC input"]
8373 pub const _0: Self = Self::new(0);
8374
8375 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGC input."]
8376 pub const _1: Self = Self::new(1);
8377 }
8378 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8379 pub struct Bsgtrgcr_SPEC;
8380 pub type Bsgtrgcr = crate::EnumBitfieldStruct<u8, Bsgtrgcr_SPEC>;
8381 impl Bsgtrgcr {
8382 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGC input"]
8383 pub const _0: Self = Self::new(0);
8384
8385 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGC input."]
8386 pub const _1: Self = Self::new(1);
8387 }
8388 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8389 pub struct Bsgtrgbf_SPEC;
8390 pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
8391 impl Bsgtrgbf {
8392 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGB input"]
8393 pub const _0: Self = Self::new(0);
8394
8395 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGB input."]
8396 pub const _1: Self = Self::new(1);
8397 }
8398 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8399 pub struct Bsgtrgbr_SPEC;
8400 pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
8401 impl Bsgtrgbr {
8402 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGB input"]
8403 pub const _0: Self = Self::new(0);
8404
8405 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGB input."]
8406 pub const _1: Self = Self::new(1);
8407 }
8408 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8409 pub struct Bsgtrgaf_SPEC;
8410 pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
8411 impl Bsgtrgaf {
8412 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGA input"]
8413 pub const _0: Self = Self::new(0);
8414
8415 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGA input."]
8416 pub const _1: Self = Self::new(1);
8417 }
8418 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8419 pub struct Bsgtrgar_SPEC;
8420 pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
8421 impl Bsgtrgar {
8422 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGA input"]
8423 pub const _0: Self = Self::new(0);
8424
8425 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGA input."]
8426 pub const _1: Self = Self::new(1);
8427 }
8428}
8429#[doc(hidden)]
8430#[derive(Copy, Clone, Eq, PartialEq)]
8431pub struct Gtcr_SPEC;
8432impl crate::sealed::RegSpec for Gtcr_SPEC {
8433 type DataType = u32;
8434}
8435
8436#[doc = "General PWM Timer Control Register"]
8437pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
8438
8439impl Gtcr {
8440 #[doc = "Timer Prescaler Select"]
8441 #[inline(always)]
8442 pub fn tpcs(
8443 self,
8444 ) -> crate::common::RegisterField<
8445 24,
8446 0x7,
8447 1,
8448 0,
8449 gtcr::Tpcs,
8450 gtcr::Tpcs,
8451 Gtcr_SPEC,
8452 crate::common::RW,
8453 > {
8454 crate::common::RegisterField::<
8455 24,
8456 0x7,
8457 1,
8458 0,
8459 gtcr::Tpcs,
8460 gtcr::Tpcs,
8461 Gtcr_SPEC,
8462 crate::common::RW,
8463 >::from_register(self, 0)
8464 }
8465
8466 #[doc = "Mode Select"]
8467 #[inline(always)]
8468 pub fn md(
8469 self,
8470 ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
8471 {
8472 crate::common::RegisterField::<
8473 16,
8474 0x7,
8475 1,
8476 0,
8477 gtcr::Md,
8478 gtcr::Md,
8479 Gtcr_SPEC,
8480 crate::common::RW,
8481 >::from_register(self, 0)
8482 }
8483
8484 #[doc = "Count Start"]
8485 #[inline(always)]
8486 pub fn cst(
8487 self,
8488 ) -> crate::common::RegisterField<
8489 0,
8490 0x1,
8491 1,
8492 0,
8493 gtcr::Cst,
8494 gtcr::Cst,
8495 Gtcr_SPEC,
8496 crate::common::RW,
8497 > {
8498 crate::common::RegisterField::<
8499 0,
8500 0x1,
8501 1,
8502 0,
8503 gtcr::Cst,
8504 gtcr::Cst,
8505 Gtcr_SPEC,
8506 crate::common::RW,
8507 >::from_register(self, 0)
8508 }
8509}
8510impl ::core::default::Default for Gtcr {
8511 #[inline(always)]
8512 fn default() -> Gtcr {
8513 <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
8514 }
8515}
8516pub mod gtcr {
8517
8518 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8519 pub struct Tpcs_SPEC;
8520 pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
8521 impl Tpcs {
8522 #[doc = "PCLK/1"]
8523 pub const _000: Self = Self::new(0);
8524
8525 #[doc = "PCLK/4"]
8526 pub const _001: Self = Self::new(1);
8527
8528 #[doc = "PCLK/16"]
8529 pub const _010: Self = Self::new(2);
8530
8531 #[doc = "PCLK/64"]
8532 pub const _011: Self = Self::new(3);
8533
8534 #[doc = "PCLK/256"]
8535 pub const _100: Self = Self::new(4);
8536
8537 #[doc = "PCLK/1024"]
8538 pub const _101: Self = Self::new(5);
8539 }
8540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8541 pub struct Md_SPEC;
8542 pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
8543 impl Md {
8544 #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
8545 pub const _000: Self = Self::new(0);
8546
8547 #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
8548 pub const _001: Self = Self::new(1);
8549
8550 #[doc = "Setting prohibited"]
8551 pub const _010: Self = Self::new(2);
8552
8553 #[doc = "Setting prohibited"]
8554 pub const _011: Self = Self::new(3);
8555
8556 #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at crest) (single buffer or double buffer possible)"]
8557 pub const _100: Self = Self::new(4);
8558
8559 #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer possible)"]
8560 pub const _101: Self = Self::new(5);
8561
8562 #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) fixed buffer operation)"]
8563 pub const _110: Self = Self::new(6);
8564
8565 #[doc = "Setting prohibited"]
8566 pub const _111: Self = Self::new(7);
8567 }
8568 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8569 pub struct Cst_SPEC;
8570 pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
8571 impl Cst {
8572 #[doc = "Count operation is stopped"]
8573 pub const _0: Self = Self::new(0);
8574
8575 #[doc = "Count operation is performed"]
8576 pub const _1: Self = Self::new(1);
8577 }
8578}
8579#[doc(hidden)]
8580#[derive(Copy, Clone, Eq, PartialEq)]
8581pub struct Gtuddtyc_SPEC;
8582impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
8583 type DataType = u32;
8584}
8585
8586#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
8587pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
8588
8589impl Gtuddtyc {
8590 #[doc = "GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting"]
8591 #[inline(always)]
8592 pub fn obdtyr(
8593 self,
8594 ) -> crate::common::RegisterField<
8595 27,
8596 0x1,
8597 1,
8598 0,
8599 gtuddtyc::Obdtyr,
8600 gtuddtyc::Obdtyr,
8601 Gtuddtyc_SPEC,
8602 crate::common::RW,
8603 > {
8604 crate::common::RegisterField::<
8605 27,
8606 0x1,
8607 1,
8608 0,
8609 gtuddtyc::Obdtyr,
8610 gtuddtyc::Obdtyr,
8611 Gtuddtyc_SPEC,
8612 crate::common::RW,
8613 >::from_register(self, 0)
8614 }
8615
8616 #[doc = "Forcible GTIOCB Output Duty Setting"]
8617 #[inline(always)]
8618 pub fn obdtyf(
8619 self,
8620 ) -> crate::common::RegisterField<
8621 26,
8622 0x1,
8623 1,
8624 0,
8625 gtuddtyc::Obdtyf,
8626 gtuddtyc::Obdtyf,
8627 Gtuddtyc_SPEC,
8628 crate::common::RW,
8629 > {
8630 crate::common::RegisterField::<
8631 26,
8632 0x1,
8633 1,
8634 0,
8635 gtuddtyc::Obdtyf,
8636 gtuddtyc::Obdtyf,
8637 Gtuddtyc_SPEC,
8638 crate::common::RW,
8639 >::from_register(self, 0)
8640 }
8641
8642 #[doc = "GTIOCB Output Duty Setting"]
8643 #[inline(always)]
8644 pub fn obdty(
8645 self,
8646 ) -> crate::common::RegisterField<
8647 24,
8648 0x3,
8649 1,
8650 0,
8651 gtuddtyc::Obdty,
8652 gtuddtyc::Obdty,
8653 Gtuddtyc_SPEC,
8654 crate::common::RW,
8655 > {
8656 crate::common::RegisterField::<
8657 24,
8658 0x3,
8659 1,
8660 0,
8661 gtuddtyc::Obdty,
8662 gtuddtyc::Obdty,
8663 Gtuddtyc_SPEC,
8664 crate::common::RW,
8665 >::from_register(self, 0)
8666 }
8667
8668 #[doc = "GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting"]
8669 #[inline(always)]
8670 pub fn oadtyr(
8671 self,
8672 ) -> crate::common::RegisterField<
8673 19,
8674 0x1,
8675 1,
8676 0,
8677 gtuddtyc::Oadtyr,
8678 gtuddtyc::Oadtyr,
8679 Gtuddtyc_SPEC,
8680 crate::common::RW,
8681 > {
8682 crate::common::RegisterField::<
8683 19,
8684 0x1,
8685 1,
8686 0,
8687 gtuddtyc::Oadtyr,
8688 gtuddtyc::Oadtyr,
8689 Gtuddtyc_SPEC,
8690 crate::common::RW,
8691 >::from_register(self, 0)
8692 }
8693
8694 #[doc = "Forcible GTIOCA Output Duty Setting"]
8695 #[inline(always)]
8696 pub fn oadtyf(
8697 self,
8698 ) -> crate::common::RegisterField<
8699 18,
8700 0x1,
8701 1,
8702 0,
8703 gtuddtyc::Oadtyf,
8704 gtuddtyc::Oadtyf,
8705 Gtuddtyc_SPEC,
8706 crate::common::RW,
8707 > {
8708 crate::common::RegisterField::<
8709 18,
8710 0x1,
8711 1,
8712 0,
8713 gtuddtyc::Oadtyf,
8714 gtuddtyc::Oadtyf,
8715 Gtuddtyc_SPEC,
8716 crate::common::RW,
8717 >::from_register(self, 0)
8718 }
8719
8720 #[doc = "GTIOCA Output Duty Setting"]
8721 #[inline(always)]
8722 pub fn oadty(
8723 self,
8724 ) -> crate::common::RegisterField<
8725 16,
8726 0x3,
8727 1,
8728 0,
8729 gtuddtyc::Oadty,
8730 gtuddtyc::Oadty,
8731 Gtuddtyc_SPEC,
8732 crate::common::RW,
8733 > {
8734 crate::common::RegisterField::<
8735 16,
8736 0x3,
8737 1,
8738 0,
8739 gtuddtyc::Oadty,
8740 gtuddtyc::Oadty,
8741 Gtuddtyc_SPEC,
8742 crate::common::RW,
8743 >::from_register(self, 0)
8744 }
8745
8746 #[doc = "Forcible Count Direction Setting"]
8747 #[inline(always)]
8748 pub fn udf(
8749 self,
8750 ) -> crate::common::RegisterField<
8751 1,
8752 0x1,
8753 1,
8754 0,
8755 gtuddtyc::Udf,
8756 gtuddtyc::Udf,
8757 Gtuddtyc_SPEC,
8758 crate::common::RW,
8759 > {
8760 crate::common::RegisterField::<
8761 1,
8762 0x1,
8763 1,
8764 0,
8765 gtuddtyc::Udf,
8766 gtuddtyc::Udf,
8767 Gtuddtyc_SPEC,
8768 crate::common::RW,
8769 >::from_register(self, 0)
8770 }
8771
8772 #[doc = "Count Direction Setting"]
8773 #[inline(always)]
8774 pub fn ud(
8775 self,
8776 ) -> crate::common::RegisterField<
8777 0,
8778 0x1,
8779 1,
8780 0,
8781 gtuddtyc::Ud,
8782 gtuddtyc::Ud,
8783 Gtuddtyc_SPEC,
8784 crate::common::RW,
8785 > {
8786 crate::common::RegisterField::<
8787 0,
8788 0x1,
8789 1,
8790 0,
8791 gtuddtyc::Ud,
8792 gtuddtyc::Ud,
8793 Gtuddtyc_SPEC,
8794 crate::common::RW,
8795 >::from_register(self, 0)
8796 }
8797}
8798impl ::core::default::Default for Gtuddtyc {
8799 #[inline(always)]
8800 fn default() -> Gtuddtyc {
8801 <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
8802 }
8803}
8804pub mod gtuddtyc {
8805
8806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8807 pub struct Obdtyr_SPEC;
8808 pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
8809 impl Obdtyr {
8810 #[doc = "Apply output value set in 0 percent/100 percent duty to GTIOB\\[3:2\\] function after releasing 0percent/100percent duty setting."]
8811 pub const _0: Self = Self::new(0);
8812
8813 #[doc = "Apply masked compare match output value to GTIOB\\[3:2\\] function after releasing 0percent/100percent duty setting."]
8814 pub const _1: Self = Self::new(1);
8815 }
8816 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8817 pub struct Obdtyf_SPEC;
8818 pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
8819 impl Obdtyf {
8820 #[doc = "Do not force setting"]
8821 pub const _0: Self = Self::new(0);
8822
8823 #[doc = "Force setting"]
8824 pub const _1: Self = Self::new(1);
8825 }
8826 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8827 pub struct Obdty_SPEC;
8828 pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
8829 impl Obdty {
8830 #[doc = "GTIOCB pin duty is depend on compare match"]
8831 pub const _00: Self = Self::new(0);
8832
8833 #[doc = "GTIOCB pin duty is depend on compare match"]
8834 pub const _01: Self = Self::new(1);
8835
8836 #[doc = "GTIOCB pin duty 0percent"]
8837 pub const _10: Self = Self::new(2);
8838
8839 #[doc = "GTIOCB pin duty 100percent"]
8840 pub const _11: Self = Self::new(3);
8841 }
8842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8843 pub struct Oadtyr_SPEC;
8844 pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
8845 impl Oadtyr {
8846 #[doc = "Apply output value set in 0 percent/100 percent duty to GTIOA\\[3:2\\] function after releasing 0 percent/100 percent duty setting."]
8847 pub const _0: Self = Self::new(0);
8848
8849 #[doc = "Apply masked compare match output value to GTIOA\\[3:2\\] function after releasing 0 percent/100 percent duty setting."]
8850 pub const _1: Self = Self::new(1);
8851 }
8852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8853 pub struct Oadtyf_SPEC;
8854 pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
8855 impl Oadtyf {
8856 #[doc = "Do not force setting"]
8857 pub const _0: Self = Self::new(0);
8858
8859 #[doc = "Force setting"]
8860 pub const _1: Self = Self::new(1);
8861 }
8862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8863 pub struct Oadty_SPEC;
8864 pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
8865 impl Oadty {
8866 #[doc = "GTIOCA pin duty is depend on compare match"]
8867 pub const _00: Self = Self::new(0);
8868
8869 #[doc = "GTIOCA pin duty is depend on compare match"]
8870 pub const _01: Self = Self::new(1);
8871
8872 #[doc = "GTIOCA pin duty 0 percent"]
8873 pub const _10: Self = Self::new(2);
8874
8875 #[doc = "GTIOCA pin duty 100 percent"]
8876 pub const _11: Self = Self::new(3);
8877 }
8878 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8879 pub struct Udf_SPEC;
8880 pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
8881 impl Udf {
8882 #[doc = "Do not force setting"]
8883 pub const _0: Self = Self::new(0);
8884
8885 #[doc = "Force setting"]
8886 pub const _1: Self = Self::new(1);
8887 }
8888 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8889 pub struct Ud_SPEC;
8890 pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
8891 impl Ud {
8892 #[doc = "Count down on GTCNT"]
8893 pub const _0: Self = Self::new(0);
8894
8895 #[doc = "Counts up on GTCNT"]
8896 pub const _1: Self = Self::new(1);
8897 }
8898}
8899#[doc(hidden)]
8900#[derive(Copy, Clone, Eq, PartialEq)]
8901pub struct Gtior_SPEC;
8902impl crate::sealed::RegSpec for Gtior_SPEC {
8903 type DataType = u32;
8904}
8905
8906#[doc = "General PWM Timer I/O Control Register"]
8907pub type Gtior = crate::RegValueT<Gtior_SPEC>;
8908
8909impl Gtior {
8910 #[doc = "Noise Filter B Sampling Clock Select"]
8911 #[inline(always)]
8912 pub fn nfcsb(
8913 self,
8914 ) -> crate::common::RegisterField<
8915 30,
8916 0x3,
8917 1,
8918 0,
8919 gtior::Nfcsb,
8920 gtior::Nfcsb,
8921 Gtior_SPEC,
8922 crate::common::RW,
8923 > {
8924 crate::common::RegisterField::<
8925 30,
8926 0x3,
8927 1,
8928 0,
8929 gtior::Nfcsb,
8930 gtior::Nfcsb,
8931 Gtior_SPEC,
8932 crate::common::RW,
8933 >::from_register(self, 0)
8934 }
8935
8936 #[doc = "Noise Filter B Enable"]
8937 #[inline(always)]
8938 pub fn nfben(
8939 self,
8940 ) -> crate::common::RegisterField<
8941 29,
8942 0x1,
8943 1,
8944 0,
8945 gtior::Nfben,
8946 gtior::Nfben,
8947 Gtior_SPEC,
8948 crate::common::RW,
8949 > {
8950 crate::common::RegisterField::<
8951 29,
8952 0x1,
8953 1,
8954 0,
8955 gtior::Nfben,
8956 gtior::Nfben,
8957 Gtior_SPEC,
8958 crate::common::RW,
8959 >::from_register(self, 0)
8960 }
8961
8962 #[doc = "GTIOCB Pin Disable Value Setting"]
8963 #[inline(always)]
8964 pub fn obdf(
8965 self,
8966 ) -> crate::common::RegisterField<
8967 25,
8968 0x3,
8969 1,
8970 0,
8971 gtior::Obdf,
8972 gtior::Obdf,
8973 Gtior_SPEC,
8974 crate::common::RW,
8975 > {
8976 crate::common::RegisterField::<
8977 25,
8978 0x3,
8979 1,
8980 0,
8981 gtior::Obdf,
8982 gtior::Obdf,
8983 Gtior_SPEC,
8984 crate::common::RW,
8985 >::from_register(self, 0)
8986 }
8987
8988 #[doc = "GTIOCB Pin Output Enable"]
8989 #[inline(always)]
8990 pub fn obe(
8991 self,
8992 ) -> crate::common::RegisterField<
8993 24,
8994 0x1,
8995 1,
8996 0,
8997 gtior::Obe,
8998 gtior::Obe,
8999 Gtior_SPEC,
9000 crate::common::RW,
9001 > {
9002 crate::common::RegisterField::<
9003 24,
9004 0x1,
9005 1,
9006 0,
9007 gtior::Obe,
9008 gtior::Obe,
9009 Gtior_SPEC,
9010 crate::common::RW,
9011 >::from_register(self, 0)
9012 }
9013
9014 #[doc = "GTIOCB Pin Output Setting at the Start/Stop Count"]
9015 #[inline(always)]
9016 pub fn obhld(
9017 self,
9018 ) -> crate::common::RegisterField<
9019 23,
9020 0x1,
9021 1,
9022 0,
9023 gtior::Obhld,
9024 gtior::Obhld,
9025 Gtior_SPEC,
9026 crate::common::RW,
9027 > {
9028 crate::common::RegisterField::<
9029 23,
9030 0x1,
9031 1,
9032 0,
9033 gtior::Obhld,
9034 gtior::Obhld,
9035 Gtior_SPEC,
9036 crate::common::RW,
9037 >::from_register(self, 0)
9038 }
9039
9040 #[doc = "GTIOCB Pin Output Value Setting at the Count Stop"]
9041 #[inline(always)]
9042 pub fn obdflt(
9043 self,
9044 ) -> crate::common::RegisterField<
9045 22,
9046 0x1,
9047 1,
9048 0,
9049 gtior::Obdflt,
9050 gtior::Obdflt,
9051 Gtior_SPEC,
9052 crate::common::RW,
9053 > {
9054 crate::common::RegisterField::<
9055 22,
9056 0x1,
9057 1,
9058 0,
9059 gtior::Obdflt,
9060 gtior::Obdflt,
9061 Gtior_SPEC,
9062 crate::common::RW,
9063 >::from_register(self, 0)
9064 }
9065
9066 #[doc = "GTIOCB Pin Function Select"]
9067 #[inline(always)]
9068 pub fn gtiob(
9069 self,
9070 ) -> crate::common::RegisterField<
9071 16,
9072 0x1f,
9073 1,
9074 0,
9075 gtior::Gtiob,
9076 gtior::Gtiob,
9077 Gtior_SPEC,
9078 crate::common::RW,
9079 > {
9080 crate::common::RegisterField::<
9081 16,
9082 0x1f,
9083 1,
9084 0,
9085 gtior::Gtiob,
9086 gtior::Gtiob,
9087 Gtior_SPEC,
9088 crate::common::RW,
9089 >::from_register(self, 0)
9090 }
9091
9092 #[doc = "Noise Filter A Sampling Clock Select"]
9093 #[inline(always)]
9094 pub fn nfcsa(
9095 self,
9096 ) -> crate::common::RegisterField<
9097 14,
9098 0x3,
9099 1,
9100 0,
9101 gtior::Nfcsa,
9102 gtior::Nfcsa,
9103 Gtior_SPEC,
9104 crate::common::RW,
9105 > {
9106 crate::common::RegisterField::<
9107 14,
9108 0x3,
9109 1,
9110 0,
9111 gtior::Nfcsa,
9112 gtior::Nfcsa,
9113 Gtior_SPEC,
9114 crate::common::RW,
9115 >::from_register(self, 0)
9116 }
9117
9118 #[doc = "Noise Filter A Enable"]
9119 #[inline(always)]
9120 pub fn nfaen(
9121 self,
9122 ) -> crate::common::RegisterField<
9123 13,
9124 0x1,
9125 1,
9126 0,
9127 gtior::Nfaen,
9128 gtior::Nfaen,
9129 Gtior_SPEC,
9130 crate::common::RW,
9131 > {
9132 crate::common::RegisterField::<
9133 13,
9134 0x1,
9135 1,
9136 0,
9137 gtior::Nfaen,
9138 gtior::Nfaen,
9139 Gtior_SPEC,
9140 crate::common::RW,
9141 >::from_register(self, 0)
9142 }
9143
9144 #[doc = "GTIOCA Pin Disable Value Setting"]
9145 #[inline(always)]
9146 pub fn oadf(
9147 self,
9148 ) -> crate::common::RegisterField<
9149 9,
9150 0x3,
9151 1,
9152 0,
9153 gtior::Oadf,
9154 gtior::Oadf,
9155 Gtior_SPEC,
9156 crate::common::RW,
9157 > {
9158 crate::common::RegisterField::<
9159 9,
9160 0x3,
9161 1,
9162 0,
9163 gtior::Oadf,
9164 gtior::Oadf,
9165 Gtior_SPEC,
9166 crate::common::RW,
9167 >::from_register(self, 0)
9168 }
9169
9170 #[doc = "GTIOCA Pin Output Enable"]
9171 #[inline(always)]
9172 pub fn oae(
9173 self,
9174 ) -> crate::common::RegisterField<
9175 8,
9176 0x1,
9177 1,
9178 0,
9179 gtior::Oae,
9180 gtior::Oae,
9181 Gtior_SPEC,
9182 crate::common::RW,
9183 > {
9184 crate::common::RegisterField::<
9185 8,
9186 0x1,
9187 1,
9188 0,
9189 gtior::Oae,
9190 gtior::Oae,
9191 Gtior_SPEC,
9192 crate::common::RW,
9193 >::from_register(self, 0)
9194 }
9195
9196 #[doc = "GTIOCA Pin Output Setting at the Start/Stop Count"]
9197 #[inline(always)]
9198 pub fn oahld(
9199 self,
9200 ) -> crate::common::RegisterField<
9201 7,
9202 0x1,
9203 1,
9204 0,
9205 gtior::Oahld,
9206 gtior::Oahld,
9207 Gtior_SPEC,
9208 crate::common::RW,
9209 > {
9210 crate::common::RegisterField::<
9211 7,
9212 0x1,
9213 1,
9214 0,
9215 gtior::Oahld,
9216 gtior::Oahld,
9217 Gtior_SPEC,
9218 crate::common::RW,
9219 >::from_register(self, 0)
9220 }
9221
9222 #[doc = "GTIOCA Pin Output Value Setting at the Count Stop"]
9223 #[inline(always)]
9224 pub fn oadflt(
9225 self,
9226 ) -> crate::common::RegisterField<
9227 6,
9228 0x1,
9229 1,
9230 0,
9231 gtior::Oadflt,
9232 gtior::Oadflt,
9233 Gtior_SPEC,
9234 crate::common::RW,
9235 > {
9236 crate::common::RegisterField::<
9237 6,
9238 0x1,
9239 1,
9240 0,
9241 gtior::Oadflt,
9242 gtior::Oadflt,
9243 Gtior_SPEC,
9244 crate::common::RW,
9245 >::from_register(self, 0)
9246 }
9247
9248 #[doc = "GTIOCA Pin Function Select"]
9249 #[inline(always)]
9250 pub fn gtioa(
9251 self,
9252 ) -> crate::common::RegisterField<
9253 0,
9254 0x1f,
9255 1,
9256 0,
9257 gtior::Gtioa,
9258 gtior::Gtioa,
9259 Gtior_SPEC,
9260 crate::common::RW,
9261 > {
9262 crate::common::RegisterField::<
9263 0,
9264 0x1f,
9265 1,
9266 0,
9267 gtior::Gtioa,
9268 gtior::Gtioa,
9269 Gtior_SPEC,
9270 crate::common::RW,
9271 >::from_register(self, 0)
9272 }
9273}
9274impl ::core::default::Default for Gtior {
9275 #[inline(always)]
9276 fn default() -> Gtior {
9277 <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
9278 }
9279}
9280pub mod gtior {
9281
9282 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9283 pub struct Nfcsb_SPEC;
9284 pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
9285 impl Nfcsb {
9286 #[doc = "PCLK/1"]
9287 pub const _00: Self = Self::new(0);
9288
9289 #[doc = "PCLK/4"]
9290 pub const _01: Self = Self::new(1);
9291
9292 #[doc = "PCLK/16"]
9293 pub const _10: Self = Self::new(2);
9294
9295 #[doc = "PCLK/64"]
9296 pub const _11: Self = Self::new(3);
9297 }
9298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9299 pub struct Nfben_SPEC;
9300 pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
9301 impl Nfben {
9302 #[doc = "Disable noise filter for GTIOCB pin"]
9303 pub const _0: Self = Self::new(0);
9304
9305 #[doc = "Enable noise filter for GTIOCB pin"]
9306 pub const _1: Self = Self::new(1);
9307 }
9308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9309 pub struct Obdf_SPEC;
9310 pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
9311 impl Obdf {
9312 #[doc = "Prohibit output disable"]
9313 pub const _00: Self = Self::new(0);
9314
9315 #[doc = "Set GTIOCB pin to Hi-Z on output disable"]
9316 pub const _01: Self = Self::new(1);
9317
9318 #[doc = "Set GTIOCB pin to 0 on output disable"]
9319 pub const _10: Self = Self::new(2);
9320
9321 #[doc = "Set GTIOCB pin to 1 on output disable."]
9322 pub const _11: Self = Self::new(3);
9323 }
9324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9325 pub struct Obe_SPEC;
9326 pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
9327 impl Obe {
9328 #[doc = "Disable output"]
9329 pub const _0: Self = Self::new(0);
9330
9331 #[doc = "Enable output"]
9332 pub const _1: Self = Self::new(1);
9333 }
9334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9335 pub struct Obhld_SPEC;
9336 pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
9337 impl Obhld {
9338 #[doc = "Set GTIOCB pin output level on counting start and stop based on the register setting"]
9339 pub const _0: Self = Self::new(0);
9340
9341 #[doc = "Retain GTIOCB pin output level on counting start and stop"]
9342 pub const _1: Self = Self::new(1);
9343 }
9344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9345 pub struct Obdflt_SPEC;
9346 pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
9347 impl Obdflt {
9348 #[doc = "Output low on GTIOCB pin when counting stops"]
9349 pub const _0: Self = Self::new(0);
9350
9351 #[doc = "Output high on GTIOCB pin when counting stops"]
9352 pub const _1: Self = Self::new(1);
9353 }
9354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9355 pub struct Gtiob_SPEC;
9356 pub type Gtiob = crate::EnumBitfieldStruct<u8, Gtiob_SPEC>;
9357 impl Gtiob {
9358 #[doc = "Initial output is Low. Output retained at cycle end. Output retained at GTCCRB compare match."]
9359 pub const _00000: Self = Self::new(0);
9360
9361 #[doc = "Initial output is Low. Output retained at cycle end. Low output at GTCCRB compare match."]
9362 pub const _00001: Self = Self::new(1);
9363
9364 #[doc = "Initial output is Low. Output retained at cycle end. High output at GTCCRB compare match."]
9365 pub const _00010: Self = Self::new(2);
9366
9367 #[doc = "Initial output is Low. Output retained at cycle end. Output toggled at GTCCRB compare match."]
9368 pub const _00011: Self = Self::new(3);
9369
9370 #[doc = "Initial output is Low. Low output at cycle end. Output retained at GTCCRB compare match."]
9371 pub const _00100: Self = Self::new(4);
9372
9373 #[doc = "Initial output is Low. Low output at cycle end. Low output at GTCCRB compare match."]
9374 pub const _00101: Self = Self::new(5);
9375
9376 #[doc = "Initial output is Low. Low output at cycle end. High output at GTCCRB compare match."]
9377 pub const _00110: Self = Self::new(6);
9378
9379 #[doc = "Initial output is Low. Low output at cycle end. Output toggled at GTCCRB compare match."]
9380 pub const _00111: Self = Self::new(7);
9381
9382 #[doc = "Initial output is Low. High output at cycle end. Output retained at GTCCRB compare match."]
9383 pub const _01000: Self = Self::new(8);
9384
9385 #[doc = "Initial output is Low. High output at cycle end. Low output at GTCCRB compare match."]
9386 pub const _01001: Self = Self::new(9);
9387
9388 #[doc = "Initial output is Low. High output at cycle end. High output at GTCCRB compare match."]
9389 pub const _01010: Self = Self::new(10);
9390
9391 #[doc = "Initial output is Low. High output at cycle end. Output toggled at GTCCRB compare match."]
9392 pub const _01011: Self = Self::new(11);
9393
9394 #[doc = "Initial output is Low. Output toggled at cycle end. Output retained at GTCCRB compare match."]
9395 pub const _01100: Self = Self::new(12);
9396
9397 #[doc = "Initial output is Low. Output toggled at cycle end. Low output at GTCCRB compare match."]
9398 pub const _01101: Self = Self::new(13);
9399
9400 #[doc = "Initial output is Low. Output toggled at cycle end. High output at GTCCRB compare match."]
9401 pub const _01110: Self = Self::new(14);
9402
9403 #[doc = "Initial output is Low. Output toggled at cycle end. Output toggled at GTCCRB compare match."]
9404 pub const _01111: Self = Self::new(15);
9405
9406 #[doc = "Initial output is High. Output retained at cycle end. Output retained at GTCCRB compare match."]
9407 pub const _10000: Self = Self::new(16);
9408
9409 #[doc = "Initial output is High. Output retained at cycle end. Low output at GTCCRB compare match."]
9410 pub const _10001: Self = Self::new(17);
9411
9412 #[doc = "Initial output is High. Output retained at cycle end. High output at GTCCRB compare match."]
9413 pub const _10010: Self = Self::new(18);
9414
9415 #[doc = "Initial output is High. Output retained at cycle end. Output toggled at GTCCRB compare match."]
9416 pub const _10011: Self = Self::new(19);
9417
9418 #[doc = "Initial output is High. Low output at cycle end. Output retained at GTCCRB compare match."]
9419 pub const _10100: Self = Self::new(20);
9420
9421 #[doc = "Initial output is High. Low output at cycle end. Low output at GTCCRB compare match."]
9422 pub const _10101: Self = Self::new(21);
9423
9424 #[doc = "Initial output is High. Low output at cycle end. High output at GTCCRB compare match."]
9425 pub const _10110: Self = Self::new(22);
9426
9427 #[doc = "Initial output is High. Low output at cycle end. Output toggled at GTCCRB compare match."]
9428 pub const _10111: Self = Self::new(23);
9429
9430 #[doc = "Initial output is High. High output at cycle end. Output retained at GTCCRB compare match."]
9431 pub const _11000: Self = Self::new(24);
9432
9433 #[doc = "Initial output is High. High output at cycle end. Low output at GTCCRB compare match."]
9434 pub const _11001: Self = Self::new(25);
9435
9436 #[doc = "Initial output is High. High output at cycle end. High output at GTCCRB compare match."]
9437 pub const _11010: Self = Self::new(26);
9438
9439 #[doc = "Initial output is High. High output at cycle end. Output toggled at GTCCRB compare match."]
9440 pub const _11011: Self = Self::new(27);
9441
9442 #[doc = "Initial output is High. Output toggled at cycle end. Output retained at GTCCRB compare match."]
9443 pub const _11100: Self = Self::new(28);
9444
9445 #[doc = "Initial output is High. Output toggled at cycle end. Low output at GTCCRB compare match."]
9446 pub const _11101: Self = Self::new(29);
9447
9448 #[doc = "Initial output is High. Output toggled at cycle end. High output at GTCCRB compare match."]
9449 pub const _11110: Self = Self::new(30);
9450
9451 #[doc = "Initial output is High. Output toggled at cycle end. Output toggled at GTCCRB compare match."]
9452 pub const _11111: Self = Self::new(31);
9453 }
9454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9455 pub struct Nfcsa_SPEC;
9456 pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
9457 impl Nfcsa {
9458 #[doc = "PCLK/1"]
9459 pub const _00: Self = Self::new(0);
9460
9461 #[doc = "PCLK/4"]
9462 pub const _01: Self = Self::new(1);
9463
9464 #[doc = "PCLK/16"]
9465 pub const _10: Self = Self::new(2);
9466
9467 #[doc = "PCLK/64"]
9468 pub const _11: Self = Self::new(3);
9469 }
9470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9471 pub struct Nfaen_SPEC;
9472 pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
9473 impl Nfaen {
9474 #[doc = "Disable noise filter for GTIOCA pin"]
9475 pub const _0: Self = Self::new(0);
9476
9477 #[doc = "Enable noise filter for GTIOCA pin."]
9478 pub const _1: Self = Self::new(1);
9479 }
9480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9481 pub struct Oadf_SPEC;
9482 pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
9483 impl Oadf {
9484 #[doc = "Prohibit output disable"]
9485 pub const _00: Self = Self::new(0);
9486
9487 #[doc = "Set GTIOCA pin to Hi-Z on output disable"]
9488 pub const _01: Self = Self::new(1);
9489
9490 #[doc = "Set GTIOCA pin to 0 on output disable"]
9491 pub const _10: Self = Self::new(2);
9492
9493 #[doc = "Set GTIOCA pin to 1 on output disable."]
9494 pub const _11: Self = Self::new(3);
9495 }
9496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9497 pub struct Oae_SPEC;
9498 pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
9499 impl Oae {
9500 #[doc = "Disable output"]
9501 pub const _0: Self = Self::new(0);
9502
9503 #[doc = "Enable output."]
9504 pub const _1: Self = Self::new(1);
9505 }
9506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9507 pub struct Oahld_SPEC;
9508 pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
9509 impl Oahld {
9510 #[doc = "Set GTIOCA pin output level on counting start and stop based on the register setting."]
9511 pub const _0: Self = Self::new(0);
9512
9513 #[doc = "Retain GTIOCA pin output level on counting start and stop"]
9514 pub const _1: Self = Self::new(1);
9515 }
9516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9517 pub struct Oadflt_SPEC;
9518 pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
9519 impl Oadflt {
9520 #[doc = "Output low on GTIOCA pin when counting stops"]
9521 pub const _0: Self = Self::new(0);
9522
9523 #[doc = "Output high on GTIOCA pin when counting stops."]
9524 pub const _1: Self = Self::new(1);
9525 }
9526 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9527 pub struct Gtioa_SPEC;
9528 pub type Gtioa = crate::EnumBitfieldStruct<u8, Gtioa_SPEC>;
9529 impl Gtioa {
9530 #[doc = "Initial output is Low. Output retained at cycle end. Output retained at GTCCRA compare match."]
9531 pub const _00000: Self = Self::new(0);
9532
9533 #[doc = "Initial output is Low. Output retained at cycle end. Low output at GTCCRA compare match."]
9534 pub const _00001: Self = Self::new(1);
9535
9536 #[doc = "Initial output is Low. Output retained at cycle end. High output at GTCCRA compare match."]
9537 pub const _00010: Self = Self::new(2);
9538
9539 #[doc = "Initial output is Low. Output retained at cycle end. Output toggled at GTCCRA compare match."]
9540 pub const _00011: Self = Self::new(3);
9541
9542 #[doc = "Initial output is Low. Low output at cycle end. Output retained at GTCCRA compare match."]
9543 pub const _00100: Self = Self::new(4);
9544
9545 #[doc = "Initial output is Low. Low output at cycle end. Low output at GTCCRA compare match."]
9546 pub const _00101: Self = Self::new(5);
9547
9548 #[doc = "Initial output is Low. Low output at cycle end. High output at GTCCRA compare match."]
9549 pub const _00110: Self = Self::new(6);
9550
9551 #[doc = "Initial output is Low. Low output at cycle end. Output toggled at GTCCRA compare match."]
9552 pub const _00111: Self = Self::new(7);
9553
9554 #[doc = "Initial output is Low. High output at cycle end. Output retained at GTCCRA compare match."]
9555 pub const _01000: Self = Self::new(8);
9556
9557 #[doc = "Initial output is Low. High output at cycle end. Low output at GTCCRA compare match."]
9558 pub const _01001: Self = Self::new(9);
9559
9560 #[doc = "Initial output is Low. High output at cycle end. High output at GTCCRA compare match."]
9561 pub const _01010: Self = Self::new(10);
9562
9563 #[doc = "Initial output is Low. High output at cycle end. Output toggled at GTCCRA compare match."]
9564 pub const _01011: Self = Self::new(11);
9565
9566 #[doc = "Initial output is Low. Output toggled at cycle end. Output retained at GTCCRA compare match."]
9567 pub const _01100: Self = Self::new(12);
9568
9569 #[doc = "Initial output is Low. Output toggled at cycle end. Low output at GTCCRA compare match."]
9570 pub const _01101: Self = Self::new(13);
9571
9572 #[doc = "Initial output is Low. Output toggled at cycle end. High output at GTCCRA compare match."]
9573 pub const _01110: Self = Self::new(14);
9574
9575 #[doc = "Initial output is Low. Output toggled at cycle end. Output toggled at GTCCRA compare match."]
9576 pub const _01111: Self = Self::new(15);
9577
9578 #[doc = "Initial output is High. Output retained at cycle end. Output retained at GTCCRA compare match."]
9579 pub const _10000: Self = Self::new(16);
9580
9581 #[doc = "Initial output is High. Output retained at cycle end. Low output at GTCCRA compare match."]
9582 pub const _10001: Self = Self::new(17);
9583
9584 #[doc = "Initial output is High. Output retained at cycle end. High output at GTCCRA compare match."]
9585 pub const _10010: Self = Self::new(18);
9586
9587 #[doc = "Initial output is High. Output retained at cycle end. Output toggled at GTCCRA compare match."]
9588 pub const _10011: Self = Self::new(19);
9589
9590 #[doc = "Initial output is High. Low output at cycle end. Output retained at GTCCRA compare match."]
9591 pub const _10100: Self = Self::new(20);
9592
9593 #[doc = "Initial output is High. Low output at cycle end. Low output at GTCCRA compare match."]
9594 pub const _10101: Self = Self::new(21);
9595
9596 #[doc = "Initial output is High. Low output at cycle end. High output at GTCCRA compare match."]
9597 pub const _10110: Self = Self::new(22);
9598
9599 #[doc = "Initial output is High. Low output at cycle end. Output toggled at GTCCRA compare match."]
9600 pub const _10111: Self = Self::new(23);
9601
9602 #[doc = "Initial output is High. High output at cycle end. Output retained at GTCCRA compare match."]
9603 pub const _11000: Self = Self::new(24);
9604
9605 #[doc = "Initial output is High. High output at cycle end. Low output at GTCCRA compare match."]
9606 pub const _11001: Self = Self::new(25);
9607
9608 #[doc = "Initial output is High. High output at cycle end. High output at GTCCRA compare match."]
9609 pub const _11010: Self = Self::new(26);
9610
9611 #[doc = "Initial output is High. High output at cycle end. Output toggled at GTCCRA compare match."]
9612 pub const _11011: Self = Self::new(27);
9613
9614 #[doc = "Initial output is High. Output toggled at cycle end. Output retained at GTCCRA compare match."]
9615 pub const _11100: Self = Self::new(28);
9616
9617 #[doc = "Initial output is High. Output toggled at cycle end. Low output at GTCCRA compare match."]
9618 pub const _11101: Self = Self::new(29);
9619
9620 #[doc = "Initial output is High. Output toggled at cycle end. High output at GTCCRA compare match."]
9621 pub const _11110: Self = Self::new(30);
9622
9623 #[doc = "Initial output is High. Output toggled at cycle end. Output toggled at GTCCRA compare match."]
9624 pub const _11111: Self = Self::new(31);
9625 }
9626}
9627#[doc(hidden)]
9628#[derive(Copy, Clone, Eq, PartialEq)]
9629pub struct Gtintad_SPEC;
9630impl crate::sealed::RegSpec for Gtintad_SPEC {
9631 type DataType = u32;
9632}
9633
9634#[doc = "General PWM Timer Interrupt Output Setting Register"]
9635pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
9636
9637impl Gtintad {
9638 #[doc = "Same Time Output Level Low Disable Request Enable"]
9639 #[inline(always)]
9640 pub fn grpabl(
9641 self,
9642 ) -> crate::common::RegisterField<
9643 30,
9644 0x1,
9645 1,
9646 0,
9647 gtintad::Grpabl,
9648 gtintad::Grpabl,
9649 Gtintad_SPEC,
9650 crate::common::RW,
9651 > {
9652 crate::common::RegisterField::<
9653 30,
9654 0x1,
9655 1,
9656 0,
9657 gtintad::Grpabl,
9658 gtintad::Grpabl,
9659 Gtintad_SPEC,
9660 crate::common::RW,
9661 >::from_register(self, 0)
9662 }
9663
9664 #[doc = "Same Time Output Level High Disable Request Enable"]
9665 #[inline(always)]
9666 pub fn grpabh(
9667 self,
9668 ) -> crate::common::RegisterField<
9669 29,
9670 0x1,
9671 1,
9672 0,
9673 gtintad::Grpabh,
9674 gtintad::Grpabh,
9675 Gtintad_SPEC,
9676 crate::common::RW,
9677 > {
9678 crate::common::RegisterField::<
9679 29,
9680 0x1,
9681 1,
9682 0,
9683 gtintad::Grpabh,
9684 gtintad::Grpabh,
9685 Gtintad_SPEC,
9686 crate::common::RW,
9687 >::from_register(self, 0)
9688 }
9689
9690 #[doc = "Dead Time Error Output Disable Request Enable"]
9691 #[inline(always)]
9692 pub fn grpdte(
9693 self,
9694 ) -> crate::common::RegisterField<
9695 28,
9696 0x1,
9697 1,
9698 0,
9699 gtintad::Grpdte,
9700 gtintad::Grpdte,
9701 Gtintad_SPEC,
9702 crate::common::RW,
9703 > {
9704 crate::common::RegisterField::<
9705 28,
9706 0x1,
9707 1,
9708 0,
9709 gtintad::Grpdte,
9710 gtintad::Grpdte,
9711 Gtintad_SPEC,
9712 crate::common::RW,
9713 >::from_register(self, 0)
9714 }
9715
9716 #[doc = "Output Disable Source Select"]
9717 #[inline(always)]
9718 pub fn grp(
9719 self,
9720 ) -> crate::common::RegisterField<
9721 24,
9722 0x3,
9723 1,
9724 0,
9725 gtintad::Grp,
9726 gtintad::Grp,
9727 Gtintad_SPEC,
9728 crate::common::RW,
9729 > {
9730 crate::common::RegisterField::<
9731 24,
9732 0x3,
9733 1,
9734 0,
9735 gtintad::Grp,
9736 gtintad::Grp,
9737 Gtintad_SPEC,
9738 crate::common::RW,
9739 >::from_register(self, 0)
9740 }
9741
9742 #[doc = "GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable"]
9743 #[inline(always)]
9744 pub fn adtrbden(
9745 self,
9746 ) -> crate::common::RegisterField<
9747 19,
9748 0x1,
9749 1,
9750 0,
9751 gtintad::Adtrbden,
9752 gtintad::Adtrbden,
9753 Gtintad_SPEC,
9754 crate::common::RW,
9755 > {
9756 crate::common::RegisterField::<
9757 19,
9758 0x1,
9759 1,
9760 0,
9761 gtintad::Adtrbden,
9762 gtintad::Adtrbden,
9763 Gtintad_SPEC,
9764 crate::common::RW,
9765 >::from_register(self, 0)
9766 }
9767
9768 #[doc = "GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable"]
9769 #[inline(always)]
9770 pub fn adtrbuen(
9771 self,
9772 ) -> crate::common::RegisterField<
9773 18,
9774 0x1,
9775 1,
9776 0,
9777 gtintad::Adtrbuen,
9778 gtintad::Adtrbuen,
9779 Gtintad_SPEC,
9780 crate::common::RW,
9781 > {
9782 crate::common::RegisterField::<
9783 18,
9784 0x1,
9785 1,
9786 0,
9787 gtintad::Adtrbuen,
9788 gtintad::Adtrbuen,
9789 Gtintad_SPEC,
9790 crate::common::RW,
9791 >::from_register(self, 0)
9792 }
9793
9794 #[doc = "GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable"]
9795 #[inline(always)]
9796 pub fn adtraden(
9797 self,
9798 ) -> crate::common::RegisterField<
9799 17,
9800 0x1,
9801 1,
9802 0,
9803 gtintad::Adtraden,
9804 gtintad::Adtraden,
9805 Gtintad_SPEC,
9806 crate::common::RW,
9807 > {
9808 crate::common::RegisterField::<
9809 17,
9810 0x1,
9811 1,
9812 0,
9813 gtintad::Adtraden,
9814 gtintad::Adtraden,
9815 Gtintad_SPEC,
9816 crate::common::RW,
9817 >::from_register(self, 0)
9818 }
9819
9820 #[doc = "GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable"]
9821 #[inline(always)]
9822 pub fn adtrauen(
9823 self,
9824 ) -> crate::common::RegisterField<
9825 16,
9826 0x1,
9827 1,
9828 0,
9829 gtintad::Adtrauen,
9830 gtintad::Adtrauen,
9831 Gtintad_SPEC,
9832 crate::common::RW,
9833 > {
9834 crate::common::RegisterField::<
9835 16,
9836 0x1,
9837 1,
9838 0,
9839 gtintad::Adtrauen,
9840 gtintad::Adtrauen,
9841 Gtintad_SPEC,
9842 crate::common::RW,
9843 >::from_register(self, 0)
9844 }
9845}
9846impl ::core::default::Default for Gtintad {
9847 #[inline(always)]
9848 fn default() -> Gtintad {
9849 <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
9850 }
9851}
9852pub mod gtintad {
9853
9854 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9855 pub struct Grpabl_SPEC;
9856 pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
9857 impl Grpabl {
9858 #[doc = "Disable same time output level low disable request"]
9859 pub const _0: Self = Self::new(0);
9860
9861 #[doc = "Enable same time output level low disable request"]
9862 pub const _1: Self = Self::new(1);
9863 }
9864 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9865 pub struct Grpabh_SPEC;
9866 pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
9867 impl Grpabh {
9868 #[doc = "Disable same time output level high disable request"]
9869 pub const _0: Self = Self::new(0);
9870
9871 #[doc = "Enable same time output level high disable request"]
9872 pub const _1: Self = Self::new(1);
9873 }
9874 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9875 pub struct Grpdte_SPEC;
9876 pub type Grpdte = crate::EnumBitfieldStruct<u8, Grpdte_SPEC>;
9877 impl Grpdte {
9878 #[doc = "Disable dead time error output disable request"]
9879 pub const _0: Self = Self::new(0);
9880
9881 #[doc = "Enable dead time error output disable request"]
9882 pub const _1: Self = Self::new(1);
9883 }
9884 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9885 pub struct Grp_SPEC;
9886 pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
9887 impl Grp {
9888 #[doc = "Select Group A output disable request"]
9889 pub const _00: Self = Self::new(0);
9890
9891 #[doc = "Select Group B output disable request"]
9892 pub const _01: Self = Self::new(1);
9893
9894 #[doc = "Select Group C output disable request"]
9895 pub const _10: Self = Self::new(2);
9896
9897 #[doc = "Select Group D output disable request."]
9898 pub const _11: Self = Self::new(3);
9899 }
9900 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9901 pub struct Adtrbden_SPEC;
9902 pub type Adtrbden = crate::EnumBitfieldStruct<u8, Adtrbden_SPEC>;
9903 impl Adtrbden {
9904 #[doc = "Disable A/D converter start request"]
9905 pub const _0: Self = Self::new(0);
9906
9907 #[doc = "Enable A/D converter start request."]
9908 pub const _1: Self = Self::new(1);
9909 }
9910 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9911 pub struct Adtrbuen_SPEC;
9912 pub type Adtrbuen = crate::EnumBitfieldStruct<u8, Adtrbuen_SPEC>;
9913 impl Adtrbuen {
9914 #[doc = "Disable A/D converter start request"]
9915 pub const _0: Self = Self::new(0);
9916
9917 #[doc = "Enable A/D converter start request."]
9918 pub const _1: Self = Self::new(1);
9919 }
9920 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9921 pub struct Adtraden_SPEC;
9922 pub type Adtraden = crate::EnumBitfieldStruct<u8, Adtraden_SPEC>;
9923 impl Adtraden {
9924 #[doc = "Disable A/D converter start request"]
9925 pub const _0: Self = Self::new(0);
9926
9927 #[doc = "Enable A/D converter start request."]
9928 pub const _1: Self = Self::new(1);
9929 }
9930 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9931 pub struct Adtrauen_SPEC;
9932 pub type Adtrauen = crate::EnumBitfieldStruct<u8, Adtrauen_SPEC>;
9933 impl Adtrauen {
9934 #[doc = "Disable A/D converter start request"]
9935 pub const _0: Self = Self::new(0);
9936
9937 #[doc = "Enable A/D converter start request."]
9938 pub const _1: Self = Self::new(1);
9939 }
9940}
9941#[doc(hidden)]
9942#[derive(Copy, Clone, Eq, PartialEq)]
9943pub struct Gtst_SPEC;
9944impl crate::sealed::RegSpec for Gtst_SPEC {
9945 type DataType = u32;
9946}
9947
9948#[doc = "General PWM Timer Status Register"]
9949pub type Gtst = crate::RegValueT<Gtst_SPEC>;
9950
9951impl Gtst {
9952 #[doc = "Same Time Output Level Low Disable Request Enable"]
9953 #[inline(always)]
9954 pub fn oablf(
9955 self,
9956 ) -> crate::common::RegisterField<
9957 30,
9958 0x1,
9959 1,
9960 0,
9961 gtst::Oablf,
9962 gtst::Oablf,
9963 Gtst_SPEC,
9964 crate::common::R,
9965 > {
9966 crate::common::RegisterField::<
9967 30,
9968 0x1,
9969 1,
9970 0,
9971 gtst::Oablf,
9972 gtst::Oablf,
9973 Gtst_SPEC,
9974 crate::common::R,
9975 >::from_register(self, 0)
9976 }
9977
9978 #[doc = "Same Time Output Level High Disable Request Enable"]
9979 #[inline(always)]
9980 pub fn oabhf(
9981 self,
9982 ) -> crate::common::RegisterField<
9983 29,
9984 0x1,
9985 1,
9986 0,
9987 gtst::Oabhf,
9988 gtst::Oabhf,
9989 Gtst_SPEC,
9990 crate::common::R,
9991 > {
9992 crate::common::RegisterField::<
9993 29,
9994 0x1,
9995 1,
9996 0,
9997 gtst::Oabhf,
9998 gtst::Oabhf,
9999 Gtst_SPEC,
10000 crate::common::R,
10001 >::from_register(self, 0)
10002 }
10003
10004 #[doc = "Dead Time Error Flag"]
10005 #[inline(always)]
10006 pub fn dtef(
10007 self,
10008 ) -> crate::common::RegisterField<
10009 28,
10010 0x1,
10011 1,
10012 0,
10013 gtst::Dtef,
10014 gtst::Dtef,
10015 Gtst_SPEC,
10016 crate::common::R,
10017 > {
10018 crate::common::RegisterField::<
10019 28,
10020 0x1,
10021 1,
10022 0,
10023 gtst::Dtef,
10024 gtst::Dtef,
10025 Gtst_SPEC,
10026 crate::common::R,
10027 >::from_register(self, 0)
10028 }
10029
10030 #[doc = "Output Disable Flag"]
10031 #[inline(always)]
10032 pub fn odf(
10033 self,
10034 ) -> crate::common::RegisterField<
10035 24,
10036 0x1,
10037 1,
10038 0,
10039 gtst::Odf,
10040 gtst::Odf,
10041 Gtst_SPEC,
10042 crate::common::R,
10043 > {
10044 crate::common::RegisterField::<
10045 24,
10046 0x1,
10047 1,
10048 0,
10049 gtst::Odf,
10050 gtst::Odf,
10051 Gtst_SPEC,
10052 crate::common::R,
10053 >::from_register(self, 0)
10054 }
10055
10056 #[doc = "Count Direction Flag"]
10057 #[inline(always)]
10058 pub fn tucf(
10059 self,
10060 ) -> crate::common::RegisterField<
10061 15,
10062 0x1,
10063 1,
10064 0,
10065 gtst::Tucf,
10066 gtst::Tucf,
10067 Gtst_SPEC,
10068 crate::common::R,
10069 > {
10070 crate::common::RegisterField::<
10071 15,
10072 0x1,
10073 1,
10074 0,
10075 gtst::Tucf,
10076 gtst::Tucf,
10077 Gtst_SPEC,
10078 crate::common::R,
10079 >::from_register(self, 0)
10080 }
10081
10082 #[doc = "GTCIV/GTCIU Interrupt Skipping Count Counter(Counter for counting the number of times a timer interrupt has been skipped.)"]
10083 #[inline(always)]
10084 pub fn itcnt(
10085 self,
10086 ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Gtst_SPEC, crate::common::R> {
10087 crate::common::RegisterField::<8,0x7,1,0,u8,u8,Gtst_SPEC,crate::common::R>::from_register(self,0)
10088 }
10089
10090 #[doc = "Underflow Flag"]
10091 #[inline(always)]
10092 pub fn tcfpu(
10093 self,
10094 ) -> crate::common::RegisterField<
10095 7,
10096 0x1,
10097 1,
10098 0,
10099 gtst::Tcfpu,
10100 gtst::Tcfpu,
10101 Gtst_SPEC,
10102 crate::common::RW,
10103 > {
10104 crate::common::RegisterField::<
10105 7,
10106 0x1,
10107 1,
10108 0,
10109 gtst::Tcfpu,
10110 gtst::Tcfpu,
10111 Gtst_SPEC,
10112 crate::common::RW,
10113 >::from_register(self, 0)
10114 }
10115
10116 #[doc = "Overflow Flag"]
10117 #[inline(always)]
10118 pub fn tcfpo(
10119 self,
10120 ) -> crate::common::RegisterField<
10121 6,
10122 0x1,
10123 1,
10124 0,
10125 gtst::Tcfpo,
10126 gtst::Tcfpo,
10127 Gtst_SPEC,
10128 crate::common::RW,
10129 > {
10130 crate::common::RegisterField::<
10131 6,
10132 0x1,
10133 1,
10134 0,
10135 gtst::Tcfpo,
10136 gtst::Tcfpo,
10137 Gtst_SPEC,
10138 crate::common::RW,
10139 >::from_register(self, 0)
10140 }
10141
10142 #[doc = "Input Compare Match Flag F"]
10143 #[inline(always)]
10144 pub fn tcff(
10145 self,
10146 ) -> crate::common::RegisterField<
10147 5,
10148 0x1,
10149 1,
10150 0,
10151 gtst::Tcff,
10152 gtst::Tcff,
10153 Gtst_SPEC,
10154 crate::common::RW,
10155 > {
10156 crate::common::RegisterField::<
10157 5,
10158 0x1,
10159 1,
10160 0,
10161 gtst::Tcff,
10162 gtst::Tcff,
10163 Gtst_SPEC,
10164 crate::common::RW,
10165 >::from_register(self, 0)
10166 }
10167
10168 #[doc = "Input Compare Match Flag E"]
10169 #[inline(always)]
10170 pub fn tcfe(
10171 self,
10172 ) -> crate::common::RegisterField<
10173 4,
10174 0x1,
10175 1,
10176 0,
10177 gtst::Tcfe,
10178 gtst::Tcfe,
10179 Gtst_SPEC,
10180 crate::common::RW,
10181 > {
10182 crate::common::RegisterField::<
10183 4,
10184 0x1,
10185 1,
10186 0,
10187 gtst::Tcfe,
10188 gtst::Tcfe,
10189 Gtst_SPEC,
10190 crate::common::RW,
10191 >::from_register(self, 0)
10192 }
10193
10194 #[doc = "Input Compare Match Flag D"]
10195 #[inline(always)]
10196 pub fn tcfd(
10197 self,
10198 ) -> crate::common::RegisterField<
10199 3,
10200 0x1,
10201 1,
10202 0,
10203 gtst::Tcfd,
10204 gtst::Tcfd,
10205 Gtst_SPEC,
10206 crate::common::RW,
10207 > {
10208 crate::common::RegisterField::<
10209 3,
10210 0x1,
10211 1,
10212 0,
10213 gtst::Tcfd,
10214 gtst::Tcfd,
10215 Gtst_SPEC,
10216 crate::common::RW,
10217 >::from_register(self, 0)
10218 }
10219
10220 #[doc = "Input Compare Match Flag C"]
10221 #[inline(always)]
10222 pub fn tcfc(
10223 self,
10224 ) -> crate::common::RegisterField<
10225 2,
10226 0x1,
10227 1,
10228 0,
10229 gtst::Tcfc,
10230 gtst::Tcfc,
10231 Gtst_SPEC,
10232 crate::common::RW,
10233 > {
10234 crate::common::RegisterField::<
10235 2,
10236 0x1,
10237 1,
10238 0,
10239 gtst::Tcfc,
10240 gtst::Tcfc,
10241 Gtst_SPEC,
10242 crate::common::RW,
10243 >::from_register(self, 0)
10244 }
10245
10246 #[doc = "Input Capture/Compare Match Flag B"]
10247 #[inline(always)]
10248 pub fn tcfb(
10249 self,
10250 ) -> crate::common::RegisterField<
10251 1,
10252 0x1,
10253 1,
10254 0,
10255 gtst::Tcfb,
10256 gtst::Tcfb,
10257 Gtst_SPEC,
10258 crate::common::RW,
10259 > {
10260 crate::common::RegisterField::<
10261 1,
10262 0x1,
10263 1,
10264 0,
10265 gtst::Tcfb,
10266 gtst::Tcfb,
10267 Gtst_SPEC,
10268 crate::common::RW,
10269 >::from_register(self, 0)
10270 }
10271
10272 #[doc = "Input Capture/Compare Match Flag A"]
10273 #[inline(always)]
10274 pub fn tcfa(
10275 self,
10276 ) -> crate::common::RegisterField<
10277 0,
10278 0x1,
10279 1,
10280 0,
10281 gtst::Tcfa,
10282 gtst::Tcfa,
10283 Gtst_SPEC,
10284 crate::common::RW,
10285 > {
10286 crate::common::RegisterField::<
10287 0,
10288 0x1,
10289 1,
10290 0,
10291 gtst::Tcfa,
10292 gtst::Tcfa,
10293 Gtst_SPEC,
10294 crate::common::RW,
10295 >::from_register(self, 0)
10296 }
10297}
10298impl ::core::default::Default for Gtst {
10299 #[inline(always)]
10300 fn default() -> Gtst {
10301 <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
10302 }
10303}
10304pub mod gtst {
10305
10306 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10307 pub struct Oablf_SPEC;
10308 pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
10309 impl Oablf {
10310 #[doc = "GTIOCA pin and GTIOCB pin don\'t output 0 at the same time."]
10311 pub const _0: Self = Self::new(0);
10312
10313 #[doc = "GTIOCA pin and GTIOCB pin output 0 at the same time."]
10314 pub const _1: Self = Self::new(1);
10315 }
10316 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10317 pub struct Oabhf_SPEC;
10318 pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
10319 impl Oabhf {
10320 #[doc = "GTIOCA pin and GTIOCB pin don\'t output 1 at the same time."]
10321 pub const _0: Self = Self::new(0);
10322
10323 #[doc = "GTIOCA pin and GTIOCB pin output 1 at the same time."]
10324 pub const _1: Self = Self::new(1);
10325 }
10326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10327 pub struct Dtef_SPEC;
10328 pub type Dtef = crate::EnumBitfieldStruct<u8, Dtef_SPEC>;
10329 impl Dtef {
10330 #[doc = "No dead time error has occurred."]
10331 pub const _0: Self = Self::new(0);
10332
10333 #[doc = "A dead time error has occurred."]
10334 pub const _1: Self = Self::new(1);
10335 }
10336 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10337 pub struct Odf_SPEC;
10338 pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
10339 impl Odf {
10340 #[doc = "No output disable request is generated."]
10341 pub const _0: Self = Self::new(0);
10342
10343 #[doc = "An output disable request is generated."]
10344 pub const _1: Self = Self::new(1);
10345 }
10346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10347 pub struct Tucf_SPEC;
10348 pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
10349 impl Tucf {
10350 #[doc = "GTCNT counter is counting down"]
10351 pub const _0: Self = Self::new(0);
10352
10353 #[doc = "GTCNT counter is counting up."]
10354 pub const _1: Self = Self::new(1);
10355 }
10356 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10357 pub struct Tcfpu_SPEC;
10358 pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
10359 impl Tcfpu {
10360 #[doc = "No underflow (trough) has occurred."]
10361 pub const _0: Self = Self::new(0);
10362
10363 #[doc = "An underflow (trough) has occurred."]
10364 pub const _1: Self = Self::new(1);
10365 }
10366 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10367 pub struct Tcfpo_SPEC;
10368 pub type Tcfpo = crate::EnumBitfieldStruct<u8, Tcfpo_SPEC>;
10369 impl Tcfpo {
10370 #[doc = "No overflow (crest) has occurred."]
10371 pub const _0: Self = Self::new(0);
10372
10373 #[doc = "An overflow (crest) has occurred."]
10374 pub const _1: Self = Self::new(1);
10375 }
10376 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10377 pub struct Tcff_SPEC;
10378 pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
10379 impl Tcff {
10380 #[doc = "No compare match of GTCCRF is generated."]
10381 pub const _0: Self = Self::new(0);
10382
10383 #[doc = "A compare match of GTCCRF is generated."]
10384 pub const _1: Self = Self::new(1);
10385 }
10386 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10387 pub struct Tcfe_SPEC;
10388 pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
10389 impl Tcfe {
10390 #[doc = "No compare match of GTCCRE is generated."]
10391 pub const _0: Self = Self::new(0);
10392
10393 #[doc = "A compare match of GTCCRE is generated."]
10394 pub const _1: Self = Self::new(1);
10395 }
10396 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10397 pub struct Tcfd_SPEC;
10398 pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
10399 impl Tcfd {
10400 #[doc = "No compare match of GTCCRD is generated."]
10401 pub const _0: Self = Self::new(0);
10402
10403 #[doc = "A compare match of GTCCRD is generated."]
10404 pub const _1: Self = Self::new(1);
10405 }
10406 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10407 pub struct Tcfc_SPEC;
10408 pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
10409 impl Tcfc {
10410 #[doc = "No compare match of GTCCRC is generated."]
10411 pub const _0: Self = Self::new(0);
10412
10413 #[doc = "A compare match of GTCCRC is generated."]
10414 pub const _1: Self = Self::new(1);
10415 }
10416 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10417 pub struct Tcfb_SPEC;
10418 pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
10419 impl Tcfb {
10420 #[doc = "No input capture/compare match of GTCCRB is generated."]
10421 pub const _0: Self = Self::new(0);
10422
10423 #[doc = "An input capture/compare match of GTCCRB is generated."]
10424 pub const _1: Self = Self::new(1);
10425 }
10426 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10427 pub struct Tcfa_SPEC;
10428 pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
10429 impl Tcfa {
10430 #[doc = "No input capture/compare match of GTCCRA is generated."]
10431 pub const _0: Self = Self::new(0);
10432
10433 #[doc = "An input capture/compare match of GTCCRA is generated."]
10434 pub const _1: Self = Self::new(1);
10435 }
10436}
10437#[doc(hidden)]
10438#[derive(Copy, Clone, Eq, PartialEq)]
10439pub struct Gtber_SPEC;
10440impl crate::sealed::RegSpec for Gtber_SPEC {
10441 type DataType = u32;
10442}
10443
10444#[doc = "General PWM Timer Buffer Enable Register"]
10445pub type Gtber = crate::RegValueT<Gtber_SPEC>;
10446
10447impl Gtber {
10448 #[doc = "GTADTRB Double Buffer Operation"]
10449 #[inline(always)]
10450 pub fn adtdb(
10451 self,
10452 ) -> crate::common::RegisterField<
10453 30,
10454 0x1,
10455 1,
10456 0,
10457 gtber::Adtdb,
10458 gtber::Adtdb,
10459 Gtber_SPEC,
10460 crate::common::RW,
10461 > {
10462 crate::common::RegisterField::<
10463 30,
10464 0x1,
10465 1,
10466 0,
10467 gtber::Adtdb,
10468 gtber::Adtdb,
10469 Gtber_SPEC,
10470 crate::common::RW,
10471 >::from_register(self, 0)
10472 }
10473
10474 #[doc = "GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves, values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed."]
10475 #[inline(always)]
10476 pub fn adttb(
10477 self,
10478 ) -> crate::common::RegisterField<
10479 28,
10480 0x3,
10481 1,
10482 0,
10483 gtber::Adttb,
10484 gtber::Adttb,
10485 Gtber_SPEC,
10486 crate::common::RW,
10487 > {
10488 crate::common::RegisterField::<
10489 28,
10490 0x3,
10491 1,
10492 0,
10493 gtber::Adttb,
10494 gtber::Adttb,
10495 Gtber_SPEC,
10496 crate::common::RW,
10497 >::from_register(self, 0)
10498 }
10499
10500 #[doc = "GTADTRA Double Buffer Operation"]
10501 #[inline(always)]
10502 pub fn adtda(
10503 self,
10504 ) -> crate::common::RegisterField<
10505 26,
10506 0x1,
10507 1,
10508 0,
10509 gtber::Adtda,
10510 gtber::Adtda,
10511 Gtber_SPEC,
10512 crate::common::RW,
10513 > {
10514 crate::common::RegisterField::<
10515 26,
10516 0x1,
10517 1,
10518 0,
10519 gtber::Adtda,
10520 gtber::Adtda,
10521 Gtber_SPEC,
10522 crate::common::RW,
10523 >::from_register(self, 0)
10524 }
10525
10526 #[doc = "GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves, values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed."]
10527 #[inline(always)]
10528 pub fn adtta(
10529 self,
10530 ) -> crate::common::RegisterField<
10531 24,
10532 0x3,
10533 1,
10534 0,
10535 gtber::Adtta,
10536 gtber::Adtta,
10537 Gtber_SPEC,
10538 crate::common::RW,
10539 > {
10540 crate::common::RegisterField::<
10541 24,
10542 0x3,
10543 1,
10544 0,
10545 gtber::Adtta,
10546 gtber::Adtta,
10547 Gtber_SPEC,
10548 crate::common::RW,
10549 >::from_register(self, 0)
10550 }
10551
10552 #[doc = "GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0."]
10553 #[inline(always)]
10554 pub fn ccrswt(
10555 self,
10556 ) -> crate::common::RegisterField<
10557 22,
10558 0x1,
10559 1,
10560 0,
10561 gtber::Ccrswt,
10562 gtber::Ccrswt,
10563 Gtber_SPEC,
10564 crate::common::W,
10565 > {
10566 crate::common::RegisterField::<
10567 22,
10568 0x1,
10569 1,
10570 0,
10571 gtber::Ccrswt,
10572 gtber::Ccrswt,
10573 Gtber_SPEC,
10574 crate::common::W,
10575 >::from_register(self, 0)
10576 }
10577
10578 #[doc = "GTPR Buffer Operation"]
10579 #[inline(always)]
10580 pub fn pr(
10581 self,
10582 ) -> crate::common::RegisterField<
10583 20,
10584 0x3,
10585 1,
10586 0,
10587 gtber::Pr,
10588 gtber::Pr,
10589 Gtber_SPEC,
10590 crate::common::RW,
10591 > {
10592 crate::common::RegisterField::<
10593 20,
10594 0x3,
10595 1,
10596 0,
10597 gtber::Pr,
10598 gtber::Pr,
10599 Gtber_SPEC,
10600 crate::common::RW,
10601 >::from_register(self, 0)
10602 }
10603
10604 #[doc = "GTCCRB Buffer Operation"]
10605 #[inline(always)]
10606 pub fn ccrb(
10607 self,
10608 ) -> crate::common::RegisterField<
10609 18,
10610 0x3,
10611 1,
10612 0,
10613 gtber::Ccrb,
10614 gtber::Ccrb,
10615 Gtber_SPEC,
10616 crate::common::RW,
10617 > {
10618 crate::common::RegisterField::<
10619 18,
10620 0x3,
10621 1,
10622 0,
10623 gtber::Ccrb,
10624 gtber::Ccrb,
10625 Gtber_SPEC,
10626 crate::common::RW,
10627 >::from_register(self, 0)
10628 }
10629
10630 #[doc = "GTCCRA Buffer Operation"]
10631 #[inline(always)]
10632 pub fn ccra(
10633 self,
10634 ) -> crate::common::RegisterField<
10635 16,
10636 0x3,
10637 1,
10638 0,
10639 gtber::Ccra,
10640 gtber::Ccra,
10641 Gtber_SPEC,
10642 crate::common::RW,
10643 > {
10644 crate::common::RegisterField::<
10645 16,
10646 0x3,
10647 1,
10648 0,
10649 gtber::Ccra,
10650 gtber::Ccra,
10651 Gtber_SPEC,
10652 crate::common::RW,
10653 >::from_register(self, 0)
10654 }
10655
10656 #[doc = "BD\\[3\\]: GTDV Buffer Operation DisableBD\\[2\\]: GTADTR Buffer Operation DisableBD\\[1\\]: GTPR Buffer Operation DisableBD\\[0\\]: GTCCR Buffer Operation Disable"]
10657 #[inline(always)]
10658 pub fn bd(
10659 self,
10660 ) -> crate::common::RegisterField<
10661 0,
10662 0xf,
10663 1,
10664 0,
10665 gtber::Bd,
10666 gtber::Bd,
10667 Gtber_SPEC,
10668 crate::common::RW,
10669 > {
10670 crate::common::RegisterField::<
10671 0,
10672 0xf,
10673 1,
10674 0,
10675 gtber::Bd,
10676 gtber::Bd,
10677 Gtber_SPEC,
10678 crate::common::RW,
10679 >::from_register(self, 0)
10680 }
10681}
10682impl ::core::default::Default for Gtber {
10683 #[inline(always)]
10684 fn default() -> Gtber {
10685 <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
10686 }
10687}
10688pub mod gtber {
10689
10690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10691 pub struct Adtdb_SPEC;
10692 pub type Adtdb = crate::EnumBitfieldStruct<u8, Adtdb_SPEC>;
10693 impl Adtdb {
10694 #[doc = "Single buffer operation (GTADTBRB --> GTADTRB)"]
10695 pub const _0: Self = Self::new(0);
10696
10697 #[doc = "Double buffer operation (GTADTDBRB --> GTADTBRB --> GTADTDRB)"]
10698 pub const _1: Self = Self::new(1);
10699 }
10700 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10701 pub struct Adttb_SPEC;
10702 pub type Adttb = crate::EnumBitfieldStruct<u8, Adttb_SPEC>;
10703 impl Adttb {
10704 #[doc = "No transfer"]
10705 pub const _00: Self = Self::new(0);
10706
10707 #[doc = "Transfer at crest"]
10708 pub const _01: Self = Self::new(1);
10709
10710 #[doc = "Transfer at trough"]
10711 pub const _10: Self = Self::new(2);
10712
10713 #[doc = "Transfer at both crest and trough"]
10714 pub const _11: Self = Self::new(3);
10715 }
10716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10717 pub struct Adtda_SPEC;
10718 pub type Adtda = crate::EnumBitfieldStruct<u8, Adtda_SPEC>;
10719 impl Adtda {
10720 #[doc = "Single buffer operation (GTADTBRA --> GTADTRA)"]
10721 pub const _0: Self = Self::new(0);
10722
10723 #[doc = "Double buffer operation (GTADTDBRA --> GTADTBRA --> GTADTDRA)"]
10724 pub const _1: Self = Self::new(1);
10725 }
10726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10727 pub struct Adtta_SPEC;
10728 pub type Adtta = crate::EnumBitfieldStruct<u8, Adtta_SPEC>;
10729 impl Adtta {
10730 #[doc = "No transfer"]
10731 pub const _00: Self = Self::new(0);
10732
10733 #[doc = "Transfer at crest"]
10734 pub const _01: Self = Self::new(1);
10735
10736 #[doc = "Transfer at trough"]
10737 pub const _10: Self = Self::new(2);
10738
10739 #[doc = "Transfer at both crest and trough"]
10740 pub const _11: Self = Self::new(3);
10741 }
10742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10743 pub struct Ccrswt_SPEC;
10744 pub type Ccrswt = crate::EnumBitfieldStruct<u8, Ccrswt_SPEC>;
10745 impl Ccrswt {
10746 #[doc = "no effect"]
10747 pub const _0: Self = Self::new(0);
10748
10749 #[doc = "Forcibly performs buffer transfer of GTCCRA and GTCCRB. This bit automatically returns to 0 after the writing of 1."]
10750 pub const _1: Self = Self::new(1);
10751 }
10752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10753 pub struct Pr_SPEC;
10754 pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
10755 impl Pr {
10756 #[doc = "Buffer operation is not performed"]
10757 pub const _00: Self = Self::new(0);
10758
10759 #[doc = "Single buffer operation (GTPBR --> GTPR)"]
10760 pub const _01: Self = Self::new(1);
10761
10762 #[doc = "Double buffer operation (GTPDBR --> GTPBR --> GTPR)"]
10763 pub const _10: Self = Self::new(2);
10764
10765 #[doc = "Double buffer operation (GTPDBR --> GTPBR --> GTPR)"]
10766 pub const _11: Self = Self::new(3);
10767 }
10768 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10769 pub struct Ccrb_SPEC;
10770 pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
10771 impl Ccrb {
10772 #[doc = "Buffer operation is not performed"]
10773 pub const _00: Self = Self::new(0);
10774
10775 #[doc = "Single buffer operation (GTCCRB <--> GTCCRE)"]
10776 pub const _01: Self = Self::new(1);
10777
10778 #[doc = "Double buffer operation (GTCCRB <--> GTCCRE <--> GTCCRF)"]
10779 pub const _10: Self = Self::new(2);
10780
10781 #[doc = "Double buffer operation (GTCCRB <--> GTCCRE <--> GTCCRF)"]
10782 pub const _11: Self = Self::new(3);
10783 }
10784 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10785 pub struct Ccra_SPEC;
10786 pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
10787 impl Ccra {
10788 #[doc = "Buffer operation is not performed"]
10789 pub const _00: Self = Self::new(0);
10790
10791 #[doc = "Single buffer operation (GTCCRA <--> GTCCRC)"]
10792 pub const _01: Self = Self::new(1);
10793
10794 #[doc = "Double buffer operation (GTCCRA <--> GTCCRC <--> GTCCRD)"]
10795 pub const _10: Self = Self::new(2);
10796
10797 #[doc = "Double buffer operation (GTCCRA <--> GTCCRC <--> GTCCRD)"]
10798 pub const _11: Self = Self::new(3);
10799 }
10800 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10801 pub struct Bd_SPEC;
10802 pub type Bd = crate::EnumBitfieldStruct<u8, Bd_SPEC>;
10803 impl Bd {
10804 #[doc = "Enable buffer operation"]
10805 pub const _0: Self = Self::new(0);
10806
10807 #[doc = "Disable buffer operation"]
10808 pub const _1: Self = Self::new(1);
10809 }
10810}
10811#[doc(hidden)]
10812#[derive(Copy, Clone, Eq, PartialEq)]
10813pub struct Gtitc_SPEC;
10814impl crate::sealed::RegSpec for Gtitc_SPEC {
10815 type DataType = u32;
10816}
10817
10818#[doc = "General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register"]
10819pub type Gtitc = crate::RegValueT<Gtitc_SPEC>;
10820
10821impl Gtitc {
10822 #[doc = "GTADTRB A/D Converter Start Request Link"]
10823 #[inline(always)]
10824 pub fn adtbl(
10825 self,
10826 ) -> crate::common::RegisterField<
10827 14,
10828 0x1,
10829 1,
10830 0,
10831 gtitc::Adtbl,
10832 gtitc::Adtbl,
10833 Gtitc_SPEC,
10834 crate::common::RW,
10835 > {
10836 crate::common::RegisterField::<
10837 14,
10838 0x1,
10839 1,
10840 0,
10841 gtitc::Adtbl,
10842 gtitc::Adtbl,
10843 Gtitc_SPEC,
10844 crate::common::RW,
10845 >::from_register(self, 0)
10846 }
10847
10848 #[doc = "GTADTRA A/D Converter Start Request Link"]
10849 #[inline(always)]
10850 pub fn adtal(
10851 self,
10852 ) -> crate::common::RegisterField<
10853 12,
10854 0x1,
10855 1,
10856 0,
10857 gtitc::Adtal,
10858 gtitc::Adtal,
10859 Gtitc_SPEC,
10860 crate::common::RW,
10861 > {
10862 crate::common::RegisterField::<
10863 12,
10864 0x1,
10865 1,
10866 0,
10867 gtitc::Adtal,
10868 gtitc::Adtal,
10869 Gtitc_SPEC,
10870 crate::common::RW,
10871 >::from_register(self, 0)
10872 }
10873
10874 #[doc = "GPT_OVF/GPT_UDF Interrupt Skipping Count Select"]
10875 #[inline(always)]
10876 pub fn ivtt(
10877 self,
10878 ) -> crate::common::RegisterField<
10879 8,
10880 0x7,
10881 1,
10882 0,
10883 gtitc::Ivtt,
10884 gtitc::Ivtt,
10885 Gtitc_SPEC,
10886 crate::common::RW,
10887 > {
10888 crate::common::RegisterField::<
10889 8,
10890 0x7,
10891 1,
10892 0,
10893 gtitc::Ivtt,
10894 gtitc::Ivtt,
10895 Gtitc_SPEC,
10896 crate::common::RW,
10897 >::from_register(self, 0)
10898 }
10899
10900 #[doc = "GPT_OVF/GPT_UDF Interrupt Skipping Function Select"]
10901 #[inline(always)]
10902 pub fn ivtc(
10903 self,
10904 ) -> crate::common::RegisterField<
10905 6,
10906 0x3,
10907 1,
10908 0,
10909 gtitc::Ivtc,
10910 gtitc::Ivtc,
10911 Gtitc_SPEC,
10912 crate::common::RW,
10913 > {
10914 crate::common::RegisterField::<
10915 6,
10916 0x3,
10917 1,
10918 0,
10919 gtitc::Ivtc,
10920 gtitc::Ivtc,
10921 Gtitc_SPEC,
10922 crate::common::RW,
10923 >::from_register(self, 0)
10924 }
10925
10926 #[doc = "GTCCRF Compare Match Interrupt Link"]
10927 #[inline(always)]
10928 pub fn itlf(
10929 self,
10930 ) -> crate::common::RegisterField<
10931 5,
10932 0x1,
10933 1,
10934 0,
10935 gtitc::Itlf,
10936 gtitc::Itlf,
10937 Gtitc_SPEC,
10938 crate::common::RW,
10939 > {
10940 crate::common::RegisterField::<
10941 5,
10942 0x1,
10943 1,
10944 0,
10945 gtitc::Itlf,
10946 gtitc::Itlf,
10947 Gtitc_SPEC,
10948 crate::common::RW,
10949 >::from_register(self, 0)
10950 }
10951
10952 #[doc = "GTCCRE Compare Match Interrupt Link"]
10953 #[inline(always)]
10954 pub fn itle(
10955 self,
10956 ) -> crate::common::RegisterField<
10957 4,
10958 0x1,
10959 1,
10960 0,
10961 gtitc::Itle,
10962 gtitc::Itle,
10963 Gtitc_SPEC,
10964 crate::common::RW,
10965 > {
10966 crate::common::RegisterField::<
10967 4,
10968 0x1,
10969 1,
10970 0,
10971 gtitc::Itle,
10972 gtitc::Itle,
10973 Gtitc_SPEC,
10974 crate::common::RW,
10975 >::from_register(self, 0)
10976 }
10977
10978 #[doc = "GTCCRD Compare Match Interrupt Link"]
10979 #[inline(always)]
10980 pub fn itld(
10981 self,
10982 ) -> crate::common::RegisterField<
10983 3,
10984 0x1,
10985 1,
10986 0,
10987 gtitc::Itld,
10988 gtitc::Itld,
10989 Gtitc_SPEC,
10990 crate::common::RW,
10991 > {
10992 crate::common::RegisterField::<
10993 3,
10994 0x1,
10995 1,
10996 0,
10997 gtitc::Itld,
10998 gtitc::Itld,
10999 Gtitc_SPEC,
11000 crate::common::RW,
11001 >::from_register(self, 0)
11002 }
11003
11004 #[doc = "GTCCRC Compare Match Interrupt Link"]
11005 #[inline(always)]
11006 pub fn itlc(
11007 self,
11008 ) -> crate::common::RegisterField<
11009 2,
11010 0x1,
11011 1,
11012 0,
11013 gtitc::Itlc,
11014 gtitc::Itlc,
11015 Gtitc_SPEC,
11016 crate::common::RW,
11017 > {
11018 crate::common::RegisterField::<
11019 2,
11020 0x1,
11021 1,
11022 0,
11023 gtitc::Itlc,
11024 gtitc::Itlc,
11025 Gtitc_SPEC,
11026 crate::common::RW,
11027 >::from_register(self, 0)
11028 }
11029
11030 #[doc = "GTCCRB Compare Match/Input Capture Interrupt Link"]
11031 #[inline(always)]
11032 pub fn itlb(
11033 self,
11034 ) -> crate::common::RegisterField<
11035 1,
11036 0x1,
11037 1,
11038 0,
11039 gtitc::Itlb,
11040 gtitc::Itlb,
11041 Gtitc_SPEC,
11042 crate::common::RW,
11043 > {
11044 crate::common::RegisterField::<
11045 1,
11046 0x1,
11047 1,
11048 0,
11049 gtitc::Itlb,
11050 gtitc::Itlb,
11051 Gtitc_SPEC,
11052 crate::common::RW,
11053 >::from_register(self, 0)
11054 }
11055
11056 #[doc = "GTCCRA Compare Match/Input Capture Interrupt Link"]
11057 #[inline(always)]
11058 pub fn itla(
11059 self,
11060 ) -> crate::common::RegisterField<
11061 0,
11062 0x1,
11063 1,
11064 0,
11065 gtitc::Itla,
11066 gtitc::Itla,
11067 Gtitc_SPEC,
11068 crate::common::RW,
11069 > {
11070 crate::common::RegisterField::<
11071 0,
11072 0x1,
11073 1,
11074 0,
11075 gtitc::Itla,
11076 gtitc::Itla,
11077 Gtitc_SPEC,
11078 crate::common::RW,
11079 >::from_register(self, 0)
11080 }
11081}
11082impl ::core::default::Default for Gtitc {
11083 #[inline(always)]
11084 fn default() -> Gtitc {
11085 <crate::RegValueT<Gtitc_SPEC> as RegisterValue<_>>::new(0)
11086 }
11087}
11088pub mod gtitc {
11089
11090 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11091 pub struct Adtbl_SPEC;
11092 pub type Adtbl = crate::EnumBitfieldStruct<u8, Adtbl_SPEC>;
11093 impl Adtbl {
11094 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11095 pub const _0: Self = Self::new(0);
11096
11097 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11098 pub const _1: Self = Self::new(1);
11099 }
11100 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11101 pub struct Adtal_SPEC;
11102 pub type Adtal = crate::EnumBitfieldStruct<u8, Adtal_SPEC>;
11103 impl Adtal {
11104 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11105 pub const _0: Self = Self::new(0);
11106
11107 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11108 pub const _1: Self = Self::new(1);
11109 }
11110 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11111 pub struct Ivtt_SPEC;
11112 pub type Ivtt = crate::EnumBitfieldStruct<u8, Ivtt_SPEC>;
11113 impl Ivtt {
11114 #[doc = "No skipping"]
11115 pub const _000: Self = Self::new(0);
11116
11117 #[doc = "Skipping count of 1"]
11118 pub const _001: Self = Self::new(1);
11119
11120 #[doc = "Skipping count of 2"]
11121 pub const _010: Self = Self::new(2);
11122
11123 #[doc = "Skipping count of 3"]
11124 pub const _011: Self = Self::new(3);
11125
11126 #[doc = "Skipping count of 4"]
11127 pub const _100: Self = Self::new(4);
11128
11129 #[doc = "Skipping count of 5"]
11130 pub const _101: Self = Self::new(5);
11131
11132 #[doc = "Skipping count of 6"]
11133 pub const _110: Self = Self::new(6);
11134
11135 #[doc = "Skipping count of 7."]
11136 pub const _111: Self = Self::new(7);
11137 }
11138 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11139 pub struct Ivtc_SPEC;
11140 pub type Ivtc = crate::EnumBitfieldStruct<u8, Ivtc_SPEC>;
11141 impl Ivtc {
11142 #[doc = "Do not perform skipping"]
11143 pub const _00: Self = Self::new(0);
11144
11145 #[doc = "Count and skip both overflow and underflow for saw waves and crest for triangle waves"]
11146 pub const _01: Self = Self::new(1);
11147
11148 #[doc = "Count and skip both overflow and underflow for saw waves and trough for triangle waves"]
11149 pub const _10: Self = Self::new(2);
11150
11151 #[doc = "Count and skip both overflow and underflow for saw waves and both crest and trough for triangle waves."]
11152 pub const _11: Self = Self::new(3);
11153 }
11154 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11155 pub struct Itlf_SPEC;
11156 pub type Itlf = crate::EnumBitfieldStruct<u8, Itlf_SPEC>;
11157 impl Itlf {
11158 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11159 pub const _0: Self = Self::new(0);
11160
11161 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11162 pub const _1: Self = Self::new(1);
11163 }
11164 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11165 pub struct Itle_SPEC;
11166 pub type Itle = crate::EnumBitfieldStruct<u8, Itle_SPEC>;
11167 impl Itle {
11168 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11169 pub const _0: Self = Self::new(0);
11170
11171 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11172 pub const _1: Self = Self::new(1);
11173 }
11174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11175 pub struct Itld_SPEC;
11176 pub type Itld = crate::EnumBitfieldStruct<u8, Itld_SPEC>;
11177 impl Itld {
11178 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11179 pub const _0: Self = Self::new(0);
11180
11181 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11182 pub const _1: Self = Self::new(1);
11183 }
11184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11185 pub struct Itlc_SPEC;
11186 pub type Itlc = crate::EnumBitfieldStruct<u8, Itlc_SPEC>;
11187 impl Itlc {
11188 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11189 pub const _0: Self = Self::new(0);
11190
11191 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11192 pub const _1: Self = Self::new(1);
11193 }
11194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11195 pub struct Itlb_SPEC;
11196 pub type Itlb = crate::EnumBitfieldStruct<u8, Itlb_SPEC>;
11197 impl Itlb {
11198 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11199 pub const _0: Self = Self::new(0);
11200
11201 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11202 pub const _1: Self = Self::new(1);
11203 }
11204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11205 pub struct Itla_SPEC;
11206 pub type Itla = crate::EnumBitfieldStruct<u8, Itla_SPEC>;
11207 impl Itla {
11208 #[doc = "Do not link with GPTn_OVF/GPTn_UDF interrupt skipping function"]
11209 pub const _0: Self = Self::new(0);
11210
11211 #[doc = "Link with GPTn_OVF/GPTn_UDF interrupt skipping function."]
11212 pub const _1: Self = Self::new(1);
11213 }
11214}
11215#[doc(hidden)]
11216#[derive(Copy, Clone, Eq, PartialEq)]
11217pub struct Gtcnt_SPEC;
11218impl crate::sealed::RegSpec for Gtcnt_SPEC {
11219 type DataType = u32;
11220}
11221
11222#[doc = "General PWM Timer Counter"]
11223pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
11224
11225impl Gtcnt {
11226 #[doc = "Counter"]
11227 #[inline(always)]
11228 pub fn gtcnt(
11229 self,
11230 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtcnt_SPEC, crate::common::RW>
11231 {
11232 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtcnt_SPEC,crate::common::RW>::from_register(self,0)
11233 }
11234}
11235impl ::core::default::Default for Gtcnt {
11236 #[inline(always)]
11237 fn default() -> Gtcnt {
11238 <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
11239 }
11240}
11241
11242#[doc(hidden)]
11243#[derive(Copy, Clone, Eq, PartialEq)]
11244pub struct Gtccra_SPEC;
11245impl crate::sealed::RegSpec for Gtccra_SPEC {
11246 type DataType = u32;
11247}
11248
11249#[doc = "General PWM Timer Compare Capture Register A"]
11250pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
11251
11252impl Gtccra {
11253 #[doc = "Compare Capture Register A"]
11254 #[inline(always)]
11255 pub fn gtccra(
11256 self,
11257 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccra_SPEC, crate::common::RW>
11258 {
11259 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccra_SPEC,crate::common::RW>::from_register(self,0)
11260 }
11261}
11262impl ::core::default::Default for Gtccra {
11263 #[inline(always)]
11264 fn default() -> Gtccra {
11265 <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(4294967295)
11266 }
11267}
11268
11269#[doc(hidden)]
11270#[derive(Copy, Clone, Eq, PartialEq)]
11271pub struct Gtccrb_SPEC;
11272impl crate::sealed::RegSpec for Gtccrb_SPEC {
11273 type DataType = u32;
11274}
11275
11276#[doc = "General PWM Timer Compare Capture Register B"]
11277pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
11278
11279impl Gtccrb {
11280 #[doc = "Compare Capture Register B"]
11281 #[inline(always)]
11282 pub fn gtccrb(
11283 self,
11284 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrb_SPEC, crate::common::RW>
11285 {
11286 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrb_SPEC,crate::common::RW>::from_register(self,0)
11287 }
11288}
11289impl ::core::default::Default for Gtccrb {
11290 #[inline(always)]
11291 fn default() -> Gtccrb {
11292 <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(4294967295)
11293 }
11294}
11295
11296#[doc(hidden)]
11297#[derive(Copy, Clone, Eq, PartialEq)]
11298pub struct Gtccrc_SPEC;
11299impl crate::sealed::RegSpec for Gtccrc_SPEC {
11300 type DataType = u32;
11301}
11302
11303#[doc = "General PWM Timer Compare Capture Register C"]
11304pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
11305
11306impl Gtccrc {
11307 #[doc = "Compare Capture Register C"]
11308 #[inline(always)]
11309 pub fn gtccrc(
11310 self,
11311 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrc_SPEC, crate::common::RW>
11312 {
11313 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrc_SPEC,crate::common::RW>::from_register(self,0)
11314 }
11315}
11316impl ::core::default::Default for Gtccrc {
11317 #[inline(always)]
11318 fn default() -> Gtccrc {
11319 <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(4294967295)
11320 }
11321}
11322
11323#[doc(hidden)]
11324#[derive(Copy, Clone, Eq, PartialEq)]
11325pub struct Gtccre_SPEC;
11326impl crate::sealed::RegSpec for Gtccre_SPEC {
11327 type DataType = u32;
11328}
11329
11330#[doc = "General PWM Timer Compare Capture Register E"]
11331pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
11332
11333impl Gtccre {
11334 #[doc = "Compare Capture Register E"]
11335 #[inline(always)]
11336 pub fn gtccre(
11337 self,
11338 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccre_SPEC, crate::common::RW>
11339 {
11340 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccre_SPEC,crate::common::RW>::from_register(self,0)
11341 }
11342}
11343impl ::core::default::Default for Gtccre {
11344 #[inline(always)]
11345 fn default() -> Gtccre {
11346 <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(4294967295)
11347 }
11348}
11349
11350#[doc(hidden)]
11351#[derive(Copy, Clone, Eq, PartialEq)]
11352pub struct Gtccrd_SPEC;
11353impl crate::sealed::RegSpec for Gtccrd_SPEC {
11354 type DataType = u32;
11355}
11356
11357#[doc = "General PWM Timer Compare Capture Register D"]
11358pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
11359
11360impl Gtccrd {
11361 #[doc = "Compare Capture Register D"]
11362 #[inline(always)]
11363 pub fn gtccrd(
11364 self,
11365 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrd_SPEC, crate::common::RW>
11366 {
11367 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrd_SPEC,crate::common::RW>::from_register(self,0)
11368 }
11369}
11370impl ::core::default::Default for Gtccrd {
11371 #[inline(always)]
11372 fn default() -> Gtccrd {
11373 <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(4294967295)
11374 }
11375}
11376
11377#[doc(hidden)]
11378#[derive(Copy, Clone, Eq, PartialEq)]
11379pub struct Gtccrf_SPEC;
11380impl crate::sealed::RegSpec for Gtccrf_SPEC {
11381 type DataType = u32;
11382}
11383
11384#[doc = "General PWM Timer Compare Capture Register F"]
11385pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
11386
11387impl Gtccrf {
11388 #[doc = "Compare Capture Register F"]
11389 #[inline(always)]
11390 pub fn gtccrf(
11391 self,
11392 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrf_SPEC, crate::common::RW>
11393 {
11394 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrf_SPEC,crate::common::RW>::from_register(self,0)
11395 }
11396}
11397impl ::core::default::Default for Gtccrf {
11398 #[inline(always)]
11399 fn default() -> Gtccrf {
11400 <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(4294967295)
11401 }
11402}
11403
11404#[doc(hidden)]
11405#[derive(Copy, Clone, Eq, PartialEq)]
11406pub struct Gtpr_SPEC;
11407impl crate::sealed::RegSpec for Gtpr_SPEC {
11408 type DataType = u32;
11409}
11410
11411#[doc = "General PWM Timer Cycle Setting Register"]
11412pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
11413
11414impl Gtpr {
11415 #[doc = "Cycle Setting Register"]
11416 #[inline(always)]
11417 pub fn gtpr(
11418 self,
11419 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtpr_SPEC, crate::common::RW>
11420 {
11421 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtpr_SPEC,crate::common::RW>::from_register(self,0)
11422 }
11423}
11424impl ::core::default::Default for Gtpr {
11425 #[inline(always)]
11426 fn default() -> Gtpr {
11427 <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(4294967295)
11428 }
11429}
11430
11431#[doc(hidden)]
11432#[derive(Copy, Clone, Eq, PartialEq)]
11433pub struct Gtpbr_SPEC;
11434impl crate::sealed::RegSpec for Gtpbr_SPEC {
11435 type DataType = u32;
11436}
11437
11438#[doc = "General PWM Timer Cycle Setting Buffer Register"]
11439pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
11440
11441impl Gtpbr {
11442 #[doc = "Cycle Setting Buffer Register"]
11443 #[inline(always)]
11444 pub fn gtpbr(
11445 self,
11446 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtpbr_SPEC, crate::common::RW>
11447 {
11448 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtpbr_SPEC,crate::common::RW>::from_register(self,0)
11449 }
11450}
11451impl ::core::default::Default for Gtpbr {
11452 #[inline(always)]
11453 fn default() -> Gtpbr {
11454 <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(4294967295)
11455 }
11456}
11457
11458#[doc(hidden)]
11459#[derive(Copy, Clone, Eq, PartialEq)]
11460pub struct Gtpdbr_SPEC;
11461impl crate::sealed::RegSpec for Gtpdbr_SPEC {
11462 type DataType = u32;
11463}
11464
11465#[doc = "General PWM Timer Cycle Setting Double-Buffer Register"]
11466pub type Gtpdbr = crate::RegValueT<Gtpdbr_SPEC>;
11467
11468impl Gtpdbr {
11469 #[doc = "Cycle Setting Double-Buffer Register"]
11470 #[inline(always)]
11471 pub fn gtpdbr(
11472 self,
11473 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtpdbr_SPEC, crate::common::RW>
11474 {
11475 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtpdbr_SPEC,crate::common::RW>::from_register(self,0)
11476 }
11477}
11478impl ::core::default::Default for Gtpdbr {
11479 #[inline(always)]
11480 fn default() -> Gtpdbr {
11481 <crate::RegValueT<Gtpdbr_SPEC> as RegisterValue<_>>::new(4294967295)
11482 }
11483}
11484
11485#[doc(hidden)]
11486#[derive(Copy, Clone, Eq, PartialEq)]
11487pub struct Gtadtra_SPEC;
11488impl crate::sealed::RegSpec for Gtadtra_SPEC {
11489 type DataType = u32;
11490}
11491
11492#[doc = "A/D Converter Start Request Timing Register A"]
11493pub type Gtadtra = crate::RegValueT<Gtadtra_SPEC>;
11494
11495impl Gtadtra {
11496 #[doc = "A/D Converter Start Request Timing Register A"]
11497 #[inline(always)]
11498 pub fn gtadtra(
11499 self,
11500 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtadtra_SPEC, crate::common::RW>
11501 {
11502 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtadtra_SPEC,crate::common::RW>::from_register(self,0)
11503 }
11504}
11505impl ::core::default::Default for Gtadtra {
11506 #[inline(always)]
11507 fn default() -> Gtadtra {
11508 <crate::RegValueT<Gtadtra_SPEC> as RegisterValue<_>>::new(4294967295)
11509 }
11510}
11511
11512#[doc(hidden)]
11513#[derive(Copy, Clone, Eq, PartialEq)]
11514pub struct Gtadtrb_SPEC;
11515impl crate::sealed::RegSpec for Gtadtrb_SPEC {
11516 type DataType = u32;
11517}
11518
11519#[doc = "A/D Converter Start Request Timing Register B"]
11520pub type Gtadtrb = crate::RegValueT<Gtadtrb_SPEC>;
11521
11522impl Gtadtrb {
11523 #[doc = "A/D Converter Start Request Timing Register B"]
11524 #[inline(always)]
11525 pub fn gtadtrb(
11526 self,
11527 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtadtrb_SPEC, crate::common::RW>
11528 {
11529 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtadtrb_SPEC,crate::common::RW>::from_register(self,0)
11530 }
11531}
11532impl ::core::default::Default for Gtadtrb {
11533 #[inline(always)]
11534 fn default() -> Gtadtrb {
11535 <crate::RegValueT<Gtadtrb_SPEC> as RegisterValue<_>>::new(4294967295)
11536 }
11537}
11538
11539#[doc(hidden)]
11540#[derive(Copy, Clone, Eq, PartialEq)]
11541pub struct Gtadtbra_SPEC;
11542impl crate::sealed::RegSpec for Gtadtbra_SPEC {
11543 type DataType = u32;
11544}
11545
11546#[doc = "A/D Converter Start Request Timing Buffer Register A"]
11547pub type Gtadtbra = crate::RegValueT<Gtadtbra_SPEC>;
11548
11549impl Gtadtbra {
11550 #[doc = "A/D Converter Start Request Timing Buffer Register A"]
11551 #[inline(always)]
11552 pub fn gtadtbra(
11553 self,
11554 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtadtbra_SPEC, crate::common::RW>
11555 {
11556 crate::common::RegisterField::<
11557 0,
11558 0xffffffff,
11559 1,
11560 0,
11561 u32,
11562 u32,
11563 Gtadtbra_SPEC,
11564 crate::common::RW,
11565 >::from_register(self, 0)
11566 }
11567}
11568impl ::core::default::Default for Gtadtbra {
11569 #[inline(always)]
11570 fn default() -> Gtadtbra {
11571 <crate::RegValueT<Gtadtbra_SPEC> as RegisterValue<_>>::new(4294967295)
11572 }
11573}
11574
11575#[doc(hidden)]
11576#[derive(Copy, Clone, Eq, PartialEq)]
11577pub struct Gtadtbrb_SPEC;
11578impl crate::sealed::RegSpec for Gtadtbrb_SPEC {
11579 type DataType = u32;
11580}
11581
11582#[doc = "A/D Converter Start Request Timing Buffer Register B"]
11583pub type Gtadtbrb = crate::RegValueT<Gtadtbrb_SPEC>;
11584
11585impl Gtadtbrb {
11586 #[doc = "A/D Converter Start Request Timing Buffer Register B"]
11587 #[inline(always)]
11588 pub fn gtadtbrb(
11589 self,
11590 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtadtbrb_SPEC, crate::common::RW>
11591 {
11592 crate::common::RegisterField::<
11593 0,
11594 0xffffffff,
11595 1,
11596 0,
11597 u32,
11598 u32,
11599 Gtadtbrb_SPEC,
11600 crate::common::RW,
11601 >::from_register(self, 0)
11602 }
11603}
11604impl ::core::default::Default for Gtadtbrb {
11605 #[inline(always)]
11606 fn default() -> Gtadtbrb {
11607 <crate::RegValueT<Gtadtbrb_SPEC> as RegisterValue<_>>::new(4294967295)
11608 }
11609}
11610
11611#[doc(hidden)]
11612#[derive(Copy, Clone, Eq, PartialEq)]
11613pub struct Gtadtdbra_SPEC;
11614impl crate::sealed::RegSpec for Gtadtdbra_SPEC {
11615 type DataType = u32;
11616}
11617
11618#[doc = "A/D Converter Start Request Timing Double-Buffer Register A"]
11619pub type Gtadtdbra = crate::RegValueT<Gtadtdbra_SPEC>;
11620
11621impl Gtadtdbra {
11622 #[doc = "A/D Converter Start Request Timing Double-Buffer Register A"]
11623 #[inline(always)]
11624 pub fn gtadtdbra(
11625 self,
11626 ) -> crate::common::RegisterField<
11627 0,
11628 0xffffffff,
11629 1,
11630 0,
11631 u32,
11632 u32,
11633 Gtadtdbra_SPEC,
11634 crate::common::RW,
11635 > {
11636 crate::common::RegisterField::<
11637 0,
11638 0xffffffff,
11639 1,
11640 0,
11641 u32,
11642 u32,
11643 Gtadtdbra_SPEC,
11644 crate::common::RW,
11645 >::from_register(self, 0)
11646 }
11647}
11648impl ::core::default::Default for Gtadtdbra {
11649 #[inline(always)]
11650 fn default() -> Gtadtdbra {
11651 <crate::RegValueT<Gtadtdbra_SPEC> as RegisterValue<_>>::new(4294967295)
11652 }
11653}
11654
11655#[doc(hidden)]
11656#[derive(Copy, Clone, Eq, PartialEq)]
11657pub struct Gtadtdbrb_SPEC;
11658impl crate::sealed::RegSpec for Gtadtdbrb_SPEC {
11659 type DataType = u32;
11660}
11661
11662#[doc = "A/D Converter Start Request Timing Double-Buffer Register B"]
11663pub type Gtadtdbrb = crate::RegValueT<Gtadtdbrb_SPEC>;
11664
11665impl Gtadtdbrb {
11666 #[doc = "A/D Converter Start Request Timing Double-Buffer Register B"]
11667 #[inline(always)]
11668 pub fn gtadtdbrb(
11669 self,
11670 ) -> crate::common::RegisterField<
11671 0,
11672 0xffffffff,
11673 1,
11674 0,
11675 u32,
11676 u32,
11677 Gtadtdbrb_SPEC,
11678 crate::common::RW,
11679 > {
11680 crate::common::RegisterField::<
11681 0,
11682 0xffffffff,
11683 1,
11684 0,
11685 u32,
11686 u32,
11687 Gtadtdbrb_SPEC,
11688 crate::common::RW,
11689 >::from_register(self, 0)
11690 }
11691}
11692impl ::core::default::Default for Gtadtdbrb {
11693 #[inline(always)]
11694 fn default() -> Gtadtdbrb {
11695 <crate::RegValueT<Gtadtdbrb_SPEC> as RegisterValue<_>>::new(4294967295)
11696 }
11697}
11698
11699#[doc(hidden)]
11700#[derive(Copy, Clone, Eq, PartialEq)]
11701pub struct Gtdtcr_SPEC;
11702impl crate::sealed::RegSpec for Gtdtcr_SPEC {
11703 type DataType = u32;
11704}
11705
11706#[doc = "General PWM Timer Dead Time Control Register"]
11707pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
11708
11709impl Gtdtcr {
11710 #[doc = "GTDVD Setting"]
11711 #[inline(always)]
11712 pub fn tdfer(
11713 self,
11714 ) -> crate::common::RegisterField<
11715 8,
11716 0x1,
11717 1,
11718 0,
11719 gtdtcr::Tdfer,
11720 gtdtcr::Tdfer,
11721 Gtdtcr_SPEC,
11722 crate::common::RW,
11723 > {
11724 crate::common::RegisterField::<
11725 8,
11726 0x1,
11727 1,
11728 0,
11729 gtdtcr::Tdfer,
11730 gtdtcr::Tdfer,
11731 Gtdtcr_SPEC,
11732 crate::common::RW,
11733 >::from_register(self, 0)
11734 }
11735
11736 #[doc = "GTDVD Buffer Operation Enable"]
11737 #[inline(always)]
11738 pub fn tdbde(
11739 self,
11740 ) -> crate::common::RegisterField<
11741 5,
11742 0x1,
11743 1,
11744 0,
11745 gtdtcr::Tdbde,
11746 gtdtcr::Tdbde,
11747 Gtdtcr_SPEC,
11748 crate::common::RW,
11749 > {
11750 crate::common::RegisterField::<
11751 5,
11752 0x1,
11753 1,
11754 0,
11755 gtdtcr::Tdbde,
11756 gtdtcr::Tdbde,
11757 Gtdtcr_SPEC,
11758 crate::common::RW,
11759 >::from_register(self, 0)
11760 }
11761
11762 #[doc = "GTDVU Buffer Operation Enable"]
11763 #[inline(always)]
11764 pub fn tdbue(
11765 self,
11766 ) -> crate::common::RegisterField<
11767 4,
11768 0x1,
11769 1,
11770 0,
11771 gtdtcr::Tdbue,
11772 gtdtcr::Tdbue,
11773 Gtdtcr_SPEC,
11774 crate::common::RW,
11775 > {
11776 crate::common::RegisterField::<
11777 4,
11778 0x1,
11779 1,
11780 0,
11781 gtdtcr::Tdbue,
11782 gtdtcr::Tdbue,
11783 Gtdtcr_SPEC,
11784 crate::common::RW,
11785 >::from_register(self, 0)
11786 }
11787
11788 #[doc = "Negative-Phase Waveform Setting"]
11789 #[inline(always)]
11790 pub fn tde(
11791 self,
11792 ) -> crate::common::RegisterField<
11793 0,
11794 0x1,
11795 1,
11796 0,
11797 gtdtcr::Tde,
11798 gtdtcr::Tde,
11799 Gtdtcr_SPEC,
11800 crate::common::RW,
11801 > {
11802 crate::common::RegisterField::<
11803 0,
11804 0x1,
11805 1,
11806 0,
11807 gtdtcr::Tde,
11808 gtdtcr::Tde,
11809 Gtdtcr_SPEC,
11810 crate::common::RW,
11811 >::from_register(self, 0)
11812 }
11813}
11814impl ::core::default::Default for Gtdtcr {
11815 #[inline(always)]
11816 fn default() -> Gtdtcr {
11817 <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
11818 }
11819}
11820pub mod gtdtcr {
11821
11822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11823 pub struct Tdfer_SPEC;
11824 pub type Tdfer = crate::EnumBitfieldStruct<u8, Tdfer_SPEC>;
11825 impl Tdfer {
11826 #[doc = "Set GTDVU and GTDVD separately"]
11827 pub const _0: Self = Self::new(0);
11828
11829 #[doc = "Automatically set the value written to GTDVU to GTDVD"]
11830 pub const _1: Self = Self::new(1);
11831 }
11832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11833 pub struct Tdbde_SPEC;
11834 pub type Tdbde = crate::EnumBitfieldStruct<u8, Tdbde_SPEC>;
11835 impl Tdbde {
11836 #[doc = "Disable GTDVD buffer operation"]
11837 pub const _0: Self = Self::new(0);
11838
11839 #[doc = "Enable GTDVD buffer operation"]
11840 pub const _1: Self = Self::new(1);
11841 }
11842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11843 pub struct Tdbue_SPEC;
11844 pub type Tdbue = crate::EnumBitfieldStruct<u8, Tdbue_SPEC>;
11845 impl Tdbue {
11846 #[doc = "Disable GTDVU buffer operation"]
11847 pub const _0: Self = Self::new(0);
11848
11849 #[doc = "Enable GTDVU buffer operation"]
11850 pub const _1: Self = Self::new(1);
11851 }
11852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11853 pub struct Tde_SPEC;
11854 pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
11855 impl Tde {
11856 #[doc = "Set GTCCRB without using GTDVU and GTDVD."]
11857 pub const _0: Self = Self::new(0);
11858
11859 #[doc = "Use GTDVU and GTDVD to set the compare match value for negative-phase waveform with automatic dead time in GTCCRB."]
11860 pub const _1: Self = Self::new(1);
11861 }
11862}
11863#[doc(hidden)]
11864#[derive(Copy, Clone, Eq, PartialEq)]
11865pub struct Gtdvu_SPEC;
11866impl crate::sealed::RegSpec for Gtdvu_SPEC {
11867 type DataType = u32;
11868}
11869
11870#[doc = "General PWM Timer Dead Time Value Register U"]
11871pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
11872
11873impl Gtdvu {
11874 #[doc = "Dead Time Value Register U"]
11875 #[inline(always)]
11876 pub fn gtdvu(
11877 self,
11878 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtdvu_SPEC, crate::common::RW>
11879 {
11880 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtdvu_SPEC,crate::common::RW>::from_register(self,0)
11881 }
11882}
11883impl ::core::default::Default for Gtdvu {
11884 #[inline(always)]
11885 fn default() -> Gtdvu {
11886 <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(4294967295)
11887 }
11888}
11889
11890#[doc(hidden)]
11891#[derive(Copy, Clone, Eq, PartialEq)]
11892pub struct Gtdvd_SPEC;
11893impl crate::sealed::RegSpec for Gtdvd_SPEC {
11894 type DataType = u32;
11895}
11896
11897#[doc = "General PWM Timer Dead Time Value Register D"]
11898pub type Gtdvd = crate::RegValueT<Gtdvd_SPEC>;
11899
11900impl Gtdvd {
11901 #[doc = "Dead Time Value Register D"]
11902 #[inline(always)]
11903 pub fn gtdvd(
11904 self,
11905 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtdvd_SPEC, crate::common::RW>
11906 {
11907 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtdvd_SPEC,crate::common::RW>::from_register(self,0)
11908 }
11909}
11910impl ::core::default::Default for Gtdvd {
11911 #[inline(always)]
11912 fn default() -> Gtdvd {
11913 <crate::RegValueT<Gtdvd_SPEC> as RegisterValue<_>>::new(4294967295)
11914 }
11915}
11916
11917#[doc(hidden)]
11918#[derive(Copy, Clone, Eq, PartialEq)]
11919pub struct Gtdbu_SPEC;
11920impl crate::sealed::RegSpec for Gtdbu_SPEC {
11921 type DataType = u32;
11922}
11923
11924#[doc = "General PWM Timer Dead Time Buffer Register U"]
11925pub type Gtdbu = crate::RegValueT<Gtdbu_SPEC>;
11926
11927impl Gtdbu {
11928 #[doc = "Dead Time Buffer Register U"]
11929 #[inline(always)]
11930 pub fn gtdvu(
11931 self,
11932 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtdbu_SPEC, crate::common::RW>
11933 {
11934 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtdbu_SPEC,crate::common::RW>::from_register(self,0)
11935 }
11936}
11937impl ::core::default::Default for Gtdbu {
11938 #[inline(always)]
11939 fn default() -> Gtdbu {
11940 <crate::RegValueT<Gtdbu_SPEC> as RegisterValue<_>>::new(4294967295)
11941 }
11942}
11943
11944#[doc(hidden)]
11945#[derive(Copy, Clone, Eq, PartialEq)]
11946pub struct Gtdbd_SPEC;
11947impl crate::sealed::RegSpec for Gtdbd_SPEC {
11948 type DataType = u32;
11949}
11950
11951#[doc = "General PWM Timer Dead Time Buffer Register D"]
11952pub type Gtdbd = crate::RegValueT<Gtdbd_SPEC>;
11953
11954impl Gtdbd {
11955 #[doc = "Dead Time Buffer Register D"]
11956 #[inline(always)]
11957 pub fn gtdbd(
11958 self,
11959 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtdbd_SPEC, crate::common::RW>
11960 {
11961 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtdbd_SPEC,crate::common::RW>::from_register(self,0)
11962 }
11963}
11964impl ::core::default::Default for Gtdbd {
11965 #[inline(always)]
11966 fn default() -> Gtdbd {
11967 <crate::RegValueT<Gtdbd_SPEC> as RegisterValue<_>>::new(4294967295)
11968 }
11969}
11970
11971#[doc(hidden)]
11972#[derive(Copy, Clone, Eq, PartialEq)]
11973pub struct Gtsos_SPEC;
11974impl crate::sealed::RegSpec for Gtsos_SPEC {
11975 type DataType = u32;
11976}
11977
11978#[doc = "General PWM Timer Output Protection Function Status Register"]
11979pub type Gtsos = crate::RegValueT<Gtsos_SPEC>;
11980
11981impl Gtsos {
11982 #[doc = "Output Protection Function Status"]
11983 #[inline(always)]
11984 pub fn sos(
11985 self,
11986 ) -> crate::common::RegisterField<
11987 0,
11988 0x3,
11989 1,
11990 0,
11991 gtsos::Sos,
11992 gtsos::Sos,
11993 Gtsos_SPEC,
11994 crate::common::R,
11995 > {
11996 crate::common::RegisterField::<
11997 0,
11998 0x3,
11999 1,
12000 0,
12001 gtsos::Sos,
12002 gtsos::Sos,
12003 Gtsos_SPEC,
12004 crate::common::R,
12005 >::from_register(self, 0)
12006 }
12007}
12008impl ::core::default::Default for Gtsos {
12009 #[inline(always)]
12010 fn default() -> Gtsos {
12011 <crate::RegValueT<Gtsos_SPEC> as RegisterValue<_>>::new(0)
12012 }
12013}
12014pub mod gtsos {
12015
12016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12017 pub struct Sos_SPEC;
12018 pub type Sos = crate::EnumBitfieldStruct<u8, Sos_SPEC>;
12019 impl Sos {
12020 #[doc = "Normal operation"]
12021 pub const _00: Self = Self::new(0);
12022
12023 #[doc = "Protected state (GTCCRA = 0 is set during transfer at trough or crest)"]
12024 pub const _01: Self = Self::new(1);
12025
12026 #[doc = "Protected state (GTCCRA >= GTPR is set during transfer at trough)"]
12027 pub const _10: Self = Self::new(2);
12028
12029 #[doc = "Protected state (GTCCRA >= GTPR is set during transfer at crest)"]
12030 pub const _11: Self = Self::new(3);
12031 }
12032}
12033#[doc(hidden)]
12034#[derive(Copy, Clone, Eq, PartialEq)]
12035pub struct Gtsotr_SPEC;
12036impl crate::sealed::RegSpec for Gtsotr_SPEC {
12037 type DataType = u32;
12038}
12039
12040#[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
12041pub type Gtsotr = crate::RegValueT<Gtsotr_SPEC>;
12042
12043impl Gtsotr {
12044 #[doc = "Output Protection Function Temporary Release"]
12045 #[inline(always)]
12046 pub fn sotr(
12047 self,
12048 ) -> crate::common::RegisterField<
12049 0,
12050 0x1,
12051 1,
12052 0,
12053 gtsotr::Sotr,
12054 gtsotr::Sotr,
12055 Gtsotr_SPEC,
12056 crate::common::RW,
12057 > {
12058 crate::common::RegisterField::<
12059 0,
12060 0x1,
12061 1,
12062 0,
12063 gtsotr::Sotr,
12064 gtsotr::Sotr,
12065 Gtsotr_SPEC,
12066 crate::common::RW,
12067 >::from_register(self, 0)
12068 }
12069}
12070impl ::core::default::Default for Gtsotr {
12071 #[inline(always)]
12072 fn default() -> Gtsotr {
12073 <crate::RegValueT<Gtsotr_SPEC> as RegisterValue<_>>::new(0)
12074 }
12075}
12076pub mod gtsotr {
12077
12078 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12079 pub struct Sotr_SPEC;
12080 pub type Sotr = crate::EnumBitfieldStruct<u8, Sotr_SPEC>;
12081 impl Sotr {
12082 #[doc = "Do not release protected state"]
12083 pub const _0: Self = Self::new(0);
12084
12085 #[doc = "Release protected state"]
12086 pub const _1: Self = Self::new(1);
12087 }
12088}