ra6m2_pac/
pdc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:11:44 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Parallel Data Capture Unit"]
28unsafe impl ::core::marker::Send for super::Pdc {}
29unsafe impl ::core::marker::Sync for super::Pdc {}
30impl super::Pdc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "PDC Control Register 0"]
38    #[inline(always)]
39    pub const fn pccr0(&self) -> &'static crate::common::Reg<self::Pccr0_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Pccr0_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "PDC Control Register 1"]
48    #[inline(always)]
49    pub const fn pccr1(&self) -> &'static crate::common::Reg<self::Pccr1_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Pccr1_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "PDC Status Register"]
58    #[inline(always)]
59    pub const fn pcsr(&self) -> &'static crate::common::Reg<self::Pcsr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Pcsr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(8usize),
63            )
64        }
65    }
66
67    #[doc = "PDC Pin Monitor Register"]
68    #[inline(always)]
69    pub const fn pcmonr(&self) -> &'static crate::common::Reg<self::Pcmonr_SPEC, crate::common::R> {
70        unsafe {
71            crate::common::Reg::<self::Pcmonr_SPEC, crate::common::R>::from_ptr(
72                self._svd2pac_as_ptr().add(12usize),
73            )
74        }
75    }
76
77    #[doc = "PDC Receive Data Register"]
78    #[inline(always)]
79    pub const fn pcdr(&self) -> &'static crate::common::Reg<self::Pcdr_SPEC, crate::common::R> {
80        unsafe {
81            crate::common::Reg::<self::Pcdr_SPEC, crate::common::R>::from_ptr(
82                self._svd2pac_as_ptr().add(16usize),
83            )
84        }
85    }
86
87    #[doc = "Vertical Capture Register"]
88    #[inline(always)]
89    pub const fn vcr(&self) -> &'static crate::common::Reg<self::Vcr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Vcr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "Horizontal Capture Register"]
98    #[inline(always)]
99    pub const fn hcr(&self) -> &'static crate::common::Reg<self::Hcr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Hcr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(24usize),
103            )
104        }
105    }
106}
107#[doc(hidden)]
108#[derive(Copy, Clone, Eq, PartialEq)]
109pub struct Pccr0_SPEC;
110impl crate::sealed::RegSpec for Pccr0_SPEC {
111    type DataType = u32;
112}
113
114#[doc = "PDC Control Register 0"]
115pub type Pccr0 = crate::RegValueT<Pccr0_SPEC>;
116
117impl Pccr0 {
118    #[doc = "Endian Select"]
119    #[inline(always)]
120    pub fn eds(
121        self,
122    ) -> crate::common::RegisterField<
123        14,
124        0x1,
125        1,
126        0,
127        pccr0::Eds,
128        pccr0::Eds,
129        Pccr0_SPEC,
130        crate::common::RW,
131    > {
132        crate::common::RegisterField::<
133            14,
134            0x1,
135            1,
136            0,
137            pccr0::Eds,
138            pccr0::Eds,
139            Pccr0_SPEC,
140            crate::common::RW,
141        >::from_register(self, 0)
142    }
143
144    #[doc = "PCKO Frequency Division Ratio Select"]
145    #[inline(always)]
146    pub fn pckdiv(
147        self,
148    ) -> crate::common::RegisterField<
149        11,
150        0x7,
151        1,
152        0,
153        pccr0::Pckdiv,
154        pccr0::Pckdiv,
155        Pccr0_SPEC,
156        crate::common::RW,
157    > {
158        crate::common::RegisterField::<
159            11,
160            0x7,
161            1,
162            0,
163            pccr0::Pckdiv,
164            pccr0::Pckdiv,
165            Pccr0_SPEC,
166            crate::common::RW,
167        >::from_register(self, 0)
168    }
169
170    #[doc = "PCKO Output Enable"]
171    #[inline(always)]
172    pub fn pckoe(
173        self,
174    ) -> crate::common::RegisterField<
175        10,
176        0x1,
177        1,
178        0,
179        pccr0::Pckoe,
180        pccr0::Pckoe,
181        Pccr0_SPEC,
182        crate::common::RW,
183    > {
184        crate::common::RegisterField::<
185            10,
186            0x1,
187            1,
188            0,
189            pccr0::Pckoe,
190            pccr0::Pckoe,
191            Pccr0_SPEC,
192            crate::common::RW,
193        >::from_register(self, 0)
194    }
195
196    #[doc = "Horizontal Byte Number Setting Error Interrupt Enable"]
197    #[inline(always)]
198    pub fn herie(
199        self,
200    ) -> crate::common::RegisterField<
201        9,
202        0x1,
203        1,
204        0,
205        pccr0::Herie,
206        pccr0::Herie,
207        Pccr0_SPEC,
208        crate::common::RW,
209    > {
210        crate::common::RegisterField::<
211            9,
212            0x1,
213            1,
214            0,
215            pccr0::Herie,
216            pccr0::Herie,
217            Pccr0_SPEC,
218            crate::common::RW,
219        >::from_register(self, 0)
220    }
221
222    #[doc = "Vertical Line Number Setting Error Interrupt Enable"]
223    #[inline(always)]
224    pub fn verie(
225        self,
226    ) -> crate::common::RegisterField<
227        8,
228        0x1,
229        1,
230        0,
231        pccr0::Verie,
232        pccr0::Verie,
233        Pccr0_SPEC,
234        crate::common::RW,
235    > {
236        crate::common::RegisterField::<
237            8,
238            0x1,
239            1,
240            0,
241            pccr0::Verie,
242            pccr0::Verie,
243            Pccr0_SPEC,
244            crate::common::RW,
245        >::from_register(self, 0)
246    }
247
248    #[doc = "Underrun Interrupt Enable"]
249    #[inline(always)]
250    pub fn udrie(
251        self,
252    ) -> crate::common::RegisterField<
253        7,
254        0x1,
255        1,
256        0,
257        pccr0::Udrie,
258        pccr0::Udrie,
259        Pccr0_SPEC,
260        crate::common::RW,
261    > {
262        crate::common::RegisterField::<
263            7,
264            0x1,
265            1,
266            0,
267            pccr0::Udrie,
268            pccr0::Udrie,
269            Pccr0_SPEC,
270            crate::common::RW,
271        >::from_register(self, 0)
272    }
273
274    #[doc = "Overrun Interrupt Enable"]
275    #[inline(always)]
276    pub fn ovie(
277        self,
278    ) -> crate::common::RegisterField<
279        6,
280        0x1,
281        1,
282        0,
283        pccr0::Ovie,
284        pccr0::Ovie,
285        Pccr0_SPEC,
286        crate::common::RW,
287    > {
288        crate::common::RegisterField::<
289            6,
290            0x1,
291            1,
292            0,
293            pccr0::Ovie,
294            pccr0::Ovie,
295            Pccr0_SPEC,
296            crate::common::RW,
297        >::from_register(self, 0)
298    }
299
300    #[doc = "Frame End Interrupt Enable"]
301    #[inline(always)]
302    pub fn feie(
303        self,
304    ) -> crate::common::RegisterField<
305        5,
306        0x1,
307        1,
308        0,
309        pccr0::Feie,
310        pccr0::Feie,
311        Pccr0_SPEC,
312        crate::common::RW,
313    > {
314        crate::common::RegisterField::<
315            5,
316            0x1,
317            1,
318            0,
319            pccr0::Feie,
320            pccr0::Feie,
321            Pccr0_SPEC,
322            crate::common::RW,
323        >::from_register(self, 0)
324    }
325
326    #[doc = "Receive Data Ready Interrupt Enable"]
327    #[inline(always)]
328    pub fn dfie(
329        self,
330    ) -> crate::common::RegisterField<
331        4,
332        0x1,
333        1,
334        0,
335        pccr0::Dfie,
336        pccr0::Dfie,
337        Pccr0_SPEC,
338        crate::common::RW,
339    > {
340        crate::common::RegisterField::<
341            4,
342            0x1,
343            1,
344            0,
345            pccr0::Dfie,
346            pccr0::Dfie,
347            Pccr0_SPEC,
348            crate::common::RW,
349        >::from_register(self, 0)
350    }
351
352    #[doc = "PDC Reset"]
353    #[inline(always)]
354    pub fn prst(
355        self,
356    ) -> crate::common::RegisterField<
357        3,
358        0x1,
359        1,
360        0,
361        pccr0::Prst,
362        pccr0::Prst,
363        Pccr0_SPEC,
364        crate::common::W,
365    > {
366        crate::common::RegisterField::<
367            3,
368            0x1,
369            1,
370            0,
371            pccr0::Prst,
372            pccr0::Prst,
373            Pccr0_SPEC,
374            crate::common::W,
375        >::from_register(self, 0)
376    }
377
378    #[doc = "HSYNC Signal Polarity Select"]
379    #[inline(always)]
380    pub fn hps(
381        self,
382    ) -> crate::common::RegisterField<
383        2,
384        0x1,
385        1,
386        0,
387        pccr0::Hps,
388        pccr0::Hps,
389        Pccr0_SPEC,
390        crate::common::RW,
391    > {
392        crate::common::RegisterField::<
393            2,
394            0x1,
395            1,
396            0,
397            pccr0::Hps,
398            pccr0::Hps,
399            Pccr0_SPEC,
400            crate::common::RW,
401        >::from_register(self, 0)
402    }
403
404    #[doc = "VSYNC Signal Polarity Select"]
405    #[inline(always)]
406    pub fn vps(
407        self,
408    ) -> crate::common::RegisterField<
409        1,
410        0x1,
411        1,
412        0,
413        pccr0::Vps,
414        pccr0::Vps,
415        Pccr0_SPEC,
416        crate::common::RW,
417    > {
418        crate::common::RegisterField::<
419            1,
420            0x1,
421            1,
422            0,
423            pccr0::Vps,
424            pccr0::Vps,
425            Pccr0_SPEC,
426            crate::common::RW,
427        >::from_register(self, 0)
428    }
429
430    #[doc = "Channel 0 GTCNT Count Clear"]
431    #[inline(always)]
432    pub fn pcke(
433        self,
434    ) -> crate::common::RegisterField<
435        0,
436        0x1,
437        1,
438        0,
439        pccr0::Pcke,
440        pccr0::Pcke,
441        Pccr0_SPEC,
442        crate::common::RW,
443    > {
444        crate::common::RegisterField::<
445            0,
446            0x1,
447            1,
448            0,
449            pccr0::Pcke,
450            pccr0::Pcke,
451            Pccr0_SPEC,
452            crate::common::RW,
453        >::from_register(self, 0)
454    }
455}
456impl ::core::default::Default for Pccr0 {
457    #[inline(always)]
458    fn default() -> Pccr0 {
459        <crate::RegValueT<Pccr0_SPEC> as RegisterValue<_>>::new(0)
460    }
461}
462pub mod pccr0 {
463
464    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465    pub struct Eds_SPEC;
466    pub type Eds = crate::EnumBitfieldStruct<u8, Eds_SPEC>;
467    impl Eds {
468        #[doc = "Little endian"]
469        pub const _0: Self = Self::new(0);
470
471        #[doc = "Big endian"]
472        pub const _1: Self = Self::new(1);
473    }
474    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
475    pub struct Pckdiv_SPEC;
476    pub type Pckdiv = crate::EnumBitfieldStruct<u8, Pckdiv_SPEC>;
477    impl Pckdiv {
478        #[doc = "PCKO/2"]
479        pub const _000: Self = Self::new(0);
480
481        #[doc = "PCKO/4"]
482        pub const _001: Self = Self::new(1);
483
484        #[doc = "PCKO/6"]
485        pub const _010: Self = Self::new(2);
486
487        #[doc = "PCKO/8"]
488        pub const _011: Self = Self::new(3);
489
490        #[doc = "PCKO/10"]
491        pub const _100: Self = Self::new(4);
492
493        #[doc = "PCKO/12"]
494        pub const _101: Self = Self::new(5);
495
496        #[doc = "PCKO/14"]
497        pub const _110: Self = Self::new(6);
498
499        #[doc = "PCKO/16"]
500        pub const _111: Self = Self::new(7);
501    }
502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
503    pub struct Pckoe_SPEC;
504    pub type Pckoe = crate::EnumBitfieldStruct<u8, Pckoe_SPEC>;
505    impl Pckoe {
506        #[doc = "PCKO output is disabled (fixed to the high level)"]
507        pub const _0: Self = Self::new(0);
508
509        #[doc = "PCKO output is enabled."]
510        pub const _1: Self = Self::new(1);
511    }
512    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
513    pub struct Herie_SPEC;
514    pub type Herie = crate::EnumBitfieldStruct<u8, Herie_SPEC>;
515    impl Herie {
516        #[doc = "Generation of horizontal byte number setting error interrupt requests is disabled."]
517        pub const _0: Self = Self::new(0);
518
519        #[doc = "Generation of horizontal byte number setting error interrupt requests is enabled."]
520        pub const _1: Self = Self::new(1);
521    }
522    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
523    pub struct Verie_SPEC;
524    pub type Verie = crate::EnumBitfieldStruct<u8, Verie_SPEC>;
525    impl Verie {
526        #[doc = "Generation of vertical line number setting error interrupt requests is disabled."]
527        pub const _0: Self = Self::new(0);
528
529        #[doc = "Generation of vertical line number setting error interrupt requests is enabled."]
530        pub const _1: Self = Self::new(1);
531    }
532    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
533    pub struct Udrie_SPEC;
534    pub type Udrie = crate::EnumBitfieldStruct<u8, Udrie_SPEC>;
535    impl Udrie {
536        #[doc = "Generation of underrun interrupt requests is disabled."]
537        pub const _0: Self = Self::new(0);
538
539        #[doc = "Generation of underrun interrupt requests is enabled."]
540        pub const _1: Self = Self::new(1);
541    }
542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
543    pub struct Ovie_SPEC;
544    pub type Ovie = crate::EnumBitfieldStruct<u8, Ovie_SPEC>;
545    impl Ovie {
546        #[doc = "Generation of overrun interrupt requests is disabled."]
547        pub const _0: Self = Self::new(0);
548
549        #[doc = "Generation of overrun interrupt requests is enabled."]
550        pub const _1: Self = Self::new(1);
551    }
552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
553    pub struct Feie_SPEC;
554    pub type Feie = crate::EnumBitfieldStruct<u8, Feie_SPEC>;
555    impl Feie {
556        #[doc = "Generation of frame end interrupt requests is disabled."]
557        pub const _0: Self = Self::new(0);
558
559        #[doc = "Generation of frame end interrupt requests is enabled."]
560        pub const _1: Self = Self::new(1);
561    }
562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
563    pub struct Dfie_SPEC;
564    pub type Dfie = crate::EnumBitfieldStruct<u8, Dfie_SPEC>;
565    impl Dfie {
566        #[doc = "Generation of receive data ready interrupt requests is disabled."]
567        pub const _0: Self = Self::new(0);
568
569        #[doc = "Generation of receive data ready interrupt requests is enabled."]
570        pub const _1: Self = Self::new(1);
571    }
572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
573    pub struct Prst_SPEC;
574    pub type Prst = crate::EnumBitfieldStruct<u8, Prst_SPEC>;
575    impl Prst {
576        #[doc = "PDC reset is not applied."]
577        pub const _0: Self = Self::new(0);
578
579        #[doc = "PDC is reset."]
580        pub const _1: Self = Self::new(1);
581    }
582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
583    pub struct Hps_SPEC;
584    pub type Hps = crate::EnumBitfieldStruct<u8, Hps_SPEC>;
585    impl Hps {
586        #[doc = "HSYNC signal is active high."]
587        pub const _0: Self = Self::new(0);
588
589        #[doc = "HSYNC signal is active low."]
590        pub const _1: Self = Self::new(1);
591    }
592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
593    pub struct Vps_SPEC;
594    pub type Vps = crate::EnumBitfieldStruct<u8, Vps_SPEC>;
595    impl Vps {
596        #[doc = "VSYNC signal is active high."]
597        pub const _0: Self = Self::new(0);
598
599        #[doc = "VSYNC signal is active low."]
600        pub const _1: Self = Self::new(1);
601    }
602    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
603    pub struct Pcke_SPEC;
604    pub type Pcke = crate::EnumBitfieldStruct<u8, Pcke_SPEC>;
605    impl Pcke {
606        #[doc = "Operations for reception are stopped."]
607        pub const _0: Self = Self::new(0);
608
609        #[doc = "Operations for reception are ongoing."]
610        pub const _1: Self = Self::new(1);
611    }
612}
613#[doc(hidden)]
614#[derive(Copy, Clone, Eq, PartialEq)]
615pub struct Pccr1_SPEC;
616impl crate::sealed::RegSpec for Pccr1_SPEC {
617    type DataType = u32;
618}
619
620#[doc = "PDC Control Register 1"]
621pub type Pccr1 = crate::RegValueT<Pccr1_SPEC>;
622
623impl Pccr1 {
624    #[doc = "PDC Operation Enable"]
625    #[inline(always)]
626    pub fn pce(
627        self,
628    ) -> crate::common::RegisterField<
629        0,
630        0x1,
631        1,
632        0,
633        pccr1::Pce,
634        pccr1::Pce,
635        Pccr1_SPEC,
636        crate::common::RW,
637    > {
638        crate::common::RegisterField::<
639            0,
640            0x1,
641            1,
642            0,
643            pccr1::Pce,
644            pccr1::Pce,
645            Pccr1_SPEC,
646            crate::common::RW,
647        >::from_register(self, 0)
648    }
649}
650impl ::core::default::Default for Pccr1 {
651    #[inline(always)]
652    fn default() -> Pccr1 {
653        <crate::RegValueT<Pccr1_SPEC> as RegisterValue<_>>::new(0)
654    }
655}
656pub mod pccr1 {
657
658    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
659    pub struct Pce_SPEC;
660    pub type Pce = crate::EnumBitfieldStruct<u8, Pce_SPEC>;
661    impl Pce {
662        #[doc = "Operations for reception are disabled."]
663        pub const _0: Self = Self::new(0);
664
665        #[doc = "Operations for reception are enabled."]
666        pub const _1: Self = Self::new(1);
667    }
668}
669#[doc(hidden)]
670#[derive(Copy, Clone, Eq, PartialEq)]
671pub struct Pcsr_SPEC;
672impl crate::sealed::RegSpec for Pcsr_SPEC {
673    type DataType = u32;
674}
675
676#[doc = "PDC Status Register"]
677pub type Pcsr = crate::RegValueT<Pcsr_SPEC>;
678
679impl Pcsr {
680    #[doc = "Horizontal Byte Number Setting Error Flag"]
681    #[inline(always)]
682    pub fn herf(
683        self,
684    ) -> crate::common::RegisterField<
685        6,
686        0x1,
687        1,
688        0,
689        pcsr::Herf,
690        pcsr::Herf,
691        Pcsr_SPEC,
692        crate::common::RW,
693    > {
694        crate::common::RegisterField::<
695            6,
696            0x1,
697            1,
698            0,
699            pcsr::Herf,
700            pcsr::Herf,
701            Pcsr_SPEC,
702            crate::common::RW,
703        >::from_register(self, 0)
704    }
705
706    #[doc = "Vertical Line Number Setting Error Flag"]
707    #[inline(always)]
708    pub fn verf(
709        self,
710    ) -> crate::common::RegisterField<
711        5,
712        0x1,
713        1,
714        0,
715        pcsr::Verf,
716        pcsr::Verf,
717        Pcsr_SPEC,
718        crate::common::RW,
719    > {
720        crate::common::RegisterField::<
721            5,
722            0x1,
723            1,
724            0,
725            pcsr::Verf,
726            pcsr::Verf,
727            Pcsr_SPEC,
728            crate::common::RW,
729        >::from_register(self, 0)
730    }
731
732    #[doc = "Underrun Flag"]
733    #[inline(always)]
734    pub fn udrf(
735        self,
736    ) -> crate::common::RegisterField<
737        4,
738        0x1,
739        1,
740        0,
741        pcsr::Udrf,
742        pcsr::Udrf,
743        Pcsr_SPEC,
744        crate::common::RW,
745    > {
746        crate::common::RegisterField::<
747            4,
748            0x1,
749            1,
750            0,
751            pcsr::Udrf,
752            pcsr::Udrf,
753            Pcsr_SPEC,
754            crate::common::RW,
755        >::from_register(self, 0)
756    }
757
758    #[doc = "Overrun Flag"]
759    #[inline(always)]
760    pub fn ovrf(
761        self,
762    ) -> crate::common::RegisterField<
763        3,
764        0x1,
765        1,
766        0,
767        pcsr::Ovrf,
768        pcsr::Ovrf,
769        Pcsr_SPEC,
770        crate::common::RW,
771    > {
772        crate::common::RegisterField::<
773            3,
774            0x1,
775            1,
776            0,
777            pcsr::Ovrf,
778            pcsr::Ovrf,
779            Pcsr_SPEC,
780            crate::common::RW,
781        >::from_register(self, 0)
782    }
783
784    #[doc = "Frame End Flag"]
785    #[inline(always)]
786    pub fn fef(
787        self,
788    ) -> crate::common::RegisterField<
789        2,
790        0x1,
791        1,
792        0,
793        pcsr::Fef,
794        pcsr::Fef,
795        Pcsr_SPEC,
796        crate::common::RW,
797    > {
798        crate::common::RegisterField::<
799            2,
800            0x1,
801            1,
802            0,
803            pcsr::Fef,
804            pcsr::Fef,
805            Pcsr_SPEC,
806            crate::common::RW,
807        >::from_register(self, 0)
808    }
809
810    #[doc = "FIFO Empty Flag"]
811    #[inline(always)]
812    pub fn fempf(
813        self,
814    ) -> crate::common::RegisterField<
815        1,
816        0x1,
817        1,
818        0,
819        pcsr::Fempf,
820        pcsr::Fempf,
821        Pcsr_SPEC,
822        crate::common::R,
823    > {
824        crate::common::RegisterField::<
825            1,
826            0x1,
827            1,
828            0,
829            pcsr::Fempf,
830            pcsr::Fempf,
831            Pcsr_SPEC,
832            crate::common::R,
833        >::from_register(self, 0)
834    }
835
836    #[doc = "Frame Busy Flag"]
837    #[inline(always)]
838    pub fn fbsy(
839        self,
840    ) -> crate::common::RegisterField<
841        0,
842        0x1,
843        1,
844        0,
845        pcsr::Fbsy,
846        pcsr::Fbsy,
847        Pcsr_SPEC,
848        crate::common::R,
849    > {
850        crate::common::RegisterField::<
851            0,
852            0x1,
853            1,
854            0,
855            pcsr::Fbsy,
856            pcsr::Fbsy,
857            Pcsr_SPEC,
858            crate::common::R,
859        >::from_register(self, 0)
860    }
861}
862impl ::core::default::Default for Pcsr {
863    #[inline(always)]
864    fn default() -> Pcsr {
865        <crate::RegValueT<Pcsr_SPEC> as RegisterValue<_>>::new(2)
866    }
867}
868pub mod pcsr {
869
870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
871    pub struct Herf_SPEC;
872    pub type Herf = crate::EnumBitfieldStruct<u8, Herf_SPEC>;
873    impl Herf {
874        #[doc = "Horizontal byte number setting error has not been generated."]
875        pub const _0: Self = Self::new(0);
876
877        #[doc = "Horizontal byte number setting error has been generated."]
878        pub const _1: Self = Self::new(1);
879    }
880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
881    pub struct Verf_SPEC;
882    pub type Verf = crate::EnumBitfieldStruct<u8, Verf_SPEC>;
883    impl Verf {
884        #[doc = "Vertical line number setting error has not been generated."]
885        pub const _0: Self = Self::new(0);
886
887        #[doc = "Vertical line number setting error has been generated."]
888        pub const _1: Self = Self::new(1);
889    }
890    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
891    pub struct Udrf_SPEC;
892    pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
893    impl Udrf {
894        #[doc = "Underrun has not been generated."]
895        pub const _0: Self = Self::new(0);
896
897        #[doc = "Underrun has been generated."]
898        pub const _1: Self = Self::new(1);
899    }
900    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
901    pub struct Ovrf_SPEC;
902    pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
903    impl Ovrf {
904        #[doc = "FIFO overrun has not been generated."]
905        pub const _0: Self = Self::new(0);
906
907        #[doc = "FIFO overrun has been generated."]
908        pub const _1: Self = Self::new(1);
909    }
910    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
911    pub struct Fef_SPEC;
912    pub type Fef = crate::EnumBitfieldStruct<u8, Fef_SPEC>;
913    impl Fef {
914        #[doc = "Frame end has not been generated."]
915        pub const _0: Self = Self::new(0);
916
917        #[doc = "Frame end has been generated."]
918        pub const _1: Self = Self::new(1);
919    }
920    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
921    pub struct Fempf_SPEC;
922    pub type Fempf = crate::EnumBitfieldStruct<u8, Fempf_SPEC>;
923    impl Fempf {
924        #[doc = "FIFO is not empty."]
925        pub const _0: Self = Self::new(0);
926
927        #[doc = "FIFO is empty."]
928        pub const _1: Self = Self::new(1);
929    }
930    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
931    pub struct Fbsy_SPEC;
932    pub type Fbsy = crate::EnumBitfieldStruct<u8, Fbsy_SPEC>;
933    impl Fbsy {
934        #[doc = "Operations for reception are stopped."]
935        pub const _0: Self = Self::new(0);
936
937        #[doc = "Operations for reception are ongoing."]
938        pub const _1: Self = Self::new(1);
939    }
940}
941#[doc(hidden)]
942#[derive(Copy, Clone, Eq, PartialEq)]
943pub struct Pcmonr_SPEC;
944impl crate::sealed::RegSpec for Pcmonr_SPEC {
945    type DataType = u32;
946}
947
948#[doc = "PDC Pin Monitor Register"]
949pub type Pcmonr = crate::RegValueT<Pcmonr_SPEC>;
950
951impl Pcmonr {
952    #[doc = "HSYNC Signal Status Flag"]
953    #[inline(always)]
954    pub fn hsync(
955        self,
956    ) -> crate::common::RegisterField<
957        1,
958        0x1,
959        1,
960        0,
961        pcmonr::Hsync,
962        pcmonr::Hsync,
963        Pcmonr_SPEC,
964        crate::common::R,
965    > {
966        crate::common::RegisterField::<
967            1,
968            0x1,
969            1,
970            0,
971            pcmonr::Hsync,
972            pcmonr::Hsync,
973            Pcmonr_SPEC,
974            crate::common::R,
975        >::from_register(self, 0)
976    }
977
978    #[doc = "VSYNC Signal Status Flag"]
979    #[inline(always)]
980    pub fn vsync(
981        self,
982    ) -> crate::common::RegisterField<
983        0,
984        0x1,
985        1,
986        0,
987        pcmonr::Vsync,
988        pcmonr::Vsync,
989        Pcmonr_SPEC,
990        crate::common::R,
991    > {
992        crate::common::RegisterField::<
993            0,
994            0x1,
995            1,
996            0,
997            pcmonr::Vsync,
998            pcmonr::Vsync,
999            Pcmonr_SPEC,
1000            crate::common::R,
1001        >::from_register(self, 0)
1002    }
1003}
1004impl ::core::default::Default for Pcmonr {
1005    #[inline(always)]
1006    fn default() -> Pcmonr {
1007        <crate::RegValueT<Pcmonr_SPEC> as RegisterValue<_>>::new(0)
1008    }
1009}
1010pub mod pcmonr {
1011
1012    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1013    pub struct Hsync_SPEC;
1014    pub type Hsync = crate::EnumBitfieldStruct<u8, Hsync_SPEC>;
1015    impl Hsync {
1016        #[doc = "HSYNC signal is at the low level."]
1017        pub const _0: Self = Self::new(0);
1018
1019        #[doc = "HSYNC signal is at the high level."]
1020        pub const _1: Self = Self::new(1);
1021    }
1022    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1023    pub struct Vsync_SPEC;
1024    pub type Vsync = crate::EnumBitfieldStruct<u8, Vsync_SPEC>;
1025    impl Vsync {
1026        #[doc = "VSYNC signal is at the low level."]
1027        pub const _0: Self = Self::new(0);
1028
1029        #[doc = "VSYNC signal is at the high level."]
1030        pub const _1: Self = Self::new(1);
1031    }
1032}
1033#[doc(hidden)]
1034#[derive(Copy, Clone, Eq, PartialEq)]
1035pub struct Pcdr_SPEC;
1036impl crate::sealed::RegSpec for Pcdr_SPEC {
1037    type DataType = u32;
1038}
1039
1040#[doc = "PDC Receive Data Register"]
1041pub type Pcdr = crate::RegValueT<Pcdr_SPEC>;
1042
1043impl Pcdr {
1044    #[doc = "The PDC includes a 32-bit-wide, 22-stage FIFO for the storage of captured data. The PCDR register is a 4-byte space to which the FIFO is mapped, and four bytes of data are read from the PCDR register at a time."]
1045    #[inline(always)]
1046    pub fn pcdr(
1047        self,
1048    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pcdr_SPEC, crate::common::R>
1049    {
1050        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Pcdr_SPEC,crate::common::R>::from_register(self,0)
1051    }
1052}
1053impl ::core::default::Default for Pcdr {
1054    #[inline(always)]
1055    fn default() -> Pcdr {
1056        <crate::RegValueT<Pcdr_SPEC> as RegisterValue<_>>::new(0)
1057    }
1058}
1059
1060#[doc(hidden)]
1061#[derive(Copy, Clone, Eq, PartialEq)]
1062pub struct Vcr_SPEC;
1063impl crate::sealed::RegSpec for Vcr_SPEC {
1064    type DataType = u32;
1065}
1066
1067#[doc = "Vertical Capture Register"]
1068pub type Vcr = crate::RegValueT<Vcr_SPEC>;
1069
1070impl Vcr {
1071    #[doc = "Vertical Capture Size Number of lines to be captured."]
1072    #[inline(always)]
1073    pub fn vsz(
1074        self,
1075    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Vcr_SPEC, crate::common::RW> {
1076        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Vcr_SPEC,crate::common::RW>::from_register(self,0)
1077    }
1078
1079    #[doc = "Vertical Capture Start Line PositionNumber of the line where capture is to start."]
1080    #[inline(always)]
1081    pub fn vst(
1082        self,
1083    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Vcr_SPEC, crate::common::RW> {
1084        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Vcr_SPEC,crate::common::RW>::from_register(self,0)
1085    }
1086}
1087impl ::core::default::Default for Vcr {
1088    #[inline(always)]
1089    fn default() -> Vcr {
1090        <crate::RegValueT<Vcr_SPEC> as RegisterValue<_>>::new(0)
1091    }
1092}
1093
1094#[doc(hidden)]
1095#[derive(Copy, Clone, Eq, PartialEq)]
1096pub struct Hcr_SPEC;
1097impl crate::sealed::RegSpec for Hcr_SPEC {
1098    type DataType = u32;
1099}
1100
1101#[doc = "Horizontal Capture Register"]
1102pub type Hcr = crate::RegValueT<Hcr_SPEC>;
1103
1104impl Hcr {
1105    #[doc = "Horizontal Capture Size Number of bytes to capture horizontally."]
1106    #[inline(always)]
1107    pub fn hsz(
1108        self,
1109    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Hcr_SPEC, crate::common::RW> {
1110        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Hcr_SPEC,crate::common::RW>::from_register(self,0)
1111    }
1112
1113    #[doc = "Horizontal Capture Start Byte Position Horizontal position in bytes where capture is to start."]
1114    #[inline(always)]
1115    pub fn hst(
1116        self,
1117    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Hcr_SPEC, crate::common::RW> {
1118        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Hcr_SPEC,crate::common::RW>::from_register(self,0)
1119    }
1120}
1121impl ::core::default::Default for Hcr {
1122    #[inline(always)]
1123    fn default() -> Hcr {
1124        <crate::RegValueT<Hcr_SPEC> as RegisterValue<_>>::new(0)
1125    }
1126}
ra6m2_pac/pdc.rs

ra6m2_pac/
pdc.rs
