1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Port 1 Control Registers"]
28unsafe impl ::core::marker::Send for super::Port1 {}
29unsafe impl ::core::marker::Sync for super::Port1 {}
30impl super::Port1 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Port Control Register 1"]
38 #[inline(always)]
39 pub const fn pcntr1(
40 &self,
41 ) -> &'static crate::common::Reg<self::Pcntr1_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Pcntr1_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "Output data register"]
50 #[inline(always)]
51 pub const fn podr(&self) -> &'static crate::common::Reg<self::Podr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Podr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(0usize),
55 )
56 }
57 }
58
59 #[doc = "Data direction register"]
60 #[inline(always)]
61 pub const fn pdr(&self) -> &'static crate::common::Reg<self::Pdr_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Pdr_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(2usize),
65 )
66 }
67 }
68
69 #[doc = "Port Control Register 2"]
70 #[inline(always)]
71 pub const fn pcntr2(&self) -> &'static crate::common::Reg<self::Pcntr2_SPEC, crate::common::R> {
72 unsafe {
73 crate::common::Reg::<self::Pcntr2_SPEC, crate::common::R>::from_ptr(
74 self._svd2pac_as_ptr().add(4usize),
75 )
76 }
77 }
78
79 #[doc = "Event input data register"]
80 #[inline(always)]
81 pub const fn eidr(&self) -> &'static crate::common::Reg<self::Eidr_SPEC, crate::common::R> {
82 unsafe {
83 crate::common::Reg::<self::Eidr_SPEC, crate::common::R>::from_ptr(
84 self._svd2pac_as_ptr().add(4usize),
85 )
86 }
87 }
88
89 #[doc = "Input data register"]
90 #[inline(always)]
91 pub const fn pidr(&self) -> &'static crate::common::Reg<self::Pidr_SPEC, crate::common::R> {
92 unsafe {
93 crate::common::Reg::<self::Pidr_SPEC, crate::common::R>::from_ptr(
94 self._svd2pac_as_ptr().add(6usize),
95 )
96 }
97 }
98
99 #[doc = "Port Control Register 3"]
100 #[inline(always)]
101 pub const fn pcntr3(&self) -> &'static crate::common::Reg<self::Pcntr3_SPEC, crate::common::W> {
102 unsafe {
103 crate::common::Reg::<self::Pcntr3_SPEC, crate::common::W>::from_ptr(
104 self._svd2pac_as_ptr().add(8usize),
105 )
106 }
107 }
108
109 #[doc = "Output set register"]
110 #[inline(always)]
111 pub const fn porr(&self) -> &'static crate::common::Reg<self::Porr_SPEC, crate::common::W> {
112 unsafe {
113 crate::common::Reg::<self::Porr_SPEC, crate::common::W>::from_ptr(
114 self._svd2pac_as_ptr().add(8usize),
115 )
116 }
117 }
118
119 #[doc = "Output reset register"]
120 #[inline(always)]
121 pub const fn posr(&self) -> &'static crate::common::Reg<self::Posr_SPEC, crate::common::W> {
122 unsafe {
123 crate::common::Reg::<self::Posr_SPEC, crate::common::W>::from_ptr(
124 self._svd2pac_as_ptr().add(10usize),
125 )
126 }
127 }
128
129 #[doc = "Port Control Register 4"]
130 #[inline(always)]
131 pub const fn pcntr4(
132 &self,
133 ) -> &'static crate::common::Reg<self::Pcntr4_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Pcntr4_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(12usize),
137 )
138 }
139 }
140
141 #[doc = "Event output set register"]
142 #[inline(always)]
143 pub const fn eorr(&self) -> &'static crate::common::Reg<self::Eorr_SPEC, crate::common::RW> {
144 unsafe {
145 crate::common::Reg::<self::Eorr_SPEC, crate::common::RW>::from_ptr(
146 self._svd2pac_as_ptr().add(12usize),
147 )
148 }
149 }
150
151 #[doc = "Event output reset register"]
152 #[inline(always)]
153 pub const fn eosr(&self) -> &'static crate::common::Reg<self::Eosr_SPEC, crate::common::RW> {
154 unsafe {
155 crate::common::Reg::<self::Eosr_SPEC, crate::common::RW>::from_ptr(
156 self._svd2pac_as_ptr().add(14usize),
157 )
158 }
159 }
160}
161#[doc(hidden)]
162#[derive(Copy, Clone, Eq, PartialEq)]
163pub struct Pcntr1_SPEC;
164impl crate::sealed::RegSpec for Pcntr1_SPEC {
165 type DataType = u32;
166}
167
168#[doc = "Port Control Register 1"]
169pub type Pcntr1 = crate::RegValueT<Pcntr1_SPEC>;
170
171impl Pcntr1 {
172 #[doc = "Pmn Output Data"]
173 #[inline(always)]
174 pub fn podr(
175 self,
176 ) -> crate::common::RegisterField<
177 16,
178 0xffff,
179 1,
180 0,
181 pcntr1::Podr,
182 pcntr1::Podr,
183 Pcntr1_SPEC,
184 crate::common::RW,
185 > {
186 crate::common::RegisterField::<
187 16,
188 0xffff,
189 1,
190 0,
191 pcntr1::Podr,
192 pcntr1::Podr,
193 Pcntr1_SPEC,
194 crate::common::RW,
195 >::from_register(self, 0)
196 }
197
198 #[doc = "Pmn Direction"]
199 #[inline(always)]
200 pub fn pdr(
201 self,
202 ) -> crate::common::RegisterField<
203 0,
204 0xffff,
205 1,
206 0,
207 pcntr1::Pdr,
208 pcntr1::Pdr,
209 Pcntr1_SPEC,
210 crate::common::RW,
211 > {
212 crate::common::RegisterField::<
213 0,
214 0xffff,
215 1,
216 0,
217 pcntr1::Pdr,
218 pcntr1::Pdr,
219 Pcntr1_SPEC,
220 crate::common::RW,
221 >::from_register(self, 0)
222 }
223}
224impl ::core::default::Default for Pcntr1 {
225 #[inline(always)]
226 fn default() -> Pcntr1 {
227 <crate::RegValueT<Pcntr1_SPEC> as RegisterValue<_>>::new(0)
228 }
229}
230pub mod pcntr1 {
231
232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
233 pub struct Podr_SPEC;
234 pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
235 impl Podr {
236 #[doc = "Low output"]
237 pub const _0: Self = Self::new(0);
238
239 #[doc = "High output."]
240 pub const _1: Self = Self::new(1);
241 }
242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
243 pub struct Pdr_SPEC;
244 pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
245 impl Pdr {
246 #[doc = "Input (functions as an input pin)"]
247 pub const _0: Self = Self::new(0);
248
249 #[doc = "Output (functions as an output pin)."]
250 pub const _1: Self = Self::new(1);
251 }
252}
253#[doc(hidden)]
254#[derive(Copy, Clone, Eq, PartialEq)]
255pub struct Podr_SPEC;
256impl crate::sealed::RegSpec for Podr_SPEC {
257 type DataType = u16;
258}
259
260#[doc = "Output data register"]
261pub type Podr = crate::RegValueT<Podr_SPEC>;
262
263impl Podr {
264 #[doc = "Pmn Output Data"]
265 #[inline(always)]
266 pub fn podr(
267 self,
268 ) -> crate::common::RegisterField<
269 0,
270 0xffff,
271 1,
272 0,
273 podr::Podr,
274 podr::Podr,
275 Podr_SPEC,
276 crate::common::RW,
277 > {
278 crate::common::RegisterField::<
279 0,
280 0xffff,
281 1,
282 0,
283 podr::Podr,
284 podr::Podr,
285 Podr_SPEC,
286 crate::common::RW,
287 >::from_register(self, 0)
288 }
289}
290impl ::core::default::Default for Podr {
291 #[inline(always)]
292 fn default() -> Podr {
293 <crate::RegValueT<Podr_SPEC> as RegisterValue<_>>::new(0)
294 }
295}
296pub mod podr {
297
298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
299 pub struct Podr_SPEC;
300 pub type Podr = crate::EnumBitfieldStruct<u8, Podr_SPEC>;
301 impl Podr {
302 #[doc = "Low output"]
303 pub const _0: Self = Self::new(0);
304
305 #[doc = "High output."]
306 pub const _1: Self = Self::new(1);
307 }
308}
309#[doc(hidden)]
310#[derive(Copy, Clone, Eq, PartialEq)]
311pub struct Pdr_SPEC;
312impl crate::sealed::RegSpec for Pdr_SPEC {
313 type DataType = u16;
314}
315
316#[doc = "Data direction register"]
317pub type Pdr = crate::RegValueT<Pdr_SPEC>;
318
319impl Pdr {
320 #[doc = "Pmn Direction"]
321 #[inline(always)]
322 pub fn pdr(
323 self,
324 ) -> crate::common::RegisterField<
325 0,
326 0xffff,
327 1,
328 0,
329 pdr::Pdr,
330 pdr::Pdr,
331 Pdr_SPEC,
332 crate::common::RW,
333 > {
334 crate::common::RegisterField::<
335 0,
336 0xffff,
337 1,
338 0,
339 pdr::Pdr,
340 pdr::Pdr,
341 Pdr_SPEC,
342 crate::common::RW,
343 >::from_register(self, 0)
344 }
345}
346impl ::core::default::Default for Pdr {
347 #[inline(always)]
348 fn default() -> Pdr {
349 <crate::RegValueT<Pdr_SPEC> as RegisterValue<_>>::new(0)
350 }
351}
352pub mod pdr {
353
354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
355 pub struct Pdr_SPEC;
356 pub type Pdr = crate::EnumBitfieldStruct<u8, Pdr_SPEC>;
357 impl Pdr {
358 #[doc = "Input (functions as an input pin)"]
359 pub const _0: Self = Self::new(0);
360
361 #[doc = "Output (functions as an output pin)."]
362 pub const _1: Self = Self::new(1);
363 }
364}
365#[doc(hidden)]
366#[derive(Copy, Clone, Eq, PartialEq)]
367pub struct Pcntr2_SPEC;
368impl crate::sealed::RegSpec for Pcntr2_SPEC {
369 type DataType = u32;
370}
371
372#[doc = "Port Control Register 2"]
373pub type Pcntr2 = crate::RegValueT<Pcntr2_SPEC>;
374
375impl Pcntr2 {
376 #[doc = "Pmn Event Input Data"]
377 #[inline(always)]
378 pub fn eidr(
379 self,
380 ) -> crate::common::RegisterField<
381 16,
382 0xffff,
383 1,
384 0,
385 pcntr2::Eidr,
386 pcntr2::Eidr,
387 Pcntr2_SPEC,
388 crate::common::R,
389 > {
390 crate::common::RegisterField::<
391 16,
392 0xffff,
393 1,
394 0,
395 pcntr2::Eidr,
396 pcntr2::Eidr,
397 Pcntr2_SPEC,
398 crate::common::R,
399 >::from_register(self, 0)
400 }
401
402 #[doc = "Pmn Input Data"]
403 #[inline(always)]
404 pub fn pidr(
405 self,
406 ) -> crate::common::RegisterField<
407 0,
408 0xffff,
409 1,
410 0,
411 pcntr2::Pidr,
412 pcntr2::Pidr,
413 Pcntr2_SPEC,
414 crate::common::R,
415 > {
416 crate::common::RegisterField::<
417 0,
418 0xffff,
419 1,
420 0,
421 pcntr2::Pidr,
422 pcntr2::Pidr,
423 Pcntr2_SPEC,
424 crate::common::R,
425 >::from_register(self, 0)
426 }
427}
428impl ::core::default::Default for Pcntr2 {
429 #[inline(always)]
430 fn default() -> Pcntr2 {
431 <crate::RegValueT<Pcntr2_SPEC> as RegisterValue<_>>::new(0)
432 }
433}
434pub mod pcntr2 {
435
436 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
437 pub struct Eidr_SPEC;
438 pub type Eidr = crate::EnumBitfieldStruct<u8, Eidr_SPEC>;
439 impl Eidr {
440 #[doc = "Low input"]
441 pub const _0: Self = Self::new(0);
442
443 #[doc = "High input."]
444 pub const _1: Self = Self::new(1);
445 }
446 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
447 pub struct Pidr_SPEC;
448 pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
449 impl Pidr {
450 #[doc = "Low input"]
451 pub const _0: Self = Self::new(0);
452
453 #[doc = "High input."]
454 pub const _1: Self = Self::new(1);
455 }
456}
457#[doc(hidden)]
458#[derive(Copy, Clone, Eq, PartialEq)]
459pub struct Eidr_SPEC;
460impl crate::sealed::RegSpec for Eidr_SPEC {
461 type DataType = u16;
462}
463
464#[doc = "Event input data register"]
465pub type Eidr = crate::RegValueT<Eidr_SPEC>;
466
467impl Eidr {
468 #[doc = "Pmn Event Input Data"]
469 #[inline(always)]
470 pub fn eidr(
471 self,
472 ) -> crate::common::RegisterField<
473 0,
474 0xffff,
475 1,
476 0,
477 eidr::Eidr,
478 eidr::Eidr,
479 Eidr_SPEC,
480 crate::common::R,
481 > {
482 crate::common::RegisterField::<
483 0,
484 0xffff,
485 1,
486 0,
487 eidr::Eidr,
488 eidr::Eidr,
489 Eidr_SPEC,
490 crate::common::R,
491 >::from_register(self, 0)
492 }
493}
494impl ::core::default::Default for Eidr {
495 #[inline(always)]
496 fn default() -> Eidr {
497 <crate::RegValueT<Eidr_SPEC> as RegisterValue<_>>::new(0)
498 }
499}
500pub mod eidr {
501
502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
503 pub struct Eidr_SPEC;
504 pub type Eidr = crate::EnumBitfieldStruct<u8, Eidr_SPEC>;
505 impl Eidr {
506 #[doc = "Low input"]
507 pub const _0: Self = Self::new(0);
508
509 #[doc = "High input."]
510 pub const _1: Self = Self::new(1);
511 }
512}
513#[doc(hidden)]
514#[derive(Copy, Clone, Eq, PartialEq)]
515pub struct Pidr_SPEC;
516impl crate::sealed::RegSpec for Pidr_SPEC {
517 type DataType = u16;
518}
519
520#[doc = "Input data register"]
521pub type Pidr = crate::RegValueT<Pidr_SPEC>;
522
523impl Pidr {
524 #[doc = "Pmn Input Data"]
525 #[inline(always)]
526 pub fn pidr(
527 self,
528 ) -> crate::common::RegisterField<
529 0,
530 0xffff,
531 1,
532 0,
533 pidr::Pidr,
534 pidr::Pidr,
535 Pidr_SPEC,
536 crate::common::R,
537 > {
538 crate::common::RegisterField::<
539 0,
540 0xffff,
541 1,
542 0,
543 pidr::Pidr,
544 pidr::Pidr,
545 Pidr_SPEC,
546 crate::common::R,
547 >::from_register(self, 0)
548 }
549}
550impl ::core::default::Default for Pidr {
551 #[inline(always)]
552 fn default() -> Pidr {
553 <crate::RegValueT<Pidr_SPEC> as RegisterValue<_>>::new(0)
554 }
555}
556pub mod pidr {
557
558 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
559 pub struct Pidr_SPEC;
560 pub type Pidr = crate::EnumBitfieldStruct<u8, Pidr_SPEC>;
561 impl Pidr {
562 #[doc = "Low input"]
563 pub const _0: Self = Self::new(0);
564
565 #[doc = "High input."]
566 pub const _1: Self = Self::new(1);
567 }
568}
569#[doc(hidden)]
570#[derive(Copy, Clone, Eq, PartialEq)]
571pub struct Pcntr3_SPEC;
572impl crate::sealed::RegSpec for Pcntr3_SPEC {
573 type DataType = u32;
574}
575
576#[doc = "Port Control Register 3"]
577pub type Pcntr3 = crate::RegValueT<Pcntr3_SPEC>;
578
579impl Pcntr3 {
580 #[doc = "Pmn Output Reset"]
581 #[inline(always)]
582 pub fn porr(
583 self,
584 ) -> crate::common::RegisterField<
585 16,
586 0xffff,
587 1,
588 0,
589 pcntr3::Porr,
590 pcntr3::Porr,
591 Pcntr3_SPEC,
592 crate::common::W,
593 > {
594 crate::common::RegisterField::<
595 16,
596 0xffff,
597 1,
598 0,
599 pcntr3::Porr,
600 pcntr3::Porr,
601 Pcntr3_SPEC,
602 crate::common::W,
603 >::from_register(self, 0)
604 }
605
606 #[doc = "Pmn Output Set"]
607 #[inline(always)]
608 pub fn posr(
609 self,
610 ) -> crate::common::RegisterField<
611 0,
612 0xffff,
613 1,
614 0,
615 pcntr3::Posr,
616 pcntr3::Posr,
617 Pcntr3_SPEC,
618 crate::common::W,
619 > {
620 crate::common::RegisterField::<
621 0,
622 0xffff,
623 1,
624 0,
625 pcntr3::Posr,
626 pcntr3::Posr,
627 Pcntr3_SPEC,
628 crate::common::W,
629 >::from_register(self, 0)
630 }
631}
632impl ::core::default::Default for Pcntr3 {
633 #[inline(always)]
634 fn default() -> Pcntr3 {
635 <crate::RegValueT<Pcntr3_SPEC> as RegisterValue<_>>::new(0)
636 }
637}
638pub mod pcntr3 {
639
640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
641 pub struct Porr_SPEC;
642 pub type Porr = crate::EnumBitfieldStruct<u8, Porr_SPEC>;
643 impl Porr {
644 #[doc = "No affect to output"]
645 pub const _0: Self = Self::new(0);
646
647 #[doc = "Low output."]
648 pub const _1: Self = Self::new(1);
649 }
650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
651 pub struct Posr_SPEC;
652 pub type Posr = crate::EnumBitfieldStruct<u8, Posr_SPEC>;
653 impl Posr {
654 #[doc = "No affect to output"]
655 pub const _0: Self = Self::new(0);
656
657 #[doc = "High output."]
658 pub const _1: Self = Self::new(1);
659 }
660}
661#[doc(hidden)]
662#[derive(Copy, Clone, Eq, PartialEq)]
663pub struct Porr_SPEC;
664impl crate::sealed::RegSpec for Porr_SPEC {
665 type DataType = u16;
666}
667
668#[doc = "Output set register"]
669pub type Porr = crate::RegValueT<Porr_SPEC>;
670
671impl Porr {
672 #[doc = "Pmn Output Reset"]
673 #[inline(always)]
674 pub fn porr(
675 self,
676 ) -> crate::common::RegisterField<
677 0,
678 0xffff,
679 1,
680 0,
681 porr::Porr,
682 porr::Porr,
683 Porr_SPEC,
684 crate::common::W,
685 > {
686 crate::common::RegisterField::<
687 0,
688 0xffff,
689 1,
690 0,
691 porr::Porr,
692 porr::Porr,
693 Porr_SPEC,
694 crate::common::W,
695 >::from_register(self, 0)
696 }
697}
698impl ::core::default::Default for Porr {
699 #[inline(always)]
700 fn default() -> Porr {
701 <crate::RegValueT<Porr_SPEC> as RegisterValue<_>>::new(0)
702 }
703}
704pub mod porr {
705
706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
707 pub struct Porr_SPEC;
708 pub type Porr = crate::EnumBitfieldStruct<u8, Porr_SPEC>;
709 impl Porr {
710 #[doc = "No affect to output"]
711 pub const _0: Self = Self::new(0);
712
713 #[doc = "Low output."]
714 pub const _1: Self = Self::new(1);
715 }
716}
717#[doc(hidden)]
718#[derive(Copy, Clone, Eq, PartialEq)]
719pub struct Posr_SPEC;
720impl crate::sealed::RegSpec for Posr_SPEC {
721 type DataType = u16;
722}
723
724#[doc = "Output reset register"]
725pub type Posr = crate::RegValueT<Posr_SPEC>;
726
727impl Posr {
728 #[doc = "Pmn Output Set"]
729 #[inline(always)]
730 pub fn posr(
731 self,
732 ) -> crate::common::RegisterField<
733 0,
734 0xffff,
735 1,
736 0,
737 posr::Posr,
738 posr::Posr,
739 Posr_SPEC,
740 crate::common::W,
741 > {
742 crate::common::RegisterField::<
743 0,
744 0xffff,
745 1,
746 0,
747 posr::Posr,
748 posr::Posr,
749 Posr_SPEC,
750 crate::common::W,
751 >::from_register(self, 0)
752 }
753}
754impl ::core::default::Default for Posr {
755 #[inline(always)]
756 fn default() -> Posr {
757 <crate::RegValueT<Posr_SPEC> as RegisterValue<_>>::new(0)
758 }
759}
760pub mod posr {
761
762 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
763 pub struct Posr_SPEC;
764 pub type Posr = crate::EnumBitfieldStruct<u8, Posr_SPEC>;
765 impl Posr {
766 #[doc = "No affect to output"]
767 pub const _0: Self = Self::new(0);
768
769 #[doc = "High output."]
770 pub const _1: Self = Self::new(1);
771 }
772}
773#[doc(hidden)]
774#[derive(Copy, Clone, Eq, PartialEq)]
775pub struct Pcntr4_SPEC;
776impl crate::sealed::RegSpec for Pcntr4_SPEC {
777 type DataType = u32;
778}
779
780#[doc = "Port Control Register 4"]
781pub type Pcntr4 = crate::RegValueT<Pcntr4_SPEC>;
782
783impl Pcntr4 {
784 #[doc = "Pmn Event Output Reset"]
785 #[inline(always)]
786 pub fn eorr(
787 self,
788 ) -> crate::common::RegisterField<
789 16,
790 0xffff,
791 1,
792 0,
793 pcntr4::Eorr,
794 pcntr4::Eorr,
795 Pcntr4_SPEC,
796 crate::common::RW,
797 > {
798 crate::common::RegisterField::<
799 16,
800 0xffff,
801 1,
802 0,
803 pcntr4::Eorr,
804 pcntr4::Eorr,
805 Pcntr4_SPEC,
806 crate::common::RW,
807 >::from_register(self, 0)
808 }
809
810 #[doc = "Pmn Event Output Set"]
811 #[inline(always)]
812 pub fn eosr(
813 self,
814 ) -> crate::common::RegisterField<
815 0,
816 0xffff,
817 1,
818 0,
819 pcntr4::Eosr,
820 pcntr4::Eosr,
821 Pcntr4_SPEC,
822 crate::common::RW,
823 > {
824 crate::common::RegisterField::<
825 0,
826 0xffff,
827 1,
828 0,
829 pcntr4::Eosr,
830 pcntr4::Eosr,
831 Pcntr4_SPEC,
832 crate::common::RW,
833 >::from_register(self, 0)
834 }
835}
836impl ::core::default::Default for Pcntr4 {
837 #[inline(always)]
838 fn default() -> Pcntr4 {
839 <crate::RegValueT<Pcntr4_SPEC> as RegisterValue<_>>::new(0)
840 }
841}
842pub mod pcntr4 {
843
844 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
845 pub struct Eorr_SPEC;
846 pub type Eorr = crate::EnumBitfieldStruct<u8, Eorr_SPEC>;
847 impl Eorr {
848 #[doc = "No affect to output"]
849 pub const _0: Self = Self::new(0);
850
851 #[doc = "Low output"]
852 pub const _1: Self = Self::new(1);
853 }
854 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
855 pub struct Eosr_SPEC;
856 pub type Eosr = crate::EnumBitfieldStruct<u8, Eosr_SPEC>;
857 impl Eosr {
858 #[doc = "No affect to output"]
859 pub const _0: Self = Self::new(0);
860
861 #[doc = "High output."]
862 pub const _1: Self = Self::new(1);
863 }
864}
865#[doc(hidden)]
866#[derive(Copy, Clone, Eq, PartialEq)]
867pub struct Eorr_SPEC;
868impl crate::sealed::RegSpec for Eorr_SPEC {
869 type DataType = u16;
870}
871
872#[doc = "Event output set register"]
873pub type Eorr = crate::RegValueT<Eorr_SPEC>;
874
875impl Eorr {
876 #[doc = "Pmn Event Output Reset"]
877 #[inline(always)]
878 pub fn eorr(
879 self,
880 ) -> crate::common::RegisterField<
881 0,
882 0xffff,
883 1,
884 0,
885 eorr::Eorr,
886 eorr::Eorr,
887 Eorr_SPEC,
888 crate::common::RW,
889 > {
890 crate::common::RegisterField::<
891 0,
892 0xffff,
893 1,
894 0,
895 eorr::Eorr,
896 eorr::Eorr,
897 Eorr_SPEC,
898 crate::common::RW,
899 >::from_register(self, 0)
900 }
901}
902impl ::core::default::Default for Eorr {
903 #[inline(always)]
904 fn default() -> Eorr {
905 <crate::RegValueT<Eorr_SPEC> as RegisterValue<_>>::new(0)
906 }
907}
908pub mod eorr {
909
910 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
911 pub struct Eorr_SPEC;
912 pub type Eorr = crate::EnumBitfieldStruct<u8, Eorr_SPEC>;
913 impl Eorr {
914 #[doc = "No affect to output"]
915 pub const _0: Self = Self::new(0);
916
917 #[doc = "Low output"]
918 pub const _1: Self = Self::new(1);
919 }
920}
921#[doc(hidden)]
922#[derive(Copy, Clone, Eq, PartialEq)]
923pub struct Eosr_SPEC;
924impl crate::sealed::RegSpec for Eosr_SPEC {
925 type DataType = u16;
926}
927
928#[doc = "Event output reset register"]
929pub type Eosr = crate::RegValueT<Eosr_SPEC>;
930
931impl Eosr {
932 #[doc = "Pmn Event Output Set"]
933 #[inline(always)]
934 pub fn eosr(
935 self,
936 ) -> crate::common::RegisterField<
937 0,
938 0xffff,
939 1,
940 0,
941 eosr::Eosr,
942 eosr::Eosr,
943 Eosr_SPEC,
944 crate::common::RW,
945 > {
946 crate::common::RegisterField::<
947 0,
948 0xffff,
949 1,
950 0,
951 eosr::Eosr,
952 eosr::Eosr,
953 Eosr_SPEC,
954 crate::common::RW,
955 >::from_register(self, 0)
956 }
957}
958impl ::core::default::Default for Eosr {
959 #[inline(always)]
960 fn default() -> Eosr {
961 <crate::RegValueT<Eosr_SPEC> as RegisterValue<_>>::new(0)
962 }
963}
964pub mod eosr {
965
966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
967 pub struct Eosr_SPEC;
968 pub type Eosr = crate::EnumBitfieldStruct<u8, Eosr_SPEC>;
969 impl Eosr {
970 #[doc = "No affect to output"]
971 pub const _0: Self = Self::new(0);
972
973 #[doc = "High output."]
974 pub const _1: Self = Self::new(1);
975 }
976}