1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM Timer 8 (32-bit Enhanced)"]
28unsafe impl ::core::marker::Send for super::Gpt328 {}
29unsafe impl ::core::marker::Sync for super::Gpt328 {}
30impl super::Gpt328 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "General PWM Timer Write-Protection Register"]
38 #[inline(always)]
39 pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "General PWM Timer Software Start Register"]
48 #[inline(always)]
49 pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "General PWM Timer Software Stop Register"]
58 #[inline(always)]
59 pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(8usize),
63 )
64 }
65 }
66
67 #[doc = "General PWM Timer Software Clear Register"]
68 #[inline(always)]
69 pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70 unsafe {
71 crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72 self._svd2pac_as_ptr().add(12usize),
73 )
74 }
75 }
76
77 #[doc = "General PWM Timer Start Source Select Register"]
78 #[inline(always)]
79 pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(16usize),
83 )
84 }
85 }
86
87 #[doc = "General PWM Timer Stop Source Select Register"]
88 #[inline(always)]
89 pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(20usize),
93 )
94 }
95 }
96
97 #[doc = "General PWM Timer Clear Source Select Register"]
98 #[inline(always)]
99 pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100 unsafe {
101 crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102 self._svd2pac_as_ptr().add(24usize),
103 )
104 }
105 }
106
107 #[doc = "General PWM Timer Up Count Source Select Register"]
108 #[inline(always)]
109 pub const fn gtupsr(
110 &self,
111 ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(28usize),
115 )
116 }
117 }
118
119 #[doc = "General PWM Timer Down Count Source Select Register"]
120 #[inline(always)]
121 pub const fn gtdnsr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(32usize),
127 )
128 }
129 }
130
131 #[doc = "General PWM Timer Input Capture Source Select Register A"]
132 #[inline(always)]
133 pub const fn gticasr(
134 &self,
135 ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(36usize),
139 )
140 }
141 }
142
143 #[doc = "General PWM Timer Input Capture Source Select Register B"]
144 #[inline(always)]
145 pub const fn gticbsr(
146 &self,
147 ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148 unsafe {
149 crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150 self._svd2pac_as_ptr().add(40usize),
151 )
152 }
153 }
154
155 #[doc = "General PWM Timer Control Register"]
156 #[inline(always)]
157 pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158 unsafe {
159 crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160 self._svd2pac_as_ptr().add(44usize),
161 )
162 }
163 }
164
165 #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166 #[inline(always)]
167 pub const fn gtuddtyc(
168 &self,
169 ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170 unsafe {
171 crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172 self._svd2pac_as_ptr().add(48usize),
173 )
174 }
175 }
176
177 #[doc = "General PWM Timer I/O Control Register"]
178 #[inline(always)]
179 pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180 unsafe {
181 crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182 self._svd2pac_as_ptr().add(52usize),
183 )
184 }
185 }
186
187 #[doc = "General PWM Timer Interrupt Output Setting Register"]
188 #[inline(always)]
189 pub const fn gtintad(
190 &self,
191 ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192 unsafe {
193 crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194 self._svd2pac_as_ptr().add(56usize),
195 )
196 }
197 }
198
199 #[doc = "General PWM Timer Status Register"]
200 #[inline(always)]
201 pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202 unsafe {
203 crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204 self._svd2pac_as_ptr().add(60usize),
205 )
206 }
207 }
208
209 #[doc = "General PWM Timer Buffer Enable Register"]
210 #[inline(always)]
211 pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212 unsafe {
213 crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214 self._svd2pac_as_ptr().add(64usize),
215 )
216 }
217 }
218
219 #[doc = "General PWM Timer Counter"]
220 #[inline(always)]
221 pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(72usize),
225 )
226 }
227 }
228
229 #[doc = "General PWM Timer Compare Capture Register A"]
230 #[inline(always)]
231 pub const fn gtccra(
232 &self,
233 ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
234 unsafe {
235 crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
236 self._svd2pac_as_ptr().add(76usize),
237 )
238 }
239 }
240
241 #[doc = "General PWM Timer Compare Capture Register B"]
242 #[inline(always)]
243 pub const fn gtccrb(
244 &self,
245 ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(80usize),
249 )
250 }
251 }
252
253 #[doc = "General PWM Timer Compare Capture Register C"]
254 #[inline(always)]
255 pub const fn gtccrc(
256 &self,
257 ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
258 unsafe {
259 crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
260 self._svd2pac_as_ptr().add(84usize),
261 )
262 }
263 }
264
265 #[doc = "General PWM Timer Compare Capture Register E"]
266 #[inline(always)]
267 pub const fn gtccre(
268 &self,
269 ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(88usize),
273 )
274 }
275 }
276
277 #[doc = "General PWM Timer Compare Capture Register D"]
278 #[inline(always)]
279 pub const fn gtccrd(
280 &self,
281 ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
282 unsafe {
283 crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
284 self._svd2pac_as_ptr().add(92usize),
285 )
286 }
287 }
288
289 #[doc = "General PWM Timer Compare Capture Register F"]
290 #[inline(always)]
291 pub const fn gtccrf(
292 &self,
293 ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
294 unsafe {
295 crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
296 self._svd2pac_as_ptr().add(96usize),
297 )
298 }
299 }
300
301 #[doc = "General PWM Timer Cycle Setting Register"]
302 #[inline(always)]
303 pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
304 unsafe {
305 crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
306 self._svd2pac_as_ptr().add(100usize),
307 )
308 }
309 }
310
311 #[doc = "General PWM Timer Cycle Setting Buffer Register"]
312 #[inline(always)]
313 pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(104usize),
317 )
318 }
319 }
320
321 #[doc = "General PWM Timer Dead Time Control Register"]
322 #[inline(always)]
323 pub const fn gtdtcr(
324 &self,
325 ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
326 unsafe {
327 crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
328 self._svd2pac_as_ptr().add(136usize),
329 )
330 }
331 }
332
333 #[doc = "General PWM Timer Dead Time Value Register U"]
334 #[inline(always)]
335 pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
336 unsafe {
337 crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
338 self._svd2pac_as_ptr().add(140usize),
339 )
340 }
341 }
342}
343#[doc(hidden)]
344#[derive(Copy, Clone, Eq, PartialEq)]
345pub struct Gtwp_SPEC;
346impl crate::sealed::RegSpec for Gtwp_SPEC {
347 type DataType = u32;
348}
349
350#[doc = "General PWM Timer Write-Protection Register"]
351pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
352
353impl Gtwp {
354 #[doc = "GTWP Key Code"]
355 #[inline(always)]
356 pub fn prkey(
357 self,
358 ) -> crate::common::RegisterField<
359 8,
360 0xff,
361 1,
362 0,
363 gtwp::Prkey,
364 gtwp::Prkey,
365 Gtwp_SPEC,
366 crate::common::W,
367 > {
368 crate::common::RegisterField::<
369 8,
370 0xff,
371 1,
372 0,
373 gtwp::Prkey,
374 gtwp::Prkey,
375 Gtwp_SPEC,
376 crate::common::W,
377 >::from_register(self, 0)
378 }
379
380 #[doc = "Register Write Disable"]
381 #[inline(always)]
382 pub fn wp(
383 self,
384 ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
385 {
386 crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
387 }
388}
389impl ::core::default::Default for Gtwp {
390 #[inline(always)]
391 fn default() -> Gtwp {
392 <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
393 }
394}
395pub mod gtwp {
396
397 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
398 pub struct Prkey_SPEC;
399 pub type Prkey = crate::EnumBitfieldStruct<u8, Prkey_SPEC>;
400 impl Prkey {
401 #[doc = "Written to these bits, the WP bits write is permitted."]
402 pub const _0_X_A_5: Self = Self::new(165);
403 }
404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
405 pub struct Wp_SPEC;
406 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
407 impl Wp {
408 #[doc = "Enable writes to the register"]
409 pub const _0: Self = Self::new(0);
410
411 #[doc = "Disable writes to the register"]
412 pub const _1: Self = Self::new(1);
413 }
414}
415#[doc(hidden)]
416#[derive(Copy, Clone, Eq, PartialEq)]
417pub struct Gtstr_SPEC;
418impl crate::sealed::RegSpec for Gtstr_SPEC {
419 type DataType = u32;
420}
421
422#[doc = "General PWM Timer Software Start Register"]
423pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
424
425impl Gtstr {
426 #[doc = "Channel 13 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
427 #[inline(always)]
428 pub fn cstrt13(
429 self,
430 ) -> crate::common::RegisterField<
431 13,
432 0x1,
433 1,
434 0,
435 gtstr::Cstrt13,
436 gtstr::Cstrt13,
437 Gtstr_SPEC,
438 crate::common::RW,
439 > {
440 crate::common::RegisterField::<
441 13,
442 0x1,
443 1,
444 0,
445 gtstr::Cstrt13,
446 gtstr::Cstrt13,
447 Gtstr_SPEC,
448 crate::common::RW,
449 >::from_register(self, 0)
450 }
451
452 #[doc = "Channel 12 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
453 #[inline(always)]
454 pub fn cstrt12(
455 self,
456 ) -> crate::common::RegisterField<
457 12,
458 0x1,
459 1,
460 0,
461 gtstr::Cstrt12,
462 gtstr::Cstrt12,
463 Gtstr_SPEC,
464 crate::common::RW,
465 > {
466 crate::common::RegisterField::<
467 12,
468 0x1,
469 1,
470 0,
471 gtstr::Cstrt12,
472 gtstr::Cstrt12,
473 Gtstr_SPEC,
474 crate::common::RW,
475 >::from_register(self, 0)
476 }
477
478 #[doc = "Channel 11 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
479 #[inline(always)]
480 pub fn cstrt11(
481 self,
482 ) -> crate::common::RegisterField<
483 11,
484 0x1,
485 1,
486 0,
487 gtstr::Cstrt11,
488 gtstr::Cstrt11,
489 Gtstr_SPEC,
490 crate::common::RW,
491 > {
492 crate::common::RegisterField::<
493 11,
494 0x1,
495 1,
496 0,
497 gtstr::Cstrt11,
498 gtstr::Cstrt11,
499 Gtstr_SPEC,
500 crate::common::RW,
501 >::from_register(self, 0)
502 }
503
504 #[doc = "Channel 10 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
505 #[inline(always)]
506 pub fn cstrt10(
507 self,
508 ) -> crate::common::RegisterField<
509 10,
510 0x1,
511 1,
512 0,
513 gtstr::Cstrt10,
514 gtstr::Cstrt10,
515 Gtstr_SPEC,
516 crate::common::RW,
517 > {
518 crate::common::RegisterField::<
519 10,
520 0x1,
521 1,
522 0,
523 gtstr::Cstrt10,
524 gtstr::Cstrt10,
525 Gtstr_SPEC,
526 crate::common::RW,
527 >::from_register(self, 0)
528 }
529
530 #[doc = "Channel 9 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
531 #[inline(always)]
532 pub fn cstrt9(
533 self,
534 ) -> crate::common::RegisterField<
535 9,
536 0x1,
537 1,
538 0,
539 gtstr::Cstrt9,
540 gtstr::Cstrt9,
541 Gtstr_SPEC,
542 crate::common::RW,
543 > {
544 crate::common::RegisterField::<
545 9,
546 0x1,
547 1,
548 0,
549 gtstr::Cstrt9,
550 gtstr::Cstrt9,
551 Gtstr_SPEC,
552 crate::common::RW,
553 >::from_register(self, 0)
554 }
555
556 #[doc = "Channel 8 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
557 #[inline(always)]
558 pub fn cstrt8(
559 self,
560 ) -> crate::common::RegisterField<
561 8,
562 0x1,
563 1,
564 0,
565 gtstr::Cstrt8,
566 gtstr::Cstrt8,
567 Gtstr_SPEC,
568 crate::common::RW,
569 > {
570 crate::common::RegisterField::<
571 8,
572 0x1,
573 1,
574 0,
575 gtstr::Cstrt8,
576 gtstr::Cstrt8,
577 Gtstr_SPEC,
578 crate::common::RW,
579 >::from_register(self, 0)
580 }
581
582 #[doc = "Channel 7 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
583 #[inline(always)]
584 pub fn cstrt7(
585 self,
586 ) -> crate::common::RegisterField<
587 7,
588 0x1,
589 1,
590 0,
591 gtstr::Cstrt7,
592 gtstr::Cstrt7,
593 Gtstr_SPEC,
594 crate::common::RW,
595 > {
596 crate::common::RegisterField::<
597 7,
598 0x1,
599 1,
600 0,
601 gtstr::Cstrt7,
602 gtstr::Cstrt7,
603 Gtstr_SPEC,
604 crate::common::RW,
605 >::from_register(self, 0)
606 }
607
608 #[doc = "Channel 6 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
609 #[inline(always)]
610 pub fn cstrt6(
611 self,
612 ) -> crate::common::RegisterField<
613 6,
614 0x1,
615 1,
616 0,
617 gtstr::Cstrt6,
618 gtstr::Cstrt6,
619 Gtstr_SPEC,
620 crate::common::RW,
621 > {
622 crate::common::RegisterField::<
623 6,
624 0x1,
625 1,
626 0,
627 gtstr::Cstrt6,
628 gtstr::Cstrt6,
629 Gtstr_SPEC,
630 crate::common::RW,
631 >::from_register(self, 0)
632 }
633
634 #[doc = "Channel 5 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
635 #[inline(always)]
636 pub fn cstrt5(
637 self,
638 ) -> crate::common::RegisterField<
639 5,
640 0x1,
641 1,
642 0,
643 gtstr::Cstrt5,
644 gtstr::Cstrt5,
645 Gtstr_SPEC,
646 crate::common::RW,
647 > {
648 crate::common::RegisterField::<
649 5,
650 0x1,
651 1,
652 0,
653 gtstr::Cstrt5,
654 gtstr::Cstrt5,
655 Gtstr_SPEC,
656 crate::common::RW,
657 >::from_register(self, 0)
658 }
659
660 #[doc = "Channel 4 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
661 #[inline(always)]
662 pub fn cstrt4(
663 self,
664 ) -> crate::common::RegisterField<
665 4,
666 0x1,
667 1,
668 0,
669 gtstr::Cstrt4,
670 gtstr::Cstrt4,
671 Gtstr_SPEC,
672 crate::common::RW,
673 > {
674 crate::common::RegisterField::<
675 4,
676 0x1,
677 1,
678 0,
679 gtstr::Cstrt4,
680 gtstr::Cstrt4,
681 Gtstr_SPEC,
682 crate::common::RW,
683 >::from_register(self, 0)
684 }
685
686 #[doc = "Channel 3 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
687 #[inline(always)]
688 pub fn cstrt3(
689 self,
690 ) -> crate::common::RegisterField<
691 3,
692 0x1,
693 1,
694 0,
695 gtstr::Cstrt3,
696 gtstr::Cstrt3,
697 Gtstr_SPEC,
698 crate::common::RW,
699 > {
700 crate::common::RegisterField::<
701 3,
702 0x1,
703 1,
704 0,
705 gtstr::Cstrt3,
706 gtstr::Cstrt3,
707 Gtstr_SPEC,
708 crate::common::RW,
709 >::from_register(self, 0)
710 }
711
712 #[doc = "Channel 2 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
713 #[inline(always)]
714 pub fn cstrt2(
715 self,
716 ) -> crate::common::RegisterField<
717 2,
718 0x1,
719 1,
720 0,
721 gtstr::Cstrt2,
722 gtstr::Cstrt2,
723 Gtstr_SPEC,
724 crate::common::RW,
725 > {
726 crate::common::RegisterField::<
727 2,
728 0x1,
729 1,
730 0,
731 gtstr::Cstrt2,
732 gtstr::Cstrt2,
733 Gtstr_SPEC,
734 crate::common::RW,
735 >::from_register(self, 0)
736 }
737
738 #[doc = "Channel 1 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
739 #[inline(always)]
740 pub fn cstrt1(
741 self,
742 ) -> crate::common::RegisterField<
743 1,
744 0x1,
745 1,
746 0,
747 gtstr::Cstrt1,
748 gtstr::Cstrt1,
749 Gtstr_SPEC,
750 crate::common::RW,
751 > {
752 crate::common::RegisterField::<
753 1,
754 0x1,
755 1,
756 0,
757 gtstr::Cstrt1,
758 gtstr::Cstrt1,
759 Gtstr_SPEC,
760 crate::common::RW,
761 >::from_register(self, 0)
762 }
763
764 #[doc = "Channel 0 GTCNT Count StartRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running."]
765 #[inline(always)]
766 pub fn cstrt0(
767 self,
768 ) -> crate::common::RegisterField<
769 0,
770 0x1,
771 1,
772 0,
773 gtstr::Cstrt0,
774 gtstr::Cstrt0,
775 Gtstr_SPEC,
776 crate::common::RW,
777 > {
778 crate::common::RegisterField::<
779 0,
780 0x1,
781 1,
782 0,
783 gtstr::Cstrt0,
784 gtstr::Cstrt0,
785 Gtstr_SPEC,
786 crate::common::RW,
787 >::from_register(self, 0)
788 }
789}
790impl ::core::default::Default for Gtstr {
791 #[inline(always)]
792 fn default() -> Gtstr {
793 <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
794 }
795}
796pub mod gtstr {
797
798 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
799 pub struct Cstrt13_SPEC;
800 pub type Cstrt13 = crate::EnumBitfieldStruct<u8, Cstrt13_SPEC>;
801 impl Cstrt13 {
802 #[doc = "No effect (write) / counter stop (read)"]
803 pub const _0: Self = Self::new(0);
804
805 #[doc = "GPT3213.GTCNT counter starts (write) / Counter running (read)"]
806 pub const _1: Self = Self::new(1);
807 }
808 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
809 pub struct Cstrt12_SPEC;
810 pub type Cstrt12 = crate::EnumBitfieldStruct<u8, Cstrt12_SPEC>;
811 impl Cstrt12 {
812 #[doc = "No effect (write) / counter stop (read)"]
813 pub const _0: Self = Self::new(0);
814
815 #[doc = "GPT3212.GTCNT counter starts (write) / Counter running (read)"]
816 pub const _1: Self = Self::new(1);
817 }
818 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
819 pub struct Cstrt11_SPEC;
820 pub type Cstrt11 = crate::EnumBitfieldStruct<u8, Cstrt11_SPEC>;
821 impl Cstrt11 {
822 #[doc = "No effect (write) / counter stop (read)"]
823 pub const _0: Self = Self::new(0);
824
825 #[doc = "GPT3211.GTCNT counter starts (write) / Counter running (read)"]
826 pub const _1: Self = Self::new(1);
827 }
828 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
829 pub struct Cstrt10_SPEC;
830 pub type Cstrt10 = crate::EnumBitfieldStruct<u8, Cstrt10_SPEC>;
831 impl Cstrt10 {
832 #[doc = "No effect (write) / counter stop (read)"]
833 pub const _0: Self = Self::new(0);
834
835 #[doc = "GPT3210.GTCNT counter starts (write) / Counter running (read)"]
836 pub const _1: Self = Self::new(1);
837 }
838 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
839 pub struct Cstrt9_SPEC;
840 pub type Cstrt9 = crate::EnumBitfieldStruct<u8, Cstrt9_SPEC>;
841 impl Cstrt9 {
842 #[doc = "No effect (write) / counter stop (read)"]
843 pub const _0: Self = Self::new(0);
844
845 #[doc = "GPT329.GTCNT counter starts (write) / Counter running (read)"]
846 pub const _1: Self = Self::new(1);
847 }
848 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
849 pub struct Cstrt8_SPEC;
850 pub type Cstrt8 = crate::EnumBitfieldStruct<u8, Cstrt8_SPEC>;
851 impl Cstrt8 {
852 #[doc = "No effect (write) / counter stop (read)"]
853 pub const _0: Self = Self::new(0);
854
855 #[doc = "GPT328.GTCNT counter starts (write) / Counter running (read)"]
856 pub const _1: Self = Self::new(1);
857 }
858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
859 pub struct Cstrt7_SPEC;
860 pub type Cstrt7 = crate::EnumBitfieldStruct<u8, Cstrt7_SPEC>;
861 impl Cstrt7 {
862 #[doc = "No effect (write) / counter stop (read)"]
863 pub const _0: Self = Self::new(0);
864
865 #[doc = "GPT32E7.GTCNT counter starts (write) / Counter running (read)"]
866 pub const _1: Self = Self::new(1);
867 }
868 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
869 pub struct Cstrt6_SPEC;
870 pub type Cstrt6 = crate::EnumBitfieldStruct<u8, Cstrt6_SPEC>;
871 impl Cstrt6 {
872 #[doc = "No effect (write) / counter stop (read)"]
873 pub const _0: Self = Self::new(0);
874
875 #[doc = "GPT32E6.GTCNT counter starts (write) / Counter running (read)"]
876 pub const _1: Self = Self::new(1);
877 }
878 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
879 pub struct Cstrt5_SPEC;
880 pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
881 impl Cstrt5 {
882 #[doc = "No effect (write) / counter stop (read)"]
883 pub const _0: Self = Self::new(0);
884
885 #[doc = "GPT32E5.GTCNT counter starts (write) / Counter running (read)"]
886 pub const _1: Self = Self::new(1);
887 }
888 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
889 pub struct Cstrt4_SPEC;
890 pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
891 impl Cstrt4 {
892 #[doc = "No effect (write) / counter stop (read)"]
893 pub const _0: Self = Self::new(0);
894
895 #[doc = "GPT32E4.GTCNT counter starts (write) / Counter running (read)"]
896 pub const _1: Self = Self::new(1);
897 }
898 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
899 pub struct Cstrt3_SPEC;
900 pub type Cstrt3 = crate::EnumBitfieldStruct<u8, Cstrt3_SPEC>;
901 impl Cstrt3 {
902 #[doc = "No effect (write) / counter stop (read)"]
903 pub const _0: Self = Self::new(0);
904
905 #[doc = "GPT32EH3.GTCNT counter starts (write) / Counter running (read)"]
906 pub const _1: Self = Self::new(1);
907 }
908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
909 pub struct Cstrt2_SPEC;
910 pub type Cstrt2 = crate::EnumBitfieldStruct<u8, Cstrt2_SPEC>;
911 impl Cstrt2 {
912 #[doc = "No effect (write) / counter stop (read)"]
913 pub const _0: Self = Self::new(0);
914
915 #[doc = "GPT32EH2.GTCNT counter starts (write) / Counter running (read)"]
916 pub const _1: Self = Self::new(1);
917 }
918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
919 pub struct Cstrt1_SPEC;
920 pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
921 impl Cstrt1 {
922 #[doc = "No effect (write) / counter stop (read)"]
923 pub const _0: Self = Self::new(0);
924
925 #[doc = "GPT32EH1.GTCNT counter starts (write) / Counter running (read)"]
926 pub const _1: Self = Self::new(1);
927 }
928 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
929 pub struct Cstrt0_SPEC;
930 pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
931 impl Cstrt0 {
932 #[doc = "No effect (write) / counter stop (read)"]
933 pub const _0: Self = Self::new(0);
934
935 #[doc = "GPT32EH0.GTCNT counter starts (write) / Counter running (read)"]
936 pub const _1: Self = Self::new(1);
937 }
938}
939#[doc(hidden)]
940#[derive(Copy, Clone, Eq, PartialEq)]
941pub struct Gtstp_SPEC;
942impl crate::sealed::RegSpec for Gtstp_SPEC {
943 type DataType = u32;
944}
945
946#[doc = "General PWM Timer Software Stop Register"]
947pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
948
949impl Gtstp {
950 #[doc = "Channel 13 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
951 #[inline(always)]
952 pub fn cstop13(
953 self,
954 ) -> crate::common::RegisterField<
955 13,
956 0x1,
957 1,
958 0,
959 gtstp::Cstop13,
960 gtstp::Cstop13,
961 Gtstp_SPEC,
962 crate::common::RW,
963 > {
964 crate::common::RegisterField::<
965 13,
966 0x1,
967 1,
968 0,
969 gtstp::Cstop13,
970 gtstp::Cstop13,
971 Gtstp_SPEC,
972 crate::common::RW,
973 >::from_register(self, 0)
974 }
975
976 #[doc = "Channel 12 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
977 #[inline(always)]
978 pub fn cstop12(
979 self,
980 ) -> crate::common::RegisterField<
981 12,
982 0x1,
983 1,
984 0,
985 gtstp::Cstop12,
986 gtstp::Cstop12,
987 Gtstp_SPEC,
988 crate::common::RW,
989 > {
990 crate::common::RegisterField::<
991 12,
992 0x1,
993 1,
994 0,
995 gtstp::Cstop12,
996 gtstp::Cstop12,
997 Gtstp_SPEC,
998 crate::common::RW,
999 >::from_register(self, 0)
1000 }
1001
1002 #[doc = "Channel 11 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1003 #[inline(always)]
1004 pub fn cstop11(
1005 self,
1006 ) -> crate::common::RegisterField<
1007 11,
1008 0x1,
1009 1,
1010 0,
1011 gtstp::Cstop11,
1012 gtstp::Cstop11,
1013 Gtstp_SPEC,
1014 crate::common::RW,
1015 > {
1016 crate::common::RegisterField::<
1017 11,
1018 0x1,
1019 1,
1020 0,
1021 gtstp::Cstop11,
1022 gtstp::Cstop11,
1023 Gtstp_SPEC,
1024 crate::common::RW,
1025 >::from_register(self, 0)
1026 }
1027
1028 #[doc = "Channel 10 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1029 #[inline(always)]
1030 pub fn cstop10(
1031 self,
1032 ) -> crate::common::RegisterField<
1033 10,
1034 0x1,
1035 1,
1036 0,
1037 gtstp::Cstop10,
1038 gtstp::Cstop10,
1039 Gtstp_SPEC,
1040 crate::common::RW,
1041 > {
1042 crate::common::RegisterField::<
1043 10,
1044 0x1,
1045 1,
1046 0,
1047 gtstp::Cstop10,
1048 gtstp::Cstop10,
1049 Gtstp_SPEC,
1050 crate::common::RW,
1051 >::from_register(self, 0)
1052 }
1053
1054 #[doc = "Channel 9 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1055 #[inline(always)]
1056 pub fn cstop9(
1057 self,
1058 ) -> crate::common::RegisterField<
1059 9,
1060 0x1,
1061 1,
1062 0,
1063 gtstp::Cstop9,
1064 gtstp::Cstop9,
1065 Gtstp_SPEC,
1066 crate::common::RW,
1067 > {
1068 crate::common::RegisterField::<
1069 9,
1070 0x1,
1071 1,
1072 0,
1073 gtstp::Cstop9,
1074 gtstp::Cstop9,
1075 Gtstp_SPEC,
1076 crate::common::RW,
1077 >::from_register(self, 0)
1078 }
1079
1080 #[doc = "Channel 8 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1081 #[inline(always)]
1082 pub fn cstop8(
1083 self,
1084 ) -> crate::common::RegisterField<
1085 8,
1086 0x1,
1087 1,
1088 0,
1089 gtstp::Cstop8,
1090 gtstp::Cstop8,
1091 Gtstp_SPEC,
1092 crate::common::RW,
1093 > {
1094 crate::common::RegisterField::<
1095 8,
1096 0x1,
1097 1,
1098 0,
1099 gtstp::Cstop8,
1100 gtstp::Cstop8,
1101 Gtstp_SPEC,
1102 crate::common::RW,
1103 >::from_register(self, 0)
1104 }
1105
1106 #[doc = "Channel 7 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1107 #[inline(always)]
1108 pub fn cstop7(
1109 self,
1110 ) -> crate::common::RegisterField<
1111 7,
1112 0x1,
1113 1,
1114 0,
1115 gtstp::Cstop7,
1116 gtstp::Cstop7,
1117 Gtstp_SPEC,
1118 crate::common::RW,
1119 > {
1120 crate::common::RegisterField::<
1121 7,
1122 0x1,
1123 1,
1124 0,
1125 gtstp::Cstop7,
1126 gtstp::Cstop7,
1127 Gtstp_SPEC,
1128 crate::common::RW,
1129 >::from_register(self, 0)
1130 }
1131
1132 #[doc = "Channel 6 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1133 #[inline(always)]
1134 pub fn cstop6(
1135 self,
1136 ) -> crate::common::RegisterField<
1137 6,
1138 0x1,
1139 1,
1140 0,
1141 gtstp::Cstop6,
1142 gtstp::Cstop6,
1143 Gtstp_SPEC,
1144 crate::common::RW,
1145 > {
1146 crate::common::RegisterField::<
1147 6,
1148 0x1,
1149 1,
1150 0,
1151 gtstp::Cstop6,
1152 gtstp::Cstop6,
1153 Gtstp_SPEC,
1154 crate::common::RW,
1155 >::from_register(self, 0)
1156 }
1157
1158 #[doc = "Channel 5 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1159 #[inline(always)]
1160 pub fn cstop5(
1161 self,
1162 ) -> crate::common::RegisterField<
1163 5,
1164 0x1,
1165 1,
1166 0,
1167 gtstp::Cstop5,
1168 gtstp::Cstop5,
1169 Gtstp_SPEC,
1170 crate::common::RW,
1171 > {
1172 crate::common::RegisterField::<
1173 5,
1174 0x1,
1175 1,
1176 0,
1177 gtstp::Cstop5,
1178 gtstp::Cstop5,
1179 Gtstp_SPEC,
1180 crate::common::RW,
1181 >::from_register(self, 0)
1182 }
1183
1184 #[doc = "Channel 4 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1185 #[inline(always)]
1186 pub fn cstop4(
1187 self,
1188 ) -> crate::common::RegisterField<
1189 4,
1190 0x1,
1191 1,
1192 0,
1193 gtstp::Cstop4,
1194 gtstp::Cstop4,
1195 Gtstp_SPEC,
1196 crate::common::RW,
1197 > {
1198 crate::common::RegisterField::<
1199 4,
1200 0x1,
1201 1,
1202 0,
1203 gtstp::Cstop4,
1204 gtstp::Cstop4,
1205 Gtstp_SPEC,
1206 crate::common::RW,
1207 >::from_register(self, 0)
1208 }
1209
1210 #[doc = "Channel 3 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1211 #[inline(always)]
1212 pub fn cstop3(
1213 self,
1214 ) -> crate::common::RegisterField<
1215 3,
1216 0x1,
1217 1,
1218 0,
1219 gtstp::Cstop3,
1220 gtstp::Cstop3,
1221 Gtstp_SPEC,
1222 crate::common::RW,
1223 > {
1224 crate::common::RegisterField::<
1225 3,
1226 0x1,
1227 1,
1228 0,
1229 gtstp::Cstop3,
1230 gtstp::Cstop3,
1231 Gtstp_SPEC,
1232 crate::common::RW,
1233 >::from_register(self, 0)
1234 }
1235
1236 #[doc = "Channel 2 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1237 #[inline(always)]
1238 pub fn cstop2(
1239 self,
1240 ) -> crate::common::RegisterField<
1241 2,
1242 0x1,
1243 1,
1244 0,
1245 gtstp::Cstop2,
1246 gtstp::Cstop2,
1247 Gtstp_SPEC,
1248 crate::common::RW,
1249 > {
1250 crate::common::RegisterField::<
1251 2,
1252 0x1,
1253 1,
1254 0,
1255 gtstp::Cstop2,
1256 gtstp::Cstop2,
1257 Gtstp_SPEC,
1258 crate::common::RW,
1259 >::from_register(self, 0)
1260 }
1261
1262 #[doc = "Channel 1 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1263 #[inline(always)]
1264 pub fn cstop1(
1265 self,
1266 ) -> crate::common::RegisterField<
1267 1,
1268 0x1,
1269 1,
1270 0,
1271 gtstp::Cstop1,
1272 gtstp::Cstop1,
1273 Gtstp_SPEC,
1274 crate::common::RW,
1275 > {
1276 crate::common::RegisterField::<
1277 1,
1278 0x1,
1279 1,
1280 0,
1281 gtstp::Cstop1,
1282 gtstp::Cstop1,
1283 Gtstp_SPEC,
1284 crate::common::RW,
1285 >::from_register(self, 0)
1286 }
1287
1288 #[doc = "Channel 0 GTCNT Count StopRead data shows each channel\'s counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop."]
1289 #[inline(always)]
1290 pub fn cstop0(
1291 self,
1292 ) -> crate::common::RegisterField<
1293 0,
1294 0x1,
1295 1,
1296 0,
1297 gtstp::Cstop0,
1298 gtstp::Cstop0,
1299 Gtstp_SPEC,
1300 crate::common::RW,
1301 > {
1302 crate::common::RegisterField::<
1303 0,
1304 0x1,
1305 1,
1306 0,
1307 gtstp::Cstop0,
1308 gtstp::Cstop0,
1309 Gtstp_SPEC,
1310 crate::common::RW,
1311 >::from_register(self, 0)
1312 }
1313}
1314impl ::core::default::Default for Gtstp {
1315 #[inline(always)]
1316 fn default() -> Gtstp {
1317 <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1318 }
1319}
1320pub mod gtstp {
1321
1322 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1323 pub struct Cstop13_SPEC;
1324 pub type Cstop13 = crate::EnumBitfieldStruct<u8, Cstop13_SPEC>;
1325 impl Cstop13 {
1326 #[doc = "No effect (write) / counter running (read)"]
1327 pub const _0: Self = Self::new(0);
1328
1329 #[doc = "GPT3213.GTCNT counter stops (write) / Counter stop (read)"]
1330 pub const _1: Self = Self::new(1);
1331 }
1332 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1333 pub struct Cstop12_SPEC;
1334 pub type Cstop12 = crate::EnumBitfieldStruct<u8, Cstop12_SPEC>;
1335 impl Cstop12 {
1336 #[doc = "No effect (write) / counter running (read)"]
1337 pub const _0: Self = Self::new(0);
1338
1339 #[doc = "GPT3212.GTCNT counter stops (write) / Counter stop (read)"]
1340 pub const _1: Self = Self::new(1);
1341 }
1342 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1343 pub struct Cstop11_SPEC;
1344 pub type Cstop11 = crate::EnumBitfieldStruct<u8, Cstop11_SPEC>;
1345 impl Cstop11 {
1346 #[doc = "No effect (write) / counter running (read)"]
1347 pub const _0: Self = Self::new(0);
1348
1349 #[doc = "GPT3211.GTCNT counter stops (write) / Counter stop (read)"]
1350 pub const _1: Self = Self::new(1);
1351 }
1352 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1353 pub struct Cstop10_SPEC;
1354 pub type Cstop10 = crate::EnumBitfieldStruct<u8, Cstop10_SPEC>;
1355 impl Cstop10 {
1356 #[doc = "No effect (write) / counter running (read)"]
1357 pub const _0: Self = Self::new(0);
1358
1359 #[doc = "GPT3210.GTCNT counter stops (write) / Counter stop (read)"]
1360 pub const _1: Self = Self::new(1);
1361 }
1362 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1363 pub struct Cstop9_SPEC;
1364 pub type Cstop9 = crate::EnumBitfieldStruct<u8, Cstop9_SPEC>;
1365 impl Cstop9 {
1366 #[doc = "No effect (write) / counter running (read)"]
1367 pub const _0: Self = Self::new(0);
1368
1369 #[doc = "GPT329.GTCNT counter stops (write) / Counter stop (read)"]
1370 pub const _1: Self = Self::new(1);
1371 }
1372 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1373 pub struct Cstop8_SPEC;
1374 pub type Cstop8 = crate::EnumBitfieldStruct<u8, Cstop8_SPEC>;
1375 impl Cstop8 {
1376 #[doc = "No effect (write) / counter running (read)"]
1377 pub const _0: Self = Self::new(0);
1378
1379 #[doc = "GPT328.GTCNT counter stops (write) / Counter stop (read)"]
1380 pub const _1: Self = Self::new(1);
1381 }
1382 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1383 pub struct Cstop7_SPEC;
1384 pub type Cstop7 = crate::EnumBitfieldStruct<u8, Cstop7_SPEC>;
1385 impl Cstop7 {
1386 #[doc = "No effect (write) / counter running (read)"]
1387 pub const _0: Self = Self::new(0);
1388
1389 #[doc = "GPT32E7.GTCNT counter stops (write) / Counter stop (read)"]
1390 pub const _1: Self = Self::new(1);
1391 }
1392 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1393 pub struct Cstop6_SPEC;
1394 pub type Cstop6 = crate::EnumBitfieldStruct<u8, Cstop6_SPEC>;
1395 impl Cstop6 {
1396 #[doc = "No effect (write) / counter running (read)"]
1397 pub const _0: Self = Self::new(0);
1398
1399 #[doc = "GPT32E6.GTCNT counter stops (write) / Counter stop (read)"]
1400 pub const _1: Self = Self::new(1);
1401 }
1402 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1403 pub struct Cstop5_SPEC;
1404 pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1405 impl Cstop5 {
1406 #[doc = "No effect (write) / counter running (read)"]
1407 pub const _0: Self = Self::new(0);
1408
1409 #[doc = "GPT32E5.GTCNT counter stops (write) / Counter stop (read)"]
1410 pub const _1: Self = Self::new(1);
1411 }
1412 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1413 pub struct Cstop4_SPEC;
1414 pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1415 impl Cstop4 {
1416 #[doc = "No effect (write) / counter running (read)"]
1417 pub const _0: Self = Self::new(0);
1418
1419 #[doc = "GPT32E4.GTCNT counter stops (write) / Counter stop (read)"]
1420 pub const _1: Self = Self::new(1);
1421 }
1422 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1423 pub struct Cstop3_SPEC;
1424 pub type Cstop3 = crate::EnumBitfieldStruct<u8, Cstop3_SPEC>;
1425 impl Cstop3 {
1426 #[doc = "No effect (write) / counter running (read)"]
1427 pub const _0: Self = Self::new(0);
1428
1429 #[doc = "GPT32EH3.GTCNT counter stops (write) / Counter stop (read)"]
1430 pub const _1: Self = Self::new(1);
1431 }
1432 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1433 pub struct Cstop2_SPEC;
1434 pub type Cstop2 = crate::EnumBitfieldStruct<u8, Cstop2_SPEC>;
1435 impl Cstop2 {
1436 #[doc = "No effect (write) / counter running (read)"]
1437 pub const _0: Self = Self::new(0);
1438
1439 #[doc = "GPT32EH2.GTCNT counter stops (write) / Counter stop (read)"]
1440 pub const _1: Self = Self::new(1);
1441 }
1442 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1443 pub struct Cstop1_SPEC;
1444 pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1445 impl Cstop1 {
1446 #[doc = "No effect (write) / counter running (read)"]
1447 pub const _0: Self = Self::new(0);
1448
1449 #[doc = "GPT32EH1.GTCNT counter stops (write) / Counter stop (read)"]
1450 pub const _1: Self = Self::new(1);
1451 }
1452 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1453 pub struct Cstop0_SPEC;
1454 pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1455 impl Cstop0 {
1456 #[doc = "No effect (write) / counter running (read)"]
1457 pub const _0: Self = Self::new(0);
1458
1459 #[doc = "GPT32EH0.GTCNT counter stops (write) / Counter stop (read)"]
1460 pub const _1: Self = Self::new(1);
1461 }
1462}
1463#[doc(hidden)]
1464#[derive(Copy, Clone, Eq, PartialEq)]
1465pub struct Gtclr_SPEC;
1466impl crate::sealed::RegSpec for Gtclr_SPEC {
1467 type DataType = u32;
1468}
1469
1470#[doc = "General PWM Timer Software Clear Register"]
1471pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1472
1473impl Gtclr {
1474 #[doc = "Channel 13 GTCNT Count Clear"]
1475 #[inline(always)]
1476 pub fn cclr13(
1477 self,
1478 ) -> crate::common::RegisterField<
1479 13,
1480 0x1,
1481 1,
1482 0,
1483 gtclr::Cclr13,
1484 gtclr::Cclr13,
1485 Gtclr_SPEC,
1486 crate::common::W,
1487 > {
1488 crate::common::RegisterField::<
1489 13,
1490 0x1,
1491 1,
1492 0,
1493 gtclr::Cclr13,
1494 gtclr::Cclr13,
1495 Gtclr_SPEC,
1496 crate::common::W,
1497 >::from_register(self, 0)
1498 }
1499
1500 #[doc = "Channel 12 GTCNT Count Clear"]
1501 #[inline(always)]
1502 pub fn cclr12(
1503 self,
1504 ) -> crate::common::RegisterField<
1505 12,
1506 0x1,
1507 1,
1508 0,
1509 gtclr::Cclr12,
1510 gtclr::Cclr12,
1511 Gtclr_SPEC,
1512 crate::common::W,
1513 > {
1514 crate::common::RegisterField::<
1515 12,
1516 0x1,
1517 1,
1518 0,
1519 gtclr::Cclr12,
1520 gtclr::Cclr12,
1521 Gtclr_SPEC,
1522 crate::common::W,
1523 >::from_register(self, 0)
1524 }
1525
1526 #[doc = "Channel 11 GTCNT Count Clear"]
1527 #[inline(always)]
1528 pub fn cclr11(
1529 self,
1530 ) -> crate::common::RegisterField<
1531 11,
1532 0x1,
1533 1,
1534 0,
1535 gtclr::Cclr11,
1536 gtclr::Cclr11,
1537 Gtclr_SPEC,
1538 crate::common::W,
1539 > {
1540 crate::common::RegisterField::<
1541 11,
1542 0x1,
1543 1,
1544 0,
1545 gtclr::Cclr11,
1546 gtclr::Cclr11,
1547 Gtclr_SPEC,
1548 crate::common::W,
1549 >::from_register(self, 0)
1550 }
1551
1552 #[doc = "Channel 10 GTCNT Count Clear"]
1553 #[inline(always)]
1554 pub fn cclr10(
1555 self,
1556 ) -> crate::common::RegisterField<
1557 10,
1558 0x1,
1559 1,
1560 0,
1561 gtclr::Cclr10,
1562 gtclr::Cclr10,
1563 Gtclr_SPEC,
1564 crate::common::W,
1565 > {
1566 crate::common::RegisterField::<
1567 10,
1568 0x1,
1569 1,
1570 0,
1571 gtclr::Cclr10,
1572 gtclr::Cclr10,
1573 Gtclr_SPEC,
1574 crate::common::W,
1575 >::from_register(self, 0)
1576 }
1577
1578 #[doc = "Channel 9 GTCNT Count Clear"]
1579 #[inline(always)]
1580 pub fn cclr9(
1581 self,
1582 ) -> crate::common::RegisterField<
1583 9,
1584 0x1,
1585 1,
1586 0,
1587 gtclr::Cclr9,
1588 gtclr::Cclr9,
1589 Gtclr_SPEC,
1590 crate::common::W,
1591 > {
1592 crate::common::RegisterField::<
1593 9,
1594 0x1,
1595 1,
1596 0,
1597 gtclr::Cclr9,
1598 gtclr::Cclr9,
1599 Gtclr_SPEC,
1600 crate::common::W,
1601 >::from_register(self, 0)
1602 }
1603
1604 #[doc = "Channel 8 GTCNT Count Clear"]
1605 #[inline(always)]
1606 pub fn cclr8(
1607 self,
1608 ) -> crate::common::RegisterField<
1609 8,
1610 0x1,
1611 1,
1612 0,
1613 gtclr::Cclr8,
1614 gtclr::Cclr8,
1615 Gtclr_SPEC,
1616 crate::common::W,
1617 > {
1618 crate::common::RegisterField::<
1619 8,
1620 0x1,
1621 1,
1622 0,
1623 gtclr::Cclr8,
1624 gtclr::Cclr8,
1625 Gtclr_SPEC,
1626 crate::common::W,
1627 >::from_register(self, 0)
1628 }
1629
1630 #[doc = "Channel 7 GTCNT Count Clear"]
1631 #[inline(always)]
1632 pub fn cclr7(
1633 self,
1634 ) -> crate::common::RegisterField<
1635 7,
1636 0x1,
1637 1,
1638 0,
1639 gtclr::Cclr7,
1640 gtclr::Cclr7,
1641 Gtclr_SPEC,
1642 crate::common::W,
1643 > {
1644 crate::common::RegisterField::<
1645 7,
1646 0x1,
1647 1,
1648 0,
1649 gtclr::Cclr7,
1650 gtclr::Cclr7,
1651 Gtclr_SPEC,
1652 crate::common::W,
1653 >::from_register(self, 0)
1654 }
1655
1656 #[doc = "Channel 6 GTCNT Count Clear"]
1657 #[inline(always)]
1658 pub fn cclr6(
1659 self,
1660 ) -> crate::common::RegisterField<
1661 6,
1662 0x1,
1663 1,
1664 0,
1665 gtclr::Cclr6,
1666 gtclr::Cclr6,
1667 Gtclr_SPEC,
1668 crate::common::W,
1669 > {
1670 crate::common::RegisterField::<
1671 6,
1672 0x1,
1673 1,
1674 0,
1675 gtclr::Cclr6,
1676 gtclr::Cclr6,
1677 Gtclr_SPEC,
1678 crate::common::W,
1679 >::from_register(self, 0)
1680 }
1681
1682 #[doc = "Channel 5 GTCNT Count Clear"]
1683 #[inline(always)]
1684 pub fn cclr5(
1685 self,
1686 ) -> crate::common::RegisterField<
1687 5,
1688 0x1,
1689 1,
1690 0,
1691 gtclr::Cclr5,
1692 gtclr::Cclr5,
1693 Gtclr_SPEC,
1694 crate::common::W,
1695 > {
1696 crate::common::RegisterField::<
1697 5,
1698 0x1,
1699 1,
1700 0,
1701 gtclr::Cclr5,
1702 gtclr::Cclr5,
1703 Gtclr_SPEC,
1704 crate::common::W,
1705 >::from_register(self, 0)
1706 }
1707
1708 #[doc = "Channel 4 GTCNT Count Clear"]
1709 #[inline(always)]
1710 pub fn cclr4(
1711 self,
1712 ) -> crate::common::RegisterField<
1713 4,
1714 0x1,
1715 1,
1716 0,
1717 gtclr::Cclr4,
1718 gtclr::Cclr4,
1719 Gtclr_SPEC,
1720 crate::common::W,
1721 > {
1722 crate::common::RegisterField::<
1723 4,
1724 0x1,
1725 1,
1726 0,
1727 gtclr::Cclr4,
1728 gtclr::Cclr4,
1729 Gtclr_SPEC,
1730 crate::common::W,
1731 >::from_register(self, 0)
1732 }
1733
1734 #[doc = "Channel 3 GTCNT Count Clear"]
1735 #[inline(always)]
1736 pub fn cclr3(
1737 self,
1738 ) -> crate::common::RegisterField<
1739 3,
1740 0x1,
1741 1,
1742 0,
1743 gtclr::Cclr3,
1744 gtclr::Cclr3,
1745 Gtclr_SPEC,
1746 crate::common::W,
1747 > {
1748 crate::common::RegisterField::<
1749 3,
1750 0x1,
1751 1,
1752 0,
1753 gtclr::Cclr3,
1754 gtclr::Cclr3,
1755 Gtclr_SPEC,
1756 crate::common::W,
1757 >::from_register(self, 0)
1758 }
1759
1760 #[doc = "Channel 2 GTCNT Count Clear"]
1761 #[inline(always)]
1762 pub fn cclr2(
1763 self,
1764 ) -> crate::common::RegisterField<
1765 2,
1766 0x1,
1767 1,
1768 0,
1769 gtclr::Cclr2,
1770 gtclr::Cclr2,
1771 Gtclr_SPEC,
1772 crate::common::W,
1773 > {
1774 crate::common::RegisterField::<
1775 2,
1776 0x1,
1777 1,
1778 0,
1779 gtclr::Cclr2,
1780 gtclr::Cclr2,
1781 Gtclr_SPEC,
1782 crate::common::W,
1783 >::from_register(self, 0)
1784 }
1785
1786 #[doc = "Channel 1 GTCNT Count Clear"]
1787 #[inline(always)]
1788 pub fn cclr1(
1789 self,
1790 ) -> crate::common::RegisterField<
1791 1,
1792 0x1,
1793 1,
1794 0,
1795 gtclr::Cclr1,
1796 gtclr::Cclr1,
1797 Gtclr_SPEC,
1798 crate::common::W,
1799 > {
1800 crate::common::RegisterField::<
1801 1,
1802 0x1,
1803 1,
1804 0,
1805 gtclr::Cclr1,
1806 gtclr::Cclr1,
1807 Gtclr_SPEC,
1808 crate::common::W,
1809 >::from_register(self, 0)
1810 }
1811
1812 #[doc = "Channel 0 GTCNT Count Clear"]
1813 #[inline(always)]
1814 pub fn cclr0(
1815 self,
1816 ) -> crate::common::RegisterField<
1817 0,
1818 0x1,
1819 1,
1820 0,
1821 gtclr::Cclr0,
1822 gtclr::Cclr0,
1823 Gtclr_SPEC,
1824 crate::common::W,
1825 > {
1826 crate::common::RegisterField::<
1827 0,
1828 0x1,
1829 1,
1830 0,
1831 gtclr::Cclr0,
1832 gtclr::Cclr0,
1833 Gtclr_SPEC,
1834 crate::common::W,
1835 >::from_register(self, 0)
1836 }
1837}
1838impl ::core::default::Default for Gtclr {
1839 #[inline(always)]
1840 fn default() -> Gtclr {
1841 <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1842 }
1843}
1844pub mod gtclr {
1845
1846 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1847 pub struct Cclr13_SPEC;
1848 pub type Cclr13 = crate::EnumBitfieldStruct<u8, Cclr13_SPEC>;
1849 impl Cclr13 {
1850 #[doc = "No effect"]
1851 pub const _0: Self = Self::new(0);
1852
1853 #[doc = "GPT3213.GTCNT counter clears"]
1854 pub const _1: Self = Self::new(1);
1855 }
1856 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1857 pub struct Cclr12_SPEC;
1858 pub type Cclr12 = crate::EnumBitfieldStruct<u8, Cclr12_SPEC>;
1859 impl Cclr12 {
1860 #[doc = "No effect"]
1861 pub const _0: Self = Self::new(0);
1862
1863 #[doc = "GPT3212.GTCNT counter clears"]
1864 pub const _1: Self = Self::new(1);
1865 }
1866 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1867 pub struct Cclr11_SPEC;
1868 pub type Cclr11 = crate::EnumBitfieldStruct<u8, Cclr11_SPEC>;
1869 impl Cclr11 {
1870 #[doc = "No effect"]
1871 pub const _0: Self = Self::new(0);
1872
1873 #[doc = "GPT3211.GTCNT counter clears"]
1874 pub const _1: Self = Self::new(1);
1875 }
1876 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1877 pub struct Cclr10_SPEC;
1878 pub type Cclr10 = crate::EnumBitfieldStruct<u8, Cclr10_SPEC>;
1879 impl Cclr10 {
1880 #[doc = "No effect"]
1881 pub const _0: Self = Self::new(0);
1882
1883 #[doc = "GPT3210.GTCNT counter clears"]
1884 pub const _1: Self = Self::new(1);
1885 }
1886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1887 pub struct Cclr9_SPEC;
1888 pub type Cclr9 = crate::EnumBitfieldStruct<u8, Cclr9_SPEC>;
1889 impl Cclr9 {
1890 #[doc = "No effect"]
1891 pub const _0: Self = Self::new(0);
1892
1893 #[doc = "GPT329.GTCNT counter clears"]
1894 pub const _1: Self = Self::new(1);
1895 }
1896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1897 pub struct Cclr8_SPEC;
1898 pub type Cclr8 = crate::EnumBitfieldStruct<u8, Cclr8_SPEC>;
1899 impl Cclr8 {
1900 #[doc = "No effect"]
1901 pub const _0: Self = Self::new(0);
1902
1903 #[doc = "GPT328.GTCNT counter clears"]
1904 pub const _1: Self = Self::new(1);
1905 }
1906 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1907 pub struct Cclr7_SPEC;
1908 pub type Cclr7 = crate::EnumBitfieldStruct<u8, Cclr7_SPEC>;
1909 impl Cclr7 {
1910 #[doc = "No effect"]
1911 pub const _0: Self = Self::new(0);
1912
1913 #[doc = "GPT32E7.GTCNT counter clears"]
1914 pub const _1: Self = Self::new(1);
1915 }
1916 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1917 pub struct Cclr6_SPEC;
1918 pub type Cclr6 = crate::EnumBitfieldStruct<u8, Cclr6_SPEC>;
1919 impl Cclr6 {
1920 #[doc = "No effect"]
1921 pub const _0: Self = Self::new(0);
1922
1923 #[doc = "GPT32E6.GTCNT counter clears"]
1924 pub const _1: Self = Self::new(1);
1925 }
1926 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1927 pub struct Cclr5_SPEC;
1928 pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
1929 impl Cclr5 {
1930 #[doc = "No effect"]
1931 pub const _0: Self = Self::new(0);
1932
1933 #[doc = "GPT32E5.GTCNT counter clears"]
1934 pub const _1: Self = Self::new(1);
1935 }
1936 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1937 pub struct Cclr4_SPEC;
1938 pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
1939 impl Cclr4 {
1940 #[doc = "No effect"]
1941 pub const _0: Self = Self::new(0);
1942
1943 #[doc = "GPT32E4.GTCNT counter clears"]
1944 pub const _1: Self = Self::new(1);
1945 }
1946 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1947 pub struct Cclr3_SPEC;
1948 pub type Cclr3 = crate::EnumBitfieldStruct<u8, Cclr3_SPEC>;
1949 impl Cclr3 {
1950 #[doc = "No effect"]
1951 pub const _0: Self = Self::new(0);
1952
1953 #[doc = "GPT32EH3.GTCNT counter clears"]
1954 pub const _1: Self = Self::new(1);
1955 }
1956 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1957 pub struct Cclr2_SPEC;
1958 pub type Cclr2 = crate::EnumBitfieldStruct<u8, Cclr2_SPEC>;
1959 impl Cclr2 {
1960 #[doc = "No effect"]
1961 pub const _0: Self = Self::new(0);
1962
1963 #[doc = "GPT32EH2.GTCNT counter clears"]
1964 pub const _1: Self = Self::new(1);
1965 }
1966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1967 pub struct Cclr1_SPEC;
1968 pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
1969 impl Cclr1 {
1970 #[doc = "No effect"]
1971 pub const _0: Self = Self::new(0);
1972
1973 #[doc = "GPT32EH1.GTCNT counter clears"]
1974 pub const _1: Self = Self::new(1);
1975 }
1976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1977 pub struct Cclr0_SPEC;
1978 pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
1979 impl Cclr0 {
1980 #[doc = "No effect"]
1981 pub const _0: Self = Self::new(0);
1982
1983 #[doc = "GPT32EH0.GTCNT counter clears"]
1984 pub const _1: Self = Self::new(1);
1985 }
1986}
1987#[doc(hidden)]
1988#[derive(Copy, Clone, Eq, PartialEq)]
1989pub struct Gtssr_SPEC;
1990impl crate::sealed::RegSpec for Gtssr_SPEC {
1991 type DataType = u32;
1992}
1993
1994#[doc = "General PWM Timer Start Source Select Register"]
1995pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
1996
1997impl Gtssr {
1998 #[doc = "Software Source Counter Start Enable"]
1999 #[inline(always)]
2000 pub fn cstrt(
2001 self,
2002 ) -> crate::common::RegisterField<
2003 31,
2004 0x1,
2005 1,
2006 0,
2007 gtssr::Cstrt,
2008 gtssr::Cstrt,
2009 Gtssr_SPEC,
2010 crate::common::RW,
2011 > {
2012 crate::common::RegisterField::<
2013 31,
2014 0x1,
2015 1,
2016 0,
2017 gtssr::Cstrt,
2018 gtssr::Cstrt,
2019 Gtssr_SPEC,
2020 crate::common::RW,
2021 >::from_register(self, 0)
2022 }
2023
2024 #[doc = "ELC_GPTH Event Source Counter Start Enable"]
2025 #[inline(always)]
2026 pub fn sselch(
2027 self,
2028 ) -> crate::common::RegisterField<
2029 23,
2030 0x1,
2031 1,
2032 0,
2033 gtssr::Sselch,
2034 gtssr::Sselch,
2035 Gtssr_SPEC,
2036 crate::common::RW,
2037 > {
2038 crate::common::RegisterField::<
2039 23,
2040 0x1,
2041 1,
2042 0,
2043 gtssr::Sselch,
2044 gtssr::Sselch,
2045 Gtssr_SPEC,
2046 crate::common::RW,
2047 >::from_register(self, 0)
2048 }
2049
2050 #[doc = "ELC_GPTG Event Source Counter Start Enable"]
2051 #[inline(always)]
2052 pub fn sselcg(
2053 self,
2054 ) -> crate::common::RegisterField<
2055 22,
2056 0x1,
2057 1,
2058 0,
2059 gtssr::Sselcg,
2060 gtssr::Sselcg,
2061 Gtssr_SPEC,
2062 crate::common::RW,
2063 > {
2064 crate::common::RegisterField::<
2065 22,
2066 0x1,
2067 1,
2068 0,
2069 gtssr::Sselcg,
2070 gtssr::Sselcg,
2071 Gtssr_SPEC,
2072 crate::common::RW,
2073 >::from_register(self, 0)
2074 }
2075
2076 #[doc = "ELC_GPTF Event Source Counter Start Enable"]
2077 #[inline(always)]
2078 pub fn sselcf(
2079 self,
2080 ) -> crate::common::RegisterField<
2081 21,
2082 0x1,
2083 1,
2084 0,
2085 gtssr::Sselcf,
2086 gtssr::Sselcf,
2087 Gtssr_SPEC,
2088 crate::common::RW,
2089 > {
2090 crate::common::RegisterField::<
2091 21,
2092 0x1,
2093 1,
2094 0,
2095 gtssr::Sselcf,
2096 gtssr::Sselcf,
2097 Gtssr_SPEC,
2098 crate::common::RW,
2099 >::from_register(self, 0)
2100 }
2101
2102 #[doc = "ELC_GPTE Event Source Counter Start Enable"]
2103 #[inline(always)]
2104 pub fn sselce(
2105 self,
2106 ) -> crate::common::RegisterField<
2107 20,
2108 0x1,
2109 1,
2110 0,
2111 gtssr::Sselce,
2112 gtssr::Sselce,
2113 Gtssr_SPEC,
2114 crate::common::RW,
2115 > {
2116 crate::common::RegisterField::<
2117 20,
2118 0x1,
2119 1,
2120 0,
2121 gtssr::Sselce,
2122 gtssr::Sselce,
2123 Gtssr_SPEC,
2124 crate::common::RW,
2125 >::from_register(self, 0)
2126 }
2127
2128 #[doc = "ELC_GPTD Event Source Counter Start Enable"]
2129 #[inline(always)]
2130 pub fn sselcd(
2131 self,
2132 ) -> crate::common::RegisterField<
2133 19,
2134 0x1,
2135 1,
2136 0,
2137 gtssr::Sselcd,
2138 gtssr::Sselcd,
2139 Gtssr_SPEC,
2140 crate::common::RW,
2141 > {
2142 crate::common::RegisterField::<
2143 19,
2144 0x1,
2145 1,
2146 0,
2147 gtssr::Sselcd,
2148 gtssr::Sselcd,
2149 Gtssr_SPEC,
2150 crate::common::RW,
2151 >::from_register(self, 0)
2152 }
2153
2154 #[doc = "ELC_GPTC Event Source Counter Start Enable"]
2155 #[inline(always)]
2156 pub fn sselcc(
2157 self,
2158 ) -> crate::common::RegisterField<
2159 18,
2160 0x1,
2161 1,
2162 0,
2163 gtssr::Sselcc,
2164 gtssr::Sselcc,
2165 Gtssr_SPEC,
2166 crate::common::RW,
2167 > {
2168 crate::common::RegisterField::<
2169 18,
2170 0x1,
2171 1,
2172 0,
2173 gtssr::Sselcc,
2174 gtssr::Sselcc,
2175 Gtssr_SPEC,
2176 crate::common::RW,
2177 >::from_register(self, 0)
2178 }
2179
2180 #[doc = "ELC_GPTB Event Source Counter Start Enable"]
2181 #[inline(always)]
2182 pub fn sselcb(
2183 self,
2184 ) -> crate::common::RegisterField<
2185 17,
2186 0x1,
2187 1,
2188 0,
2189 gtssr::Sselcb,
2190 gtssr::Sselcb,
2191 Gtssr_SPEC,
2192 crate::common::RW,
2193 > {
2194 crate::common::RegisterField::<
2195 17,
2196 0x1,
2197 1,
2198 0,
2199 gtssr::Sselcb,
2200 gtssr::Sselcb,
2201 Gtssr_SPEC,
2202 crate::common::RW,
2203 >::from_register(self, 0)
2204 }
2205
2206 #[doc = "ELC_GPTA Event Source Counter Start Enable"]
2207 #[inline(always)]
2208 pub fn sselca(
2209 self,
2210 ) -> crate::common::RegisterField<
2211 16,
2212 0x1,
2213 1,
2214 0,
2215 gtssr::Sselca,
2216 gtssr::Sselca,
2217 Gtssr_SPEC,
2218 crate::common::RW,
2219 > {
2220 crate::common::RegisterField::<
2221 16,
2222 0x1,
2223 1,
2224 0,
2225 gtssr::Sselca,
2226 gtssr::Sselca,
2227 Gtssr_SPEC,
2228 crate::common::RW,
2229 >::from_register(self, 0)
2230 }
2231
2232 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable"]
2233 #[inline(always)]
2234 pub fn sscbfah(
2235 self,
2236 ) -> crate::common::RegisterField<
2237 15,
2238 0x1,
2239 1,
2240 0,
2241 gtssr::Sscbfah,
2242 gtssr::Sscbfah,
2243 Gtssr_SPEC,
2244 crate::common::RW,
2245 > {
2246 crate::common::RegisterField::<
2247 15,
2248 0x1,
2249 1,
2250 0,
2251 gtssr::Sscbfah,
2252 gtssr::Sscbfah,
2253 Gtssr_SPEC,
2254 crate::common::RW,
2255 >::from_register(self, 0)
2256 }
2257
2258 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable"]
2259 #[inline(always)]
2260 pub fn sscbfal(
2261 self,
2262 ) -> crate::common::RegisterField<
2263 14,
2264 0x1,
2265 1,
2266 0,
2267 gtssr::Sscbfal,
2268 gtssr::Sscbfal,
2269 Gtssr_SPEC,
2270 crate::common::RW,
2271 > {
2272 crate::common::RegisterField::<
2273 14,
2274 0x1,
2275 1,
2276 0,
2277 gtssr::Sscbfal,
2278 gtssr::Sscbfal,
2279 Gtssr_SPEC,
2280 crate::common::RW,
2281 >::from_register(self, 0)
2282 }
2283
2284 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable"]
2285 #[inline(always)]
2286 pub fn sscbrah(
2287 self,
2288 ) -> crate::common::RegisterField<
2289 13,
2290 0x1,
2291 1,
2292 0,
2293 gtssr::Sscbrah,
2294 gtssr::Sscbrah,
2295 Gtssr_SPEC,
2296 crate::common::RW,
2297 > {
2298 crate::common::RegisterField::<
2299 13,
2300 0x1,
2301 1,
2302 0,
2303 gtssr::Sscbrah,
2304 gtssr::Sscbrah,
2305 Gtssr_SPEC,
2306 crate::common::RW,
2307 >::from_register(self, 0)
2308 }
2309
2310 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable"]
2311 #[inline(always)]
2312 pub fn sscbral(
2313 self,
2314 ) -> crate::common::RegisterField<
2315 12,
2316 0x1,
2317 1,
2318 0,
2319 gtssr::Sscbral,
2320 gtssr::Sscbral,
2321 Gtssr_SPEC,
2322 crate::common::RW,
2323 > {
2324 crate::common::RegisterField::<
2325 12,
2326 0x1,
2327 1,
2328 0,
2329 gtssr::Sscbral,
2330 gtssr::Sscbral,
2331 Gtssr_SPEC,
2332 crate::common::RW,
2333 >::from_register(self, 0)
2334 }
2335
2336 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable"]
2337 #[inline(always)]
2338 pub fn sscafbh(
2339 self,
2340 ) -> crate::common::RegisterField<
2341 11,
2342 0x1,
2343 1,
2344 0,
2345 gtssr::Sscafbh,
2346 gtssr::Sscafbh,
2347 Gtssr_SPEC,
2348 crate::common::RW,
2349 > {
2350 crate::common::RegisterField::<
2351 11,
2352 0x1,
2353 1,
2354 0,
2355 gtssr::Sscafbh,
2356 gtssr::Sscafbh,
2357 Gtssr_SPEC,
2358 crate::common::RW,
2359 >::from_register(self, 0)
2360 }
2361
2362 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable"]
2363 #[inline(always)]
2364 pub fn sscafbl(
2365 self,
2366 ) -> crate::common::RegisterField<
2367 10,
2368 0x1,
2369 1,
2370 0,
2371 gtssr::Sscafbl,
2372 gtssr::Sscafbl,
2373 Gtssr_SPEC,
2374 crate::common::RW,
2375 > {
2376 crate::common::RegisterField::<
2377 10,
2378 0x1,
2379 1,
2380 0,
2381 gtssr::Sscafbl,
2382 gtssr::Sscafbl,
2383 Gtssr_SPEC,
2384 crate::common::RW,
2385 >::from_register(self, 0)
2386 }
2387
2388 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable"]
2389 #[inline(always)]
2390 pub fn sscarbh(
2391 self,
2392 ) -> crate::common::RegisterField<
2393 9,
2394 0x1,
2395 1,
2396 0,
2397 gtssr::Sscarbh,
2398 gtssr::Sscarbh,
2399 Gtssr_SPEC,
2400 crate::common::RW,
2401 > {
2402 crate::common::RegisterField::<
2403 9,
2404 0x1,
2405 1,
2406 0,
2407 gtssr::Sscarbh,
2408 gtssr::Sscarbh,
2409 Gtssr_SPEC,
2410 crate::common::RW,
2411 >::from_register(self, 0)
2412 }
2413
2414 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable"]
2415 #[inline(always)]
2416 pub fn sscarbl(
2417 self,
2418 ) -> crate::common::RegisterField<
2419 8,
2420 0x1,
2421 1,
2422 0,
2423 gtssr::Sscarbl,
2424 gtssr::Sscarbl,
2425 Gtssr_SPEC,
2426 crate::common::RW,
2427 > {
2428 crate::common::RegisterField::<
2429 8,
2430 0x1,
2431 1,
2432 0,
2433 gtssr::Sscarbl,
2434 gtssr::Sscarbl,
2435 Gtssr_SPEC,
2436 crate::common::RW,
2437 >::from_register(self, 0)
2438 }
2439
2440 #[doc = "GTETRGD Pin Falling Input Source Counter Start Enable"]
2441 #[inline(always)]
2442 pub fn ssgtrgdf(
2443 self,
2444 ) -> crate::common::RegisterField<
2445 7,
2446 0x1,
2447 1,
2448 0,
2449 gtssr::Ssgtrgdf,
2450 gtssr::Ssgtrgdf,
2451 Gtssr_SPEC,
2452 crate::common::RW,
2453 > {
2454 crate::common::RegisterField::<
2455 7,
2456 0x1,
2457 1,
2458 0,
2459 gtssr::Ssgtrgdf,
2460 gtssr::Ssgtrgdf,
2461 Gtssr_SPEC,
2462 crate::common::RW,
2463 >::from_register(self, 0)
2464 }
2465
2466 #[doc = "GTETRGD Pin Rising Input Source Counter Start Enable"]
2467 #[inline(always)]
2468 pub fn ssgtrgdr(
2469 self,
2470 ) -> crate::common::RegisterField<
2471 6,
2472 0x1,
2473 1,
2474 0,
2475 gtssr::Ssgtrgdr,
2476 gtssr::Ssgtrgdr,
2477 Gtssr_SPEC,
2478 crate::common::RW,
2479 > {
2480 crate::common::RegisterField::<
2481 6,
2482 0x1,
2483 1,
2484 0,
2485 gtssr::Ssgtrgdr,
2486 gtssr::Ssgtrgdr,
2487 Gtssr_SPEC,
2488 crate::common::RW,
2489 >::from_register(self, 0)
2490 }
2491
2492 #[doc = "GTETRGC Pin Falling Input Source Counter Start Enable"]
2493 #[inline(always)]
2494 pub fn ssgtrgcf(
2495 self,
2496 ) -> crate::common::RegisterField<
2497 5,
2498 0x1,
2499 1,
2500 0,
2501 gtssr::Ssgtrgcf,
2502 gtssr::Ssgtrgcf,
2503 Gtssr_SPEC,
2504 crate::common::RW,
2505 > {
2506 crate::common::RegisterField::<
2507 5,
2508 0x1,
2509 1,
2510 0,
2511 gtssr::Ssgtrgcf,
2512 gtssr::Ssgtrgcf,
2513 Gtssr_SPEC,
2514 crate::common::RW,
2515 >::from_register(self, 0)
2516 }
2517
2518 #[doc = "GTETRGC Pin Rising Input Source Counter Start Enable"]
2519 #[inline(always)]
2520 pub fn ssgtrgcr(
2521 self,
2522 ) -> crate::common::RegisterField<
2523 4,
2524 0x1,
2525 1,
2526 0,
2527 gtssr::Ssgtrgcr,
2528 gtssr::Ssgtrgcr,
2529 Gtssr_SPEC,
2530 crate::common::RW,
2531 > {
2532 crate::common::RegisterField::<
2533 4,
2534 0x1,
2535 1,
2536 0,
2537 gtssr::Ssgtrgcr,
2538 gtssr::Ssgtrgcr,
2539 Gtssr_SPEC,
2540 crate::common::RW,
2541 >::from_register(self, 0)
2542 }
2543
2544 #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
2545 #[inline(always)]
2546 pub fn ssgtrgbf(
2547 self,
2548 ) -> crate::common::RegisterField<
2549 3,
2550 0x1,
2551 1,
2552 0,
2553 gtssr::Ssgtrgbf,
2554 gtssr::Ssgtrgbf,
2555 Gtssr_SPEC,
2556 crate::common::RW,
2557 > {
2558 crate::common::RegisterField::<
2559 3,
2560 0x1,
2561 1,
2562 0,
2563 gtssr::Ssgtrgbf,
2564 gtssr::Ssgtrgbf,
2565 Gtssr_SPEC,
2566 crate::common::RW,
2567 >::from_register(self, 0)
2568 }
2569
2570 #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
2571 #[inline(always)]
2572 pub fn ssgtrgbr(
2573 self,
2574 ) -> crate::common::RegisterField<
2575 2,
2576 0x1,
2577 1,
2578 0,
2579 gtssr::Ssgtrgbr,
2580 gtssr::Ssgtrgbr,
2581 Gtssr_SPEC,
2582 crate::common::RW,
2583 > {
2584 crate::common::RegisterField::<
2585 2,
2586 0x1,
2587 1,
2588 0,
2589 gtssr::Ssgtrgbr,
2590 gtssr::Ssgtrgbr,
2591 Gtssr_SPEC,
2592 crate::common::RW,
2593 >::from_register(self, 0)
2594 }
2595
2596 #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
2597 #[inline(always)]
2598 pub fn ssgtrgaf(
2599 self,
2600 ) -> crate::common::RegisterField<
2601 1,
2602 0x1,
2603 1,
2604 0,
2605 gtssr::Ssgtrgaf,
2606 gtssr::Ssgtrgaf,
2607 Gtssr_SPEC,
2608 crate::common::RW,
2609 > {
2610 crate::common::RegisterField::<
2611 1,
2612 0x1,
2613 1,
2614 0,
2615 gtssr::Ssgtrgaf,
2616 gtssr::Ssgtrgaf,
2617 Gtssr_SPEC,
2618 crate::common::RW,
2619 >::from_register(self, 0)
2620 }
2621
2622 #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
2623 #[inline(always)]
2624 pub fn ssgtrgar(
2625 self,
2626 ) -> crate::common::RegisterField<
2627 0,
2628 0x1,
2629 1,
2630 0,
2631 gtssr::Ssgtrgar,
2632 gtssr::Ssgtrgar,
2633 Gtssr_SPEC,
2634 crate::common::RW,
2635 > {
2636 crate::common::RegisterField::<
2637 0,
2638 0x1,
2639 1,
2640 0,
2641 gtssr::Ssgtrgar,
2642 gtssr::Ssgtrgar,
2643 Gtssr_SPEC,
2644 crate::common::RW,
2645 >::from_register(self, 0)
2646 }
2647}
2648impl ::core::default::Default for Gtssr {
2649 #[inline(always)]
2650 fn default() -> Gtssr {
2651 <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
2652 }
2653}
2654pub mod gtssr {
2655
2656 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2657 pub struct Cstrt_SPEC;
2658 pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2659 impl Cstrt {
2660 #[doc = "Disable counter start by the GTSTR register"]
2661 pub const _0: Self = Self::new(0);
2662
2663 #[doc = "Enable counter start by the GTSTR register"]
2664 pub const _1: Self = Self::new(1);
2665 }
2666 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2667 pub struct Sselch_SPEC;
2668 pub type Sselch = crate::EnumBitfieldStruct<u8, Sselch_SPEC>;
2669 impl Sselch {
2670 #[doc = "Disable counter start on ELC_GPTH input"]
2671 pub const _0: Self = Self::new(0);
2672
2673 #[doc = "Enable counter start on ELC_GPTH input."]
2674 pub const _1: Self = Self::new(1);
2675 }
2676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2677 pub struct Sselcg_SPEC;
2678 pub type Sselcg = crate::EnumBitfieldStruct<u8, Sselcg_SPEC>;
2679 impl Sselcg {
2680 #[doc = "Disable counter start on ELC_GPTG input"]
2681 pub const _0: Self = Self::new(0);
2682
2683 #[doc = "Enable counter start on ELC_GPTG input."]
2684 pub const _1: Self = Self::new(1);
2685 }
2686 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2687 pub struct Sselcf_SPEC;
2688 pub type Sselcf = crate::EnumBitfieldStruct<u8, Sselcf_SPEC>;
2689 impl Sselcf {
2690 #[doc = "Disable counter start on ELC_GPTF input"]
2691 pub const _0: Self = Self::new(0);
2692
2693 #[doc = "Enable counter start on ELC_GPTF input"]
2694 pub const _1: Self = Self::new(1);
2695 }
2696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2697 pub struct Sselce_SPEC;
2698 pub type Sselce = crate::EnumBitfieldStruct<u8, Sselce_SPEC>;
2699 impl Sselce {
2700 #[doc = "Disable counter start on ELC_GPTE input"]
2701 pub const _0: Self = Self::new(0);
2702
2703 #[doc = "Enable counter start on ELC_GPTE input"]
2704 pub const _1: Self = Self::new(1);
2705 }
2706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2707 pub struct Sselcd_SPEC;
2708 pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2709 impl Sselcd {
2710 #[doc = "Disable counter start on ELC_GPTD input"]
2711 pub const _0: Self = Self::new(0);
2712
2713 #[doc = "Enable counter start on ELC_GPTD input."]
2714 pub const _1: Self = Self::new(1);
2715 }
2716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2717 pub struct Sselcc_SPEC;
2718 pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2719 impl Sselcc {
2720 #[doc = "Disable counter start on ELC_GPTC input"]
2721 pub const _0: Self = Self::new(0);
2722
2723 #[doc = "Enable counter start on ELC_GPTC input."]
2724 pub const _1: Self = Self::new(1);
2725 }
2726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2727 pub struct Sselcb_SPEC;
2728 pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2729 impl Sselcb {
2730 #[doc = "Disable counter start on ELC_GPTB input"]
2731 pub const _0: Self = Self::new(0);
2732
2733 #[doc = "Enable counter start on ELC_GPTB input."]
2734 pub const _1: Self = Self::new(1);
2735 }
2736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2737 pub struct Sselca_SPEC;
2738 pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2739 impl Sselca {
2740 #[doc = "Disable counter start on ELC_GPTA input"]
2741 pub const _0: Self = Self::new(0);
2742
2743 #[doc = "Enable counter start on ELC_GPTA input."]
2744 pub const _1: Self = Self::new(1);
2745 }
2746 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2747 pub struct Sscbfah_SPEC;
2748 pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2749 impl Sscbfah {
2750 #[doc = "Disable counter start on the falling edge of GTIOCB input when GTIOCA input is 1"]
2751 pub const _0: Self = Self::new(0);
2752
2753 #[doc = "Enable counter start on the falling edge of GTIOCB input when GTIOCA input is 1."]
2754 pub const _1: Self = Self::new(1);
2755 }
2756 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2757 pub struct Sscbfal_SPEC;
2758 pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2759 impl Sscbfal {
2760 #[doc = "Disable counter start on the falling edge of GTIOCB input when GTIOCA input is 0"]
2761 pub const _0: Self = Self::new(0);
2762
2763 #[doc = "Enable counter start on the falling edge of GTIOCB input when GTIOCA input is 0."]
2764 pub const _1: Self = Self::new(1);
2765 }
2766 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2767 pub struct Sscbrah_SPEC;
2768 pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2769 impl Sscbrah {
2770 #[doc = "Disable counter start on the rising edge of GTIOCB input when GTIOCA input is 1"]
2771 pub const _0: Self = Self::new(0);
2772
2773 #[doc = "Enable counter start on the rising edge of GTIOCB input when GTIOCA input is 1."]
2774 pub const _1: Self = Self::new(1);
2775 }
2776 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2777 pub struct Sscbral_SPEC;
2778 pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2779 impl Sscbral {
2780 #[doc = "Disable counter start on the rising edge of GTIOCB input when GTIOCA input is 0"]
2781 pub const _0: Self = Self::new(0);
2782
2783 #[doc = "Enable counter start on the rising edge of GTIOCB input when GTIOCA input is 0."]
2784 pub const _1: Self = Self::new(1);
2785 }
2786 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2787 pub struct Sscafbh_SPEC;
2788 pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2789 impl Sscafbh {
2790 #[doc = "Disable counter start on the falling edge of GTIOCA input when GTIOCB input is 1"]
2791 pub const _0: Self = Self::new(0);
2792
2793 #[doc = "Enable counter start on the falling edge of GTIOCA input when GTIOCB input is 1."]
2794 pub const _1: Self = Self::new(1);
2795 }
2796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797 pub struct Sscafbl_SPEC;
2798 pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2799 impl Sscafbl {
2800 #[doc = "Disable counter start on the falling edge of GTIOCA input when GTIOCB input is 0"]
2801 pub const _0: Self = Self::new(0);
2802
2803 #[doc = "Enable counter start on the falling edge of GTIOCA input when GTIOCB input is 0."]
2804 pub const _1: Self = Self::new(1);
2805 }
2806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2807 pub struct Sscarbh_SPEC;
2808 pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
2809 impl Sscarbh {
2810 #[doc = "Disable counter start on the rising edge of GTIOCA input when GTIOCB input is 1"]
2811 pub const _0: Self = Self::new(0);
2812
2813 #[doc = "Enable counter start on the rising edge of GTIOCA input when GTIOCB input is 1"]
2814 pub const _1: Self = Self::new(1);
2815 }
2816 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2817 pub struct Sscarbl_SPEC;
2818 pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
2819 impl Sscarbl {
2820 #[doc = "Disable counter start on the rising edge of GTIOCA input when GTIOCB input is 0"]
2821 pub const _0: Self = Self::new(0);
2822
2823 #[doc = "Enable counter start on the rising edge of GTIOCA input when GTIOCB input is 0."]
2824 pub const _1: Self = Self::new(1);
2825 }
2826 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2827 pub struct Ssgtrgdf_SPEC;
2828 pub type Ssgtrgdf = crate::EnumBitfieldStruct<u8, Ssgtrgdf_SPEC>;
2829 impl Ssgtrgdf {
2830 #[doc = "Disable counter start on the falling edge of GTETRGD input"]
2831 pub const _0: Self = Self::new(0);
2832
2833 #[doc = "Enable counter start on the falling edge of GTETRGD input."]
2834 pub const _1: Self = Self::new(1);
2835 }
2836 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2837 pub struct Ssgtrgdr_SPEC;
2838 pub type Ssgtrgdr = crate::EnumBitfieldStruct<u8, Ssgtrgdr_SPEC>;
2839 impl Ssgtrgdr {
2840 #[doc = "Disable counter start on the rising edge of GTETRGD input"]
2841 pub const _0: Self = Self::new(0);
2842
2843 #[doc = "Enable counter start on the rising edge of GTETRGD input"]
2844 pub const _1: Self = Self::new(1);
2845 }
2846 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2847 pub struct Ssgtrgcf_SPEC;
2848 pub type Ssgtrgcf = crate::EnumBitfieldStruct<u8, Ssgtrgcf_SPEC>;
2849 impl Ssgtrgcf {
2850 #[doc = "Disable counter start on the falling edge of GTETRGC input"]
2851 pub const _0: Self = Self::new(0);
2852
2853 #[doc = "Enable counter start on the falling edge of GTETRGC input"]
2854 pub const _1: Self = Self::new(1);
2855 }
2856 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2857 pub struct Ssgtrgcr_SPEC;
2858 pub type Ssgtrgcr = crate::EnumBitfieldStruct<u8, Ssgtrgcr_SPEC>;
2859 impl Ssgtrgcr {
2860 #[doc = "Disable counter start on the rising edge of GTETRGC input"]
2861 pub const _0: Self = Self::new(0);
2862
2863 #[doc = "Enable counter start on the rising edge of GTETRGC input"]
2864 pub const _1: Self = Self::new(1);
2865 }
2866 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2867 pub struct Ssgtrgbf_SPEC;
2868 pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
2869 impl Ssgtrgbf {
2870 #[doc = "Disable counter start on the falling edge of GTETRGB input"]
2871 pub const _0: Self = Self::new(0);
2872
2873 #[doc = "Enable counter start on the falling edge of GTETRGB input"]
2874 pub const _1: Self = Self::new(1);
2875 }
2876 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2877 pub struct Ssgtrgbr_SPEC;
2878 pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
2879 impl Ssgtrgbr {
2880 #[doc = "Disable counter start on the rising edge of GTETRGB input"]
2881 pub const _0: Self = Self::new(0);
2882
2883 #[doc = "Enable counter start on the rising edge of GTETRGB input."]
2884 pub const _1: Self = Self::new(1);
2885 }
2886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2887 pub struct Ssgtrgaf_SPEC;
2888 pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
2889 impl Ssgtrgaf {
2890 #[doc = "Disable counter start on the falling edge of GTETRGA input"]
2891 pub const _0: Self = Self::new(0);
2892
2893 #[doc = "Enable counter start on the falling edge of GTETRGA input"]
2894 pub const _1: Self = Self::new(1);
2895 }
2896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2897 pub struct Ssgtrgar_SPEC;
2898 pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
2899 impl Ssgtrgar {
2900 #[doc = "Disable counter start on the rising edge of GTETRGA input"]
2901 pub const _0: Self = Self::new(0);
2902
2903 #[doc = "Enable counter start on the rising edge of GTETRGA input."]
2904 pub const _1: Self = Self::new(1);
2905 }
2906}
2907#[doc(hidden)]
2908#[derive(Copy, Clone, Eq, PartialEq)]
2909pub struct Gtpsr_SPEC;
2910impl crate::sealed::RegSpec for Gtpsr_SPEC {
2911 type DataType = u32;
2912}
2913
2914#[doc = "General PWM Timer Stop Source Select Register"]
2915pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
2916
2917impl Gtpsr {
2918 #[doc = "Software Source Counter Stop Enable"]
2919 #[inline(always)]
2920 pub fn cstop(
2921 self,
2922 ) -> crate::common::RegisterField<
2923 31,
2924 0x1,
2925 1,
2926 0,
2927 gtpsr::Cstop,
2928 gtpsr::Cstop,
2929 Gtpsr_SPEC,
2930 crate::common::RW,
2931 > {
2932 crate::common::RegisterField::<
2933 31,
2934 0x1,
2935 1,
2936 0,
2937 gtpsr::Cstop,
2938 gtpsr::Cstop,
2939 Gtpsr_SPEC,
2940 crate::common::RW,
2941 >::from_register(self, 0)
2942 }
2943
2944 #[doc = "ELC_GPTH Event Source Counter Stop Enable"]
2945 #[inline(always)]
2946 pub fn pselch(
2947 self,
2948 ) -> crate::common::RegisterField<
2949 23,
2950 0x1,
2951 1,
2952 0,
2953 gtpsr::Pselch,
2954 gtpsr::Pselch,
2955 Gtpsr_SPEC,
2956 crate::common::RW,
2957 > {
2958 crate::common::RegisterField::<
2959 23,
2960 0x1,
2961 1,
2962 0,
2963 gtpsr::Pselch,
2964 gtpsr::Pselch,
2965 Gtpsr_SPEC,
2966 crate::common::RW,
2967 >::from_register(self, 0)
2968 }
2969
2970 #[doc = "ELC_GPTG Event Source Counter Stop Enable"]
2971 #[inline(always)]
2972 pub fn pselcg(
2973 self,
2974 ) -> crate::common::RegisterField<
2975 22,
2976 0x1,
2977 1,
2978 0,
2979 gtpsr::Pselcg,
2980 gtpsr::Pselcg,
2981 Gtpsr_SPEC,
2982 crate::common::RW,
2983 > {
2984 crate::common::RegisterField::<
2985 22,
2986 0x1,
2987 1,
2988 0,
2989 gtpsr::Pselcg,
2990 gtpsr::Pselcg,
2991 Gtpsr_SPEC,
2992 crate::common::RW,
2993 >::from_register(self, 0)
2994 }
2995
2996 #[doc = "ELC_GPTF Event Source Counter Stop Enable"]
2997 #[inline(always)]
2998 pub fn pselcf(
2999 self,
3000 ) -> crate::common::RegisterField<
3001 21,
3002 0x1,
3003 1,
3004 0,
3005 gtpsr::Pselcf,
3006 gtpsr::Pselcf,
3007 Gtpsr_SPEC,
3008 crate::common::RW,
3009 > {
3010 crate::common::RegisterField::<
3011 21,
3012 0x1,
3013 1,
3014 0,
3015 gtpsr::Pselcf,
3016 gtpsr::Pselcf,
3017 Gtpsr_SPEC,
3018 crate::common::RW,
3019 >::from_register(self, 0)
3020 }
3021
3022 #[doc = "ELC_GPTE Event Source Counter Stop Enable"]
3023 #[inline(always)]
3024 pub fn pselce(
3025 self,
3026 ) -> crate::common::RegisterField<
3027 20,
3028 0x1,
3029 1,
3030 0,
3031 gtpsr::Pselce,
3032 gtpsr::Pselce,
3033 Gtpsr_SPEC,
3034 crate::common::RW,
3035 > {
3036 crate::common::RegisterField::<
3037 20,
3038 0x1,
3039 1,
3040 0,
3041 gtpsr::Pselce,
3042 gtpsr::Pselce,
3043 Gtpsr_SPEC,
3044 crate::common::RW,
3045 >::from_register(self, 0)
3046 }
3047
3048 #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
3049 #[inline(always)]
3050 pub fn pselcd(
3051 self,
3052 ) -> crate::common::RegisterField<
3053 19,
3054 0x1,
3055 1,
3056 0,
3057 gtpsr::Pselcd,
3058 gtpsr::Pselcd,
3059 Gtpsr_SPEC,
3060 crate::common::RW,
3061 > {
3062 crate::common::RegisterField::<
3063 19,
3064 0x1,
3065 1,
3066 0,
3067 gtpsr::Pselcd,
3068 gtpsr::Pselcd,
3069 Gtpsr_SPEC,
3070 crate::common::RW,
3071 >::from_register(self, 0)
3072 }
3073
3074 #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
3075 #[inline(always)]
3076 pub fn pselcc(
3077 self,
3078 ) -> crate::common::RegisterField<
3079 18,
3080 0x1,
3081 1,
3082 0,
3083 gtpsr::Pselcc,
3084 gtpsr::Pselcc,
3085 Gtpsr_SPEC,
3086 crate::common::RW,
3087 > {
3088 crate::common::RegisterField::<
3089 18,
3090 0x1,
3091 1,
3092 0,
3093 gtpsr::Pselcc,
3094 gtpsr::Pselcc,
3095 Gtpsr_SPEC,
3096 crate::common::RW,
3097 >::from_register(self, 0)
3098 }
3099
3100 #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
3101 #[inline(always)]
3102 pub fn pselcb(
3103 self,
3104 ) -> crate::common::RegisterField<
3105 17,
3106 0x1,
3107 1,
3108 0,
3109 gtpsr::Pselcb,
3110 gtpsr::Pselcb,
3111 Gtpsr_SPEC,
3112 crate::common::RW,
3113 > {
3114 crate::common::RegisterField::<
3115 17,
3116 0x1,
3117 1,
3118 0,
3119 gtpsr::Pselcb,
3120 gtpsr::Pselcb,
3121 Gtpsr_SPEC,
3122 crate::common::RW,
3123 >::from_register(self, 0)
3124 }
3125
3126 #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
3127 #[inline(always)]
3128 pub fn pselca(
3129 self,
3130 ) -> crate::common::RegisterField<
3131 16,
3132 0x1,
3133 1,
3134 0,
3135 gtpsr::Pselca,
3136 gtpsr::Pselca,
3137 Gtpsr_SPEC,
3138 crate::common::RW,
3139 > {
3140 crate::common::RegisterField::<
3141 16,
3142 0x1,
3143 1,
3144 0,
3145 gtpsr::Pselca,
3146 gtpsr::Pselca,
3147 Gtpsr_SPEC,
3148 crate::common::RW,
3149 >::from_register(self, 0)
3150 }
3151
3152 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable"]
3153 #[inline(always)]
3154 pub fn pscbfah(
3155 self,
3156 ) -> crate::common::RegisterField<
3157 15,
3158 0x1,
3159 1,
3160 0,
3161 gtpsr::Pscbfah,
3162 gtpsr::Pscbfah,
3163 Gtpsr_SPEC,
3164 crate::common::RW,
3165 > {
3166 crate::common::RegisterField::<
3167 15,
3168 0x1,
3169 1,
3170 0,
3171 gtpsr::Pscbfah,
3172 gtpsr::Pscbfah,
3173 Gtpsr_SPEC,
3174 crate::common::RW,
3175 >::from_register(self, 0)
3176 }
3177
3178 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable"]
3179 #[inline(always)]
3180 pub fn pscbfal(
3181 self,
3182 ) -> crate::common::RegisterField<
3183 14,
3184 0x1,
3185 1,
3186 0,
3187 gtpsr::Pscbfal,
3188 gtpsr::Pscbfal,
3189 Gtpsr_SPEC,
3190 crate::common::RW,
3191 > {
3192 crate::common::RegisterField::<
3193 14,
3194 0x1,
3195 1,
3196 0,
3197 gtpsr::Pscbfal,
3198 gtpsr::Pscbfal,
3199 Gtpsr_SPEC,
3200 crate::common::RW,
3201 >::from_register(self, 0)
3202 }
3203
3204 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable"]
3205 #[inline(always)]
3206 pub fn pscbrah(
3207 self,
3208 ) -> crate::common::RegisterField<
3209 13,
3210 0x1,
3211 1,
3212 0,
3213 gtpsr::Pscbrah,
3214 gtpsr::Pscbrah,
3215 Gtpsr_SPEC,
3216 crate::common::RW,
3217 > {
3218 crate::common::RegisterField::<
3219 13,
3220 0x1,
3221 1,
3222 0,
3223 gtpsr::Pscbrah,
3224 gtpsr::Pscbrah,
3225 Gtpsr_SPEC,
3226 crate::common::RW,
3227 >::from_register(self, 0)
3228 }
3229
3230 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable"]
3231 #[inline(always)]
3232 pub fn pscbral(
3233 self,
3234 ) -> crate::common::RegisterField<
3235 12,
3236 0x1,
3237 1,
3238 0,
3239 gtpsr::Pscbral,
3240 gtpsr::Pscbral,
3241 Gtpsr_SPEC,
3242 crate::common::RW,
3243 > {
3244 crate::common::RegisterField::<
3245 12,
3246 0x1,
3247 1,
3248 0,
3249 gtpsr::Pscbral,
3250 gtpsr::Pscbral,
3251 Gtpsr_SPEC,
3252 crate::common::RW,
3253 >::from_register(self, 0)
3254 }
3255
3256 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable"]
3257 #[inline(always)]
3258 pub fn pscafbh(
3259 self,
3260 ) -> crate::common::RegisterField<
3261 11,
3262 0x1,
3263 1,
3264 0,
3265 gtpsr::Pscafbh,
3266 gtpsr::Pscafbh,
3267 Gtpsr_SPEC,
3268 crate::common::RW,
3269 > {
3270 crate::common::RegisterField::<
3271 11,
3272 0x1,
3273 1,
3274 0,
3275 gtpsr::Pscafbh,
3276 gtpsr::Pscafbh,
3277 Gtpsr_SPEC,
3278 crate::common::RW,
3279 >::from_register(self, 0)
3280 }
3281
3282 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable"]
3283 #[inline(always)]
3284 pub fn pscafbl(
3285 self,
3286 ) -> crate::common::RegisterField<
3287 10,
3288 0x1,
3289 1,
3290 0,
3291 gtpsr::Pscafbl,
3292 gtpsr::Pscafbl,
3293 Gtpsr_SPEC,
3294 crate::common::RW,
3295 > {
3296 crate::common::RegisterField::<
3297 10,
3298 0x1,
3299 1,
3300 0,
3301 gtpsr::Pscafbl,
3302 gtpsr::Pscafbl,
3303 Gtpsr_SPEC,
3304 crate::common::RW,
3305 >::from_register(self, 0)
3306 }
3307
3308 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable"]
3309 #[inline(always)]
3310 pub fn pscarbh(
3311 self,
3312 ) -> crate::common::RegisterField<
3313 9,
3314 0x1,
3315 1,
3316 0,
3317 gtpsr::Pscarbh,
3318 gtpsr::Pscarbh,
3319 Gtpsr_SPEC,
3320 crate::common::RW,
3321 > {
3322 crate::common::RegisterField::<
3323 9,
3324 0x1,
3325 1,
3326 0,
3327 gtpsr::Pscarbh,
3328 gtpsr::Pscarbh,
3329 Gtpsr_SPEC,
3330 crate::common::RW,
3331 >::from_register(self, 0)
3332 }
3333
3334 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable"]
3335 #[inline(always)]
3336 pub fn pscarbl(
3337 self,
3338 ) -> crate::common::RegisterField<
3339 8,
3340 0x1,
3341 1,
3342 0,
3343 gtpsr::Pscarbl,
3344 gtpsr::Pscarbl,
3345 Gtpsr_SPEC,
3346 crate::common::RW,
3347 > {
3348 crate::common::RegisterField::<
3349 8,
3350 0x1,
3351 1,
3352 0,
3353 gtpsr::Pscarbl,
3354 gtpsr::Pscarbl,
3355 Gtpsr_SPEC,
3356 crate::common::RW,
3357 >::from_register(self, 0)
3358 }
3359
3360 #[doc = "GTETRGD Pin Falling Input Source Counter Stop Enable"]
3361 #[inline(always)]
3362 pub fn psgtrgdf(
3363 self,
3364 ) -> crate::common::RegisterField<
3365 7,
3366 0x1,
3367 1,
3368 0,
3369 gtpsr::Psgtrgdf,
3370 gtpsr::Psgtrgdf,
3371 Gtpsr_SPEC,
3372 crate::common::RW,
3373 > {
3374 crate::common::RegisterField::<
3375 7,
3376 0x1,
3377 1,
3378 0,
3379 gtpsr::Psgtrgdf,
3380 gtpsr::Psgtrgdf,
3381 Gtpsr_SPEC,
3382 crate::common::RW,
3383 >::from_register(self, 0)
3384 }
3385
3386 #[doc = "GTETRGD Pin Rising Input Source Counter Stop Enable"]
3387 #[inline(always)]
3388 pub fn psgtrgdr(
3389 self,
3390 ) -> crate::common::RegisterField<
3391 6,
3392 0x1,
3393 1,
3394 0,
3395 gtpsr::Psgtrgdr,
3396 gtpsr::Psgtrgdr,
3397 Gtpsr_SPEC,
3398 crate::common::RW,
3399 > {
3400 crate::common::RegisterField::<
3401 6,
3402 0x1,
3403 1,
3404 0,
3405 gtpsr::Psgtrgdr,
3406 gtpsr::Psgtrgdr,
3407 Gtpsr_SPEC,
3408 crate::common::RW,
3409 >::from_register(self, 0)
3410 }
3411
3412 #[doc = "GTETRGC Pin Falling Input Source Counter Stop Enable"]
3413 #[inline(always)]
3414 pub fn psgtrgcf(
3415 self,
3416 ) -> crate::common::RegisterField<
3417 5,
3418 0x1,
3419 1,
3420 0,
3421 gtpsr::Psgtrgcf,
3422 gtpsr::Psgtrgcf,
3423 Gtpsr_SPEC,
3424 crate::common::RW,
3425 > {
3426 crate::common::RegisterField::<
3427 5,
3428 0x1,
3429 1,
3430 0,
3431 gtpsr::Psgtrgcf,
3432 gtpsr::Psgtrgcf,
3433 Gtpsr_SPEC,
3434 crate::common::RW,
3435 >::from_register(self, 0)
3436 }
3437
3438 #[doc = "GTETRGC Pin Rising Input Source Counter Stop Enable"]
3439 #[inline(always)]
3440 pub fn psgtrgcr(
3441 self,
3442 ) -> crate::common::RegisterField<
3443 4,
3444 0x1,
3445 1,
3446 0,
3447 gtpsr::Psgtrgcr,
3448 gtpsr::Psgtrgcr,
3449 Gtpsr_SPEC,
3450 crate::common::RW,
3451 > {
3452 crate::common::RegisterField::<
3453 4,
3454 0x1,
3455 1,
3456 0,
3457 gtpsr::Psgtrgcr,
3458 gtpsr::Psgtrgcr,
3459 Gtpsr_SPEC,
3460 crate::common::RW,
3461 >::from_register(self, 0)
3462 }
3463
3464 #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
3465 #[inline(always)]
3466 pub fn psgtrgbf(
3467 self,
3468 ) -> crate::common::RegisterField<
3469 3,
3470 0x1,
3471 1,
3472 0,
3473 gtpsr::Psgtrgbf,
3474 gtpsr::Psgtrgbf,
3475 Gtpsr_SPEC,
3476 crate::common::RW,
3477 > {
3478 crate::common::RegisterField::<
3479 3,
3480 0x1,
3481 1,
3482 0,
3483 gtpsr::Psgtrgbf,
3484 gtpsr::Psgtrgbf,
3485 Gtpsr_SPEC,
3486 crate::common::RW,
3487 >::from_register(self, 0)
3488 }
3489
3490 #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
3491 #[inline(always)]
3492 pub fn psgtrgbr(
3493 self,
3494 ) -> crate::common::RegisterField<
3495 2,
3496 0x1,
3497 1,
3498 0,
3499 gtpsr::Psgtrgbr,
3500 gtpsr::Psgtrgbr,
3501 Gtpsr_SPEC,
3502 crate::common::RW,
3503 > {
3504 crate::common::RegisterField::<
3505 2,
3506 0x1,
3507 1,
3508 0,
3509 gtpsr::Psgtrgbr,
3510 gtpsr::Psgtrgbr,
3511 Gtpsr_SPEC,
3512 crate::common::RW,
3513 >::from_register(self, 0)
3514 }
3515
3516 #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
3517 #[inline(always)]
3518 pub fn psgtrgaf(
3519 self,
3520 ) -> crate::common::RegisterField<
3521 1,
3522 0x1,
3523 1,
3524 0,
3525 gtpsr::Psgtrgaf,
3526 gtpsr::Psgtrgaf,
3527 Gtpsr_SPEC,
3528 crate::common::RW,
3529 > {
3530 crate::common::RegisterField::<
3531 1,
3532 0x1,
3533 1,
3534 0,
3535 gtpsr::Psgtrgaf,
3536 gtpsr::Psgtrgaf,
3537 Gtpsr_SPEC,
3538 crate::common::RW,
3539 >::from_register(self, 0)
3540 }
3541
3542 #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
3543 #[inline(always)]
3544 pub fn psgtrgar(
3545 self,
3546 ) -> crate::common::RegisterField<
3547 0,
3548 0x1,
3549 1,
3550 0,
3551 gtpsr::Psgtrgar,
3552 gtpsr::Psgtrgar,
3553 Gtpsr_SPEC,
3554 crate::common::RW,
3555 > {
3556 crate::common::RegisterField::<
3557 0,
3558 0x1,
3559 1,
3560 0,
3561 gtpsr::Psgtrgar,
3562 gtpsr::Psgtrgar,
3563 Gtpsr_SPEC,
3564 crate::common::RW,
3565 >::from_register(self, 0)
3566 }
3567}
3568impl ::core::default::Default for Gtpsr {
3569 #[inline(always)]
3570 fn default() -> Gtpsr {
3571 <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
3572 }
3573}
3574pub mod gtpsr {
3575
3576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3577 pub struct Cstop_SPEC;
3578 pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
3579 impl Cstop {
3580 #[doc = "Disable counter stop by the GTSTP register"]
3581 pub const _0: Self = Self::new(0);
3582
3583 #[doc = "Enable counter stop by the GTSTP register"]
3584 pub const _1: Self = Self::new(1);
3585 }
3586 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3587 pub struct Pselch_SPEC;
3588 pub type Pselch = crate::EnumBitfieldStruct<u8, Pselch_SPEC>;
3589 impl Pselch {
3590 #[doc = "Disable counter stop on ELC_GPTH input"]
3591 pub const _0: Self = Self::new(0);
3592
3593 #[doc = "Enable counter stop on ELCH event inpu"]
3594 pub const _1: Self = Self::new(1);
3595 }
3596 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3597 pub struct Pselcg_SPEC;
3598 pub type Pselcg = crate::EnumBitfieldStruct<u8, Pselcg_SPEC>;
3599 impl Pselcg {
3600 #[doc = "Disable counter stop on ELC_GPTG input"]
3601 pub const _0: Self = Self::new(0);
3602
3603 #[doc = "Enable counter stop on ELC_GPTG input"]
3604 pub const _1: Self = Self::new(1);
3605 }
3606 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3607 pub struct Pselcf_SPEC;
3608 pub type Pselcf = crate::EnumBitfieldStruct<u8, Pselcf_SPEC>;
3609 impl Pselcf {
3610 #[doc = "Disable counter stop on ELC_GPTF input"]
3611 pub const _0: Self = Self::new(0);
3612
3613 #[doc = "Enable counter stop on ELC_GPTF input"]
3614 pub const _1: Self = Self::new(1);
3615 }
3616 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3617 pub struct Pselce_SPEC;
3618 pub type Pselce = crate::EnumBitfieldStruct<u8, Pselce_SPEC>;
3619 impl Pselce {
3620 #[doc = "Disable counter stop on ELC_GPTE input"]
3621 pub const _0: Self = Self::new(0);
3622
3623 #[doc = "Enable counter stop on ELC_GPTE input"]
3624 pub const _1: Self = Self::new(1);
3625 }
3626 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3627 pub struct Pselcd_SPEC;
3628 pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
3629 impl Pselcd {
3630 #[doc = "Disable counter stop on ELC_GPTD input"]
3631 pub const _0: Self = Self::new(0);
3632
3633 #[doc = "Enable counter stop on ELC_GPTD input"]
3634 pub const _1: Self = Self::new(1);
3635 }
3636 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3637 pub struct Pselcc_SPEC;
3638 pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
3639 impl Pselcc {
3640 #[doc = "Disable counter stop on ELC_GPTC input"]
3641 pub const _0: Self = Self::new(0);
3642
3643 #[doc = "Enable counter stop on ELC_GPTC input"]
3644 pub const _1: Self = Self::new(1);
3645 }
3646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3647 pub struct Pselcb_SPEC;
3648 pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
3649 impl Pselcb {
3650 #[doc = "Disable counter stop on ELC_GPTB input"]
3651 pub const _0: Self = Self::new(0);
3652
3653 #[doc = "Enable counter stop on ELC_GPTB input"]
3654 pub const _1: Self = Self::new(1);
3655 }
3656 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3657 pub struct Pselca_SPEC;
3658 pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
3659 impl Pselca {
3660 #[doc = "Disable counter stop on ELC_GPTA input"]
3661 pub const _0: Self = Self::new(0);
3662
3663 #[doc = "Enable counter stop on ELC_GPTA input"]
3664 pub const _1: Self = Self::new(1);
3665 }
3666 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3667 pub struct Pscbfah_SPEC;
3668 pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
3669 impl Pscbfah {
3670 #[doc = "Disable counter stop on the falling edge of GTIOCB input when GTIOCA input is 1"]
3671 pub const _0: Self = Self::new(0);
3672
3673 #[doc = "Enable counter stop on the falling edge of GTIOCB input when GTIOCA input is 1"]
3674 pub const _1: Self = Self::new(1);
3675 }
3676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3677 pub struct Pscbfal_SPEC;
3678 pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
3679 impl Pscbfal {
3680 #[doc = "Disable counter stop on the falling edge of GTIOCB input when GTIOCA input is 0"]
3681 pub const _0: Self = Self::new(0);
3682
3683 #[doc = "Enable counter stop on the falling edge of GTIOCB input when GTIOCA input is 0"]
3684 pub const _1: Self = Self::new(1);
3685 }
3686 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3687 pub struct Pscbrah_SPEC;
3688 pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
3689 impl Pscbrah {
3690 #[doc = "Disable counter stop on the rising edge of GTIOCB input when GTIOCA input is 1"]
3691 pub const _0: Self = Self::new(0);
3692
3693 #[doc = "Enable counter stop on the rising edge of GTIOCB input when GTIOCA input is 1"]
3694 pub const _1: Self = Self::new(1);
3695 }
3696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3697 pub struct Pscbral_SPEC;
3698 pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
3699 impl Pscbral {
3700 #[doc = "Disable counter stop on the rising edge of GTIOCB input when GTIOCA input is 0"]
3701 pub const _0: Self = Self::new(0);
3702
3703 #[doc = "Enable counter stop on the rising edge of GTIOCB input when GTIOCA input is 0"]
3704 pub const _1: Self = Self::new(1);
3705 }
3706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3707 pub struct Pscafbh_SPEC;
3708 pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
3709 impl Pscafbh {
3710 #[doc = "Disable counter stop on the falling edge of GTIOCA input when GTIOCB input is 1"]
3711 pub const _0: Self = Self::new(0);
3712
3713 #[doc = "Enable counter stop on the falling edge of GTIOCA input when GTIOCB input is 1"]
3714 pub const _1: Self = Self::new(1);
3715 }
3716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3717 pub struct Pscafbl_SPEC;
3718 pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
3719 impl Pscafbl {
3720 #[doc = "Disable counter stop on the falling edge of GTIOCA input when GTIOCB input is 0"]
3721 pub const _0: Self = Self::new(0);
3722
3723 #[doc = "Enable counter stop on the falling edge of GTIOCA input when GTIOCB input is 0"]
3724 pub const _1: Self = Self::new(1);
3725 }
3726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3727 pub struct Pscarbh_SPEC;
3728 pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
3729 impl Pscarbh {
3730 #[doc = "Disable counter stop on the rising edge of GTIOCA input when GTIOCB input is 1"]
3731 pub const _0: Self = Self::new(0);
3732
3733 #[doc = "Enable counter stop on the rising edge of GTIOCA input when GTIOCB input is 1"]
3734 pub const _1: Self = Self::new(1);
3735 }
3736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3737 pub struct Pscarbl_SPEC;
3738 pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
3739 impl Pscarbl {
3740 #[doc = "Disable counter stop on the rising edge of GTIOCA input when GTIOCB input is 0"]
3741 pub const _0: Self = Self::new(0);
3742
3743 #[doc = "Enable counter stop on the rising edge of GTIOCA input when GTIOCB input is 0"]
3744 pub const _1: Self = Self::new(1);
3745 }
3746 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3747 pub struct Psgtrgdf_SPEC;
3748 pub type Psgtrgdf = crate::EnumBitfieldStruct<u8, Psgtrgdf_SPEC>;
3749 impl Psgtrgdf {
3750 #[doc = "Disable counter stop on the falling edge of GTETRGD input"]
3751 pub const _0: Self = Self::new(0);
3752
3753 #[doc = "Enable counter stop on the falling edge of GTETRGD input"]
3754 pub const _1: Self = Self::new(1);
3755 }
3756 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3757 pub struct Psgtrgdr_SPEC;
3758 pub type Psgtrgdr = crate::EnumBitfieldStruct<u8, Psgtrgdr_SPEC>;
3759 impl Psgtrgdr {
3760 #[doc = "Disable counter stop on the rising edge of GTETRGD input"]
3761 pub const _0: Self = Self::new(0);
3762
3763 #[doc = "Enable counter stop on the rising edge of GTETRGD input"]
3764 pub const _1: Self = Self::new(1);
3765 }
3766 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3767 pub struct Psgtrgcf_SPEC;
3768 pub type Psgtrgcf = crate::EnumBitfieldStruct<u8, Psgtrgcf_SPEC>;
3769 impl Psgtrgcf {
3770 #[doc = "Disable counter stop on the falling edge of GTETRGC input"]
3771 pub const _0: Self = Self::new(0);
3772
3773 #[doc = "Enable counter stop on the falling edge of GTETRGC input"]
3774 pub const _1: Self = Self::new(1);
3775 }
3776 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3777 pub struct Psgtrgcr_SPEC;
3778 pub type Psgtrgcr = crate::EnumBitfieldStruct<u8, Psgtrgcr_SPEC>;
3779 impl Psgtrgcr {
3780 #[doc = "Disable counter stop on the rising edge of GTETRGC input"]
3781 pub const _0: Self = Self::new(0);
3782
3783 #[doc = "Enable counter stop on the rising edge of GTETRGC input"]
3784 pub const _1: Self = Self::new(1);
3785 }
3786 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3787 pub struct Psgtrgbf_SPEC;
3788 pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
3789 impl Psgtrgbf {
3790 #[doc = "Disable counter stop on the falling edge of GTETRGB input"]
3791 pub const _0: Self = Self::new(0);
3792
3793 #[doc = "Enable counter stop on the falling edge of GTETRGB input"]
3794 pub const _1: Self = Self::new(1);
3795 }
3796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3797 pub struct Psgtrgbr_SPEC;
3798 pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
3799 impl Psgtrgbr {
3800 #[doc = "Disable counter stop on the rising edge of GTETRGB input"]
3801 pub const _0: Self = Self::new(0);
3802
3803 #[doc = "Enable counter stop on the rising edge of GTETRGB input"]
3804 pub const _1: Self = Self::new(1);
3805 }
3806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3807 pub struct Psgtrgaf_SPEC;
3808 pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
3809 impl Psgtrgaf {
3810 #[doc = "Disable counter stop on the falling edge of GTETRGA input"]
3811 pub const _0: Self = Self::new(0);
3812
3813 #[doc = "Enable counter stop on the falling edge of GTETRGA input"]
3814 pub const _1: Self = Self::new(1);
3815 }
3816 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3817 pub struct Psgtrgar_SPEC;
3818 pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
3819 impl Psgtrgar {
3820 #[doc = "Disable counter stop on the rising edge of GTETRGA input"]
3821 pub const _0: Self = Self::new(0);
3822
3823 #[doc = "Enable counter stop on the rising edge of GTETRGA input"]
3824 pub const _1: Self = Self::new(1);
3825 }
3826}
3827#[doc(hidden)]
3828#[derive(Copy, Clone, Eq, PartialEq)]
3829pub struct Gtcsr_SPEC;
3830impl crate::sealed::RegSpec for Gtcsr_SPEC {
3831 type DataType = u32;
3832}
3833
3834#[doc = "General PWM Timer Clear Source Select Register"]
3835pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
3836
3837impl Gtcsr {
3838 #[doc = "Software Source Counter Clear Enable"]
3839 #[inline(always)]
3840 pub fn cclr(
3841 self,
3842 ) -> crate::common::RegisterField<
3843 31,
3844 0x1,
3845 1,
3846 0,
3847 gtcsr::Cclr,
3848 gtcsr::Cclr,
3849 Gtcsr_SPEC,
3850 crate::common::RW,
3851 > {
3852 crate::common::RegisterField::<
3853 31,
3854 0x1,
3855 1,
3856 0,
3857 gtcsr::Cclr,
3858 gtcsr::Cclr,
3859 Gtcsr_SPEC,
3860 crate::common::RW,
3861 >::from_register(self, 0)
3862 }
3863
3864 #[doc = "ELC_GPTH Event Source Counter Clear Enable"]
3865 #[inline(always)]
3866 pub fn cselch(
3867 self,
3868 ) -> crate::common::RegisterField<
3869 23,
3870 0x1,
3871 1,
3872 0,
3873 gtcsr::Cselch,
3874 gtcsr::Cselch,
3875 Gtcsr_SPEC,
3876 crate::common::RW,
3877 > {
3878 crate::common::RegisterField::<
3879 23,
3880 0x1,
3881 1,
3882 0,
3883 gtcsr::Cselch,
3884 gtcsr::Cselch,
3885 Gtcsr_SPEC,
3886 crate::common::RW,
3887 >::from_register(self, 0)
3888 }
3889
3890 #[doc = "ELC_GPTG Event Source Counter Clear Enable"]
3891 #[inline(always)]
3892 pub fn cselcg(
3893 self,
3894 ) -> crate::common::RegisterField<
3895 22,
3896 0x1,
3897 1,
3898 0,
3899 gtcsr::Cselcg,
3900 gtcsr::Cselcg,
3901 Gtcsr_SPEC,
3902 crate::common::RW,
3903 > {
3904 crate::common::RegisterField::<
3905 22,
3906 0x1,
3907 1,
3908 0,
3909 gtcsr::Cselcg,
3910 gtcsr::Cselcg,
3911 Gtcsr_SPEC,
3912 crate::common::RW,
3913 >::from_register(self, 0)
3914 }
3915
3916 #[doc = "ELC_GPTF Event Source Counter Clear Enable"]
3917 #[inline(always)]
3918 pub fn cselcf(
3919 self,
3920 ) -> crate::common::RegisterField<
3921 21,
3922 0x1,
3923 1,
3924 0,
3925 gtcsr::Cselcf,
3926 gtcsr::Cselcf,
3927 Gtcsr_SPEC,
3928 crate::common::RW,
3929 > {
3930 crate::common::RegisterField::<
3931 21,
3932 0x1,
3933 1,
3934 0,
3935 gtcsr::Cselcf,
3936 gtcsr::Cselcf,
3937 Gtcsr_SPEC,
3938 crate::common::RW,
3939 >::from_register(self, 0)
3940 }
3941
3942 #[doc = "ELC_GPTE Event Source Counter Clear Enable"]
3943 #[inline(always)]
3944 pub fn cselce(
3945 self,
3946 ) -> crate::common::RegisterField<
3947 20,
3948 0x1,
3949 1,
3950 0,
3951 gtcsr::Cselce,
3952 gtcsr::Cselce,
3953 Gtcsr_SPEC,
3954 crate::common::RW,
3955 > {
3956 crate::common::RegisterField::<
3957 20,
3958 0x1,
3959 1,
3960 0,
3961 gtcsr::Cselce,
3962 gtcsr::Cselce,
3963 Gtcsr_SPEC,
3964 crate::common::RW,
3965 >::from_register(self, 0)
3966 }
3967
3968 #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
3969 #[inline(always)]
3970 pub fn cselcd(
3971 self,
3972 ) -> crate::common::RegisterField<
3973 19,
3974 0x1,
3975 1,
3976 0,
3977 gtcsr::Cselcd,
3978 gtcsr::Cselcd,
3979 Gtcsr_SPEC,
3980 crate::common::RW,
3981 > {
3982 crate::common::RegisterField::<
3983 19,
3984 0x1,
3985 1,
3986 0,
3987 gtcsr::Cselcd,
3988 gtcsr::Cselcd,
3989 Gtcsr_SPEC,
3990 crate::common::RW,
3991 >::from_register(self, 0)
3992 }
3993
3994 #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
3995 #[inline(always)]
3996 pub fn cselcc(
3997 self,
3998 ) -> crate::common::RegisterField<
3999 18,
4000 0x1,
4001 1,
4002 0,
4003 gtcsr::Cselcc,
4004 gtcsr::Cselcc,
4005 Gtcsr_SPEC,
4006 crate::common::RW,
4007 > {
4008 crate::common::RegisterField::<
4009 18,
4010 0x1,
4011 1,
4012 0,
4013 gtcsr::Cselcc,
4014 gtcsr::Cselcc,
4015 Gtcsr_SPEC,
4016 crate::common::RW,
4017 >::from_register(self, 0)
4018 }
4019
4020 #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
4021 #[inline(always)]
4022 pub fn cselcb(
4023 self,
4024 ) -> crate::common::RegisterField<
4025 17,
4026 0x1,
4027 1,
4028 0,
4029 gtcsr::Cselcb,
4030 gtcsr::Cselcb,
4031 Gtcsr_SPEC,
4032 crate::common::RW,
4033 > {
4034 crate::common::RegisterField::<
4035 17,
4036 0x1,
4037 1,
4038 0,
4039 gtcsr::Cselcb,
4040 gtcsr::Cselcb,
4041 Gtcsr_SPEC,
4042 crate::common::RW,
4043 >::from_register(self, 0)
4044 }
4045
4046 #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
4047 #[inline(always)]
4048 pub fn cselca(
4049 self,
4050 ) -> crate::common::RegisterField<
4051 16,
4052 0x1,
4053 1,
4054 0,
4055 gtcsr::Cselca,
4056 gtcsr::Cselca,
4057 Gtcsr_SPEC,
4058 crate::common::RW,
4059 > {
4060 crate::common::RegisterField::<
4061 16,
4062 0x1,
4063 1,
4064 0,
4065 gtcsr::Cselca,
4066 gtcsr::Cselca,
4067 Gtcsr_SPEC,
4068 crate::common::RW,
4069 >::from_register(self, 0)
4070 }
4071
4072 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable"]
4073 #[inline(always)]
4074 pub fn cscbfah(
4075 self,
4076 ) -> crate::common::RegisterField<
4077 15,
4078 0x1,
4079 1,
4080 0,
4081 gtcsr::Cscbfah,
4082 gtcsr::Cscbfah,
4083 Gtcsr_SPEC,
4084 crate::common::RW,
4085 > {
4086 crate::common::RegisterField::<
4087 15,
4088 0x1,
4089 1,
4090 0,
4091 gtcsr::Cscbfah,
4092 gtcsr::Cscbfah,
4093 Gtcsr_SPEC,
4094 crate::common::RW,
4095 >::from_register(self, 0)
4096 }
4097
4098 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable"]
4099 #[inline(always)]
4100 pub fn cscbfal(
4101 self,
4102 ) -> crate::common::RegisterField<
4103 14,
4104 0x1,
4105 1,
4106 0,
4107 gtcsr::Cscbfal,
4108 gtcsr::Cscbfal,
4109 Gtcsr_SPEC,
4110 crate::common::RW,
4111 > {
4112 crate::common::RegisterField::<
4113 14,
4114 0x1,
4115 1,
4116 0,
4117 gtcsr::Cscbfal,
4118 gtcsr::Cscbfal,
4119 Gtcsr_SPEC,
4120 crate::common::RW,
4121 >::from_register(self, 0)
4122 }
4123
4124 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable"]
4125 #[inline(always)]
4126 pub fn cscbrah(
4127 self,
4128 ) -> crate::common::RegisterField<
4129 13,
4130 0x1,
4131 1,
4132 0,
4133 gtcsr::Cscbrah,
4134 gtcsr::Cscbrah,
4135 Gtcsr_SPEC,
4136 crate::common::RW,
4137 > {
4138 crate::common::RegisterField::<
4139 13,
4140 0x1,
4141 1,
4142 0,
4143 gtcsr::Cscbrah,
4144 gtcsr::Cscbrah,
4145 Gtcsr_SPEC,
4146 crate::common::RW,
4147 >::from_register(self, 0)
4148 }
4149
4150 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable"]
4151 #[inline(always)]
4152 pub fn cscbral(
4153 self,
4154 ) -> crate::common::RegisterField<
4155 12,
4156 0x1,
4157 1,
4158 0,
4159 gtcsr::Cscbral,
4160 gtcsr::Cscbral,
4161 Gtcsr_SPEC,
4162 crate::common::RW,
4163 > {
4164 crate::common::RegisterField::<
4165 12,
4166 0x1,
4167 1,
4168 0,
4169 gtcsr::Cscbral,
4170 gtcsr::Cscbral,
4171 Gtcsr_SPEC,
4172 crate::common::RW,
4173 >::from_register(self, 0)
4174 }
4175
4176 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable"]
4177 #[inline(always)]
4178 pub fn cscafbh(
4179 self,
4180 ) -> crate::common::RegisterField<
4181 11,
4182 0x1,
4183 1,
4184 0,
4185 gtcsr::Cscafbh,
4186 gtcsr::Cscafbh,
4187 Gtcsr_SPEC,
4188 crate::common::RW,
4189 > {
4190 crate::common::RegisterField::<
4191 11,
4192 0x1,
4193 1,
4194 0,
4195 gtcsr::Cscafbh,
4196 gtcsr::Cscafbh,
4197 Gtcsr_SPEC,
4198 crate::common::RW,
4199 >::from_register(self, 0)
4200 }
4201
4202 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable"]
4203 #[inline(always)]
4204 pub fn cscafbl(
4205 self,
4206 ) -> crate::common::RegisterField<
4207 10,
4208 0x1,
4209 1,
4210 0,
4211 gtcsr::Cscafbl,
4212 gtcsr::Cscafbl,
4213 Gtcsr_SPEC,
4214 crate::common::RW,
4215 > {
4216 crate::common::RegisterField::<
4217 10,
4218 0x1,
4219 1,
4220 0,
4221 gtcsr::Cscafbl,
4222 gtcsr::Cscafbl,
4223 Gtcsr_SPEC,
4224 crate::common::RW,
4225 >::from_register(self, 0)
4226 }
4227
4228 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable"]
4229 #[inline(always)]
4230 pub fn cscarbh(
4231 self,
4232 ) -> crate::common::RegisterField<
4233 9,
4234 0x1,
4235 1,
4236 0,
4237 gtcsr::Cscarbh,
4238 gtcsr::Cscarbh,
4239 Gtcsr_SPEC,
4240 crate::common::RW,
4241 > {
4242 crate::common::RegisterField::<
4243 9,
4244 0x1,
4245 1,
4246 0,
4247 gtcsr::Cscarbh,
4248 gtcsr::Cscarbh,
4249 Gtcsr_SPEC,
4250 crate::common::RW,
4251 >::from_register(self, 0)
4252 }
4253
4254 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable"]
4255 #[inline(always)]
4256 pub fn cscarbl(
4257 self,
4258 ) -> crate::common::RegisterField<
4259 8,
4260 0x1,
4261 1,
4262 0,
4263 gtcsr::Cscarbl,
4264 gtcsr::Cscarbl,
4265 Gtcsr_SPEC,
4266 crate::common::RW,
4267 > {
4268 crate::common::RegisterField::<
4269 8,
4270 0x1,
4271 1,
4272 0,
4273 gtcsr::Cscarbl,
4274 gtcsr::Cscarbl,
4275 Gtcsr_SPEC,
4276 crate::common::RW,
4277 >::from_register(self, 0)
4278 }
4279
4280 #[doc = "GTETRGD Pin Falling Input Source Counter Clear Enable"]
4281 #[inline(always)]
4282 pub fn csgtrgdf(
4283 self,
4284 ) -> crate::common::RegisterField<
4285 7,
4286 0x1,
4287 1,
4288 0,
4289 gtcsr::Csgtrgdf,
4290 gtcsr::Csgtrgdf,
4291 Gtcsr_SPEC,
4292 crate::common::RW,
4293 > {
4294 crate::common::RegisterField::<
4295 7,
4296 0x1,
4297 1,
4298 0,
4299 gtcsr::Csgtrgdf,
4300 gtcsr::Csgtrgdf,
4301 Gtcsr_SPEC,
4302 crate::common::RW,
4303 >::from_register(self, 0)
4304 }
4305
4306 #[doc = "GTETRGD Pin Rising Input Source Counter Clear Enable"]
4307 #[inline(always)]
4308 pub fn csgtrgdr(
4309 self,
4310 ) -> crate::common::RegisterField<
4311 6,
4312 0x1,
4313 1,
4314 0,
4315 gtcsr::Csgtrgdr,
4316 gtcsr::Csgtrgdr,
4317 Gtcsr_SPEC,
4318 crate::common::RW,
4319 > {
4320 crate::common::RegisterField::<
4321 6,
4322 0x1,
4323 1,
4324 0,
4325 gtcsr::Csgtrgdr,
4326 gtcsr::Csgtrgdr,
4327 Gtcsr_SPEC,
4328 crate::common::RW,
4329 >::from_register(self, 0)
4330 }
4331
4332 #[doc = "GTETRGC Pin Falling Input Source Counter Clear Enable"]
4333 #[inline(always)]
4334 pub fn csgtrgcf(
4335 self,
4336 ) -> crate::common::RegisterField<
4337 5,
4338 0x1,
4339 1,
4340 0,
4341 gtcsr::Csgtrgcf,
4342 gtcsr::Csgtrgcf,
4343 Gtcsr_SPEC,
4344 crate::common::RW,
4345 > {
4346 crate::common::RegisterField::<
4347 5,
4348 0x1,
4349 1,
4350 0,
4351 gtcsr::Csgtrgcf,
4352 gtcsr::Csgtrgcf,
4353 Gtcsr_SPEC,
4354 crate::common::RW,
4355 >::from_register(self, 0)
4356 }
4357
4358 #[doc = "GTETRGC Pin Rising Input Source Counter Clear Enable"]
4359 #[inline(always)]
4360 pub fn csgtrgcr(
4361 self,
4362 ) -> crate::common::RegisterField<
4363 4,
4364 0x1,
4365 1,
4366 0,
4367 gtcsr::Csgtrgcr,
4368 gtcsr::Csgtrgcr,
4369 Gtcsr_SPEC,
4370 crate::common::RW,
4371 > {
4372 crate::common::RegisterField::<
4373 4,
4374 0x1,
4375 1,
4376 0,
4377 gtcsr::Csgtrgcr,
4378 gtcsr::Csgtrgcr,
4379 Gtcsr_SPEC,
4380 crate::common::RW,
4381 >::from_register(self, 0)
4382 }
4383
4384 #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
4385 #[inline(always)]
4386 pub fn csgtrgbf(
4387 self,
4388 ) -> crate::common::RegisterField<
4389 3,
4390 0x1,
4391 1,
4392 0,
4393 gtcsr::Csgtrgbf,
4394 gtcsr::Csgtrgbf,
4395 Gtcsr_SPEC,
4396 crate::common::RW,
4397 > {
4398 crate::common::RegisterField::<
4399 3,
4400 0x1,
4401 1,
4402 0,
4403 gtcsr::Csgtrgbf,
4404 gtcsr::Csgtrgbf,
4405 Gtcsr_SPEC,
4406 crate::common::RW,
4407 >::from_register(self, 0)
4408 }
4409
4410 #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
4411 #[inline(always)]
4412 pub fn csgtrgbr(
4413 self,
4414 ) -> crate::common::RegisterField<
4415 2,
4416 0x1,
4417 1,
4418 0,
4419 gtcsr::Csgtrgbr,
4420 gtcsr::Csgtrgbr,
4421 Gtcsr_SPEC,
4422 crate::common::RW,
4423 > {
4424 crate::common::RegisterField::<
4425 2,
4426 0x1,
4427 1,
4428 0,
4429 gtcsr::Csgtrgbr,
4430 gtcsr::Csgtrgbr,
4431 Gtcsr_SPEC,
4432 crate::common::RW,
4433 >::from_register(self, 0)
4434 }
4435
4436 #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
4437 #[inline(always)]
4438 pub fn csgtrgaf(
4439 self,
4440 ) -> crate::common::RegisterField<
4441 1,
4442 0x1,
4443 1,
4444 0,
4445 gtcsr::Csgtrgaf,
4446 gtcsr::Csgtrgaf,
4447 Gtcsr_SPEC,
4448 crate::common::RW,
4449 > {
4450 crate::common::RegisterField::<
4451 1,
4452 0x1,
4453 1,
4454 0,
4455 gtcsr::Csgtrgaf,
4456 gtcsr::Csgtrgaf,
4457 Gtcsr_SPEC,
4458 crate::common::RW,
4459 >::from_register(self, 0)
4460 }
4461
4462 #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
4463 #[inline(always)]
4464 pub fn csgtrgar(
4465 self,
4466 ) -> crate::common::RegisterField<
4467 0,
4468 0x1,
4469 1,
4470 0,
4471 gtcsr::Csgtrgar,
4472 gtcsr::Csgtrgar,
4473 Gtcsr_SPEC,
4474 crate::common::RW,
4475 > {
4476 crate::common::RegisterField::<
4477 0,
4478 0x1,
4479 1,
4480 0,
4481 gtcsr::Csgtrgar,
4482 gtcsr::Csgtrgar,
4483 Gtcsr_SPEC,
4484 crate::common::RW,
4485 >::from_register(self, 0)
4486 }
4487}
4488impl ::core::default::Default for Gtcsr {
4489 #[inline(always)]
4490 fn default() -> Gtcsr {
4491 <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
4492 }
4493}
4494pub mod gtcsr {
4495
4496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4497 pub struct Cclr_SPEC;
4498 pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
4499 impl Cclr {
4500 #[doc = "Disable counter clear by the GTCLR register"]
4501 pub const _0: Self = Self::new(0);
4502
4503 #[doc = "Enable counter clear by the GTCLR register"]
4504 pub const _1: Self = Self::new(1);
4505 }
4506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4507 pub struct Cselch_SPEC;
4508 pub type Cselch = crate::EnumBitfieldStruct<u8, Cselch_SPEC>;
4509 impl Cselch {
4510 #[doc = "Disable counter clear on ELC_GPTH input"]
4511 pub const _0: Self = Self::new(0);
4512
4513 #[doc = "Enable counter clear on ELC_GPTH input"]
4514 pub const _1: Self = Self::new(1);
4515 }
4516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4517 pub struct Cselcg_SPEC;
4518 pub type Cselcg = crate::EnumBitfieldStruct<u8, Cselcg_SPEC>;
4519 impl Cselcg {
4520 #[doc = "Disable counter clear on ELC_GPTG input"]
4521 pub const _0: Self = Self::new(0);
4522
4523 #[doc = "Enable counter clear on ELC_GPTG input"]
4524 pub const _1: Self = Self::new(1);
4525 }
4526 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4527 pub struct Cselcf_SPEC;
4528 pub type Cselcf = crate::EnumBitfieldStruct<u8, Cselcf_SPEC>;
4529 impl Cselcf {
4530 #[doc = "Disable counter clear on ELC_GPTF input"]
4531 pub const _0: Self = Self::new(0);
4532
4533 #[doc = "Enable counter clear on ELC_GPTF input"]
4534 pub const _1: Self = Self::new(1);
4535 }
4536 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4537 pub struct Cselce_SPEC;
4538 pub type Cselce = crate::EnumBitfieldStruct<u8, Cselce_SPEC>;
4539 impl Cselce {
4540 #[doc = "Disable counter clear on ELC_GPTE input"]
4541 pub const _0: Self = Self::new(0);
4542
4543 #[doc = "Enable counter clear on ELC_GPTE input"]
4544 pub const _1: Self = Self::new(1);
4545 }
4546 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4547 pub struct Cselcd_SPEC;
4548 pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
4549 impl Cselcd {
4550 #[doc = "Disable counter clear on ELC_GPTD input"]
4551 pub const _0: Self = Self::new(0);
4552
4553 #[doc = "Enable counter clear on ELC_GPTD input"]
4554 pub const _1: Self = Self::new(1);
4555 }
4556 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4557 pub struct Cselcc_SPEC;
4558 pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
4559 impl Cselcc {
4560 #[doc = "Disable counter clear on ELC_GPTC input"]
4561 pub const _0: Self = Self::new(0);
4562
4563 #[doc = "Enable counter clear on ELC_GPTC input"]
4564 pub const _1: Self = Self::new(1);
4565 }
4566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4567 pub struct Cselcb_SPEC;
4568 pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
4569 impl Cselcb {
4570 #[doc = "Disable counter clear on ELC_GPTB input"]
4571 pub const _0: Self = Self::new(0);
4572
4573 #[doc = "Enable counter clear on ELC_GPTB input"]
4574 pub const _1: Self = Self::new(1);
4575 }
4576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4577 pub struct Cselca_SPEC;
4578 pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
4579 impl Cselca {
4580 #[doc = "Disable counter clear on ELC_GPTA input"]
4581 pub const _0: Self = Self::new(0);
4582
4583 #[doc = "Enable counter clear on ELC_GPTA input"]
4584 pub const _1: Self = Self::new(1);
4585 }
4586 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4587 pub struct Cscbfah_SPEC;
4588 pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
4589 impl Cscbfah {
4590 #[doc = "Disable counter clear on the falling edge of GTIOCB input when GTIOCA input is 1"]
4591 pub const _0: Self = Self::new(0);
4592
4593 #[doc = "Enable counter clear on the falling edge of GTIOCB input when GTIOCA input is 1"]
4594 pub const _1: Self = Self::new(1);
4595 }
4596 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4597 pub struct Cscbfal_SPEC;
4598 pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
4599 impl Cscbfal {
4600 #[doc = "Disable counter clear on the falling edge of GTIOCB input when GTIOCA input is 0"]
4601 pub const _0: Self = Self::new(0);
4602
4603 #[doc = "Enable counter clear on the falling edge of GTIOCB input when GTIOCA input is 0"]
4604 pub const _1: Self = Self::new(1);
4605 }
4606 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4607 pub struct Cscbrah_SPEC;
4608 pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
4609 impl Cscbrah {
4610 #[doc = "Disable counter clear on the rising edge of GTIOCB input when GTIOCA input is 1"]
4611 pub const _0: Self = Self::new(0);
4612
4613 #[doc = "Enable counter clear on the rising edge of GTIOCB input when GTIOCA input is 1"]
4614 pub const _1: Self = Self::new(1);
4615 }
4616 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4617 pub struct Cscbral_SPEC;
4618 pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
4619 impl Cscbral {
4620 #[doc = "Disable counter clear on the rising edge of GTIOCB input when GTIOCA input is 0"]
4621 pub const _0: Self = Self::new(0);
4622
4623 #[doc = "Enable counter clear on the rising edge of GTIOCB input when GTIOCA input is 0"]
4624 pub const _1: Self = Self::new(1);
4625 }
4626 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4627 pub struct Cscafbh_SPEC;
4628 pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
4629 impl Cscafbh {
4630 #[doc = "Disable counter clear on the falling edge of GTIOCA input when GTIOCB input is 1"]
4631 pub const _0: Self = Self::new(0);
4632
4633 #[doc = "Enable counter clear on the falling edge of GTIOCA input when GTIOCB input is 1"]
4634 pub const _1: Self = Self::new(1);
4635 }
4636 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4637 pub struct Cscafbl_SPEC;
4638 pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
4639 impl Cscafbl {
4640 #[doc = "Disable counter clear on the falling edge of GTIOCA input when GTIOCB input is 0"]
4641 pub const _0: Self = Self::new(0);
4642
4643 #[doc = "Enable counter clear on the falling edge of GTIOCA input when GTIOCB input is 0"]
4644 pub const _1: Self = Self::new(1);
4645 }
4646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4647 pub struct Cscarbh_SPEC;
4648 pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
4649 impl Cscarbh {
4650 #[doc = "Disable counter clear on the rising edge of GTIOCA input when GTIOCB input is 1"]
4651 pub const _0: Self = Self::new(0);
4652
4653 #[doc = "Enable counter clear on the rising edge of GTIOCA input when GTIOCB input is 1"]
4654 pub const _1: Self = Self::new(1);
4655 }
4656 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4657 pub struct Cscarbl_SPEC;
4658 pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
4659 impl Cscarbl {
4660 #[doc = "Disable counter clear on the rising edge of GTIOCA input when GTIOCB input is 0"]
4661 pub const _0: Self = Self::new(0);
4662
4663 #[doc = "Enable counter clear on the rising edge of GTIOCA input when GTIOCB input is 0"]
4664 pub const _1: Self = Self::new(1);
4665 }
4666 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4667 pub struct Csgtrgdf_SPEC;
4668 pub type Csgtrgdf = crate::EnumBitfieldStruct<u8, Csgtrgdf_SPEC>;
4669 impl Csgtrgdf {
4670 #[doc = "Disable counter clear on the falling edge of GTETRGD input"]
4671 pub const _0: Self = Self::new(0);
4672
4673 #[doc = "Enable counter clear on the falling edge of GTETRGD input"]
4674 pub const _1: Self = Self::new(1);
4675 }
4676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4677 pub struct Csgtrgdr_SPEC;
4678 pub type Csgtrgdr = crate::EnumBitfieldStruct<u8, Csgtrgdr_SPEC>;
4679 impl Csgtrgdr {
4680 #[doc = "Disable counter clear on the rising edge of GTETRGD input"]
4681 pub const _0: Self = Self::new(0);
4682
4683 #[doc = "Enable counter clear on the rising edge of GTETRGD input"]
4684 pub const _1: Self = Self::new(1);
4685 }
4686 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4687 pub struct Csgtrgcf_SPEC;
4688 pub type Csgtrgcf = crate::EnumBitfieldStruct<u8, Csgtrgcf_SPEC>;
4689 impl Csgtrgcf {
4690 #[doc = "Disable counter clear on the falling edge of GTETRGC input"]
4691 pub const _0: Self = Self::new(0);
4692
4693 #[doc = "Enable counter clear on the falling edge of GTETRGC input"]
4694 pub const _1: Self = Self::new(1);
4695 }
4696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4697 pub struct Csgtrgcr_SPEC;
4698 pub type Csgtrgcr = crate::EnumBitfieldStruct<u8, Csgtrgcr_SPEC>;
4699 impl Csgtrgcr {
4700 #[doc = "Disable counter clear on the rising edge of GTETRGC input"]
4701 pub const _0: Self = Self::new(0);
4702
4703 #[doc = "Enable counter clear on the rising edge of GTETRGC input"]
4704 pub const _1: Self = Self::new(1);
4705 }
4706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4707 pub struct Csgtrgbf_SPEC;
4708 pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
4709 impl Csgtrgbf {
4710 #[doc = "Disable counter clear on the falling edge of GTETRGB input"]
4711 pub const _0: Self = Self::new(0);
4712
4713 #[doc = "Enable counter clear on the falling edge of GTETRGB input"]
4714 pub const _1: Self = Self::new(1);
4715 }
4716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4717 pub struct Csgtrgbr_SPEC;
4718 pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
4719 impl Csgtrgbr {
4720 #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
4721 pub const _0: Self = Self::new(0);
4722
4723 #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
4724 pub const _1: Self = Self::new(1);
4725 }
4726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4727 pub struct Csgtrgaf_SPEC;
4728 pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
4729 impl Csgtrgaf {
4730 #[doc = "Disable counter clear on the falling edge of GTETRGA input"]
4731 pub const _0: Self = Self::new(0);
4732
4733 #[doc = "Enable counter clear on the falling edge of GTETRGA input"]
4734 pub const _1: Self = Self::new(1);
4735 }
4736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4737 pub struct Csgtrgar_SPEC;
4738 pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
4739 impl Csgtrgar {
4740 #[doc = "Disable counter clear on the rising edge of GTETRGA input"]
4741 pub const _0: Self = Self::new(0);
4742
4743 #[doc = "Enable counter clear on the rising edge of GTETRGA input"]
4744 pub const _1: Self = Self::new(1);
4745 }
4746}
4747#[doc(hidden)]
4748#[derive(Copy, Clone, Eq, PartialEq)]
4749pub struct Gtupsr_SPEC;
4750impl crate::sealed::RegSpec for Gtupsr_SPEC {
4751 type DataType = u32;
4752}
4753
4754#[doc = "General PWM Timer Up Count Source Select Register"]
4755pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
4756
4757impl Gtupsr {
4758 #[doc = "ELC_GPTH Event Source Counter Count Up Enable"]
4759 #[inline(always)]
4760 pub fn uselch(
4761 self,
4762 ) -> crate::common::RegisterField<
4763 23,
4764 0x1,
4765 1,
4766 0,
4767 gtupsr::Uselch,
4768 gtupsr::Uselch,
4769 Gtupsr_SPEC,
4770 crate::common::RW,
4771 > {
4772 crate::common::RegisterField::<
4773 23,
4774 0x1,
4775 1,
4776 0,
4777 gtupsr::Uselch,
4778 gtupsr::Uselch,
4779 Gtupsr_SPEC,
4780 crate::common::RW,
4781 >::from_register(self, 0)
4782 }
4783
4784 #[doc = "ELC_GPTG Event Source Counter Count Up Enable"]
4785 #[inline(always)]
4786 pub fn uselcg(
4787 self,
4788 ) -> crate::common::RegisterField<
4789 22,
4790 0x1,
4791 1,
4792 0,
4793 gtupsr::Uselcg,
4794 gtupsr::Uselcg,
4795 Gtupsr_SPEC,
4796 crate::common::RW,
4797 > {
4798 crate::common::RegisterField::<
4799 22,
4800 0x1,
4801 1,
4802 0,
4803 gtupsr::Uselcg,
4804 gtupsr::Uselcg,
4805 Gtupsr_SPEC,
4806 crate::common::RW,
4807 >::from_register(self, 0)
4808 }
4809
4810 #[doc = "ELC_GPTF Event Source Counter Count Up Enable"]
4811 #[inline(always)]
4812 pub fn uselcf(
4813 self,
4814 ) -> crate::common::RegisterField<
4815 21,
4816 0x1,
4817 1,
4818 0,
4819 gtupsr::Uselcf,
4820 gtupsr::Uselcf,
4821 Gtupsr_SPEC,
4822 crate::common::RW,
4823 > {
4824 crate::common::RegisterField::<
4825 21,
4826 0x1,
4827 1,
4828 0,
4829 gtupsr::Uselcf,
4830 gtupsr::Uselcf,
4831 Gtupsr_SPEC,
4832 crate::common::RW,
4833 >::from_register(self, 0)
4834 }
4835
4836 #[doc = "ELC_GPTE Event Source Counter Count Up Enable"]
4837 #[inline(always)]
4838 pub fn uselce(
4839 self,
4840 ) -> crate::common::RegisterField<
4841 20,
4842 0x1,
4843 1,
4844 0,
4845 gtupsr::Uselce,
4846 gtupsr::Uselce,
4847 Gtupsr_SPEC,
4848 crate::common::RW,
4849 > {
4850 crate::common::RegisterField::<
4851 20,
4852 0x1,
4853 1,
4854 0,
4855 gtupsr::Uselce,
4856 gtupsr::Uselce,
4857 Gtupsr_SPEC,
4858 crate::common::RW,
4859 >::from_register(self, 0)
4860 }
4861
4862 #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
4863 #[inline(always)]
4864 pub fn uselcd(
4865 self,
4866 ) -> crate::common::RegisterField<
4867 19,
4868 0x1,
4869 1,
4870 0,
4871 gtupsr::Uselcd,
4872 gtupsr::Uselcd,
4873 Gtupsr_SPEC,
4874 crate::common::RW,
4875 > {
4876 crate::common::RegisterField::<
4877 19,
4878 0x1,
4879 1,
4880 0,
4881 gtupsr::Uselcd,
4882 gtupsr::Uselcd,
4883 Gtupsr_SPEC,
4884 crate::common::RW,
4885 >::from_register(self, 0)
4886 }
4887
4888 #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
4889 #[inline(always)]
4890 pub fn uselcc(
4891 self,
4892 ) -> crate::common::RegisterField<
4893 18,
4894 0x1,
4895 1,
4896 0,
4897 gtupsr::Uselcc,
4898 gtupsr::Uselcc,
4899 Gtupsr_SPEC,
4900 crate::common::RW,
4901 > {
4902 crate::common::RegisterField::<
4903 18,
4904 0x1,
4905 1,
4906 0,
4907 gtupsr::Uselcc,
4908 gtupsr::Uselcc,
4909 Gtupsr_SPEC,
4910 crate::common::RW,
4911 >::from_register(self, 0)
4912 }
4913
4914 #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
4915 #[inline(always)]
4916 pub fn uselcb(
4917 self,
4918 ) -> crate::common::RegisterField<
4919 17,
4920 0x1,
4921 1,
4922 0,
4923 gtupsr::Uselcb,
4924 gtupsr::Uselcb,
4925 Gtupsr_SPEC,
4926 crate::common::RW,
4927 > {
4928 crate::common::RegisterField::<
4929 17,
4930 0x1,
4931 1,
4932 0,
4933 gtupsr::Uselcb,
4934 gtupsr::Uselcb,
4935 Gtupsr_SPEC,
4936 crate::common::RW,
4937 >::from_register(self, 0)
4938 }
4939
4940 #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
4941 #[inline(always)]
4942 pub fn uselca(
4943 self,
4944 ) -> crate::common::RegisterField<
4945 16,
4946 0x1,
4947 1,
4948 0,
4949 gtupsr::Uselca,
4950 gtupsr::Uselca,
4951 Gtupsr_SPEC,
4952 crate::common::RW,
4953 > {
4954 crate::common::RegisterField::<
4955 16,
4956 0x1,
4957 1,
4958 0,
4959 gtupsr::Uselca,
4960 gtupsr::Uselca,
4961 Gtupsr_SPEC,
4962 crate::common::RW,
4963 >::from_register(self, 0)
4964 }
4965
4966 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable"]
4967 #[inline(always)]
4968 pub fn uscbfah(
4969 self,
4970 ) -> crate::common::RegisterField<
4971 15,
4972 0x1,
4973 1,
4974 0,
4975 gtupsr::Uscbfah,
4976 gtupsr::Uscbfah,
4977 Gtupsr_SPEC,
4978 crate::common::RW,
4979 > {
4980 crate::common::RegisterField::<
4981 15,
4982 0x1,
4983 1,
4984 0,
4985 gtupsr::Uscbfah,
4986 gtupsr::Uscbfah,
4987 Gtupsr_SPEC,
4988 crate::common::RW,
4989 >::from_register(self, 0)
4990 }
4991
4992 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable"]
4993 #[inline(always)]
4994 pub fn uscbfal(
4995 self,
4996 ) -> crate::common::RegisterField<
4997 14,
4998 0x1,
4999 1,
5000 0,
5001 gtupsr::Uscbfal,
5002 gtupsr::Uscbfal,
5003 Gtupsr_SPEC,
5004 crate::common::RW,
5005 > {
5006 crate::common::RegisterField::<
5007 14,
5008 0x1,
5009 1,
5010 0,
5011 gtupsr::Uscbfal,
5012 gtupsr::Uscbfal,
5013 Gtupsr_SPEC,
5014 crate::common::RW,
5015 >::from_register(self, 0)
5016 }
5017
5018 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable"]
5019 #[inline(always)]
5020 pub fn uscbrah(
5021 self,
5022 ) -> crate::common::RegisterField<
5023 13,
5024 0x1,
5025 1,
5026 0,
5027 gtupsr::Uscbrah,
5028 gtupsr::Uscbrah,
5029 Gtupsr_SPEC,
5030 crate::common::RW,
5031 > {
5032 crate::common::RegisterField::<
5033 13,
5034 0x1,
5035 1,
5036 0,
5037 gtupsr::Uscbrah,
5038 gtupsr::Uscbrah,
5039 Gtupsr_SPEC,
5040 crate::common::RW,
5041 >::from_register(self, 0)
5042 }
5043
5044 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable"]
5045 #[inline(always)]
5046 pub fn uscbral(
5047 self,
5048 ) -> crate::common::RegisterField<
5049 12,
5050 0x1,
5051 1,
5052 0,
5053 gtupsr::Uscbral,
5054 gtupsr::Uscbral,
5055 Gtupsr_SPEC,
5056 crate::common::RW,
5057 > {
5058 crate::common::RegisterField::<
5059 12,
5060 0x1,
5061 1,
5062 0,
5063 gtupsr::Uscbral,
5064 gtupsr::Uscbral,
5065 Gtupsr_SPEC,
5066 crate::common::RW,
5067 >::from_register(self, 0)
5068 }
5069
5070 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable"]
5071 #[inline(always)]
5072 pub fn uscafbh(
5073 self,
5074 ) -> crate::common::RegisterField<
5075 11,
5076 0x1,
5077 1,
5078 0,
5079 gtupsr::Uscafbh,
5080 gtupsr::Uscafbh,
5081 Gtupsr_SPEC,
5082 crate::common::RW,
5083 > {
5084 crate::common::RegisterField::<
5085 11,
5086 0x1,
5087 1,
5088 0,
5089 gtupsr::Uscafbh,
5090 gtupsr::Uscafbh,
5091 Gtupsr_SPEC,
5092 crate::common::RW,
5093 >::from_register(self, 0)
5094 }
5095
5096 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable"]
5097 #[inline(always)]
5098 pub fn uscafbl(
5099 self,
5100 ) -> crate::common::RegisterField<
5101 10,
5102 0x1,
5103 1,
5104 0,
5105 gtupsr::Uscafbl,
5106 gtupsr::Uscafbl,
5107 Gtupsr_SPEC,
5108 crate::common::RW,
5109 > {
5110 crate::common::RegisterField::<
5111 10,
5112 0x1,
5113 1,
5114 0,
5115 gtupsr::Uscafbl,
5116 gtupsr::Uscafbl,
5117 Gtupsr_SPEC,
5118 crate::common::RW,
5119 >::from_register(self, 0)
5120 }
5121
5122 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable"]
5123 #[inline(always)]
5124 pub fn uscarbh(
5125 self,
5126 ) -> crate::common::RegisterField<
5127 9,
5128 0x1,
5129 1,
5130 0,
5131 gtupsr::Uscarbh,
5132 gtupsr::Uscarbh,
5133 Gtupsr_SPEC,
5134 crate::common::RW,
5135 > {
5136 crate::common::RegisterField::<
5137 9,
5138 0x1,
5139 1,
5140 0,
5141 gtupsr::Uscarbh,
5142 gtupsr::Uscarbh,
5143 Gtupsr_SPEC,
5144 crate::common::RW,
5145 >::from_register(self, 0)
5146 }
5147
5148 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable"]
5149 #[inline(always)]
5150 pub fn uscarbl(
5151 self,
5152 ) -> crate::common::RegisterField<
5153 8,
5154 0x1,
5155 1,
5156 0,
5157 gtupsr::Uscarbl,
5158 gtupsr::Uscarbl,
5159 Gtupsr_SPEC,
5160 crate::common::RW,
5161 > {
5162 crate::common::RegisterField::<
5163 8,
5164 0x1,
5165 1,
5166 0,
5167 gtupsr::Uscarbl,
5168 gtupsr::Uscarbl,
5169 Gtupsr_SPEC,
5170 crate::common::RW,
5171 >::from_register(self, 0)
5172 }
5173
5174 #[doc = "GTETRGD Pin Falling Input Source Counter Count Up Enable"]
5175 #[inline(always)]
5176 pub fn usgtrgdf(
5177 self,
5178 ) -> crate::common::RegisterField<
5179 7,
5180 0x1,
5181 1,
5182 0,
5183 gtupsr::Usgtrgdf,
5184 gtupsr::Usgtrgdf,
5185 Gtupsr_SPEC,
5186 crate::common::RW,
5187 > {
5188 crate::common::RegisterField::<
5189 7,
5190 0x1,
5191 1,
5192 0,
5193 gtupsr::Usgtrgdf,
5194 gtupsr::Usgtrgdf,
5195 Gtupsr_SPEC,
5196 crate::common::RW,
5197 >::from_register(self, 0)
5198 }
5199
5200 #[doc = "GTETRGD Pin Rising Input Source Counter Count Up Enable"]
5201 #[inline(always)]
5202 pub fn usgtrgdr(
5203 self,
5204 ) -> crate::common::RegisterField<
5205 6,
5206 0x1,
5207 1,
5208 0,
5209 gtupsr::Usgtrgdr,
5210 gtupsr::Usgtrgdr,
5211 Gtupsr_SPEC,
5212 crate::common::RW,
5213 > {
5214 crate::common::RegisterField::<
5215 6,
5216 0x1,
5217 1,
5218 0,
5219 gtupsr::Usgtrgdr,
5220 gtupsr::Usgtrgdr,
5221 Gtupsr_SPEC,
5222 crate::common::RW,
5223 >::from_register(self, 0)
5224 }
5225
5226 #[doc = "GTETRGC Pin Falling Input Source Counter Count Up Enable"]
5227 #[inline(always)]
5228 pub fn usgtrgcf(
5229 self,
5230 ) -> crate::common::RegisterField<
5231 5,
5232 0x1,
5233 1,
5234 0,
5235 gtupsr::Usgtrgcf,
5236 gtupsr::Usgtrgcf,
5237 Gtupsr_SPEC,
5238 crate::common::RW,
5239 > {
5240 crate::common::RegisterField::<
5241 5,
5242 0x1,
5243 1,
5244 0,
5245 gtupsr::Usgtrgcf,
5246 gtupsr::Usgtrgcf,
5247 Gtupsr_SPEC,
5248 crate::common::RW,
5249 >::from_register(self, 0)
5250 }
5251
5252 #[doc = "GTETRGC Pin Rising Input Source Counter Count Up Enable"]
5253 #[inline(always)]
5254 pub fn usgtrgcr(
5255 self,
5256 ) -> crate::common::RegisterField<
5257 4,
5258 0x1,
5259 1,
5260 0,
5261 gtupsr::Usgtrgcr,
5262 gtupsr::Usgtrgcr,
5263 Gtupsr_SPEC,
5264 crate::common::RW,
5265 > {
5266 crate::common::RegisterField::<
5267 4,
5268 0x1,
5269 1,
5270 0,
5271 gtupsr::Usgtrgcr,
5272 gtupsr::Usgtrgcr,
5273 Gtupsr_SPEC,
5274 crate::common::RW,
5275 >::from_register(self, 0)
5276 }
5277
5278 #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
5279 #[inline(always)]
5280 pub fn usgtrgbf(
5281 self,
5282 ) -> crate::common::RegisterField<
5283 3,
5284 0x1,
5285 1,
5286 0,
5287 gtupsr::Usgtrgbf,
5288 gtupsr::Usgtrgbf,
5289 Gtupsr_SPEC,
5290 crate::common::RW,
5291 > {
5292 crate::common::RegisterField::<
5293 3,
5294 0x1,
5295 1,
5296 0,
5297 gtupsr::Usgtrgbf,
5298 gtupsr::Usgtrgbf,
5299 Gtupsr_SPEC,
5300 crate::common::RW,
5301 >::from_register(self, 0)
5302 }
5303
5304 #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
5305 #[inline(always)]
5306 pub fn usgtrgbr(
5307 self,
5308 ) -> crate::common::RegisterField<
5309 2,
5310 0x1,
5311 1,
5312 0,
5313 gtupsr::Usgtrgbr,
5314 gtupsr::Usgtrgbr,
5315 Gtupsr_SPEC,
5316 crate::common::RW,
5317 > {
5318 crate::common::RegisterField::<
5319 2,
5320 0x1,
5321 1,
5322 0,
5323 gtupsr::Usgtrgbr,
5324 gtupsr::Usgtrgbr,
5325 Gtupsr_SPEC,
5326 crate::common::RW,
5327 >::from_register(self, 0)
5328 }
5329
5330 #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
5331 #[inline(always)]
5332 pub fn usgtrgaf(
5333 self,
5334 ) -> crate::common::RegisterField<
5335 1,
5336 0x1,
5337 1,
5338 0,
5339 gtupsr::Usgtrgaf,
5340 gtupsr::Usgtrgaf,
5341 Gtupsr_SPEC,
5342 crate::common::RW,
5343 > {
5344 crate::common::RegisterField::<
5345 1,
5346 0x1,
5347 1,
5348 0,
5349 gtupsr::Usgtrgaf,
5350 gtupsr::Usgtrgaf,
5351 Gtupsr_SPEC,
5352 crate::common::RW,
5353 >::from_register(self, 0)
5354 }
5355
5356 #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
5357 #[inline(always)]
5358 pub fn usgtrgar(
5359 self,
5360 ) -> crate::common::RegisterField<
5361 0,
5362 0x1,
5363 1,
5364 0,
5365 gtupsr::Usgtrgar,
5366 gtupsr::Usgtrgar,
5367 Gtupsr_SPEC,
5368 crate::common::RW,
5369 > {
5370 crate::common::RegisterField::<
5371 0,
5372 0x1,
5373 1,
5374 0,
5375 gtupsr::Usgtrgar,
5376 gtupsr::Usgtrgar,
5377 Gtupsr_SPEC,
5378 crate::common::RW,
5379 >::from_register(self, 0)
5380 }
5381}
5382impl ::core::default::Default for Gtupsr {
5383 #[inline(always)]
5384 fn default() -> Gtupsr {
5385 <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
5386 }
5387}
5388pub mod gtupsr {
5389
5390 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5391 pub struct Uselch_SPEC;
5392 pub type Uselch = crate::EnumBitfieldStruct<u8, Uselch_SPEC>;
5393 impl Uselch {
5394 #[doc = "Disable counter count up on ELC_GPTH input"]
5395 pub const _0: Self = Self::new(0);
5396
5397 #[doc = "Enable counter count up on ELC_GPTH input."]
5398 pub const _1: Self = Self::new(1);
5399 }
5400 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5401 pub struct Uselcg_SPEC;
5402 pub type Uselcg = crate::EnumBitfieldStruct<u8, Uselcg_SPEC>;
5403 impl Uselcg {
5404 #[doc = "Disable counter count up on ELC_GPTG input"]
5405 pub const _0: Self = Self::new(0);
5406
5407 #[doc = "Enable counter count up on ELC_GPTG input."]
5408 pub const _1: Self = Self::new(1);
5409 }
5410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5411 pub struct Uselcf_SPEC;
5412 pub type Uselcf = crate::EnumBitfieldStruct<u8, Uselcf_SPEC>;
5413 impl Uselcf {
5414 #[doc = "Disable counter count up on ELC_GPTF input"]
5415 pub const _0: Self = Self::new(0);
5416
5417 #[doc = "Enable counter count up on ELC_GPTF input."]
5418 pub const _1: Self = Self::new(1);
5419 }
5420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5421 pub struct Uselce_SPEC;
5422 pub type Uselce = crate::EnumBitfieldStruct<u8, Uselce_SPEC>;
5423 impl Uselce {
5424 #[doc = "Disable counter count up on ELC_GPTE input"]
5425 pub const _0: Self = Self::new(0);
5426
5427 #[doc = "Enable counter count up on ELC_GPTE input.put"]
5428 pub const _1: Self = Self::new(1);
5429 }
5430 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5431 pub struct Uselcd_SPEC;
5432 pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
5433 impl Uselcd {
5434 #[doc = "Disable counter count up on ELC_GPTD input"]
5435 pub const _0: Self = Self::new(0);
5436
5437 #[doc = "Enable counter count up on ELC_GPTD input"]
5438 pub const _1: Self = Self::new(1);
5439 }
5440 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5441 pub struct Uselcc_SPEC;
5442 pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
5443 impl Uselcc {
5444 #[doc = "Disable counter count up on ELC_GPTC input"]
5445 pub const _0: Self = Self::new(0);
5446
5447 #[doc = "Enable counter count up on ELC_GPTC input."]
5448 pub const _1: Self = Self::new(1);
5449 }
5450 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5451 pub struct Uselcb_SPEC;
5452 pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
5453 impl Uselcb {
5454 #[doc = "Disable counter count up on ELC_GPTB input"]
5455 pub const _0: Self = Self::new(0);
5456
5457 #[doc = "Enable counter count up on ELC_GPTB input."]
5458 pub const _1: Self = Self::new(1);
5459 }
5460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5461 pub struct Uselca_SPEC;
5462 pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
5463 impl Uselca {
5464 #[doc = "Disable counter count up on ELC_GPTA input"]
5465 pub const _0: Self = Self::new(0);
5466
5467 #[doc = "Enable counter count up on ELC_GPTA input."]
5468 pub const _1: Self = Self::new(1);
5469 }
5470 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5471 pub struct Uscbfah_SPEC;
5472 pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
5473 impl Uscbfah {
5474 #[doc = "Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1"]
5475 pub const _0: Self = Self::new(0);
5476
5477 #[doc = "Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1."]
5478 pub const _1: Self = Self::new(1);
5479 }
5480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5481 pub struct Uscbfal_SPEC;
5482 pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
5483 impl Uscbfal {
5484 #[doc = "Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0"]
5485 pub const _0: Self = Self::new(0);
5486
5487 #[doc = "Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0."]
5488 pub const _1: Self = Self::new(1);
5489 }
5490 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5491 pub struct Uscbrah_SPEC;
5492 pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
5493 impl Uscbrah {
5494 #[doc = "Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1"]
5495 pub const _0: Self = Self::new(0);
5496
5497 #[doc = "Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1."]
5498 pub const _1: Self = Self::new(1);
5499 }
5500 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5501 pub struct Uscbral_SPEC;
5502 pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
5503 impl Uscbral {
5504 #[doc = "Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0"]
5505 pub const _0: Self = Self::new(0);
5506
5507 #[doc = "Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0."]
5508 pub const _1: Self = Self::new(1);
5509 }
5510 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5511 pub struct Uscafbh_SPEC;
5512 pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
5513 impl Uscafbh {
5514 #[doc = "Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1"]
5515 pub const _0: Self = Self::new(0);
5516
5517 #[doc = "Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1."]
5518 pub const _1: Self = Self::new(1);
5519 }
5520 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5521 pub struct Uscafbl_SPEC;
5522 pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
5523 impl Uscafbl {
5524 #[doc = "Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0"]
5525 pub const _0: Self = Self::new(0);
5526
5527 #[doc = "Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0."]
5528 pub const _1: Self = Self::new(1);
5529 }
5530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5531 pub struct Uscarbh_SPEC;
5532 pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
5533 impl Uscarbh {
5534 #[doc = "Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1"]
5535 pub const _0: Self = Self::new(0);
5536
5537 #[doc = "Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1."]
5538 pub const _1: Self = Self::new(1);
5539 }
5540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5541 pub struct Uscarbl_SPEC;
5542 pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
5543 impl Uscarbl {
5544 #[doc = "Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0"]
5545 pub const _0: Self = Self::new(0);
5546
5547 #[doc = "Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0."]
5548 pub const _1: Self = Self::new(1);
5549 }
5550 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5551 pub struct Usgtrgdf_SPEC;
5552 pub type Usgtrgdf = crate::EnumBitfieldStruct<u8, Usgtrgdf_SPEC>;
5553 impl Usgtrgdf {
5554 #[doc = "Disable counter count up on the falling edge of GTETRGD input"]
5555 pub const _0: Self = Self::new(0);
5556
5557 #[doc = "Enable counter count up on the falling edge of GTETRGD input."]
5558 pub const _1: Self = Self::new(1);
5559 }
5560 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5561 pub struct Usgtrgdr_SPEC;
5562 pub type Usgtrgdr = crate::EnumBitfieldStruct<u8, Usgtrgdr_SPEC>;
5563 impl Usgtrgdr {
5564 #[doc = "Disable counter count up on the rising edge of GTETRGD input"]
5565 pub const _0: Self = Self::new(0);
5566
5567 #[doc = "Enable counter count up on the rising edge of GTETRGD input"]
5568 pub const _1: Self = Self::new(1);
5569 }
5570 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5571 pub struct Usgtrgcf_SPEC;
5572 pub type Usgtrgcf = crate::EnumBitfieldStruct<u8, Usgtrgcf_SPEC>;
5573 impl Usgtrgcf {
5574 #[doc = "Disable counter count up on the falling edge of GTETRGC input"]
5575 pub const _0: Self = Self::new(0);
5576
5577 #[doc = "Enable counter count up on the falling edge of GTETRGC input."]
5578 pub const _1: Self = Self::new(1);
5579 }
5580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5581 pub struct Usgtrgcr_SPEC;
5582 pub type Usgtrgcr = crate::EnumBitfieldStruct<u8, Usgtrgcr_SPEC>;
5583 impl Usgtrgcr {
5584 #[doc = "Disable counter count up on the rising edge of GTETRGC input"]
5585 pub const _0: Self = Self::new(0);
5586
5587 #[doc = "Enable counter count up on the rising edge of GTETRGC input"]
5588 pub const _1: Self = Self::new(1);
5589 }
5590 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5591 pub struct Usgtrgbf_SPEC;
5592 pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
5593 impl Usgtrgbf {
5594 #[doc = "Disable counter count up on the falling edge of GTETRGB input"]
5595 pub const _0: Self = Self::new(0);
5596
5597 #[doc = "Enable counter count up on the falling edge of GTETRGB input."]
5598 pub const _1: Self = Self::new(1);
5599 }
5600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5601 pub struct Usgtrgbr_SPEC;
5602 pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
5603 impl Usgtrgbr {
5604 #[doc = "Disable counter count up on the rising edge of GTETRGB input"]
5605 pub const _0: Self = Self::new(0);
5606
5607 #[doc = "Enable counter count up on the rising edge of GTETRGB input."]
5608 pub const _1: Self = Self::new(1);
5609 }
5610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5611 pub struct Usgtrgaf_SPEC;
5612 pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
5613 impl Usgtrgaf {
5614 #[doc = "Disable counter count up on the falling edge of GTETRGA input"]
5615 pub const _0: Self = Self::new(0);
5616
5617 #[doc = "Enable counter count up on the falling edge of GTETRGA input."]
5618 pub const _1: Self = Self::new(1);
5619 }
5620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5621 pub struct Usgtrgar_SPEC;
5622 pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
5623 impl Usgtrgar {
5624 #[doc = "Disable counter count up on the rising edge of GTETRGA input"]
5625 pub const _0: Self = Self::new(0);
5626
5627 #[doc = "Enable counter count up on the rising edge of GTETRGA input"]
5628 pub const _1: Self = Self::new(1);
5629 }
5630}
5631#[doc(hidden)]
5632#[derive(Copy, Clone, Eq, PartialEq)]
5633pub struct Gtdnsr_SPEC;
5634impl crate::sealed::RegSpec for Gtdnsr_SPEC {
5635 type DataType = u32;
5636}
5637
5638#[doc = "General PWM Timer Down Count Source Select Register"]
5639pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
5640
5641impl Gtdnsr {
5642 #[doc = "ELC_GPTH Event Source Counter Count Down Enable"]
5643 #[inline(always)]
5644 pub fn dselch(
5645 self,
5646 ) -> crate::common::RegisterField<
5647 23,
5648 0x1,
5649 1,
5650 0,
5651 gtdnsr::Dselch,
5652 gtdnsr::Dselch,
5653 Gtdnsr_SPEC,
5654 crate::common::RW,
5655 > {
5656 crate::common::RegisterField::<
5657 23,
5658 0x1,
5659 1,
5660 0,
5661 gtdnsr::Dselch,
5662 gtdnsr::Dselch,
5663 Gtdnsr_SPEC,
5664 crate::common::RW,
5665 >::from_register(self, 0)
5666 }
5667
5668 #[doc = "ELC_GPTG Event Source Counter Count Down Enable"]
5669 #[inline(always)]
5670 pub fn dselcg(
5671 self,
5672 ) -> crate::common::RegisterField<
5673 22,
5674 0x1,
5675 1,
5676 0,
5677 gtdnsr::Dselcg,
5678 gtdnsr::Dselcg,
5679 Gtdnsr_SPEC,
5680 crate::common::RW,
5681 > {
5682 crate::common::RegisterField::<
5683 22,
5684 0x1,
5685 1,
5686 0,
5687 gtdnsr::Dselcg,
5688 gtdnsr::Dselcg,
5689 Gtdnsr_SPEC,
5690 crate::common::RW,
5691 >::from_register(self, 0)
5692 }
5693
5694 #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5695 #[inline(always)]
5696 pub fn dselcf(
5697 self,
5698 ) -> crate::common::RegisterField<
5699 21,
5700 0x1,
5701 1,
5702 0,
5703 gtdnsr::Dselcf,
5704 gtdnsr::Dselcf,
5705 Gtdnsr_SPEC,
5706 crate::common::RW,
5707 > {
5708 crate::common::RegisterField::<
5709 21,
5710 0x1,
5711 1,
5712 0,
5713 gtdnsr::Dselcf,
5714 gtdnsr::Dselcf,
5715 Gtdnsr_SPEC,
5716 crate::common::RW,
5717 >::from_register(self, 0)
5718 }
5719
5720 #[doc = "ELC_GPTE Event Source Counter Count Down Enable"]
5721 #[inline(always)]
5722 pub fn dselce(
5723 self,
5724 ) -> crate::common::RegisterField<
5725 20,
5726 0x1,
5727 1,
5728 0,
5729 gtdnsr::Dselce,
5730 gtdnsr::Dselce,
5731 Gtdnsr_SPEC,
5732 crate::common::RW,
5733 > {
5734 crate::common::RegisterField::<
5735 20,
5736 0x1,
5737 1,
5738 0,
5739 gtdnsr::Dselce,
5740 gtdnsr::Dselce,
5741 Gtdnsr_SPEC,
5742 crate::common::RW,
5743 >::from_register(self, 0)
5744 }
5745
5746 #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
5747 #[inline(always)]
5748 pub fn dselcd(
5749 self,
5750 ) -> crate::common::RegisterField<
5751 19,
5752 0x1,
5753 1,
5754 0,
5755 gtdnsr::Dselcd,
5756 gtdnsr::Dselcd,
5757 Gtdnsr_SPEC,
5758 crate::common::RW,
5759 > {
5760 crate::common::RegisterField::<
5761 19,
5762 0x1,
5763 1,
5764 0,
5765 gtdnsr::Dselcd,
5766 gtdnsr::Dselcd,
5767 Gtdnsr_SPEC,
5768 crate::common::RW,
5769 >::from_register(self, 0)
5770 }
5771
5772 #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
5773 #[inline(always)]
5774 pub fn dselcc(
5775 self,
5776 ) -> crate::common::RegisterField<
5777 18,
5778 0x1,
5779 1,
5780 0,
5781 gtdnsr::Dselcc,
5782 gtdnsr::Dselcc,
5783 Gtdnsr_SPEC,
5784 crate::common::RW,
5785 > {
5786 crate::common::RegisterField::<
5787 18,
5788 0x1,
5789 1,
5790 0,
5791 gtdnsr::Dselcc,
5792 gtdnsr::Dselcc,
5793 Gtdnsr_SPEC,
5794 crate::common::RW,
5795 >::from_register(self, 0)
5796 }
5797
5798 #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
5799 #[inline(always)]
5800 pub fn dselcb(
5801 self,
5802 ) -> crate::common::RegisterField<
5803 17,
5804 0x1,
5805 1,
5806 0,
5807 gtdnsr::Dselcb,
5808 gtdnsr::Dselcb,
5809 Gtdnsr_SPEC,
5810 crate::common::RW,
5811 > {
5812 crate::common::RegisterField::<
5813 17,
5814 0x1,
5815 1,
5816 0,
5817 gtdnsr::Dselcb,
5818 gtdnsr::Dselcb,
5819 Gtdnsr_SPEC,
5820 crate::common::RW,
5821 >::from_register(self, 0)
5822 }
5823
5824 #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
5825 #[inline(always)]
5826 pub fn dselca(
5827 self,
5828 ) -> crate::common::RegisterField<
5829 16,
5830 0x1,
5831 1,
5832 0,
5833 gtdnsr::Dselca,
5834 gtdnsr::Dselca,
5835 Gtdnsr_SPEC,
5836 crate::common::RW,
5837 > {
5838 crate::common::RegisterField::<
5839 16,
5840 0x1,
5841 1,
5842 0,
5843 gtdnsr::Dselca,
5844 gtdnsr::Dselca,
5845 Gtdnsr_SPEC,
5846 crate::common::RW,
5847 >::from_register(self, 0)
5848 }
5849
5850 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable"]
5851 #[inline(always)]
5852 pub fn dscbfah(
5853 self,
5854 ) -> crate::common::RegisterField<
5855 15,
5856 0x1,
5857 1,
5858 0,
5859 gtdnsr::Dscbfah,
5860 gtdnsr::Dscbfah,
5861 Gtdnsr_SPEC,
5862 crate::common::RW,
5863 > {
5864 crate::common::RegisterField::<
5865 15,
5866 0x1,
5867 1,
5868 0,
5869 gtdnsr::Dscbfah,
5870 gtdnsr::Dscbfah,
5871 Gtdnsr_SPEC,
5872 crate::common::RW,
5873 >::from_register(self, 0)
5874 }
5875
5876 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable"]
5877 #[inline(always)]
5878 pub fn dscbfal(
5879 self,
5880 ) -> crate::common::RegisterField<
5881 14,
5882 0x1,
5883 1,
5884 0,
5885 gtdnsr::Dscbfal,
5886 gtdnsr::Dscbfal,
5887 Gtdnsr_SPEC,
5888 crate::common::RW,
5889 > {
5890 crate::common::RegisterField::<
5891 14,
5892 0x1,
5893 1,
5894 0,
5895 gtdnsr::Dscbfal,
5896 gtdnsr::Dscbfal,
5897 Gtdnsr_SPEC,
5898 crate::common::RW,
5899 >::from_register(self, 0)
5900 }
5901
5902 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable"]
5903 #[inline(always)]
5904 pub fn dscbrah(
5905 self,
5906 ) -> crate::common::RegisterField<
5907 13,
5908 0x1,
5909 1,
5910 0,
5911 gtdnsr::Dscbrah,
5912 gtdnsr::Dscbrah,
5913 Gtdnsr_SPEC,
5914 crate::common::RW,
5915 > {
5916 crate::common::RegisterField::<
5917 13,
5918 0x1,
5919 1,
5920 0,
5921 gtdnsr::Dscbrah,
5922 gtdnsr::Dscbrah,
5923 Gtdnsr_SPEC,
5924 crate::common::RW,
5925 >::from_register(self, 0)
5926 }
5927
5928 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable"]
5929 #[inline(always)]
5930 pub fn dscbral(
5931 self,
5932 ) -> crate::common::RegisterField<
5933 12,
5934 0x1,
5935 1,
5936 0,
5937 gtdnsr::Dscbral,
5938 gtdnsr::Dscbral,
5939 Gtdnsr_SPEC,
5940 crate::common::RW,
5941 > {
5942 crate::common::RegisterField::<
5943 12,
5944 0x1,
5945 1,
5946 0,
5947 gtdnsr::Dscbral,
5948 gtdnsr::Dscbral,
5949 Gtdnsr_SPEC,
5950 crate::common::RW,
5951 >::from_register(self, 0)
5952 }
5953
5954 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable"]
5955 #[inline(always)]
5956 pub fn dscafbh(
5957 self,
5958 ) -> crate::common::RegisterField<
5959 11,
5960 0x1,
5961 1,
5962 0,
5963 gtdnsr::Dscafbh,
5964 gtdnsr::Dscafbh,
5965 Gtdnsr_SPEC,
5966 crate::common::RW,
5967 > {
5968 crate::common::RegisterField::<
5969 11,
5970 0x1,
5971 1,
5972 0,
5973 gtdnsr::Dscafbh,
5974 gtdnsr::Dscafbh,
5975 Gtdnsr_SPEC,
5976 crate::common::RW,
5977 >::from_register(self, 0)
5978 }
5979
5980 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable"]
5981 #[inline(always)]
5982 pub fn dscafbl(
5983 self,
5984 ) -> crate::common::RegisterField<
5985 10,
5986 0x1,
5987 1,
5988 0,
5989 gtdnsr::Dscafbl,
5990 gtdnsr::Dscafbl,
5991 Gtdnsr_SPEC,
5992 crate::common::RW,
5993 > {
5994 crate::common::RegisterField::<
5995 10,
5996 0x1,
5997 1,
5998 0,
5999 gtdnsr::Dscafbl,
6000 gtdnsr::Dscafbl,
6001 Gtdnsr_SPEC,
6002 crate::common::RW,
6003 >::from_register(self, 0)
6004 }
6005
6006 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable"]
6007 #[inline(always)]
6008 pub fn dscarbh(
6009 self,
6010 ) -> crate::common::RegisterField<
6011 9,
6012 0x1,
6013 1,
6014 0,
6015 gtdnsr::Dscarbh,
6016 gtdnsr::Dscarbh,
6017 Gtdnsr_SPEC,
6018 crate::common::RW,
6019 > {
6020 crate::common::RegisterField::<
6021 9,
6022 0x1,
6023 1,
6024 0,
6025 gtdnsr::Dscarbh,
6026 gtdnsr::Dscarbh,
6027 Gtdnsr_SPEC,
6028 crate::common::RW,
6029 >::from_register(self, 0)
6030 }
6031
6032 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable"]
6033 #[inline(always)]
6034 pub fn dscarbl(
6035 self,
6036 ) -> crate::common::RegisterField<
6037 8,
6038 0x1,
6039 1,
6040 0,
6041 gtdnsr::Dscarbl,
6042 gtdnsr::Dscarbl,
6043 Gtdnsr_SPEC,
6044 crate::common::RW,
6045 > {
6046 crate::common::RegisterField::<
6047 8,
6048 0x1,
6049 1,
6050 0,
6051 gtdnsr::Dscarbl,
6052 gtdnsr::Dscarbl,
6053 Gtdnsr_SPEC,
6054 crate::common::RW,
6055 >::from_register(self, 0)
6056 }
6057
6058 #[doc = "GTETRGD Pin Falling Input Source Counter Count Down Enable"]
6059 #[inline(always)]
6060 pub fn dsgtrgdf(
6061 self,
6062 ) -> crate::common::RegisterField<
6063 7,
6064 0x1,
6065 1,
6066 0,
6067 gtdnsr::Dsgtrgdf,
6068 gtdnsr::Dsgtrgdf,
6069 Gtdnsr_SPEC,
6070 crate::common::RW,
6071 > {
6072 crate::common::RegisterField::<
6073 7,
6074 0x1,
6075 1,
6076 0,
6077 gtdnsr::Dsgtrgdf,
6078 gtdnsr::Dsgtrgdf,
6079 Gtdnsr_SPEC,
6080 crate::common::RW,
6081 >::from_register(self, 0)
6082 }
6083
6084 #[doc = "GTETRGD Pin Rising Input Source Counter Count Down Enable"]
6085 #[inline(always)]
6086 pub fn dsgtrgdr(
6087 self,
6088 ) -> crate::common::RegisterField<
6089 6,
6090 0x1,
6091 1,
6092 0,
6093 gtdnsr::Dsgtrgdr,
6094 gtdnsr::Dsgtrgdr,
6095 Gtdnsr_SPEC,
6096 crate::common::RW,
6097 > {
6098 crate::common::RegisterField::<
6099 6,
6100 0x1,
6101 1,
6102 0,
6103 gtdnsr::Dsgtrgdr,
6104 gtdnsr::Dsgtrgdr,
6105 Gtdnsr_SPEC,
6106 crate::common::RW,
6107 >::from_register(self, 0)
6108 }
6109
6110 #[doc = "GTETRGC Pin Falling Input Source Counter Count Down Enable"]
6111 #[inline(always)]
6112 pub fn dsgtrgcf(
6113 self,
6114 ) -> crate::common::RegisterField<
6115 5,
6116 0x1,
6117 1,
6118 0,
6119 gtdnsr::Dsgtrgcf,
6120 gtdnsr::Dsgtrgcf,
6121 Gtdnsr_SPEC,
6122 crate::common::RW,
6123 > {
6124 crate::common::RegisterField::<
6125 5,
6126 0x1,
6127 1,
6128 0,
6129 gtdnsr::Dsgtrgcf,
6130 gtdnsr::Dsgtrgcf,
6131 Gtdnsr_SPEC,
6132 crate::common::RW,
6133 >::from_register(self, 0)
6134 }
6135
6136 #[doc = "GTETRGC Pin Rising Input Source Counter Count Down Enable"]
6137 #[inline(always)]
6138 pub fn dsgtrgcr(
6139 self,
6140 ) -> crate::common::RegisterField<
6141 4,
6142 0x1,
6143 1,
6144 0,
6145 gtdnsr::Dsgtrgcr,
6146 gtdnsr::Dsgtrgcr,
6147 Gtdnsr_SPEC,
6148 crate::common::RW,
6149 > {
6150 crate::common::RegisterField::<
6151 4,
6152 0x1,
6153 1,
6154 0,
6155 gtdnsr::Dsgtrgcr,
6156 gtdnsr::Dsgtrgcr,
6157 Gtdnsr_SPEC,
6158 crate::common::RW,
6159 >::from_register(self, 0)
6160 }
6161
6162 #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
6163 #[inline(always)]
6164 pub fn dsgtrgbf(
6165 self,
6166 ) -> crate::common::RegisterField<
6167 3,
6168 0x1,
6169 1,
6170 0,
6171 gtdnsr::Dsgtrgbf,
6172 gtdnsr::Dsgtrgbf,
6173 Gtdnsr_SPEC,
6174 crate::common::RW,
6175 > {
6176 crate::common::RegisterField::<
6177 3,
6178 0x1,
6179 1,
6180 0,
6181 gtdnsr::Dsgtrgbf,
6182 gtdnsr::Dsgtrgbf,
6183 Gtdnsr_SPEC,
6184 crate::common::RW,
6185 >::from_register(self, 0)
6186 }
6187
6188 #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
6189 #[inline(always)]
6190 pub fn dsgtrgbr(
6191 self,
6192 ) -> crate::common::RegisterField<
6193 2,
6194 0x1,
6195 1,
6196 0,
6197 gtdnsr::Dsgtrgbr,
6198 gtdnsr::Dsgtrgbr,
6199 Gtdnsr_SPEC,
6200 crate::common::RW,
6201 > {
6202 crate::common::RegisterField::<
6203 2,
6204 0x1,
6205 1,
6206 0,
6207 gtdnsr::Dsgtrgbr,
6208 gtdnsr::Dsgtrgbr,
6209 Gtdnsr_SPEC,
6210 crate::common::RW,
6211 >::from_register(self, 0)
6212 }
6213
6214 #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
6215 #[inline(always)]
6216 pub fn dsgtrgaf(
6217 self,
6218 ) -> crate::common::RegisterField<
6219 1,
6220 0x1,
6221 1,
6222 0,
6223 gtdnsr::Dsgtrgaf,
6224 gtdnsr::Dsgtrgaf,
6225 Gtdnsr_SPEC,
6226 crate::common::RW,
6227 > {
6228 crate::common::RegisterField::<
6229 1,
6230 0x1,
6231 1,
6232 0,
6233 gtdnsr::Dsgtrgaf,
6234 gtdnsr::Dsgtrgaf,
6235 Gtdnsr_SPEC,
6236 crate::common::RW,
6237 >::from_register(self, 0)
6238 }
6239
6240 #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
6241 #[inline(always)]
6242 pub fn dsgtrgar(
6243 self,
6244 ) -> crate::common::RegisterField<
6245 0,
6246 0x1,
6247 1,
6248 0,
6249 gtdnsr::Dsgtrgar,
6250 gtdnsr::Dsgtrgar,
6251 Gtdnsr_SPEC,
6252 crate::common::RW,
6253 > {
6254 crate::common::RegisterField::<
6255 0,
6256 0x1,
6257 1,
6258 0,
6259 gtdnsr::Dsgtrgar,
6260 gtdnsr::Dsgtrgar,
6261 Gtdnsr_SPEC,
6262 crate::common::RW,
6263 >::from_register(self, 0)
6264 }
6265}
6266impl ::core::default::Default for Gtdnsr {
6267 #[inline(always)]
6268 fn default() -> Gtdnsr {
6269 <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
6270 }
6271}
6272pub mod gtdnsr {
6273
6274 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6275 pub struct Dselch_SPEC;
6276 pub type Dselch = crate::EnumBitfieldStruct<u8, Dselch_SPEC>;
6277 impl Dselch {
6278 #[doc = "Disable counter count down on ELC_GPTH input"]
6279 pub const _0: Self = Self::new(0);
6280
6281 #[doc = "Enable counter count down on ELC_GPTH input."]
6282 pub const _1: Self = Self::new(1);
6283 }
6284 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6285 pub struct Dselcg_SPEC;
6286 pub type Dselcg = crate::EnumBitfieldStruct<u8, Dselcg_SPEC>;
6287 impl Dselcg {
6288 #[doc = "Disable counter count down on ELC_GPTG input"]
6289 pub const _0: Self = Self::new(0);
6290
6291 #[doc = "Enable counter count down on ELC_GPTG input."]
6292 pub const _1: Self = Self::new(1);
6293 }
6294 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6295 pub struct Dselcf_SPEC;
6296 pub type Dselcf = crate::EnumBitfieldStruct<u8, Dselcf_SPEC>;
6297 impl Dselcf {
6298 #[doc = "Disable counter count down on ELC_GPTF input"]
6299 pub const _0: Self = Self::new(0);
6300
6301 #[doc = "Enable counter count down on ELC_GPTF input."]
6302 pub const _1: Self = Self::new(1);
6303 }
6304 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6305 pub struct Dselce_SPEC;
6306 pub type Dselce = crate::EnumBitfieldStruct<u8, Dselce_SPEC>;
6307 impl Dselce {
6308 #[doc = "Disable counter count down on ELC_GPTE input"]
6309 pub const _0: Self = Self::new(0);
6310
6311 #[doc = "Enable counter count down on ELC_GPTE input."]
6312 pub const _1: Self = Self::new(1);
6313 }
6314 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6315 pub struct Dselcd_SPEC;
6316 pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
6317 impl Dselcd {
6318 #[doc = "Disable counter count down on ELC_GPTD input"]
6319 pub const _0: Self = Self::new(0);
6320
6321 #[doc = "Enable counter count down on ELC_GPTD input."]
6322 pub const _1: Self = Self::new(1);
6323 }
6324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6325 pub struct Dselcc_SPEC;
6326 pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
6327 impl Dselcc {
6328 #[doc = "Disable counter count down on ELC_GPTC input"]
6329 pub const _0: Self = Self::new(0);
6330
6331 #[doc = "Enable counter count down on ELC_GPTC input."]
6332 pub const _1: Self = Self::new(1);
6333 }
6334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6335 pub struct Dselcb_SPEC;
6336 pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
6337 impl Dselcb {
6338 #[doc = "Disable counter count down on ELC_GPTB input"]
6339 pub const _0: Self = Self::new(0);
6340
6341 #[doc = "Enable counter count down on ELC_GPTB input."]
6342 pub const _1: Self = Self::new(1);
6343 }
6344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6345 pub struct Dselca_SPEC;
6346 pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
6347 impl Dselca {
6348 #[doc = "Disable counter count down on ELC_GPTA input"]
6349 pub const _0: Self = Self::new(0);
6350
6351 #[doc = "Enable counter count down on ELC_GPTA input."]
6352 pub const _1: Self = Self::new(1);
6353 }
6354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6355 pub struct Dscbfah_SPEC;
6356 pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
6357 impl Dscbfah {
6358 #[doc = "Disable counter count down on the falling edge of GTIOCB input when GTIOCA input is 1"]
6359 pub const _0: Self = Self::new(0);
6360
6361 #[doc = "Enable counter count down on the falling edge of GTIOCB input when GTIOCA input is 1."]
6362 pub const _1: Self = Self::new(1);
6363 }
6364 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6365 pub struct Dscbfal_SPEC;
6366 pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
6367 impl Dscbfal {
6368 #[doc = "Disable counter count down on the falling edge of GTIOCB input when GTIOCA input is 0"]
6369 pub const _0: Self = Self::new(0);
6370
6371 #[doc = "Enable counter count down on the falling edge of GTIOCB input when GTIOCA input is 0."]
6372 pub const _1: Self = Self::new(1);
6373 }
6374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6375 pub struct Dscbrah_SPEC;
6376 pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
6377 impl Dscbrah {
6378 #[doc = "Disable counter count down on the rising edge of GTIOCB input when GTIOCA input is 1"]
6379 pub const _0: Self = Self::new(0);
6380
6381 #[doc = "Enable counter count down on the rising edge of GTIOCB input when GTIOCA input is 1."]
6382 pub const _1: Self = Self::new(1);
6383 }
6384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6385 pub struct Dscbral_SPEC;
6386 pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
6387 impl Dscbral {
6388 #[doc = "Disable counter count down on the rising edge of GTIOCB input when GTIOCA input is 0"]
6389 pub const _0: Self = Self::new(0);
6390
6391 #[doc = "Enable counter count down on the rising edge of GTIOCB input when GTIOCA input is 0."]
6392 pub const _1: Self = Self::new(1);
6393 }
6394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6395 pub struct Dscafbh_SPEC;
6396 pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
6397 impl Dscafbh {
6398 #[doc = "Disable counter count down on the falling edge of GTIOCA input when GTIOCB input is 1"]
6399 pub const _0: Self = Self::new(0);
6400
6401 #[doc = "Enable counter count down on the falling edge of GTIOCA input when GTIOCB input is 1."]
6402 pub const _1: Self = Self::new(1);
6403 }
6404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6405 pub struct Dscafbl_SPEC;
6406 pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
6407 impl Dscafbl {
6408 #[doc = "Disable counter count down on the falling edge of GTIOCA input when GTIOCB input is 0"]
6409 pub const _0: Self = Self::new(0);
6410
6411 #[doc = "Enable counter count down on the falling edge of GTIOCA input when GTIOCB input is 0"]
6412 pub const _1: Self = Self::new(1);
6413 }
6414 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6415 pub struct Dscarbh_SPEC;
6416 pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
6417 impl Dscarbh {
6418 #[doc = "Disable counter count down on the rising edge of GTIOCA input when GTIOCB input is 1"]
6419 pub const _0: Self = Self::new(0);
6420
6421 #[doc = "Enable counter count down on the rising edge of GTIOCA input when GTIOCB input is 1."]
6422 pub const _1: Self = Self::new(1);
6423 }
6424 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6425 pub struct Dscarbl_SPEC;
6426 pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
6427 impl Dscarbl {
6428 #[doc = "Disable counter count down on the rising edge of GTIOCA input when GTIOCB input is 0"]
6429 pub const _0: Self = Self::new(0);
6430
6431 #[doc = "Enable counter count down on the rising edge of GTIOCA input when GTIOCB input is 0."]
6432 pub const _1: Self = Self::new(1);
6433 }
6434 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6435 pub struct Dsgtrgdf_SPEC;
6436 pub type Dsgtrgdf = crate::EnumBitfieldStruct<u8, Dsgtrgdf_SPEC>;
6437 impl Dsgtrgdf {
6438 #[doc = "Disable counter count down on the falling edge of GTETRGD input"]
6439 pub const _0: Self = Self::new(0);
6440
6441 #[doc = "Enable counter count down on the falling edge of GTETRGD input."]
6442 pub const _1: Self = Self::new(1);
6443 }
6444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6445 pub struct Dsgtrgdr_SPEC;
6446 pub type Dsgtrgdr = crate::EnumBitfieldStruct<u8, Dsgtrgdr_SPEC>;
6447 impl Dsgtrgdr {
6448 #[doc = "Disable counter count down on the rising edge of GTETRGD input"]
6449 pub const _0: Self = Self::new(0);
6450
6451 #[doc = "Enable counter count down on the rising edge of GTETRGD input."]
6452 pub const _1: Self = Self::new(1);
6453 }
6454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6455 pub struct Dsgtrgcf_SPEC;
6456 pub type Dsgtrgcf = crate::EnumBitfieldStruct<u8, Dsgtrgcf_SPEC>;
6457 impl Dsgtrgcf {
6458 #[doc = "Disable counter count down on the falling edge of GTETRGC input"]
6459 pub const _0: Self = Self::new(0);
6460
6461 #[doc = "Enable counter count down on the falling edge of GTETRGC input."]
6462 pub const _1: Self = Self::new(1);
6463 }
6464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6465 pub struct Dsgtrgcr_SPEC;
6466 pub type Dsgtrgcr = crate::EnumBitfieldStruct<u8, Dsgtrgcr_SPEC>;
6467 impl Dsgtrgcr {
6468 #[doc = "Disable counter count down on the rising edge of GTETRGC input"]
6469 pub const _0: Self = Self::new(0);
6470
6471 #[doc = "Enable counter count down on the rising edge of GTETRGC input"]
6472 pub const _1: Self = Self::new(1);
6473 }
6474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6475 pub struct Dsgtrgbf_SPEC;
6476 pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
6477 impl Dsgtrgbf {
6478 #[doc = "Disable counter count down on the falling edge of GTETRGB input"]
6479 pub const _0: Self = Self::new(0);
6480
6481 #[doc = "Enable counter count down on the falling edge of GTETRGB input."]
6482 pub const _1: Self = Self::new(1);
6483 }
6484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6485 pub struct Dsgtrgbr_SPEC;
6486 pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
6487 impl Dsgtrgbr {
6488 #[doc = "Disable counter count down on the rising edge of GTETRGB input"]
6489 pub const _0: Self = Self::new(0);
6490
6491 #[doc = "Enable counter count down on the rising edge of GTETRGB input."]
6492 pub const _1: Self = Self::new(1);
6493 }
6494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6495 pub struct Dsgtrgaf_SPEC;
6496 pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
6497 impl Dsgtrgaf {
6498 #[doc = "Disable counter count down on the falling edge of GTETRGA input"]
6499 pub const _0: Self = Self::new(0);
6500
6501 #[doc = "Enable counter count down on the falling edge of GTETRGA input."]
6502 pub const _1: Self = Self::new(1);
6503 }
6504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6505 pub struct Dsgtrgar_SPEC;
6506 pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
6507 impl Dsgtrgar {
6508 #[doc = "Disable counter count down on the rising edge of GTETRGA input"]
6509 pub const _0: Self = Self::new(0);
6510
6511 #[doc = "Enable counter count down on the rising edge of GTETRGA input"]
6512 pub const _1: Self = Self::new(1);
6513 }
6514}
6515#[doc(hidden)]
6516#[derive(Copy, Clone, Eq, PartialEq)]
6517pub struct Gticasr_SPEC;
6518impl crate::sealed::RegSpec for Gticasr_SPEC {
6519 type DataType = u32;
6520}
6521
6522#[doc = "General PWM Timer Input Capture Source Select Register A"]
6523pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
6524
6525impl Gticasr {
6526 #[doc = "ELC_GPTH Event Source GTCCRA Input Capture Enable"]
6527 #[inline(always)]
6528 pub fn aselch(
6529 self,
6530 ) -> crate::common::RegisterField<
6531 23,
6532 0x1,
6533 1,
6534 0,
6535 gticasr::Aselch,
6536 gticasr::Aselch,
6537 Gticasr_SPEC,
6538 crate::common::RW,
6539 > {
6540 crate::common::RegisterField::<
6541 23,
6542 0x1,
6543 1,
6544 0,
6545 gticasr::Aselch,
6546 gticasr::Aselch,
6547 Gticasr_SPEC,
6548 crate::common::RW,
6549 >::from_register(self, 0)
6550 }
6551
6552 #[doc = "ELC_GPTG Event Source GTCCRA Input Capture Enable"]
6553 #[inline(always)]
6554 pub fn aselcg(
6555 self,
6556 ) -> crate::common::RegisterField<
6557 22,
6558 0x1,
6559 1,
6560 0,
6561 gticasr::Aselcg,
6562 gticasr::Aselcg,
6563 Gticasr_SPEC,
6564 crate::common::RW,
6565 > {
6566 crate::common::RegisterField::<
6567 22,
6568 0x1,
6569 1,
6570 0,
6571 gticasr::Aselcg,
6572 gticasr::Aselcg,
6573 Gticasr_SPEC,
6574 crate::common::RW,
6575 >::from_register(self, 0)
6576 }
6577
6578 #[doc = "ELC_GPTF Event Source GTCCRA Input Capture Enable"]
6579 #[inline(always)]
6580 pub fn aselcf(
6581 self,
6582 ) -> crate::common::RegisterField<
6583 21,
6584 0x1,
6585 1,
6586 0,
6587 gticasr::Aselcf,
6588 gticasr::Aselcf,
6589 Gticasr_SPEC,
6590 crate::common::RW,
6591 > {
6592 crate::common::RegisterField::<
6593 21,
6594 0x1,
6595 1,
6596 0,
6597 gticasr::Aselcf,
6598 gticasr::Aselcf,
6599 Gticasr_SPEC,
6600 crate::common::RW,
6601 >::from_register(self, 0)
6602 }
6603
6604 #[doc = "ELC_GPTE Event Source GTCCRA Input Capture Enable"]
6605 #[inline(always)]
6606 pub fn aselce(
6607 self,
6608 ) -> crate::common::RegisterField<
6609 20,
6610 0x1,
6611 1,
6612 0,
6613 gticasr::Aselce,
6614 gticasr::Aselce,
6615 Gticasr_SPEC,
6616 crate::common::RW,
6617 > {
6618 crate::common::RegisterField::<
6619 20,
6620 0x1,
6621 1,
6622 0,
6623 gticasr::Aselce,
6624 gticasr::Aselce,
6625 Gticasr_SPEC,
6626 crate::common::RW,
6627 >::from_register(self, 0)
6628 }
6629
6630 #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
6631 #[inline(always)]
6632 pub fn aselcd(
6633 self,
6634 ) -> crate::common::RegisterField<
6635 19,
6636 0x1,
6637 1,
6638 0,
6639 gticasr::Aselcd,
6640 gticasr::Aselcd,
6641 Gticasr_SPEC,
6642 crate::common::RW,
6643 > {
6644 crate::common::RegisterField::<
6645 19,
6646 0x1,
6647 1,
6648 0,
6649 gticasr::Aselcd,
6650 gticasr::Aselcd,
6651 Gticasr_SPEC,
6652 crate::common::RW,
6653 >::from_register(self, 0)
6654 }
6655
6656 #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
6657 #[inline(always)]
6658 pub fn aselcc(
6659 self,
6660 ) -> crate::common::RegisterField<
6661 18,
6662 0x1,
6663 1,
6664 0,
6665 gticasr::Aselcc,
6666 gticasr::Aselcc,
6667 Gticasr_SPEC,
6668 crate::common::RW,
6669 > {
6670 crate::common::RegisterField::<
6671 18,
6672 0x1,
6673 1,
6674 0,
6675 gticasr::Aselcc,
6676 gticasr::Aselcc,
6677 Gticasr_SPEC,
6678 crate::common::RW,
6679 >::from_register(self, 0)
6680 }
6681
6682 #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
6683 #[inline(always)]
6684 pub fn aselcb(
6685 self,
6686 ) -> crate::common::RegisterField<
6687 17,
6688 0x1,
6689 1,
6690 0,
6691 gticasr::Aselcb,
6692 gticasr::Aselcb,
6693 Gticasr_SPEC,
6694 crate::common::RW,
6695 > {
6696 crate::common::RegisterField::<
6697 17,
6698 0x1,
6699 1,
6700 0,
6701 gticasr::Aselcb,
6702 gticasr::Aselcb,
6703 Gticasr_SPEC,
6704 crate::common::RW,
6705 >::from_register(self, 0)
6706 }
6707
6708 #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
6709 #[inline(always)]
6710 pub fn aselca(
6711 self,
6712 ) -> crate::common::RegisterField<
6713 16,
6714 0x1,
6715 1,
6716 0,
6717 gticasr::Aselca,
6718 gticasr::Aselca,
6719 Gticasr_SPEC,
6720 crate::common::RW,
6721 > {
6722 crate::common::RegisterField::<
6723 16,
6724 0x1,
6725 1,
6726 0,
6727 gticasr::Aselca,
6728 gticasr::Aselca,
6729 Gticasr_SPEC,
6730 crate::common::RW,
6731 >::from_register(self, 0)
6732 }
6733
6734 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable"]
6735 #[inline(always)]
6736 pub fn ascbfah(
6737 self,
6738 ) -> crate::common::RegisterField<
6739 15,
6740 0x1,
6741 1,
6742 0,
6743 gticasr::Ascbfah,
6744 gticasr::Ascbfah,
6745 Gticasr_SPEC,
6746 crate::common::RW,
6747 > {
6748 crate::common::RegisterField::<
6749 15,
6750 0x1,
6751 1,
6752 0,
6753 gticasr::Ascbfah,
6754 gticasr::Ascbfah,
6755 Gticasr_SPEC,
6756 crate::common::RW,
6757 >::from_register(self, 0)
6758 }
6759
6760 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable"]
6761 #[inline(always)]
6762 pub fn ascbfal(
6763 self,
6764 ) -> crate::common::RegisterField<
6765 14,
6766 0x1,
6767 1,
6768 0,
6769 gticasr::Ascbfal,
6770 gticasr::Ascbfal,
6771 Gticasr_SPEC,
6772 crate::common::RW,
6773 > {
6774 crate::common::RegisterField::<
6775 14,
6776 0x1,
6777 1,
6778 0,
6779 gticasr::Ascbfal,
6780 gticasr::Ascbfal,
6781 Gticasr_SPEC,
6782 crate::common::RW,
6783 >::from_register(self, 0)
6784 }
6785
6786 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable"]
6787 #[inline(always)]
6788 pub fn ascbrah(
6789 self,
6790 ) -> crate::common::RegisterField<
6791 13,
6792 0x1,
6793 1,
6794 0,
6795 gticasr::Ascbrah,
6796 gticasr::Ascbrah,
6797 Gticasr_SPEC,
6798 crate::common::RW,
6799 > {
6800 crate::common::RegisterField::<
6801 13,
6802 0x1,
6803 1,
6804 0,
6805 gticasr::Ascbrah,
6806 gticasr::Ascbrah,
6807 Gticasr_SPEC,
6808 crate::common::RW,
6809 >::from_register(self, 0)
6810 }
6811
6812 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable"]
6813 #[inline(always)]
6814 pub fn ascbral(
6815 self,
6816 ) -> crate::common::RegisterField<
6817 12,
6818 0x1,
6819 1,
6820 0,
6821 gticasr::Ascbral,
6822 gticasr::Ascbral,
6823 Gticasr_SPEC,
6824 crate::common::RW,
6825 > {
6826 crate::common::RegisterField::<
6827 12,
6828 0x1,
6829 1,
6830 0,
6831 gticasr::Ascbral,
6832 gticasr::Ascbral,
6833 Gticasr_SPEC,
6834 crate::common::RW,
6835 >::from_register(self, 0)
6836 }
6837
6838 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable"]
6839 #[inline(always)]
6840 pub fn ascafbh(
6841 self,
6842 ) -> crate::common::RegisterField<
6843 11,
6844 0x1,
6845 1,
6846 0,
6847 gticasr::Ascafbh,
6848 gticasr::Ascafbh,
6849 Gticasr_SPEC,
6850 crate::common::RW,
6851 > {
6852 crate::common::RegisterField::<
6853 11,
6854 0x1,
6855 1,
6856 0,
6857 gticasr::Ascafbh,
6858 gticasr::Ascafbh,
6859 Gticasr_SPEC,
6860 crate::common::RW,
6861 >::from_register(self, 0)
6862 }
6863
6864 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable"]
6865 #[inline(always)]
6866 pub fn ascafbl(
6867 self,
6868 ) -> crate::common::RegisterField<
6869 10,
6870 0x1,
6871 1,
6872 0,
6873 gticasr::Ascafbl,
6874 gticasr::Ascafbl,
6875 Gticasr_SPEC,
6876 crate::common::RW,
6877 > {
6878 crate::common::RegisterField::<
6879 10,
6880 0x1,
6881 1,
6882 0,
6883 gticasr::Ascafbl,
6884 gticasr::Ascafbl,
6885 Gticasr_SPEC,
6886 crate::common::RW,
6887 >::from_register(self, 0)
6888 }
6889
6890 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable"]
6891 #[inline(always)]
6892 pub fn ascarbh(
6893 self,
6894 ) -> crate::common::RegisterField<
6895 9,
6896 0x1,
6897 1,
6898 0,
6899 gticasr::Ascarbh,
6900 gticasr::Ascarbh,
6901 Gticasr_SPEC,
6902 crate::common::RW,
6903 > {
6904 crate::common::RegisterField::<
6905 9,
6906 0x1,
6907 1,
6908 0,
6909 gticasr::Ascarbh,
6910 gticasr::Ascarbh,
6911 Gticasr_SPEC,
6912 crate::common::RW,
6913 >::from_register(self, 0)
6914 }
6915
6916 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable"]
6917 #[inline(always)]
6918 pub fn ascarbl(
6919 self,
6920 ) -> crate::common::RegisterField<
6921 8,
6922 0x1,
6923 1,
6924 0,
6925 gticasr::Ascarbl,
6926 gticasr::Ascarbl,
6927 Gticasr_SPEC,
6928 crate::common::RW,
6929 > {
6930 crate::common::RegisterField::<
6931 8,
6932 0x1,
6933 1,
6934 0,
6935 gticasr::Ascarbl,
6936 gticasr::Ascarbl,
6937 Gticasr_SPEC,
6938 crate::common::RW,
6939 >::from_register(self, 0)
6940 }
6941
6942 #[doc = "GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable"]
6943 #[inline(always)]
6944 pub fn asgtrgdf(
6945 self,
6946 ) -> crate::common::RegisterField<
6947 7,
6948 0x1,
6949 1,
6950 0,
6951 gticasr::Asgtrgdf,
6952 gticasr::Asgtrgdf,
6953 Gticasr_SPEC,
6954 crate::common::RW,
6955 > {
6956 crate::common::RegisterField::<
6957 7,
6958 0x1,
6959 1,
6960 0,
6961 gticasr::Asgtrgdf,
6962 gticasr::Asgtrgdf,
6963 Gticasr_SPEC,
6964 crate::common::RW,
6965 >::from_register(self, 0)
6966 }
6967
6968 #[doc = "GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable"]
6969 #[inline(always)]
6970 pub fn asgtrgdr(
6971 self,
6972 ) -> crate::common::RegisterField<
6973 6,
6974 0x1,
6975 1,
6976 0,
6977 gticasr::Asgtrgdr,
6978 gticasr::Asgtrgdr,
6979 Gticasr_SPEC,
6980 crate::common::RW,
6981 > {
6982 crate::common::RegisterField::<
6983 6,
6984 0x1,
6985 1,
6986 0,
6987 gticasr::Asgtrgdr,
6988 gticasr::Asgtrgdr,
6989 Gticasr_SPEC,
6990 crate::common::RW,
6991 >::from_register(self, 0)
6992 }
6993
6994 #[doc = "GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable"]
6995 #[inline(always)]
6996 pub fn asgtrgcf(
6997 self,
6998 ) -> crate::common::RegisterField<
6999 5,
7000 0x1,
7001 1,
7002 0,
7003 gticasr::Asgtrgcf,
7004 gticasr::Asgtrgcf,
7005 Gticasr_SPEC,
7006 crate::common::RW,
7007 > {
7008 crate::common::RegisterField::<
7009 5,
7010 0x1,
7011 1,
7012 0,
7013 gticasr::Asgtrgcf,
7014 gticasr::Asgtrgcf,
7015 Gticasr_SPEC,
7016 crate::common::RW,
7017 >::from_register(self, 0)
7018 }
7019
7020 #[doc = "GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable"]
7021 #[inline(always)]
7022 pub fn asgtrgcr(
7023 self,
7024 ) -> crate::common::RegisterField<
7025 4,
7026 0x1,
7027 1,
7028 0,
7029 gticasr::Asgtrgcr,
7030 gticasr::Asgtrgcr,
7031 Gticasr_SPEC,
7032 crate::common::RW,
7033 > {
7034 crate::common::RegisterField::<
7035 4,
7036 0x1,
7037 1,
7038 0,
7039 gticasr::Asgtrgcr,
7040 gticasr::Asgtrgcr,
7041 Gticasr_SPEC,
7042 crate::common::RW,
7043 >::from_register(self, 0)
7044 }
7045
7046 #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
7047 #[inline(always)]
7048 pub fn asgtrgbf(
7049 self,
7050 ) -> crate::common::RegisterField<
7051 3,
7052 0x1,
7053 1,
7054 0,
7055 gticasr::Asgtrgbf,
7056 gticasr::Asgtrgbf,
7057 Gticasr_SPEC,
7058 crate::common::RW,
7059 > {
7060 crate::common::RegisterField::<
7061 3,
7062 0x1,
7063 1,
7064 0,
7065 gticasr::Asgtrgbf,
7066 gticasr::Asgtrgbf,
7067 Gticasr_SPEC,
7068 crate::common::RW,
7069 >::from_register(self, 0)
7070 }
7071
7072 #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
7073 #[inline(always)]
7074 pub fn asgtrgbr(
7075 self,
7076 ) -> crate::common::RegisterField<
7077 2,
7078 0x1,
7079 1,
7080 0,
7081 gticasr::Asgtrgbr,
7082 gticasr::Asgtrgbr,
7083 Gticasr_SPEC,
7084 crate::common::RW,
7085 > {
7086 crate::common::RegisterField::<
7087 2,
7088 0x1,
7089 1,
7090 0,
7091 gticasr::Asgtrgbr,
7092 gticasr::Asgtrgbr,
7093 Gticasr_SPEC,
7094 crate::common::RW,
7095 >::from_register(self, 0)
7096 }
7097
7098 #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
7099 #[inline(always)]
7100 pub fn asgtrgaf(
7101 self,
7102 ) -> crate::common::RegisterField<
7103 1,
7104 0x1,
7105 1,
7106 0,
7107 gticasr::Asgtrgaf,
7108 gticasr::Asgtrgaf,
7109 Gticasr_SPEC,
7110 crate::common::RW,
7111 > {
7112 crate::common::RegisterField::<
7113 1,
7114 0x1,
7115 1,
7116 0,
7117 gticasr::Asgtrgaf,
7118 gticasr::Asgtrgaf,
7119 Gticasr_SPEC,
7120 crate::common::RW,
7121 >::from_register(self, 0)
7122 }
7123
7124 #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
7125 #[inline(always)]
7126 pub fn asgtrgar(
7127 self,
7128 ) -> crate::common::RegisterField<
7129 0,
7130 0x1,
7131 1,
7132 0,
7133 gticasr::Asgtrgar,
7134 gticasr::Asgtrgar,
7135 Gticasr_SPEC,
7136 crate::common::RW,
7137 > {
7138 crate::common::RegisterField::<
7139 0,
7140 0x1,
7141 1,
7142 0,
7143 gticasr::Asgtrgar,
7144 gticasr::Asgtrgar,
7145 Gticasr_SPEC,
7146 crate::common::RW,
7147 >::from_register(self, 0)
7148 }
7149}
7150impl ::core::default::Default for Gticasr {
7151 #[inline(always)]
7152 fn default() -> Gticasr {
7153 <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
7154 }
7155}
7156pub mod gticasr {
7157
7158 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7159 pub struct Aselch_SPEC;
7160 pub type Aselch = crate::EnumBitfieldStruct<u8, Aselch_SPEC>;
7161 impl Aselch {
7162 #[doc = "Disable GTCCRA input capture on ELC_GPTH input"]
7163 pub const _0: Self = Self::new(0);
7164
7165 #[doc = "Enable GTCCRA input capture on ELC_GPTH input"]
7166 pub const _1: Self = Self::new(1);
7167 }
7168 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7169 pub struct Aselcg_SPEC;
7170 pub type Aselcg = crate::EnumBitfieldStruct<u8, Aselcg_SPEC>;
7171 impl Aselcg {
7172 #[doc = "Disable GTCCRA input capture on ELC_GPTG input"]
7173 pub const _0: Self = Self::new(0);
7174
7175 #[doc = "Enable GTCCRA input capture on ELC_GPTG input."]
7176 pub const _1: Self = Self::new(1);
7177 }
7178 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7179 pub struct Aselcf_SPEC;
7180 pub type Aselcf = crate::EnumBitfieldStruct<u8, Aselcf_SPEC>;
7181 impl Aselcf {
7182 #[doc = "Disable GTCCRA input capture on ELC_GPTF input"]
7183 pub const _0: Self = Self::new(0);
7184
7185 #[doc = "Enable GTCCRA input capture on ELC_GPTF input."]
7186 pub const _1: Self = Self::new(1);
7187 }
7188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7189 pub struct Aselce_SPEC;
7190 pub type Aselce = crate::EnumBitfieldStruct<u8, Aselce_SPEC>;
7191 impl Aselce {
7192 #[doc = "Disable GTCCRA input capture on ELC_GPTE input"]
7193 pub const _0: Self = Self::new(0);
7194
7195 #[doc = "Enable GTCCRA input capture on ELC_GPTE input."]
7196 pub const _1: Self = Self::new(1);
7197 }
7198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7199 pub struct Aselcd_SPEC;
7200 pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
7201 impl Aselcd {
7202 #[doc = "Disable GTCCRA input capture on ELC_GPTD input"]
7203 pub const _0: Self = Self::new(0);
7204
7205 #[doc = "Enable GTCCRA input capture on ELC_GPTD input."]
7206 pub const _1: Self = Self::new(1);
7207 }
7208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7209 pub struct Aselcc_SPEC;
7210 pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
7211 impl Aselcc {
7212 #[doc = "Disable GTCCRA input capture on ELC_GPTC input"]
7213 pub const _0: Self = Self::new(0);
7214
7215 #[doc = "Enable GTCCRA input capture on ELC_GPTC input."]
7216 pub const _1: Self = Self::new(1);
7217 }
7218 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7219 pub struct Aselcb_SPEC;
7220 pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
7221 impl Aselcb {
7222 #[doc = "Disable GTCCRA input capture on ELC_GPTB input"]
7223 pub const _0: Self = Self::new(0);
7224
7225 #[doc = "Enable GTCCRA input capture on ELC_GPTB input"]
7226 pub const _1: Self = Self::new(1);
7227 }
7228 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7229 pub struct Aselca_SPEC;
7230 pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
7231 impl Aselca {
7232 #[doc = "Disable GTCCRA input capture on ELC_GPTA input"]
7233 pub const _0: Self = Self::new(0);
7234
7235 #[doc = "Enable GTCCRA input capture on ELC_GPTA input."]
7236 pub const _1: Self = Self::new(1);
7237 }
7238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7239 pub struct Ascbfah_SPEC;
7240 pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
7241 impl Ascbfah {
7242 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 1"]
7243 pub const _0: Self = Self::new(0);
7244
7245 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 1."]
7246 pub const _1: Self = Self::new(1);
7247 }
7248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7249 pub struct Ascbfal_SPEC;
7250 pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
7251 impl Ascbfal {
7252 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 0"]
7253 pub const _0: Self = Self::new(0);
7254
7255 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCB input when GTIOCA input is 0."]
7256 pub const _1: Self = Self::new(1);
7257 }
7258 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7259 pub struct Ascbrah_SPEC;
7260 pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
7261 impl Ascbrah {
7262 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 1"]
7263 pub const _0: Self = Self::new(0);
7264
7265 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 1."]
7266 pub const _1: Self = Self::new(1);
7267 }
7268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7269 pub struct Ascbral_SPEC;
7270 pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
7271 impl Ascbral {
7272 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 0"]
7273 pub const _0: Self = Self::new(0);
7274
7275 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCB input when GTIOCA input is 0."]
7276 pub const _1: Self = Self::new(1);
7277 }
7278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7279 pub struct Ascafbh_SPEC;
7280 pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
7281 impl Ascafbh {
7282 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 1"]
7283 pub const _0: Self = Self::new(0);
7284
7285 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 1."]
7286 pub const _1: Self = Self::new(1);
7287 }
7288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7289 pub struct Ascafbl_SPEC;
7290 pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
7291 impl Ascafbl {
7292 #[doc = "Disable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 0"]
7293 pub const _0: Self = Self::new(0);
7294
7295 #[doc = "Enable GTCCRA input capture on the falling edge of GTIOCA input when GTIOCB input is 0."]
7296 pub const _1: Self = Self::new(1);
7297 }
7298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7299 pub struct Ascarbh_SPEC;
7300 pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
7301 impl Ascarbh {
7302 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 1"]
7303 pub const _0: Self = Self::new(0);
7304
7305 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 1."]
7306 pub const _1: Self = Self::new(1);
7307 }
7308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7309 pub struct Ascarbl_SPEC;
7310 pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
7311 impl Ascarbl {
7312 #[doc = "Disable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 0"]
7313 pub const _0: Self = Self::new(0);
7314
7315 #[doc = "Enable GTCCRA input capture on the rising edge of GTIOCA input when GTIOCB input is 0."]
7316 pub const _1: Self = Self::new(1);
7317 }
7318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7319 pub struct Asgtrgdf_SPEC;
7320 pub type Asgtrgdf = crate::EnumBitfieldStruct<u8, Asgtrgdf_SPEC>;
7321 impl Asgtrgdf {
7322 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGD input"]
7323 pub const _0: Self = Self::new(0);
7324
7325 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGD input."]
7326 pub const _1: Self = Self::new(1);
7327 }
7328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7329 pub struct Asgtrgdr_SPEC;
7330 pub type Asgtrgdr = crate::EnumBitfieldStruct<u8, Asgtrgdr_SPEC>;
7331 impl Asgtrgdr {
7332 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGD input"]
7333 pub const _0: Self = Self::new(0);
7334
7335 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGD input."]
7336 pub const _1: Self = Self::new(1);
7337 }
7338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7339 pub struct Asgtrgcf_SPEC;
7340 pub type Asgtrgcf = crate::EnumBitfieldStruct<u8, Asgtrgcf_SPEC>;
7341 impl Asgtrgcf {
7342 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGC input"]
7343 pub const _0: Self = Self::new(0);
7344
7345 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGC input"]
7346 pub const _1: Self = Self::new(1);
7347 }
7348 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7349 pub struct Asgtrgcr_SPEC;
7350 pub type Asgtrgcr = crate::EnumBitfieldStruct<u8, Asgtrgcr_SPEC>;
7351 impl Asgtrgcr {
7352 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGC input"]
7353 pub const _0: Self = Self::new(0);
7354
7355 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGC input."]
7356 pub const _1: Self = Self::new(1);
7357 }
7358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7359 pub struct Asgtrgbf_SPEC;
7360 pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
7361 impl Asgtrgbf {
7362 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGB input"]
7363 pub const _0: Self = Self::new(0);
7364
7365 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGB input."]
7366 pub const _1: Self = Self::new(1);
7367 }
7368 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7369 pub struct Asgtrgbr_SPEC;
7370 pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
7371 impl Asgtrgbr {
7372 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGB input"]
7373 pub const _0: Self = Self::new(0);
7374
7375 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGB input."]
7376 pub const _1: Self = Self::new(1);
7377 }
7378 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7379 pub struct Asgtrgaf_SPEC;
7380 pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
7381 impl Asgtrgaf {
7382 #[doc = "Disable GTCCRA input capture on the falling edge of GTETRGA input"]
7383 pub const _0: Self = Self::new(0);
7384
7385 #[doc = "Enable GTCCRA input capture on the falling edge of GTETRGA input."]
7386 pub const _1: Self = Self::new(1);
7387 }
7388 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7389 pub struct Asgtrgar_SPEC;
7390 pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
7391 impl Asgtrgar {
7392 #[doc = "Disable GTCCRA input capture on the rising edge of GTETRGA input"]
7393 pub const _0: Self = Self::new(0);
7394
7395 #[doc = "Enable GTCCRA input capture on the rising edge of GTETRGA input."]
7396 pub const _1: Self = Self::new(1);
7397 }
7398}
7399#[doc(hidden)]
7400#[derive(Copy, Clone, Eq, PartialEq)]
7401pub struct Gticbsr_SPEC;
7402impl crate::sealed::RegSpec for Gticbsr_SPEC {
7403 type DataType = u32;
7404}
7405
7406#[doc = "General PWM Timer Input Capture Source Select Register B"]
7407pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
7408
7409impl Gticbsr {
7410 #[doc = "ELC_GPTH Event Source GTCCRB Input Capture Enable"]
7411 #[inline(always)]
7412 pub fn bselch(
7413 self,
7414 ) -> crate::common::RegisterField<
7415 23,
7416 0x1,
7417 1,
7418 0,
7419 gticbsr::Bselch,
7420 gticbsr::Bselch,
7421 Gticbsr_SPEC,
7422 crate::common::RW,
7423 > {
7424 crate::common::RegisterField::<
7425 23,
7426 0x1,
7427 1,
7428 0,
7429 gticbsr::Bselch,
7430 gticbsr::Bselch,
7431 Gticbsr_SPEC,
7432 crate::common::RW,
7433 >::from_register(self, 0)
7434 }
7435
7436 #[doc = "ELC_GPTG Event Source GTCCRB Input Capture Enable"]
7437 #[inline(always)]
7438 pub fn bselcg(
7439 self,
7440 ) -> crate::common::RegisterField<
7441 22,
7442 0x1,
7443 1,
7444 0,
7445 gticbsr::Bselcg,
7446 gticbsr::Bselcg,
7447 Gticbsr_SPEC,
7448 crate::common::RW,
7449 > {
7450 crate::common::RegisterField::<
7451 22,
7452 0x1,
7453 1,
7454 0,
7455 gticbsr::Bselcg,
7456 gticbsr::Bselcg,
7457 Gticbsr_SPEC,
7458 crate::common::RW,
7459 >::from_register(self, 0)
7460 }
7461
7462 #[doc = "ELC_GPTF Event Source GTCCRB Input Capture Enable"]
7463 #[inline(always)]
7464 pub fn bselcf(
7465 self,
7466 ) -> crate::common::RegisterField<
7467 21,
7468 0x1,
7469 1,
7470 0,
7471 gticbsr::Bselcf,
7472 gticbsr::Bselcf,
7473 Gticbsr_SPEC,
7474 crate::common::RW,
7475 > {
7476 crate::common::RegisterField::<
7477 21,
7478 0x1,
7479 1,
7480 0,
7481 gticbsr::Bselcf,
7482 gticbsr::Bselcf,
7483 Gticbsr_SPEC,
7484 crate::common::RW,
7485 >::from_register(self, 0)
7486 }
7487
7488 #[doc = "ELC_GPTE Event Source GTCCRB Input Capture Enable"]
7489 #[inline(always)]
7490 pub fn bselce(
7491 self,
7492 ) -> crate::common::RegisterField<
7493 20,
7494 0x1,
7495 1,
7496 0,
7497 gticbsr::Bselce,
7498 gticbsr::Bselce,
7499 Gticbsr_SPEC,
7500 crate::common::RW,
7501 > {
7502 crate::common::RegisterField::<
7503 20,
7504 0x1,
7505 1,
7506 0,
7507 gticbsr::Bselce,
7508 gticbsr::Bselce,
7509 Gticbsr_SPEC,
7510 crate::common::RW,
7511 >::from_register(self, 0)
7512 }
7513
7514 #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
7515 #[inline(always)]
7516 pub fn bselcd(
7517 self,
7518 ) -> crate::common::RegisterField<
7519 19,
7520 0x1,
7521 1,
7522 0,
7523 gticbsr::Bselcd,
7524 gticbsr::Bselcd,
7525 Gticbsr_SPEC,
7526 crate::common::RW,
7527 > {
7528 crate::common::RegisterField::<
7529 19,
7530 0x1,
7531 1,
7532 0,
7533 gticbsr::Bselcd,
7534 gticbsr::Bselcd,
7535 Gticbsr_SPEC,
7536 crate::common::RW,
7537 >::from_register(self, 0)
7538 }
7539
7540 #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
7541 #[inline(always)]
7542 pub fn bselcc(
7543 self,
7544 ) -> crate::common::RegisterField<
7545 18,
7546 0x1,
7547 1,
7548 0,
7549 gticbsr::Bselcc,
7550 gticbsr::Bselcc,
7551 Gticbsr_SPEC,
7552 crate::common::RW,
7553 > {
7554 crate::common::RegisterField::<
7555 18,
7556 0x1,
7557 1,
7558 0,
7559 gticbsr::Bselcc,
7560 gticbsr::Bselcc,
7561 Gticbsr_SPEC,
7562 crate::common::RW,
7563 >::from_register(self, 0)
7564 }
7565
7566 #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
7567 #[inline(always)]
7568 pub fn bselcb(
7569 self,
7570 ) -> crate::common::RegisterField<
7571 17,
7572 0x1,
7573 1,
7574 0,
7575 gticbsr::Bselcb,
7576 gticbsr::Bselcb,
7577 Gticbsr_SPEC,
7578 crate::common::RW,
7579 > {
7580 crate::common::RegisterField::<
7581 17,
7582 0x1,
7583 1,
7584 0,
7585 gticbsr::Bselcb,
7586 gticbsr::Bselcb,
7587 Gticbsr_SPEC,
7588 crate::common::RW,
7589 >::from_register(self, 0)
7590 }
7591
7592 #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
7593 #[inline(always)]
7594 pub fn bselca(
7595 self,
7596 ) -> crate::common::RegisterField<
7597 16,
7598 0x1,
7599 1,
7600 0,
7601 gticbsr::Bselca,
7602 gticbsr::Bselca,
7603 Gticbsr_SPEC,
7604 crate::common::RW,
7605 > {
7606 crate::common::RegisterField::<
7607 16,
7608 0x1,
7609 1,
7610 0,
7611 gticbsr::Bselca,
7612 gticbsr::Bselca,
7613 Gticbsr_SPEC,
7614 crate::common::RW,
7615 >::from_register(self, 0)
7616 }
7617
7618 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable"]
7619 #[inline(always)]
7620 pub fn bscbfah(
7621 self,
7622 ) -> crate::common::RegisterField<
7623 15,
7624 0x1,
7625 1,
7626 0,
7627 gticbsr::Bscbfah,
7628 gticbsr::Bscbfah,
7629 Gticbsr_SPEC,
7630 crate::common::RW,
7631 > {
7632 crate::common::RegisterField::<
7633 15,
7634 0x1,
7635 1,
7636 0,
7637 gticbsr::Bscbfah,
7638 gticbsr::Bscbfah,
7639 Gticbsr_SPEC,
7640 crate::common::RW,
7641 >::from_register(self, 0)
7642 }
7643
7644 #[doc = "GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable"]
7645 #[inline(always)]
7646 pub fn bscbfal(
7647 self,
7648 ) -> crate::common::RegisterField<
7649 14,
7650 0x1,
7651 1,
7652 0,
7653 gticbsr::Bscbfal,
7654 gticbsr::Bscbfal,
7655 Gticbsr_SPEC,
7656 crate::common::RW,
7657 > {
7658 crate::common::RegisterField::<
7659 14,
7660 0x1,
7661 1,
7662 0,
7663 gticbsr::Bscbfal,
7664 gticbsr::Bscbfal,
7665 Gticbsr_SPEC,
7666 crate::common::RW,
7667 >::from_register(self, 0)
7668 }
7669
7670 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable"]
7671 #[inline(always)]
7672 pub fn bscbrah(
7673 self,
7674 ) -> crate::common::RegisterField<
7675 13,
7676 0x1,
7677 1,
7678 0,
7679 gticbsr::Bscbrah,
7680 gticbsr::Bscbrah,
7681 Gticbsr_SPEC,
7682 crate::common::RW,
7683 > {
7684 crate::common::RegisterField::<
7685 13,
7686 0x1,
7687 1,
7688 0,
7689 gticbsr::Bscbrah,
7690 gticbsr::Bscbrah,
7691 Gticbsr_SPEC,
7692 crate::common::RW,
7693 >::from_register(self, 0)
7694 }
7695
7696 #[doc = "GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable"]
7697 #[inline(always)]
7698 pub fn bscbral(
7699 self,
7700 ) -> crate::common::RegisterField<
7701 12,
7702 0x1,
7703 1,
7704 0,
7705 gticbsr::Bscbral,
7706 gticbsr::Bscbral,
7707 Gticbsr_SPEC,
7708 crate::common::RW,
7709 > {
7710 crate::common::RegisterField::<
7711 12,
7712 0x1,
7713 1,
7714 0,
7715 gticbsr::Bscbral,
7716 gticbsr::Bscbral,
7717 Gticbsr_SPEC,
7718 crate::common::RW,
7719 >::from_register(self, 0)
7720 }
7721
7722 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable"]
7723 #[inline(always)]
7724 pub fn bscafbh(
7725 self,
7726 ) -> crate::common::RegisterField<
7727 11,
7728 0x1,
7729 1,
7730 0,
7731 gticbsr::Bscafbh,
7732 gticbsr::Bscafbh,
7733 Gticbsr_SPEC,
7734 crate::common::RW,
7735 > {
7736 crate::common::RegisterField::<
7737 11,
7738 0x1,
7739 1,
7740 0,
7741 gticbsr::Bscafbh,
7742 gticbsr::Bscafbh,
7743 Gticbsr_SPEC,
7744 crate::common::RW,
7745 >::from_register(self, 0)
7746 }
7747
7748 #[doc = "GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable"]
7749 #[inline(always)]
7750 pub fn bscafbl(
7751 self,
7752 ) -> crate::common::RegisterField<
7753 10,
7754 0x1,
7755 1,
7756 0,
7757 gticbsr::Bscafbl,
7758 gticbsr::Bscafbl,
7759 Gticbsr_SPEC,
7760 crate::common::RW,
7761 > {
7762 crate::common::RegisterField::<
7763 10,
7764 0x1,
7765 1,
7766 0,
7767 gticbsr::Bscafbl,
7768 gticbsr::Bscafbl,
7769 Gticbsr_SPEC,
7770 crate::common::RW,
7771 >::from_register(self, 0)
7772 }
7773
7774 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable"]
7775 #[inline(always)]
7776 pub fn bscarbh(
7777 self,
7778 ) -> crate::common::RegisterField<
7779 9,
7780 0x1,
7781 1,
7782 0,
7783 gticbsr::Bscarbh,
7784 gticbsr::Bscarbh,
7785 Gticbsr_SPEC,
7786 crate::common::RW,
7787 > {
7788 crate::common::RegisterField::<
7789 9,
7790 0x1,
7791 1,
7792 0,
7793 gticbsr::Bscarbh,
7794 gticbsr::Bscarbh,
7795 Gticbsr_SPEC,
7796 crate::common::RW,
7797 >::from_register(self, 0)
7798 }
7799
7800 #[doc = "GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable"]
7801 #[inline(always)]
7802 pub fn bscarbl(
7803 self,
7804 ) -> crate::common::RegisterField<
7805 8,
7806 0x1,
7807 1,
7808 0,
7809 gticbsr::Bscarbl,
7810 gticbsr::Bscarbl,
7811 Gticbsr_SPEC,
7812 crate::common::RW,
7813 > {
7814 crate::common::RegisterField::<
7815 8,
7816 0x1,
7817 1,
7818 0,
7819 gticbsr::Bscarbl,
7820 gticbsr::Bscarbl,
7821 Gticbsr_SPEC,
7822 crate::common::RW,
7823 >::from_register(self, 0)
7824 }
7825
7826 #[doc = "GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable"]
7827 #[inline(always)]
7828 pub fn bsgtrgdf(
7829 self,
7830 ) -> crate::common::RegisterField<
7831 7,
7832 0x1,
7833 1,
7834 0,
7835 gticbsr::Bsgtrgdf,
7836 gticbsr::Bsgtrgdf,
7837 Gticbsr_SPEC,
7838 crate::common::RW,
7839 > {
7840 crate::common::RegisterField::<
7841 7,
7842 0x1,
7843 1,
7844 0,
7845 gticbsr::Bsgtrgdf,
7846 gticbsr::Bsgtrgdf,
7847 Gticbsr_SPEC,
7848 crate::common::RW,
7849 >::from_register(self, 0)
7850 }
7851
7852 #[doc = "GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable"]
7853 #[inline(always)]
7854 pub fn bsgtrgdr(
7855 self,
7856 ) -> crate::common::RegisterField<
7857 6,
7858 0x1,
7859 1,
7860 0,
7861 gticbsr::Bsgtrgdr,
7862 gticbsr::Bsgtrgdr,
7863 Gticbsr_SPEC,
7864 crate::common::RW,
7865 > {
7866 crate::common::RegisterField::<
7867 6,
7868 0x1,
7869 1,
7870 0,
7871 gticbsr::Bsgtrgdr,
7872 gticbsr::Bsgtrgdr,
7873 Gticbsr_SPEC,
7874 crate::common::RW,
7875 >::from_register(self, 0)
7876 }
7877
7878 #[doc = "GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable"]
7879 #[inline(always)]
7880 pub fn bsgtrgcf(
7881 self,
7882 ) -> crate::common::RegisterField<
7883 5,
7884 0x1,
7885 1,
7886 0,
7887 gticbsr::Bsgtrgcf,
7888 gticbsr::Bsgtrgcf,
7889 Gticbsr_SPEC,
7890 crate::common::RW,
7891 > {
7892 crate::common::RegisterField::<
7893 5,
7894 0x1,
7895 1,
7896 0,
7897 gticbsr::Bsgtrgcf,
7898 gticbsr::Bsgtrgcf,
7899 Gticbsr_SPEC,
7900 crate::common::RW,
7901 >::from_register(self, 0)
7902 }
7903
7904 #[doc = "GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable"]
7905 #[inline(always)]
7906 pub fn bsgtrgcr(
7907 self,
7908 ) -> crate::common::RegisterField<
7909 4,
7910 0x1,
7911 1,
7912 0,
7913 gticbsr::Bsgtrgcr,
7914 gticbsr::Bsgtrgcr,
7915 Gticbsr_SPEC,
7916 crate::common::RW,
7917 > {
7918 crate::common::RegisterField::<
7919 4,
7920 0x1,
7921 1,
7922 0,
7923 gticbsr::Bsgtrgcr,
7924 gticbsr::Bsgtrgcr,
7925 Gticbsr_SPEC,
7926 crate::common::RW,
7927 >::from_register(self, 0)
7928 }
7929
7930 #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
7931 #[inline(always)]
7932 pub fn bsgtrgbf(
7933 self,
7934 ) -> crate::common::RegisterField<
7935 3,
7936 0x1,
7937 1,
7938 0,
7939 gticbsr::Bsgtrgbf,
7940 gticbsr::Bsgtrgbf,
7941 Gticbsr_SPEC,
7942 crate::common::RW,
7943 > {
7944 crate::common::RegisterField::<
7945 3,
7946 0x1,
7947 1,
7948 0,
7949 gticbsr::Bsgtrgbf,
7950 gticbsr::Bsgtrgbf,
7951 Gticbsr_SPEC,
7952 crate::common::RW,
7953 >::from_register(self, 0)
7954 }
7955
7956 #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
7957 #[inline(always)]
7958 pub fn bsgtrgbr(
7959 self,
7960 ) -> crate::common::RegisterField<
7961 2,
7962 0x1,
7963 1,
7964 0,
7965 gticbsr::Bsgtrgbr,
7966 gticbsr::Bsgtrgbr,
7967 Gticbsr_SPEC,
7968 crate::common::RW,
7969 > {
7970 crate::common::RegisterField::<
7971 2,
7972 0x1,
7973 1,
7974 0,
7975 gticbsr::Bsgtrgbr,
7976 gticbsr::Bsgtrgbr,
7977 Gticbsr_SPEC,
7978 crate::common::RW,
7979 >::from_register(self, 0)
7980 }
7981
7982 #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
7983 #[inline(always)]
7984 pub fn bsgtrgaf(
7985 self,
7986 ) -> crate::common::RegisterField<
7987 1,
7988 0x1,
7989 1,
7990 0,
7991 gticbsr::Bsgtrgaf,
7992 gticbsr::Bsgtrgaf,
7993 Gticbsr_SPEC,
7994 crate::common::RW,
7995 > {
7996 crate::common::RegisterField::<
7997 1,
7998 0x1,
7999 1,
8000 0,
8001 gticbsr::Bsgtrgaf,
8002 gticbsr::Bsgtrgaf,
8003 Gticbsr_SPEC,
8004 crate::common::RW,
8005 >::from_register(self, 0)
8006 }
8007
8008 #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
8009 #[inline(always)]
8010 pub fn bsgtrgar(
8011 self,
8012 ) -> crate::common::RegisterField<
8013 0,
8014 0x1,
8015 1,
8016 0,
8017 gticbsr::Bsgtrgar,
8018 gticbsr::Bsgtrgar,
8019 Gticbsr_SPEC,
8020 crate::common::RW,
8021 > {
8022 crate::common::RegisterField::<
8023 0,
8024 0x1,
8025 1,
8026 0,
8027 gticbsr::Bsgtrgar,
8028 gticbsr::Bsgtrgar,
8029 Gticbsr_SPEC,
8030 crate::common::RW,
8031 >::from_register(self, 0)
8032 }
8033}
8034impl ::core::default::Default for Gticbsr {
8035 #[inline(always)]
8036 fn default() -> Gticbsr {
8037 <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
8038 }
8039}
8040pub mod gticbsr {
8041
8042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8043 pub struct Bselch_SPEC;
8044 pub type Bselch = crate::EnumBitfieldStruct<u8, Bselch_SPEC>;
8045 impl Bselch {
8046 #[doc = "Disable GTCCRB input capture on ELC_GPTH input"]
8047 pub const _0: Self = Self::new(0);
8048
8049 #[doc = "Enable GTCCRB input capture on ELC_GPTH input."]
8050 pub const _1: Self = Self::new(1);
8051 }
8052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8053 pub struct Bselcg_SPEC;
8054 pub type Bselcg = crate::EnumBitfieldStruct<u8, Bselcg_SPEC>;
8055 impl Bselcg {
8056 #[doc = "Disable GTCCRB input capture on ELC_GPTG input"]
8057 pub const _0: Self = Self::new(0);
8058
8059 #[doc = "Enable GTCCRB input capture on ELC_GPTG input."]
8060 pub const _1: Self = Self::new(1);
8061 }
8062 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8063 pub struct Bselcf_SPEC;
8064 pub type Bselcf = crate::EnumBitfieldStruct<u8, Bselcf_SPEC>;
8065 impl Bselcf {
8066 #[doc = "Disable GTCCRB input capture on ELC_GPTF input"]
8067 pub const _0: Self = Self::new(0);
8068
8069 #[doc = "Enable GTCCRB input capture on ELC_GPTF input."]
8070 pub const _1: Self = Self::new(1);
8071 }
8072 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8073 pub struct Bselce_SPEC;
8074 pub type Bselce = crate::EnumBitfieldStruct<u8, Bselce_SPEC>;
8075 impl Bselce {
8076 #[doc = "Disable GTCCRB input capture on ELC_GPTE input"]
8077 pub const _0: Self = Self::new(0);
8078
8079 #[doc = "Enable GTCCRB input capture on ELC_GPTE input"]
8080 pub const _1: Self = Self::new(1);
8081 }
8082 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8083 pub struct Bselcd_SPEC;
8084 pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
8085 impl Bselcd {
8086 #[doc = "Disable GTCCRB input capture on ELC_GPTD input"]
8087 pub const _0: Self = Self::new(0);
8088
8089 #[doc = "Enable GTCCRB input capture on ELC_GPTD input."]
8090 pub const _1: Self = Self::new(1);
8091 }
8092 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8093 pub struct Bselcc_SPEC;
8094 pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
8095 impl Bselcc {
8096 #[doc = "Disable GTCCRB input capture on ELC_GPTC input"]
8097 pub const _0: Self = Self::new(0);
8098
8099 #[doc = "Enable GTCCRB input capture on ELC_GPTC input"]
8100 pub const _1: Self = Self::new(1);
8101 }
8102 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8103 pub struct Bselcb_SPEC;
8104 pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
8105 impl Bselcb {
8106 #[doc = "Disable GTCCRB input capture on ELC_GPTB input"]
8107 pub const _0: Self = Self::new(0);
8108
8109 #[doc = "Enable GTCCRB input capture on ELC_GPTB input."]
8110 pub const _1: Self = Self::new(1);
8111 }
8112 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8113 pub struct Bselca_SPEC;
8114 pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
8115 impl Bselca {
8116 #[doc = "Disable GTCCRB input capture on ELC_GPTA input"]
8117 pub const _0: Self = Self::new(0);
8118
8119 #[doc = "Enable GTCCRB input capture on ELC_GPTA input."]
8120 pub const _1: Self = Self::new(1);
8121 }
8122 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8123 pub struct Bscbfah_SPEC;
8124 pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
8125 impl Bscbfah {
8126 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 1"]
8127 pub const _0: Self = Self::new(0);
8128
8129 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 1."]
8130 pub const _1: Self = Self::new(1);
8131 }
8132 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8133 pub struct Bscbfal_SPEC;
8134 pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
8135 impl Bscbfal {
8136 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 0"]
8137 pub const _0: Self = Self::new(0);
8138
8139 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCB input when GTIOCA input is 0."]
8140 pub const _1: Self = Self::new(1);
8141 }
8142 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8143 pub struct Bscbrah_SPEC;
8144 pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
8145 impl Bscbrah {
8146 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 1"]
8147 pub const _0: Self = Self::new(0);
8148
8149 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 1."]
8150 pub const _1: Self = Self::new(1);
8151 }
8152 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8153 pub struct Bscbral_SPEC;
8154 pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
8155 impl Bscbral {
8156 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 0"]
8157 pub const _0: Self = Self::new(0);
8158
8159 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCB input when GTIOCA input is 0."]
8160 pub const _1: Self = Self::new(1);
8161 }
8162 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8163 pub struct Bscafbh_SPEC;
8164 pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
8165 impl Bscafbh {
8166 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 1"]
8167 pub const _0: Self = Self::new(0);
8168
8169 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 1."]
8170 pub const _1: Self = Self::new(1);
8171 }
8172 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8173 pub struct Bscafbl_SPEC;
8174 pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
8175 impl Bscafbl {
8176 #[doc = "Disable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 0"]
8177 pub const _0: Self = Self::new(0);
8178
8179 #[doc = "Enable GTCCRB input capture on the falling edge of GTIOCA input when GTIOCB input is 0."]
8180 pub const _1: Self = Self::new(1);
8181 }
8182 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8183 pub struct Bscarbh_SPEC;
8184 pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
8185 impl Bscarbh {
8186 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 1"]
8187 pub const _0: Self = Self::new(0);
8188
8189 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 1."]
8190 pub const _1: Self = Self::new(1);
8191 }
8192 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8193 pub struct Bscarbl_SPEC;
8194 pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
8195 impl Bscarbl {
8196 #[doc = "Disable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 0"]
8197 pub const _0: Self = Self::new(0);
8198
8199 #[doc = "Enable GTCCRB input capture on the rising edge of GTIOCA input when GTIOCB input is 0."]
8200 pub const _1: Self = Self::new(1);
8201 }
8202 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8203 pub struct Bsgtrgdf_SPEC;
8204 pub type Bsgtrgdf = crate::EnumBitfieldStruct<u8, Bsgtrgdf_SPEC>;
8205 impl Bsgtrgdf {
8206 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGD input"]
8207 pub const _0: Self = Self::new(0);
8208
8209 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGD input."]
8210 pub const _1: Self = Self::new(1);
8211 }
8212 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8213 pub struct Bsgtrgdr_SPEC;
8214 pub type Bsgtrgdr = crate::EnumBitfieldStruct<u8, Bsgtrgdr_SPEC>;
8215 impl Bsgtrgdr {
8216 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGD input"]
8217 pub const _0: Self = Self::new(0);
8218
8219 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGD input."]
8220 pub const _1: Self = Self::new(1);
8221 }
8222 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8223 pub struct Bsgtrgcf_SPEC;
8224 pub type Bsgtrgcf = crate::EnumBitfieldStruct<u8, Bsgtrgcf_SPEC>;
8225 impl Bsgtrgcf {
8226 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGC input"]
8227 pub const _0: Self = Self::new(0);
8228
8229 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGC input."]
8230 pub const _1: Self = Self::new(1);
8231 }
8232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8233 pub struct Bsgtrgcr_SPEC;
8234 pub type Bsgtrgcr = crate::EnumBitfieldStruct<u8, Bsgtrgcr_SPEC>;
8235 impl Bsgtrgcr {
8236 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGC input"]
8237 pub const _0: Self = Self::new(0);
8238
8239 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGC input."]
8240 pub const _1: Self = Self::new(1);
8241 }
8242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8243 pub struct Bsgtrgbf_SPEC;
8244 pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
8245 impl Bsgtrgbf {
8246 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGB input"]
8247 pub const _0: Self = Self::new(0);
8248
8249 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGB input."]
8250 pub const _1: Self = Self::new(1);
8251 }
8252 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8253 pub struct Bsgtrgbr_SPEC;
8254 pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
8255 impl Bsgtrgbr {
8256 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGB input"]
8257 pub const _0: Self = Self::new(0);
8258
8259 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGB input."]
8260 pub const _1: Self = Self::new(1);
8261 }
8262 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8263 pub struct Bsgtrgaf_SPEC;
8264 pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
8265 impl Bsgtrgaf {
8266 #[doc = "Disable GTCCRB input capture on the falling edge of GTETRGA input"]
8267 pub const _0: Self = Self::new(0);
8268
8269 #[doc = "Enable GTCCRB input capture on the falling edge of GTETRGA input."]
8270 pub const _1: Self = Self::new(1);
8271 }
8272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8273 pub struct Bsgtrgar_SPEC;
8274 pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
8275 impl Bsgtrgar {
8276 #[doc = "Disable GTCCRB input capture on the rising edge of GTETRGA input"]
8277 pub const _0: Self = Self::new(0);
8278
8279 #[doc = "Enable GTCCRB input capture on the rising edge of GTETRGA input."]
8280 pub const _1: Self = Self::new(1);
8281 }
8282}
8283#[doc(hidden)]
8284#[derive(Copy, Clone, Eq, PartialEq)]
8285pub struct Gtcr_SPEC;
8286impl crate::sealed::RegSpec for Gtcr_SPEC {
8287 type DataType = u32;
8288}
8289
8290#[doc = "General PWM Timer Control Register"]
8291pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
8292
8293impl Gtcr {
8294 #[doc = "Timer Prescaler Select"]
8295 #[inline(always)]
8296 pub fn tpcs(
8297 self,
8298 ) -> crate::common::RegisterField<
8299 24,
8300 0x7,
8301 1,
8302 0,
8303 gtcr::Tpcs,
8304 gtcr::Tpcs,
8305 Gtcr_SPEC,
8306 crate::common::RW,
8307 > {
8308 crate::common::RegisterField::<
8309 24,
8310 0x7,
8311 1,
8312 0,
8313 gtcr::Tpcs,
8314 gtcr::Tpcs,
8315 Gtcr_SPEC,
8316 crate::common::RW,
8317 >::from_register(self, 0)
8318 }
8319
8320 #[doc = "Mode Select"]
8321 #[inline(always)]
8322 pub fn md(
8323 self,
8324 ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
8325 {
8326 crate::common::RegisterField::<
8327 16,
8328 0x7,
8329 1,
8330 0,
8331 gtcr::Md,
8332 gtcr::Md,
8333 Gtcr_SPEC,
8334 crate::common::RW,
8335 >::from_register(self, 0)
8336 }
8337
8338 #[doc = "Count Start"]
8339 #[inline(always)]
8340 pub fn cst(
8341 self,
8342 ) -> crate::common::RegisterField<
8343 0,
8344 0x1,
8345 1,
8346 0,
8347 gtcr::Cst,
8348 gtcr::Cst,
8349 Gtcr_SPEC,
8350 crate::common::RW,
8351 > {
8352 crate::common::RegisterField::<
8353 0,
8354 0x1,
8355 1,
8356 0,
8357 gtcr::Cst,
8358 gtcr::Cst,
8359 Gtcr_SPEC,
8360 crate::common::RW,
8361 >::from_register(self, 0)
8362 }
8363}
8364impl ::core::default::Default for Gtcr {
8365 #[inline(always)]
8366 fn default() -> Gtcr {
8367 <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
8368 }
8369}
8370pub mod gtcr {
8371
8372 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8373 pub struct Tpcs_SPEC;
8374 pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
8375 impl Tpcs {
8376 #[doc = "PCLK/1"]
8377 pub const _000: Self = Self::new(0);
8378
8379 #[doc = "PCLK/4"]
8380 pub const _001: Self = Self::new(1);
8381
8382 #[doc = "PCLK/16"]
8383 pub const _010: Self = Self::new(2);
8384
8385 #[doc = "PCLK/64"]
8386 pub const _011: Self = Self::new(3);
8387
8388 #[doc = "PCLK/256"]
8389 pub const _100: Self = Self::new(4);
8390
8391 #[doc = "PCLK/1024"]
8392 pub const _101: Self = Self::new(5);
8393 }
8394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8395 pub struct Md_SPEC;
8396 pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
8397 impl Md {
8398 #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
8399 pub const _000: Self = Self::new(0);
8400
8401 #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
8402 pub const _001: Self = Self::new(1);
8403
8404 #[doc = "Setting prohibited"]
8405 pub const _010: Self = Self::new(2);
8406
8407 #[doc = "Setting prohibited"]
8408 pub const _011: Self = Self::new(3);
8409
8410 #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at crest) (single buffer or double buffer possible)"]
8411 pub const _100: Self = Self::new(4);
8412
8413 #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer possible)"]
8414 pub const _101: Self = Self::new(5);
8415
8416 #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) fixed buffer operation)"]
8417 pub const _110: Self = Self::new(6);
8418
8419 #[doc = "Setting prohibited"]
8420 pub const _111: Self = Self::new(7);
8421 }
8422 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8423 pub struct Cst_SPEC;
8424 pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
8425 impl Cst {
8426 #[doc = "Count operation is stopped"]
8427 pub const _0: Self = Self::new(0);
8428
8429 #[doc = "Count operation is performed"]
8430 pub const _1: Self = Self::new(1);
8431 }
8432}
8433#[doc(hidden)]
8434#[derive(Copy, Clone, Eq, PartialEq)]
8435pub struct Gtuddtyc_SPEC;
8436impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
8437 type DataType = u32;
8438}
8439
8440#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
8441pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
8442
8443impl Gtuddtyc {
8444 #[doc = "GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting"]
8445 #[inline(always)]
8446 pub fn obdtyr(
8447 self,
8448 ) -> crate::common::RegisterField<
8449 27,
8450 0x1,
8451 1,
8452 0,
8453 gtuddtyc::Obdtyr,
8454 gtuddtyc::Obdtyr,
8455 Gtuddtyc_SPEC,
8456 crate::common::RW,
8457 > {
8458 crate::common::RegisterField::<
8459 27,
8460 0x1,
8461 1,
8462 0,
8463 gtuddtyc::Obdtyr,
8464 gtuddtyc::Obdtyr,
8465 Gtuddtyc_SPEC,
8466 crate::common::RW,
8467 >::from_register(self, 0)
8468 }
8469
8470 #[doc = "Forcible GTIOCB Output Duty Setting"]
8471 #[inline(always)]
8472 pub fn obdtyf(
8473 self,
8474 ) -> crate::common::RegisterField<
8475 26,
8476 0x1,
8477 1,
8478 0,
8479 gtuddtyc::Obdtyf,
8480 gtuddtyc::Obdtyf,
8481 Gtuddtyc_SPEC,
8482 crate::common::RW,
8483 > {
8484 crate::common::RegisterField::<
8485 26,
8486 0x1,
8487 1,
8488 0,
8489 gtuddtyc::Obdtyf,
8490 gtuddtyc::Obdtyf,
8491 Gtuddtyc_SPEC,
8492 crate::common::RW,
8493 >::from_register(self, 0)
8494 }
8495
8496 #[doc = "GTIOCB Output Duty Setting"]
8497 #[inline(always)]
8498 pub fn obdty(
8499 self,
8500 ) -> crate::common::RegisterField<
8501 24,
8502 0x3,
8503 1,
8504 0,
8505 gtuddtyc::Obdty,
8506 gtuddtyc::Obdty,
8507 Gtuddtyc_SPEC,
8508 crate::common::RW,
8509 > {
8510 crate::common::RegisterField::<
8511 24,
8512 0x3,
8513 1,
8514 0,
8515 gtuddtyc::Obdty,
8516 gtuddtyc::Obdty,
8517 Gtuddtyc_SPEC,
8518 crate::common::RW,
8519 >::from_register(self, 0)
8520 }
8521
8522 #[doc = "GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting"]
8523 #[inline(always)]
8524 pub fn oadtyr(
8525 self,
8526 ) -> crate::common::RegisterField<
8527 19,
8528 0x1,
8529 1,
8530 0,
8531 gtuddtyc::Oadtyr,
8532 gtuddtyc::Oadtyr,
8533 Gtuddtyc_SPEC,
8534 crate::common::RW,
8535 > {
8536 crate::common::RegisterField::<
8537 19,
8538 0x1,
8539 1,
8540 0,
8541 gtuddtyc::Oadtyr,
8542 gtuddtyc::Oadtyr,
8543 Gtuddtyc_SPEC,
8544 crate::common::RW,
8545 >::from_register(self, 0)
8546 }
8547
8548 #[doc = "Forcible GTIOCA Output Duty Setting"]
8549 #[inline(always)]
8550 pub fn oadtyf(
8551 self,
8552 ) -> crate::common::RegisterField<
8553 18,
8554 0x1,
8555 1,
8556 0,
8557 gtuddtyc::Oadtyf,
8558 gtuddtyc::Oadtyf,
8559 Gtuddtyc_SPEC,
8560 crate::common::RW,
8561 > {
8562 crate::common::RegisterField::<
8563 18,
8564 0x1,
8565 1,
8566 0,
8567 gtuddtyc::Oadtyf,
8568 gtuddtyc::Oadtyf,
8569 Gtuddtyc_SPEC,
8570 crate::common::RW,
8571 >::from_register(self, 0)
8572 }
8573
8574 #[doc = "GTIOCA Output Duty Setting"]
8575 #[inline(always)]
8576 pub fn oadty(
8577 self,
8578 ) -> crate::common::RegisterField<
8579 16,
8580 0x3,
8581 1,
8582 0,
8583 gtuddtyc::Oadty,
8584 gtuddtyc::Oadty,
8585 Gtuddtyc_SPEC,
8586 crate::common::RW,
8587 > {
8588 crate::common::RegisterField::<
8589 16,
8590 0x3,
8591 1,
8592 0,
8593 gtuddtyc::Oadty,
8594 gtuddtyc::Oadty,
8595 Gtuddtyc_SPEC,
8596 crate::common::RW,
8597 >::from_register(self, 0)
8598 }
8599
8600 #[doc = "Forcible Count Direction Setting"]
8601 #[inline(always)]
8602 pub fn udf(
8603 self,
8604 ) -> crate::common::RegisterField<
8605 1,
8606 0x1,
8607 1,
8608 0,
8609 gtuddtyc::Udf,
8610 gtuddtyc::Udf,
8611 Gtuddtyc_SPEC,
8612 crate::common::RW,
8613 > {
8614 crate::common::RegisterField::<
8615 1,
8616 0x1,
8617 1,
8618 0,
8619 gtuddtyc::Udf,
8620 gtuddtyc::Udf,
8621 Gtuddtyc_SPEC,
8622 crate::common::RW,
8623 >::from_register(self, 0)
8624 }
8625
8626 #[doc = "Count Direction Setting"]
8627 #[inline(always)]
8628 pub fn ud(
8629 self,
8630 ) -> crate::common::RegisterField<
8631 0,
8632 0x1,
8633 1,
8634 0,
8635 gtuddtyc::Ud,
8636 gtuddtyc::Ud,
8637 Gtuddtyc_SPEC,
8638 crate::common::RW,
8639 > {
8640 crate::common::RegisterField::<
8641 0,
8642 0x1,
8643 1,
8644 0,
8645 gtuddtyc::Ud,
8646 gtuddtyc::Ud,
8647 Gtuddtyc_SPEC,
8648 crate::common::RW,
8649 >::from_register(self, 0)
8650 }
8651}
8652impl ::core::default::Default for Gtuddtyc {
8653 #[inline(always)]
8654 fn default() -> Gtuddtyc {
8655 <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
8656 }
8657}
8658pub mod gtuddtyc {
8659
8660 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8661 pub struct Obdtyr_SPEC;
8662 pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
8663 impl Obdtyr {
8664 #[doc = "Apply output value set in 0 percent/100 percent duty to GTIOB\\[3:2\\] function after releasing 0percent/100percent duty setting."]
8665 pub const _0: Self = Self::new(0);
8666
8667 #[doc = "Apply masked compare match output value to GTIOB\\[3:2\\] function after releasing 0percent/100percent duty setting."]
8668 pub const _1: Self = Self::new(1);
8669 }
8670 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8671 pub struct Obdtyf_SPEC;
8672 pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
8673 impl Obdtyf {
8674 #[doc = "Do not force setting"]
8675 pub const _0: Self = Self::new(0);
8676
8677 #[doc = "Force setting"]
8678 pub const _1: Self = Self::new(1);
8679 }
8680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8681 pub struct Obdty_SPEC;
8682 pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
8683 impl Obdty {
8684 #[doc = "GTIOCB pin duty is depend on compare match"]
8685 pub const _00: Self = Self::new(0);
8686
8687 #[doc = "GTIOCB pin duty is depend on compare match"]
8688 pub const _01: Self = Self::new(1);
8689
8690 #[doc = "GTIOCB pin duty 0percent"]
8691 pub const _10: Self = Self::new(2);
8692
8693 #[doc = "GTIOCB pin duty 100percent"]
8694 pub const _11: Self = Self::new(3);
8695 }
8696 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8697 pub struct Oadtyr_SPEC;
8698 pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
8699 impl Oadtyr {
8700 #[doc = "Apply output value set in 0 percent/100 percent duty to GTIOA\\[3:2\\] function after releasing 0 percent/100 percent duty setting."]
8701 pub const _0: Self = Self::new(0);
8702
8703 #[doc = "Apply masked compare match output value to GTIOA\\[3:2\\] function after releasing 0 percent/100 percent duty setting."]
8704 pub const _1: Self = Self::new(1);
8705 }
8706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8707 pub struct Oadtyf_SPEC;
8708 pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
8709 impl Oadtyf {
8710 #[doc = "Do not force setting"]
8711 pub const _0: Self = Self::new(0);
8712
8713 #[doc = "Force setting"]
8714 pub const _1: Self = Self::new(1);
8715 }
8716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8717 pub struct Oadty_SPEC;
8718 pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
8719 impl Oadty {
8720 #[doc = "GTIOCA pin duty is depend on compare match"]
8721 pub const _00: Self = Self::new(0);
8722
8723 #[doc = "GTIOCA pin duty is depend on compare match"]
8724 pub const _01: Self = Self::new(1);
8725
8726 #[doc = "GTIOCA pin duty 0 percent"]
8727 pub const _10: Self = Self::new(2);
8728
8729 #[doc = "GTIOCA pin duty 100 percent"]
8730 pub const _11: Self = Self::new(3);
8731 }
8732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8733 pub struct Udf_SPEC;
8734 pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
8735 impl Udf {
8736 #[doc = "Do not force setting"]
8737 pub const _0: Self = Self::new(0);
8738
8739 #[doc = "Force setting"]
8740 pub const _1: Self = Self::new(1);
8741 }
8742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8743 pub struct Ud_SPEC;
8744 pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
8745 impl Ud {
8746 #[doc = "Count down on GTCNT"]
8747 pub const _0: Self = Self::new(0);
8748
8749 #[doc = "Counts up on GTCNT"]
8750 pub const _1: Self = Self::new(1);
8751 }
8752}
8753#[doc(hidden)]
8754#[derive(Copy, Clone, Eq, PartialEq)]
8755pub struct Gtior_SPEC;
8756impl crate::sealed::RegSpec for Gtior_SPEC {
8757 type DataType = u32;
8758}
8759
8760#[doc = "General PWM Timer I/O Control Register"]
8761pub type Gtior = crate::RegValueT<Gtior_SPEC>;
8762
8763impl Gtior {
8764 #[doc = "Noise Filter B Sampling Clock Select"]
8765 #[inline(always)]
8766 pub fn nfcsb(
8767 self,
8768 ) -> crate::common::RegisterField<
8769 30,
8770 0x3,
8771 1,
8772 0,
8773 gtior::Nfcsb,
8774 gtior::Nfcsb,
8775 Gtior_SPEC,
8776 crate::common::RW,
8777 > {
8778 crate::common::RegisterField::<
8779 30,
8780 0x3,
8781 1,
8782 0,
8783 gtior::Nfcsb,
8784 gtior::Nfcsb,
8785 Gtior_SPEC,
8786 crate::common::RW,
8787 >::from_register(self, 0)
8788 }
8789
8790 #[doc = "Noise Filter B Enable"]
8791 #[inline(always)]
8792 pub fn nfben(
8793 self,
8794 ) -> crate::common::RegisterField<
8795 29,
8796 0x1,
8797 1,
8798 0,
8799 gtior::Nfben,
8800 gtior::Nfben,
8801 Gtior_SPEC,
8802 crate::common::RW,
8803 > {
8804 crate::common::RegisterField::<
8805 29,
8806 0x1,
8807 1,
8808 0,
8809 gtior::Nfben,
8810 gtior::Nfben,
8811 Gtior_SPEC,
8812 crate::common::RW,
8813 >::from_register(self, 0)
8814 }
8815
8816 #[doc = "GTIOCB Pin Disable Value Setting"]
8817 #[inline(always)]
8818 pub fn obdf(
8819 self,
8820 ) -> crate::common::RegisterField<
8821 25,
8822 0x3,
8823 1,
8824 0,
8825 gtior::Obdf,
8826 gtior::Obdf,
8827 Gtior_SPEC,
8828 crate::common::RW,
8829 > {
8830 crate::common::RegisterField::<
8831 25,
8832 0x3,
8833 1,
8834 0,
8835 gtior::Obdf,
8836 gtior::Obdf,
8837 Gtior_SPEC,
8838 crate::common::RW,
8839 >::from_register(self, 0)
8840 }
8841
8842 #[doc = "GTIOCB Pin Output Enable"]
8843 #[inline(always)]
8844 pub fn obe(
8845 self,
8846 ) -> crate::common::RegisterField<
8847 24,
8848 0x1,
8849 1,
8850 0,
8851 gtior::Obe,
8852 gtior::Obe,
8853 Gtior_SPEC,
8854 crate::common::RW,
8855 > {
8856 crate::common::RegisterField::<
8857 24,
8858 0x1,
8859 1,
8860 0,
8861 gtior::Obe,
8862 gtior::Obe,
8863 Gtior_SPEC,
8864 crate::common::RW,
8865 >::from_register(self, 0)
8866 }
8867
8868 #[doc = "GTIOCB Pin Output Setting at the Start/Stop Count"]
8869 #[inline(always)]
8870 pub fn obhld(
8871 self,
8872 ) -> crate::common::RegisterField<
8873 23,
8874 0x1,
8875 1,
8876 0,
8877 gtior::Obhld,
8878 gtior::Obhld,
8879 Gtior_SPEC,
8880 crate::common::RW,
8881 > {
8882 crate::common::RegisterField::<
8883 23,
8884 0x1,
8885 1,
8886 0,
8887 gtior::Obhld,
8888 gtior::Obhld,
8889 Gtior_SPEC,
8890 crate::common::RW,
8891 >::from_register(self, 0)
8892 }
8893
8894 #[doc = "GTIOCB Pin Output Value Setting at the Count Stop"]
8895 #[inline(always)]
8896 pub fn obdflt(
8897 self,
8898 ) -> crate::common::RegisterField<
8899 22,
8900 0x1,
8901 1,
8902 0,
8903 gtior::Obdflt,
8904 gtior::Obdflt,
8905 Gtior_SPEC,
8906 crate::common::RW,
8907 > {
8908 crate::common::RegisterField::<
8909 22,
8910 0x1,
8911 1,
8912 0,
8913 gtior::Obdflt,
8914 gtior::Obdflt,
8915 Gtior_SPEC,
8916 crate::common::RW,
8917 >::from_register(self, 0)
8918 }
8919
8920 #[doc = "GTIOCB Pin Function Select"]
8921 #[inline(always)]
8922 pub fn gtiob(
8923 self,
8924 ) -> crate::common::RegisterField<
8925 16,
8926 0x1f,
8927 1,
8928 0,
8929 gtior::Gtiob,
8930 gtior::Gtiob,
8931 Gtior_SPEC,
8932 crate::common::RW,
8933 > {
8934 crate::common::RegisterField::<
8935 16,
8936 0x1f,
8937 1,
8938 0,
8939 gtior::Gtiob,
8940 gtior::Gtiob,
8941 Gtior_SPEC,
8942 crate::common::RW,
8943 >::from_register(self, 0)
8944 }
8945
8946 #[doc = "Noise Filter A Sampling Clock Select"]
8947 #[inline(always)]
8948 pub fn nfcsa(
8949 self,
8950 ) -> crate::common::RegisterField<
8951 14,
8952 0x3,
8953 1,
8954 0,
8955 gtior::Nfcsa,
8956 gtior::Nfcsa,
8957 Gtior_SPEC,
8958 crate::common::RW,
8959 > {
8960 crate::common::RegisterField::<
8961 14,
8962 0x3,
8963 1,
8964 0,
8965 gtior::Nfcsa,
8966 gtior::Nfcsa,
8967 Gtior_SPEC,
8968 crate::common::RW,
8969 >::from_register(self, 0)
8970 }
8971
8972 #[doc = "Noise Filter A Enable"]
8973 #[inline(always)]
8974 pub fn nfaen(
8975 self,
8976 ) -> crate::common::RegisterField<
8977 13,
8978 0x1,
8979 1,
8980 0,
8981 gtior::Nfaen,
8982 gtior::Nfaen,
8983 Gtior_SPEC,
8984 crate::common::RW,
8985 > {
8986 crate::common::RegisterField::<
8987 13,
8988 0x1,
8989 1,
8990 0,
8991 gtior::Nfaen,
8992 gtior::Nfaen,
8993 Gtior_SPEC,
8994 crate::common::RW,
8995 >::from_register(self, 0)
8996 }
8997
8998 #[doc = "GTIOCA Pin Disable Value Setting"]
8999 #[inline(always)]
9000 pub fn oadf(
9001 self,
9002 ) -> crate::common::RegisterField<
9003 9,
9004 0x3,
9005 1,
9006 0,
9007 gtior::Oadf,
9008 gtior::Oadf,
9009 Gtior_SPEC,
9010 crate::common::RW,
9011 > {
9012 crate::common::RegisterField::<
9013 9,
9014 0x3,
9015 1,
9016 0,
9017 gtior::Oadf,
9018 gtior::Oadf,
9019 Gtior_SPEC,
9020 crate::common::RW,
9021 >::from_register(self, 0)
9022 }
9023
9024 #[doc = "GTIOCA Pin Output Enable"]
9025 #[inline(always)]
9026 pub fn oae(
9027 self,
9028 ) -> crate::common::RegisterField<
9029 8,
9030 0x1,
9031 1,
9032 0,
9033 gtior::Oae,
9034 gtior::Oae,
9035 Gtior_SPEC,
9036 crate::common::RW,
9037 > {
9038 crate::common::RegisterField::<
9039 8,
9040 0x1,
9041 1,
9042 0,
9043 gtior::Oae,
9044 gtior::Oae,
9045 Gtior_SPEC,
9046 crate::common::RW,
9047 >::from_register(self, 0)
9048 }
9049
9050 #[doc = "GTIOCA Pin Output Setting at the Start/Stop Count"]
9051 #[inline(always)]
9052 pub fn oahld(
9053 self,
9054 ) -> crate::common::RegisterField<
9055 7,
9056 0x1,
9057 1,
9058 0,
9059 gtior::Oahld,
9060 gtior::Oahld,
9061 Gtior_SPEC,
9062 crate::common::RW,
9063 > {
9064 crate::common::RegisterField::<
9065 7,
9066 0x1,
9067 1,
9068 0,
9069 gtior::Oahld,
9070 gtior::Oahld,
9071 Gtior_SPEC,
9072 crate::common::RW,
9073 >::from_register(self, 0)
9074 }
9075
9076 #[doc = "GTIOCA Pin Output Value Setting at the Count Stop"]
9077 #[inline(always)]
9078 pub fn oadflt(
9079 self,
9080 ) -> crate::common::RegisterField<
9081 6,
9082 0x1,
9083 1,
9084 0,
9085 gtior::Oadflt,
9086 gtior::Oadflt,
9087 Gtior_SPEC,
9088 crate::common::RW,
9089 > {
9090 crate::common::RegisterField::<
9091 6,
9092 0x1,
9093 1,
9094 0,
9095 gtior::Oadflt,
9096 gtior::Oadflt,
9097 Gtior_SPEC,
9098 crate::common::RW,
9099 >::from_register(self, 0)
9100 }
9101
9102 #[doc = "GTIOCA Pin Function Select"]
9103 #[inline(always)]
9104 pub fn gtioa(
9105 self,
9106 ) -> crate::common::RegisterField<
9107 0,
9108 0x1f,
9109 1,
9110 0,
9111 gtior::Gtioa,
9112 gtior::Gtioa,
9113 Gtior_SPEC,
9114 crate::common::RW,
9115 > {
9116 crate::common::RegisterField::<
9117 0,
9118 0x1f,
9119 1,
9120 0,
9121 gtior::Gtioa,
9122 gtior::Gtioa,
9123 Gtior_SPEC,
9124 crate::common::RW,
9125 >::from_register(self, 0)
9126 }
9127}
9128impl ::core::default::Default for Gtior {
9129 #[inline(always)]
9130 fn default() -> Gtior {
9131 <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
9132 }
9133}
9134pub mod gtior {
9135
9136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9137 pub struct Nfcsb_SPEC;
9138 pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
9139 impl Nfcsb {
9140 #[doc = "PCLK/1"]
9141 pub const _00: Self = Self::new(0);
9142
9143 #[doc = "PCLK/4"]
9144 pub const _01: Self = Self::new(1);
9145
9146 #[doc = "PCLK/16"]
9147 pub const _10: Self = Self::new(2);
9148
9149 #[doc = "PCLK/64"]
9150 pub const _11: Self = Self::new(3);
9151 }
9152 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9153 pub struct Nfben_SPEC;
9154 pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
9155 impl Nfben {
9156 #[doc = "Disable noise filter for GTIOCB pin"]
9157 pub const _0: Self = Self::new(0);
9158
9159 #[doc = "Enable noise filter for GTIOCB pin"]
9160 pub const _1: Self = Self::new(1);
9161 }
9162 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9163 pub struct Obdf_SPEC;
9164 pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
9165 impl Obdf {
9166 #[doc = "Prohibit output disable"]
9167 pub const _00: Self = Self::new(0);
9168
9169 #[doc = "Set GTIOCB pin to Hi-Z on output disable"]
9170 pub const _01: Self = Self::new(1);
9171
9172 #[doc = "Set GTIOCB pin to 0 on output disable"]
9173 pub const _10: Self = Self::new(2);
9174
9175 #[doc = "Set GTIOCB pin to 1 on output disable."]
9176 pub const _11: Self = Self::new(3);
9177 }
9178 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9179 pub struct Obe_SPEC;
9180 pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
9181 impl Obe {
9182 #[doc = "Disable output"]
9183 pub const _0: Self = Self::new(0);
9184
9185 #[doc = "Enable output"]
9186 pub const _1: Self = Self::new(1);
9187 }
9188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9189 pub struct Obhld_SPEC;
9190 pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
9191 impl Obhld {
9192 #[doc = "Set GTIOCB pin output level on counting start and stop based on the register setting"]
9193 pub const _0: Self = Self::new(0);
9194
9195 #[doc = "Retain GTIOCB pin output level on counting start and stop"]
9196 pub const _1: Self = Self::new(1);
9197 }
9198 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9199 pub struct Obdflt_SPEC;
9200 pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
9201 impl Obdflt {
9202 #[doc = "Output low on GTIOCB pin when counting stops"]
9203 pub const _0: Self = Self::new(0);
9204
9205 #[doc = "Output high on GTIOCB pin when counting stops"]
9206 pub const _1: Self = Self::new(1);
9207 }
9208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9209 pub struct Gtiob_SPEC;
9210 pub type Gtiob = crate::EnumBitfieldStruct<u8, Gtiob_SPEC>;
9211 impl Gtiob {
9212 #[doc = "Initial output is Low. Output retained at cycle end. Output retained at GTCCRB compare match."]
9213 pub const _00000: Self = Self::new(0);
9214
9215 #[doc = "Initial output is Low. Output retained at cycle end. Low output at GTCCRB compare match."]
9216 pub const _00001: Self = Self::new(1);
9217
9218 #[doc = "Initial output is Low. Output retained at cycle end. High output at GTCCRB compare match."]
9219 pub const _00010: Self = Self::new(2);
9220
9221 #[doc = "Initial output is Low. Output retained at cycle end. Output toggled at GTCCRB compare match."]
9222 pub const _00011: Self = Self::new(3);
9223
9224 #[doc = "Initial output is Low. Low output at cycle end. Output retained at GTCCRB compare match."]
9225 pub const _00100: Self = Self::new(4);
9226
9227 #[doc = "Initial output is Low. Low output at cycle end. Low output at GTCCRB compare match."]
9228 pub const _00101: Self = Self::new(5);
9229
9230 #[doc = "Initial output is Low. Low output at cycle end. High output at GTCCRB compare match."]
9231 pub const _00110: Self = Self::new(6);
9232
9233 #[doc = "Initial output is Low. Low output at cycle end. Output toggled at GTCCRB compare match."]
9234 pub const _00111: Self = Self::new(7);
9235
9236 #[doc = "Initial output is Low. High output at cycle end. Output retained at GTCCRB compare match."]
9237 pub const _01000: Self = Self::new(8);
9238
9239 #[doc = "Initial output is Low. High output at cycle end. Low output at GTCCRB compare match."]
9240 pub const _01001: Self = Self::new(9);
9241
9242 #[doc = "Initial output is Low. High output at cycle end. High output at GTCCRB compare match."]
9243 pub const _01010: Self = Self::new(10);
9244
9245 #[doc = "Initial output is Low. High output at cycle end. Output toggled at GTCCRB compare match."]
9246 pub const _01011: Self = Self::new(11);
9247
9248 #[doc = "Initial output is Low. Output toggled at cycle end. Output retained at GTCCRB compare match."]
9249 pub const _01100: Self = Self::new(12);
9250
9251 #[doc = "Initial output is Low. Output toggled at cycle end. Low output at GTCCRB compare match."]
9252 pub const _01101: Self = Self::new(13);
9253
9254 #[doc = "Initial output is Low. Output toggled at cycle end. High output at GTCCRB compare match."]
9255 pub const _01110: Self = Self::new(14);
9256
9257 #[doc = "Initial output is Low. Output toggled at cycle end. Output toggled at GTCCRB compare match."]
9258 pub const _01111: Self = Self::new(15);
9259
9260 #[doc = "Initial output is High. Output retained at cycle end. Output retained at GTCCRB compare match."]
9261 pub const _10000: Self = Self::new(16);
9262
9263 #[doc = "Initial output is High. Output retained at cycle end. Low output at GTCCRB compare match."]
9264 pub const _10001: Self = Self::new(17);
9265
9266 #[doc = "Initial output is High. Output retained at cycle end. High output at GTCCRB compare match."]
9267 pub const _10010: Self = Self::new(18);
9268
9269 #[doc = "Initial output is High. Output retained at cycle end. Output toggled at GTCCRB compare match."]
9270 pub const _10011: Self = Self::new(19);
9271
9272 #[doc = "Initial output is High. Low output at cycle end. Output retained at GTCCRB compare match."]
9273 pub const _10100: Self = Self::new(20);
9274
9275 #[doc = "Initial output is High. Low output at cycle end. Low output at GTCCRB compare match."]
9276 pub const _10101: Self = Self::new(21);
9277
9278 #[doc = "Initial output is High. Low output at cycle end. High output at GTCCRB compare match."]
9279 pub const _10110: Self = Self::new(22);
9280
9281 #[doc = "Initial output is High. Low output at cycle end. Output toggled at GTCCRB compare match."]
9282 pub const _10111: Self = Self::new(23);
9283
9284 #[doc = "Initial output is High. High output at cycle end. Output retained at GTCCRB compare match."]
9285 pub const _11000: Self = Self::new(24);
9286
9287 #[doc = "Initial output is High. High output at cycle end. Low output at GTCCRB compare match."]
9288 pub const _11001: Self = Self::new(25);
9289
9290 #[doc = "Initial output is High. High output at cycle end. High output at GTCCRB compare match."]
9291 pub const _11010: Self = Self::new(26);
9292
9293 #[doc = "Initial output is High. High output at cycle end. Output toggled at GTCCRB compare match."]
9294 pub const _11011: Self = Self::new(27);
9295
9296 #[doc = "Initial output is High. Output toggled at cycle end. Output retained at GTCCRB compare match."]
9297 pub const _11100: Self = Self::new(28);
9298
9299 #[doc = "Initial output is High. Output toggled at cycle end. Low output at GTCCRB compare match."]
9300 pub const _11101: Self = Self::new(29);
9301
9302 #[doc = "Initial output is High. Output toggled at cycle end. High output at GTCCRB compare match."]
9303 pub const _11110: Self = Self::new(30);
9304
9305 #[doc = "Initial output is High. Output toggled at cycle end. Output toggled at GTCCRB compare match."]
9306 pub const _11111: Self = Self::new(31);
9307 }
9308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9309 pub struct Nfcsa_SPEC;
9310 pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
9311 impl Nfcsa {
9312 #[doc = "PCLK/1"]
9313 pub const _00: Self = Self::new(0);
9314
9315 #[doc = "PCLK/4"]
9316 pub const _01: Self = Self::new(1);
9317
9318 #[doc = "PCLK/16"]
9319 pub const _10: Self = Self::new(2);
9320
9321 #[doc = "PCLK/64"]
9322 pub const _11: Self = Self::new(3);
9323 }
9324 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9325 pub struct Nfaen_SPEC;
9326 pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
9327 impl Nfaen {
9328 #[doc = "Disable noise filter for GTIOCA pin"]
9329 pub const _0: Self = Self::new(0);
9330
9331 #[doc = "Enable noise filter for GTIOCA pin."]
9332 pub const _1: Self = Self::new(1);
9333 }
9334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9335 pub struct Oadf_SPEC;
9336 pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
9337 impl Oadf {
9338 #[doc = "Prohibit output disable"]
9339 pub const _00: Self = Self::new(0);
9340
9341 #[doc = "Set GTIOCA pin to Hi-Z on output disable"]
9342 pub const _01: Self = Self::new(1);
9343
9344 #[doc = "Set GTIOCA pin to 0 on output disable"]
9345 pub const _10: Self = Self::new(2);
9346
9347 #[doc = "Set GTIOCA pin to 1 on output disable."]
9348 pub const _11: Self = Self::new(3);
9349 }
9350 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9351 pub struct Oae_SPEC;
9352 pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
9353 impl Oae {
9354 #[doc = "Disable output"]
9355 pub const _0: Self = Self::new(0);
9356
9357 #[doc = "Enable output."]
9358 pub const _1: Self = Self::new(1);
9359 }
9360 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9361 pub struct Oahld_SPEC;
9362 pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
9363 impl Oahld {
9364 #[doc = "Set GTIOCA pin output level on counting start and stop based on the register setting."]
9365 pub const _0: Self = Self::new(0);
9366
9367 #[doc = "Retain GTIOCA pin output level on counting start and stop"]
9368 pub const _1: Self = Self::new(1);
9369 }
9370 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9371 pub struct Oadflt_SPEC;
9372 pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
9373 impl Oadflt {
9374 #[doc = "Output low on GTIOCA pin when counting stops"]
9375 pub const _0: Self = Self::new(0);
9376
9377 #[doc = "Output high on GTIOCA pin when counting stops."]
9378 pub const _1: Self = Self::new(1);
9379 }
9380 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9381 pub struct Gtioa_SPEC;
9382 pub type Gtioa = crate::EnumBitfieldStruct<u8, Gtioa_SPEC>;
9383 impl Gtioa {
9384 #[doc = "Initial output is Low. Output retained at cycle end. Output retained at GTCCRA compare match."]
9385 pub const _00000: Self = Self::new(0);
9386
9387 #[doc = "Initial output is Low. Output retained at cycle end. Low output at GTCCRA compare match."]
9388 pub const _00001: Self = Self::new(1);
9389
9390 #[doc = "Initial output is Low. Output retained at cycle end. High output at GTCCRA compare match."]
9391 pub const _00010: Self = Self::new(2);
9392
9393 #[doc = "Initial output is Low. Output retained at cycle end. Output toggled at GTCCRA compare match."]
9394 pub const _00011: Self = Self::new(3);
9395
9396 #[doc = "Initial output is Low. Low output at cycle end. Output retained at GTCCRA compare match."]
9397 pub const _00100: Self = Self::new(4);
9398
9399 #[doc = "Initial output is Low. Low output at cycle end. Low output at GTCCRA compare match."]
9400 pub const _00101: Self = Self::new(5);
9401
9402 #[doc = "Initial output is Low. Low output at cycle end. High output at GTCCRA compare match."]
9403 pub const _00110: Self = Self::new(6);
9404
9405 #[doc = "Initial output is Low. Low output at cycle end. Output toggled at GTCCRA compare match."]
9406 pub const _00111: Self = Self::new(7);
9407
9408 #[doc = "Initial output is Low. High output at cycle end. Output retained at GTCCRA compare match."]
9409 pub const _01000: Self = Self::new(8);
9410
9411 #[doc = "Initial output is Low. High output at cycle end. Low output at GTCCRA compare match."]
9412 pub const _01001: Self = Self::new(9);
9413
9414 #[doc = "Initial output is Low. High output at cycle end. High output at GTCCRA compare match."]
9415 pub const _01010: Self = Self::new(10);
9416
9417 #[doc = "Initial output is Low. High output at cycle end. Output toggled at GTCCRA compare match."]
9418 pub const _01011: Self = Self::new(11);
9419
9420 #[doc = "Initial output is Low. Output toggled at cycle end. Output retained at GTCCRA compare match."]
9421 pub const _01100: Self = Self::new(12);
9422
9423 #[doc = "Initial output is Low. Output toggled at cycle end. Low output at GTCCRA compare match."]
9424 pub const _01101: Self = Self::new(13);
9425
9426 #[doc = "Initial output is Low. Output toggled at cycle end. High output at GTCCRA compare match."]
9427 pub const _01110: Self = Self::new(14);
9428
9429 #[doc = "Initial output is Low. Output toggled at cycle end. Output toggled at GTCCRA compare match."]
9430 pub const _01111: Self = Self::new(15);
9431
9432 #[doc = "Initial output is High. Output retained at cycle end. Output retained at GTCCRA compare match."]
9433 pub const _10000: Self = Self::new(16);
9434
9435 #[doc = "Initial output is High. Output retained at cycle end. Low output at GTCCRA compare match."]
9436 pub const _10001: Self = Self::new(17);
9437
9438 #[doc = "Initial output is High. Output retained at cycle end. High output at GTCCRA compare match."]
9439 pub const _10010: Self = Self::new(18);
9440
9441 #[doc = "Initial output is High. Output retained at cycle end. Output toggled at GTCCRA compare match."]
9442 pub const _10011: Self = Self::new(19);
9443
9444 #[doc = "Initial output is High. Low output at cycle end. Output retained at GTCCRA compare match."]
9445 pub const _10100: Self = Self::new(20);
9446
9447 #[doc = "Initial output is High. Low output at cycle end. Low output at GTCCRA compare match."]
9448 pub const _10101: Self = Self::new(21);
9449
9450 #[doc = "Initial output is High. Low output at cycle end. High output at GTCCRA compare match."]
9451 pub const _10110: Self = Self::new(22);
9452
9453 #[doc = "Initial output is High. Low output at cycle end. Output toggled at GTCCRA compare match."]
9454 pub const _10111: Self = Self::new(23);
9455
9456 #[doc = "Initial output is High. High output at cycle end. Output retained at GTCCRA compare match."]
9457 pub const _11000: Self = Self::new(24);
9458
9459 #[doc = "Initial output is High. High output at cycle end. Low output at GTCCRA compare match."]
9460 pub const _11001: Self = Self::new(25);
9461
9462 #[doc = "Initial output is High. High output at cycle end. High output at GTCCRA compare match."]
9463 pub const _11010: Self = Self::new(26);
9464
9465 #[doc = "Initial output is High. High output at cycle end. Output toggled at GTCCRA compare match."]
9466 pub const _11011: Self = Self::new(27);
9467
9468 #[doc = "Initial output is High. Output toggled at cycle end. Output retained at GTCCRA compare match."]
9469 pub const _11100: Self = Self::new(28);
9470
9471 #[doc = "Initial output is High. Output toggled at cycle end. Low output at GTCCRA compare match."]
9472 pub const _11101: Self = Self::new(29);
9473
9474 #[doc = "Initial output is High. Output toggled at cycle end. High output at GTCCRA compare match."]
9475 pub const _11110: Self = Self::new(30);
9476
9477 #[doc = "Initial output is High. Output toggled at cycle end. Output toggled at GTCCRA compare match."]
9478 pub const _11111: Self = Self::new(31);
9479 }
9480}
9481#[doc(hidden)]
9482#[derive(Copy, Clone, Eq, PartialEq)]
9483pub struct Gtintad_SPEC;
9484impl crate::sealed::RegSpec for Gtintad_SPEC {
9485 type DataType = u32;
9486}
9487
9488#[doc = "General PWM Timer Interrupt Output Setting Register"]
9489pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
9490
9491impl Gtintad {
9492 #[doc = "Same Time Output Level Low Disable Request Enable"]
9493 #[inline(always)]
9494 pub fn grpabl(
9495 self,
9496 ) -> crate::common::RegisterField<
9497 30,
9498 0x1,
9499 1,
9500 0,
9501 gtintad::Grpabl,
9502 gtintad::Grpabl,
9503 Gtintad_SPEC,
9504 crate::common::RW,
9505 > {
9506 crate::common::RegisterField::<
9507 30,
9508 0x1,
9509 1,
9510 0,
9511 gtintad::Grpabl,
9512 gtintad::Grpabl,
9513 Gtintad_SPEC,
9514 crate::common::RW,
9515 >::from_register(self, 0)
9516 }
9517
9518 #[doc = "Same Time Output Level High Disable Request Enable"]
9519 #[inline(always)]
9520 pub fn grpabh(
9521 self,
9522 ) -> crate::common::RegisterField<
9523 29,
9524 0x1,
9525 1,
9526 0,
9527 gtintad::Grpabh,
9528 gtintad::Grpabh,
9529 Gtintad_SPEC,
9530 crate::common::RW,
9531 > {
9532 crate::common::RegisterField::<
9533 29,
9534 0x1,
9535 1,
9536 0,
9537 gtintad::Grpabh,
9538 gtintad::Grpabh,
9539 Gtintad_SPEC,
9540 crate::common::RW,
9541 >::from_register(self, 0)
9542 }
9543
9544 #[doc = "Output Disable Source Select"]
9545 #[inline(always)]
9546 pub fn grp(
9547 self,
9548 ) -> crate::common::RegisterField<
9549 24,
9550 0x3,
9551 1,
9552 0,
9553 gtintad::Grp,
9554 gtintad::Grp,
9555 Gtintad_SPEC,
9556 crate::common::RW,
9557 > {
9558 crate::common::RegisterField::<
9559 24,
9560 0x3,
9561 1,
9562 0,
9563 gtintad::Grp,
9564 gtintad::Grp,
9565 Gtintad_SPEC,
9566 crate::common::RW,
9567 >::from_register(self, 0)
9568 }
9569}
9570impl ::core::default::Default for Gtintad {
9571 #[inline(always)]
9572 fn default() -> Gtintad {
9573 <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
9574 }
9575}
9576pub mod gtintad {
9577
9578 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9579 pub struct Grpabl_SPEC;
9580 pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
9581 impl Grpabl {
9582 #[doc = "Disable same time output level low disable request"]
9583 pub const _0: Self = Self::new(0);
9584
9585 #[doc = "Enable same time output level low disable request"]
9586 pub const _1: Self = Self::new(1);
9587 }
9588 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9589 pub struct Grpabh_SPEC;
9590 pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
9591 impl Grpabh {
9592 #[doc = "Disable same time output level high disable request"]
9593 pub const _0: Self = Self::new(0);
9594
9595 #[doc = "Enable same time output level high disable request"]
9596 pub const _1: Self = Self::new(1);
9597 }
9598 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9599 pub struct Grp_SPEC;
9600 pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
9601 impl Grp {
9602 #[doc = "Select Group A output disable request"]
9603 pub const _00: Self = Self::new(0);
9604
9605 #[doc = "Select Group B output disable request"]
9606 pub const _01: Self = Self::new(1);
9607
9608 #[doc = "Select Group C output disable request"]
9609 pub const _10: Self = Self::new(2);
9610
9611 #[doc = "Select Group D output disable request."]
9612 pub const _11: Self = Self::new(3);
9613 }
9614}
9615#[doc(hidden)]
9616#[derive(Copy, Clone, Eq, PartialEq)]
9617pub struct Gtst_SPEC;
9618impl crate::sealed::RegSpec for Gtst_SPEC {
9619 type DataType = u32;
9620}
9621
9622#[doc = "General PWM Timer Status Register"]
9623pub type Gtst = crate::RegValueT<Gtst_SPEC>;
9624
9625impl Gtst {
9626 #[doc = "Same Time Output Level Low Disable Request Enable"]
9627 #[inline(always)]
9628 pub fn oablf(
9629 self,
9630 ) -> crate::common::RegisterField<
9631 30,
9632 0x1,
9633 1,
9634 0,
9635 gtst::Oablf,
9636 gtst::Oablf,
9637 Gtst_SPEC,
9638 crate::common::R,
9639 > {
9640 crate::common::RegisterField::<
9641 30,
9642 0x1,
9643 1,
9644 0,
9645 gtst::Oablf,
9646 gtst::Oablf,
9647 Gtst_SPEC,
9648 crate::common::R,
9649 >::from_register(self, 0)
9650 }
9651
9652 #[doc = "Same Time Output Level High Disable Request Enable"]
9653 #[inline(always)]
9654 pub fn oabhf(
9655 self,
9656 ) -> crate::common::RegisterField<
9657 29,
9658 0x1,
9659 1,
9660 0,
9661 gtst::Oabhf,
9662 gtst::Oabhf,
9663 Gtst_SPEC,
9664 crate::common::R,
9665 > {
9666 crate::common::RegisterField::<
9667 29,
9668 0x1,
9669 1,
9670 0,
9671 gtst::Oabhf,
9672 gtst::Oabhf,
9673 Gtst_SPEC,
9674 crate::common::R,
9675 >::from_register(self, 0)
9676 }
9677
9678 #[doc = "Output Disable Flag"]
9679 #[inline(always)]
9680 pub fn odf(
9681 self,
9682 ) -> crate::common::RegisterField<
9683 24,
9684 0x1,
9685 1,
9686 0,
9687 gtst::Odf,
9688 gtst::Odf,
9689 Gtst_SPEC,
9690 crate::common::R,
9691 > {
9692 crate::common::RegisterField::<
9693 24,
9694 0x1,
9695 1,
9696 0,
9697 gtst::Odf,
9698 gtst::Odf,
9699 Gtst_SPEC,
9700 crate::common::R,
9701 >::from_register(self, 0)
9702 }
9703
9704 #[doc = "Count Direction Flag"]
9705 #[inline(always)]
9706 pub fn tucf(
9707 self,
9708 ) -> crate::common::RegisterField<
9709 15,
9710 0x1,
9711 1,
9712 0,
9713 gtst::Tucf,
9714 gtst::Tucf,
9715 Gtst_SPEC,
9716 crate::common::R,
9717 > {
9718 crate::common::RegisterField::<
9719 15,
9720 0x1,
9721 1,
9722 0,
9723 gtst::Tucf,
9724 gtst::Tucf,
9725 Gtst_SPEC,
9726 crate::common::R,
9727 >::from_register(self, 0)
9728 }
9729
9730 #[doc = "Underflow Flag"]
9731 #[inline(always)]
9732 pub fn tcfpu(
9733 self,
9734 ) -> crate::common::RegisterField<
9735 7,
9736 0x1,
9737 1,
9738 0,
9739 gtst::Tcfpu,
9740 gtst::Tcfpu,
9741 Gtst_SPEC,
9742 crate::common::RW,
9743 > {
9744 crate::common::RegisterField::<
9745 7,
9746 0x1,
9747 1,
9748 0,
9749 gtst::Tcfpu,
9750 gtst::Tcfpu,
9751 Gtst_SPEC,
9752 crate::common::RW,
9753 >::from_register(self, 0)
9754 }
9755
9756 #[doc = "Overflow Flag"]
9757 #[inline(always)]
9758 pub fn tcpfo(
9759 self,
9760 ) -> crate::common::RegisterField<
9761 6,
9762 0x1,
9763 1,
9764 0,
9765 gtst::Tcpfo,
9766 gtst::Tcpfo,
9767 Gtst_SPEC,
9768 crate::common::RW,
9769 > {
9770 crate::common::RegisterField::<
9771 6,
9772 0x1,
9773 1,
9774 0,
9775 gtst::Tcpfo,
9776 gtst::Tcpfo,
9777 Gtst_SPEC,
9778 crate::common::RW,
9779 >::from_register(self, 0)
9780 }
9781
9782 #[doc = "Input Compare Match Flag F"]
9783 #[inline(always)]
9784 pub fn tcff(
9785 self,
9786 ) -> crate::common::RegisterField<
9787 5,
9788 0x1,
9789 1,
9790 0,
9791 gtst::Tcff,
9792 gtst::Tcff,
9793 Gtst_SPEC,
9794 crate::common::RW,
9795 > {
9796 crate::common::RegisterField::<
9797 5,
9798 0x1,
9799 1,
9800 0,
9801 gtst::Tcff,
9802 gtst::Tcff,
9803 Gtst_SPEC,
9804 crate::common::RW,
9805 >::from_register(self, 0)
9806 }
9807
9808 #[doc = "Input Compare Match Flag E"]
9809 #[inline(always)]
9810 pub fn tcfe(
9811 self,
9812 ) -> crate::common::RegisterField<
9813 4,
9814 0x1,
9815 1,
9816 0,
9817 gtst::Tcfe,
9818 gtst::Tcfe,
9819 Gtst_SPEC,
9820 crate::common::RW,
9821 > {
9822 crate::common::RegisterField::<
9823 4,
9824 0x1,
9825 1,
9826 0,
9827 gtst::Tcfe,
9828 gtst::Tcfe,
9829 Gtst_SPEC,
9830 crate::common::RW,
9831 >::from_register(self, 0)
9832 }
9833
9834 #[doc = "Input Compare Match Flag D"]
9835 #[inline(always)]
9836 pub fn tcfd(
9837 self,
9838 ) -> crate::common::RegisterField<
9839 3,
9840 0x1,
9841 1,
9842 0,
9843 gtst::Tcfd,
9844 gtst::Tcfd,
9845 Gtst_SPEC,
9846 crate::common::RW,
9847 > {
9848 crate::common::RegisterField::<
9849 3,
9850 0x1,
9851 1,
9852 0,
9853 gtst::Tcfd,
9854 gtst::Tcfd,
9855 Gtst_SPEC,
9856 crate::common::RW,
9857 >::from_register(self, 0)
9858 }
9859
9860 #[doc = "Input Compare Match Flag C"]
9861 #[inline(always)]
9862 pub fn tcfc(
9863 self,
9864 ) -> crate::common::RegisterField<
9865 2,
9866 0x1,
9867 1,
9868 0,
9869 gtst::Tcfc,
9870 gtst::Tcfc,
9871 Gtst_SPEC,
9872 crate::common::RW,
9873 > {
9874 crate::common::RegisterField::<
9875 2,
9876 0x1,
9877 1,
9878 0,
9879 gtst::Tcfc,
9880 gtst::Tcfc,
9881 Gtst_SPEC,
9882 crate::common::RW,
9883 >::from_register(self, 0)
9884 }
9885
9886 #[doc = "Input Capture/Compare Match Flag B"]
9887 #[inline(always)]
9888 pub fn tcfb(
9889 self,
9890 ) -> crate::common::RegisterField<
9891 1,
9892 0x1,
9893 1,
9894 0,
9895 gtst::Tcfb,
9896 gtst::Tcfb,
9897 Gtst_SPEC,
9898 crate::common::RW,
9899 > {
9900 crate::common::RegisterField::<
9901 1,
9902 0x1,
9903 1,
9904 0,
9905 gtst::Tcfb,
9906 gtst::Tcfb,
9907 Gtst_SPEC,
9908 crate::common::RW,
9909 >::from_register(self, 0)
9910 }
9911
9912 #[doc = "Input Capture/Compare Match Flag A"]
9913 #[inline(always)]
9914 pub fn tcfa(
9915 self,
9916 ) -> crate::common::RegisterField<
9917 0,
9918 0x1,
9919 1,
9920 0,
9921 gtst::Tcfa,
9922 gtst::Tcfa,
9923 Gtst_SPEC,
9924 crate::common::RW,
9925 > {
9926 crate::common::RegisterField::<
9927 0,
9928 0x1,
9929 1,
9930 0,
9931 gtst::Tcfa,
9932 gtst::Tcfa,
9933 Gtst_SPEC,
9934 crate::common::RW,
9935 >::from_register(self, 0)
9936 }
9937}
9938impl ::core::default::Default for Gtst {
9939 #[inline(always)]
9940 fn default() -> Gtst {
9941 <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
9942 }
9943}
9944pub mod gtst {
9945
9946 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9947 pub struct Oablf_SPEC;
9948 pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
9949 impl Oablf {
9950 #[doc = "GTIOCA pin and GTIOCB pin don\'t output 0 at the same time."]
9951 pub const _0: Self = Self::new(0);
9952
9953 #[doc = "GTIOCA pin and GTIOCB pin output 0 at the same time."]
9954 pub const _1: Self = Self::new(1);
9955 }
9956 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9957 pub struct Oabhf_SPEC;
9958 pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
9959 impl Oabhf {
9960 #[doc = "GTIOCA pin and GTIOCB pin don\'t output 1 at the same time."]
9961 pub const _0: Self = Self::new(0);
9962
9963 #[doc = "GTIOCA pin and GTIOCB pin output 1 at the same time."]
9964 pub const _1: Self = Self::new(1);
9965 }
9966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9967 pub struct Odf_SPEC;
9968 pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
9969 impl Odf {
9970 #[doc = "No output disable request is generated."]
9971 pub const _0: Self = Self::new(0);
9972
9973 #[doc = "An output disable request is generated."]
9974 pub const _1: Self = Self::new(1);
9975 }
9976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9977 pub struct Tucf_SPEC;
9978 pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
9979 impl Tucf {
9980 #[doc = "GTCNT counter is counting down"]
9981 pub const _0: Self = Self::new(0);
9982
9983 #[doc = "GTCNT counter is counting up."]
9984 pub const _1: Self = Self::new(1);
9985 }
9986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9987 pub struct Tcfpu_SPEC;
9988 pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
9989 impl Tcfpu {
9990 #[doc = "No underflow (trough) has occurred."]
9991 pub const _0: Self = Self::new(0);
9992
9993 #[doc = "An underflow (trough) has occurred."]
9994 pub const _1: Self = Self::new(1);
9995 }
9996 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9997 pub struct Tcpfo_SPEC;
9998 pub type Tcpfo = crate::EnumBitfieldStruct<u8, Tcpfo_SPEC>;
9999 impl Tcpfo {
10000 #[doc = "No overflow (crest) has occurred."]
10001 pub const _0: Self = Self::new(0);
10002
10003 #[doc = "An overflow (crest) has occurred."]
10004 pub const _1: Self = Self::new(1);
10005 }
10006 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10007 pub struct Tcff_SPEC;
10008 pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
10009 impl Tcff {
10010 #[doc = "No compare match of GTCCRF is generated."]
10011 pub const _0: Self = Self::new(0);
10012
10013 #[doc = "A compare match of GTCCRF is generated."]
10014 pub const _1: Self = Self::new(1);
10015 }
10016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10017 pub struct Tcfe_SPEC;
10018 pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
10019 impl Tcfe {
10020 #[doc = "No compare match of GTCCRE is generated."]
10021 pub const _0: Self = Self::new(0);
10022
10023 #[doc = "A compare match of GTCCRE is generated."]
10024 pub const _1: Self = Self::new(1);
10025 }
10026 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10027 pub struct Tcfd_SPEC;
10028 pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
10029 impl Tcfd {
10030 #[doc = "No compare match of GTCCRD is generated."]
10031 pub const _0: Self = Self::new(0);
10032
10033 #[doc = "A compare match of GTCCRD is generated."]
10034 pub const _1: Self = Self::new(1);
10035 }
10036 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10037 pub struct Tcfc_SPEC;
10038 pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
10039 impl Tcfc {
10040 #[doc = "No compare match of GTCCRC is generated."]
10041 pub const _0: Self = Self::new(0);
10042
10043 #[doc = "A compare match of GTCCRC is generated."]
10044 pub const _1: Self = Self::new(1);
10045 }
10046 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10047 pub struct Tcfb_SPEC;
10048 pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
10049 impl Tcfb {
10050 #[doc = "No input capture/compare match of GTCCRB is generated."]
10051 pub const _0: Self = Self::new(0);
10052
10053 #[doc = "An input capture/compare match of GTCCRB is generated."]
10054 pub const _1: Self = Self::new(1);
10055 }
10056 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10057 pub struct Tcfa_SPEC;
10058 pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
10059 impl Tcfa {
10060 #[doc = "No input capture/compare match of GTCCRA is generated."]
10061 pub const _0: Self = Self::new(0);
10062
10063 #[doc = "An input capture/compare match of GTCCRA is generated."]
10064 pub const _1: Self = Self::new(1);
10065 }
10066}
10067#[doc(hidden)]
10068#[derive(Copy, Clone, Eq, PartialEq)]
10069pub struct Gtber_SPEC;
10070impl crate::sealed::RegSpec for Gtber_SPEC {
10071 type DataType = u32;
10072}
10073
10074#[doc = "General PWM Timer Buffer Enable Register"]
10075pub type Gtber = crate::RegValueT<Gtber_SPEC>;
10076
10077impl Gtber {
10078 #[doc = "GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0."]
10079 #[inline(always)]
10080 pub fn ccrswt(
10081 self,
10082 ) -> crate::common::RegisterField<
10083 22,
10084 0x1,
10085 1,
10086 0,
10087 gtber::Ccrswt,
10088 gtber::Ccrswt,
10089 Gtber_SPEC,
10090 crate::common::W,
10091 > {
10092 crate::common::RegisterField::<
10093 22,
10094 0x1,
10095 1,
10096 0,
10097 gtber::Ccrswt,
10098 gtber::Ccrswt,
10099 Gtber_SPEC,
10100 crate::common::W,
10101 >::from_register(self, 0)
10102 }
10103
10104 #[doc = "GTPR Buffer Operation"]
10105 #[inline(always)]
10106 pub fn pr(
10107 self,
10108 ) -> crate::common::RegisterField<
10109 20,
10110 0x3,
10111 1,
10112 0,
10113 gtber::Pr,
10114 gtber::Pr,
10115 Gtber_SPEC,
10116 crate::common::RW,
10117 > {
10118 crate::common::RegisterField::<
10119 20,
10120 0x3,
10121 1,
10122 0,
10123 gtber::Pr,
10124 gtber::Pr,
10125 Gtber_SPEC,
10126 crate::common::RW,
10127 >::from_register(self, 0)
10128 }
10129
10130 #[doc = "GTCCRB Buffer Operation"]
10131 #[inline(always)]
10132 pub fn ccrb(
10133 self,
10134 ) -> crate::common::RegisterField<
10135 18,
10136 0x3,
10137 1,
10138 0,
10139 gtber::Ccrb,
10140 gtber::Ccrb,
10141 Gtber_SPEC,
10142 crate::common::RW,
10143 > {
10144 crate::common::RegisterField::<
10145 18,
10146 0x3,
10147 1,
10148 0,
10149 gtber::Ccrb,
10150 gtber::Ccrb,
10151 Gtber_SPEC,
10152 crate::common::RW,
10153 >::from_register(self, 0)
10154 }
10155
10156 #[doc = "GTCCRA Buffer Operation"]
10157 #[inline(always)]
10158 pub fn ccra(
10159 self,
10160 ) -> crate::common::RegisterField<
10161 16,
10162 0x3,
10163 1,
10164 0,
10165 gtber::Ccra,
10166 gtber::Ccra,
10167 Gtber_SPEC,
10168 crate::common::RW,
10169 > {
10170 crate::common::RegisterField::<
10171 16,
10172 0x3,
10173 1,
10174 0,
10175 gtber::Ccra,
10176 gtber::Ccra,
10177 Gtber_SPEC,
10178 crate::common::RW,
10179 >::from_register(self, 0)
10180 }
10181
10182 #[doc = "GTPR Buffer Operation Disable"]
10183 #[inline(always)]
10184 pub fn bd1(
10185 self,
10186 ) -> crate::common::RegisterField<
10187 1,
10188 0x1,
10189 1,
10190 0,
10191 gtber::Bd1,
10192 gtber::Bd1,
10193 Gtber_SPEC,
10194 crate::common::RW,
10195 > {
10196 crate::common::RegisterField::<
10197 1,
10198 0x1,
10199 1,
10200 0,
10201 gtber::Bd1,
10202 gtber::Bd1,
10203 Gtber_SPEC,
10204 crate::common::RW,
10205 >::from_register(self, 0)
10206 }
10207
10208 #[doc = "GTCCR Buffer Operation Disable"]
10209 #[inline(always)]
10210 pub fn bd2(
10211 self,
10212 ) -> crate::common::RegisterField<
10213 0,
10214 0x1,
10215 1,
10216 0,
10217 gtber::Bd2,
10218 gtber::Bd2,
10219 Gtber_SPEC,
10220 crate::common::RW,
10221 > {
10222 crate::common::RegisterField::<
10223 0,
10224 0x1,
10225 1,
10226 0,
10227 gtber::Bd2,
10228 gtber::Bd2,
10229 Gtber_SPEC,
10230 crate::common::RW,
10231 >::from_register(self, 0)
10232 }
10233}
10234impl ::core::default::Default for Gtber {
10235 #[inline(always)]
10236 fn default() -> Gtber {
10237 <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
10238 }
10239}
10240pub mod gtber {
10241
10242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10243 pub struct Ccrswt_SPEC;
10244 pub type Ccrswt = crate::EnumBitfieldStruct<u8, Ccrswt_SPEC>;
10245 impl Ccrswt {
10246 #[doc = "no effect"]
10247 pub const _0: Self = Self::new(0);
10248
10249 #[doc = "Forcibly performs buffer transfer of GTCCRA and GTCCRB. This bit automatically returns to 0 after the writing of 1."]
10250 pub const _1: Self = Self::new(1);
10251 }
10252 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10253 pub struct Pr_SPEC;
10254 pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
10255 impl Pr {
10256 #[doc = "Buffer operation is not performed"]
10257 pub const _00: Self = Self::new(0);
10258
10259 #[doc = "Single buffer operation (GTPBR --> GTPR)"]
10260 pub const _01: Self = Self::new(1);
10261 }
10262 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10263 pub struct Ccrb_SPEC;
10264 pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
10265 impl Ccrb {
10266 #[doc = "Buffer operation is not performed"]
10267 pub const _00: Self = Self::new(0);
10268
10269 #[doc = "Single buffer operation (GTCCRB <--> GTCCRE)"]
10270 pub const _01: Self = Self::new(1);
10271
10272 #[doc = "Double buffer operation (GTCCRB <--> GTCCRE <--> GTCCRF)"]
10273 pub const _10: Self = Self::new(2);
10274
10275 #[doc = "Double buffer operation (GTCCRB <--> GTCCRE <--> GTCCRF)"]
10276 pub const _11: Self = Self::new(3);
10277 }
10278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10279 pub struct Ccra_SPEC;
10280 pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
10281 impl Ccra {
10282 #[doc = "Buffer operation is not performed"]
10283 pub const _00: Self = Self::new(0);
10284
10285 #[doc = "Single buffer operation (GTCCRA <--> GTCCRC)"]
10286 pub const _01: Self = Self::new(1);
10287
10288 #[doc = "Double buffer operation (GTCCRA <--> GTCCRC <--> GTCCRD)"]
10289 pub const _10: Self = Self::new(2);
10290
10291 #[doc = "Double buffer operation (GTCCRA <--> GTCCRC <--> GTCCRD)"]
10292 pub const _11: Self = Self::new(3);
10293 }
10294 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10295 pub struct Bd1_SPEC;
10296 pub type Bd1 = crate::EnumBitfieldStruct<u8, Bd1_SPEC>;
10297 impl Bd1 {
10298 #[doc = "Enable buffer operation"]
10299 pub const _0: Self = Self::new(0);
10300
10301 #[doc = "Disable buffer operation."]
10302 pub const _1: Self = Self::new(1);
10303 }
10304 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10305 pub struct Bd2_SPEC;
10306 pub type Bd2 = crate::EnumBitfieldStruct<u8, Bd2_SPEC>;
10307 impl Bd2 {
10308 #[doc = "Enable buffer operation"]
10309 pub const _0: Self = Self::new(0);
10310
10311 #[doc = "Disable buffer operation."]
10312 pub const _1: Self = Self::new(1);
10313 }
10314}
10315#[doc(hidden)]
10316#[derive(Copy, Clone, Eq, PartialEq)]
10317pub struct Gtcnt_SPEC;
10318impl crate::sealed::RegSpec for Gtcnt_SPEC {
10319 type DataType = u32;
10320}
10321
10322#[doc = "General PWM Timer Counter"]
10323pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
10324
10325impl Gtcnt {
10326 #[doc = "Counter"]
10327 #[inline(always)]
10328 pub fn gtcnt(
10329 self,
10330 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtcnt_SPEC, crate::common::RW>
10331 {
10332 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtcnt_SPEC,crate::common::RW>::from_register(self,0)
10333 }
10334}
10335impl ::core::default::Default for Gtcnt {
10336 #[inline(always)]
10337 fn default() -> Gtcnt {
10338 <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
10339 }
10340}
10341
10342#[doc(hidden)]
10343#[derive(Copy, Clone, Eq, PartialEq)]
10344pub struct Gtccra_SPEC;
10345impl crate::sealed::RegSpec for Gtccra_SPEC {
10346 type DataType = u32;
10347}
10348
10349#[doc = "General PWM Timer Compare Capture Register A"]
10350pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
10351
10352impl Gtccra {
10353 #[doc = "Compare Capture Register A"]
10354 #[inline(always)]
10355 pub fn gtccra(
10356 self,
10357 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccra_SPEC, crate::common::RW>
10358 {
10359 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccra_SPEC,crate::common::RW>::from_register(self,0)
10360 }
10361}
10362impl ::core::default::Default for Gtccra {
10363 #[inline(always)]
10364 fn default() -> Gtccra {
10365 <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(4294967295)
10366 }
10367}
10368
10369#[doc(hidden)]
10370#[derive(Copy, Clone, Eq, PartialEq)]
10371pub struct Gtccrb_SPEC;
10372impl crate::sealed::RegSpec for Gtccrb_SPEC {
10373 type DataType = u32;
10374}
10375
10376#[doc = "General PWM Timer Compare Capture Register B"]
10377pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
10378
10379impl Gtccrb {
10380 #[doc = "Compare Capture Register B"]
10381 #[inline(always)]
10382 pub fn gtccrb(
10383 self,
10384 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrb_SPEC, crate::common::RW>
10385 {
10386 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrb_SPEC,crate::common::RW>::from_register(self,0)
10387 }
10388}
10389impl ::core::default::Default for Gtccrb {
10390 #[inline(always)]
10391 fn default() -> Gtccrb {
10392 <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(4294967295)
10393 }
10394}
10395
10396#[doc(hidden)]
10397#[derive(Copy, Clone, Eq, PartialEq)]
10398pub struct Gtccrc_SPEC;
10399impl crate::sealed::RegSpec for Gtccrc_SPEC {
10400 type DataType = u32;
10401}
10402
10403#[doc = "General PWM Timer Compare Capture Register C"]
10404pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
10405
10406impl Gtccrc {
10407 #[doc = "Compare Capture Register C"]
10408 #[inline(always)]
10409 pub fn gtccrc(
10410 self,
10411 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrc_SPEC, crate::common::RW>
10412 {
10413 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrc_SPEC,crate::common::RW>::from_register(self,0)
10414 }
10415}
10416impl ::core::default::Default for Gtccrc {
10417 #[inline(always)]
10418 fn default() -> Gtccrc {
10419 <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(4294967295)
10420 }
10421}
10422
10423#[doc(hidden)]
10424#[derive(Copy, Clone, Eq, PartialEq)]
10425pub struct Gtccre_SPEC;
10426impl crate::sealed::RegSpec for Gtccre_SPEC {
10427 type DataType = u32;
10428}
10429
10430#[doc = "General PWM Timer Compare Capture Register E"]
10431pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
10432
10433impl Gtccre {
10434 #[doc = "Compare Capture Register E"]
10435 #[inline(always)]
10436 pub fn gtccre(
10437 self,
10438 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccre_SPEC, crate::common::RW>
10439 {
10440 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccre_SPEC,crate::common::RW>::from_register(self,0)
10441 }
10442}
10443impl ::core::default::Default for Gtccre {
10444 #[inline(always)]
10445 fn default() -> Gtccre {
10446 <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(4294967295)
10447 }
10448}
10449
10450#[doc(hidden)]
10451#[derive(Copy, Clone, Eq, PartialEq)]
10452pub struct Gtccrd_SPEC;
10453impl crate::sealed::RegSpec for Gtccrd_SPEC {
10454 type DataType = u32;
10455}
10456
10457#[doc = "General PWM Timer Compare Capture Register D"]
10458pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
10459
10460impl Gtccrd {
10461 #[doc = "Compare Capture Register D"]
10462 #[inline(always)]
10463 pub fn gtccrd(
10464 self,
10465 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrd_SPEC, crate::common::RW>
10466 {
10467 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrd_SPEC,crate::common::RW>::from_register(self,0)
10468 }
10469}
10470impl ::core::default::Default for Gtccrd {
10471 #[inline(always)]
10472 fn default() -> Gtccrd {
10473 <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(4294967295)
10474 }
10475}
10476
10477#[doc(hidden)]
10478#[derive(Copy, Clone, Eq, PartialEq)]
10479pub struct Gtccrf_SPEC;
10480impl crate::sealed::RegSpec for Gtccrf_SPEC {
10481 type DataType = u32;
10482}
10483
10484#[doc = "General PWM Timer Compare Capture Register F"]
10485pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
10486
10487impl Gtccrf {
10488 #[doc = "Compare Capture Register F"]
10489 #[inline(always)]
10490 pub fn gtccrf(
10491 self,
10492 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtccrf_SPEC, crate::common::RW>
10493 {
10494 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtccrf_SPEC,crate::common::RW>::from_register(self,0)
10495 }
10496}
10497impl ::core::default::Default for Gtccrf {
10498 #[inline(always)]
10499 fn default() -> Gtccrf {
10500 <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(4294967295)
10501 }
10502}
10503
10504#[doc(hidden)]
10505#[derive(Copy, Clone, Eq, PartialEq)]
10506pub struct Gtpr_SPEC;
10507impl crate::sealed::RegSpec for Gtpr_SPEC {
10508 type DataType = u32;
10509}
10510
10511#[doc = "General PWM Timer Cycle Setting Register"]
10512pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
10513
10514impl Gtpr {
10515 #[doc = "Cycle Setting Register"]
10516 #[inline(always)]
10517 pub fn gtpr(
10518 self,
10519 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtpr_SPEC, crate::common::RW>
10520 {
10521 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtpr_SPEC,crate::common::RW>::from_register(self,0)
10522 }
10523}
10524impl ::core::default::Default for Gtpr {
10525 #[inline(always)]
10526 fn default() -> Gtpr {
10527 <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(4294967295)
10528 }
10529}
10530
10531#[doc(hidden)]
10532#[derive(Copy, Clone, Eq, PartialEq)]
10533pub struct Gtpbr_SPEC;
10534impl crate::sealed::RegSpec for Gtpbr_SPEC {
10535 type DataType = u32;
10536}
10537
10538#[doc = "General PWM Timer Cycle Setting Buffer Register"]
10539pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
10540
10541impl Gtpbr {
10542 #[doc = "Cycle Setting Buffer Register"]
10543 #[inline(always)]
10544 pub fn gtpbr(
10545 self,
10546 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtpbr_SPEC, crate::common::RW>
10547 {
10548 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtpbr_SPEC,crate::common::RW>::from_register(self,0)
10549 }
10550}
10551impl ::core::default::Default for Gtpbr {
10552 #[inline(always)]
10553 fn default() -> Gtpbr {
10554 <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(4294967295)
10555 }
10556}
10557
10558#[doc(hidden)]
10559#[derive(Copy, Clone, Eq, PartialEq)]
10560pub struct Gtdtcr_SPEC;
10561impl crate::sealed::RegSpec for Gtdtcr_SPEC {
10562 type DataType = u32;
10563}
10564
10565#[doc = "General PWM Timer Dead Time Control Register"]
10566pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
10567
10568impl Gtdtcr {
10569 #[doc = "Negative-Phase Waveform Setting"]
10570 #[inline(always)]
10571 pub fn tde(
10572 self,
10573 ) -> crate::common::RegisterField<
10574 0,
10575 0x1,
10576 1,
10577 0,
10578 gtdtcr::Tde,
10579 gtdtcr::Tde,
10580 Gtdtcr_SPEC,
10581 crate::common::RW,
10582 > {
10583 crate::common::RegisterField::<
10584 0,
10585 0x1,
10586 1,
10587 0,
10588 gtdtcr::Tde,
10589 gtdtcr::Tde,
10590 Gtdtcr_SPEC,
10591 crate::common::RW,
10592 >::from_register(self, 0)
10593 }
10594}
10595impl ::core::default::Default for Gtdtcr {
10596 #[inline(always)]
10597 fn default() -> Gtdtcr {
10598 <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
10599 }
10600}
10601pub mod gtdtcr {
10602
10603 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10604 pub struct Tde_SPEC;
10605 pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
10606 impl Tde {
10607 #[doc = "Set GTCCRB without using GTDVU and GTDVD."]
10608 pub const _0: Self = Self::new(0);
10609
10610 #[doc = "Use GTDVU and GTDVD to set the compare match value for negative-phase waveform with automatic dead time in GTCCRB."]
10611 pub const _1: Self = Self::new(1);
10612 }
10613}
10614#[doc(hidden)]
10615#[derive(Copy, Clone, Eq, PartialEq)]
10616pub struct Gtdvu_SPEC;
10617impl crate::sealed::RegSpec for Gtdvu_SPEC {
10618 type DataType = u32;
10619}
10620
10621#[doc = "General PWM Timer Dead Time Value Register U"]
10622pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
10623
10624impl Gtdvu {
10625 #[doc = "Dead Time Value Register U"]
10626 #[inline(always)]
10627 pub fn gtdvu(
10628 self,
10629 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Gtdvu_SPEC, crate::common::RW>
10630 {
10631 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Gtdvu_SPEC,crate::common::RW>::from_register(self,0)
10632 }
10633}
10634impl ::core::default::Default for Gtdvu {
10635 #[inline(always)]
10636 fn default() -> Gtdvu {
10637 <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(4294967295)
10638 }
10639}