1#[doc = "Register `TRACECTR` reader"]
2pub struct R(crate::R<TRACECTR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TRACECTR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TRACECTR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TRACECTR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TRACECTR` writer"]
17pub struct W(crate::W<TRACECTR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TRACECTR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TRACECTR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TRACECTR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ENETBFULL` reader - Enable bit for halt request by ETB full"]
38pub type ENETBFULL_R = crate::BitReader<ENETBFULL_A>;
39#[doc = "Enable bit for halt request by ETB full\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum ENETBFULL_A {
42 #[doc = "0: ETB full does not cause CPU halt"]
43 _0 = 0,
44 #[doc = "1: ETB full cause CPU halt"]
45 _1 = 1,
46}
47impl From<ENETBFULL_A> for bool {
48 #[inline(always)]
49 fn from(variant: ENETBFULL_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl ENETBFULL_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> ENETBFULL_A {
57 match self.bits {
58 false => ENETBFULL_A::_0,
59 true => ENETBFULL_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == ENETBFULL_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == ENETBFULL_A::_1
71 }
72}
73#[doc = "Field `ENETBFULL` writer - Enable bit for halt request by ETB full"]
74pub type ENETBFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACECTR_SPEC, ENETBFULL_A, O>;
75impl<'a, const O: u8> ENETBFULL_W<'a, O> {
76 #[doc = "ETB full does not cause CPU halt"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(ENETBFULL_A::_0)
80 }
81 #[doc = "ETB full cause CPU halt"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(ENETBFULL_A::_1)
85 }
86}
87impl R {
88 #[doc = "Bit 31 - Enable bit for halt request by ETB full"]
89 #[inline(always)]
90 pub fn enetbfull(&self) -> ENETBFULL_R {
91 ENETBFULL_R::new(((self.bits >> 31) & 1) != 0)
92 }
93}
94impl W {
95 #[doc = "Bit 31 - Enable bit for halt request by ETB full"]
96 #[inline(always)]
97 #[must_use]
98 pub fn enetbfull(&mut self) -> ENETBFULL_W<31> {
99 ENETBFULL_W::new(self)
100 }
101 #[doc = "Writes raw bits to the register."]
102 #[inline(always)]
103 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
104 self.0.bits(bits);
105 self
106 }
107}
108#[doc = "Trace Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tracectr](index.html) module"]
109pub struct TRACECTR_SPEC;
110impl crate::RegisterSpec for TRACECTR_SPEC {
111 type Ux = u32;
112}
113#[doc = "`read()` method returns [tracectr::R](R) reader structure"]
114impl crate::Readable for TRACECTR_SPEC {
115 type Reader = R;
116}
117#[doc = "`write(|w| ..)` method takes [tracectr::W](W) writer structure"]
118impl crate::Writable for TRACECTR_SPEC {
119 type Writer = W;
120 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
122}
123#[doc = "`reset()` method sets TRACECTR to value 0"]
124impl crate::Resettable for TRACECTR_SPEC {
125 const RESET_VALUE: Self::Ux = 0;
126}