1#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm 32-bit Cortex-M4F Microcontroller based device, CPU clock up to 120MHz, etc."]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "acmphs0")]
31pub mod acmphs0;
32#[cfg(feature = "acmphs1")]
33pub mod acmphs1;
34#[cfg(feature = "adc120")]
35pub mod adc120;
36#[cfg(feature = "adc121")]
37pub mod adc121;
38#[cfg(feature = "agt0")]
39pub mod agt0;
40#[cfg(feature = "bus")]
41pub mod bus;
42#[cfg(feature = "cac")]
43pub mod cac;
44#[cfg(feature = "can0")]
45pub mod can0;
46#[cfg(feature = "crc")]
47pub mod crc;
48#[cfg(feature = "ctsu")]
49pub mod ctsu;
50#[cfg(feature = "dac12")]
51pub mod dac12;
52#[cfg(feature = "dbg")]
53pub mod dbg;
54#[cfg(feature = "dma")]
55pub mod dma;
56#[cfg(feature = "dmac0")]
57pub mod dmac0;
58#[cfg(feature = "doc")]
59pub mod doc;
60#[cfg(feature = "dtc")]
61pub mod dtc;
62#[cfg(feature = "elc")]
63pub mod elc;
64#[cfg(feature = "fcache")]
65pub mod fcache;
66#[cfg(feature = "gpt328")]
67pub mod gpt328;
68#[cfg(feature = "gpt32eh0")]
69pub mod gpt32eh0;
70#[cfg(feature = "gpt_odc")]
71pub mod gpt_odc;
72#[cfg(feature = "gpt_ops")]
73pub mod gpt_ops;
74#[cfg(feature = "icu")]
75pub mod icu;
76#[cfg(feature = "iic0")]
77pub mod iic0;
78#[cfg(feature = "iic1")]
79pub mod iic1;
80#[cfg(feature = "irda")]
81pub mod irda;
82#[cfg(feature = "iwdt")]
83pub mod iwdt;
84#[cfg(feature = "kint")]
85pub mod kint;
86#[cfg(feature = "mmf")]
87pub mod mmf;
88#[cfg(feature = "mmpu")]
89pub mod mmpu;
90#[cfg(feature = "mstp")]
91pub mod mstp;
92#[cfg(feature = "pfs")]
93pub mod pfs;
94#[cfg(feature = "pmisc")]
95pub mod pmisc;
96#[cfg(feature = "poeg")]
97pub mod poeg;
98#[cfg(feature = "port0")]
99pub mod port0;
100#[cfg(feature = "port1")]
101pub mod port1;
102#[cfg(feature = "qspi")]
103pub mod qspi;
104#[cfg(feature = "rtc")]
105pub mod rtc;
106#[cfg(feature = "sci0")]
107pub mod sci0;
108#[cfg(feature = "sdhi0")]
109pub mod sdhi0;
110#[cfg(feature = "smpu")]
111pub mod smpu;
112#[cfg(feature = "spi0")]
113pub mod spi0;
114#[cfg(feature = "spmon")]
115pub mod spmon;
116#[cfg(feature = "sram")]
117pub mod sram;
118#[cfg(feature = "src")]
119pub mod src;
120#[cfg(feature = "srcram")]
121pub mod srcram;
122#[cfg(feature = "ssie0")]
123pub mod ssie0;
124#[cfg(feature = "system")]
125pub mod system;
126#[cfg(feature = "tsd")]
127pub mod tsd;
128#[cfg(feature = "tsn")]
129pub mod tsn;
130#[cfg(feature = "usbfs")]
131pub mod usbfs;
132#[cfg(feature = "wdt")]
133pub mod wdt;
134
135#[cfg(feature = "dac12")]
136#[derive(Copy, Clone, Eq, PartialEq)]
137pub struct Dac12 {
138 ptr: *mut u8,
139}
140#[cfg(feature = "dac12")]
141pub const DAC12: self::Dac12 = self::Dac12 {
142 ptr: 0x4005e000u32 as _,
143};
144#[cfg(feature = "acmphs0")]
145#[derive(Copy, Clone, Eq, PartialEq)]
146pub struct Acmphs0 {
147 ptr: *mut u8,
148}
149#[cfg(feature = "acmphs0")]
150pub const ACMPHS0: self::Acmphs0 = self::Acmphs0 {
151 ptr: 0x40085000u32 as _,
152};
153#[cfg(feature = "acmphs1")]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Acmphs1 {
156 ptr: *mut u8,
157}
158#[cfg(feature = "acmphs1")]
159pub const ACMPHS1: self::Acmphs1 = self::Acmphs1 {
160 ptr: 0x40085100u32 as _,
161};
162#[cfg(feature = "acmphs2")]
163pub const ACMPHS2: self::Acmphs1 = self::Acmphs1 {
164 ptr: 0x40085200u32 as _,
165};
166#[cfg(feature = "acmphs3")]
167pub const ACMPHS3: self::Acmphs1 = self::Acmphs1 {
168 ptr: 0x40085300u32 as _,
169};
170#[cfg(feature = "acmphs4")]
171pub const ACMPHS4: self::Acmphs1 = self::Acmphs1 {
172 ptr: 0x40085400u32 as _,
173};
174#[cfg(feature = "acmphs5")]
175pub const ACMPHS5: self::Acmphs1 = self::Acmphs1 {
176 ptr: 0x40085500u32 as _,
177};
178#[cfg(feature = "tsn")]
179#[derive(Copy, Clone, Eq, PartialEq)]
180pub struct Tsn {
181 ptr: *mut u8,
182}
183#[cfg(feature = "tsn")]
184pub const TSN: self::Tsn = self::Tsn {
185 ptr: 0x4005d000u32 as _,
186};
187#[cfg(feature = "crc")]
188#[derive(Copy, Clone, Eq, PartialEq)]
189pub struct Crc {
190 ptr: *mut u8,
191}
192#[cfg(feature = "crc")]
193pub const CRC: self::Crc = self::Crc {
194 ptr: 0x40074000u32 as _,
195};
196#[cfg(feature = "ssie0")]
197#[derive(Copy, Clone, Eq, PartialEq)]
198pub struct Ssie0 {
199 ptr: *mut u8,
200}
201#[cfg(feature = "ssie0")]
202pub const SSIE0: self::Ssie0 = self::Ssie0 {
203 ptr: 0x4004e000u32 as _,
204};
205#[cfg(feature = "elc")]
206#[derive(Copy, Clone, Eq, PartialEq)]
207pub struct Elc {
208 ptr: *mut u8,
209}
210#[cfg(feature = "elc")]
211pub const ELC: self::Elc = self::Elc {
212 ptr: 0x40041000u32 as _,
213};
214#[cfg(feature = "cac")]
215#[derive(Copy, Clone, Eq, PartialEq)]
216pub struct Cac {
217 ptr: *mut u8,
218}
219#[cfg(feature = "cac")]
220pub const CAC: self::Cac = self::Cac {
221 ptr: 0x40044600u32 as _,
222};
223#[cfg(feature = "doc")]
224#[derive(Copy, Clone, Eq, PartialEq)]
225pub struct Doc {
226 ptr: *mut u8,
227}
228#[cfg(feature = "doc")]
229pub const DOC: self::Doc = self::Doc {
230 ptr: 0x40054100u32 as _,
231};
232#[cfg(feature = "iwdt")]
233#[derive(Copy, Clone, Eq, PartialEq)]
234pub struct Iwdt {
235 ptr: *mut u8,
236}
237#[cfg(feature = "iwdt")]
238pub const IWDT: self::Iwdt = self::Iwdt {
239 ptr: 0x40044400u32 as _,
240};
241#[cfg(feature = "kint")]
242#[derive(Copy, Clone, Eq, PartialEq)]
243pub struct Kint {
244 ptr: *mut u8,
245}
246#[cfg(feature = "kint")]
247pub const KINT: self::Kint = self::Kint {
248 ptr: 0x40080000u32 as _,
249};
250#[cfg(feature = "wdt")]
251#[derive(Copy, Clone, Eq, PartialEq)]
252pub struct Wdt {
253 ptr: *mut u8,
254}
255#[cfg(feature = "wdt")]
256pub const WDT: self::Wdt = self::Wdt {
257 ptr: 0x40044200u32 as _,
258};
259#[cfg(feature = "usbfs")]
260#[derive(Copy, Clone, Eq, PartialEq)]
261pub struct Usbfs {
262 ptr: *mut u8,
263}
264#[cfg(feature = "usbfs")]
265pub const USBFS: self::Usbfs = self::Usbfs {
266 ptr: 0x40090000u32 as _,
267};
268#[cfg(feature = "can0")]
269#[derive(Copy, Clone, Eq, PartialEq)]
270pub struct Can0 {
271 ptr: *mut u8,
272}
273#[cfg(feature = "can0")]
274pub const CAN0: self::Can0 = self::Can0 {
275 ptr: 0x40050000u32 as _,
276};
277#[cfg(feature = "can1")]
278pub const CAN1: self::Can0 = self::Can0 {
279 ptr: 0x40051000u32 as _,
280};
281#[cfg(feature = "irda")]
282#[derive(Copy, Clone, Eq, PartialEq)]
283pub struct Irda {
284 ptr: *mut u8,
285}
286#[cfg(feature = "irda")]
287pub const IRDA: self::Irda = self::Irda {
288 ptr: 0x40070f00u32 as _,
289};
290#[cfg(feature = "qspi")]
291#[derive(Copy, Clone, Eq, PartialEq)]
292pub struct Qspi {
293 ptr: *mut u8,
294}
295#[cfg(feature = "qspi")]
296pub const QSPI: self::Qspi = self::Qspi {
297 ptr: 0x64000000u32 as _,
298};
299#[cfg(feature = "spi0")]
300#[derive(Copy, Clone, Eq, PartialEq)]
301pub struct Spi0 {
302 ptr: *mut u8,
303}
304#[cfg(feature = "spi0")]
305pub const SPI0: self::Spi0 = self::Spi0 {
306 ptr: 0x40072000u32 as _,
307};
308#[cfg(feature = "spi1")]
309pub const SPI1: self::Spi0 = self::Spi0 {
310 ptr: 0x40072100u32 as _,
311};
312#[cfg(feature = "srcram")]
313#[derive(Copy, Clone, Eq, PartialEq)]
314pub struct Srcram {
315 ptr: *mut u8,
316}
317#[cfg(feature = "srcram")]
318pub const SRCRAM: self::Srcram = self::Srcram {
319 ptr: 0x40048000u32 as _,
320};
321#[cfg(feature = "src")]
322#[derive(Copy, Clone, Eq, PartialEq)]
323pub struct Src {
324 ptr: *mut u8,
325}
326#[cfg(feature = "src")]
327pub const SRC: self::Src = self::Src {
328 ptr: 0x4004dff0u32 as _,
329};
330#[cfg(feature = "dbg")]
331#[derive(Copy, Clone, Eq, PartialEq)]
332pub struct Dbg {
333 ptr: *mut u8,
334}
335#[cfg(feature = "dbg")]
336pub const DBG: self::Dbg = self::Dbg {
337 ptr: 0x4001b000u32 as _,
338};
339#[cfg(feature = "dmac0")]
340#[derive(Copy, Clone, Eq, PartialEq)]
341pub struct Dmac0 {
342 ptr: *mut u8,
343}
344#[cfg(feature = "dmac0")]
345pub const DMAC0: self::Dmac0 = self::Dmac0 {
346 ptr: 0x40005000u32 as _,
347};
348#[cfg(feature = "dmac1")]
349pub const DMAC1: self::Dmac0 = self::Dmac0 {
350 ptr: 0x40005040u32 as _,
351};
352#[cfg(feature = "dmac2")]
353pub const DMAC2: self::Dmac0 = self::Dmac0 {
354 ptr: 0x40005080u32 as _,
355};
356#[cfg(feature = "dmac3")]
357pub const DMAC3: self::Dmac0 = self::Dmac0 {
358 ptr: 0x400050c0u32 as _,
359};
360#[cfg(feature = "dmac4")]
361pub const DMAC4: self::Dmac0 = self::Dmac0 {
362 ptr: 0x40005100u32 as _,
363};
364#[cfg(feature = "dmac5")]
365pub const DMAC5: self::Dmac0 = self::Dmac0 {
366 ptr: 0x40005140u32 as _,
367};
368#[cfg(feature = "dmac6")]
369pub const DMAC6: self::Dmac0 = self::Dmac0 {
370 ptr: 0x40005180u32 as _,
371};
372#[cfg(feature = "dmac7")]
373pub const DMAC7: self::Dmac0 = self::Dmac0 {
374 ptr: 0x400051c0u32 as _,
375};
376#[cfg(feature = "dma")]
377#[derive(Copy, Clone, Eq, PartialEq)]
378pub struct Dma {
379 ptr: *mut u8,
380}
381#[cfg(feature = "dma")]
382pub const DMA: self::Dma = self::Dma {
383 ptr: 0x40005200u32 as _,
384};
385#[cfg(feature = "dtc")]
386#[derive(Copy, Clone, Eq, PartialEq)]
387pub struct Dtc {
388 ptr: *mut u8,
389}
390#[cfg(feature = "dtc")]
391pub const DTC: self::Dtc = self::Dtc {
392 ptr: 0x40005400u32 as _,
393};
394#[cfg(feature = "mmf")]
395#[derive(Copy, Clone, Eq, PartialEq)]
396pub struct Mmf {
397 ptr: *mut u8,
398}
399#[cfg(feature = "mmf")]
400pub const MMF: self::Mmf = self::Mmf {
401 ptr: 0x40001000u32 as _,
402};
403#[cfg(feature = "sram")]
404#[derive(Copy, Clone, Eq, PartialEq)]
405pub struct Sram {
406 ptr: *mut u8,
407}
408#[cfg(feature = "sram")]
409pub const SRAM: self::Sram = self::Sram {
410 ptr: 0x40002000u32 as _,
411};
412#[cfg(feature = "fcache")]
413#[derive(Copy, Clone, Eq, PartialEq)]
414pub struct Fcache {
415 ptr: *mut u8,
416}
417#[cfg(feature = "fcache")]
418pub const FCACHE: self::Fcache = self::Fcache {
419 ptr: 0x4001c000u32 as _,
420};
421#[cfg(feature = "system")]
422#[derive(Copy, Clone, Eq, PartialEq)]
423pub struct System {
424 ptr: *mut u8,
425}
426#[cfg(feature = "system")]
427pub const SYSTEM: self::System = self::System {
428 ptr: 0x4001e000u32 as _,
429};
430#[cfg(feature = "mstp")]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct Mstp {
433 ptr: *mut u8,
434}
435#[cfg(feature = "mstp")]
436pub const MSTP: self::Mstp = self::Mstp {
437 ptr: 0x40047000u32 as _,
438};
439#[cfg(feature = "rtc")]
440#[derive(Copy, Clone, Eq, PartialEq)]
441pub struct Rtc {
442 ptr: *mut u8,
443}
444#[cfg(feature = "rtc")]
445pub const RTC: self::Rtc = self::Rtc {
446 ptr: 0x40044000u32 as _,
447};
448#[cfg(feature = "agt0")]
449#[derive(Copy, Clone, Eq, PartialEq)]
450pub struct Agt0 {
451 ptr: *mut u8,
452}
453#[cfg(feature = "agt0")]
454pub const AGT0: self::Agt0 = self::Agt0 {
455 ptr: 0x40084000u32 as _,
456};
457#[cfg(feature = "agt1")]
458pub const AGT1: self::Agt0 = self::Agt0 {
459 ptr: 0x40084100u32 as _,
460};
461#[cfg(feature = "gpt_ops")]
462#[derive(Copy, Clone, Eq, PartialEq)]
463pub struct GptOps {
464 ptr: *mut u8,
465}
466#[cfg(feature = "gpt_ops")]
467pub const GPT_OPS: self::GptOps = self::GptOps {
468 ptr: 0x40078ff0u32 as _,
469};
470#[cfg(feature = "gpt32eh0")]
471#[derive(Copy, Clone, Eq, PartialEq)]
472pub struct Gpt32Eh0 {
473 ptr: *mut u8,
474}
475#[cfg(feature = "gpt32eh0")]
476pub const GPT32EH0: self::Gpt32Eh0 = self::Gpt32Eh0 {
477 ptr: 0x40078000u32 as _,
478};
479#[cfg(feature = "gpt32eh1")]
480pub const GPT32EH1: self::Gpt32Eh0 = self::Gpt32Eh0 {
481 ptr: 0x40078100u32 as _,
482};
483#[cfg(feature = "gpt32eh2")]
484pub const GPT32EH2: self::Gpt32Eh0 = self::Gpt32Eh0 {
485 ptr: 0x40078200u32 as _,
486};
487#[cfg(feature = "gpt32eh3")]
488pub const GPT32EH3: self::Gpt32Eh0 = self::Gpt32Eh0 {
489 ptr: 0x40078300u32 as _,
490};
491#[cfg(feature = "gpt32e4")]
492pub const GPT32E4: self::Gpt32Eh0 = self::Gpt32Eh0 {
493 ptr: 0x40078400u32 as _,
494};
495#[cfg(feature = "gpt32e5")]
496pub const GPT32E5: self::Gpt32Eh0 = self::Gpt32Eh0 {
497 ptr: 0x40078500u32 as _,
498};
499#[cfg(feature = "gpt32e6")]
500pub const GPT32E6: self::Gpt32Eh0 = self::Gpt32Eh0 {
501 ptr: 0x40078600u32 as _,
502};
503#[cfg(feature = "gpt32e7")]
504pub const GPT32E7: self::Gpt32Eh0 = self::Gpt32Eh0 {
505 ptr: 0x40078700u32 as _,
506};
507#[cfg(feature = "poeg")]
508#[derive(Copy, Clone, Eq, PartialEq)]
509pub struct Poeg {
510 ptr: *mut u8,
511}
512#[cfg(feature = "poeg")]
513pub const POEG: self::Poeg = self::Poeg {
514 ptr: 0x40042000u32 as _,
515};
516#[cfg(feature = "gpt_odc")]
517#[derive(Copy, Clone, Eq, PartialEq)]
518pub struct GptOdc {
519 ptr: *mut u8,
520}
521#[cfg(feature = "gpt_odc")]
522pub const GPT_ODC: self::GptOdc = self::GptOdc {
523 ptr: 0x4007b000u32 as _,
524};
525#[cfg(feature = "bus")]
526#[derive(Copy, Clone, Eq, PartialEq)]
527pub struct Bus {
528 ptr: *mut u8,
529}
530#[cfg(feature = "bus")]
531pub const BUS: self::Bus = self::Bus {
532 ptr: 0x40003000u32 as _,
533};
534#[cfg(feature = "icu")]
535#[derive(Copy, Clone, Eq, PartialEq)]
536pub struct Icu {
537 ptr: *mut u8,
538}
539#[cfg(feature = "icu")]
540pub const ICU: self::Icu = self::Icu {
541 ptr: 0x40006000u32 as _,
542};
543#[cfg(feature = "port0")]
544#[derive(Copy, Clone, Eq, PartialEq)]
545pub struct Port0 {
546 ptr: *mut u8,
547}
548#[cfg(feature = "port0")]
549pub const PORT0: self::Port0 = self::Port0 {
550 ptr: 0x40040000u32 as _,
551};
552#[cfg(feature = "port1")]
553#[derive(Copy, Clone, Eq, PartialEq)]
554pub struct Port1 {
555 ptr: *mut u8,
556}
557#[cfg(feature = "port1")]
558pub const PORT1: self::Port1 = self::Port1 {
559 ptr: 0x40040020u32 as _,
560};
561#[cfg(feature = "port2")]
562pub const PORT2: self::Port1 = self::Port1 {
563 ptr: 0x40040040u32 as _,
564};
565#[cfg(feature = "port3")]
566pub const PORT3: self::Port1 = self::Port1 {
567 ptr: 0x40040060u32 as _,
568};
569#[cfg(feature = "port4")]
570pub const PORT4: self::Port1 = self::Port1 {
571 ptr: 0x40040080u32 as _,
572};
573#[cfg(feature = "port5")]
574pub const PORT5: self::Port0 = self::Port0 {
575 ptr: 0x400400a0u32 as _,
576};
577#[cfg(feature = "port6")]
578pub const PORT6: self::Port0 = self::Port0 {
579 ptr: 0x400400c0u32 as _,
580};
581#[cfg(feature = "port7")]
582pub const PORT7: self::Port0 = self::Port0 {
583 ptr: 0x400400e0u32 as _,
584};
585#[cfg(feature = "pfs")]
586#[derive(Copy, Clone, Eq, PartialEq)]
587pub struct Pfs {
588 ptr: *mut u8,
589}
590#[cfg(feature = "pfs")]
591pub const PFS: self::Pfs = self::Pfs {
592 ptr: 0x40040800u32 as _,
593};
594#[cfg(feature = "pmisc")]
595#[derive(Copy, Clone, Eq, PartialEq)]
596pub struct Pmisc {
597 ptr: *mut u8,
598}
599#[cfg(feature = "pmisc")]
600pub const PMISC: self::Pmisc = self::Pmisc {
601 ptr: 0x40040d00u32 as _,
602};
603#[cfg(feature = "iic0")]
604#[derive(Copy, Clone, Eq, PartialEq)]
605pub struct Iic0 {
606 ptr: *mut u8,
607}
608#[cfg(feature = "iic0")]
609pub const IIC0: self::Iic0 = self::Iic0 {
610 ptr: 0x40053000u32 as _,
611};
612#[cfg(feature = "iic1")]
613#[derive(Copy, Clone, Eq, PartialEq)]
614pub struct Iic1 {
615 ptr: *mut u8,
616}
617#[cfg(feature = "iic1")]
618pub const IIC1: self::Iic1 = self::Iic1 {
619 ptr: 0x40053100u32 as _,
620};
621#[cfg(feature = "sci0")]
622#[derive(Copy, Clone, Eq, PartialEq)]
623pub struct Sci0 {
624 ptr: *mut u8,
625}
626#[cfg(feature = "sci0")]
627pub const SCI0: self::Sci0 = self::Sci0 {
628 ptr: 0x40070000u32 as _,
629};
630#[cfg(feature = "sci1")]
631pub const SCI1: self::Sci0 = self::Sci0 {
632 ptr: 0x40070020u32 as _,
633};
634#[cfg(feature = "sci2")]
635pub const SCI2: self::Sci0 = self::Sci0 {
636 ptr: 0x40070040u32 as _,
637};
638#[cfg(feature = "sci3")]
639pub const SCI3: self::Sci0 = self::Sci0 {
640 ptr: 0x40070060u32 as _,
641};
642#[cfg(feature = "sci4")]
643pub const SCI4: self::Sci0 = self::Sci0 {
644 ptr: 0x40070080u32 as _,
645};
646#[cfg(feature = "sci8")]
647pub const SCI8: self::Sci0 = self::Sci0 {
648 ptr: 0x40070100u32 as _,
649};
650#[cfg(feature = "sci9")]
651pub const SCI9: self::Sci0 = self::Sci0 {
652 ptr: 0x40070120u32 as _,
653};
654#[cfg(feature = "sdhi0")]
655#[derive(Copy, Clone, Eq, PartialEq)]
656pub struct Sdhi0 {
657 ptr: *mut u8,
658}
659#[cfg(feature = "sdhi0")]
660pub const SDHI0: self::Sdhi0 = self::Sdhi0 {
661 ptr: 0x40062000u32 as _,
662};
663#[cfg(feature = "sdhi1")]
664pub const SDHI1: self::Sdhi0 = self::Sdhi0 {
665 ptr: 0x40062400u32 as _,
666};
667#[cfg(feature = "gpt328")]
668#[derive(Copy, Clone, Eq, PartialEq)]
669pub struct Gpt328 {
670 ptr: *mut u8,
671}
672#[cfg(feature = "gpt328")]
673pub const GPT328: self::Gpt328 = self::Gpt328 {
674 ptr: 0x40078800u32 as _,
675};
676#[cfg(feature = "gpt329")]
677pub const GPT329: self::Gpt328 = self::Gpt328 {
678 ptr: 0x40078900u32 as _,
679};
680#[cfg(feature = "gpt3210")]
681pub const GPT3210: self::Gpt328 = self::Gpt328 {
682 ptr: 0x40078a00u32 as _,
683};
684#[cfg(feature = "gpt3211")]
685pub const GPT3211: self::Gpt328 = self::Gpt328 {
686 ptr: 0x40078b00u32 as _,
687};
688#[cfg(feature = "gpt3212")]
689pub const GPT3212: self::Gpt328 = self::Gpt328 {
690 ptr: 0x40078c00u32 as _,
691};
692#[cfg(feature = "adc120")]
693#[derive(Copy, Clone, Eq, PartialEq)]
694pub struct Adc120 {
695 ptr: *mut u8,
696}
697#[cfg(feature = "adc120")]
698pub const ADC120: self::Adc120 = self::Adc120 {
699 ptr: 0x4005c000u32 as _,
700};
701#[cfg(feature = "adc121")]
702#[derive(Copy, Clone, Eq, PartialEq)]
703pub struct Adc121 {
704 ptr: *mut u8,
705}
706#[cfg(feature = "adc121")]
707pub const ADC121: self::Adc121 = self::Adc121 {
708 ptr: 0x4005c200u32 as _,
709};
710#[cfg(feature = "ctsu")]
711#[derive(Copy, Clone, Eq, PartialEq)]
712pub struct Ctsu {
713 ptr: *mut u8,
714}
715#[cfg(feature = "ctsu")]
716pub const CTSU: self::Ctsu = self::Ctsu {
717 ptr: 0x40081000u32 as _,
718};
719#[cfg(feature = "mmpu")]
720#[derive(Copy, Clone, Eq, PartialEq)]
721pub struct Mmpu {
722 ptr: *mut u8,
723}
724#[cfg(feature = "mmpu")]
725pub const MMPU: self::Mmpu = self::Mmpu {
726 ptr: 0x40000000u32 as _,
727};
728#[cfg(feature = "smpu")]
729#[derive(Copy, Clone, Eq, PartialEq)]
730pub struct Smpu {
731 ptr: *mut u8,
732}
733#[cfg(feature = "smpu")]
734pub const SMPU: self::Smpu = self::Smpu {
735 ptr: 0x40000c00u32 as _,
736};
737#[cfg(feature = "spmon")]
738#[derive(Copy, Clone, Eq, PartialEq)]
739pub struct Spmon {
740 ptr: *mut u8,
741}
742#[cfg(feature = "spmon")]
743pub const SPMON: self::Spmon = self::Spmon {
744 ptr: 0x40000d00u32 as _,
745};
746#[cfg(feature = "tsd")]
747#[derive(Copy, Clone, Eq, PartialEq)]
748pub struct Tsd {
749 ptr: *mut u8,
750}
751#[cfg(feature = "tsd")]
752pub const TSD: self::Tsd = self::Tsd {
753 ptr: 0x407fb17cu32 as _,
754};
755
756pub use cortex_m::peripheral::Peripherals as CorePeripherals;
757pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
758#[doc = "Number available in the NVIC for configuring priority"]
759pub const NVIC_PRIO_BITS: u8 = 4;
760#[doc(hidden)]
761pub union Vector {
762 _handler: unsafe extern "C" fn(),
763 _reserved: u32,
764}
765#[cfg(feature = "rt")]
766pub use self::Interrupt as interrupt;
767#[cfg(feature = "rt")]
768pub use cortex_m_rt::interrupt;
769#[cfg(feature = "rt")]
770pub mod interrupt_handlers {
771 unsafe extern "C" {
772 pub fn IEL0();
773 pub fn IEL1();
774 pub fn IEL2();
775 pub fn IEL3();
776 pub fn IEL4();
777 pub fn IEL5();
778 pub fn IEL6();
779 pub fn IEL7();
780 pub fn IEL8();
781 pub fn IEL9();
782 pub fn IEL10();
783 pub fn IEL11();
784 pub fn IEL12();
785 pub fn IEL13();
786 pub fn IEL14();
787 pub fn IEL15();
788 pub fn IEL16();
789 pub fn IEL17();
790 pub fn IEL18();
791 pub fn IEL19();
792 pub fn IEL20();
793 pub fn IEL21();
794 pub fn IEL22();
795 pub fn IEL23();
796 pub fn IEL24();
797 pub fn IEL25();
798 pub fn IEL26();
799 pub fn IEL27();
800 pub fn IEL28();
801 pub fn IEL29();
802 pub fn IEL30();
803 pub fn IEL31();
804 pub fn IEL32();
805 pub fn IEL33();
806 pub fn IEL34();
807 pub fn IEL35();
808 pub fn IEL36();
809 pub fn IEL37();
810 pub fn IEL38();
811 pub fn IEL39();
812 pub fn IEL40();
813 pub fn IEL41();
814 pub fn IEL42();
815 pub fn IEL43();
816 pub fn IEL44();
817 pub fn IEL45();
818 pub fn IEL46();
819 pub fn IEL47();
820 pub fn IEL48();
821 pub fn IEL49();
822 pub fn IEL50();
823 pub fn IEL51();
824 pub fn IEL52();
825 pub fn IEL53();
826 pub fn IEL54();
827 pub fn IEL55();
828 pub fn IEL56();
829 pub fn IEL57();
830 pub fn IEL58();
831 pub fn IEL59();
832 pub fn IEL60();
833 pub fn IEL61();
834 pub fn IEL62();
835 pub fn IEL63();
836 pub fn IEL64();
837 pub fn IEL65();
838 pub fn IEL66();
839 pub fn IEL67();
840 pub fn IEL68();
841 pub fn IEL69();
842 pub fn IEL70();
843 pub fn IEL71();
844 pub fn IEL72();
845 pub fn IEL73();
846 pub fn IEL74();
847 pub fn IEL75();
848 pub fn IEL76();
849 pub fn IEL77();
850 pub fn IEL78();
851 pub fn IEL79();
852 pub fn IEL80();
853 pub fn IEL81();
854 pub fn IEL82();
855 pub fn IEL83();
856 pub fn IEL84();
857 pub fn IEL85();
858 pub fn IEL86();
859 pub fn IEL87();
860 pub fn IEL88();
861 pub fn IEL89();
862 pub fn IEL90();
863 pub fn IEL91();
864 pub fn IEL92();
865 pub fn IEL93();
866 pub fn IEL94();
867 pub fn IEL95();
868 }
869}
870#[cfg(feature = "rt")]
871#[doc(hidden)]
872#[unsafe(link_section = ".vector_table.interrupts")]
873#[unsafe(no_mangle)]
874pub static __INTERRUPTS: [Vector; 96] = [
875 Vector {
876 _handler: interrupt_handlers::IEL0,
877 },
878 Vector {
879 _handler: interrupt_handlers::IEL1,
880 },
881 Vector {
882 _handler: interrupt_handlers::IEL2,
883 },
884 Vector {
885 _handler: interrupt_handlers::IEL3,
886 },
887 Vector {
888 _handler: interrupt_handlers::IEL4,
889 },
890 Vector {
891 _handler: interrupt_handlers::IEL5,
892 },
893 Vector {
894 _handler: interrupt_handlers::IEL6,
895 },
896 Vector {
897 _handler: interrupt_handlers::IEL7,
898 },
899 Vector {
900 _handler: interrupt_handlers::IEL8,
901 },
902 Vector {
903 _handler: interrupt_handlers::IEL9,
904 },
905 Vector {
906 _handler: interrupt_handlers::IEL10,
907 },
908 Vector {
909 _handler: interrupt_handlers::IEL11,
910 },
911 Vector {
912 _handler: interrupt_handlers::IEL12,
913 },
914 Vector {
915 _handler: interrupt_handlers::IEL13,
916 },
917 Vector {
918 _handler: interrupt_handlers::IEL14,
919 },
920 Vector {
921 _handler: interrupt_handlers::IEL15,
922 },
923 Vector {
924 _handler: interrupt_handlers::IEL16,
925 },
926 Vector {
927 _handler: interrupt_handlers::IEL17,
928 },
929 Vector {
930 _handler: interrupt_handlers::IEL18,
931 },
932 Vector {
933 _handler: interrupt_handlers::IEL19,
934 },
935 Vector {
936 _handler: interrupt_handlers::IEL20,
937 },
938 Vector {
939 _handler: interrupt_handlers::IEL21,
940 },
941 Vector {
942 _handler: interrupt_handlers::IEL22,
943 },
944 Vector {
945 _handler: interrupt_handlers::IEL23,
946 },
947 Vector {
948 _handler: interrupt_handlers::IEL24,
949 },
950 Vector {
951 _handler: interrupt_handlers::IEL25,
952 },
953 Vector {
954 _handler: interrupt_handlers::IEL26,
955 },
956 Vector {
957 _handler: interrupt_handlers::IEL27,
958 },
959 Vector {
960 _handler: interrupt_handlers::IEL28,
961 },
962 Vector {
963 _handler: interrupt_handlers::IEL29,
964 },
965 Vector {
966 _handler: interrupt_handlers::IEL30,
967 },
968 Vector {
969 _handler: interrupt_handlers::IEL31,
970 },
971 Vector {
972 _handler: interrupt_handlers::IEL32,
973 },
974 Vector {
975 _handler: interrupt_handlers::IEL33,
976 },
977 Vector {
978 _handler: interrupt_handlers::IEL34,
979 },
980 Vector {
981 _handler: interrupt_handlers::IEL35,
982 },
983 Vector {
984 _handler: interrupt_handlers::IEL36,
985 },
986 Vector {
987 _handler: interrupt_handlers::IEL37,
988 },
989 Vector {
990 _handler: interrupt_handlers::IEL38,
991 },
992 Vector {
993 _handler: interrupt_handlers::IEL39,
994 },
995 Vector {
996 _handler: interrupt_handlers::IEL40,
997 },
998 Vector {
999 _handler: interrupt_handlers::IEL41,
1000 },
1001 Vector {
1002 _handler: interrupt_handlers::IEL42,
1003 },
1004 Vector {
1005 _handler: interrupt_handlers::IEL43,
1006 },
1007 Vector {
1008 _handler: interrupt_handlers::IEL44,
1009 },
1010 Vector {
1011 _handler: interrupt_handlers::IEL45,
1012 },
1013 Vector {
1014 _handler: interrupt_handlers::IEL46,
1015 },
1016 Vector {
1017 _handler: interrupt_handlers::IEL47,
1018 },
1019 Vector {
1020 _handler: interrupt_handlers::IEL48,
1021 },
1022 Vector {
1023 _handler: interrupt_handlers::IEL49,
1024 },
1025 Vector {
1026 _handler: interrupt_handlers::IEL50,
1027 },
1028 Vector {
1029 _handler: interrupt_handlers::IEL51,
1030 },
1031 Vector {
1032 _handler: interrupt_handlers::IEL52,
1033 },
1034 Vector {
1035 _handler: interrupt_handlers::IEL53,
1036 },
1037 Vector {
1038 _handler: interrupt_handlers::IEL54,
1039 },
1040 Vector {
1041 _handler: interrupt_handlers::IEL55,
1042 },
1043 Vector {
1044 _handler: interrupt_handlers::IEL56,
1045 },
1046 Vector {
1047 _handler: interrupt_handlers::IEL57,
1048 },
1049 Vector {
1050 _handler: interrupt_handlers::IEL58,
1051 },
1052 Vector {
1053 _handler: interrupt_handlers::IEL59,
1054 },
1055 Vector {
1056 _handler: interrupt_handlers::IEL60,
1057 },
1058 Vector {
1059 _handler: interrupt_handlers::IEL61,
1060 },
1061 Vector {
1062 _handler: interrupt_handlers::IEL62,
1063 },
1064 Vector {
1065 _handler: interrupt_handlers::IEL63,
1066 },
1067 Vector {
1068 _handler: interrupt_handlers::IEL64,
1069 },
1070 Vector {
1071 _handler: interrupt_handlers::IEL65,
1072 },
1073 Vector {
1074 _handler: interrupt_handlers::IEL66,
1075 },
1076 Vector {
1077 _handler: interrupt_handlers::IEL67,
1078 },
1079 Vector {
1080 _handler: interrupt_handlers::IEL68,
1081 },
1082 Vector {
1083 _handler: interrupt_handlers::IEL69,
1084 },
1085 Vector {
1086 _handler: interrupt_handlers::IEL70,
1087 },
1088 Vector {
1089 _handler: interrupt_handlers::IEL71,
1090 },
1091 Vector {
1092 _handler: interrupt_handlers::IEL72,
1093 },
1094 Vector {
1095 _handler: interrupt_handlers::IEL73,
1096 },
1097 Vector {
1098 _handler: interrupt_handlers::IEL74,
1099 },
1100 Vector {
1101 _handler: interrupt_handlers::IEL75,
1102 },
1103 Vector {
1104 _handler: interrupt_handlers::IEL76,
1105 },
1106 Vector {
1107 _handler: interrupt_handlers::IEL77,
1108 },
1109 Vector {
1110 _handler: interrupt_handlers::IEL78,
1111 },
1112 Vector {
1113 _handler: interrupt_handlers::IEL79,
1114 },
1115 Vector {
1116 _handler: interrupt_handlers::IEL80,
1117 },
1118 Vector {
1119 _handler: interrupt_handlers::IEL81,
1120 },
1121 Vector {
1122 _handler: interrupt_handlers::IEL82,
1123 },
1124 Vector {
1125 _handler: interrupt_handlers::IEL83,
1126 },
1127 Vector {
1128 _handler: interrupt_handlers::IEL84,
1129 },
1130 Vector {
1131 _handler: interrupt_handlers::IEL85,
1132 },
1133 Vector {
1134 _handler: interrupt_handlers::IEL86,
1135 },
1136 Vector {
1137 _handler: interrupt_handlers::IEL87,
1138 },
1139 Vector {
1140 _handler: interrupt_handlers::IEL88,
1141 },
1142 Vector {
1143 _handler: interrupt_handlers::IEL89,
1144 },
1145 Vector {
1146 _handler: interrupt_handlers::IEL90,
1147 },
1148 Vector {
1149 _handler: interrupt_handlers::IEL91,
1150 },
1151 Vector {
1152 _handler: interrupt_handlers::IEL92,
1153 },
1154 Vector {
1155 _handler: interrupt_handlers::IEL93,
1156 },
1157 Vector {
1158 _handler: interrupt_handlers::IEL94,
1159 },
1160 Vector {
1161 _handler: interrupt_handlers::IEL95,
1162 },
1163];
1164#[doc = "Enumeration of all the interrupts."]
1165#[derive(Copy, Clone, Debug, PartialEq, Eq)]
1166#[repr(u16)]
1167pub enum Interrupt {
1168 #[doc = "ICU Interrupt 0"]
1169 IEL0 = 0,
1170
1171 #[doc = "ICU Interrupt 1"]
1172 IEL1 = 1,
1173
1174 #[doc = "ICU Interrupt 2"]
1175 IEL2 = 2,
1176
1177 #[doc = "ICU Interrupt 3"]
1178 IEL3 = 3,
1179
1180 #[doc = "ICU Interrupt 4"]
1181 IEL4 = 4,
1182
1183 #[doc = "ICU Interrupt 5"]
1184 IEL5 = 5,
1185
1186 #[doc = "ICU Interrupt 6"]
1187 IEL6 = 6,
1188
1189 #[doc = "ICU Interrupt 7"]
1190 IEL7 = 7,
1191
1192 #[doc = "ICU Interrupt 8"]
1193 IEL8 = 8,
1194
1195 #[doc = "ICU Interrupt 9"]
1196 IEL9 = 9,
1197
1198 #[doc = "ICU Interrupt 10"]
1199 IEL10 = 10,
1200
1201 #[doc = "ICU Interrupt 11"]
1202 IEL11 = 11,
1203
1204 #[doc = "ICU Interrupt 12"]
1205 IEL12 = 12,
1206
1207 #[doc = "ICU Interrupt 13"]
1208 IEL13 = 13,
1209
1210 #[doc = "ICU Interrupt 14"]
1211 IEL14 = 14,
1212
1213 #[doc = "ICU Interrupt 15"]
1214 IEL15 = 15,
1215
1216 #[doc = "ICU Interrupt 16"]
1217 IEL16 = 16,
1218
1219 #[doc = "ICU Interrupt 17"]
1220 IEL17 = 17,
1221
1222 #[doc = "ICU Interrupt 18"]
1223 IEL18 = 18,
1224
1225 #[doc = "ICU Interrupt 19"]
1226 IEL19 = 19,
1227
1228 #[doc = "ICU Interrupt 20"]
1229 IEL20 = 20,
1230
1231 #[doc = "ICU Interrupt 21"]
1232 IEL21 = 21,
1233
1234 #[doc = "ICU Interrupt 22"]
1235 IEL22 = 22,
1236
1237 #[doc = "ICU Interrupt 23"]
1238 IEL23 = 23,
1239
1240 #[doc = "ICU Interrupt 24"]
1241 IEL24 = 24,
1242
1243 #[doc = "ICU Interrupt 25"]
1244 IEL25 = 25,
1245
1246 #[doc = "ICU Interrupt 26"]
1247 IEL26 = 26,
1248
1249 #[doc = "ICU Interrupt 27"]
1250 IEL27 = 27,
1251
1252 #[doc = "ICU Interrupt 28"]
1253 IEL28 = 28,
1254
1255 #[doc = "ICU Interrupt 29"]
1256 IEL29 = 29,
1257
1258 #[doc = "ICU Interrupt 30"]
1259 IEL30 = 30,
1260
1261 #[doc = "ICU Interrupt 31"]
1262 IEL31 = 31,
1263
1264 #[doc = "ICU Interrupt 32"]
1265 IEL32 = 32,
1266
1267 #[doc = "ICU Interrupt 33"]
1268 IEL33 = 33,
1269
1270 #[doc = "ICU Interrupt 34"]
1271 IEL34 = 34,
1272
1273 #[doc = "ICU Interrupt 35"]
1274 IEL35 = 35,
1275
1276 #[doc = "ICU Interrupt 36"]
1277 IEL36 = 36,
1278
1279 #[doc = "ICU Interrupt 37"]
1280 IEL37 = 37,
1281
1282 #[doc = "ICU Interrupt 38"]
1283 IEL38 = 38,
1284
1285 #[doc = "ICU Interrupt 39"]
1286 IEL39 = 39,
1287
1288 #[doc = "ICU Interrupt 40"]
1289 IEL40 = 40,
1290
1291 #[doc = "ICU Interrupt 41"]
1292 IEL41 = 41,
1293
1294 #[doc = "ICU Interrupt 42"]
1295 IEL42 = 42,
1296
1297 #[doc = "ICU Interrupt 43"]
1298 IEL43 = 43,
1299
1300 #[doc = "ICU Interrupt 44"]
1301 IEL44 = 44,
1302
1303 #[doc = "ICU Interrupt 45"]
1304 IEL45 = 45,
1305
1306 #[doc = "ICU Interrupt 46"]
1307 IEL46 = 46,
1308
1309 #[doc = "ICU Interrupt 47"]
1310 IEL47 = 47,
1311
1312 #[doc = "ICU Interrupt 48"]
1313 IEL48 = 48,
1314
1315 #[doc = "ICU Interrupt 49"]
1316 IEL49 = 49,
1317
1318 #[doc = "ICU Interrupt 50"]
1319 IEL50 = 50,
1320
1321 #[doc = "ICU Interrupt 51"]
1322 IEL51 = 51,
1323
1324 #[doc = "ICU Interrupt 52"]
1325 IEL52 = 52,
1326
1327 #[doc = "ICU Interrupt 53"]
1328 IEL53 = 53,
1329
1330 #[doc = "ICU Interrupt 54"]
1331 IEL54 = 54,
1332
1333 #[doc = "ICU Interrupt 55"]
1334 IEL55 = 55,
1335
1336 #[doc = "ICU Interrupt 56"]
1337 IEL56 = 56,
1338
1339 #[doc = "ICU Interrupt 57"]
1340 IEL57 = 57,
1341
1342 #[doc = "ICU Interrupt 58"]
1343 IEL58 = 58,
1344
1345 #[doc = "ICU Interrupt 59"]
1346 IEL59 = 59,
1347
1348 #[doc = "ICU Interrupt 60"]
1349 IEL60 = 60,
1350
1351 #[doc = "ICU Interrupt 61"]
1352 IEL61 = 61,
1353
1354 #[doc = "ICU Interrupt 62"]
1355 IEL62 = 62,
1356
1357 #[doc = "ICU Interrupt 63"]
1358 IEL63 = 63,
1359
1360 #[doc = "ICU Interrupt 64"]
1361 IEL64 = 64,
1362
1363 #[doc = "ICU Interrupt 65"]
1364 IEL65 = 65,
1365
1366 #[doc = "ICU Interrupt 66"]
1367 IEL66 = 66,
1368
1369 #[doc = "ICU Interrupt 67"]
1370 IEL67 = 67,
1371
1372 #[doc = "ICU Interrupt 68"]
1373 IEL68 = 68,
1374
1375 #[doc = "ICU Interrupt 69"]
1376 IEL69 = 69,
1377
1378 #[doc = "ICU Interrupt 70"]
1379 IEL70 = 70,
1380
1381 #[doc = "ICU Interrupt 71"]
1382 IEL71 = 71,
1383
1384 #[doc = "ICU Interrupt 72"]
1385 IEL72 = 72,
1386
1387 #[doc = "ICU Interrupt 73"]
1388 IEL73 = 73,
1389
1390 #[doc = "ICU Interrupt 74"]
1391 IEL74 = 74,
1392
1393 #[doc = "ICU Interrupt 75"]
1394 IEL75 = 75,
1395
1396 #[doc = "ICU Interrupt 76"]
1397 IEL76 = 76,
1398
1399 #[doc = "ICU Interrupt 77"]
1400 IEL77 = 77,
1401
1402 #[doc = "ICU Interrupt 78"]
1403 IEL78 = 78,
1404
1405 #[doc = "ICU Interrupt 79"]
1406 IEL79 = 79,
1407
1408 #[doc = "ICU Interrupt 80"]
1409 IEL80 = 80,
1410
1411 #[doc = "ICU Interrupt 81"]
1412 IEL81 = 81,
1413
1414 #[doc = "ICU Interrupt 82"]
1415 IEL82 = 82,
1416
1417 #[doc = "ICU Interrupt 83"]
1418 IEL83 = 83,
1419
1420 #[doc = "ICU Interrupt 84"]
1421 IEL84 = 84,
1422
1423 #[doc = "ICU Interrupt 85"]
1424 IEL85 = 85,
1425
1426 #[doc = "ICU Interrupt 86"]
1427 IEL86 = 86,
1428
1429 #[doc = "ICU Interrupt 87"]
1430 IEL87 = 87,
1431
1432 #[doc = "ICU Interrupt 88"]
1433 IEL88 = 88,
1434
1435 #[doc = "ICU Interrupt 89"]
1436 IEL89 = 89,
1437
1438 #[doc = "ICU Interrupt 90"]
1439 IEL90 = 90,
1440
1441 #[doc = "ICU Interrupt 91"]
1442 IEL91 = 91,
1443
1444 #[doc = "ICU Interrupt 92"]
1445 IEL92 = 92,
1446
1447 #[doc = "ICU Interrupt 93"]
1448 IEL93 = 93,
1449
1450 #[doc = "ICU Interrupt 94"]
1451 IEL94 = 94,
1452
1453 #[doc = "ICU Interrupt 95"]
1454 IEL95 = 95,
1455}
1456unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
1457 #[inline(always)]
1458 fn number(self) -> u16 {
1459 self as u16
1460 }
1461}
1462#[allow(non_snake_case)]
1463pub struct Peripherals {
1465 #[cfg(feature = "dac12")]
1466 pub DAC12: self::Dac12,
1467 #[cfg(feature = "acmphs0")]
1468 pub ACMPHS0: self::Acmphs0,
1469 #[cfg(feature = "acmphs1")]
1470 pub ACMPHS1: self::Acmphs1,
1471 #[cfg(feature = "acmphs2")]
1472 pub ACMPHS2: self::Acmphs1,
1473 #[cfg(feature = "acmphs3")]
1474 pub ACMPHS3: self::Acmphs1,
1475 #[cfg(feature = "acmphs4")]
1476 pub ACMPHS4: self::Acmphs1,
1477 #[cfg(feature = "acmphs5")]
1478 pub ACMPHS5: self::Acmphs1,
1479 #[cfg(feature = "tsn")]
1480 pub TSN: self::Tsn,
1481 #[cfg(feature = "crc")]
1482 pub CRC: self::Crc,
1483 #[cfg(feature = "ssie0")]
1484 pub SSIE0: self::Ssie0,
1485 #[cfg(feature = "elc")]
1486 pub ELC: self::Elc,
1487 #[cfg(feature = "cac")]
1488 pub CAC: self::Cac,
1489 #[cfg(feature = "doc")]
1490 pub DOC: self::Doc,
1491 #[cfg(feature = "iwdt")]
1492 pub IWDT: self::Iwdt,
1493 #[cfg(feature = "kint")]
1494 pub KINT: self::Kint,
1495 #[cfg(feature = "wdt")]
1496 pub WDT: self::Wdt,
1497 #[cfg(feature = "usbfs")]
1498 pub USBFS: self::Usbfs,
1499 #[cfg(feature = "can0")]
1500 pub CAN0: self::Can0,
1501 #[cfg(feature = "can1")]
1502 pub CAN1: self::Can0,
1503 #[cfg(feature = "irda")]
1504 pub IRDA: self::Irda,
1505 #[cfg(feature = "qspi")]
1506 pub QSPI: self::Qspi,
1507 #[cfg(feature = "spi0")]
1508 pub SPI0: self::Spi0,
1509 #[cfg(feature = "spi1")]
1510 pub SPI1: self::Spi0,
1511 #[cfg(feature = "srcram")]
1512 pub SRCRAM: self::Srcram,
1513 #[cfg(feature = "src")]
1514 pub SRC: self::Src,
1515 #[cfg(feature = "dbg")]
1516 pub DBG: self::Dbg,
1517 #[cfg(feature = "dmac0")]
1518 pub DMAC0: self::Dmac0,
1519 #[cfg(feature = "dmac1")]
1520 pub DMAC1: self::Dmac0,
1521 #[cfg(feature = "dmac2")]
1522 pub DMAC2: self::Dmac0,
1523 #[cfg(feature = "dmac3")]
1524 pub DMAC3: self::Dmac0,
1525 #[cfg(feature = "dmac4")]
1526 pub DMAC4: self::Dmac0,
1527 #[cfg(feature = "dmac5")]
1528 pub DMAC5: self::Dmac0,
1529 #[cfg(feature = "dmac6")]
1530 pub DMAC6: self::Dmac0,
1531 #[cfg(feature = "dmac7")]
1532 pub DMAC7: self::Dmac0,
1533 #[cfg(feature = "dma")]
1534 pub DMA: self::Dma,
1535 #[cfg(feature = "dtc")]
1536 pub DTC: self::Dtc,
1537 #[cfg(feature = "mmf")]
1538 pub MMF: self::Mmf,
1539 #[cfg(feature = "sram")]
1540 pub SRAM: self::Sram,
1541 #[cfg(feature = "fcache")]
1542 pub FCACHE: self::Fcache,
1543 #[cfg(feature = "system")]
1544 pub SYSTEM: self::System,
1545 #[cfg(feature = "mstp")]
1546 pub MSTP: self::Mstp,
1547 #[cfg(feature = "rtc")]
1548 pub RTC: self::Rtc,
1549 #[cfg(feature = "agt0")]
1550 pub AGT0: self::Agt0,
1551 #[cfg(feature = "agt1")]
1552 pub AGT1: self::Agt0,
1553 #[cfg(feature = "gpt_ops")]
1554 pub GPT_OPS: self::GptOps,
1555 #[cfg(feature = "gpt32eh0")]
1556 pub GPT32EH0: self::Gpt32Eh0,
1557 #[cfg(feature = "gpt32eh1")]
1558 pub GPT32EH1: self::Gpt32Eh0,
1559 #[cfg(feature = "gpt32eh2")]
1560 pub GPT32EH2: self::Gpt32Eh0,
1561 #[cfg(feature = "gpt32eh3")]
1562 pub GPT32EH3: self::Gpt32Eh0,
1563 #[cfg(feature = "gpt32e4")]
1564 pub GPT32E4: self::Gpt32Eh0,
1565 #[cfg(feature = "gpt32e5")]
1566 pub GPT32E5: self::Gpt32Eh0,
1567 #[cfg(feature = "gpt32e6")]
1568 pub GPT32E6: self::Gpt32Eh0,
1569 #[cfg(feature = "gpt32e7")]
1570 pub GPT32E7: self::Gpt32Eh0,
1571 #[cfg(feature = "poeg")]
1572 pub POEG: self::Poeg,
1573 #[cfg(feature = "gpt_odc")]
1574 pub GPT_ODC: self::GptOdc,
1575 #[cfg(feature = "bus")]
1576 pub BUS: self::Bus,
1577 #[cfg(feature = "icu")]
1578 pub ICU: self::Icu,
1579 #[cfg(feature = "port0")]
1580 pub PORT0: self::Port0,
1581 #[cfg(feature = "port1")]
1582 pub PORT1: self::Port1,
1583 #[cfg(feature = "port2")]
1584 pub PORT2: self::Port1,
1585 #[cfg(feature = "port3")]
1586 pub PORT3: self::Port1,
1587 #[cfg(feature = "port4")]
1588 pub PORT4: self::Port1,
1589 #[cfg(feature = "port5")]
1590 pub PORT5: self::Port0,
1591 #[cfg(feature = "port6")]
1592 pub PORT6: self::Port0,
1593 #[cfg(feature = "port7")]
1594 pub PORT7: self::Port0,
1595 #[cfg(feature = "pfs")]
1596 pub PFS: self::Pfs,
1597 #[cfg(feature = "pmisc")]
1598 pub PMISC: self::Pmisc,
1599 #[cfg(feature = "iic0")]
1600 pub IIC0: self::Iic0,
1601 #[cfg(feature = "iic1")]
1602 pub IIC1: self::Iic1,
1603 #[cfg(feature = "sci0")]
1604 pub SCI0: self::Sci0,
1605 #[cfg(feature = "sci1")]
1606 pub SCI1: self::Sci0,
1607 #[cfg(feature = "sci2")]
1608 pub SCI2: self::Sci0,
1609 #[cfg(feature = "sci3")]
1610 pub SCI3: self::Sci0,
1611 #[cfg(feature = "sci4")]
1612 pub SCI4: self::Sci0,
1613 #[cfg(feature = "sci8")]
1614 pub SCI8: self::Sci0,
1615 #[cfg(feature = "sci9")]
1616 pub SCI9: self::Sci0,
1617 #[cfg(feature = "sdhi0")]
1618 pub SDHI0: self::Sdhi0,
1619 #[cfg(feature = "sdhi1")]
1620 pub SDHI1: self::Sdhi0,
1621 #[cfg(feature = "gpt328")]
1622 pub GPT328: self::Gpt328,
1623 #[cfg(feature = "gpt329")]
1624 pub GPT329: self::Gpt328,
1625 #[cfg(feature = "gpt3210")]
1626 pub GPT3210: self::Gpt328,
1627 #[cfg(feature = "gpt3211")]
1628 pub GPT3211: self::Gpt328,
1629 #[cfg(feature = "gpt3212")]
1630 pub GPT3212: self::Gpt328,
1631 #[cfg(feature = "adc120")]
1632 pub ADC120: self::Adc120,
1633 #[cfg(feature = "adc121")]
1634 pub ADC121: self::Adc121,
1635 #[cfg(feature = "ctsu")]
1636 pub CTSU: self::Ctsu,
1637 #[cfg(feature = "mmpu")]
1638 pub MMPU: self::Mmpu,
1639 #[cfg(feature = "smpu")]
1640 pub SMPU: self::Smpu,
1641 #[cfg(feature = "spmon")]
1642 pub SPMON: self::Spmon,
1643 #[cfg(feature = "tsd")]
1644 pub TSD: self::Tsd,
1645}
1646
1647impl Peripherals {
1648 #[inline]
1651 pub fn take() -> Option<Self> {
1652 Some(Self::steal())
1653 }
1654
1655 #[inline]
1658 pub fn steal() -> Self {
1659 Peripherals {
1660 #[cfg(feature = "dac12")]
1661 DAC12: crate::DAC12,
1662 #[cfg(feature = "acmphs0")]
1663 ACMPHS0: crate::ACMPHS0,
1664 #[cfg(feature = "acmphs1")]
1665 ACMPHS1: crate::ACMPHS1,
1666 #[cfg(feature = "acmphs2")]
1667 ACMPHS2: crate::ACMPHS2,
1668 #[cfg(feature = "acmphs3")]
1669 ACMPHS3: crate::ACMPHS3,
1670 #[cfg(feature = "acmphs4")]
1671 ACMPHS4: crate::ACMPHS4,
1672 #[cfg(feature = "acmphs5")]
1673 ACMPHS5: crate::ACMPHS5,
1674 #[cfg(feature = "tsn")]
1675 TSN: crate::TSN,
1676 #[cfg(feature = "crc")]
1677 CRC: crate::CRC,
1678 #[cfg(feature = "ssie0")]
1679 SSIE0: crate::SSIE0,
1680 #[cfg(feature = "elc")]
1681 ELC: crate::ELC,
1682 #[cfg(feature = "cac")]
1683 CAC: crate::CAC,
1684 #[cfg(feature = "doc")]
1685 DOC: crate::DOC,
1686 #[cfg(feature = "iwdt")]
1687 IWDT: crate::IWDT,
1688 #[cfg(feature = "kint")]
1689 KINT: crate::KINT,
1690 #[cfg(feature = "wdt")]
1691 WDT: crate::WDT,
1692 #[cfg(feature = "usbfs")]
1693 USBFS: crate::USBFS,
1694 #[cfg(feature = "can0")]
1695 CAN0: crate::CAN0,
1696 #[cfg(feature = "can1")]
1697 CAN1: crate::CAN1,
1698 #[cfg(feature = "irda")]
1699 IRDA: crate::IRDA,
1700 #[cfg(feature = "qspi")]
1701 QSPI: crate::QSPI,
1702 #[cfg(feature = "spi0")]
1703 SPI0: crate::SPI0,
1704 #[cfg(feature = "spi1")]
1705 SPI1: crate::SPI1,
1706 #[cfg(feature = "srcram")]
1707 SRCRAM: crate::SRCRAM,
1708 #[cfg(feature = "src")]
1709 SRC: crate::SRC,
1710 #[cfg(feature = "dbg")]
1711 DBG: crate::DBG,
1712 #[cfg(feature = "dmac0")]
1713 DMAC0: crate::DMAC0,
1714 #[cfg(feature = "dmac1")]
1715 DMAC1: crate::DMAC1,
1716 #[cfg(feature = "dmac2")]
1717 DMAC2: crate::DMAC2,
1718 #[cfg(feature = "dmac3")]
1719 DMAC3: crate::DMAC3,
1720 #[cfg(feature = "dmac4")]
1721 DMAC4: crate::DMAC4,
1722 #[cfg(feature = "dmac5")]
1723 DMAC5: crate::DMAC5,
1724 #[cfg(feature = "dmac6")]
1725 DMAC6: crate::DMAC6,
1726 #[cfg(feature = "dmac7")]
1727 DMAC7: crate::DMAC7,
1728 #[cfg(feature = "dma")]
1729 DMA: crate::DMA,
1730 #[cfg(feature = "dtc")]
1731 DTC: crate::DTC,
1732 #[cfg(feature = "mmf")]
1733 MMF: crate::MMF,
1734 #[cfg(feature = "sram")]
1735 SRAM: crate::SRAM,
1736 #[cfg(feature = "fcache")]
1737 FCACHE: crate::FCACHE,
1738 #[cfg(feature = "system")]
1739 SYSTEM: crate::SYSTEM,
1740 #[cfg(feature = "mstp")]
1741 MSTP: crate::MSTP,
1742 #[cfg(feature = "rtc")]
1743 RTC: crate::RTC,
1744 #[cfg(feature = "agt0")]
1745 AGT0: crate::AGT0,
1746 #[cfg(feature = "agt1")]
1747 AGT1: crate::AGT1,
1748 #[cfg(feature = "gpt_ops")]
1749 GPT_OPS: crate::GPT_OPS,
1750 #[cfg(feature = "gpt32eh0")]
1751 GPT32EH0: crate::GPT32EH0,
1752 #[cfg(feature = "gpt32eh1")]
1753 GPT32EH1: crate::GPT32EH1,
1754 #[cfg(feature = "gpt32eh2")]
1755 GPT32EH2: crate::GPT32EH2,
1756 #[cfg(feature = "gpt32eh3")]
1757 GPT32EH3: crate::GPT32EH3,
1758 #[cfg(feature = "gpt32e4")]
1759 GPT32E4: crate::GPT32E4,
1760 #[cfg(feature = "gpt32e5")]
1761 GPT32E5: crate::GPT32E5,
1762 #[cfg(feature = "gpt32e6")]
1763 GPT32E6: crate::GPT32E6,
1764 #[cfg(feature = "gpt32e7")]
1765 GPT32E7: crate::GPT32E7,
1766 #[cfg(feature = "poeg")]
1767 POEG: crate::POEG,
1768 #[cfg(feature = "gpt_odc")]
1769 GPT_ODC: crate::GPT_ODC,
1770 #[cfg(feature = "bus")]
1771 BUS: crate::BUS,
1772 #[cfg(feature = "icu")]
1773 ICU: crate::ICU,
1774 #[cfg(feature = "port0")]
1775 PORT0: crate::PORT0,
1776 #[cfg(feature = "port1")]
1777 PORT1: crate::PORT1,
1778 #[cfg(feature = "port2")]
1779 PORT2: crate::PORT2,
1780 #[cfg(feature = "port3")]
1781 PORT3: crate::PORT3,
1782 #[cfg(feature = "port4")]
1783 PORT4: crate::PORT4,
1784 #[cfg(feature = "port5")]
1785 PORT5: crate::PORT5,
1786 #[cfg(feature = "port6")]
1787 PORT6: crate::PORT6,
1788 #[cfg(feature = "port7")]
1789 PORT7: crate::PORT7,
1790 #[cfg(feature = "pfs")]
1791 PFS: crate::PFS,
1792 #[cfg(feature = "pmisc")]
1793 PMISC: crate::PMISC,
1794 #[cfg(feature = "iic0")]
1795 IIC0: crate::IIC0,
1796 #[cfg(feature = "iic1")]
1797 IIC1: crate::IIC1,
1798 #[cfg(feature = "sci0")]
1799 SCI0: crate::SCI0,
1800 #[cfg(feature = "sci1")]
1801 SCI1: crate::SCI1,
1802 #[cfg(feature = "sci2")]
1803 SCI2: crate::SCI2,
1804 #[cfg(feature = "sci3")]
1805 SCI3: crate::SCI3,
1806 #[cfg(feature = "sci4")]
1807 SCI4: crate::SCI4,
1808 #[cfg(feature = "sci8")]
1809 SCI8: crate::SCI8,
1810 #[cfg(feature = "sci9")]
1811 SCI9: crate::SCI9,
1812 #[cfg(feature = "sdhi0")]
1813 SDHI0: crate::SDHI0,
1814 #[cfg(feature = "sdhi1")]
1815 SDHI1: crate::SDHI1,
1816 #[cfg(feature = "gpt328")]
1817 GPT328: crate::GPT328,
1818 #[cfg(feature = "gpt329")]
1819 GPT329: crate::GPT329,
1820 #[cfg(feature = "gpt3210")]
1821 GPT3210: crate::GPT3210,
1822 #[cfg(feature = "gpt3211")]
1823 GPT3211: crate::GPT3211,
1824 #[cfg(feature = "gpt3212")]
1825 GPT3212: crate::GPT3212,
1826 #[cfg(feature = "adc120")]
1827 ADC120: crate::ADC120,
1828 #[cfg(feature = "adc121")]
1829 ADC121: crate::ADC121,
1830 #[cfg(feature = "ctsu")]
1831 CTSU: crate::CTSU,
1832 #[cfg(feature = "mmpu")]
1833 MMPU: crate::MMPU,
1834 #[cfg(feature = "smpu")]
1835 SMPU: crate::SMPU,
1836 #[cfg(feature = "spmon")]
1837 SPMON: crate::SPMON,
1838 #[cfg(feature = "tsd")]
1839 TSD: crate::TSD,
1840 }
1841 }
1842}