1#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M33 based Microcontroller RA6E2 group"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc120")]
31pub mod adc120;
32#[cfg(feature = "agtw0")]
33pub mod agtw0;
34#[cfg(feature = "bus")]
35pub mod bus;
36#[cfg(feature = "cac")]
37pub mod cac;
38#[cfg(feature = "cache")]
39pub mod cache;
40#[cfg(feature = "canfd_b")]
41pub mod canfd_b;
42#[cfg(feature = "cec")]
43pub mod cec;
44#[cfg(feature = "cpscu")]
45pub mod cpscu;
46#[cfg(feature = "crc")]
47pub mod crc;
48#[cfg(feature = "dac12")]
49pub mod dac12;
50#[cfg(feature = "dbg")]
51pub mod dbg;
52#[cfg(feature = "dma")]
53pub mod dma;
54#[cfg(feature = "dmac0")]
55pub mod dmac0;
56#[cfg(feature = "doc")]
57pub mod doc;
58#[cfg(feature = "dtc")]
59pub mod dtc;
60#[cfg(feature = "eccmb")]
61pub mod eccmb;
62#[cfg(feature = "elc")]
63pub mod elc;
64#[cfg(feature = "faci")]
65pub mod faci;
66#[cfg(feature = "fcache")]
67pub mod fcache;
68#[cfg(feature = "flad")]
69pub mod flad;
70#[cfg(feature = "gpt16e0")]
71pub mod gpt16e0;
72#[cfg(feature = "gpt_ops")]
73pub mod gpt_ops;
74#[cfg(feature = "i3c")]
75pub mod i3c;
76#[cfg(feature = "icu")]
77pub mod icu;
78#[cfg(feature = "iwdt")]
79pub mod iwdt;
80#[cfg(feature = "mstp")]
81pub mod mstp;
82#[cfg(feature = "pfs")]
83pub mod pfs;
84#[cfg(feature = "poeg")]
85pub mod poeg;
86#[cfg(feature = "port0")]
87pub mod port0;
88#[cfg(feature = "port1")]
89pub mod port1;
90#[cfg(feature = "pscu")]
91pub mod pscu;
92#[cfg(feature = "qspi")]
93pub mod qspi;
94#[cfg(feature = "rmpu")]
95pub mod rmpu;
96#[cfg(feature = "rtc")]
97pub mod rtc;
98#[cfg(feature = "sci0")]
99pub mod sci0;
100#[cfg(feature = "spi0")]
101pub mod spi0;
102#[cfg(feature = "sram")]
103pub mod sram;
104#[cfg(feature = "ssie0")]
105pub mod ssie0;
106#[cfg(feature = "sysc")]
107pub mod sysc;
108#[cfg(feature = "tsd")]
109pub mod tsd;
110#[cfg(feature = "tsn")]
111pub mod tsn;
112#[cfg(feature = "tzf")]
113pub mod tzf;
114#[cfg(feature = "usbfs")]
115pub mod usbfs;
116#[cfg(feature = "wdt")]
117pub mod wdt;
118
119#[cfg(feature = "rmpu")]
120#[derive(Copy, Clone, Eq, PartialEq)]
121pub struct Rmpu {
122 ptr: *mut u8,
123}
124#[cfg(feature = "rmpu")]
125pub const RMPU: self::Rmpu = self::Rmpu {
126 ptr: 0x40000000u32 as _,
127};
128#[cfg(feature = "tzf")]
129#[derive(Copy, Clone, Eq, PartialEq)]
130pub struct Tzf {
131 ptr: *mut u8,
132}
133#[cfg(feature = "tzf")]
134pub const TZF: self::Tzf = self::Tzf {
135 ptr: 0x40000e00u32 as _,
136};
137#[cfg(feature = "sram")]
138#[derive(Copy, Clone, Eq, PartialEq)]
139pub struct Sram {
140 ptr: *mut u8,
141}
142#[cfg(feature = "sram")]
143pub const SRAM: self::Sram = self::Sram {
144 ptr: 0x40002000u32 as _,
145};
146#[cfg(feature = "bus")]
147#[derive(Copy, Clone, Eq, PartialEq)]
148pub struct Bus {
149 ptr: *mut u8,
150}
151#[cfg(feature = "bus")]
152pub const BUS: self::Bus = self::Bus {
153 ptr: 0x40003000u32 as _,
154};
155#[cfg(feature = "dmac0")]
156#[derive(Copy, Clone, Eq, PartialEq)]
157pub struct Dmac0 {
158 ptr: *mut u8,
159}
160#[cfg(feature = "dmac0")]
161pub const DMAC0: self::Dmac0 = self::Dmac0 {
162 ptr: 0x40005000u32 as _,
163};
164#[cfg(feature = "dmac1")]
165pub const DMAC1: self::Dmac0 = self::Dmac0 {
166 ptr: 0x40005040u32 as _,
167};
168#[cfg(feature = "dmac2")]
169pub const DMAC2: self::Dmac0 = self::Dmac0 {
170 ptr: 0x40005080u32 as _,
171};
172#[cfg(feature = "dmac3")]
173pub const DMAC3: self::Dmac0 = self::Dmac0 {
174 ptr: 0x400050c0u32 as _,
175};
176#[cfg(feature = "dmac4")]
177pub const DMAC4: self::Dmac0 = self::Dmac0 {
178 ptr: 0x40005100u32 as _,
179};
180#[cfg(feature = "dmac5")]
181pub const DMAC5: self::Dmac0 = self::Dmac0 {
182 ptr: 0x40005140u32 as _,
183};
184#[cfg(feature = "dmac6")]
185pub const DMAC6: self::Dmac0 = self::Dmac0 {
186 ptr: 0x40005180u32 as _,
187};
188#[cfg(feature = "dmac7")]
189pub const DMAC7: self::Dmac0 = self::Dmac0 {
190 ptr: 0x400051c0u32 as _,
191};
192#[cfg(feature = "dma")]
193#[derive(Copy, Clone, Eq, PartialEq)]
194pub struct Dma {
195 ptr: *mut u8,
196}
197#[cfg(feature = "dma")]
198pub const DMA: self::Dma = self::Dma {
199 ptr: 0x40005200u32 as _,
200};
201#[cfg(feature = "dtc")]
202#[derive(Copy, Clone, Eq, PartialEq)]
203pub struct Dtc {
204 ptr: *mut u8,
205}
206#[cfg(feature = "dtc")]
207pub const DTC: self::Dtc = self::Dtc {
208 ptr: 0x40005400u32 as _,
209};
210#[cfg(feature = "icu")]
211#[derive(Copy, Clone, Eq, PartialEq)]
212pub struct Icu {
213 ptr: *mut u8,
214}
215#[cfg(feature = "icu")]
216pub const ICU: self::Icu = self::Icu {
217 ptr: 0x40006000u32 as _,
218};
219#[cfg(feature = "cache")]
220#[derive(Copy, Clone, Eq, PartialEq)]
221pub struct Cache {
222 ptr: *mut u8,
223}
224#[cfg(feature = "cache")]
225pub const CACHE: self::Cache = self::Cache {
226 ptr: 0x40007000u32 as _,
227};
228#[cfg(feature = "cpscu")]
229#[derive(Copy, Clone, Eq, PartialEq)]
230pub struct Cpscu {
231 ptr: *mut u8,
232}
233#[cfg(feature = "cpscu")]
234pub const CPSCU: self::Cpscu = self::Cpscu {
235 ptr: 0x40008000u32 as _,
236};
237#[cfg(feature = "dbg")]
238#[derive(Copy, Clone, Eq, PartialEq)]
239pub struct Dbg {
240 ptr: *mut u8,
241}
242#[cfg(feature = "dbg")]
243pub const DBG: self::Dbg = self::Dbg {
244 ptr: 0x4001b000u32 as _,
245};
246#[cfg(feature = "fcache")]
247#[derive(Copy, Clone, Eq, PartialEq)]
248pub struct Fcache {
249 ptr: *mut u8,
250}
251#[cfg(feature = "fcache")]
252pub const FCACHE: self::Fcache = self::Fcache {
253 ptr: 0x4001c100u32 as _,
254};
255#[cfg(feature = "sysc")]
256#[derive(Copy, Clone, Eq, PartialEq)]
257pub struct Sysc {
258 ptr: *mut u8,
259}
260#[cfg(feature = "sysc")]
261pub const SYSC: self::Sysc = self::Sysc {
262 ptr: 0x4001e000u32 as _,
263};
264#[cfg(feature = "port0")]
265#[derive(Copy, Clone, Eq, PartialEq)]
266pub struct Port0 {
267 ptr: *mut u8,
268}
269#[cfg(feature = "port0")]
270pub const PORT0: self::Port0 = self::Port0 {
271 ptr: 0x40080000u32 as _,
272};
273#[cfg(feature = "port1")]
274#[derive(Copy, Clone, Eq, PartialEq)]
275pub struct Port1 {
276 ptr: *mut u8,
277}
278#[cfg(feature = "port1")]
279pub const PORT1: self::Port1 = self::Port1 {
280 ptr: 0x40080020u32 as _,
281};
282#[cfg(feature = "port2")]
283pub const PORT2: self::Port1 = self::Port1 {
284 ptr: 0x40080040u32 as _,
285};
286#[cfg(feature = "port3")]
287pub const PORT3: self::Port1 = self::Port1 {
288 ptr: 0x40080060u32 as _,
289};
290#[cfg(feature = "port4")]
291pub const PORT4: self::Port1 = self::Port1 {
292 ptr: 0x40080080u32 as _,
293};
294#[cfg(feature = "port5")]
295pub const PORT5: self::Port0 = self::Port0 {
296 ptr: 0x400800a0u32 as _,
297};
298#[cfg(feature = "port8")]
299pub const PORT8: self::Port0 = self::Port0 {
300 ptr: 0x40080100u32 as _,
301};
302#[cfg(feature = "pfs")]
303#[derive(Copy, Clone, Eq, PartialEq)]
304pub struct Pfs {
305 ptr: *mut u8,
306}
307#[cfg(feature = "pfs")]
308pub const PFS: self::Pfs = self::Pfs {
309 ptr: 0x40080800u32 as _,
310};
311#[cfg(feature = "elc")]
312#[derive(Copy, Clone, Eq, PartialEq)]
313pub struct Elc {
314 ptr: *mut u8,
315}
316#[cfg(feature = "elc")]
317pub const ELC: self::Elc = self::Elc {
318 ptr: 0x40082000u32 as _,
319};
320#[cfg(feature = "rtc")]
321#[derive(Copy, Clone, Eq, PartialEq)]
322pub struct Rtc {
323 ptr: *mut u8,
324}
325#[cfg(feature = "rtc")]
326pub const RTC: self::Rtc = self::Rtc {
327 ptr: 0x40083000u32 as _,
328};
329#[cfg(feature = "iwdt")]
330#[derive(Copy, Clone, Eq, PartialEq)]
331pub struct Iwdt {
332 ptr: *mut u8,
333}
334#[cfg(feature = "iwdt")]
335pub const IWDT: self::Iwdt = self::Iwdt {
336 ptr: 0x40083200u32 as _,
337};
338#[cfg(feature = "wdt")]
339#[derive(Copy, Clone, Eq, PartialEq)]
340pub struct Wdt {
341 ptr: *mut u8,
342}
343#[cfg(feature = "wdt")]
344pub const WDT: self::Wdt = self::Wdt {
345 ptr: 0x40083400u32 as _,
346};
347#[cfg(feature = "cac")]
348#[derive(Copy, Clone, Eq, PartialEq)]
349pub struct Cac {
350 ptr: *mut u8,
351}
352#[cfg(feature = "cac")]
353pub const CAC: self::Cac = self::Cac {
354 ptr: 0x40083600u32 as _,
355};
356#[cfg(feature = "mstp")]
357#[derive(Copy, Clone, Eq, PartialEq)]
358pub struct Mstp {
359 ptr: *mut u8,
360}
361#[cfg(feature = "mstp")]
362pub const MSTP: self::Mstp = self::Mstp {
363 ptr: 0x40084000u32 as _,
364};
365#[cfg(feature = "poeg")]
366#[derive(Copy, Clone, Eq, PartialEq)]
367pub struct Poeg {
368 ptr: *mut u8,
369}
370#[cfg(feature = "poeg")]
371pub const POEG: self::Poeg = self::Poeg {
372 ptr: 0x4008a000u32 as _,
373};
374#[cfg(feature = "usbfs")]
375#[derive(Copy, Clone, Eq, PartialEq)]
376pub struct Usbfs {
377 ptr: *mut u8,
378}
379#[cfg(feature = "usbfs")]
380pub const USBFS: self::Usbfs = self::Usbfs {
381 ptr: 0x40090000u32 as _,
382};
383#[cfg(feature = "ssie0")]
384#[derive(Copy, Clone, Eq, PartialEq)]
385pub struct Ssie0 {
386 ptr: *mut u8,
387}
388#[cfg(feature = "ssie0")]
389pub const SSIE0: self::Ssie0 = self::Ssie0 {
390 ptr: 0x4009d000u32 as _,
391};
392#[cfg(feature = "cec")]
393#[derive(Copy, Clone, Eq, PartialEq)]
394pub struct Cec {
395 ptr: *mut u8,
396}
397#[cfg(feature = "cec")]
398pub const CEC: self::Cec = self::Cec {
399 ptr: 0x400ac000u32 as _,
400};
401#[cfg(feature = "canfd_b")]
402#[derive(Copy, Clone, Eq, PartialEq)]
403pub struct CanfdB {
404 ptr: *mut u8,
405}
406#[cfg(feature = "canfd_b")]
407pub const CANFD_B: self::CanfdB = self::CanfdB {
408 ptr: 0x400b0000u32 as _,
409};
410#[cfg(feature = "pscu")]
411#[derive(Copy, Clone, Eq, PartialEq)]
412pub struct Pscu {
413 ptr: *mut u8,
414}
415#[cfg(feature = "pscu")]
416pub const PSCU: self::Pscu = self::Pscu {
417 ptr: 0x400e0000u32 as _,
418};
419#[cfg(feature = "agtw0")]
420#[derive(Copy, Clone, Eq, PartialEq)]
421pub struct Agtw0 {
422 ptr: *mut u8,
423}
424#[cfg(feature = "agtw0")]
425pub const AGTW0: self::Agtw0 = self::Agtw0 {
426 ptr: 0x400e8000u32 as _,
427};
428#[cfg(feature = "agtw1")]
429pub const AGTW1: self::Agtw0 = self::Agtw0 {
430 ptr: 0x400e8100u32 as _,
431};
432#[cfg(feature = "tsn")]
433#[derive(Copy, Clone, Eq, PartialEq)]
434pub struct Tsn {
435 ptr: *mut u8,
436}
437#[cfg(feature = "tsn")]
438pub const TSN: self::Tsn = self::Tsn {
439 ptr: 0x400f3000u32 as _,
440};
441#[cfg(feature = "crc")]
442#[derive(Copy, Clone, Eq, PartialEq)]
443pub struct Crc {
444 ptr: *mut u8,
445}
446#[cfg(feature = "crc")]
447pub const CRC: self::Crc = self::Crc {
448 ptr: 0x40108000u32 as _,
449};
450#[cfg(feature = "doc")]
451#[derive(Copy, Clone, Eq, PartialEq)]
452pub struct Doc {
453 ptr: *mut u8,
454}
455#[cfg(feature = "doc")]
456pub const DOC: self::Doc = self::Doc {
457 ptr: 0x40109000u32 as _,
458};
459#[cfg(feature = "sci0")]
460#[derive(Copy, Clone, Eq, PartialEq)]
461pub struct Sci0 {
462 ptr: *mut u8,
463}
464#[cfg(feature = "sci0")]
465pub const SCI0: self::Sci0 = self::Sci0 {
466 ptr: 0x40118000u32 as _,
467};
468#[cfg(feature = "sci9")]
469pub const SCI9: self::Sci0 = self::Sci0 {
470 ptr: 0x40118900u32 as _,
471};
472#[cfg(feature = "spi0")]
473#[derive(Copy, Clone, Eq, PartialEq)]
474pub struct Spi0 {
475 ptr: *mut u8,
476}
477#[cfg(feature = "spi0")]
478pub const SPI0: self::Spi0 = self::Spi0 {
479 ptr: 0x4011a000u32 as _,
480};
481#[cfg(feature = "spi1")]
482pub const SPI1: self::Spi0 = self::Spi0 {
483 ptr: 0x4011a100u32 as _,
484};
485#[cfg(feature = "i3c")]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct I3C {
488 ptr: *mut u8,
489}
490#[cfg(feature = "i3c")]
491pub const I3C: self::I3C = self::I3C {
492 ptr: 0x4011f000u32 as _,
493};
494#[cfg(feature = "eccmb")]
495#[derive(Copy, Clone, Eq, PartialEq)]
496pub struct Eccmb {
497 ptr: *mut u8,
498}
499#[cfg(feature = "eccmb")]
500pub const ECCMB: self::Eccmb = self::Eccmb {
501 ptr: 0x4012f200u32 as _,
502};
503#[cfg(feature = "gpt16e0")]
504#[derive(Copy, Clone, Eq, PartialEq)]
505pub struct Gpt16E0 {
506 ptr: *mut u8,
507}
508#[cfg(feature = "gpt16e0")]
509pub const GPT16E0: self::Gpt16E0 = self::Gpt16E0 {
510 ptr: 0x40169000u32 as _,
511};
512#[cfg(feature = "gpt16e1")]
513pub const GPT16E1: self::Gpt16E0 = self::Gpt16E0 {
514 ptr: 0x40169100u32 as _,
515};
516#[cfg(feature = "gpt16e2")]
517pub const GPT16E2: self::Gpt16E0 = self::Gpt16E0 {
518 ptr: 0x40169200u32 as _,
519};
520#[cfg(feature = "gpt16e3")]
521pub const GPT16E3: self::Gpt16E0 = self::Gpt16E0 {
522 ptr: 0x40169300u32 as _,
523};
524#[cfg(feature = "gpt16e4")]
525pub const GPT16E4: self::Gpt16E0 = self::Gpt16E0 {
526 ptr: 0x40169400u32 as _,
527};
528#[cfg(feature = "gpt16e5")]
529pub const GPT16E5: self::Gpt16E0 = self::Gpt16E0 {
530 ptr: 0x40169500u32 as _,
531};
532#[cfg(feature = "gpt_ops")]
533#[derive(Copy, Clone, Eq, PartialEq)]
534pub struct GptOps {
535 ptr: *mut u8,
536}
537#[cfg(feature = "gpt_ops")]
538pub const GPT_OPS: self::GptOps = self::GptOps {
539 ptr: 0x40169a00u32 as _,
540};
541#[cfg(feature = "adc120")]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct Adc120 {
544 ptr: *mut u8,
545}
546#[cfg(feature = "adc120")]
547pub const ADC120: self::Adc120 = self::Adc120 {
548 ptr: 0x40170000u32 as _,
549};
550#[cfg(feature = "dac12")]
551#[derive(Copy, Clone, Eq, PartialEq)]
552pub struct Dac12 {
553 ptr: *mut u8,
554}
555#[cfg(feature = "dac12")]
556pub const DAC12: self::Dac12 = self::Dac12 {
557 ptr: 0x40171000u32 as _,
558};
559#[cfg(feature = "tsd")]
560#[derive(Copy, Clone, Eq, PartialEq)]
561pub struct Tsd {
562 ptr: *mut u8,
563}
564#[cfg(feature = "tsd")]
565pub const TSD: self::Tsd = self::Tsd {
566 ptr: 0x407fb000u32 as _,
567};
568#[cfg(feature = "flad")]
569#[derive(Copy, Clone, Eq, PartialEq)]
570pub struct Flad {
571 ptr: *mut u8,
572}
573#[cfg(feature = "flad")]
574pub const FLAD: self::Flad = self::Flad {
575 ptr: 0x407fc000u32 as _,
576};
577#[cfg(feature = "faci")]
578#[derive(Copy, Clone, Eq, PartialEq)]
579pub struct Faci {
580 ptr: *mut u8,
581}
582#[cfg(feature = "faci")]
583pub const FACI: self::Faci = self::Faci {
584 ptr: 0x407fe000u32 as _,
585};
586#[cfg(feature = "qspi")]
587#[derive(Copy, Clone, Eq, PartialEq)]
588pub struct Qspi {
589 ptr: *mut u8,
590}
591#[cfg(feature = "qspi")]
592pub const QSPI: self::Qspi = self::Qspi {
593 ptr: 0x64000000u32 as _,
594};
595
596pub use cortex_m::peripheral::Peripherals as CorePeripherals;
597pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
598#[doc = "Number available in the NVIC for configuring priority"]
599pub const NVIC_PRIO_BITS: u8 = 4;
600#[doc(hidden)]
601pub union Vector {
602 _handler: unsafe extern "C" fn(),
603 _reserved: u32,
604}
605#[cfg(feature = "rt")]
606pub use self::Interrupt as interrupt;
607#[cfg(feature = "rt")]
608pub use cortex_m_rt::interrupt;
609#[cfg(feature = "rt")]
610pub mod interrupt_handlers {
611 unsafe extern "C" {
612 pub fn IEL0();
613 pub fn IEL1();
614 pub fn IEL2();
615 pub fn IEL3();
616 pub fn IEL4();
617 pub fn IEL5();
618 pub fn IEL6();
619 pub fn IEL7();
620 pub fn IEL8();
621 pub fn IEL9();
622 pub fn IEL10();
623 pub fn IEL11();
624 pub fn IEL12();
625 pub fn IEL13();
626 pub fn IEL14();
627 pub fn IEL15();
628 pub fn IEL16();
629 pub fn IEL17();
630 pub fn IEL18();
631 pub fn IEL19();
632 pub fn IEL20();
633 pub fn IEL21();
634 pub fn IEL22();
635 pub fn IEL23();
636 pub fn IEL24();
637 pub fn IEL25();
638 pub fn IEL26();
639 pub fn IEL27();
640 pub fn IEL28();
641 pub fn IEL29();
642 pub fn IEL30();
643 pub fn IEL31();
644 pub fn IEL32();
645 pub fn IEL33();
646 pub fn IEL34();
647 pub fn IEL35();
648 pub fn IEL36();
649 pub fn IEL37();
650 pub fn IEL38();
651 pub fn IEL39();
652 pub fn IEL40();
653 pub fn IEL41();
654 pub fn IEL42();
655 pub fn IEL43();
656 pub fn IEL44();
657 pub fn IEL45();
658 pub fn IEL46();
659 pub fn IEL47();
660 pub fn IEL48();
661 pub fn IEL49();
662 pub fn IEL50();
663 pub fn IEL51();
664 pub fn IEL52();
665 pub fn IEL53();
666 pub fn IEL54();
667 pub fn IEL55();
668 pub fn IEL56();
669 pub fn IEL57();
670 pub fn IEL58();
671 pub fn IEL59();
672 pub fn IEL60();
673 pub fn IEL61();
674 pub fn IEL62();
675 pub fn IEL63();
676 pub fn IEL64();
677 pub fn IEL65();
678 pub fn IEL66();
679 pub fn IEL67();
680 pub fn IEL68();
681 pub fn IEL69();
682 pub fn IEL70();
683 pub fn IEL71();
684 pub fn IEL72();
685 pub fn IEL73();
686 pub fn IEL74();
687 pub fn IEL75();
688 pub fn IEL76();
689 pub fn IEL77();
690 pub fn IEL78();
691 pub fn IEL79();
692 pub fn IEL80();
693 pub fn IEL81();
694 pub fn IEL82();
695 pub fn IEL83();
696 pub fn IEL84();
697 pub fn IEL85();
698 pub fn IEL86();
699 pub fn IEL87();
700 pub fn IEL88();
701 pub fn IEL89();
702 pub fn IEL90();
703 pub fn IEL91();
704 pub fn IEL92();
705 pub fn IEL93();
706 pub fn IEL94();
707 pub fn IEL95();
708 }
709}
710#[cfg(feature = "rt")]
711#[doc(hidden)]
712#[unsafe(link_section = ".vector_table.interrupts")]
713#[unsafe(no_mangle)]
714pub static __INTERRUPTS: [Vector; 96] = [
715 Vector {
716 _handler: interrupt_handlers::IEL0,
717 },
718 Vector {
719 _handler: interrupt_handlers::IEL1,
720 },
721 Vector {
722 _handler: interrupt_handlers::IEL2,
723 },
724 Vector {
725 _handler: interrupt_handlers::IEL3,
726 },
727 Vector {
728 _handler: interrupt_handlers::IEL4,
729 },
730 Vector {
731 _handler: interrupt_handlers::IEL5,
732 },
733 Vector {
734 _handler: interrupt_handlers::IEL6,
735 },
736 Vector {
737 _handler: interrupt_handlers::IEL7,
738 },
739 Vector {
740 _handler: interrupt_handlers::IEL8,
741 },
742 Vector {
743 _handler: interrupt_handlers::IEL9,
744 },
745 Vector {
746 _handler: interrupt_handlers::IEL10,
747 },
748 Vector {
749 _handler: interrupt_handlers::IEL11,
750 },
751 Vector {
752 _handler: interrupt_handlers::IEL12,
753 },
754 Vector {
755 _handler: interrupt_handlers::IEL13,
756 },
757 Vector {
758 _handler: interrupt_handlers::IEL14,
759 },
760 Vector {
761 _handler: interrupt_handlers::IEL15,
762 },
763 Vector {
764 _handler: interrupt_handlers::IEL16,
765 },
766 Vector {
767 _handler: interrupt_handlers::IEL17,
768 },
769 Vector {
770 _handler: interrupt_handlers::IEL18,
771 },
772 Vector {
773 _handler: interrupt_handlers::IEL19,
774 },
775 Vector {
776 _handler: interrupt_handlers::IEL20,
777 },
778 Vector {
779 _handler: interrupt_handlers::IEL21,
780 },
781 Vector {
782 _handler: interrupt_handlers::IEL22,
783 },
784 Vector {
785 _handler: interrupt_handlers::IEL23,
786 },
787 Vector {
788 _handler: interrupt_handlers::IEL24,
789 },
790 Vector {
791 _handler: interrupt_handlers::IEL25,
792 },
793 Vector {
794 _handler: interrupt_handlers::IEL26,
795 },
796 Vector {
797 _handler: interrupt_handlers::IEL27,
798 },
799 Vector {
800 _handler: interrupt_handlers::IEL28,
801 },
802 Vector {
803 _handler: interrupt_handlers::IEL29,
804 },
805 Vector {
806 _handler: interrupt_handlers::IEL30,
807 },
808 Vector {
809 _handler: interrupt_handlers::IEL31,
810 },
811 Vector {
812 _handler: interrupt_handlers::IEL32,
813 },
814 Vector {
815 _handler: interrupt_handlers::IEL33,
816 },
817 Vector {
818 _handler: interrupt_handlers::IEL34,
819 },
820 Vector {
821 _handler: interrupt_handlers::IEL35,
822 },
823 Vector {
824 _handler: interrupt_handlers::IEL36,
825 },
826 Vector {
827 _handler: interrupt_handlers::IEL37,
828 },
829 Vector {
830 _handler: interrupt_handlers::IEL38,
831 },
832 Vector {
833 _handler: interrupt_handlers::IEL39,
834 },
835 Vector {
836 _handler: interrupt_handlers::IEL40,
837 },
838 Vector {
839 _handler: interrupt_handlers::IEL41,
840 },
841 Vector {
842 _handler: interrupt_handlers::IEL42,
843 },
844 Vector {
845 _handler: interrupt_handlers::IEL43,
846 },
847 Vector {
848 _handler: interrupt_handlers::IEL44,
849 },
850 Vector {
851 _handler: interrupt_handlers::IEL45,
852 },
853 Vector {
854 _handler: interrupt_handlers::IEL46,
855 },
856 Vector {
857 _handler: interrupt_handlers::IEL47,
858 },
859 Vector {
860 _handler: interrupt_handlers::IEL48,
861 },
862 Vector {
863 _handler: interrupt_handlers::IEL49,
864 },
865 Vector {
866 _handler: interrupt_handlers::IEL50,
867 },
868 Vector {
869 _handler: interrupt_handlers::IEL51,
870 },
871 Vector {
872 _handler: interrupt_handlers::IEL52,
873 },
874 Vector {
875 _handler: interrupt_handlers::IEL53,
876 },
877 Vector {
878 _handler: interrupt_handlers::IEL54,
879 },
880 Vector {
881 _handler: interrupt_handlers::IEL55,
882 },
883 Vector {
884 _handler: interrupt_handlers::IEL56,
885 },
886 Vector {
887 _handler: interrupt_handlers::IEL57,
888 },
889 Vector {
890 _handler: interrupt_handlers::IEL58,
891 },
892 Vector {
893 _handler: interrupt_handlers::IEL59,
894 },
895 Vector {
896 _handler: interrupt_handlers::IEL60,
897 },
898 Vector {
899 _handler: interrupt_handlers::IEL61,
900 },
901 Vector {
902 _handler: interrupt_handlers::IEL62,
903 },
904 Vector {
905 _handler: interrupt_handlers::IEL63,
906 },
907 Vector {
908 _handler: interrupt_handlers::IEL64,
909 },
910 Vector {
911 _handler: interrupt_handlers::IEL65,
912 },
913 Vector {
914 _handler: interrupt_handlers::IEL66,
915 },
916 Vector {
917 _handler: interrupt_handlers::IEL67,
918 },
919 Vector {
920 _handler: interrupt_handlers::IEL68,
921 },
922 Vector {
923 _handler: interrupt_handlers::IEL69,
924 },
925 Vector {
926 _handler: interrupt_handlers::IEL70,
927 },
928 Vector {
929 _handler: interrupt_handlers::IEL71,
930 },
931 Vector {
932 _handler: interrupt_handlers::IEL72,
933 },
934 Vector {
935 _handler: interrupt_handlers::IEL73,
936 },
937 Vector {
938 _handler: interrupt_handlers::IEL74,
939 },
940 Vector {
941 _handler: interrupt_handlers::IEL75,
942 },
943 Vector {
944 _handler: interrupt_handlers::IEL76,
945 },
946 Vector {
947 _handler: interrupt_handlers::IEL77,
948 },
949 Vector {
950 _handler: interrupt_handlers::IEL78,
951 },
952 Vector {
953 _handler: interrupt_handlers::IEL79,
954 },
955 Vector {
956 _handler: interrupt_handlers::IEL80,
957 },
958 Vector {
959 _handler: interrupt_handlers::IEL81,
960 },
961 Vector {
962 _handler: interrupt_handlers::IEL82,
963 },
964 Vector {
965 _handler: interrupt_handlers::IEL83,
966 },
967 Vector {
968 _handler: interrupt_handlers::IEL84,
969 },
970 Vector {
971 _handler: interrupt_handlers::IEL85,
972 },
973 Vector {
974 _handler: interrupt_handlers::IEL86,
975 },
976 Vector {
977 _handler: interrupt_handlers::IEL87,
978 },
979 Vector {
980 _handler: interrupt_handlers::IEL88,
981 },
982 Vector {
983 _handler: interrupt_handlers::IEL89,
984 },
985 Vector {
986 _handler: interrupt_handlers::IEL90,
987 },
988 Vector {
989 _handler: interrupt_handlers::IEL91,
990 },
991 Vector {
992 _handler: interrupt_handlers::IEL92,
993 },
994 Vector {
995 _handler: interrupt_handlers::IEL93,
996 },
997 Vector {
998 _handler: interrupt_handlers::IEL94,
999 },
1000 Vector {
1001 _handler: interrupt_handlers::IEL95,
1002 },
1003];
1004#[doc = "Enumeration of all the interrupts."]
1005#[derive(Copy, Clone, Debug, PartialEq, Eq)]
1006#[repr(u16)]
1007pub enum Interrupt {
1008 #[doc = "ICU Interrupt 0"]
1009 IEL0 = 0,
1010
1011 #[doc = "ICU Interrupt 1"]
1012 IEL1 = 1,
1013
1014 #[doc = "ICU Interrupt 2"]
1015 IEL2 = 2,
1016
1017 #[doc = "ICU Interrupt 3"]
1018 IEL3 = 3,
1019
1020 #[doc = "ICU Interrupt 4"]
1021 IEL4 = 4,
1022
1023 #[doc = "ICU Interrupt 5"]
1024 IEL5 = 5,
1025
1026 #[doc = "ICU Interrupt 6"]
1027 IEL6 = 6,
1028
1029 #[doc = "ICU Interrupt 7"]
1030 IEL7 = 7,
1031
1032 #[doc = "ICU Interrupt 8"]
1033 IEL8 = 8,
1034
1035 #[doc = "ICU Interrupt 9"]
1036 IEL9 = 9,
1037
1038 #[doc = "ICU Interrupt 10"]
1039 IEL10 = 10,
1040
1041 #[doc = "ICU Interrupt 11"]
1042 IEL11 = 11,
1043
1044 #[doc = "ICU Interrupt 12"]
1045 IEL12 = 12,
1046
1047 #[doc = "ICU Interrupt 13"]
1048 IEL13 = 13,
1049
1050 #[doc = "ICU Interrupt 14"]
1051 IEL14 = 14,
1052
1053 #[doc = "ICU Interrupt 15"]
1054 IEL15 = 15,
1055
1056 #[doc = "ICU Interrupt 16"]
1057 IEL16 = 16,
1058
1059 #[doc = "ICU Interrupt 17"]
1060 IEL17 = 17,
1061
1062 #[doc = "ICU Interrupt 18"]
1063 IEL18 = 18,
1064
1065 #[doc = "ICU Interrupt 19"]
1066 IEL19 = 19,
1067
1068 #[doc = "ICU Interrupt 20"]
1069 IEL20 = 20,
1070
1071 #[doc = "ICU Interrupt 21"]
1072 IEL21 = 21,
1073
1074 #[doc = "ICU Interrupt 22"]
1075 IEL22 = 22,
1076
1077 #[doc = "ICU Interrupt 23"]
1078 IEL23 = 23,
1079
1080 #[doc = "ICU Interrupt 24"]
1081 IEL24 = 24,
1082
1083 #[doc = "ICU Interrupt 25"]
1084 IEL25 = 25,
1085
1086 #[doc = "ICU Interrupt 26"]
1087 IEL26 = 26,
1088
1089 #[doc = "ICU Interrupt 27"]
1090 IEL27 = 27,
1091
1092 #[doc = "ICU Interrupt 28"]
1093 IEL28 = 28,
1094
1095 #[doc = "ICU Interrupt 29"]
1096 IEL29 = 29,
1097
1098 #[doc = "ICU Interrupt 30"]
1099 IEL30 = 30,
1100
1101 #[doc = "ICU Interrupt 31"]
1102 IEL31 = 31,
1103
1104 #[doc = "ICU Interrupt 32"]
1105 IEL32 = 32,
1106
1107 #[doc = "ICU Interrupt 33"]
1108 IEL33 = 33,
1109
1110 #[doc = "ICU Interrupt 34"]
1111 IEL34 = 34,
1112
1113 #[doc = "ICU Interrupt 35"]
1114 IEL35 = 35,
1115
1116 #[doc = "ICU Interrupt 36"]
1117 IEL36 = 36,
1118
1119 #[doc = "ICU Interrupt 37"]
1120 IEL37 = 37,
1121
1122 #[doc = "ICU Interrupt 38"]
1123 IEL38 = 38,
1124
1125 #[doc = "ICU Interrupt 39"]
1126 IEL39 = 39,
1127
1128 #[doc = "ICU Interrupt 40"]
1129 IEL40 = 40,
1130
1131 #[doc = "ICU Interrupt 41"]
1132 IEL41 = 41,
1133
1134 #[doc = "ICU Interrupt 42"]
1135 IEL42 = 42,
1136
1137 #[doc = "ICU Interrupt 43"]
1138 IEL43 = 43,
1139
1140 #[doc = "ICU Interrupt 44"]
1141 IEL44 = 44,
1142
1143 #[doc = "ICU Interrupt 45"]
1144 IEL45 = 45,
1145
1146 #[doc = "ICU Interrupt 46"]
1147 IEL46 = 46,
1148
1149 #[doc = "ICU Interrupt 47"]
1150 IEL47 = 47,
1151
1152 #[doc = "ICU Interrupt 48"]
1153 IEL48 = 48,
1154
1155 #[doc = "ICU Interrupt 49"]
1156 IEL49 = 49,
1157
1158 #[doc = "ICU Interrupt 50"]
1159 IEL50 = 50,
1160
1161 #[doc = "ICU Interrupt 51"]
1162 IEL51 = 51,
1163
1164 #[doc = "ICU Interrupt 52"]
1165 IEL52 = 52,
1166
1167 #[doc = "ICU Interrupt 53"]
1168 IEL53 = 53,
1169
1170 #[doc = "ICU Interrupt 54"]
1171 IEL54 = 54,
1172
1173 #[doc = "ICU Interrupt 55"]
1174 IEL55 = 55,
1175
1176 #[doc = "ICU Interrupt 56"]
1177 IEL56 = 56,
1178
1179 #[doc = "ICU Interrupt 57"]
1180 IEL57 = 57,
1181
1182 #[doc = "ICU Interrupt 58"]
1183 IEL58 = 58,
1184
1185 #[doc = "ICU Interrupt 59"]
1186 IEL59 = 59,
1187
1188 #[doc = "ICU Interrupt 60"]
1189 IEL60 = 60,
1190
1191 #[doc = "ICU Interrupt 61"]
1192 IEL61 = 61,
1193
1194 #[doc = "ICU Interrupt 62"]
1195 IEL62 = 62,
1196
1197 #[doc = "ICU Interrupt 63"]
1198 IEL63 = 63,
1199
1200 #[doc = "ICU Interrupt 64"]
1201 IEL64 = 64,
1202
1203 #[doc = "ICU Interrupt 65"]
1204 IEL65 = 65,
1205
1206 #[doc = "ICU Interrupt 66"]
1207 IEL66 = 66,
1208
1209 #[doc = "ICU Interrupt 67"]
1210 IEL67 = 67,
1211
1212 #[doc = "ICU Interrupt 68"]
1213 IEL68 = 68,
1214
1215 #[doc = "ICU Interrupt 69"]
1216 IEL69 = 69,
1217
1218 #[doc = "ICU Interrupt 70"]
1219 IEL70 = 70,
1220
1221 #[doc = "ICU Interrupt 71"]
1222 IEL71 = 71,
1223
1224 #[doc = "ICU Interrupt 72"]
1225 IEL72 = 72,
1226
1227 #[doc = "ICU Interrupt 73"]
1228 IEL73 = 73,
1229
1230 #[doc = "ICU Interrupt 74"]
1231 IEL74 = 74,
1232
1233 #[doc = "ICU Interrupt 75"]
1234 IEL75 = 75,
1235
1236 #[doc = "ICU Interrupt 76"]
1237 IEL76 = 76,
1238
1239 #[doc = "ICU Interrupt 77"]
1240 IEL77 = 77,
1241
1242 #[doc = "ICU Interrupt 78"]
1243 IEL78 = 78,
1244
1245 #[doc = "ICU Interrupt 79"]
1246 IEL79 = 79,
1247
1248 #[doc = "ICU Interrupt 80"]
1249 IEL80 = 80,
1250
1251 #[doc = "ICU Interrupt 81"]
1252 IEL81 = 81,
1253
1254 #[doc = "ICU Interrupt 82"]
1255 IEL82 = 82,
1256
1257 #[doc = "ICU Interrupt 83"]
1258 IEL83 = 83,
1259
1260 #[doc = "ICU Interrupt 84"]
1261 IEL84 = 84,
1262
1263 #[doc = "ICU Interrupt 85"]
1264 IEL85 = 85,
1265
1266 #[doc = "ICU Interrupt 86"]
1267 IEL86 = 86,
1268
1269 #[doc = "ICU Interrupt 87"]
1270 IEL87 = 87,
1271
1272 #[doc = "ICU Interrupt 88"]
1273 IEL88 = 88,
1274
1275 #[doc = "ICU Interrupt 89"]
1276 IEL89 = 89,
1277
1278 #[doc = "ICU Interrupt 90"]
1279 IEL90 = 90,
1280
1281 #[doc = "ICU Interrupt 91"]
1282 IEL91 = 91,
1283
1284 #[doc = "ICU Interrupt 92"]
1285 IEL92 = 92,
1286
1287 #[doc = "ICU Interrupt 93"]
1288 IEL93 = 93,
1289
1290 #[doc = "ICU Interrupt 94"]
1291 IEL94 = 94,
1292
1293 #[doc = "ICU Interrupt 95"]
1294 IEL95 = 95,
1295}
1296unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
1297 #[inline(always)]
1298 fn number(self) -> u16 {
1299 self as u16
1300 }
1301}
1302#[allow(non_snake_case)]
1303pub struct Peripherals {
1305 #[cfg(feature = "rmpu")]
1306 pub RMPU: self::Rmpu,
1307 #[cfg(feature = "tzf")]
1308 pub TZF: self::Tzf,
1309 #[cfg(feature = "sram")]
1310 pub SRAM: self::Sram,
1311 #[cfg(feature = "bus")]
1312 pub BUS: self::Bus,
1313 #[cfg(feature = "dmac0")]
1314 pub DMAC0: self::Dmac0,
1315 #[cfg(feature = "dmac1")]
1316 pub DMAC1: self::Dmac0,
1317 #[cfg(feature = "dmac2")]
1318 pub DMAC2: self::Dmac0,
1319 #[cfg(feature = "dmac3")]
1320 pub DMAC3: self::Dmac0,
1321 #[cfg(feature = "dmac4")]
1322 pub DMAC4: self::Dmac0,
1323 #[cfg(feature = "dmac5")]
1324 pub DMAC5: self::Dmac0,
1325 #[cfg(feature = "dmac6")]
1326 pub DMAC6: self::Dmac0,
1327 #[cfg(feature = "dmac7")]
1328 pub DMAC7: self::Dmac0,
1329 #[cfg(feature = "dma")]
1330 pub DMA: self::Dma,
1331 #[cfg(feature = "dtc")]
1332 pub DTC: self::Dtc,
1333 #[cfg(feature = "icu")]
1334 pub ICU: self::Icu,
1335 #[cfg(feature = "cache")]
1336 pub CACHE: self::Cache,
1337 #[cfg(feature = "cpscu")]
1338 pub CPSCU: self::Cpscu,
1339 #[cfg(feature = "dbg")]
1340 pub DBG: self::Dbg,
1341 #[cfg(feature = "fcache")]
1342 pub FCACHE: self::Fcache,
1343 #[cfg(feature = "sysc")]
1344 pub SYSC: self::Sysc,
1345 #[cfg(feature = "port0")]
1346 pub PORT0: self::Port0,
1347 #[cfg(feature = "port1")]
1348 pub PORT1: self::Port1,
1349 #[cfg(feature = "port2")]
1350 pub PORT2: self::Port1,
1351 #[cfg(feature = "port3")]
1352 pub PORT3: self::Port1,
1353 #[cfg(feature = "port4")]
1354 pub PORT4: self::Port1,
1355 #[cfg(feature = "port5")]
1356 pub PORT5: self::Port0,
1357 #[cfg(feature = "port8")]
1358 pub PORT8: self::Port0,
1359 #[cfg(feature = "pfs")]
1360 pub PFS: self::Pfs,
1361 #[cfg(feature = "elc")]
1362 pub ELC: self::Elc,
1363 #[cfg(feature = "rtc")]
1364 pub RTC: self::Rtc,
1365 #[cfg(feature = "iwdt")]
1366 pub IWDT: self::Iwdt,
1367 #[cfg(feature = "wdt")]
1368 pub WDT: self::Wdt,
1369 #[cfg(feature = "cac")]
1370 pub CAC: self::Cac,
1371 #[cfg(feature = "mstp")]
1372 pub MSTP: self::Mstp,
1373 #[cfg(feature = "poeg")]
1374 pub POEG: self::Poeg,
1375 #[cfg(feature = "usbfs")]
1376 pub USBFS: self::Usbfs,
1377 #[cfg(feature = "ssie0")]
1378 pub SSIE0: self::Ssie0,
1379 #[cfg(feature = "cec")]
1380 pub CEC: self::Cec,
1381 #[cfg(feature = "canfd_b")]
1382 pub CANFD_B: self::CanfdB,
1383 #[cfg(feature = "pscu")]
1384 pub PSCU: self::Pscu,
1385 #[cfg(feature = "agtw0")]
1386 pub AGTW0: self::Agtw0,
1387 #[cfg(feature = "agtw1")]
1388 pub AGTW1: self::Agtw0,
1389 #[cfg(feature = "tsn")]
1390 pub TSN: self::Tsn,
1391 #[cfg(feature = "crc")]
1392 pub CRC: self::Crc,
1393 #[cfg(feature = "doc")]
1394 pub DOC: self::Doc,
1395 #[cfg(feature = "sci0")]
1396 pub SCI0: self::Sci0,
1397 #[cfg(feature = "sci9")]
1398 pub SCI9: self::Sci0,
1399 #[cfg(feature = "spi0")]
1400 pub SPI0: self::Spi0,
1401 #[cfg(feature = "spi1")]
1402 pub SPI1: self::Spi0,
1403 #[cfg(feature = "i3c")]
1404 pub I3C: self::I3C,
1405 #[cfg(feature = "eccmb")]
1406 pub ECCMB: self::Eccmb,
1407 #[cfg(feature = "gpt16e0")]
1408 pub GPT16E0: self::Gpt16E0,
1409 #[cfg(feature = "gpt16e1")]
1410 pub GPT16E1: self::Gpt16E0,
1411 #[cfg(feature = "gpt16e2")]
1412 pub GPT16E2: self::Gpt16E0,
1413 #[cfg(feature = "gpt16e3")]
1414 pub GPT16E3: self::Gpt16E0,
1415 #[cfg(feature = "gpt16e4")]
1416 pub GPT16E4: self::Gpt16E0,
1417 #[cfg(feature = "gpt16e5")]
1418 pub GPT16E5: self::Gpt16E0,
1419 #[cfg(feature = "gpt_ops")]
1420 pub GPT_OPS: self::GptOps,
1421 #[cfg(feature = "adc120")]
1422 pub ADC120: self::Adc120,
1423 #[cfg(feature = "dac12")]
1424 pub DAC12: self::Dac12,
1425 #[cfg(feature = "tsd")]
1426 pub TSD: self::Tsd,
1427 #[cfg(feature = "flad")]
1428 pub FLAD: self::Flad,
1429 #[cfg(feature = "faci")]
1430 pub FACI: self::Faci,
1431 #[cfg(feature = "qspi")]
1432 pub QSPI: self::Qspi,
1433}
1434
1435impl Peripherals {
1436 #[inline]
1439 pub fn take() -> Option<Self> {
1440 Some(Self::steal())
1441 }
1442
1443 #[inline]
1446 pub fn steal() -> Self {
1447 Peripherals {
1448 #[cfg(feature = "rmpu")]
1449 RMPU: crate::RMPU,
1450 #[cfg(feature = "tzf")]
1451 TZF: crate::TZF,
1452 #[cfg(feature = "sram")]
1453 SRAM: crate::SRAM,
1454 #[cfg(feature = "bus")]
1455 BUS: crate::BUS,
1456 #[cfg(feature = "dmac0")]
1457 DMAC0: crate::DMAC0,
1458 #[cfg(feature = "dmac1")]
1459 DMAC1: crate::DMAC1,
1460 #[cfg(feature = "dmac2")]
1461 DMAC2: crate::DMAC2,
1462 #[cfg(feature = "dmac3")]
1463 DMAC3: crate::DMAC3,
1464 #[cfg(feature = "dmac4")]
1465 DMAC4: crate::DMAC4,
1466 #[cfg(feature = "dmac5")]
1467 DMAC5: crate::DMAC5,
1468 #[cfg(feature = "dmac6")]
1469 DMAC6: crate::DMAC6,
1470 #[cfg(feature = "dmac7")]
1471 DMAC7: crate::DMAC7,
1472 #[cfg(feature = "dma")]
1473 DMA: crate::DMA,
1474 #[cfg(feature = "dtc")]
1475 DTC: crate::DTC,
1476 #[cfg(feature = "icu")]
1477 ICU: crate::ICU,
1478 #[cfg(feature = "cache")]
1479 CACHE: crate::CACHE,
1480 #[cfg(feature = "cpscu")]
1481 CPSCU: crate::CPSCU,
1482 #[cfg(feature = "dbg")]
1483 DBG: crate::DBG,
1484 #[cfg(feature = "fcache")]
1485 FCACHE: crate::FCACHE,
1486 #[cfg(feature = "sysc")]
1487 SYSC: crate::SYSC,
1488 #[cfg(feature = "port0")]
1489 PORT0: crate::PORT0,
1490 #[cfg(feature = "port1")]
1491 PORT1: crate::PORT1,
1492 #[cfg(feature = "port2")]
1493 PORT2: crate::PORT2,
1494 #[cfg(feature = "port3")]
1495 PORT3: crate::PORT3,
1496 #[cfg(feature = "port4")]
1497 PORT4: crate::PORT4,
1498 #[cfg(feature = "port5")]
1499 PORT5: crate::PORT5,
1500 #[cfg(feature = "port8")]
1501 PORT8: crate::PORT8,
1502 #[cfg(feature = "pfs")]
1503 PFS: crate::PFS,
1504 #[cfg(feature = "elc")]
1505 ELC: crate::ELC,
1506 #[cfg(feature = "rtc")]
1507 RTC: crate::RTC,
1508 #[cfg(feature = "iwdt")]
1509 IWDT: crate::IWDT,
1510 #[cfg(feature = "wdt")]
1511 WDT: crate::WDT,
1512 #[cfg(feature = "cac")]
1513 CAC: crate::CAC,
1514 #[cfg(feature = "mstp")]
1515 MSTP: crate::MSTP,
1516 #[cfg(feature = "poeg")]
1517 POEG: crate::POEG,
1518 #[cfg(feature = "usbfs")]
1519 USBFS: crate::USBFS,
1520 #[cfg(feature = "ssie0")]
1521 SSIE0: crate::SSIE0,
1522 #[cfg(feature = "cec")]
1523 CEC: crate::CEC,
1524 #[cfg(feature = "canfd_b")]
1525 CANFD_B: crate::CANFD_B,
1526 #[cfg(feature = "pscu")]
1527 PSCU: crate::PSCU,
1528 #[cfg(feature = "agtw0")]
1529 AGTW0: crate::AGTW0,
1530 #[cfg(feature = "agtw1")]
1531 AGTW1: crate::AGTW1,
1532 #[cfg(feature = "tsn")]
1533 TSN: crate::TSN,
1534 #[cfg(feature = "crc")]
1535 CRC: crate::CRC,
1536 #[cfg(feature = "doc")]
1537 DOC: crate::DOC,
1538 #[cfg(feature = "sci0")]
1539 SCI0: crate::SCI0,
1540 #[cfg(feature = "sci9")]
1541 SCI9: crate::SCI9,
1542 #[cfg(feature = "spi0")]
1543 SPI0: crate::SPI0,
1544 #[cfg(feature = "spi1")]
1545 SPI1: crate::SPI1,
1546 #[cfg(feature = "i3c")]
1547 I3C: crate::I3C,
1548 #[cfg(feature = "eccmb")]
1549 ECCMB: crate::ECCMB,
1550 #[cfg(feature = "gpt16e0")]
1551 GPT16E0: crate::GPT16E0,
1552 #[cfg(feature = "gpt16e1")]
1553 GPT16E1: crate::GPT16E1,
1554 #[cfg(feature = "gpt16e2")]
1555 GPT16E2: crate::GPT16E2,
1556 #[cfg(feature = "gpt16e3")]
1557 GPT16E3: crate::GPT16E3,
1558 #[cfg(feature = "gpt16e4")]
1559 GPT16E4: crate::GPT16E4,
1560 #[cfg(feature = "gpt16e5")]
1561 GPT16E5: crate::GPT16E5,
1562 #[cfg(feature = "gpt_ops")]
1563 GPT_OPS: crate::GPT_OPS,
1564 #[cfg(feature = "adc120")]
1565 ADC120: crate::ADC120,
1566 #[cfg(feature = "dac12")]
1567 DAC12: crate::DAC12,
1568 #[cfg(feature = "tsd")]
1569 TSD: crate::TSD,
1570 #[cfg(feature = "flad")]
1571 FLAD: crate::FLAD,
1572 #[cfg(feature = "faci")]
1573 FACI: crate::FACI,
1574 #[cfg(feature = "qspi")]
1575 QSPI: crate::QSPI,
1576 }
1577 }
1578}