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ra6e2_pac/
gpt16e0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:10:15 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM 16-bit Timer 0"]
28unsafe impl ::core::marker::Send for super::Gpt16E0 {}
29unsafe impl ::core::marker::Sync for super::Gpt16E0 {}
30impl super::Gpt16E0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "General PWM Timer Write-Protection Register"]
38    #[inline(always)]
39    pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "General PWM Timer Software Start Register"]
48    #[inline(always)]
49    pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "General PWM Timer Software Stop Register"]
58    #[inline(always)]
59    pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(8usize),
63            )
64        }
65    }
66
67    #[doc = "General PWM Timer Software Clear Register"]
68    #[inline(always)]
69    pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70        unsafe {
71            crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72                self._svd2pac_as_ptr().add(12usize),
73            )
74        }
75    }
76
77    #[doc = "General PWM Timer Start Source Select Register"]
78    #[inline(always)]
79    pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(16usize),
83            )
84        }
85    }
86
87    #[doc = "General PWM Timer Stop Source Select Register"]
88    #[inline(always)]
89    pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "General PWM Timer Clear Source Select Register"]
98    #[inline(always)]
99    pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(24usize),
103            )
104        }
105    }
106
107    #[doc = "General PWM Timer Up Count Source Select Register"]
108    #[inline(always)]
109    pub const fn gtupsr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(28usize),
115            )
116        }
117    }
118
119    #[doc = "General PWM Timer Down Count Source Select Register"]
120    #[inline(always)]
121    pub const fn gtdnsr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(32usize),
127            )
128        }
129    }
130
131    #[doc = "General PWM Timer Input Capture Source Select Register A"]
132    #[inline(always)]
133    pub const fn gticasr(
134        &self,
135    ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(36usize),
139            )
140        }
141    }
142
143    #[doc = "General PWM Timer Input Capture Source Select Register B"]
144    #[inline(always)]
145    pub const fn gticbsr(
146        &self,
147    ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(40usize),
151            )
152        }
153    }
154
155    #[doc = "General PWM Timer Control Register"]
156    #[inline(always)]
157    pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(44usize),
161            )
162        }
163    }
164
165    #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166    #[inline(always)]
167    pub const fn gtuddtyc(
168        &self,
169    ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(48usize),
173            )
174        }
175    }
176
177    #[doc = "General PWM Timer I/O Control Register"]
178    #[inline(always)]
179    pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(52usize),
183            )
184        }
185    }
186
187    #[doc = "General PWM Timer Interrupt Output Setting Register"]
188    #[inline(always)]
189    pub const fn gtintad(
190        &self,
191    ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(56usize),
195            )
196        }
197    }
198
199    #[doc = "General PWM Timer Status Register"]
200    #[inline(always)]
201    pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(60usize),
205            )
206        }
207    }
208
209    #[doc = "General PWM Timer Buffer Enable Register"]
210    #[inline(always)]
211    pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(64usize),
215            )
216        }
217    }
218
219    #[doc = "General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"]
220    #[inline(always)]
221    pub const fn gtitc(&self) -> &'static crate::common::Reg<self::Gtitc_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Gtitc_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(68usize),
225            )
226        }
227    }
228
229    #[doc = "General PWM Timer Counter"]
230    #[inline(always)]
231    pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
232        unsafe {
233            crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
234                self._svd2pac_as_ptr().add(72usize),
235            )
236        }
237    }
238
239    #[doc = "General PWM Timer Compare Capture Register A"]
240    #[inline(always)]
241    pub const fn gtccra(
242        &self,
243    ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
244        unsafe {
245            crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
246                self._svd2pac_as_ptr().add(76usize),
247            )
248        }
249    }
250
251    #[doc = "General PWM Timer Compare Capture Register B"]
252    #[inline(always)]
253    pub const fn gtccrb(
254        &self,
255    ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(80usize),
259            )
260        }
261    }
262
263    #[doc = "General PWM Timer Compare Capture Register C"]
264    #[inline(always)]
265    pub const fn gtccrc(
266        &self,
267    ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(84usize),
271            )
272        }
273    }
274
275    #[doc = "General PWM Timer Compare Capture Register E"]
276    #[inline(always)]
277    pub const fn gtccre(
278        &self,
279    ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(88usize),
283            )
284        }
285    }
286
287    #[doc = "General PWM Timer Compare Capture Register D"]
288    #[inline(always)]
289    pub const fn gtccrd(
290        &self,
291    ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(92usize),
295            )
296        }
297    }
298
299    #[doc = "General PWM Timer Compare Capture Register F"]
300    #[inline(always)]
301    pub const fn gtccrf(
302        &self,
303    ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(96usize),
307            )
308        }
309    }
310
311    #[doc = "General PWM Timer Cycle Setting Register"]
312    #[inline(always)]
313    pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(100usize),
317            )
318        }
319    }
320
321    #[doc = "General PWM Timer Cycle Setting Buffer Register"]
322    #[inline(always)]
323    pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(104usize),
327            )
328        }
329    }
330
331    #[doc = "General PWM Timer Period Setting Double-Buffer Register"]
332    #[inline(always)]
333    pub const fn gtpdbr(
334        &self,
335    ) -> &'static crate::common::Reg<self::Gtpdbr_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Gtpdbr_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(108usize),
339            )
340        }
341    }
342
343    #[doc = "A/D Conversion Start Request Timing Register A"]
344    #[inline(always)]
345    pub const fn gtadtra(
346        &self,
347    ) -> &'static crate::common::Reg<self::Gtadtra_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Gtadtra_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(112usize),
351            )
352        }
353    }
354
355    #[doc = "A/D Conversion Start Request Timing Buffer Register A"]
356    #[inline(always)]
357    pub const fn gtadtbra(
358        &self,
359    ) -> &'static crate::common::Reg<self::Gtadtbra_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Gtadtbra_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(116usize),
363            )
364        }
365    }
366
367    #[doc = "A/D Conversion Start Request Timing Double-Buffer Register A"]
368    #[inline(always)]
369    pub const fn gtadtdbra(
370        &self,
371    ) -> &'static crate::common::Reg<self::Gtadtdbra_SPEC, crate::common::RW> {
372        unsafe {
373            crate::common::Reg::<self::Gtadtdbra_SPEC, crate::common::RW>::from_ptr(
374                self._svd2pac_as_ptr().add(120usize),
375            )
376        }
377    }
378
379    #[doc = "A/D Conversion Start Request Timing Register B"]
380    #[inline(always)]
381    pub const fn gtadtrb(
382        &self,
383    ) -> &'static crate::common::Reg<self::Gtadtrb_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Gtadtrb_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(124usize),
387            )
388        }
389    }
390
391    #[doc = "A/D Conversion Start Request Timing Buffer Register B"]
392    #[inline(always)]
393    pub const fn gtadtbrb(
394        &self,
395    ) -> &'static crate::common::Reg<self::Gtadtbrb_SPEC, crate::common::RW> {
396        unsafe {
397            crate::common::Reg::<self::Gtadtbrb_SPEC, crate::common::RW>::from_ptr(
398                self._svd2pac_as_ptr().add(128usize),
399            )
400        }
401    }
402
403    #[doc = "A/D Conversion Start Request Timing Double-Buffer Register B"]
404    #[inline(always)]
405    pub const fn gtadtdbrb(
406        &self,
407    ) -> &'static crate::common::Reg<self::Gtadtdbrb_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Gtadtdbrb_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(132usize),
411            )
412        }
413    }
414
415    #[doc = "General PWM Timer Dead Time Control Register"]
416    #[inline(always)]
417    pub const fn gtdtcr(
418        &self,
419    ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
420        unsafe {
421            crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
422                self._svd2pac_as_ptr().add(136usize),
423            )
424        }
425    }
426
427    #[doc = "General PWM Timer Dead Time Value Register U"]
428    #[inline(always)]
429    pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
430        unsafe {
431            crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
432                self._svd2pac_as_ptr().add(140usize),
433            )
434        }
435    }
436
437    #[doc = "General PWM Timer Dead Time Value Register D"]
438    #[inline(always)]
439    pub const fn gtdvd(&self) -> &'static crate::common::Reg<self::Gtdvd_SPEC, crate::common::RW> {
440        unsafe {
441            crate::common::Reg::<self::Gtdvd_SPEC, crate::common::RW>::from_ptr(
442                self._svd2pac_as_ptr().add(144usize),
443            )
444        }
445    }
446
447    #[doc = "General PWM Timer Dead Time Buffer Register U"]
448    #[inline(always)]
449    pub const fn gtdbu(&self) -> &'static crate::common::Reg<self::Gtdbu_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Gtdbu_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(148usize),
453            )
454        }
455    }
456
457    #[doc = "General PWM Timer Dead Time Buffer Register D"]
458    #[inline(always)]
459    pub const fn gtdbd(&self) -> &'static crate::common::Reg<self::Gtdbd_SPEC, crate::common::RW> {
460        unsafe {
461            crate::common::Reg::<self::Gtdbd_SPEC, crate::common::RW>::from_ptr(
462                self._svd2pac_as_ptr().add(152usize),
463            )
464        }
465    }
466
467    #[doc = "General PWM Timer Output Protection Function Status Register"]
468    #[inline(always)]
469    pub const fn gtsos(&self) -> &'static crate::common::Reg<self::Gtsos_SPEC, crate::common::R> {
470        unsafe {
471            crate::common::Reg::<self::Gtsos_SPEC, crate::common::R>::from_ptr(
472                self._svd2pac_as_ptr().add(156usize),
473            )
474        }
475    }
476
477    #[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
478    #[inline(always)]
479    pub const fn gtsotr(
480        &self,
481    ) -> &'static crate::common::Reg<self::Gtsotr_SPEC, crate::common::RW> {
482        unsafe {
483            crate::common::Reg::<self::Gtsotr_SPEC, crate::common::RW>::from_ptr(
484                self._svd2pac_as_ptr().add(160usize),
485            )
486        }
487    }
488
489    #[doc = "General PWM Timer A/D Conversion Start Request Signal Monitoring Register"]
490    #[inline(always)]
491    pub const fn gtadsmr(
492        &self,
493    ) -> &'static crate::common::Reg<self::Gtadsmr_SPEC, crate::common::RW> {
494        unsafe {
495            crate::common::Reg::<self::Gtadsmr_SPEC, crate::common::RW>::from_ptr(
496                self._svd2pac_as_ptr().add(164usize),
497            )
498        }
499    }
500
501    #[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
502    #[inline(always)]
503    pub const fn gticlf(
504        &self,
505    ) -> &'static crate::common::Reg<self::Gticlf_SPEC, crate::common::RW> {
506        unsafe {
507            crate::common::Reg::<self::Gticlf_SPEC, crate::common::RW>::from_ptr(
508                self._svd2pac_as_ptr().add(184usize),
509            )
510        }
511    }
512
513    #[doc = "General PWM Timer Period Count Register"]
514    #[inline(always)]
515    pub const fn gtpc(&self) -> &'static crate::common::Reg<self::Gtpc_SPEC, crate::common::RW> {
516        unsafe {
517            crate::common::Reg::<self::Gtpc_SPEC, crate::common::RW>::from_ptr(
518                self._svd2pac_as_ptr().add(188usize),
519            )
520        }
521    }
522
523    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
524    #[inline(always)]
525    pub const fn gtsecsr(
526        &self,
527    ) -> &'static crate::common::Reg<self::Gtsecsr_SPEC, crate::common::RW> {
528        unsafe {
529            crate::common::Reg::<self::Gtsecsr_SPEC, crate::common::RW>::from_ptr(
530                self._svd2pac_as_ptr().add(208usize),
531            )
532        }
533    }
534
535    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
536    #[inline(always)]
537    pub const fn gtsecr(
538        &self,
539    ) -> &'static crate::common::Reg<self::Gtsecr_SPEC, crate::common::RW> {
540        unsafe {
541            crate::common::Reg::<self::Gtsecr_SPEC, crate::common::RW>::from_ptr(
542                self._svd2pac_as_ptr().add(212usize),
543            )
544        }
545    }
546}
547#[doc(hidden)]
548#[derive(Copy, Clone, Eq, PartialEq)]
549pub struct Gtwp_SPEC;
550impl crate::sealed::RegSpec for Gtwp_SPEC {
551    type DataType = u32;
552}
553
554#[doc = "General PWM Timer Write-Protection Register"]
555pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
556
557impl Gtwp {
558    #[doc = "Register Write Disable"]
559    #[inline(always)]
560    pub fn wp(
561        self,
562    ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
563    {
564        crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
565    }
566
567    #[doc = "GTSTR.CSTRT Bit Write Disable"]
568    #[inline(always)]
569    pub fn strwp(
570        self,
571    ) -> crate::common::RegisterField<
572        1,
573        0x1,
574        1,
575        0,
576        gtwp::Strwp,
577        gtwp::Strwp,
578        Gtwp_SPEC,
579        crate::common::RW,
580    > {
581        crate::common::RegisterField::<
582            1,
583            0x1,
584            1,
585            0,
586            gtwp::Strwp,
587            gtwp::Strwp,
588            Gtwp_SPEC,
589            crate::common::RW,
590        >::from_register(self, 0)
591    }
592
593    #[doc = "GTSTP.CSTOP Bit Write Disable"]
594    #[inline(always)]
595    pub fn stpwp(
596        self,
597    ) -> crate::common::RegisterField<
598        2,
599        0x1,
600        1,
601        0,
602        gtwp::Stpwp,
603        gtwp::Stpwp,
604        Gtwp_SPEC,
605        crate::common::RW,
606    > {
607        crate::common::RegisterField::<
608            2,
609            0x1,
610            1,
611            0,
612            gtwp::Stpwp,
613            gtwp::Stpwp,
614            Gtwp_SPEC,
615            crate::common::RW,
616        >::from_register(self, 0)
617    }
618
619    #[doc = "GTCLR.CCLR Bit Write Disable"]
620    #[inline(always)]
621    pub fn clrwp(
622        self,
623    ) -> crate::common::RegisterField<
624        3,
625        0x1,
626        1,
627        0,
628        gtwp::Clrwp,
629        gtwp::Clrwp,
630        Gtwp_SPEC,
631        crate::common::RW,
632    > {
633        crate::common::RegisterField::<
634            3,
635            0x1,
636            1,
637            0,
638            gtwp::Clrwp,
639            gtwp::Clrwp,
640            Gtwp_SPEC,
641            crate::common::RW,
642        >::from_register(self, 0)
643    }
644
645    #[doc = "Common Register Write Disabled"]
646    #[inline(always)]
647    pub fn cmnwp(
648        self,
649    ) -> crate::common::RegisterField<
650        4,
651        0x1,
652        1,
653        0,
654        gtwp::Cmnwp,
655        gtwp::Cmnwp,
656        Gtwp_SPEC,
657        crate::common::RW,
658    > {
659        crate::common::RegisterField::<
660            4,
661            0x1,
662            1,
663            0,
664            gtwp::Cmnwp,
665            gtwp::Cmnwp,
666            Gtwp_SPEC,
667            crate::common::RW,
668        >::from_register(self, 0)
669    }
670
671    #[doc = "GTWP Key Code"]
672    #[inline(always)]
673    pub fn prkey(
674        self,
675    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Gtwp_SPEC, crate::common::W> {
676        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Gtwp_SPEC,crate::common::W>::from_register(self,0)
677    }
678}
679impl ::core::default::Default for Gtwp {
680    #[inline(always)]
681    fn default() -> Gtwp {
682        <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
683    }
684}
685pub mod gtwp {
686
687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
688    pub struct Wp_SPEC;
689    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
690    impl Wp {
691        #[doc = "Write to the register enabled"]
692        pub const _0: Self = Self::new(0);
693
694        #[doc = "Write to the register disabled"]
695        pub const _1: Self = Self::new(1);
696    }
697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
698    pub struct Strwp_SPEC;
699    pub type Strwp = crate::EnumBitfieldStruct<u8, Strwp_SPEC>;
700    impl Strwp {
701        #[doc = "Write to the bit is enabled"]
702        pub const _0: Self = Self::new(0);
703
704        #[doc = "Write to the bit is disabled"]
705        pub const _1: Self = Self::new(1);
706    }
707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
708    pub struct Stpwp_SPEC;
709    pub type Stpwp = crate::EnumBitfieldStruct<u8, Stpwp_SPEC>;
710    impl Stpwp {
711        #[doc = "Write to the bit is enabled"]
712        pub const _0: Self = Self::new(0);
713
714        #[doc = "Write to the bit is disabled"]
715        pub const _1: Self = Self::new(1);
716    }
717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
718    pub struct Clrwp_SPEC;
719    pub type Clrwp = crate::EnumBitfieldStruct<u8, Clrwp_SPEC>;
720    impl Clrwp {
721        #[doc = "Write to the bit is enabled"]
722        pub const _0: Self = Self::new(0);
723
724        #[doc = "Write to the bit is disabled"]
725        pub const _1: Self = Self::new(1);
726    }
727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
728    pub struct Cmnwp_SPEC;
729    pub type Cmnwp = crate::EnumBitfieldStruct<u8, Cmnwp_SPEC>;
730    impl Cmnwp {
731        #[doc = "Write to the register is enabled"]
732        pub const _0: Self = Self::new(0);
733
734        #[doc = "Write to the register is disabled"]
735        pub const _1: Self = Self::new(1);
736    }
737}
738#[doc(hidden)]
739#[derive(Copy, Clone, Eq, PartialEq)]
740pub struct Gtstr_SPEC;
741impl crate::sealed::RegSpec for Gtstr_SPEC {
742    type DataType = u32;
743}
744
745#[doc = "General PWM Timer Software Start Register"]
746pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
747
748impl Gtstr {
749    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
750    #[inline(always)]
751    pub fn cstrt0(
752        self,
753    ) -> crate::common::RegisterField<
754        0,
755        0x1,
756        1,
757        0,
758        gtstr::Cstrt0,
759        gtstr::Cstrt0,
760        Gtstr_SPEC,
761        crate::common::RW,
762    > {
763        crate::common::RegisterField::<
764            0,
765            0x1,
766            1,
767            0,
768            gtstr::Cstrt0,
769            gtstr::Cstrt0,
770            Gtstr_SPEC,
771            crate::common::RW,
772        >::from_register(self, 0)
773    }
774
775    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
776    #[inline(always)]
777    pub fn cstrt1(
778        self,
779    ) -> crate::common::RegisterField<
780        1,
781        0x1,
782        1,
783        0,
784        gtstr::Cstrt1,
785        gtstr::Cstrt1,
786        Gtstr_SPEC,
787        crate::common::RW,
788    > {
789        crate::common::RegisterField::<
790            1,
791            0x1,
792            1,
793            0,
794            gtstr::Cstrt1,
795            gtstr::Cstrt1,
796            Gtstr_SPEC,
797            crate::common::RW,
798        >::from_register(self, 0)
799    }
800
801    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
802    #[inline(always)]
803    pub fn cstrt2(
804        self,
805    ) -> crate::common::RegisterField<
806        2,
807        0x1,
808        1,
809        0,
810        gtstr::Cstrt2,
811        gtstr::Cstrt2,
812        Gtstr_SPEC,
813        crate::common::RW,
814    > {
815        crate::common::RegisterField::<
816            2,
817            0x1,
818            1,
819            0,
820            gtstr::Cstrt2,
821            gtstr::Cstrt2,
822            Gtstr_SPEC,
823            crate::common::RW,
824        >::from_register(self, 0)
825    }
826
827    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
828    #[inline(always)]
829    pub fn cstrt3(
830        self,
831    ) -> crate::common::RegisterField<
832        3,
833        0x1,
834        1,
835        0,
836        gtstr::Cstrt3,
837        gtstr::Cstrt3,
838        Gtstr_SPEC,
839        crate::common::RW,
840    > {
841        crate::common::RegisterField::<
842            3,
843            0x1,
844            1,
845            0,
846            gtstr::Cstrt3,
847            gtstr::Cstrt3,
848            Gtstr_SPEC,
849            crate::common::RW,
850        >::from_register(self, 0)
851    }
852
853    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
854    #[inline(always)]
855    pub fn cstrt4(
856        self,
857    ) -> crate::common::RegisterField<
858        4,
859        0x1,
860        1,
861        0,
862        gtstr::Cstrt4,
863        gtstr::Cstrt4,
864        Gtstr_SPEC,
865        crate::common::RW,
866    > {
867        crate::common::RegisterField::<
868            4,
869            0x1,
870            1,
871            0,
872            gtstr::Cstrt4,
873            gtstr::Cstrt4,
874            Gtstr_SPEC,
875            crate::common::RW,
876        >::from_register(self, 0)
877    }
878
879    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
880    #[inline(always)]
881    pub fn cstrt5(
882        self,
883    ) -> crate::common::RegisterField<
884        5,
885        0x1,
886        1,
887        0,
888        gtstr::Cstrt5,
889        gtstr::Cstrt5,
890        Gtstr_SPEC,
891        crate::common::RW,
892    > {
893        crate::common::RegisterField::<
894            5,
895            0x1,
896            1,
897            0,
898            gtstr::Cstrt5,
899            gtstr::Cstrt5,
900            Gtstr_SPEC,
901            crate::common::RW,
902        >::from_register(self, 0)
903    }
904}
905impl ::core::default::Default for Gtstr {
906    #[inline(always)]
907    fn default() -> Gtstr {
908        <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
909    }
910}
911pub mod gtstr {
912
913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
914    pub struct Cstrt0_SPEC;
915    pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
916    impl Cstrt0 {
917        #[doc = "GTCNT counter not start"]
918        pub const _0: Self = Self::new(0);
919
920        #[doc = "GTCNT counter start"]
921        pub const _1: Self = Self::new(1);
922    }
923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
924    pub struct Cstrt1_SPEC;
925    pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
926    impl Cstrt1 {
927        #[doc = "GTCNT counter not start"]
928        pub const _0: Self = Self::new(0);
929
930        #[doc = "GTCNT counter start"]
931        pub const _1: Self = Self::new(1);
932    }
933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
934    pub struct Cstrt2_SPEC;
935    pub type Cstrt2 = crate::EnumBitfieldStruct<u8, Cstrt2_SPEC>;
936    impl Cstrt2 {
937        #[doc = "GTCNT counter not start"]
938        pub const _0: Self = Self::new(0);
939
940        #[doc = "GTCNT counter start"]
941        pub const _1: Self = Self::new(1);
942    }
943    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
944    pub struct Cstrt3_SPEC;
945    pub type Cstrt3 = crate::EnumBitfieldStruct<u8, Cstrt3_SPEC>;
946    impl Cstrt3 {
947        #[doc = "GTCNT counter not start"]
948        pub const _0: Self = Self::new(0);
949
950        #[doc = "GTCNT counter start"]
951        pub const _1: Self = Self::new(1);
952    }
953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
954    pub struct Cstrt4_SPEC;
955    pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
956    impl Cstrt4 {
957        #[doc = "GTCNT counter not start"]
958        pub const _0: Self = Self::new(0);
959
960        #[doc = "GTCNT counter start"]
961        pub const _1: Self = Self::new(1);
962    }
963    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
964    pub struct Cstrt5_SPEC;
965    pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
966    impl Cstrt5 {
967        #[doc = "GTCNT counter not start"]
968        pub const _0: Self = Self::new(0);
969
970        #[doc = "GTCNT counter start"]
971        pub const _1: Self = Self::new(1);
972    }
973}
974#[doc(hidden)]
975#[derive(Copy, Clone, Eq, PartialEq)]
976pub struct Gtstp_SPEC;
977impl crate::sealed::RegSpec for Gtstp_SPEC {
978    type DataType = u32;
979}
980
981#[doc = "General PWM Timer Software Stop Register"]
982pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
983
984impl Gtstp {
985    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
986    #[inline(always)]
987    pub fn cstop0(
988        self,
989    ) -> crate::common::RegisterField<
990        0,
991        0x1,
992        1,
993        0,
994        gtstp::Cstop0,
995        gtstp::Cstop0,
996        Gtstp_SPEC,
997        crate::common::RW,
998    > {
999        crate::common::RegisterField::<
1000            0,
1001            0x1,
1002            1,
1003            0,
1004            gtstp::Cstop0,
1005            gtstp::Cstop0,
1006            Gtstp_SPEC,
1007            crate::common::RW,
1008        >::from_register(self, 0)
1009    }
1010
1011    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1012    #[inline(always)]
1013    pub fn cstop1(
1014        self,
1015    ) -> crate::common::RegisterField<
1016        1,
1017        0x1,
1018        1,
1019        0,
1020        gtstp::Cstop1,
1021        gtstp::Cstop1,
1022        Gtstp_SPEC,
1023        crate::common::RW,
1024    > {
1025        crate::common::RegisterField::<
1026            1,
1027            0x1,
1028            1,
1029            0,
1030            gtstp::Cstop1,
1031            gtstp::Cstop1,
1032            Gtstp_SPEC,
1033            crate::common::RW,
1034        >::from_register(self, 0)
1035    }
1036
1037    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1038    #[inline(always)]
1039    pub fn cstop2(
1040        self,
1041    ) -> crate::common::RegisterField<
1042        2,
1043        0x1,
1044        1,
1045        0,
1046        gtstp::Cstop2,
1047        gtstp::Cstop2,
1048        Gtstp_SPEC,
1049        crate::common::RW,
1050    > {
1051        crate::common::RegisterField::<
1052            2,
1053            0x1,
1054            1,
1055            0,
1056            gtstp::Cstop2,
1057            gtstp::Cstop2,
1058            Gtstp_SPEC,
1059            crate::common::RW,
1060        >::from_register(self, 0)
1061    }
1062
1063    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1064    #[inline(always)]
1065    pub fn cstop3(
1066        self,
1067    ) -> crate::common::RegisterField<
1068        3,
1069        0x1,
1070        1,
1071        0,
1072        gtstp::Cstop3,
1073        gtstp::Cstop3,
1074        Gtstp_SPEC,
1075        crate::common::RW,
1076    > {
1077        crate::common::RegisterField::<
1078            3,
1079            0x1,
1080            1,
1081            0,
1082            gtstp::Cstop3,
1083            gtstp::Cstop3,
1084            Gtstp_SPEC,
1085            crate::common::RW,
1086        >::from_register(self, 0)
1087    }
1088
1089    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1090    #[inline(always)]
1091    pub fn cstop4(
1092        self,
1093    ) -> crate::common::RegisterField<
1094        4,
1095        0x1,
1096        1,
1097        0,
1098        gtstp::Cstop4,
1099        gtstp::Cstop4,
1100        Gtstp_SPEC,
1101        crate::common::RW,
1102    > {
1103        crate::common::RegisterField::<
1104            4,
1105            0x1,
1106            1,
1107            0,
1108            gtstp::Cstop4,
1109            gtstp::Cstop4,
1110            Gtstp_SPEC,
1111            crate::common::RW,
1112        >::from_register(self, 0)
1113    }
1114
1115    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1116    #[inline(always)]
1117    pub fn cstop5(
1118        self,
1119    ) -> crate::common::RegisterField<
1120        5,
1121        0x1,
1122        1,
1123        0,
1124        gtstp::Cstop5,
1125        gtstp::Cstop5,
1126        Gtstp_SPEC,
1127        crate::common::RW,
1128    > {
1129        crate::common::RegisterField::<
1130            5,
1131            0x1,
1132            1,
1133            0,
1134            gtstp::Cstop5,
1135            gtstp::Cstop5,
1136            Gtstp_SPEC,
1137            crate::common::RW,
1138        >::from_register(self, 0)
1139    }
1140}
1141impl ::core::default::Default for Gtstp {
1142    #[inline(always)]
1143    fn default() -> Gtstp {
1144        <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1145    }
1146}
1147pub mod gtstp {
1148
1149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1150    pub struct Cstop0_SPEC;
1151    pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1152    impl Cstop0 {
1153        #[doc = "GTCNT counter not stop"]
1154        pub const _0: Self = Self::new(0);
1155
1156        #[doc = "GTCNT counter stop"]
1157        pub const _1: Self = Self::new(1);
1158    }
1159    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1160    pub struct Cstop1_SPEC;
1161    pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1162    impl Cstop1 {
1163        #[doc = "GTCNT counter not stop"]
1164        pub const _0: Self = Self::new(0);
1165
1166        #[doc = "GTCNT counter stop"]
1167        pub const _1: Self = Self::new(1);
1168    }
1169    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1170    pub struct Cstop2_SPEC;
1171    pub type Cstop2 = crate::EnumBitfieldStruct<u8, Cstop2_SPEC>;
1172    impl Cstop2 {
1173        #[doc = "GTCNT counter not stop"]
1174        pub const _0: Self = Self::new(0);
1175
1176        #[doc = "GTCNT counter stop"]
1177        pub const _1: Self = Self::new(1);
1178    }
1179    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1180    pub struct Cstop3_SPEC;
1181    pub type Cstop3 = crate::EnumBitfieldStruct<u8, Cstop3_SPEC>;
1182    impl Cstop3 {
1183        #[doc = "GTCNT counter not stop"]
1184        pub const _0: Self = Self::new(0);
1185
1186        #[doc = "GTCNT counter stop"]
1187        pub const _1: Self = Self::new(1);
1188    }
1189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1190    pub struct Cstop4_SPEC;
1191    pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1192    impl Cstop4 {
1193        #[doc = "GTCNT counter not stop"]
1194        pub const _0: Self = Self::new(0);
1195
1196        #[doc = "GTCNT counter stop"]
1197        pub const _1: Self = Self::new(1);
1198    }
1199    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1200    pub struct Cstop5_SPEC;
1201    pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1202    impl Cstop5 {
1203        #[doc = "GTCNT counter not stop"]
1204        pub const _0: Self = Self::new(0);
1205
1206        #[doc = "GTCNT counter stop"]
1207        pub const _1: Self = Self::new(1);
1208    }
1209}
1210#[doc(hidden)]
1211#[derive(Copy, Clone, Eq, PartialEq)]
1212pub struct Gtclr_SPEC;
1213impl crate::sealed::RegSpec for Gtclr_SPEC {
1214    type DataType = u32;
1215}
1216
1217#[doc = "General PWM Timer Software Clear Register"]
1218pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1219
1220impl Gtclr {
1221    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1222    #[inline(always)]
1223    pub fn cclr0(
1224        self,
1225    ) -> crate::common::RegisterField<
1226        0,
1227        0x1,
1228        1,
1229        0,
1230        gtclr::Cclr0,
1231        gtclr::Cclr0,
1232        Gtclr_SPEC,
1233        crate::common::W,
1234    > {
1235        crate::common::RegisterField::<
1236            0,
1237            0x1,
1238            1,
1239            0,
1240            gtclr::Cclr0,
1241            gtclr::Cclr0,
1242            Gtclr_SPEC,
1243            crate::common::W,
1244        >::from_register(self, 0)
1245    }
1246
1247    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1248    #[inline(always)]
1249    pub fn cclr1(
1250        self,
1251    ) -> crate::common::RegisterField<
1252        1,
1253        0x1,
1254        1,
1255        0,
1256        gtclr::Cclr1,
1257        gtclr::Cclr1,
1258        Gtclr_SPEC,
1259        crate::common::W,
1260    > {
1261        crate::common::RegisterField::<
1262            1,
1263            0x1,
1264            1,
1265            0,
1266            gtclr::Cclr1,
1267            gtclr::Cclr1,
1268            Gtclr_SPEC,
1269            crate::common::W,
1270        >::from_register(self, 0)
1271    }
1272
1273    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1274    #[inline(always)]
1275    pub fn cclr2(
1276        self,
1277    ) -> crate::common::RegisterField<
1278        2,
1279        0x1,
1280        1,
1281        0,
1282        gtclr::Cclr2,
1283        gtclr::Cclr2,
1284        Gtclr_SPEC,
1285        crate::common::W,
1286    > {
1287        crate::common::RegisterField::<
1288            2,
1289            0x1,
1290            1,
1291            0,
1292            gtclr::Cclr2,
1293            gtclr::Cclr2,
1294            Gtclr_SPEC,
1295            crate::common::W,
1296        >::from_register(self, 0)
1297    }
1298
1299    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1300    #[inline(always)]
1301    pub fn cclr3(
1302        self,
1303    ) -> crate::common::RegisterField<
1304        3,
1305        0x1,
1306        1,
1307        0,
1308        gtclr::Cclr3,
1309        gtclr::Cclr3,
1310        Gtclr_SPEC,
1311        crate::common::W,
1312    > {
1313        crate::common::RegisterField::<
1314            3,
1315            0x1,
1316            1,
1317            0,
1318            gtclr::Cclr3,
1319            gtclr::Cclr3,
1320            Gtclr_SPEC,
1321            crate::common::W,
1322        >::from_register(self, 0)
1323    }
1324
1325    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1326    #[inline(always)]
1327    pub fn cclr4(
1328        self,
1329    ) -> crate::common::RegisterField<
1330        4,
1331        0x1,
1332        1,
1333        0,
1334        gtclr::Cclr4,
1335        gtclr::Cclr4,
1336        Gtclr_SPEC,
1337        crate::common::W,
1338    > {
1339        crate::common::RegisterField::<
1340            4,
1341            0x1,
1342            1,
1343            0,
1344            gtclr::Cclr4,
1345            gtclr::Cclr4,
1346            Gtclr_SPEC,
1347            crate::common::W,
1348        >::from_register(self, 0)
1349    }
1350
1351    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1352    #[inline(always)]
1353    pub fn cclr5(
1354        self,
1355    ) -> crate::common::RegisterField<
1356        5,
1357        0x1,
1358        1,
1359        0,
1360        gtclr::Cclr5,
1361        gtclr::Cclr5,
1362        Gtclr_SPEC,
1363        crate::common::W,
1364    > {
1365        crate::common::RegisterField::<
1366            5,
1367            0x1,
1368            1,
1369            0,
1370            gtclr::Cclr5,
1371            gtclr::Cclr5,
1372            Gtclr_SPEC,
1373            crate::common::W,
1374        >::from_register(self, 0)
1375    }
1376}
1377impl ::core::default::Default for Gtclr {
1378    #[inline(always)]
1379    fn default() -> Gtclr {
1380        <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1381    }
1382}
1383pub mod gtclr {
1384
1385    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1386    pub struct Cclr0_SPEC;
1387    pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
1388    impl Cclr0 {
1389        #[doc = "GTCNT counter is not cleared"]
1390        pub const _0: Self = Self::new(0);
1391
1392        #[doc = "GTCNT counter is cleared"]
1393        pub const _1: Self = Self::new(1);
1394    }
1395    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1396    pub struct Cclr1_SPEC;
1397    pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
1398    impl Cclr1 {
1399        #[doc = "GTCNT counter is not cleared"]
1400        pub const _0: Self = Self::new(0);
1401
1402        #[doc = "GTCNT counter is cleared"]
1403        pub const _1: Self = Self::new(1);
1404    }
1405    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1406    pub struct Cclr2_SPEC;
1407    pub type Cclr2 = crate::EnumBitfieldStruct<u8, Cclr2_SPEC>;
1408    impl Cclr2 {
1409        #[doc = "GTCNT counter is not cleared"]
1410        pub const _0: Self = Self::new(0);
1411
1412        #[doc = "GTCNT counter is cleared"]
1413        pub const _1: Self = Self::new(1);
1414    }
1415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1416    pub struct Cclr3_SPEC;
1417    pub type Cclr3 = crate::EnumBitfieldStruct<u8, Cclr3_SPEC>;
1418    impl Cclr3 {
1419        #[doc = "GTCNT counter is not cleared"]
1420        pub const _0: Self = Self::new(0);
1421
1422        #[doc = "GTCNT counter is cleared"]
1423        pub const _1: Self = Self::new(1);
1424    }
1425    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1426    pub struct Cclr4_SPEC;
1427    pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
1428    impl Cclr4 {
1429        #[doc = "GTCNT counter is not cleared"]
1430        pub const _0: Self = Self::new(0);
1431
1432        #[doc = "GTCNT counter is cleared"]
1433        pub const _1: Self = Self::new(1);
1434    }
1435    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1436    pub struct Cclr5_SPEC;
1437    pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
1438    impl Cclr5 {
1439        #[doc = "GTCNT counter is not cleared"]
1440        pub const _0: Self = Self::new(0);
1441
1442        #[doc = "GTCNT counter is cleared"]
1443        pub const _1: Self = Self::new(1);
1444    }
1445}
1446#[doc(hidden)]
1447#[derive(Copy, Clone, Eq, PartialEq)]
1448pub struct Gtssr_SPEC;
1449impl crate::sealed::RegSpec for Gtssr_SPEC {
1450    type DataType = u32;
1451}
1452
1453#[doc = "General PWM Timer Start Source Select Register"]
1454pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
1455
1456impl Gtssr {
1457    #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
1458    #[inline(always)]
1459    pub fn ssgtrgar(
1460        self,
1461    ) -> crate::common::RegisterField<
1462        0,
1463        0x1,
1464        1,
1465        0,
1466        gtssr::Ssgtrgar,
1467        gtssr::Ssgtrgar,
1468        Gtssr_SPEC,
1469        crate::common::RW,
1470    > {
1471        crate::common::RegisterField::<
1472            0,
1473            0x1,
1474            1,
1475            0,
1476            gtssr::Ssgtrgar,
1477            gtssr::Ssgtrgar,
1478            Gtssr_SPEC,
1479            crate::common::RW,
1480        >::from_register(self, 0)
1481    }
1482
1483    #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
1484    #[inline(always)]
1485    pub fn ssgtrgaf(
1486        self,
1487    ) -> crate::common::RegisterField<
1488        1,
1489        0x1,
1490        1,
1491        0,
1492        gtssr::Ssgtrgaf,
1493        gtssr::Ssgtrgaf,
1494        Gtssr_SPEC,
1495        crate::common::RW,
1496    > {
1497        crate::common::RegisterField::<
1498            1,
1499            0x1,
1500            1,
1501            0,
1502            gtssr::Ssgtrgaf,
1503            gtssr::Ssgtrgaf,
1504            Gtssr_SPEC,
1505            crate::common::RW,
1506        >::from_register(self, 0)
1507    }
1508
1509    #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
1510    #[inline(always)]
1511    pub fn ssgtrgbr(
1512        self,
1513    ) -> crate::common::RegisterField<
1514        2,
1515        0x1,
1516        1,
1517        0,
1518        gtssr::Ssgtrgbr,
1519        gtssr::Ssgtrgbr,
1520        Gtssr_SPEC,
1521        crate::common::RW,
1522    > {
1523        crate::common::RegisterField::<
1524            2,
1525            0x1,
1526            1,
1527            0,
1528            gtssr::Ssgtrgbr,
1529            gtssr::Ssgtrgbr,
1530            Gtssr_SPEC,
1531            crate::common::RW,
1532        >::from_register(self, 0)
1533    }
1534
1535    #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
1536    #[inline(always)]
1537    pub fn ssgtrgbf(
1538        self,
1539    ) -> crate::common::RegisterField<
1540        3,
1541        0x1,
1542        1,
1543        0,
1544        gtssr::Ssgtrgbf,
1545        gtssr::Ssgtrgbf,
1546        Gtssr_SPEC,
1547        crate::common::RW,
1548    > {
1549        crate::common::RegisterField::<
1550            3,
1551            0x1,
1552            1,
1553            0,
1554            gtssr::Ssgtrgbf,
1555            gtssr::Ssgtrgbf,
1556            Gtssr_SPEC,
1557            crate::common::RW,
1558        >::from_register(self, 0)
1559    }
1560
1561    #[doc = "GTETRGC Pin Rising Input Source Counter Start Enable"]
1562    #[inline(always)]
1563    pub fn ssgtrgcr(
1564        self,
1565    ) -> crate::common::RegisterField<
1566        4,
1567        0x1,
1568        1,
1569        0,
1570        gtssr::Ssgtrgcr,
1571        gtssr::Ssgtrgcr,
1572        Gtssr_SPEC,
1573        crate::common::RW,
1574    > {
1575        crate::common::RegisterField::<
1576            4,
1577            0x1,
1578            1,
1579            0,
1580            gtssr::Ssgtrgcr,
1581            gtssr::Ssgtrgcr,
1582            Gtssr_SPEC,
1583            crate::common::RW,
1584        >::from_register(self, 0)
1585    }
1586
1587    #[doc = "GTETRGC Pin Falling Input Source Counter Start Enable"]
1588    #[inline(always)]
1589    pub fn ssgtrgcf(
1590        self,
1591    ) -> crate::common::RegisterField<
1592        5,
1593        0x1,
1594        1,
1595        0,
1596        gtssr::Ssgtrgcf,
1597        gtssr::Ssgtrgcf,
1598        Gtssr_SPEC,
1599        crate::common::RW,
1600    > {
1601        crate::common::RegisterField::<
1602            5,
1603            0x1,
1604            1,
1605            0,
1606            gtssr::Ssgtrgcf,
1607            gtssr::Ssgtrgcf,
1608            Gtssr_SPEC,
1609            crate::common::RW,
1610        >::from_register(self, 0)
1611    }
1612
1613    #[doc = "GTETRGD Pin Rising Input Source Counter Start Enable"]
1614    #[inline(always)]
1615    pub fn ssgtrgdr(
1616        self,
1617    ) -> crate::common::RegisterField<
1618        6,
1619        0x1,
1620        1,
1621        0,
1622        gtssr::Ssgtrgdr,
1623        gtssr::Ssgtrgdr,
1624        Gtssr_SPEC,
1625        crate::common::RW,
1626    > {
1627        crate::common::RegisterField::<
1628            6,
1629            0x1,
1630            1,
1631            0,
1632            gtssr::Ssgtrgdr,
1633            gtssr::Ssgtrgdr,
1634            Gtssr_SPEC,
1635            crate::common::RW,
1636        >::from_register(self, 0)
1637    }
1638
1639    #[doc = "GTETRGD Pin Falling Input Source Counter Start Enable"]
1640    #[inline(always)]
1641    pub fn ssgtrgdf(
1642        self,
1643    ) -> crate::common::RegisterField<
1644        7,
1645        0x1,
1646        1,
1647        0,
1648        gtssr::Ssgtrgdf,
1649        gtssr::Ssgtrgdf,
1650        Gtssr_SPEC,
1651        crate::common::RW,
1652    > {
1653        crate::common::RegisterField::<
1654            7,
1655            0x1,
1656            1,
1657            0,
1658            gtssr::Ssgtrgdf,
1659            gtssr::Ssgtrgdf,
1660            Gtssr_SPEC,
1661            crate::common::RW,
1662        >::from_register(self, 0)
1663    }
1664
1665    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable"]
1666    #[inline(always)]
1667    pub fn sscarbl(
1668        self,
1669    ) -> crate::common::RegisterField<
1670        8,
1671        0x1,
1672        1,
1673        0,
1674        gtssr::Sscarbl,
1675        gtssr::Sscarbl,
1676        Gtssr_SPEC,
1677        crate::common::RW,
1678    > {
1679        crate::common::RegisterField::<
1680            8,
1681            0x1,
1682            1,
1683            0,
1684            gtssr::Sscarbl,
1685            gtssr::Sscarbl,
1686            Gtssr_SPEC,
1687            crate::common::RW,
1688        >::from_register(self, 0)
1689    }
1690
1691    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable"]
1692    #[inline(always)]
1693    pub fn sscarbh(
1694        self,
1695    ) -> crate::common::RegisterField<
1696        9,
1697        0x1,
1698        1,
1699        0,
1700        gtssr::Sscarbh,
1701        gtssr::Sscarbh,
1702        Gtssr_SPEC,
1703        crate::common::RW,
1704    > {
1705        crate::common::RegisterField::<
1706            9,
1707            0x1,
1708            1,
1709            0,
1710            gtssr::Sscarbh,
1711            gtssr::Sscarbh,
1712            Gtssr_SPEC,
1713            crate::common::RW,
1714        >::from_register(self, 0)
1715    }
1716
1717    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable"]
1718    #[inline(always)]
1719    pub fn sscafbl(
1720        self,
1721    ) -> crate::common::RegisterField<
1722        10,
1723        0x1,
1724        1,
1725        0,
1726        gtssr::Sscafbl,
1727        gtssr::Sscafbl,
1728        Gtssr_SPEC,
1729        crate::common::RW,
1730    > {
1731        crate::common::RegisterField::<
1732            10,
1733            0x1,
1734            1,
1735            0,
1736            gtssr::Sscafbl,
1737            gtssr::Sscafbl,
1738            Gtssr_SPEC,
1739            crate::common::RW,
1740        >::from_register(self, 0)
1741    }
1742
1743    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable"]
1744    #[inline(always)]
1745    pub fn sscafbh(
1746        self,
1747    ) -> crate::common::RegisterField<
1748        11,
1749        0x1,
1750        1,
1751        0,
1752        gtssr::Sscafbh,
1753        gtssr::Sscafbh,
1754        Gtssr_SPEC,
1755        crate::common::RW,
1756    > {
1757        crate::common::RegisterField::<
1758            11,
1759            0x1,
1760            1,
1761            0,
1762            gtssr::Sscafbh,
1763            gtssr::Sscafbh,
1764            Gtssr_SPEC,
1765            crate::common::RW,
1766        >::from_register(self, 0)
1767    }
1768
1769    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable"]
1770    #[inline(always)]
1771    pub fn sscbral(
1772        self,
1773    ) -> crate::common::RegisterField<
1774        12,
1775        0x1,
1776        1,
1777        0,
1778        gtssr::Sscbral,
1779        gtssr::Sscbral,
1780        Gtssr_SPEC,
1781        crate::common::RW,
1782    > {
1783        crate::common::RegisterField::<
1784            12,
1785            0x1,
1786            1,
1787            0,
1788            gtssr::Sscbral,
1789            gtssr::Sscbral,
1790            Gtssr_SPEC,
1791            crate::common::RW,
1792        >::from_register(self, 0)
1793    }
1794
1795    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable"]
1796    #[inline(always)]
1797    pub fn sscbrah(
1798        self,
1799    ) -> crate::common::RegisterField<
1800        13,
1801        0x1,
1802        1,
1803        0,
1804        gtssr::Sscbrah,
1805        gtssr::Sscbrah,
1806        Gtssr_SPEC,
1807        crate::common::RW,
1808    > {
1809        crate::common::RegisterField::<
1810            13,
1811            0x1,
1812            1,
1813            0,
1814            gtssr::Sscbrah,
1815            gtssr::Sscbrah,
1816            Gtssr_SPEC,
1817            crate::common::RW,
1818        >::from_register(self, 0)
1819    }
1820
1821    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable"]
1822    #[inline(always)]
1823    pub fn sscbfal(
1824        self,
1825    ) -> crate::common::RegisterField<
1826        14,
1827        0x1,
1828        1,
1829        0,
1830        gtssr::Sscbfal,
1831        gtssr::Sscbfal,
1832        Gtssr_SPEC,
1833        crate::common::RW,
1834    > {
1835        crate::common::RegisterField::<
1836            14,
1837            0x1,
1838            1,
1839            0,
1840            gtssr::Sscbfal,
1841            gtssr::Sscbfal,
1842            Gtssr_SPEC,
1843            crate::common::RW,
1844        >::from_register(self, 0)
1845    }
1846
1847    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable"]
1848    #[inline(always)]
1849    pub fn sscbfah(
1850        self,
1851    ) -> crate::common::RegisterField<
1852        15,
1853        0x1,
1854        1,
1855        0,
1856        gtssr::Sscbfah,
1857        gtssr::Sscbfah,
1858        Gtssr_SPEC,
1859        crate::common::RW,
1860    > {
1861        crate::common::RegisterField::<
1862            15,
1863            0x1,
1864            1,
1865            0,
1866            gtssr::Sscbfah,
1867            gtssr::Sscbfah,
1868            Gtssr_SPEC,
1869            crate::common::RW,
1870        >::from_register(self, 0)
1871    }
1872
1873    #[doc = "ELC_GPTA Event Source Counter Start Enable"]
1874    #[inline(always)]
1875    pub fn sselca(
1876        self,
1877    ) -> crate::common::RegisterField<
1878        16,
1879        0x1,
1880        1,
1881        0,
1882        gtssr::Sselca,
1883        gtssr::Sselca,
1884        Gtssr_SPEC,
1885        crate::common::RW,
1886    > {
1887        crate::common::RegisterField::<
1888            16,
1889            0x1,
1890            1,
1891            0,
1892            gtssr::Sselca,
1893            gtssr::Sselca,
1894            Gtssr_SPEC,
1895            crate::common::RW,
1896        >::from_register(self, 0)
1897    }
1898
1899    #[doc = "ELC_GPTB Event Source Counter Start Enable"]
1900    #[inline(always)]
1901    pub fn sselcb(
1902        self,
1903    ) -> crate::common::RegisterField<
1904        17,
1905        0x1,
1906        1,
1907        0,
1908        gtssr::Sselcb,
1909        gtssr::Sselcb,
1910        Gtssr_SPEC,
1911        crate::common::RW,
1912    > {
1913        crate::common::RegisterField::<
1914            17,
1915            0x1,
1916            1,
1917            0,
1918            gtssr::Sselcb,
1919            gtssr::Sselcb,
1920            Gtssr_SPEC,
1921            crate::common::RW,
1922        >::from_register(self, 0)
1923    }
1924
1925    #[doc = "ELC_GPTC Event Source Counter Start Enable"]
1926    #[inline(always)]
1927    pub fn sselcc(
1928        self,
1929    ) -> crate::common::RegisterField<
1930        18,
1931        0x1,
1932        1,
1933        0,
1934        gtssr::Sselcc,
1935        gtssr::Sselcc,
1936        Gtssr_SPEC,
1937        crate::common::RW,
1938    > {
1939        crate::common::RegisterField::<
1940            18,
1941            0x1,
1942            1,
1943            0,
1944            gtssr::Sselcc,
1945            gtssr::Sselcc,
1946            Gtssr_SPEC,
1947            crate::common::RW,
1948        >::from_register(self, 0)
1949    }
1950
1951    #[doc = "ELC_GPTD Event Source Counter Start Enable"]
1952    #[inline(always)]
1953    pub fn sselcd(
1954        self,
1955    ) -> crate::common::RegisterField<
1956        19,
1957        0x1,
1958        1,
1959        0,
1960        gtssr::Sselcd,
1961        gtssr::Sselcd,
1962        Gtssr_SPEC,
1963        crate::common::RW,
1964    > {
1965        crate::common::RegisterField::<
1966            19,
1967            0x1,
1968            1,
1969            0,
1970            gtssr::Sselcd,
1971            gtssr::Sselcd,
1972            Gtssr_SPEC,
1973            crate::common::RW,
1974        >::from_register(self, 0)
1975    }
1976
1977    #[doc = "ELC_GPTE Event Source Counter Start Enable"]
1978    #[inline(always)]
1979    pub fn sselce(
1980        self,
1981    ) -> crate::common::RegisterField<
1982        20,
1983        0x1,
1984        1,
1985        0,
1986        gtssr::Sselce,
1987        gtssr::Sselce,
1988        Gtssr_SPEC,
1989        crate::common::RW,
1990    > {
1991        crate::common::RegisterField::<
1992            20,
1993            0x1,
1994            1,
1995            0,
1996            gtssr::Sselce,
1997            gtssr::Sselce,
1998            Gtssr_SPEC,
1999            crate::common::RW,
2000        >::from_register(self, 0)
2001    }
2002
2003    #[doc = "ELC_GPTF Event Source Counter Start Enable"]
2004    #[inline(always)]
2005    pub fn sselcf(
2006        self,
2007    ) -> crate::common::RegisterField<
2008        21,
2009        0x1,
2010        1,
2011        0,
2012        gtssr::Sselcf,
2013        gtssr::Sselcf,
2014        Gtssr_SPEC,
2015        crate::common::RW,
2016    > {
2017        crate::common::RegisterField::<
2018            21,
2019            0x1,
2020            1,
2021            0,
2022            gtssr::Sselcf,
2023            gtssr::Sselcf,
2024            Gtssr_SPEC,
2025            crate::common::RW,
2026        >::from_register(self, 0)
2027    }
2028
2029    #[doc = "ELC_GPTG Event Source Counter Start Enable"]
2030    #[inline(always)]
2031    pub fn sselcg(
2032        self,
2033    ) -> crate::common::RegisterField<
2034        22,
2035        0x1,
2036        1,
2037        0,
2038        gtssr::Sselcg,
2039        gtssr::Sselcg,
2040        Gtssr_SPEC,
2041        crate::common::RW,
2042    > {
2043        crate::common::RegisterField::<
2044            22,
2045            0x1,
2046            1,
2047            0,
2048            gtssr::Sselcg,
2049            gtssr::Sselcg,
2050            Gtssr_SPEC,
2051            crate::common::RW,
2052        >::from_register(self, 0)
2053    }
2054
2055    #[doc = "ELC_GPTH Event Source Counter Start Enable"]
2056    #[inline(always)]
2057    pub fn sselch(
2058        self,
2059    ) -> crate::common::RegisterField<
2060        23,
2061        0x1,
2062        1,
2063        0,
2064        gtssr::Sselch,
2065        gtssr::Sselch,
2066        Gtssr_SPEC,
2067        crate::common::RW,
2068    > {
2069        crate::common::RegisterField::<
2070            23,
2071            0x1,
2072            1,
2073            0,
2074            gtssr::Sselch,
2075            gtssr::Sselch,
2076            Gtssr_SPEC,
2077            crate::common::RW,
2078        >::from_register(self, 0)
2079    }
2080
2081    #[doc = "Software Source Counter Start Enable"]
2082    #[inline(always)]
2083    pub fn cstrt(
2084        self,
2085    ) -> crate::common::RegisterField<
2086        31,
2087        0x1,
2088        1,
2089        0,
2090        gtssr::Cstrt,
2091        gtssr::Cstrt,
2092        Gtssr_SPEC,
2093        crate::common::RW,
2094    > {
2095        crate::common::RegisterField::<
2096            31,
2097            0x1,
2098            1,
2099            0,
2100            gtssr::Cstrt,
2101            gtssr::Cstrt,
2102            Gtssr_SPEC,
2103            crate::common::RW,
2104        >::from_register(self, 0)
2105    }
2106}
2107impl ::core::default::Default for Gtssr {
2108    #[inline(always)]
2109    fn default() -> Gtssr {
2110        <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
2111    }
2112}
2113pub mod gtssr {
2114
2115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2116    pub struct Ssgtrgar_SPEC;
2117    pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
2118    impl Ssgtrgar {
2119        #[doc = "Counter start disabled on the rising edge of GTETRGA input"]
2120        pub const _0: Self = Self::new(0);
2121
2122        #[doc = "Counter start enabled on the rising edge of GTETRGA input"]
2123        pub const _1: Self = Self::new(1);
2124    }
2125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2126    pub struct Ssgtrgaf_SPEC;
2127    pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
2128    impl Ssgtrgaf {
2129        #[doc = "Counter start disabled on the falling edge of GTETRGA input"]
2130        pub const _0: Self = Self::new(0);
2131
2132        #[doc = "Counter start enabled on the falling edge of GTETRGA input"]
2133        pub const _1: Self = Self::new(1);
2134    }
2135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2136    pub struct Ssgtrgbr_SPEC;
2137    pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
2138    impl Ssgtrgbr {
2139        #[doc = "Counter start disabled on the rising edge of GTETRGB input"]
2140        pub const _0: Self = Self::new(0);
2141
2142        #[doc = "Counter start enabled on the rising edge of GTETRGB input"]
2143        pub const _1: Self = Self::new(1);
2144    }
2145    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2146    pub struct Ssgtrgbf_SPEC;
2147    pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
2148    impl Ssgtrgbf {
2149        #[doc = "Counter start disabled on the falling edge of GTETRGB input"]
2150        pub const _0: Self = Self::new(0);
2151
2152        #[doc = "Counter start enabled on the falling edge of GTETRGB input"]
2153        pub const _1: Self = Self::new(1);
2154    }
2155    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2156    pub struct Ssgtrgcr_SPEC;
2157    pub type Ssgtrgcr = crate::EnumBitfieldStruct<u8, Ssgtrgcr_SPEC>;
2158    impl Ssgtrgcr {
2159        #[doc = "Counter start disabled on the rising edge of GTETRGC input"]
2160        pub const _0: Self = Self::new(0);
2161
2162        #[doc = "Counter start enabled on the rising edge of GTETRGC input"]
2163        pub const _1: Self = Self::new(1);
2164    }
2165    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2166    pub struct Ssgtrgcf_SPEC;
2167    pub type Ssgtrgcf = crate::EnumBitfieldStruct<u8, Ssgtrgcf_SPEC>;
2168    impl Ssgtrgcf {
2169        #[doc = "Counter start disabled on the falling edge of GTETRGC input"]
2170        pub const _0: Self = Self::new(0);
2171
2172        #[doc = "Counter start enabled on the falling edge of GTETRGC input"]
2173        pub const _1: Self = Self::new(1);
2174    }
2175    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2176    pub struct Ssgtrgdr_SPEC;
2177    pub type Ssgtrgdr = crate::EnumBitfieldStruct<u8, Ssgtrgdr_SPEC>;
2178    impl Ssgtrgdr {
2179        #[doc = "Counter start disabled on the rising edge of GTETRGD input"]
2180        pub const _0: Self = Self::new(0);
2181
2182        #[doc = "Counter start enabled on the rising edge of GTETRGD input"]
2183        pub const _1: Self = Self::new(1);
2184    }
2185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2186    pub struct Ssgtrgdf_SPEC;
2187    pub type Ssgtrgdf = crate::EnumBitfieldStruct<u8, Ssgtrgdf_SPEC>;
2188    impl Ssgtrgdf {
2189        #[doc = "Counter start disabled on the falling edge of GTETRGD input"]
2190        pub const _0: Self = Self::new(0);
2191
2192        #[doc = "Counter start enabled on the falling edge of GTETRGD input"]
2193        pub const _1: Self = Self::new(1);
2194    }
2195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2196    pub struct Sscarbl_SPEC;
2197    pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
2198    impl Sscarbl {
2199        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2200        pub const _0: Self = Self::new(0);
2201
2202        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2203        pub const _1: Self = Self::new(1);
2204    }
2205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2206    pub struct Sscarbh_SPEC;
2207    pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
2208    impl Sscarbh {
2209        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2210        pub const _0: Self = Self::new(0);
2211
2212        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2213        pub const _1: Self = Self::new(1);
2214    }
2215    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2216    pub struct Sscafbl_SPEC;
2217    pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2218    impl Sscafbl {
2219        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2220        pub const _0: Self = Self::new(0);
2221
2222        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2223        pub const _1: Self = Self::new(1);
2224    }
2225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2226    pub struct Sscafbh_SPEC;
2227    pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2228    impl Sscafbh {
2229        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2230        pub const _0: Self = Self::new(0);
2231
2232        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2233        pub const _1: Self = Self::new(1);
2234    }
2235    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2236    pub struct Sscbral_SPEC;
2237    pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2238    impl Sscbral {
2239        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2240        pub const _0: Self = Self::new(0);
2241
2242        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2243        pub const _1: Self = Self::new(1);
2244    }
2245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2246    pub struct Sscbrah_SPEC;
2247    pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2248    impl Sscbrah {
2249        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2250        pub const _0: Self = Self::new(0);
2251
2252        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2253        pub const _1: Self = Self::new(1);
2254    }
2255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2256    pub struct Sscbfal_SPEC;
2257    pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2258    impl Sscbfal {
2259        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2260        pub const _0: Self = Self::new(0);
2261
2262        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2263        pub const _1: Self = Self::new(1);
2264    }
2265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2266    pub struct Sscbfah_SPEC;
2267    pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2268    impl Sscbfah {
2269        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2270        pub const _0: Self = Self::new(0);
2271
2272        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2273        pub const _1: Self = Self::new(1);
2274    }
2275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2276    pub struct Sselca_SPEC;
2277    pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2278    impl Sselca {
2279        #[doc = "Counter start disabled at the ELC_GPTA input"]
2280        pub const _0: Self = Self::new(0);
2281
2282        #[doc = "Counter start enabled at the ELC_GPTA input"]
2283        pub const _1: Self = Self::new(1);
2284    }
2285    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2286    pub struct Sselcb_SPEC;
2287    pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2288    impl Sselcb {
2289        #[doc = "Counter start disabled at the ELC_GPTB input"]
2290        pub const _0: Self = Self::new(0);
2291
2292        #[doc = "Counter start enabled at the ELC_GPTB input"]
2293        pub const _1: Self = Self::new(1);
2294    }
2295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2296    pub struct Sselcc_SPEC;
2297    pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2298    impl Sselcc {
2299        #[doc = "Counter start disabled at the ELC_GPTC input"]
2300        pub const _0: Self = Self::new(0);
2301
2302        #[doc = "Counter start enabled at the ELC_GPTC input"]
2303        pub const _1: Self = Self::new(1);
2304    }
2305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2306    pub struct Sselcd_SPEC;
2307    pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2308    impl Sselcd {
2309        #[doc = "Counter start disabled at the ELC_GPTD input"]
2310        pub const _0: Self = Self::new(0);
2311
2312        #[doc = "Counter start enabled at the ELC_GPTD input"]
2313        pub const _1: Self = Self::new(1);
2314    }
2315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2316    pub struct Sselce_SPEC;
2317    pub type Sselce = crate::EnumBitfieldStruct<u8, Sselce_SPEC>;
2318    impl Sselce {
2319        #[doc = "Counter start disabled at the ELC_GPTE input"]
2320        pub const _0: Self = Self::new(0);
2321
2322        #[doc = "Counter start enabled at the ELC_GPTE input"]
2323        pub const _1: Self = Self::new(1);
2324    }
2325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2326    pub struct Sselcf_SPEC;
2327    pub type Sselcf = crate::EnumBitfieldStruct<u8, Sselcf_SPEC>;
2328    impl Sselcf {
2329        #[doc = "Counter start disabled at the ELC_GPTF input"]
2330        pub const _0: Self = Self::new(0);
2331
2332        #[doc = "Counter start enabled at the ELC_GPTF input"]
2333        pub const _1: Self = Self::new(1);
2334    }
2335    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2336    pub struct Sselcg_SPEC;
2337    pub type Sselcg = crate::EnumBitfieldStruct<u8, Sselcg_SPEC>;
2338    impl Sselcg {
2339        #[doc = "Counter start disabled at the ELC_GPTG input"]
2340        pub const _0: Self = Self::new(0);
2341
2342        #[doc = "Counter start enabled at the ELC_GPTG input"]
2343        pub const _1: Self = Self::new(1);
2344    }
2345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2346    pub struct Sselch_SPEC;
2347    pub type Sselch = crate::EnumBitfieldStruct<u8, Sselch_SPEC>;
2348    impl Sselch {
2349        #[doc = "Counter start disabled at the ELC_GPTH input"]
2350        pub const _0: Self = Self::new(0);
2351
2352        #[doc = "Counter start enabled at the ELC_GPTH input"]
2353        pub const _1: Self = Self::new(1);
2354    }
2355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2356    pub struct Cstrt_SPEC;
2357    pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2358    impl Cstrt {
2359        #[doc = "Counter start disabled by the GTSTR register"]
2360        pub const _0: Self = Self::new(0);
2361
2362        #[doc = "Counter start enabled by the GTSTR register"]
2363        pub const _1: Self = Self::new(1);
2364    }
2365}
2366#[doc(hidden)]
2367#[derive(Copy, Clone, Eq, PartialEq)]
2368pub struct Gtpsr_SPEC;
2369impl crate::sealed::RegSpec for Gtpsr_SPEC {
2370    type DataType = u32;
2371}
2372
2373#[doc = "General PWM Timer Stop Source Select Register"]
2374pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
2375
2376impl Gtpsr {
2377    #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
2378    #[inline(always)]
2379    pub fn psgtrgar(
2380        self,
2381    ) -> crate::common::RegisterField<
2382        0,
2383        0x1,
2384        1,
2385        0,
2386        gtpsr::Psgtrgar,
2387        gtpsr::Psgtrgar,
2388        Gtpsr_SPEC,
2389        crate::common::RW,
2390    > {
2391        crate::common::RegisterField::<
2392            0,
2393            0x1,
2394            1,
2395            0,
2396            gtpsr::Psgtrgar,
2397            gtpsr::Psgtrgar,
2398            Gtpsr_SPEC,
2399            crate::common::RW,
2400        >::from_register(self, 0)
2401    }
2402
2403    #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
2404    #[inline(always)]
2405    pub fn psgtrgaf(
2406        self,
2407    ) -> crate::common::RegisterField<
2408        1,
2409        0x1,
2410        1,
2411        0,
2412        gtpsr::Psgtrgaf,
2413        gtpsr::Psgtrgaf,
2414        Gtpsr_SPEC,
2415        crate::common::RW,
2416    > {
2417        crate::common::RegisterField::<
2418            1,
2419            0x1,
2420            1,
2421            0,
2422            gtpsr::Psgtrgaf,
2423            gtpsr::Psgtrgaf,
2424            Gtpsr_SPEC,
2425            crate::common::RW,
2426        >::from_register(self, 0)
2427    }
2428
2429    #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
2430    #[inline(always)]
2431    pub fn psgtrgbr(
2432        self,
2433    ) -> crate::common::RegisterField<
2434        2,
2435        0x1,
2436        1,
2437        0,
2438        gtpsr::Psgtrgbr,
2439        gtpsr::Psgtrgbr,
2440        Gtpsr_SPEC,
2441        crate::common::RW,
2442    > {
2443        crate::common::RegisterField::<
2444            2,
2445            0x1,
2446            1,
2447            0,
2448            gtpsr::Psgtrgbr,
2449            gtpsr::Psgtrgbr,
2450            Gtpsr_SPEC,
2451            crate::common::RW,
2452        >::from_register(self, 0)
2453    }
2454
2455    #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
2456    #[inline(always)]
2457    pub fn psgtrgbf(
2458        self,
2459    ) -> crate::common::RegisterField<
2460        3,
2461        0x1,
2462        1,
2463        0,
2464        gtpsr::Psgtrgbf,
2465        gtpsr::Psgtrgbf,
2466        Gtpsr_SPEC,
2467        crate::common::RW,
2468    > {
2469        crate::common::RegisterField::<
2470            3,
2471            0x1,
2472            1,
2473            0,
2474            gtpsr::Psgtrgbf,
2475            gtpsr::Psgtrgbf,
2476            Gtpsr_SPEC,
2477            crate::common::RW,
2478        >::from_register(self, 0)
2479    }
2480
2481    #[doc = "GTETRGC Pin Rising Input Source Counter Stop Enable"]
2482    #[inline(always)]
2483    pub fn psgtrgcr(
2484        self,
2485    ) -> crate::common::RegisterField<
2486        4,
2487        0x1,
2488        1,
2489        0,
2490        gtpsr::Psgtrgcr,
2491        gtpsr::Psgtrgcr,
2492        Gtpsr_SPEC,
2493        crate::common::RW,
2494    > {
2495        crate::common::RegisterField::<
2496            4,
2497            0x1,
2498            1,
2499            0,
2500            gtpsr::Psgtrgcr,
2501            gtpsr::Psgtrgcr,
2502            Gtpsr_SPEC,
2503            crate::common::RW,
2504        >::from_register(self, 0)
2505    }
2506
2507    #[doc = "GTETRGC Pin Falling Input Source Counter Stop Enable"]
2508    #[inline(always)]
2509    pub fn psgtrgcf(
2510        self,
2511    ) -> crate::common::RegisterField<
2512        5,
2513        0x1,
2514        1,
2515        0,
2516        gtpsr::Psgtrgcf,
2517        gtpsr::Psgtrgcf,
2518        Gtpsr_SPEC,
2519        crate::common::RW,
2520    > {
2521        crate::common::RegisterField::<
2522            5,
2523            0x1,
2524            1,
2525            0,
2526            gtpsr::Psgtrgcf,
2527            gtpsr::Psgtrgcf,
2528            Gtpsr_SPEC,
2529            crate::common::RW,
2530        >::from_register(self, 0)
2531    }
2532
2533    #[doc = "GTETRGD Pin Rising Input Source Counter Stop Enable"]
2534    #[inline(always)]
2535    pub fn psgtrgdr(
2536        self,
2537    ) -> crate::common::RegisterField<
2538        6,
2539        0x1,
2540        1,
2541        0,
2542        gtpsr::Psgtrgdr,
2543        gtpsr::Psgtrgdr,
2544        Gtpsr_SPEC,
2545        crate::common::RW,
2546    > {
2547        crate::common::RegisterField::<
2548            6,
2549            0x1,
2550            1,
2551            0,
2552            gtpsr::Psgtrgdr,
2553            gtpsr::Psgtrgdr,
2554            Gtpsr_SPEC,
2555            crate::common::RW,
2556        >::from_register(self, 0)
2557    }
2558
2559    #[doc = "GTETRGD Pin Falling Input Source Counter Stop Enable"]
2560    #[inline(always)]
2561    pub fn psgtrgdf(
2562        self,
2563    ) -> crate::common::RegisterField<
2564        7,
2565        0x1,
2566        1,
2567        0,
2568        gtpsr::Psgtrgdf,
2569        gtpsr::Psgtrgdf,
2570        Gtpsr_SPEC,
2571        crate::common::RW,
2572    > {
2573        crate::common::RegisterField::<
2574            7,
2575            0x1,
2576            1,
2577            0,
2578            gtpsr::Psgtrgdf,
2579            gtpsr::Psgtrgdf,
2580            Gtpsr_SPEC,
2581            crate::common::RW,
2582        >::from_register(self, 0)
2583    }
2584
2585    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable"]
2586    #[inline(always)]
2587    pub fn pscarbl(
2588        self,
2589    ) -> crate::common::RegisterField<
2590        8,
2591        0x1,
2592        1,
2593        0,
2594        gtpsr::Pscarbl,
2595        gtpsr::Pscarbl,
2596        Gtpsr_SPEC,
2597        crate::common::RW,
2598    > {
2599        crate::common::RegisterField::<
2600            8,
2601            0x1,
2602            1,
2603            0,
2604            gtpsr::Pscarbl,
2605            gtpsr::Pscarbl,
2606            Gtpsr_SPEC,
2607            crate::common::RW,
2608        >::from_register(self, 0)
2609    }
2610
2611    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable"]
2612    #[inline(always)]
2613    pub fn pscarbh(
2614        self,
2615    ) -> crate::common::RegisterField<
2616        9,
2617        0x1,
2618        1,
2619        0,
2620        gtpsr::Pscarbh,
2621        gtpsr::Pscarbh,
2622        Gtpsr_SPEC,
2623        crate::common::RW,
2624    > {
2625        crate::common::RegisterField::<
2626            9,
2627            0x1,
2628            1,
2629            0,
2630            gtpsr::Pscarbh,
2631            gtpsr::Pscarbh,
2632            Gtpsr_SPEC,
2633            crate::common::RW,
2634        >::from_register(self, 0)
2635    }
2636
2637    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable"]
2638    #[inline(always)]
2639    pub fn pscafbl(
2640        self,
2641    ) -> crate::common::RegisterField<
2642        10,
2643        0x1,
2644        1,
2645        0,
2646        gtpsr::Pscafbl,
2647        gtpsr::Pscafbl,
2648        Gtpsr_SPEC,
2649        crate::common::RW,
2650    > {
2651        crate::common::RegisterField::<
2652            10,
2653            0x1,
2654            1,
2655            0,
2656            gtpsr::Pscafbl,
2657            gtpsr::Pscafbl,
2658            Gtpsr_SPEC,
2659            crate::common::RW,
2660        >::from_register(self, 0)
2661    }
2662
2663    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable"]
2664    #[inline(always)]
2665    pub fn pscafbh(
2666        self,
2667    ) -> crate::common::RegisterField<
2668        11,
2669        0x1,
2670        1,
2671        0,
2672        gtpsr::Pscafbh,
2673        gtpsr::Pscafbh,
2674        Gtpsr_SPEC,
2675        crate::common::RW,
2676    > {
2677        crate::common::RegisterField::<
2678            11,
2679            0x1,
2680            1,
2681            0,
2682            gtpsr::Pscafbh,
2683            gtpsr::Pscafbh,
2684            Gtpsr_SPEC,
2685            crate::common::RW,
2686        >::from_register(self, 0)
2687    }
2688
2689    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable"]
2690    #[inline(always)]
2691    pub fn pscbral(
2692        self,
2693    ) -> crate::common::RegisterField<
2694        12,
2695        0x1,
2696        1,
2697        0,
2698        gtpsr::Pscbral,
2699        gtpsr::Pscbral,
2700        Gtpsr_SPEC,
2701        crate::common::RW,
2702    > {
2703        crate::common::RegisterField::<
2704            12,
2705            0x1,
2706            1,
2707            0,
2708            gtpsr::Pscbral,
2709            gtpsr::Pscbral,
2710            Gtpsr_SPEC,
2711            crate::common::RW,
2712        >::from_register(self, 0)
2713    }
2714
2715    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable"]
2716    #[inline(always)]
2717    pub fn pscbrah(
2718        self,
2719    ) -> crate::common::RegisterField<
2720        13,
2721        0x1,
2722        1,
2723        0,
2724        gtpsr::Pscbrah,
2725        gtpsr::Pscbrah,
2726        Gtpsr_SPEC,
2727        crate::common::RW,
2728    > {
2729        crate::common::RegisterField::<
2730            13,
2731            0x1,
2732            1,
2733            0,
2734            gtpsr::Pscbrah,
2735            gtpsr::Pscbrah,
2736            Gtpsr_SPEC,
2737            crate::common::RW,
2738        >::from_register(self, 0)
2739    }
2740
2741    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable"]
2742    #[inline(always)]
2743    pub fn pscbfal(
2744        self,
2745    ) -> crate::common::RegisterField<
2746        14,
2747        0x1,
2748        1,
2749        0,
2750        gtpsr::Pscbfal,
2751        gtpsr::Pscbfal,
2752        Gtpsr_SPEC,
2753        crate::common::RW,
2754    > {
2755        crate::common::RegisterField::<
2756            14,
2757            0x1,
2758            1,
2759            0,
2760            gtpsr::Pscbfal,
2761            gtpsr::Pscbfal,
2762            Gtpsr_SPEC,
2763            crate::common::RW,
2764        >::from_register(self, 0)
2765    }
2766
2767    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable"]
2768    #[inline(always)]
2769    pub fn pscbfah(
2770        self,
2771    ) -> crate::common::RegisterField<
2772        15,
2773        0x1,
2774        1,
2775        0,
2776        gtpsr::Pscbfah,
2777        gtpsr::Pscbfah,
2778        Gtpsr_SPEC,
2779        crate::common::RW,
2780    > {
2781        crate::common::RegisterField::<
2782            15,
2783            0x1,
2784            1,
2785            0,
2786            gtpsr::Pscbfah,
2787            gtpsr::Pscbfah,
2788            Gtpsr_SPEC,
2789            crate::common::RW,
2790        >::from_register(self, 0)
2791    }
2792
2793    #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
2794    #[inline(always)]
2795    pub fn pselca(
2796        self,
2797    ) -> crate::common::RegisterField<
2798        16,
2799        0x1,
2800        1,
2801        0,
2802        gtpsr::Pselca,
2803        gtpsr::Pselca,
2804        Gtpsr_SPEC,
2805        crate::common::RW,
2806    > {
2807        crate::common::RegisterField::<
2808            16,
2809            0x1,
2810            1,
2811            0,
2812            gtpsr::Pselca,
2813            gtpsr::Pselca,
2814            Gtpsr_SPEC,
2815            crate::common::RW,
2816        >::from_register(self, 0)
2817    }
2818
2819    #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
2820    #[inline(always)]
2821    pub fn pselcb(
2822        self,
2823    ) -> crate::common::RegisterField<
2824        17,
2825        0x1,
2826        1,
2827        0,
2828        gtpsr::Pselcb,
2829        gtpsr::Pselcb,
2830        Gtpsr_SPEC,
2831        crate::common::RW,
2832    > {
2833        crate::common::RegisterField::<
2834            17,
2835            0x1,
2836            1,
2837            0,
2838            gtpsr::Pselcb,
2839            gtpsr::Pselcb,
2840            Gtpsr_SPEC,
2841            crate::common::RW,
2842        >::from_register(self, 0)
2843    }
2844
2845    #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
2846    #[inline(always)]
2847    pub fn pselcc(
2848        self,
2849    ) -> crate::common::RegisterField<
2850        18,
2851        0x1,
2852        1,
2853        0,
2854        gtpsr::Pselcc,
2855        gtpsr::Pselcc,
2856        Gtpsr_SPEC,
2857        crate::common::RW,
2858    > {
2859        crate::common::RegisterField::<
2860            18,
2861            0x1,
2862            1,
2863            0,
2864            gtpsr::Pselcc,
2865            gtpsr::Pselcc,
2866            Gtpsr_SPEC,
2867            crate::common::RW,
2868        >::from_register(self, 0)
2869    }
2870
2871    #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
2872    #[inline(always)]
2873    pub fn pselcd(
2874        self,
2875    ) -> crate::common::RegisterField<
2876        19,
2877        0x1,
2878        1,
2879        0,
2880        gtpsr::Pselcd,
2881        gtpsr::Pselcd,
2882        Gtpsr_SPEC,
2883        crate::common::RW,
2884    > {
2885        crate::common::RegisterField::<
2886            19,
2887            0x1,
2888            1,
2889            0,
2890            gtpsr::Pselcd,
2891            gtpsr::Pselcd,
2892            Gtpsr_SPEC,
2893            crate::common::RW,
2894        >::from_register(self, 0)
2895    }
2896
2897    #[doc = "ELC_GPTE Event Source Counter Stop Enable"]
2898    #[inline(always)]
2899    pub fn pselce(
2900        self,
2901    ) -> crate::common::RegisterField<
2902        20,
2903        0x1,
2904        1,
2905        0,
2906        gtpsr::Pselce,
2907        gtpsr::Pselce,
2908        Gtpsr_SPEC,
2909        crate::common::RW,
2910    > {
2911        crate::common::RegisterField::<
2912            20,
2913            0x1,
2914            1,
2915            0,
2916            gtpsr::Pselce,
2917            gtpsr::Pselce,
2918            Gtpsr_SPEC,
2919            crate::common::RW,
2920        >::from_register(self, 0)
2921    }
2922
2923    #[doc = "ELC_GPTF Event Source Counter Stop Enable"]
2924    #[inline(always)]
2925    pub fn pselcf(
2926        self,
2927    ) -> crate::common::RegisterField<
2928        21,
2929        0x1,
2930        1,
2931        0,
2932        gtpsr::Pselcf,
2933        gtpsr::Pselcf,
2934        Gtpsr_SPEC,
2935        crate::common::RW,
2936    > {
2937        crate::common::RegisterField::<
2938            21,
2939            0x1,
2940            1,
2941            0,
2942            gtpsr::Pselcf,
2943            gtpsr::Pselcf,
2944            Gtpsr_SPEC,
2945            crate::common::RW,
2946        >::from_register(self, 0)
2947    }
2948
2949    #[doc = "ELC_GPTG Event Source Counter Stop Enable"]
2950    #[inline(always)]
2951    pub fn pselcg(
2952        self,
2953    ) -> crate::common::RegisterField<
2954        22,
2955        0x1,
2956        1,
2957        0,
2958        gtpsr::Pselcg,
2959        gtpsr::Pselcg,
2960        Gtpsr_SPEC,
2961        crate::common::RW,
2962    > {
2963        crate::common::RegisterField::<
2964            22,
2965            0x1,
2966            1,
2967            0,
2968            gtpsr::Pselcg,
2969            gtpsr::Pselcg,
2970            Gtpsr_SPEC,
2971            crate::common::RW,
2972        >::from_register(self, 0)
2973    }
2974
2975    #[doc = "ELC_GPTH Event Source Counter Stop Enable"]
2976    #[inline(always)]
2977    pub fn pselch(
2978        self,
2979    ) -> crate::common::RegisterField<
2980        23,
2981        0x1,
2982        1,
2983        0,
2984        gtpsr::Pselch,
2985        gtpsr::Pselch,
2986        Gtpsr_SPEC,
2987        crate::common::RW,
2988    > {
2989        crate::common::RegisterField::<
2990            23,
2991            0x1,
2992            1,
2993            0,
2994            gtpsr::Pselch,
2995            gtpsr::Pselch,
2996            Gtpsr_SPEC,
2997            crate::common::RW,
2998        >::from_register(self, 0)
2999    }
3000
3001    #[doc = "Software Source Counter Stop Enable"]
3002    #[inline(always)]
3003    pub fn cstop(
3004        self,
3005    ) -> crate::common::RegisterField<
3006        31,
3007        0x1,
3008        1,
3009        0,
3010        gtpsr::Cstop,
3011        gtpsr::Cstop,
3012        Gtpsr_SPEC,
3013        crate::common::RW,
3014    > {
3015        crate::common::RegisterField::<
3016            31,
3017            0x1,
3018            1,
3019            0,
3020            gtpsr::Cstop,
3021            gtpsr::Cstop,
3022            Gtpsr_SPEC,
3023            crate::common::RW,
3024        >::from_register(self, 0)
3025    }
3026}
3027impl ::core::default::Default for Gtpsr {
3028    #[inline(always)]
3029    fn default() -> Gtpsr {
3030        <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
3031    }
3032}
3033pub mod gtpsr {
3034
3035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3036    pub struct Psgtrgar_SPEC;
3037    pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
3038    impl Psgtrgar {
3039        #[doc = "Counter stop disabled on the rising edge of GTETRGA input"]
3040        pub const _0: Self = Self::new(0);
3041
3042        #[doc = "Counter stop enabled on the rising edge of GTETRGA input"]
3043        pub const _1: Self = Self::new(1);
3044    }
3045    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3046    pub struct Psgtrgaf_SPEC;
3047    pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
3048    impl Psgtrgaf {
3049        #[doc = "Counter stop disabled on the falling edge of GTETRGA input"]
3050        pub const _0: Self = Self::new(0);
3051
3052        #[doc = "Counter stop enabled on the falling edge of GTETRGA input"]
3053        pub const _1: Self = Self::new(1);
3054    }
3055    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3056    pub struct Psgtrgbr_SPEC;
3057    pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
3058    impl Psgtrgbr {
3059        #[doc = "Counter stop disabled on the rising edge of GTETRGB input"]
3060        pub const _0: Self = Self::new(0);
3061
3062        #[doc = "Counter stop enabled on the rising edge of GTETRGB input"]
3063        pub const _1: Self = Self::new(1);
3064    }
3065    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3066    pub struct Psgtrgbf_SPEC;
3067    pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
3068    impl Psgtrgbf {
3069        #[doc = "Counter stop disabled on the falling edge of GTETRGB input"]
3070        pub const _0: Self = Self::new(0);
3071
3072        #[doc = "Counter stop enabled on the falling edge of GTETRGB input"]
3073        pub const _1: Self = Self::new(1);
3074    }
3075    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3076    pub struct Psgtrgcr_SPEC;
3077    pub type Psgtrgcr = crate::EnumBitfieldStruct<u8, Psgtrgcr_SPEC>;
3078    impl Psgtrgcr {
3079        #[doc = "Counter stop disabled on the rising edge of GTETRGC input"]
3080        pub const _0: Self = Self::new(0);
3081
3082        #[doc = "Counter stop enabled on the rising edge of GTETRGC input"]
3083        pub const _1: Self = Self::new(1);
3084    }
3085    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3086    pub struct Psgtrgcf_SPEC;
3087    pub type Psgtrgcf = crate::EnumBitfieldStruct<u8, Psgtrgcf_SPEC>;
3088    impl Psgtrgcf {
3089        #[doc = "Counter stop disabled on the falling edge of GTETRGC input"]
3090        pub const _0: Self = Self::new(0);
3091
3092        #[doc = "Counter stop enabled on the falling edge of GTETRGC input"]
3093        pub const _1: Self = Self::new(1);
3094    }
3095    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3096    pub struct Psgtrgdr_SPEC;
3097    pub type Psgtrgdr = crate::EnumBitfieldStruct<u8, Psgtrgdr_SPEC>;
3098    impl Psgtrgdr {
3099        #[doc = "Counter stop disabled on the rising edge of GTETRGD input"]
3100        pub const _0: Self = Self::new(0);
3101
3102        #[doc = "Counter stop enabled on the rising edge of GTETRGD input"]
3103        pub const _1: Self = Self::new(1);
3104    }
3105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3106    pub struct Psgtrgdf_SPEC;
3107    pub type Psgtrgdf = crate::EnumBitfieldStruct<u8, Psgtrgdf_SPEC>;
3108    impl Psgtrgdf {
3109        #[doc = "Counter stop disabled on the falling edge of GTETRGD input"]
3110        pub const _0: Self = Self::new(0);
3111
3112        #[doc = "Counter stop enabled on the falling edge of GTETRGD input"]
3113        pub const _1: Self = Self::new(1);
3114    }
3115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3116    pub struct Pscarbl_SPEC;
3117    pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
3118    impl Pscarbl {
3119        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3120        pub const _0: Self = Self::new(0);
3121
3122        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3123        pub const _1: Self = Self::new(1);
3124    }
3125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3126    pub struct Pscarbh_SPEC;
3127    pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
3128    impl Pscarbh {
3129        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3130        pub const _0: Self = Self::new(0);
3131
3132        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3133        pub const _1: Self = Self::new(1);
3134    }
3135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3136    pub struct Pscafbl_SPEC;
3137    pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
3138    impl Pscafbl {
3139        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3140        pub const _0: Self = Self::new(0);
3141
3142        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3143        pub const _1: Self = Self::new(1);
3144    }
3145    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3146    pub struct Pscafbh_SPEC;
3147    pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
3148    impl Pscafbh {
3149        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3150        pub const _0: Self = Self::new(0);
3151
3152        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3153        pub const _1: Self = Self::new(1);
3154    }
3155    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3156    pub struct Pscbral_SPEC;
3157    pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
3158    impl Pscbral {
3159        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3160        pub const _0: Self = Self::new(0);
3161
3162        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3163        pub const _1: Self = Self::new(1);
3164    }
3165    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3166    pub struct Pscbrah_SPEC;
3167    pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
3168    impl Pscbrah {
3169        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3170        pub const _0: Self = Self::new(0);
3171
3172        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3173        pub const _1: Self = Self::new(1);
3174    }
3175    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3176    pub struct Pscbfal_SPEC;
3177    pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
3178    impl Pscbfal {
3179        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3180        pub const _0: Self = Self::new(0);
3181
3182        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3183        pub const _1: Self = Self::new(1);
3184    }
3185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3186    pub struct Pscbfah_SPEC;
3187    pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
3188    impl Pscbfah {
3189        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3190        pub const _0: Self = Self::new(0);
3191
3192        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3193        pub const _1: Self = Self::new(1);
3194    }
3195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3196    pub struct Pselca_SPEC;
3197    pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
3198    impl Pselca {
3199        #[doc = "Counter stop disabled at the ELC_GPTA input"]
3200        pub const _0: Self = Self::new(0);
3201
3202        #[doc = "Counter stop enabled at the ELC_GPTA input"]
3203        pub const _1: Self = Self::new(1);
3204    }
3205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3206    pub struct Pselcb_SPEC;
3207    pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
3208    impl Pselcb {
3209        #[doc = "Counter stop disabled at the ELC_GPTB input"]
3210        pub const _0: Self = Self::new(0);
3211
3212        #[doc = "Counter stop enabled at the ELC_GPTB input"]
3213        pub const _1: Self = Self::new(1);
3214    }
3215    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3216    pub struct Pselcc_SPEC;
3217    pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
3218    impl Pselcc {
3219        #[doc = "Counter stop disabled at the ELC_GPTC input"]
3220        pub const _0: Self = Self::new(0);
3221
3222        #[doc = "Counter stop enabled at the ELC_GPTC input"]
3223        pub const _1: Self = Self::new(1);
3224    }
3225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3226    pub struct Pselcd_SPEC;
3227    pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
3228    impl Pselcd {
3229        #[doc = "Counter stop disabled at the ELC_GPTD input"]
3230        pub const _0: Self = Self::new(0);
3231
3232        #[doc = "Counter stop enabled at the ELC_GPTD input"]
3233        pub const _1: Self = Self::new(1);
3234    }
3235    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3236    pub struct Pselce_SPEC;
3237    pub type Pselce = crate::EnumBitfieldStruct<u8, Pselce_SPEC>;
3238    impl Pselce {
3239        #[doc = "Counter stop disabled at the ELC_GPTE input"]
3240        pub const _0: Self = Self::new(0);
3241
3242        #[doc = "Counter stop enabled at the ELC_GPTE input"]
3243        pub const _1: Self = Self::new(1);
3244    }
3245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3246    pub struct Pselcf_SPEC;
3247    pub type Pselcf = crate::EnumBitfieldStruct<u8, Pselcf_SPEC>;
3248    impl Pselcf {
3249        #[doc = "Counter stop disabled at the ELC_GPTF input"]
3250        pub const _0: Self = Self::new(0);
3251
3252        #[doc = "Counter stop enabled at the ELC_GPTF input"]
3253        pub const _1: Self = Self::new(1);
3254    }
3255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3256    pub struct Pselcg_SPEC;
3257    pub type Pselcg = crate::EnumBitfieldStruct<u8, Pselcg_SPEC>;
3258    impl Pselcg {
3259        #[doc = "Counter stop disabled at the ELC_GPTG input"]
3260        pub const _0: Self = Self::new(0);
3261
3262        #[doc = "Counter stop enabled at the ELC_GPTG input"]
3263        pub const _1: Self = Self::new(1);
3264    }
3265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3266    pub struct Pselch_SPEC;
3267    pub type Pselch = crate::EnumBitfieldStruct<u8, Pselch_SPEC>;
3268    impl Pselch {
3269        #[doc = "Counter stop disabled at the ELC_GPTH input"]
3270        pub const _0: Self = Self::new(0);
3271
3272        #[doc = "Counter stop enabled at the ELC_GPTH input"]
3273        pub const _1: Self = Self::new(1);
3274    }
3275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3276    pub struct Cstop_SPEC;
3277    pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
3278    impl Cstop {
3279        #[doc = "Counter stop disabled by the GTSTP register"]
3280        pub const _0: Self = Self::new(0);
3281
3282        #[doc = "Counter stop enabled by the GTSTP register"]
3283        pub const _1: Self = Self::new(1);
3284    }
3285}
3286#[doc(hidden)]
3287#[derive(Copy, Clone, Eq, PartialEq)]
3288pub struct Gtcsr_SPEC;
3289impl crate::sealed::RegSpec for Gtcsr_SPEC {
3290    type DataType = u32;
3291}
3292
3293#[doc = "General PWM Timer Clear Source Select Register"]
3294pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
3295
3296impl Gtcsr {
3297    #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
3298    #[inline(always)]
3299    pub fn csgtrgar(
3300        self,
3301    ) -> crate::common::RegisterField<
3302        0,
3303        0x1,
3304        1,
3305        0,
3306        gtcsr::Csgtrgar,
3307        gtcsr::Csgtrgar,
3308        Gtcsr_SPEC,
3309        crate::common::RW,
3310    > {
3311        crate::common::RegisterField::<
3312            0,
3313            0x1,
3314            1,
3315            0,
3316            gtcsr::Csgtrgar,
3317            gtcsr::Csgtrgar,
3318            Gtcsr_SPEC,
3319            crate::common::RW,
3320        >::from_register(self, 0)
3321    }
3322
3323    #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
3324    #[inline(always)]
3325    pub fn csgtrgaf(
3326        self,
3327    ) -> crate::common::RegisterField<
3328        1,
3329        0x1,
3330        1,
3331        0,
3332        gtcsr::Csgtrgaf,
3333        gtcsr::Csgtrgaf,
3334        Gtcsr_SPEC,
3335        crate::common::RW,
3336    > {
3337        crate::common::RegisterField::<
3338            1,
3339            0x1,
3340            1,
3341            0,
3342            gtcsr::Csgtrgaf,
3343            gtcsr::Csgtrgaf,
3344            Gtcsr_SPEC,
3345            crate::common::RW,
3346        >::from_register(self, 0)
3347    }
3348
3349    #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
3350    #[inline(always)]
3351    pub fn csgtrgbr(
3352        self,
3353    ) -> crate::common::RegisterField<
3354        2,
3355        0x1,
3356        1,
3357        0,
3358        gtcsr::Csgtrgbr,
3359        gtcsr::Csgtrgbr,
3360        Gtcsr_SPEC,
3361        crate::common::RW,
3362    > {
3363        crate::common::RegisterField::<
3364            2,
3365            0x1,
3366            1,
3367            0,
3368            gtcsr::Csgtrgbr,
3369            gtcsr::Csgtrgbr,
3370            Gtcsr_SPEC,
3371            crate::common::RW,
3372        >::from_register(self, 0)
3373    }
3374
3375    #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
3376    #[inline(always)]
3377    pub fn csgtrgbf(
3378        self,
3379    ) -> crate::common::RegisterField<
3380        3,
3381        0x1,
3382        1,
3383        0,
3384        gtcsr::Csgtrgbf,
3385        gtcsr::Csgtrgbf,
3386        Gtcsr_SPEC,
3387        crate::common::RW,
3388    > {
3389        crate::common::RegisterField::<
3390            3,
3391            0x1,
3392            1,
3393            0,
3394            gtcsr::Csgtrgbf,
3395            gtcsr::Csgtrgbf,
3396            Gtcsr_SPEC,
3397            crate::common::RW,
3398        >::from_register(self, 0)
3399    }
3400
3401    #[doc = "GTETRGC Pin Rising Input Source Counter Clear Enable"]
3402    #[inline(always)]
3403    pub fn csgtrgcr(
3404        self,
3405    ) -> crate::common::RegisterField<
3406        4,
3407        0x1,
3408        1,
3409        0,
3410        gtcsr::Csgtrgcr,
3411        gtcsr::Csgtrgcr,
3412        Gtcsr_SPEC,
3413        crate::common::RW,
3414    > {
3415        crate::common::RegisterField::<
3416            4,
3417            0x1,
3418            1,
3419            0,
3420            gtcsr::Csgtrgcr,
3421            gtcsr::Csgtrgcr,
3422            Gtcsr_SPEC,
3423            crate::common::RW,
3424        >::from_register(self, 0)
3425    }
3426
3427    #[doc = "GTETRGC Pin Falling Input Source Counter Clear Enable"]
3428    #[inline(always)]
3429    pub fn csgtrgcf(
3430        self,
3431    ) -> crate::common::RegisterField<
3432        5,
3433        0x1,
3434        1,
3435        0,
3436        gtcsr::Csgtrgcf,
3437        gtcsr::Csgtrgcf,
3438        Gtcsr_SPEC,
3439        crate::common::RW,
3440    > {
3441        crate::common::RegisterField::<
3442            5,
3443            0x1,
3444            1,
3445            0,
3446            gtcsr::Csgtrgcf,
3447            gtcsr::Csgtrgcf,
3448            Gtcsr_SPEC,
3449            crate::common::RW,
3450        >::from_register(self, 0)
3451    }
3452
3453    #[doc = "GTETRGD Pin Rising Input Source Counter Clear Enable"]
3454    #[inline(always)]
3455    pub fn csgtrgdr(
3456        self,
3457    ) -> crate::common::RegisterField<
3458        6,
3459        0x1,
3460        1,
3461        0,
3462        gtcsr::Csgtrgdr,
3463        gtcsr::Csgtrgdr,
3464        Gtcsr_SPEC,
3465        crate::common::RW,
3466    > {
3467        crate::common::RegisterField::<
3468            6,
3469            0x1,
3470            1,
3471            0,
3472            gtcsr::Csgtrgdr,
3473            gtcsr::Csgtrgdr,
3474            Gtcsr_SPEC,
3475            crate::common::RW,
3476        >::from_register(self, 0)
3477    }
3478
3479    #[doc = "GTETRGD Pin Falling Input Source Counter Clear Enable"]
3480    #[inline(always)]
3481    pub fn csgtrgdf(
3482        self,
3483    ) -> crate::common::RegisterField<
3484        7,
3485        0x1,
3486        1,
3487        0,
3488        gtcsr::Csgtrgdf,
3489        gtcsr::Csgtrgdf,
3490        Gtcsr_SPEC,
3491        crate::common::RW,
3492    > {
3493        crate::common::RegisterField::<
3494            7,
3495            0x1,
3496            1,
3497            0,
3498            gtcsr::Csgtrgdf,
3499            gtcsr::Csgtrgdf,
3500            Gtcsr_SPEC,
3501            crate::common::RW,
3502        >::from_register(self, 0)
3503    }
3504
3505    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable"]
3506    #[inline(always)]
3507    pub fn cscarbl(
3508        self,
3509    ) -> crate::common::RegisterField<
3510        8,
3511        0x1,
3512        1,
3513        0,
3514        gtcsr::Cscarbl,
3515        gtcsr::Cscarbl,
3516        Gtcsr_SPEC,
3517        crate::common::RW,
3518    > {
3519        crate::common::RegisterField::<
3520            8,
3521            0x1,
3522            1,
3523            0,
3524            gtcsr::Cscarbl,
3525            gtcsr::Cscarbl,
3526            Gtcsr_SPEC,
3527            crate::common::RW,
3528        >::from_register(self, 0)
3529    }
3530
3531    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable"]
3532    #[inline(always)]
3533    pub fn cscarbh(
3534        self,
3535    ) -> crate::common::RegisterField<
3536        9,
3537        0x1,
3538        1,
3539        0,
3540        gtcsr::Cscarbh,
3541        gtcsr::Cscarbh,
3542        Gtcsr_SPEC,
3543        crate::common::RW,
3544    > {
3545        crate::common::RegisterField::<
3546            9,
3547            0x1,
3548            1,
3549            0,
3550            gtcsr::Cscarbh,
3551            gtcsr::Cscarbh,
3552            Gtcsr_SPEC,
3553            crate::common::RW,
3554        >::from_register(self, 0)
3555    }
3556
3557    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable"]
3558    #[inline(always)]
3559    pub fn cscafbl(
3560        self,
3561    ) -> crate::common::RegisterField<
3562        10,
3563        0x1,
3564        1,
3565        0,
3566        gtcsr::Cscafbl,
3567        gtcsr::Cscafbl,
3568        Gtcsr_SPEC,
3569        crate::common::RW,
3570    > {
3571        crate::common::RegisterField::<
3572            10,
3573            0x1,
3574            1,
3575            0,
3576            gtcsr::Cscafbl,
3577            gtcsr::Cscafbl,
3578            Gtcsr_SPEC,
3579            crate::common::RW,
3580        >::from_register(self, 0)
3581    }
3582
3583    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable"]
3584    #[inline(always)]
3585    pub fn cscafbh(
3586        self,
3587    ) -> crate::common::RegisterField<
3588        11,
3589        0x1,
3590        1,
3591        0,
3592        gtcsr::Cscafbh,
3593        gtcsr::Cscafbh,
3594        Gtcsr_SPEC,
3595        crate::common::RW,
3596    > {
3597        crate::common::RegisterField::<
3598            11,
3599            0x1,
3600            1,
3601            0,
3602            gtcsr::Cscafbh,
3603            gtcsr::Cscafbh,
3604            Gtcsr_SPEC,
3605            crate::common::RW,
3606        >::from_register(self, 0)
3607    }
3608
3609    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable"]
3610    #[inline(always)]
3611    pub fn cscbral(
3612        self,
3613    ) -> crate::common::RegisterField<
3614        12,
3615        0x1,
3616        1,
3617        0,
3618        gtcsr::Cscbral,
3619        gtcsr::Cscbral,
3620        Gtcsr_SPEC,
3621        crate::common::RW,
3622    > {
3623        crate::common::RegisterField::<
3624            12,
3625            0x1,
3626            1,
3627            0,
3628            gtcsr::Cscbral,
3629            gtcsr::Cscbral,
3630            Gtcsr_SPEC,
3631            crate::common::RW,
3632        >::from_register(self, 0)
3633    }
3634
3635    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable"]
3636    #[inline(always)]
3637    pub fn cscbrah(
3638        self,
3639    ) -> crate::common::RegisterField<
3640        13,
3641        0x1,
3642        1,
3643        0,
3644        gtcsr::Cscbrah,
3645        gtcsr::Cscbrah,
3646        Gtcsr_SPEC,
3647        crate::common::RW,
3648    > {
3649        crate::common::RegisterField::<
3650            13,
3651            0x1,
3652            1,
3653            0,
3654            gtcsr::Cscbrah,
3655            gtcsr::Cscbrah,
3656            Gtcsr_SPEC,
3657            crate::common::RW,
3658        >::from_register(self, 0)
3659    }
3660
3661    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable"]
3662    #[inline(always)]
3663    pub fn cscbfal(
3664        self,
3665    ) -> crate::common::RegisterField<
3666        14,
3667        0x1,
3668        1,
3669        0,
3670        gtcsr::Cscbfal,
3671        gtcsr::Cscbfal,
3672        Gtcsr_SPEC,
3673        crate::common::RW,
3674    > {
3675        crate::common::RegisterField::<
3676            14,
3677            0x1,
3678            1,
3679            0,
3680            gtcsr::Cscbfal,
3681            gtcsr::Cscbfal,
3682            Gtcsr_SPEC,
3683            crate::common::RW,
3684        >::from_register(self, 0)
3685    }
3686
3687    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable"]
3688    #[inline(always)]
3689    pub fn cscbfah(
3690        self,
3691    ) -> crate::common::RegisterField<
3692        15,
3693        0x1,
3694        1,
3695        0,
3696        gtcsr::Cscbfah,
3697        gtcsr::Cscbfah,
3698        Gtcsr_SPEC,
3699        crate::common::RW,
3700    > {
3701        crate::common::RegisterField::<
3702            15,
3703            0x1,
3704            1,
3705            0,
3706            gtcsr::Cscbfah,
3707            gtcsr::Cscbfah,
3708            Gtcsr_SPEC,
3709            crate::common::RW,
3710        >::from_register(self, 0)
3711    }
3712
3713    #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
3714    #[inline(always)]
3715    pub fn cselca(
3716        self,
3717    ) -> crate::common::RegisterField<
3718        16,
3719        0x1,
3720        1,
3721        0,
3722        gtcsr::Cselca,
3723        gtcsr::Cselca,
3724        Gtcsr_SPEC,
3725        crate::common::RW,
3726    > {
3727        crate::common::RegisterField::<
3728            16,
3729            0x1,
3730            1,
3731            0,
3732            gtcsr::Cselca,
3733            gtcsr::Cselca,
3734            Gtcsr_SPEC,
3735            crate::common::RW,
3736        >::from_register(self, 0)
3737    }
3738
3739    #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
3740    #[inline(always)]
3741    pub fn cselcb(
3742        self,
3743    ) -> crate::common::RegisterField<
3744        17,
3745        0x1,
3746        1,
3747        0,
3748        gtcsr::Cselcb,
3749        gtcsr::Cselcb,
3750        Gtcsr_SPEC,
3751        crate::common::RW,
3752    > {
3753        crate::common::RegisterField::<
3754            17,
3755            0x1,
3756            1,
3757            0,
3758            gtcsr::Cselcb,
3759            gtcsr::Cselcb,
3760            Gtcsr_SPEC,
3761            crate::common::RW,
3762        >::from_register(self, 0)
3763    }
3764
3765    #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
3766    #[inline(always)]
3767    pub fn cselcc(
3768        self,
3769    ) -> crate::common::RegisterField<
3770        18,
3771        0x1,
3772        1,
3773        0,
3774        gtcsr::Cselcc,
3775        gtcsr::Cselcc,
3776        Gtcsr_SPEC,
3777        crate::common::RW,
3778    > {
3779        crate::common::RegisterField::<
3780            18,
3781            0x1,
3782            1,
3783            0,
3784            gtcsr::Cselcc,
3785            gtcsr::Cselcc,
3786            Gtcsr_SPEC,
3787            crate::common::RW,
3788        >::from_register(self, 0)
3789    }
3790
3791    #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
3792    #[inline(always)]
3793    pub fn cselcd(
3794        self,
3795    ) -> crate::common::RegisterField<
3796        19,
3797        0x1,
3798        1,
3799        0,
3800        gtcsr::Cselcd,
3801        gtcsr::Cselcd,
3802        Gtcsr_SPEC,
3803        crate::common::RW,
3804    > {
3805        crate::common::RegisterField::<
3806            19,
3807            0x1,
3808            1,
3809            0,
3810            gtcsr::Cselcd,
3811            gtcsr::Cselcd,
3812            Gtcsr_SPEC,
3813            crate::common::RW,
3814        >::from_register(self, 0)
3815    }
3816
3817    #[doc = "ELC_GPTE Event Source Counter Clear Enable"]
3818    #[inline(always)]
3819    pub fn cselce(
3820        self,
3821    ) -> crate::common::RegisterField<
3822        20,
3823        0x1,
3824        1,
3825        0,
3826        gtcsr::Cselce,
3827        gtcsr::Cselce,
3828        Gtcsr_SPEC,
3829        crate::common::RW,
3830    > {
3831        crate::common::RegisterField::<
3832            20,
3833            0x1,
3834            1,
3835            0,
3836            gtcsr::Cselce,
3837            gtcsr::Cselce,
3838            Gtcsr_SPEC,
3839            crate::common::RW,
3840        >::from_register(self, 0)
3841    }
3842
3843    #[doc = "ELC_GPTF Event Source Counter Clear Enable"]
3844    #[inline(always)]
3845    pub fn cselcf(
3846        self,
3847    ) -> crate::common::RegisterField<
3848        21,
3849        0x1,
3850        1,
3851        0,
3852        gtcsr::Cselcf,
3853        gtcsr::Cselcf,
3854        Gtcsr_SPEC,
3855        crate::common::RW,
3856    > {
3857        crate::common::RegisterField::<
3858            21,
3859            0x1,
3860            1,
3861            0,
3862            gtcsr::Cselcf,
3863            gtcsr::Cselcf,
3864            Gtcsr_SPEC,
3865            crate::common::RW,
3866        >::from_register(self, 0)
3867    }
3868
3869    #[doc = "ELC_GPTG Event Source Counter Clear Enable"]
3870    #[inline(always)]
3871    pub fn cselcg(
3872        self,
3873    ) -> crate::common::RegisterField<
3874        22,
3875        0x1,
3876        1,
3877        0,
3878        gtcsr::Cselcg,
3879        gtcsr::Cselcg,
3880        Gtcsr_SPEC,
3881        crate::common::RW,
3882    > {
3883        crate::common::RegisterField::<
3884            22,
3885            0x1,
3886            1,
3887            0,
3888            gtcsr::Cselcg,
3889            gtcsr::Cselcg,
3890            Gtcsr_SPEC,
3891            crate::common::RW,
3892        >::from_register(self, 0)
3893    }
3894
3895    #[doc = "ELC_GPTH Event Source Counter Clear Enable"]
3896    #[inline(always)]
3897    pub fn cselch(
3898        self,
3899    ) -> crate::common::RegisterField<
3900        23,
3901        0x1,
3902        1,
3903        0,
3904        gtcsr::Cselch,
3905        gtcsr::Cselch,
3906        Gtcsr_SPEC,
3907        crate::common::RW,
3908    > {
3909        crate::common::RegisterField::<
3910            23,
3911            0x1,
3912            1,
3913            0,
3914            gtcsr::Cselch,
3915            gtcsr::Cselch,
3916            Gtcsr_SPEC,
3917            crate::common::RW,
3918        >::from_register(self, 0)
3919    }
3920
3921    #[doc = "Software Source Counter Clear Enable"]
3922    #[inline(always)]
3923    pub fn cclr(
3924        self,
3925    ) -> crate::common::RegisterField<
3926        31,
3927        0x1,
3928        1,
3929        0,
3930        gtcsr::Cclr,
3931        gtcsr::Cclr,
3932        Gtcsr_SPEC,
3933        crate::common::RW,
3934    > {
3935        crate::common::RegisterField::<
3936            31,
3937            0x1,
3938            1,
3939            0,
3940            gtcsr::Cclr,
3941            gtcsr::Cclr,
3942            Gtcsr_SPEC,
3943            crate::common::RW,
3944        >::from_register(self, 0)
3945    }
3946}
3947impl ::core::default::Default for Gtcsr {
3948    #[inline(always)]
3949    fn default() -> Gtcsr {
3950        <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
3951    }
3952}
3953pub mod gtcsr {
3954
3955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3956    pub struct Csgtrgar_SPEC;
3957    pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
3958    impl Csgtrgar {
3959        #[doc = "Counter clear disabled on the rising edge of GTETRGA input"]
3960        pub const _0: Self = Self::new(0);
3961
3962        #[doc = "Counter clear enabled on the rising edge of GTETRGA input"]
3963        pub const _1: Self = Self::new(1);
3964    }
3965    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3966    pub struct Csgtrgaf_SPEC;
3967    pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
3968    impl Csgtrgaf {
3969        #[doc = "Counter clear disabled on the falling edge of GTETRGA input"]
3970        pub const _0: Self = Self::new(0);
3971
3972        #[doc = "Counter clear enabled on the falling edge of GTETRGA input"]
3973        pub const _1: Self = Self::new(1);
3974    }
3975    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3976    pub struct Csgtrgbr_SPEC;
3977    pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
3978    impl Csgtrgbr {
3979        #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
3980        pub const _0: Self = Self::new(0);
3981
3982        #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
3983        pub const _1: Self = Self::new(1);
3984    }
3985    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3986    pub struct Csgtrgbf_SPEC;
3987    pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
3988    impl Csgtrgbf {
3989        #[doc = "Counter clear disabled on the falling edge of GTETRGB input"]
3990        pub const _0: Self = Self::new(0);
3991
3992        #[doc = "Counter clear enabled on the falling edge of GTETRGB input"]
3993        pub const _1: Self = Self::new(1);
3994    }
3995    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3996    pub struct Csgtrgcr_SPEC;
3997    pub type Csgtrgcr = crate::EnumBitfieldStruct<u8, Csgtrgcr_SPEC>;
3998    impl Csgtrgcr {
3999        #[doc = "Disable counter clear on the rising edge of GTETRGC input"]
4000        pub const _0: Self = Self::new(0);
4001
4002        #[doc = "Enable counter clear on the rising edge of GTETRGC input"]
4003        pub const _1: Self = Self::new(1);
4004    }
4005    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4006    pub struct Csgtrgcf_SPEC;
4007    pub type Csgtrgcf = crate::EnumBitfieldStruct<u8, Csgtrgcf_SPEC>;
4008    impl Csgtrgcf {
4009        #[doc = "Counter clear disabled on the falling edge of GTETRGC input"]
4010        pub const _0: Self = Self::new(0);
4011
4012        #[doc = "Counter clear enabled on the falling edge of GTETRGC input"]
4013        pub const _1: Self = Self::new(1);
4014    }
4015    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4016    pub struct Csgtrgdr_SPEC;
4017    pub type Csgtrgdr = crate::EnumBitfieldStruct<u8, Csgtrgdr_SPEC>;
4018    impl Csgtrgdr {
4019        #[doc = "Disable counter clear on the rising edge of GTETRGD input"]
4020        pub const _0: Self = Self::new(0);
4021
4022        #[doc = "Enable counter clear on the rising edge of GTETRGD input"]
4023        pub const _1: Self = Self::new(1);
4024    }
4025    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4026    pub struct Csgtrgdf_SPEC;
4027    pub type Csgtrgdf = crate::EnumBitfieldStruct<u8, Csgtrgdf_SPEC>;
4028    impl Csgtrgdf {
4029        #[doc = "Counter clear disabled on the falling edge of GTETRGD input"]
4030        pub const _0: Self = Self::new(0);
4031
4032        #[doc = "Counter clear enabled on the falling edge of GTETRGD input"]
4033        pub const _1: Self = Self::new(1);
4034    }
4035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4036    pub struct Cscarbl_SPEC;
4037    pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
4038    impl Cscarbl {
4039        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4040        pub const _0: Self = Self::new(0);
4041
4042        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4043        pub const _1: Self = Self::new(1);
4044    }
4045    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4046    pub struct Cscarbh_SPEC;
4047    pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
4048    impl Cscarbh {
4049        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4050        pub const _0: Self = Self::new(0);
4051
4052        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4053        pub const _1: Self = Self::new(1);
4054    }
4055    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4056    pub struct Cscafbl_SPEC;
4057    pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
4058    impl Cscafbl {
4059        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4060        pub const _0: Self = Self::new(0);
4061
4062        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4063        pub const _1: Self = Self::new(1);
4064    }
4065    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4066    pub struct Cscafbh_SPEC;
4067    pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
4068    impl Cscafbh {
4069        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4070        pub const _0: Self = Self::new(0);
4071
4072        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4073        pub const _1: Self = Self::new(1);
4074    }
4075    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4076    pub struct Cscbral_SPEC;
4077    pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
4078    impl Cscbral {
4079        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4080        pub const _0: Self = Self::new(0);
4081
4082        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4083        pub const _1: Self = Self::new(1);
4084    }
4085    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4086    pub struct Cscbrah_SPEC;
4087    pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
4088    impl Cscbrah {
4089        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4090        pub const _0: Self = Self::new(0);
4091
4092        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4093        pub const _1: Self = Self::new(1);
4094    }
4095    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4096    pub struct Cscbfal_SPEC;
4097    pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
4098    impl Cscbfal {
4099        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4100        pub const _0: Self = Self::new(0);
4101
4102        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4103        pub const _1: Self = Self::new(1);
4104    }
4105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4106    pub struct Cscbfah_SPEC;
4107    pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
4108    impl Cscbfah {
4109        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4110        pub const _0: Self = Self::new(0);
4111
4112        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4113        pub const _1: Self = Self::new(1);
4114    }
4115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4116    pub struct Cselca_SPEC;
4117    pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
4118    impl Cselca {
4119        #[doc = "Counter clear disabled at the ELC_GPTA input"]
4120        pub const _0: Self = Self::new(0);
4121
4122        #[doc = "Counter clear enabled at the ELC_GPTA input"]
4123        pub const _1: Self = Self::new(1);
4124    }
4125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4126    pub struct Cselcb_SPEC;
4127    pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
4128    impl Cselcb {
4129        #[doc = "Counter clear disabled at the ELC_GPTB input"]
4130        pub const _0: Self = Self::new(0);
4131
4132        #[doc = "Counter clear enabled at the ELC_GPTB input"]
4133        pub const _1: Self = Self::new(1);
4134    }
4135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4136    pub struct Cselcc_SPEC;
4137    pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
4138    impl Cselcc {
4139        #[doc = "Counter clear disabled at the ELC_GPTC input"]
4140        pub const _0: Self = Self::new(0);
4141
4142        #[doc = "Counter clear enabled at the ELC_GPTC input"]
4143        pub const _1: Self = Self::new(1);
4144    }
4145    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4146    pub struct Cselcd_SPEC;
4147    pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
4148    impl Cselcd {
4149        #[doc = "Counter clear disabled at the ELC_GPTD input"]
4150        pub const _0: Self = Self::new(0);
4151
4152        #[doc = "Counter clear enabled at the ELC_GPTD input"]
4153        pub const _1: Self = Self::new(1);
4154    }
4155    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4156    pub struct Cselce_SPEC;
4157    pub type Cselce = crate::EnumBitfieldStruct<u8, Cselce_SPEC>;
4158    impl Cselce {
4159        #[doc = "Counter clear disabled at the ELC_GPTE input"]
4160        pub const _0: Self = Self::new(0);
4161
4162        #[doc = "Counter clear enabled at the ELC_GPTE input"]
4163        pub const _1: Self = Self::new(1);
4164    }
4165    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4166    pub struct Cselcf_SPEC;
4167    pub type Cselcf = crate::EnumBitfieldStruct<u8, Cselcf_SPEC>;
4168    impl Cselcf {
4169        #[doc = "Counter clear disabled at the ELC_GPTF input"]
4170        pub const _0: Self = Self::new(0);
4171
4172        #[doc = "Counter clear enabled at the ELC_GPTF input"]
4173        pub const _1: Self = Self::new(1);
4174    }
4175    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4176    pub struct Cselcg_SPEC;
4177    pub type Cselcg = crate::EnumBitfieldStruct<u8, Cselcg_SPEC>;
4178    impl Cselcg {
4179        #[doc = "Counter clear disabled at the ELC_GPTG input"]
4180        pub const _0: Self = Self::new(0);
4181
4182        #[doc = "Counter clear enabled at the ELC_GPTG input"]
4183        pub const _1: Self = Self::new(1);
4184    }
4185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4186    pub struct Cselch_SPEC;
4187    pub type Cselch = crate::EnumBitfieldStruct<u8, Cselch_SPEC>;
4188    impl Cselch {
4189        #[doc = "Counter clear disabled at the ELC_GPTH input"]
4190        pub const _0: Self = Self::new(0);
4191
4192        #[doc = "Counter clear enabled at the ELC_GPTH input"]
4193        pub const _1: Self = Self::new(1);
4194    }
4195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4196    pub struct Cclr_SPEC;
4197    pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
4198    impl Cclr {
4199        #[doc = "Counter clear disabled by the GTCLR register"]
4200        pub const _0: Self = Self::new(0);
4201
4202        #[doc = "Counter clear enabled by the GTCLR register"]
4203        pub const _1: Self = Self::new(1);
4204    }
4205}
4206#[doc(hidden)]
4207#[derive(Copy, Clone, Eq, PartialEq)]
4208pub struct Gtupsr_SPEC;
4209impl crate::sealed::RegSpec for Gtupsr_SPEC {
4210    type DataType = u32;
4211}
4212
4213#[doc = "General PWM Timer Up Count Source Select Register"]
4214pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
4215
4216impl Gtupsr {
4217    #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
4218    #[inline(always)]
4219    pub fn usgtrgar(
4220        self,
4221    ) -> crate::common::RegisterField<
4222        0,
4223        0x1,
4224        1,
4225        0,
4226        gtupsr::Usgtrgar,
4227        gtupsr::Usgtrgar,
4228        Gtupsr_SPEC,
4229        crate::common::RW,
4230    > {
4231        crate::common::RegisterField::<
4232            0,
4233            0x1,
4234            1,
4235            0,
4236            gtupsr::Usgtrgar,
4237            gtupsr::Usgtrgar,
4238            Gtupsr_SPEC,
4239            crate::common::RW,
4240        >::from_register(self, 0)
4241    }
4242
4243    #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
4244    #[inline(always)]
4245    pub fn usgtrgaf(
4246        self,
4247    ) -> crate::common::RegisterField<
4248        1,
4249        0x1,
4250        1,
4251        0,
4252        gtupsr::Usgtrgaf,
4253        gtupsr::Usgtrgaf,
4254        Gtupsr_SPEC,
4255        crate::common::RW,
4256    > {
4257        crate::common::RegisterField::<
4258            1,
4259            0x1,
4260            1,
4261            0,
4262            gtupsr::Usgtrgaf,
4263            gtupsr::Usgtrgaf,
4264            Gtupsr_SPEC,
4265            crate::common::RW,
4266        >::from_register(self, 0)
4267    }
4268
4269    #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
4270    #[inline(always)]
4271    pub fn usgtrgbr(
4272        self,
4273    ) -> crate::common::RegisterField<
4274        2,
4275        0x1,
4276        1,
4277        0,
4278        gtupsr::Usgtrgbr,
4279        gtupsr::Usgtrgbr,
4280        Gtupsr_SPEC,
4281        crate::common::RW,
4282    > {
4283        crate::common::RegisterField::<
4284            2,
4285            0x1,
4286            1,
4287            0,
4288            gtupsr::Usgtrgbr,
4289            gtupsr::Usgtrgbr,
4290            Gtupsr_SPEC,
4291            crate::common::RW,
4292        >::from_register(self, 0)
4293    }
4294
4295    #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
4296    #[inline(always)]
4297    pub fn usgtrgbf(
4298        self,
4299    ) -> crate::common::RegisterField<
4300        3,
4301        0x1,
4302        1,
4303        0,
4304        gtupsr::Usgtrgbf,
4305        gtupsr::Usgtrgbf,
4306        Gtupsr_SPEC,
4307        crate::common::RW,
4308    > {
4309        crate::common::RegisterField::<
4310            3,
4311            0x1,
4312            1,
4313            0,
4314            gtupsr::Usgtrgbf,
4315            gtupsr::Usgtrgbf,
4316            Gtupsr_SPEC,
4317            crate::common::RW,
4318        >::from_register(self, 0)
4319    }
4320
4321    #[doc = "GTETRGC Pin Rising Input Source Counter Count Up Enable"]
4322    #[inline(always)]
4323    pub fn usgtrgcr(
4324        self,
4325    ) -> crate::common::RegisterField<
4326        4,
4327        0x1,
4328        1,
4329        0,
4330        gtupsr::Usgtrgcr,
4331        gtupsr::Usgtrgcr,
4332        Gtupsr_SPEC,
4333        crate::common::RW,
4334    > {
4335        crate::common::RegisterField::<
4336            4,
4337            0x1,
4338            1,
4339            0,
4340            gtupsr::Usgtrgcr,
4341            gtupsr::Usgtrgcr,
4342            Gtupsr_SPEC,
4343            crate::common::RW,
4344        >::from_register(self, 0)
4345    }
4346
4347    #[doc = "GTETRGC Pin Falling Input Source Counter Count Up Enable"]
4348    #[inline(always)]
4349    pub fn usgtrgcf(
4350        self,
4351    ) -> crate::common::RegisterField<
4352        5,
4353        0x1,
4354        1,
4355        0,
4356        gtupsr::Usgtrgcf,
4357        gtupsr::Usgtrgcf,
4358        Gtupsr_SPEC,
4359        crate::common::RW,
4360    > {
4361        crate::common::RegisterField::<
4362            5,
4363            0x1,
4364            1,
4365            0,
4366            gtupsr::Usgtrgcf,
4367            gtupsr::Usgtrgcf,
4368            Gtupsr_SPEC,
4369            crate::common::RW,
4370        >::from_register(self, 0)
4371    }
4372
4373    #[doc = "GTETRGD Pin Rising Input Source Counter Count Up Enable"]
4374    #[inline(always)]
4375    pub fn usgtrgdr(
4376        self,
4377    ) -> crate::common::RegisterField<
4378        6,
4379        0x1,
4380        1,
4381        0,
4382        gtupsr::Usgtrgdr,
4383        gtupsr::Usgtrgdr,
4384        Gtupsr_SPEC,
4385        crate::common::RW,
4386    > {
4387        crate::common::RegisterField::<
4388            6,
4389            0x1,
4390            1,
4391            0,
4392            gtupsr::Usgtrgdr,
4393            gtupsr::Usgtrgdr,
4394            Gtupsr_SPEC,
4395            crate::common::RW,
4396        >::from_register(self, 0)
4397    }
4398
4399    #[doc = "GTETRGD Pin Falling Input Source Counter Count Up Enable"]
4400    #[inline(always)]
4401    pub fn usgtrgdf(
4402        self,
4403    ) -> crate::common::RegisterField<
4404        7,
4405        0x1,
4406        1,
4407        0,
4408        gtupsr::Usgtrgdf,
4409        gtupsr::Usgtrgdf,
4410        Gtupsr_SPEC,
4411        crate::common::RW,
4412    > {
4413        crate::common::RegisterField::<
4414            7,
4415            0x1,
4416            1,
4417            0,
4418            gtupsr::Usgtrgdf,
4419            gtupsr::Usgtrgdf,
4420            Gtupsr_SPEC,
4421            crate::common::RW,
4422        >::from_register(self, 0)
4423    }
4424
4425    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4426    #[inline(always)]
4427    pub fn uscarbl(
4428        self,
4429    ) -> crate::common::RegisterField<
4430        8,
4431        0x1,
4432        1,
4433        0,
4434        gtupsr::Uscarbl,
4435        gtupsr::Uscarbl,
4436        Gtupsr_SPEC,
4437        crate::common::RW,
4438    > {
4439        crate::common::RegisterField::<
4440            8,
4441            0x1,
4442            1,
4443            0,
4444            gtupsr::Uscarbl,
4445            gtupsr::Uscarbl,
4446            Gtupsr_SPEC,
4447            crate::common::RW,
4448        >::from_register(self, 0)
4449    }
4450
4451    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable"]
4452    #[inline(always)]
4453    pub fn uscarbh(
4454        self,
4455    ) -> crate::common::RegisterField<
4456        9,
4457        0x1,
4458        1,
4459        0,
4460        gtupsr::Uscarbh,
4461        gtupsr::Uscarbh,
4462        Gtupsr_SPEC,
4463        crate::common::RW,
4464    > {
4465        crate::common::RegisterField::<
4466            9,
4467            0x1,
4468            1,
4469            0,
4470            gtupsr::Uscarbh,
4471            gtupsr::Uscarbh,
4472            Gtupsr_SPEC,
4473            crate::common::RW,
4474        >::from_register(self, 0)
4475    }
4476
4477    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4478    #[inline(always)]
4479    pub fn uscafbl(
4480        self,
4481    ) -> crate::common::RegisterField<
4482        10,
4483        0x1,
4484        1,
4485        0,
4486        gtupsr::Uscafbl,
4487        gtupsr::Uscafbl,
4488        Gtupsr_SPEC,
4489        crate::common::RW,
4490    > {
4491        crate::common::RegisterField::<
4492            10,
4493            0x1,
4494            1,
4495            0,
4496            gtupsr::Uscafbl,
4497            gtupsr::Uscafbl,
4498            Gtupsr_SPEC,
4499            crate::common::RW,
4500        >::from_register(self, 0)
4501    }
4502
4503    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable"]
4504    #[inline(always)]
4505    pub fn uscafbh(
4506        self,
4507    ) -> crate::common::RegisterField<
4508        11,
4509        0x1,
4510        1,
4511        0,
4512        gtupsr::Uscafbh,
4513        gtupsr::Uscafbh,
4514        Gtupsr_SPEC,
4515        crate::common::RW,
4516    > {
4517        crate::common::RegisterField::<
4518            11,
4519            0x1,
4520            1,
4521            0,
4522            gtupsr::Uscafbh,
4523            gtupsr::Uscafbh,
4524            Gtupsr_SPEC,
4525            crate::common::RW,
4526        >::from_register(self, 0)
4527    }
4528
4529    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4530    #[inline(always)]
4531    pub fn uscbral(
4532        self,
4533    ) -> crate::common::RegisterField<
4534        12,
4535        0x1,
4536        1,
4537        0,
4538        gtupsr::Uscbral,
4539        gtupsr::Uscbral,
4540        Gtupsr_SPEC,
4541        crate::common::RW,
4542    > {
4543        crate::common::RegisterField::<
4544            12,
4545            0x1,
4546            1,
4547            0,
4548            gtupsr::Uscbral,
4549            gtupsr::Uscbral,
4550            Gtupsr_SPEC,
4551            crate::common::RW,
4552        >::from_register(self, 0)
4553    }
4554
4555    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable"]
4556    #[inline(always)]
4557    pub fn uscbrah(
4558        self,
4559    ) -> crate::common::RegisterField<
4560        13,
4561        0x1,
4562        1,
4563        0,
4564        gtupsr::Uscbrah,
4565        gtupsr::Uscbrah,
4566        Gtupsr_SPEC,
4567        crate::common::RW,
4568    > {
4569        crate::common::RegisterField::<
4570            13,
4571            0x1,
4572            1,
4573            0,
4574            gtupsr::Uscbrah,
4575            gtupsr::Uscbrah,
4576            Gtupsr_SPEC,
4577            crate::common::RW,
4578        >::from_register(self, 0)
4579    }
4580
4581    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4582    #[inline(always)]
4583    pub fn uscbfal(
4584        self,
4585    ) -> crate::common::RegisterField<
4586        14,
4587        0x1,
4588        1,
4589        0,
4590        gtupsr::Uscbfal,
4591        gtupsr::Uscbfal,
4592        Gtupsr_SPEC,
4593        crate::common::RW,
4594    > {
4595        crate::common::RegisterField::<
4596            14,
4597            0x1,
4598            1,
4599            0,
4600            gtupsr::Uscbfal,
4601            gtupsr::Uscbfal,
4602            Gtupsr_SPEC,
4603            crate::common::RW,
4604        >::from_register(self, 0)
4605    }
4606
4607    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable"]
4608    #[inline(always)]
4609    pub fn uscbfah(
4610        self,
4611    ) -> crate::common::RegisterField<
4612        15,
4613        0x1,
4614        1,
4615        0,
4616        gtupsr::Uscbfah,
4617        gtupsr::Uscbfah,
4618        Gtupsr_SPEC,
4619        crate::common::RW,
4620    > {
4621        crate::common::RegisterField::<
4622            15,
4623            0x1,
4624            1,
4625            0,
4626            gtupsr::Uscbfah,
4627            gtupsr::Uscbfah,
4628            Gtupsr_SPEC,
4629            crate::common::RW,
4630        >::from_register(self, 0)
4631    }
4632
4633    #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
4634    #[inline(always)]
4635    pub fn uselca(
4636        self,
4637    ) -> crate::common::RegisterField<
4638        16,
4639        0x1,
4640        1,
4641        0,
4642        gtupsr::Uselca,
4643        gtupsr::Uselca,
4644        Gtupsr_SPEC,
4645        crate::common::RW,
4646    > {
4647        crate::common::RegisterField::<
4648            16,
4649            0x1,
4650            1,
4651            0,
4652            gtupsr::Uselca,
4653            gtupsr::Uselca,
4654            Gtupsr_SPEC,
4655            crate::common::RW,
4656        >::from_register(self, 0)
4657    }
4658
4659    #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
4660    #[inline(always)]
4661    pub fn uselcb(
4662        self,
4663    ) -> crate::common::RegisterField<
4664        17,
4665        0x1,
4666        1,
4667        0,
4668        gtupsr::Uselcb,
4669        gtupsr::Uselcb,
4670        Gtupsr_SPEC,
4671        crate::common::RW,
4672    > {
4673        crate::common::RegisterField::<
4674            17,
4675            0x1,
4676            1,
4677            0,
4678            gtupsr::Uselcb,
4679            gtupsr::Uselcb,
4680            Gtupsr_SPEC,
4681            crate::common::RW,
4682        >::from_register(self, 0)
4683    }
4684
4685    #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
4686    #[inline(always)]
4687    pub fn uselcc(
4688        self,
4689    ) -> crate::common::RegisterField<
4690        18,
4691        0x1,
4692        1,
4693        0,
4694        gtupsr::Uselcc,
4695        gtupsr::Uselcc,
4696        Gtupsr_SPEC,
4697        crate::common::RW,
4698    > {
4699        crate::common::RegisterField::<
4700            18,
4701            0x1,
4702            1,
4703            0,
4704            gtupsr::Uselcc,
4705            gtupsr::Uselcc,
4706            Gtupsr_SPEC,
4707            crate::common::RW,
4708        >::from_register(self, 0)
4709    }
4710
4711    #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
4712    #[inline(always)]
4713    pub fn uselcd(
4714        self,
4715    ) -> crate::common::RegisterField<
4716        19,
4717        0x1,
4718        1,
4719        0,
4720        gtupsr::Uselcd,
4721        gtupsr::Uselcd,
4722        Gtupsr_SPEC,
4723        crate::common::RW,
4724    > {
4725        crate::common::RegisterField::<
4726            19,
4727            0x1,
4728            1,
4729            0,
4730            gtupsr::Uselcd,
4731            gtupsr::Uselcd,
4732            Gtupsr_SPEC,
4733            crate::common::RW,
4734        >::from_register(self, 0)
4735    }
4736
4737    #[doc = "ELC_GPTE Event Source Counter Count Up Enable"]
4738    #[inline(always)]
4739    pub fn uselce(
4740        self,
4741    ) -> crate::common::RegisterField<
4742        20,
4743        0x1,
4744        1,
4745        0,
4746        gtupsr::Uselce,
4747        gtupsr::Uselce,
4748        Gtupsr_SPEC,
4749        crate::common::RW,
4750    > {
4751        crate::common::RegisterField::<
4752            20,
4753            0x1,
4754            1,
4755            0,
4756            gtupsr::Uselce,
4757            gtupsr::Uselce,
4758            Gtupsr_SPEC,
4759            crate::common::RW,
4760        >::from_register(self, 0)
4761    }
4762
4763    #[doc = "ELC_GPTF Event Source Counter Count Up Enable"]
4764    #[inline(always)]
4765    pub fn uselcf(
4766        self,
4767    ) -> crate::common::RegisterField<
4768        21,
4769        0x1,
4770        1,
4771        0,
4772        gtupsr::Uselcf,
4773        gtupsr::Uselcf,
4774        Gtupsr_SPEC,
4775        crate::common::RW,
4776    > {
4777        crate::common::RegisterField::<
4778            21,
4779            0x1,
4780            1,
4781            0,
4782            gtupsr::Uselcf,
4783            gtupsr::Uselcf,
4784            Gtupsr_SPEC,
4785            crate::common::RW,
4786        >::from_register(self, 0)
4787    }
4788
4789    #[doc = "ELC_GPTG Event Source Counter Count Up Enable"]
4790    #[inline(always)]
4791    pub fn uselcg(
4792        self,
4793    ) -> crate::common::RegisterField<
4794        22,
4795        0x1,
4796        1,
4797        0,
4798        gtupsr::Uselcg,
4799        gtupsr::Uselcg,
4800        Gtupsr_SPEC,
4801        crate::common::RW,
4802    > {
4803        crate::common::RegisterField::<
4804            22,
4805            0x1,
4806            1,
4807            0,
4808            gtupsr::Uselcg,
4809            gtupsr::Uselcg,
4810            Gtupsr_SPEC,
4811            crate::common::RW,
4812        >::from_register(self, 0)
4813    }
4814
4815    #[doc = "ELC_GPTH Event Source Counter Count Up Enable"]
4816    #[inline(always)]
4817    pub fn uselch(
4818        self,
4819    ) -> crate::common::RegisterField<
4820        23,
4821        0x1,
4822        1,
4823        0,
4824        gtupsr::Uselch,
4825        gtupsr::Uselch,
4826        Gtupsr_SPEC,
4827        crate::common::RW,
4828    > {
4829        crate::common::RegisterField::<
4830            23,
4831            0x1,
4832            1,
4833            0,
4834            gtupsr::Uselch,
4835            gtupsr::Uselch,
4836            Gtupsr_SPEC,
4837            crate::common::RW,
4838        >::from_register(self, 0)
4839    }
4840}
4841impl ::core::default::Default for Gtupsr {
4842    #[inline(always)]
4843    fn default() -> Gtupsr {
4844        <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
4845    }
4846}
4847pub mod gtupsr {
4848
4849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4850    pub struct Usgtrgar_SPEC;
4851    pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
4852    impl Usgtrgar {
4853        #[doc = "Counter count up disabled on the rising edge of GTETRGA input"]
4854        pub const _0: Self = Self::new(0);
4855
4856        #[doc = "Counter count up enabled on the rising edge of GTETRGA input"]
4857        pub const _1: Self = Self::new(1);
4858    }
4859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4860    pub struct Usgtrgaf_SPEC;
4861    pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
4862    impl Usgtrgaf {
4863        #[doc = "Counter count up disabled on the falling edge of GTETRGA input"]
4864        pub const _0: Self = Self::new(0);
4865
4866        #[doc = "Counter count up enabled on the falling edge of GTETRGA input"]
4867        pub const _1: Self = Self::new(1);
4868    }
4869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4870    pub struct Usgtrgbr_SPEC;
4871    pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
4872    impl Usgtrgbr {
4873        #[doc = "Counter count up disabled on the rising edge of GTETRGB input"]
4874        pub const _0: Self = Self::new(0);
4875
4876        #[doc = "Counter count up enabled on the rising edge of GTETRGB input"]
4877        pub const _1: Self = Self::new(1);
4878    }
4879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4880    pub struct Usgtrgbf_SPEC;
4881    pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
4882    impl Usgtrgbf {
4883        #[doc = "Counter count up disabled on the falling edge of GTETRGB input"]
4884        pub const _0: Self = Self::new(0);
4885
4886        #[doc = "Counter count up enabled on the falling edge of GTETRGB input"]
4887        pub const _1: Self = Self::new(1);
4888    }
4889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4890    pub struct Usgtrgcr_SPEC;
4891    pub type Usgtrgcr = crate::EnumBitfieldStruct<u8, Usgtrgcr_SPEC>;
4892    impl Usgtrgcr {
4893        #[doc = "Counter count up disabled on the rising edge of GTETRGC input"]
4894        pub const _0: Self = Self::new(0);
4895
4896        #[doc = "Counter count up enabled on the rising edge of GTETRGC input"]
4897        pub const _1: Self = Self::new(1);
4898    }
4899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4900    pub struct Usgtrgcf_SPEC;
4901    pub type Usgtrgcf = crate::EnumBitfieldStruct<u8, Usgtrgcf_SPEC>;
4902    impl Usgtrgcf {
4903        #[doc = "Counter count up disabled on the falling edge of GTETRGC input"]
4904        pub const _0: Self = Self::new(0);
4905
4906        #[doc = "Counter count up enabled on the falling edge of GTETRGC input"]
4907        pub const _1: Self = Self::new(1);
4908    }
4909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4910    pub struct Usgtrgdr_SPEC;
4911    pub type Usgtrgdr = crate::EnumBitfieldStruct<u8, Usgtrgdr_SPEC>;
4912    impl Usgtrgdr {
4913        #[doc = "Counter count up disabled on the rising edge of GTETRGD input"]
4914        pub const _0: Self = Self::new(0);
4915
4916        #[doc = "Counter count up enabled on the rising edge of GTETRGD input"]
4917        pub const _1: Self = Self::new(1);
4918    }
4919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4920    pub struct Usgtrgdf_SPEC;
4921    pub type Usgtrgdf = crate::EnumBitfieldStruct<u8, Usgtrgdf_SPEC>;
4922    impl Usgtrgdf {
4923        #[doc = "Counter count up disabled on the falling edge of GTETRGD input"]
4924        pub const _0: Self = Self::new(0);
4925
4926        #[doc = "Counter count up enabled on the falling edge of GTETRGD input"]
4927        pub const _1: Self = Self::new(1);
4928    }
4929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4930    pub struct Uscarbl_SPEC;
4931    pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
4932    impl Uscarbl {
4933        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4934        pub const _0: Self = Self::new(0);
4935
4936        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4937        pub const _1: Self = Self::new(1);
4938    }
4939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4940    pub struct Uscarbh_SPEC;
4941    pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
4942    impl Uscarbh {
4943        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4944        pub const _0: Self = Self::new(0);
4945
4946        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4947        pub const _1: Self = Self::new(1);
4948    }
4949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4950    pub struct Uscafbl_SPEC;
4951    pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
4952    impl Uscafbl {
4953        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4954        pub const _0: Self = Self::new(0);
4955
4956        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4957        pub const _1: Self = Self::new(1);
4958    }
4959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4960    pub struct Uscafbh_SPEC;
4961    pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
4962    impl Uscafbh {
4963        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4964        pub const _0: Self = Self::new(0);
4965
4966        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4967        pub const _1: Self = Self::new(1);
4968    }
4969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4970    pub struct Uscbral_SPEC;
4971    pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
4972    impl Uscbral {
4973        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4974        pub const _0: Self = Self::new(0);
4975
4976        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4977        pub const _1: Self = Self::new(1);
4978    }
4979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4980    pub struct Uscbrah_SPEC;
4981    pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
4982    impl Uscbrah {
4983        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4984        pub const _0: Self = Self::new(0);
4985
4986        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4987        pub const _1: Self = Self::new(1);
4988    }
4989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4990    pub struct Uscbfal_SPEC;
4991    pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
4992    impl Uscbfal {
4993        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4994        pub const _0: Self = Self::new(0);
4995
4996        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4997        pub const _1: Self = Self::new(1);
4998    }
4999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5000    pub struct Uscbfah_SPEC;
5001    pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
5002    impl Uscbfah {
5003        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5004        pub const _0: Self = Self::new(0);
5005
5006        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5007        pub const _1: Self = Self::new(1);
5008    }
5009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5010    pub struct Uselca_SPEC;
5011    pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
5012    impl Uselca {
5013        #[doc = "Counter count up disabled at the ELC_GPTA input"]
5014        pub const _0: Self = Self::new(0);
5015
5016        #[doc = "Counter count up enabled at the ELC_GPTA input"]
5017        pub const _1: Self = Self::new(1);
5018    }
5019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5020    pub struct Uselcb_SPEC;
5021    pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
5022    impl Uselcb {
5023        #[doc = "Counter count up disabled at the ELC_GPTB input"]
5024        pub const _0: Self = Self::new(0);
5025
5026        #[doc = "Counter count up enabled at the ELC_GPTB input"]
5027        pub const _1: Self = Self::new(1);
5028    }
5029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5030    pub struct Uselcc_SPEC;
5031    pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
5032    impl Uselcc {
5033        #[doc = "Counter count up disabled at the ELC_GPTC input"]
5034        pub const _0: Self = Self::new(0);
5035
5036        #[doc = "Counter count up enabled at the ELC_GPTC input"]
5037        pub const _1: Self = Self::new(1);
5038    }
5039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5040    pub struct Uselcd_SPEC;
5041    pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
5042    impl Uselcd {
5043        #[doc = "Counter count up disabled at the ELC_GPTD input"]
5044        pub const _0: Self = Self::new(0);
5045
5046        #[doc = "Counter count up enabled at the ELC_GPTD input"]
5047        pub const _1: Self = Self::new(1);
5048    }
5049    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5050    pub struct Uselce_SPEC;
5051    pub type Uselce = crate::EnumBitfieldStruct<u8, Uselce_SPEC>;
5052    impl Uselce {
5053        #[doc = "Counter count up disabled at the ELC_GPTE input"]
5054        pub const _0: Self = Self::new(0);
5055
5056        #[doc = "Counter count up enabled at the ELC_GPTE input"]
5057        pub const _1: Self = Self::new(1);
5058    }
5059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5060    pub struct Uselcf_SPEC;
5061    pub type Uselcf = crate::EnumBitfieldStruct<u8, Uselcf_SPEC>;
5062    impl Uselcf {
5063        #[doc = "Counter count up disabled at the ELC_GPTF input"]
5064        pub const _0: Self = Self::new(0);
5065
5066        #[doc = "Counter count up enabled at the ELC_GPTF input"]
5067        pub const _1: Self = Self::new(1);
5068    }
5069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5070    pub struct Uselcg_SPEC;
5071    pub type Uselcg = crate::EnumBitfieldStruct<u8, Uselcg_SPEC>;
5072    impl Uselcg {
5073        #[doc = "Counter count up disabled at the ELC_GPTG input"]
5074        pub const _0: Self = Self::new(0);
5075
5076        #[doc = "Counter count up enabled at the ELC_GPTG input"]
5077        pub const _1: Self = Self::new(1);
5078    }
5079    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5080    pub struct Uselch_SPEC;
5081    pub type Uselch = crate::EnumBitfieldStruct<u8, Uselch_SPEC>;
5082    impl Uselch {
5083        #[doc = "Counter count up disabled at the ELC_GPTH input"]
5084        pub const _0: Self = Self::new(0);
5085
5086        #[doc = "Counter count up enabled at the ELC_GPTH input"]
5087        pub const _1: Self = Self::new(1);
5088    }
5089}
5090#[doc(hidden)]
5091#[derive(Copy, Clone, Eq, PartialEq)]
5092pub struct Gtdnsr_SPEC;
5093impl crate::sealed::RegSpec for Gtdnsr_SPEC {
5094    type DataType = u32;
5095}
5096
5097#[doc = "General PWM Timer Down Count Source Select Register"]
5098pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
5099
5100impl Gtdnsr {
5101    #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
5102    #[inline(always)]
5103    pub fn dsgtrgar(
5104        self,
5105    ) -> crate::common::RegisterField<
5106        0,
5107        0x1,
5108        1,
5109        0,
5110        gtdnsr::Dsgtrgar,
5111        gtdnsr::Dsgtrgar,
5112        Gtdnsr_SPEC,
5113        crate::common::RW,
5114    > {
5115        crate::common::RegisterField::<
5116            0,
5117            0x1,
5118            1,
5119            0,
5120            gtdnsr::Dsgtrgar,
5121            gtdnsr::Dsgtrgar,
5122            Gtdnsr_SPEC,
5123            crate::common::RW,
5124        >::from_register(self, 0)
5125    }
5126
5127    #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
5128    #[inline(always)]
5129    pub fn dsgtrgaf(
5130        self,
5131    ) -> crate::common::RegisterField<
5132        1,
5133        0x1,
5134        1,
5135        0,
5136        gtdnsr::Dsgtrgaf,
5137        gtdnsr::Dsgtrgaf,
5138        Gtdnsr_SPEC,
5139        crate::common::RW,
5140    > {
5141        crate::common::RegisterField::<
5142            1,
5143            0x1,
5144            1,
5145            0,
5146            gtdnsr::Dsgtrgaf,
5147            gtdnsr::Dsgtrgaf,
5148            Gtdnsr_SPEC,
5149            crate::common::RW,
5150        >::from_register(self, 0)
5151    }
5152
5153    #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
5154    #[inline(always)]
5155    pub fn dsgtrgbr(
5156        self,
5157    ) -> crate::common::RegisterField<
5158        2,
5159        0x1,
5160        1,
5161        0,
5162        gtdnsr::Dsgtrgbr,
5163        gtdnsr::Dsgtrgbr,
5164        Gtdnsr_SPEC,
5165        crate::common::RW,
5166    > {
5167        crate::common::RegisterField::<
5168            2,
5169            0x1,
5170            1,
5171            0,
5172            gtdnsr::Dsgtrgbr,
5173            gtdnsr::Dsgtrgbr,
5174            Gtdnsr_SPEC,
5175            crate::common::RW,
5176        >::from_register(self, 0)
5177    }
5178
5179    #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
5180    #[inline(always)]
5181    pub fn dsgtrgbf(
5182        self,
5183    ) -> crate::common::RegisterField<
5184        3,
5185        0x1,
5186        1,
5187        0,
5188        gtdnsr::Dsgtrgbf,
5189        gtdnsr::Dsgtrgbf,
5190        Gtdnsr_SPEC,
5191        crate::common::RW,
5192    > {
5193        crate::common::RegisterField::<
5194            3,
5195            0x1,
5196            1,
5197            0,
5198            gtdnsr::Dsgtrgbf,
5199            gtdnsr::Dsgtrgbf,
5200            Gtdnsr_SPEC,
5201            crate::common::RW,
5202        >::from_register(self, 0)
5203    }
5204
5205    #[doc = "GTETRGC Pin Rising Input Source Counter Count Down Enable"]
5206    #[inline(always)]
5207    pub fn dsgtrgcr(
5208        self,
5209    ) -> crate::common::RegisterField<
5210        4,
5211        0x1,
5212        1,
5213        0,
5214        gtdnsr::Dsgtrgcr,
5215        gtdnsr::Dsgtrgcr,
5216        Gtdnsr_SPEC,
5217        crate::common::RW,
5218    > {
5219        crate::common::RegisterField::<
5220            4,
5221            0x1,
5222            1,
5223            0,
5224            gtdnsr::Dsgtrgcr,
5225            gtdnsr::Dsgtrgcr,
5226            Gtdnsr_SPEC,
5227            crate::common::RW,
5228        >::from_register(self, 0)
5229    }
5230
5231    #[doc = "GTETRGC Pin Falling Input Source Counter Count Down Enable"]
5232    #[inline(always)]
5233    pub fn dsgtrgcf(
5234        self,
5235    ) -> crate::common::RegisterField<
5236        5,
5237        0x1,
5238        1,
5239        0,
5240        gtdnsr::Dsgtrgcf,
5241        gtdnsr::Dsgtrgcf,
5242        Gtdnsr_SPEC,
5243        crate::common::RW,
5244    > {
5245        crate::common::RegisterField::<
5246            5,
5247            0x1,
5248            1,
5249            0,
5250            gtdnsr::Dsgtrgcf,
5251            gtdnsr::Dsgtrgcf,
5252            Gtdnsr_SPEC,
5253            crate::common::RW,
5254        >::from_register(self, 0)
5255    }
5256
5257    #[doc = "GTETRGD Pin Rising Input Source Counter Count Down Enable"]
5258    #[inline(always)]
5259    pub fn dsgtrgdr(
5260        self,
5261    ) -> crate::common::RegisterField<
5262        6,
5263        0x1,
5264        1,
5265        0,
5266        gtdnsr::Dsgtrgdr,
5267        gtdnsr::Dsgtrgdr,
5268        Gtdnsr_SPEC,
5269        crate::common::RW,
5270    > {
5271        crate::common::RegisterField::<
5272            6,
5273            0x1,
5274            1,
5275            0,
5276            gtdnsr::Dsgtrgdr,
5277            gtdnsr::Dsgtrgdr,
5278            Gtdnsr_SPEC,
5279            crate::common::RW,
5280        >::from_register(self, 0)
5281    }
5282
5283    #[doc = "GTETRGD Pin Falling Input Source Counter Count Down Enable"]
5284    #[inline(always)]
5285    pub fn dsgtrgdf(
5286        self,
5287    ) -> crate::common::RegisterField<
5288        7,
5289        0x1,
5290        1,
5291        0,
5292        gtdnsr::Dsgtrgdf,
5293        gtdnsr::Dsgtrgdf,
5294        Gtdnsr_SPEC,
5295        crate::common::RW,
5296    > {
5297        crate::common::RegisterField::<
5298            7,
5299            0x1,
5300            1,
5301            0,
5302            gtdnsr::Dsgtrgdf,
5303            gtdnsr::Dsgtrgdf,
5304            Gtdnsr_SPEC,
5305            crate::common::RW,
5306        >::from_register(self, 0)
5307    }
5308
5309    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5310    #[inline(always)]
5311    pub fn dscarbl(
5312        self,
5313    ) -> crate::common::RegisterField<
5314        8,
5315        0x1,
5316        1,
5317        0,
5318        gtdnsr::Dscarbl,
5319        gtdnsr::Dscarbl,
5320        Gtdnsr_SPEC,
5321        crate::common::RW,
5322    > {
5323        crate::common::RegisterField::<
5324            8,
5325            0x1,
5326            1,
5327            0,
5328            gtdnsr::Dscarbl,
5329            gtdnsr::Dscarbl,
5330            Gtdnsr_SPEC,
5331            crate::common::RW,
5332        >::from_register(self, 0)
5333    }
5334
5335    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable"]
5336    #[inline(always)]
5337    pub fn dscarbh(
5338        self,
5339    ) -> crate::common::RegisterField<
5340        9,
5341        0x1,
5342        1,
5343        0,
5344        gtdnsr::Dscarbh,
5345        gtdnsr::Dscarbh,
5346        Gtdnsr_SPEC,
5347        crate::common::RW,
5348    > {
5349        crate::common::RegisterField::<
5350            9,
5351            0x1,
5352            1,
5353            0,
5354            gtdnsr::Dscarbh,
5355            gtdnsr::Dscarbh,
5356            Gtdnsr_SPEC,
5357            crate::common::RW,
5358        >::from_register(self, 0)
5359    }
5360
5361    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5362    #[inline(always)]
5363    pub fn dscafbl(
5364        self,
5365    ) -> crate::common::RegisterField<
5366        10,
5367        0x1,
5368        1,
5369        0,
5370        gtdnsr::Dscafbl,
5371        gtdnsr::Dscafbl,
5372        Gtdnsr_SPEC,
5373        crate::common::RW,
5374    > {
5375        crate::common::RegisterField::<
5376            10,
5377            0x1,
5378            1,
5379            0,
5380            gtdnsr::Dscafbl,
5381            gtdnsr::Dscafbl,
5382            Gtdnsr_SPEC,
5383            crate::common::RW,
5384        >::from_register(self, 0)
5385    }
5386
5387    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable"]
5388    #[inline(always)]
5389    pub fn dscafbh(
5390        self,
5391    ) -> crate::common::RegisterField<
5392        11,
5393        0x1,
5394        1,
5395        0,
5396        gtdnsr::Dscafbh,
5397        gtdnsr::Dscafbh,
5398        Gtdnsr_SPEC,
5399        crate::common::RW,
5400    > {
5401        crate::common::RegisterField::<
5402            11,
5403            0x1,
5404            1,
5405            0,
5406            gtdnsr::Dscafbh,
5407            gtdnsr::Dscafbh,
5408            Gtdnsr_SPEC,
5409            crate::common::RW,
5410        >::from_register(self, 0)
5411    }
5412
5413    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5414    #[inline(always)]
5415    pub fn dscbral(
5416        self,
5417    ) -> crate::common::RegisterField<
5418        12,
5419        0x1,
5420        1,
5421        0,
5422        gtdnsr::Dscbral,
5423        gtdnsr::Dscbral,
5424        Gtdnsr_SPEC,
5425        crate::common::RW,
5426    > {
5427        crate::common::RegisterField::<
5428            12,
5429            0x1,
5430            1,
5431            0,
5432            gtdnsr::Dscbral,
5433            gtdnsr::Dscbral,
5434            Gtdnsr_SPEC,
5435            crate::common::RW,
5436        >::from_register(self, 0)
5437    }
5438
5439    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable"]
5440    #[inline(always)]
5441    pub fn dscbrah(
5442        self,
5443    ) -> crate::common::RegisterField<
5444        13,
5445        0x1,
5446        1,
5447        0,
5448        gtdnsr::Dscbrah,
5449        gtdnsr::Dscbrah,
5450        Gtdnsr_SPEC,
5451        crate::common::RW,
5452    > {
5453        crate::common::RegisterField::<
5454            13,
5455            0x1,
5456            1,
5457            0,
5458            gtdnsr::Dscbrah,
5459            gtdnsr::Dscbrah,
5460            Gtdnsr_SPEC,
5461            crate::common::RW,
5462        >::from_register(self, 0)
5463    }
5464
5465    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5466    #[inline(always)]
5467    pub fn dscbfal(
5468        self,
5469    ) -> crate::common::RegisterField<
5470        14,
5471        0x1,
5472        1,
5473        0,
5474        gtdnsr::Dscbfal,
5475        gtdnsr::Dscbfal,
5476        Gtdnsr_SPEC,
5477        crate::common::RW,
5478    > {
5479        crate::common::RegisterField::<
5480            14,
5481            0x1,
5482            1,
5483            0,
5484            gtdnsr::Dscbfal,
5485            gtdnsr::Dscbfal,
5486            Gtdnsr_SPEC,
5487            crate::common::RW,
5488        >::from_register(self, 0)
5489    }
5490
5491    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable"]
5492    #[inline(always)]
5493    pub fn dscbfah(
5494        self,
5495    ) -> crate::common::RegisterField<
5496        15,
5497        0x1,
5498        1,
5499        0,
5500        gtdnsr::Dscbfah,
5501        gtdnsr::Dscbfah,
5502        Gtdnsr_SPEC,
5503        crate::common::RW,
5504    > {
5505        crate::common::RegisterField::<
5506            15,
5507            0x1,
5508            1,
5509            0,
5510            gtdnsr::Dscbfah,
5511            gtdnsr::Dscbfah,
5512            Gtdnsr_SPEC,
5513            crate::common::RW,
5514        >::from_register(self, 0)
5515    }
5516
5517    #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
5518    #[inline(always)]
5519    pub fn dselca(
5520        self,
5521    ) -> crate::common::RegisterField<
5522        16,
5523        0x1,
5524        1,
5525        0,
5526        gtdnsr::Dselca,
5527        gtdnsr::Dselca,
5528        Gtdnsr_SPEC,
5529        crate::common::RW,
5530    > {
5531        crate::common::RegisterField::<
5532            16,
5533            0x1,
5534            1,
5535            0,
5536            gtdnsr::Dselca,
5537            gtdnsr::Dselca,
5538            Gtdnsr_SPEC,
5539            crate::common::RW,
5540        >::from_register(self, 0)
5541    }
5542
5543    #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
5544    #[inline(always)]
5545    pub fn dselcb(
5546        self,
5547    ) -> crate::common::RegisterField<
5548        17,
5549        0x1,
5550        1,
5551        0,
5552        gtdnsr::Dselcb,
5553        gtdnsr::Dselcb,
5554        Gtdnsr_SPEC,
5555        crate::common::RW,
5556    > {
5557        crate::common::RegisterField::<
5558            17,
5559            0x1,
5560            1,
5561            0,
5562            gtdnsr::Dselcb,
5563            gtdnsr::Dselcb,
5564            Gtdnsr_SPEC,
5565            crate::common::RW,
5566        >::from_register(self, 0)
5567    }
5568
5569    #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
5570    #[inline(always)]
5571    pub fn dselcc(
5572        self,
5573    ) -> crate::common::RegisterField<
5574        18,
5575        0x1,
5576        1,
5577        0,
5578        gtdnsr::Dselcc,
5579        gtdnsr::Dselcc,
5580        Gtdnsr_SPEC,
5581        crate::common::RW,
5582    > {
5583        crate::common::RegisterField::<
5584            18,
5585            0x1,
5586            1,
5587            0,
5588            gtdnsr::Dselcc,
5589            gtdnsr::Dselcc,
5590            Gtdnsr_SPEC,
5591            crate::common::RW,
5592        >::from_register(self, 0)
5593    }
5594
5595    #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
5596    #[inline(always)]
5597    pub fn dselcd(
5598        self,
5599    ) -> crate::common::RegisterField<
5600        19,
5601        0x1,
5602        1,
5603        0,
5604        gtdnsr::Dselcd,
5605        gtdnsr::Dselcd,
5606        Gtdnsr_SPEC,
5607        crate::common::RW,
5608    > {
5609        crate::common::RegisterField::<
5610            19,
5611            0x1,
5612            1,
5613            0,
5614            gtdnsr::Dselcd,
5615            gtdnsr::Dselcd,
5616            Gtdnsr_SPEC,
5617            crate::common::RW,
5618        >::from_register(self, 0)
5619    }
5620
5621    #[doc = "ELC_GPTE Event Source Counter Count Down Enable"]
5622    #[inline(always)]
5623    pub fn dselce(
5624        self,
5625    ) -> crate::common::RegisterField<
5626        20,
5627        0x1,
5628        1,
5629        0,
5630        gtdnsr::Dselce,
5631        gtdnsr::Dselce,
5632        Gtdnsr_SPEC,
5633        crate::common::RW,
5634    > {
5635        crate::common::RegisterField::<
5636            20,
5637            0x1,
5638            1,
5639            0,
5640            gtdnsr::Dselce,
5641            gtdnsr::Dselce,
5642            Gtdnsr_SPEC,
5643            crate::common::RW,
5644        >::from_register(self, 0)
5645    }
5646
5647    #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5648    #[inline(always)]
5649    pub fn dselcf(
5650        self,
5651    ) -> crate::common::RegisterField<
5652        21,
5653        0x1,
5654        1,
5655        0,
5656        gtdnsr::Dselcf,
5657        gtdnsr::Dselcf,
5658        Gtdnsr_SPEC,
5659        crate::common::RW,
5660    > {
5661        crate::common::RegisterField::<
5662            21,
5663            0x1,
5664            1,
5665            0,
5666            gtdnsr::Dselcf,
5667            gtdnsr::Dselcf,
5668            Gtdnsr_SPEC,
5669            crate::common::RW,
5670        >::from_register(self, 0)
5671    }
5672
5673    #[doc = "ELC_GPTG Event Source Counter Count Down Enable"]
5674    #[inline(always)]
5675    pub fn dselcg(
5676        self,
5677    ) -> crate::common::RegisterField<
5678        22,
5679        0x1,
5680        1,
5681        0,
5682        gtdnsr::Dselcg,
5683        gtdnsr::Dselcg,
5684        Gtdnsr_SPEC,
5685        crate::common::RW,
5686    > {
5687        crate::common::RegisterField::<
5688            22,
5689            0x1,
5690            1,
5691            0,
5692            gtdnsr::Dselcg,
5693            gtdnsr::Dselcg,
5694            Gtdnsr_SPEC,
5695            crate::common::RW,
5696        >::from_register(self, 0)
5697    }
5698
5699    #[doc = "ELC_GPTH Event Source Counter Count Down Enable"]
5700    #[inline(always)]
5701    pub fn dselch(
5702        self,
5703    ) -> crate::common::RegisterField<
5704        23,
5705        0x1,
5706        1,
5707        0,
5708        gtdnsr::Dselch,
5709        gtdnsr::Dselch,
5710        Gtdnsr_SPEC,
5711        crate::common::RW,
5712    > {
5713        crate::common::RegisterField::<
5714            23,
5715            0x1,
5716            1,
5717            0,
5718            gtdnsr::Dselch,
5719            gtdnsr::Dselch,
5720            Gtdnsr_SPEC,
5721            crate::common::RW,
5722        >::from_register(self, 0)
5723    }
5724}
5725impl ::core::default::Default for Gtdnsr {
5726    #[inline(always)]
5727    fn default() -> Gtdnsr {
5728        <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
5729    }
5730}
5731pub mod gtdnsr {
5732
5733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5734    pub struct Dsgtrgar_SPEC;
5735    pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
5736    impl Dsgtrgar {
5737        #[doc = "Counter count down disabled on the rising edge of GTETRGA input"]
5738        pub const _0: Self = Self::new(0);
5739
5740        #[doc = "Counter count down enabled on the rising edge of GTETRGA input"]
5741        pub const _1: Self = Self::new(1);
5742    }
5743    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5744    pub struct Dsgtrgaf_SPEC;
5745    pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
5746    impl Dsgtrgaf {
5747        #[doc = "Counter count down disabled on the falling edge of GTETRGA input"]
5748        pub const _0: Self = Self::new(0);
5749
5750        #[doc = "Counter count down enabled on the falling edge of GTETRGA input"]
5751        pub const _1: Self = Self::new(1);
5752    }
5753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5754    pub struct Dsgtrgbr_SPEC;
5755    pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
5756    impl Dsgtrgbr {
5757        #[doc = "Counter count down disabled on the rising edge of GTETRGB input"]
5758        pub const _0: Self = Self::new(0);
5759
5760        #[doc = "Counter count down enabled on the rising edge of GTETRGB input"]
5761        pub const _1: Self = Self::new(1);
5762    }
5763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5764    pub struct Dsgtrgbf_SPEC;
5765    pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
5766    impl Dsgtrgbf {
5767        #[doc = "Counter count down disabled on the falling edge of GTETRGB input"]
5768        pub const _0: Self = Self::new(0);
5769
5770        #[doc = "Counter count down enabled on the falling edge of GTETRGB input"]
5771        pub const _1: Self = Self::new(1);
5772    }
5773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5774    pub struct Dsgtrgcr_SPEC;
5775    pub type Dsgtrgcr = crate::EnumBitfieldStruct<u8, Dsgtrgcr_SPEC>;
5776    impl Dsgtrgcr {
5777        #[doc = "Counter count down disabled on the rising edge of GTETRGC input"]
5778        pub const _0: Self = Self::new(0);
5779
5780        #[doc = "Counter count down enabled on the rising edge of GTETRGC input"]
5781        pub const _1: Self = Self::new(1);
5782    }
5783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5784    pub struct Dsgtrgcf_SPEC;
5785    pub type Dsgtrgcf = crate::EnumBitfieldStruct<u8, Dsgtrgcf_SPEC>;
5786    impl Dsgtrgcf {
5787        #[doc = "Counter count down disabled on the falling edge of GTETRGC input"]
5788        pub const _0: Self = Self::new(0);
5789
5790        #[doc = "Counter count down enabled on the falling edge of GTETRGC input"]
5791        pub const _1: Self = Self::new(1);
5792    }
5793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5794    pub struct Dsgtrgdr_SPEC;
5795    pub type Dsgtrgdr = crate::EnumBitfieldStruct<u8, Dsgtrgdr_SPEC>;
5796    impl Dsgtrgdr {
5797        #[doc = "Counter count down disabled on the rising edge of GTETRGD input"]
5798        pub const _0: Self = Self::new(0);
5799
5800        #[doc = "Counter count down enabled on the rising edge of GTETRGD input"]
5801        pub const _1: Self = Self::new(1);
5802    }
5803    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5804    pub struct Dsgtrgdf_SPEC;
5805    pub type Dsgtrgdf = crate::EnumBitfieldStruct<u8, Dsgtrgdf_SPEC>;
5806    impl Dsgtrgdf {
5807        #[doc = "Counter count down disabled on the falling edge of GTETRGD input"]
5808        pub const _0: Self = Self::new(0);
5809
5810        #[doc = "Counter count down enabled on the falling edge of GTETRGD input"]
5811        pub const _1: Self = Self::new(1);
5812    }
5813    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5814    pub struct Dscarbl_SPEC;
5815    pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
5816    impl Dscarbl {
5817        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5818        pub const _0: Self = Self::new(0);
5819
5820        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5821        pub const _1: Self = Self::new(1);
5822    }
5823    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5824    pub struct Dscarbh_SPEC;
5825    pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
5826    impl Dscarbh {
5827        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5828        pub const _0: Self = Self::new(0);
5829
5830        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5831        pub const _1: Self = Self::new(1);
5832    }
5833    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5834    pub struct Dscafbl_SPEC;
5835    pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
5836    impl Dscafbl {
5837        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5838        pub const _0: Self = Self::new(0);
5839
5840        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5841        pub const _1: Self = Self::new(1);
5842    }
5843    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5844    pub struct Dscafbh_SPEC;
5845    pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
5846    impl Dscafbh {
5847        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5848        pub const _0: Self = Self::new(0);
5849
5850        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5851        pub const _1: Self = Self::new(1);
5852    }
5853    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5854    pub struct Dscbral_SPEC;
5855    pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
5856    impl Dscbral {
5857        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5858        pub const _0: Self = Self::new(0);
5859
5860        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5861        pub const _1: Self = Self::new(1);
5862    }
5863    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5864    pub struct Dscbrah_SPEC;
5865    pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
5866    impl Dscbrah {
5867        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5868        pub const _0: Self = Self::new(0);
5869
5870        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5871        pub const _1: Self = Self::new(1);
5872    }
5873    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5874    pub struct Dscbfal_SPEC;
5875    pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
5876    impl Dscbfal {
5877        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5878        pub const _0: Self = Self::new(0);
5879
5880        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5881        pub const _1: Self = Self::new(1);
5882    }
5883    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5884    pub struct Dscbfah_SPEC;
5885    pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
5886    impl Dscbfah {
5887        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5888        pub const _0: Self = Self::new(0);
5889
5890        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5891        pub const _1: Self = Self::new(1);
5892    }
5893    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5894    pub struct Dselca_SPEC;
5895    pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
5896    impl Dselca {
5897        #[doc = "Counter count down disabled at the ELC_GPTA input"]
5898        pub const _0: Self = Self::new(0);
5899
5900        #[doc = "Counter count down enabled at the ELC_GPTA input"]
5901        pub const _1: Self = Self::new(1);
5902    }
5903    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5904    pub struct Dselcb_SPEC;
5905    pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
5906    impl Dselcb {
5907        #[doc = "Counter count down disabled at the ELC_GPTB input"]
5908        pub const _0: Self = Self::new(0);
5909
5910        #[doc = "Counter count down enabled at the ELC_GPTB input"]
5911        pub const _1: Self = Self::new(1);
5912    }
5913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5914    pub struct Dselcc_SPEC;
5915    pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
5916    impl Dselcc {
5917        #[doc = "Counter count down disabled at the ELC_GPTC input"]
5918        pub const _0: Self = Self::new(0);
5919
5920        #[doc = "Counter count down enabled at the ELC_GPTC input"]
5921        pub const _1: Self = Self::new(1);
5922    }
5923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5924    pub struct Dselcd_SPEC;
5925    pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
5926    impl Dselcd {
5927        #[doc = "Counter count down disabled at the ELC_GPTD input"]
5928        pub const _0: Self = Self::new(0);
5929
5930        #[doc = "Counter count down enabled at the ELC_GPTD input"]
5931        pub const _1: Self = Self::new(1);
5932    }
5933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5934    pub struct Dselce_SPEC;
5935    pub type Dselce = crate::EnumBitfieldStruct<u8, Dselce_SPEC>;
5936    impl Dselce {
5937        #[doc = "Counter count down disabled at the ELC_GPTE input"]
5938        pub const _0: Self = Self::new(0);
5939
5940        #[doc = "Counter count down enabled at the ELC_GPTE input"]
5941        pub const _1: Self = Self::new(1);
5942    }
5943    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5944    pub struct Dselcf_SPEC;
5945    pub type Dselcf = crate::EnumBitfieldStruct<u8, Dselcf_SPEC>;
5946    impl Dselcf {
5947        #[doc = "Counter count down disabled at the ELC_GPTF input"]
5948        pub const _0: Self = Self::new(0);
5949
5950        #[doc = "Counter count down enabled at the ELC_GPTF input"]
5951        pub const _1: Self = Self::new(1);
5952    }
5953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5954    pub struct Dselcg_SPEC;
5955    pub type Dselcg = crate::EnumBitfieldStruct<u8, Dselcg_SPEC>;
5956    impl Dselcg {
5957        #[doc = "Counter count down disabled at the ELC_GPTG input"]
5958        pub const _0: Self = Self::new(0);
5959
5960        #[doc = "Counter count down enabled at the ELC_GPTG input"]
5961        pub const _1: Self = Self::new(1);
5962    }
5963    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5964    pub struct Dselch_SPEC;
5965    pub type Dselch = crate::EnumBitfieldStruct<u8, Dselch_SPEC>;
5966    impl Dselch {
5967        #[doc = "Counter count down disabled at the ELC_GPTH input"]
5968        pub const _0: Self = Self::new(0);
5969
5970        #[doc = "Counter count down enabled at the ELC_GPTH input"]
5971        pub const _1: Self = Self::new(1);
5972    }
5973}
5974#[doc(hidden)]
5975#[derive(Copy, Clone, Eq, PartialEq)]
5976pub struct Gticasr_SPEC;
5977impl crate::sealed::RegSpec for Gticasr_SPEC {
5978    type DataType = u32;
5979}
5980
5981#[doc = "General PWM Timer Input Capture Source Select Register A"]
5982pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
5983
5984impl Gticasr {
5985    #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
5986    #[inline(always)]
5987    pub fn asgtrgar(
5988        self,
5989    ) -> crate::common::RegisterField<
5990        0,
5991        0x1,
5992        1,
5993        0,
5994        gticasr::Asgtrgar,
5995        gticasr::Asgtrgar,
5996        Gticasr_SPEC,
5997        crate::common::RW,
5998    > {
5999        crate::common::RegisterField::<
6000            0,
6001            0x1,
6002            1,
6003            0,
6004            gticasr::Asgtrgar,
6005            gticasr::Asgtrgar,
6006            Gticasr_SPEC,
6007            crate::common::RW,
6008        >::from_register(self, 0)
6009    }
6010
6011    #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
6012    #[inline(always)]
6013    pub fn asgtrgaf(
6014        self,
6015    ) -> crate::common::RegisterField<
6016        1,
6017        0x1,
6018        1,
6019        0,
6020        gticasr::Asgtrgaf,
6021        gticasr::Asgtrgaf,
6022        Gticasr_SPEC,
6023        crate::common::RW,
6024    > {
6025        crate::common::RegisterField::<
6026            1,
6027            0x1,
6028            1,
6029            0,
6030            gticasr::Asgtrgaf,
6031            gticasr::Asgtrgaf,
6032            Gticasr_SPEC,
6033            crate::common::RW,
6034        >::from_register(self, 0)
6035    }
6036
6037    #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
6038    #[inline(always)]
6039    pub fn asgtrgbr(
6040        self,
6041    ) -> crate::common::RegisterField<
6042        2,
6043        0x1,
6044        1,
6045        0,
6046        gticasr::Asgtrgbr,
6047        gticasr::Asgtrgbr,
6048        Gticasr_SPEC,
6049        crate::common::RW,
6050    > {
6051        crate::common::RegisterField::<
6052            2,
6053            0x1,
6054            1,
6055            0,
6056            gticasr::Asgtrgbr,
6057            gticasr::Asgtrgbr,
6058            Gticasr_SPEC,
6059            crate::common::RW,
6060        >::from_register(self, 0)
6061    }
6062
6063    #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
6064    #[inline(always)]
6065    pub fn asgtrgbf(
6066        self,
6067    ) -> crate::common::RegisterField<
6068        3,
6069        0x1,
6070        1,
6071        0,
6072        gticasr::Asgtrgbf,
6073        gticasr::Asgtrgbf,
6074        Gticasr_SPEC,
6075        crate::common::RW,
6076    > {
6077        crate::common::RegisterField::<
6078            3,
6079            0x1,
6080            1,
6081            0,
6082            gticasr::Asgtrgbf,
6083            gticasr::Asgtrgbf,
6084            Gticasr_SPEC,
6085            crate::common::RW,
6086        >::from_register(self, 0)
6087    }
6088
6089    #[doc = "GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable"]
6090    #[inline(always)]
6091    pub fn asgtrgcr(
6092        self,
6093    ) -> crate::common::RegisterField<
6094        4,
6095        0x1,
6096        1,
6097        0,
6098        gticasr::Asgtrgcr,
6099        gticasr::Asgtrgcr,
6100        Gticasr_SPEC,
6101        crate::common::RW,
6102    > {
6103        crate::common::RegisterField::<
6104            4,
6105            0x1,
6106            1,
6107            0,
6108            gticasr::Asgtrgcr,
6109            gticasr::Asgtrgcr,
6110            Gticasr_SPEC,
6111            crate::common::RW,
6112        >::from_register(self, 0)
6113    }
6114
6115    #[doc = "GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable"]
6116    #[inline(always)]
6117    pub fn asgtrgcf(
6118        self,
6119    ) -> crate::common::RegisterField<
6120        5,
6121        0x1,
6122        1,
6123        0,
6124        gticasr::Asgtrgcf,
6125        gticasr::Asgtrgcf,
6126        Gticasr_SPEC,
6127        crate::common::RW,
6128    > {
6129        crate::common::RegisterField::<
6130            5,
6131            0x1,
6132            1,
6133            0,
6134            gticasr::Asgtrgcf,
6135            gticasr::Asgtrgcf,
6136            Gticasr_SPEC,
6137            crate::common::RW,
6138        >::from_register(self, 0)
6139    }
6140
6141    #[doc = "GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable"]
6142    #[inline(always)]
6143    pub fn asgtrgdr(
6144        self,
6145    ) -> crate::common::RegisterField<
6146        6,
6147        0x1,
6148        1,
6149        0,
6150        gticasr::Asgtrgdr,
6151        gticasr::Asgtrgdr,
6152        Gticasr_SPEC,
6153        crate::common::RW,
6154    > {
6155        crate::common::RegisterField::<
6156            6,
6157            0x1,
6158            1,
6159            0,
6160            gticasr::Asgtrgdr,
6161            gticasr::Asgtrgdr,
6162            Gticasr_SPEC,
6163            crate::common::RW,
6164        >::from_register(self, 0)
6165    }
6166
6167    #[doc = "GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable"]
6168    #[inline(always)]
6169    pub fn asgtrgdf(
6170        self,
6171    ) -> crate::common::RegisterField<
6172        7,
6173        0x1,
6174        1,
6175        0,
6176        gticasr::Asgtrgdf,
6177        gticasr::Asgtrgdf,
6178        Gticasr_SPEC,
6179        crate::common::RW,
6180    > {
6181        crate::common::RegisterField::<
6182            7,
6183            0x1,
6184            1,
6185            0,
6186            gticasr::Asgtrgdf,
6187            gticasr::Asgtrgdf,
6188            Gticasr_SPEC,
6189            crate::common::RW,
6190        >::from_register(self, 0)
6191    }
6192
6193    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
6194    #[inline(always)]
6195    pub fn ascarbl(
6196        self,
6197    ) -> crate::common::RegisterField<
6198        8,
6199        0x1,
6200        1,
6201        0,
6202        gticasr::Ascarbl,
6203        gticasr::Ascarbl,
6204        Gticasr_SPEC,
6205        crate::common::RW,
6206    > {
6207        crate::common::RegisterField::<
6208            8,
6209            0x1,
6210            1,
6211            0,
6212            gticasr::Ascarbl,
6213            gticasr::Ascarbl,
6214            Gticasr_SPEC,
6215            crate::common::RW,
6216        >::from_register(self, 0)
6217    }
6218
6219    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6220    #[inline(always)]
6221    pub fn ascarbh(
6222        self,
6223    ) -> crate::common::RegisterField<
6224        9,
6225        0x1,
6226        1,
6227        0,
6228        gticasr::Ascarbh,
6229        gticasr::Ascarbh,
6230        Gticasr_SPEC,
6231        crate::common::RW,
6232    > {
6233        crate::common::RegisterField::<
6234            9,
6235            0x1,
6236            1,
6237            0,
6238            gticasr::Ascarbh,
6239            gticasr::Ascarbh,
6240            Gticasr_SPEC,
6241            crate::common::RW,
6242        >::from_register(self, 0)
6243    }
6244
6245    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
6246    #[inline(always)]
6247    pub fn ascafbl(
6248        self,
6249    ) -> crate::common::RegisterField<
6250        10,
6251        0x1,
6252        1,
6253        0,
6254        gticasr::Ascafbl,
6255        gticasr::Ascafbl,
6256        Gticasr_SPEC,
6257        crate::common::RW,
6258    > {
6259        crate::common::RegisterField::<
6260            10,
6261            0x1,
6262            1,
6263            0,
6264            gticasr::Ascafbl,
6265            gticasr::Ascafbl,
6266            Gticasr_SPEC,
6267            crate::common::RW,
6268        >::from_register(self, 0)
6269    }
6270
6271    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6272    #[inline(always)]
6273    pub fn ascafbh(
6274        self,
6275    ) -> crate::common::RegisterField<
6276        11,
6277        0x1,
6278        1,
6279        0,
6280        gticasr::Ascafbh,
6281        gticasr::Ascafbh,
6282        Gticasr_SPEC,
6283        crate::common::RW,
6284    > {
6285        crate::common::RegisterField::<
6286            11,
6287            0x1,
6288            1,
6289            0,
6290            gticasr::Ascafbh,
6291            gticasr::Ascafbh,
6292            Gticasr_SPEC,
6293            crate::common::RW,
6294        >::from_register(self, 0)
6295    }
6296
6297    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6298    #[inline(always)]
6299    pub fn ascbral(
6300        self,
6301    ) -> crate::common::RegisterField<
6302        12,
6303        0x1,
6304        1,
6305        0,
6306        gticasr::Ascbral,
6307        gticasr::Ascbral,
6308        Gticasr_SPEC,
6309        crate::common::RW,
6310    > {
6311        crate::common::RegisterField::<
6312            12,
6313            0x1,
6314            1,
6315            0,
6316            gticasr::Ascbral,
6317            gticasr::Ascbral,
6318            Gticasr_SPEC,
6319            crate::common::RW,
6320        >::from_register(self, 0)
6321    }
6322
6323    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6324    #[inline(always)]
6325    pub fn ascbrah(
6326        self,
6327    ) -> crate::common::RegisterField<
6328        13,
6329        0x1,
6330        1,
6331        0,
6332        gticasr::Ascbrah,
6333        gticasr::Ascbrah,
6334        Gticasr_SPEC,
6335        crate::common::RW,
6336    > {
6337        crate::common::RegisterField::<
6338            13,
6339            0x1,
6340            1,
6341            0,
6342            gticasr::Ascbrah,
6343            gticasr::Ascbrah,
6344            Gticasr_SPEC,
6345            crate::common::RW,
6346        >::from_register(self, 0)
6347    }
6348
6349    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6350    #[inline(always)]
6351    pub fn ascbfal(
6352        self,
6353    ) -> crate::common::RegisterField<
6354        14,
6355        0x1,
6356        1,
6357        0,
6358        gticasr::Ascbfal,
6359        gticasr::Ascbfal,
6360        Gticasr_SPEC,
6361        crate::common::RW,
6362    > {
6363        crate::common::RegisterField::<
6364            14,
6365            0x1,
6366            1,
6367            0,
6368            gticasr::Ascbfal,
6369            gticasr::Ascbfal,
6370            Gticasr_SPEC,
6371            crate::common::RW,
6372        >::from_register(self, 0)
6373    }
6374
6375    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6376    #[inline(always)]
6377    pub fn ascbfah(
6378        self,
6379    ) -> crate::common::RegisterField<
6380        15,
6381        0x1,
6382        1,
6383        0,
6384        gticasr::Ascbfah,
6385        gticasr::Ascbfah,
6386        Gticasr_SPEC,
6387        crate::common::RW,
6388    > {
6389        crate::common::RegisterField::<
6390            15,
6391            0x1,
6392            1,
6393            0,
6394            gticasr::Ascbfah,
6395            gticasr::Ascbfah,
6396            Gticasr_SPEC,
6397            crate::common::RW,
6398        >::from_register(self, 0)
6399    }
6400
6401    #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
6402    #[inline(always)]
6403    pub fn aselca(
6404        self,
6405    ) -> crate::common::RegisterField<
6406        16,
6407        0x1,
6408        1,
6409        0,
6410        gticasr::Aselca,
6411        gticasr::Aselca,
6412        Gticasr_SPEC,
6413        crate::common::RW,
6414    > {
6415        crate::common::RegisterField::<
6416            16,
6417            0x1,
6418            1,
6419            0,
6420            gticasr::Aselca,
6421            gticasr::Aselca,
6422            Gticasr_SPEC,
6423            crate::common::RW,
6424        >::from_register(self, 0)
6425    }
6426
6427    #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
6428    #[inline(always)]
6429    pub fn aselcb(
6430        self,
6431    ) -> crate::common::RegisterField<
6432        17,
6433        0x1,
6434        1,
6435        0,
6436        gticasr::Aselcb,
6437        gticasr::Aselcb,
6438        Gticasr_SPEC,
6439        crate::common::RW,
6440    > {
6441        crate::common::RegisterField::<
6442            17,
6443            0x1,
6444            1,
6445            0,
6446            gticasr::Aselcb,
6447            gticasr::Aselcb,
6448            Gticasr_SPEC,
6449            crate::common::RW,
6450        >::from_register(self, 0)
6451    }
6452
6453    #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
6454    #[inline(always)]
6455    pub fn aselcc(
6456        self,
6457    ) -> crate::common::RegisterField<
6458        18,
6459        0x1,
6460        1,
6461        0,
6462        gticasr::Aselcc,
6463        gticasr::Aselcc,
6464        Gticasr_SPEC,
6465        crate::common::RW,
6466    > {
6467        crate::common::RegisterField::<
6468            18,
6469            0x1,
6470            1,
6471            0,
6472            gticasr::Aselcc,
6473            gticasr::Aselcc,
6474            Gticasr_SPEC,
6475            crate::common::RW,
6476        >::from_register(self, 0)
6477    }
6478
6479    #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
6480    #[inline(always)]
6481    pub fn aselcd(
6482        self,
6483    ) -> crate::common::RegisterField<
6484        19,
6485        0x1,
6486        1,
6487        0,
6488        gticasr::Aselcd,
6489        gticasr::Aselcd,
6490        Gticasr_SPEC,
6491        crate::common::RW,
6492    > {
6493        crate::common::RegisterField::<
6494            19,
6495            0x1,
6496            1,
6497            0,
6498            gticasr::Aselcd,
6499            gticasr::Aselcd,
6500            Gticasr_SPEC,
6501            crate::common::RW,
6502        >::from_register(self, 0)
6503    }
6504
6505    #[doc = "ELC_GPTE Event Source GTCCRA Input Capture Enable"]
6506    #[inline(always)]
6507    pub fn aselce(
6508        self,
6509    ) -> crate::common::RegisterField<
6510        20,
6511        0x1,
6512        1,
6513        0,
6514        gticasr::Aselce,
6515        gticasr::Aselce,
6516        Gticasr_SPEC,
6517        crate::common::RW,
6518    > {
6519        crate::common::RegisterField::<
6520            20,
6521            0x1,
6522            1,
6523            0,
6524            gticasr::Aselce,
6525            gticasr::Aselce,
6526            Gticasr_SPEC,
6527            crate::common::RW,
6528        >::from_register(self, 0)
6529    }
6530
6531    #[doc = "ELC_GPTF Event Source GTCCRA Input Capture Enable"]
6532    #[inline(always)]
6533    pub fn aselcf(
6534        self,
6535    ) -> crate::common::RegisterField<
6536        21,
6537        0x1,
6538        1,
6539        0,
6540        gticasr::Aselcf,
6541        gticasr::Aselcf,
6542        Gticasr_SPEC,
6543        crate::common::RW,
6544    > {
6545        crate::common::RegisterField::<
6546            21,
6547            0x1,
6548            1,
6549            0,
6550            gticasr::Aselcf,
6551            gticasr::Aselcf,
6552            Gticasr_SPEC,
6553            crate::common::RW,
6554        >::from_register(self, 0)
6555    }
6556
6557    #[doc = "ELC_GPTG Event Source GTCCRA Input Capture Enable"]
6558    #[inline(always)]
6559    pub fn aselcg(
6560        self,
6561    ) -> crate::common::RegisterField<
6562        22,
6563        0x1,
6564        1,
6565        0,
6566        gticasr::Aselcg,
6567        gticasr::Aselcg,
6568        Gticasr_SPEC,
6569        crate::common::RW,
6570    > {
6571        crate::common::RegisterField::<
6572            22,
6573            0x1,
6574            1,
6575            0,
6576            gticasr::Aselcg,
6577            gticasr::Aselcg,
6578            Gticasr_SPEC,
6579            crate::common::RW,
6580        >::from_register(self, 0)
6581    }
6582
6583    #[doc = "ELC_GPTH Event Source GTCCRA Input Capture Enable"]
6584    #[inline(always)]
6585    pub fn aselch(
6586        self,
6587    ) -> crate::common::RegisterField<
6588        23,
6589        0x1,
6590        1,
6591        0,
6592        gticasr::Aselch,
6593        gticasr::Aselch,
6594        Gticasr_SPEC,
6595        crate::common::RW,
6596    > {
6597        crate::common::RegisterField::<
6598            23,
6599            0x1,
6600            1,
6601            0,
6602            gticasr::Aselch,
6603            gticasr::Aselch,
6604            Gticasr_SPEC,
6605            crate::common::RW,
6606        >::from_register(self, 0)
6607    }
6608}
6609impl ::core::default::Default for Gticasr {
6610    #[inline(always)]
6611    fn default() -> Gticasr {
6612        <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
6613    }
6614}
6615pub mod gticasr {
6616
6617    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6618    pub struct Asgtrgar_SPEC;
6619    pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
6620    impl Asgtrgar {
6621        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGA input"]
6622        pub const _0: Self = Self::new(0);
6623
6624        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGA input"]
6625        pub const _1: Self = Self::new(1);
6626    }
6627    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6628    pub struct Asgtrgaf_SPEC;
6629    pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
6630    impl Asgtrgaf {
6631        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGA input"]
6632        pub const _0: Self = Self::new(0);
6633
6634        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGA input"]
6635        pub const _1: Self = Self::new(1);
6636    }
6637    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6638    pub struct Asgtrgbr_SPEC;
6639    pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
6640    impl Asgtrgbr {
6641        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGB input"]
6642        pub const _0: Self = Self::new(0);
6643
6644        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGB input"]
6645        pub const _1: Self = Self::new(1);
6646    }
6647    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6648    pub struct Asgtrgbf_SPEC;
6649    pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
6650    impl Asgtrgbf {
6651        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGB input"]
6652        pub const _0: Self = Self::new(0);
6653
6654        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGB input"]
6655        pub const _1: Self = Self::new(1);
6656    }
6657    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6658    pub struct Asgtrgcr_SPEC;
6659    pub type Asgtrgcr = crate::EnumBitfieldStruct<u8, Asgtrgcr_SPEC>;
6660    impl Asgtrgcr {
6661        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGC input"]
6662        pub const _0: Self = Self::new(0);
6663
6664        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGC input"]
6665        pub const _1: Self = Self::new(1);
6666    }
6667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6668    pub struct Asgtrgcf_SPEC;
6669    pub type Asgtrgcf = crate::EnumBitfieldStruct<u8, Asgtrgcf_SPEC>;
6670    impl Asgtrgcf {
6671        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGC input"]
6672        pub const _0: Self = Self::new(0);
6673
6674        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGC input"]
6675        pub const _1: Self = Self::new(1);
6676    }
6677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6678    pub struct Asgtrgdr_SPEC;
6679    pub type Asgtrgdr = crate::EnumBitfieldStruct<u8, Asgtrgdr_SPEC>;
6680    impl Asgtrgdr {
6681        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGD input"]
6682        pub const _0: Self = Self::new(0);
6683
6684        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGD input"]
6685        pub const _1: Self = Self::new(1);
6686    }
6687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6688    pub struct Asgtrgdf_SPEC;
6689    pub type Asgtrgdf = crate::EnumBitfieldStruct<u8, Asgtrgdf_SPEC>;
6690    impl Asgtrgdf {
6691        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGD input"]
6692        pub const _0: Self = Self::new(0);
6693
6694        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGD input"]
6695        pub const _1: Self = Self::new(1);
6696    }
6697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6698    pub struct Ascarbl_SPEC;
6699    pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
6700    impl Ascarbl {
6701        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6702        pub const _0: Self = Self::new(0);
6703
6704        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6705        pub const _1: Self = Self::new(1);
6706    }
6707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6708    pub struct Ascarbh_SPEC;
6709    pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
6710    impl Ascarbh {
6711        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6712        pub const _0: Self = Self::new(0);
6713
6714        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6715        pub const _1: Self = Self::new(1);
6716    }
6717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6718    pub struct Ascafbl_SPEC;
6719    pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
6720    impl Ascafbl {
6721        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6722        pub const _0: Self = Self::new(0);
6723
6724        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6725        pub const _1: Self = Self::new(1);
6726    }
6727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6728    pub struct Ascafbh_SPEC;
6729    pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
6730    impl Ascafbh {
6731        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6732        pub const _0: Self = Self::new(0);
6733
6734        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6735        pub const _1: Self = Self::new(1);
6736    }
6737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6738    pub struct Ascbral_SPEC;
6739    pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
6740    impl Ascbral {
6741        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6742        pub const _0: Self = Self::new(0);
6743
6744        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6745        pub const _1: Self = Self::new(1);
6746    }
6747    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6748    pub struct Ascbrah_SPEC;
6749    pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
6750    impl Ascbrah {
6751        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6752        pub const _0: Self = Self::new(0);
6753
6754        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6755        pub const _1: Self = Self::new(1);
6756    }
6757    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6758    pub struct Ascbfal_SPEC;
6759    pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
6760    impl Ascbfal {
6761        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6762        pub const _0: Self = Self::new(0);
6763
6764        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6765        pub const _1: Self = Self::new(1);
6766    }
6767    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6768    pub struct Ascbfah_SPEC;
6769    pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
6770    impl Ascbfah {
6771        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6772        pub const _0: Self = Self::new(0);
6773
6774        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6775        pub const _1: Self = Self::new(1);
6776    }
6777    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6778    pub struct Aselca_SPEC;
6779    pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
6780    impl Aselca {
6781        #[doc = "GTCCRA input capture disabled at the ELC_GPTA input"]
6782        pub const _0: Self = Self::new(0);
6783
6784        #[doc = "GTCCRA input capture enabled at the ELC_GPTA input"]
6785        pub const _1: Self = Self::new(1);
6786    }
6787    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6788    pub struct Aselcb_SPEC;
6789    pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
6790    impl Aselcb {
6791        #[doc = "GTCCRA input capture disabled at the ELC_GPTB input"]
6792        pub const _0: Self = Self::new(0);
6793
6794        #[doc = "GTCCRA input capture enabled at the ELC_GPTB input"]
6795        pub const _1: Self = Self::new(1);
6796    }
6797    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6798    pub struct Aselcc_SPEC;
6799    pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
6800    impl Aselcc {
6801        #[doc = "GTCCRA input capture disabled at the ELC_GPTC input"]
6802        pub const _0: Self = Self::new(0);
6803
6804        #[doc = "GTCCRA input capture enabled at the ELC_GPTC input"]
6805        pub const _1: Self = Self::new(1);
6806    }
6807    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6808    pub struct Aselcd_SPEC;
6809    pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
6810    impl Aselcd {
6811        #[doc = "GTCCRA input capture disabled at the ELC_GPTD input"]
6812        pub const _0: Self = Self::new(0);
6813
6814        #[doc = "GTCCRA input capture enabled at the ELC_GPTD input"]
6815        pub const _1: Self = Self::new(1);
6816    }
6817    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6818    pub struct Aselce_SPEC;
6819    pub type Aselce = crate::EnumBitfieldStruct<u8, Aselce_SPEC>;
6820    impl Aselce {
6821        #[doc = "GTCCRA input capture disabled at the ELC_GPTE input"]
6822        pub const _0: Self = Self::new(0);
6823
6824        #[doc = "GTCCRA input capture enabled at the ELC_GPTE input"]
6825        pub const _1: Self = Self::new(1);
6826    }
6827    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6828    pub struct Aselcf_SPEC;
6829    pub type Aselcf = crate::EnumBitfieldStruct<u8, Aselcf_SPEC>;
6830    impl Aselcf {
6831        #[doc = "GTCCRA input capture disabled at the ELC_GPTF input"]
6832        pub const _0: Self = Self::new(0);
6833
6834        #[doc = "GTCCRA input capture enabled at the ELC_GPTF input"]
6835        pub const _1: Self = Self::new(1);
6836    }
6837    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6838    pub struct Aselcg_SPEC;
6839    pub type Aselcg = crate::EnumBitfieldStruct<u8, Aselcg_SPEC>;
6840    impl Aselcg {
6841        #[doc = "GTCCRA input capture disabled at the ELC_GPTG input"]
6842        pub const _0: Self = Self::new(0);
6843
6844        #[doc = "GTCCRA input capture enabled at the ELC_GPTG input"]
6845        pub const _1: Self = Self::new(1);
6846    }
6847    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6848    pub struct Aselch_SPEC;
6849    pub type Aselch = crate::EnumBitfieldStruct<u8, Aselch_SPEC>;
6850    impl Aselch {
6851        #[doc = "GTCCRA input capture disabled at the ELC_GPTH input"]
6852        pub const _0: Self = Self::new(0);
6853
6854        #[doc = "GTCCRA input capture enabled at the ELC_GPTH input"]
6855        pub const _1: Self = Self::new(1);
6856    }
6857}
6858#[doc(hidden)]
6859#[derive(Copy, Clone, Eq, PartialEq)]
6860pub struct Gticbsr_SPEC;
6861impl crate::sealed::RegSpec for Gticbsr_SPEC {
6862    type DataType = u32;
6863}
6864
6865#[doc = "General PWM Timer Input Capture Source Select Register B"]
6866pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
6867
6868impl Gticbsr {
6869    #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
6870    #[inline(always)]
6871    pub fn bsgtrgar(
6872        self,
6873    ) -> crate::common::RegisterField<
6874        0,
6875        0x1,
6876        1,
6877        0,
6878        gticbsr::Bsgtrgar,
6879        gticbsr::Bsgtrgar,
6880        Gticbsr_SPEC,
6881        crate::common::RW,
6882    > {
6883        crate::common::RegisterField::<
6884            0,
6885            0x1,
6886            1,
6887            0,
6888            gticbsr::Bsgtrgar,
6889            gticbsr::Bsgtrgar,
6890            Gticbsr_SPEC,
6891            crate::common::RW,
6892        >::from_register(self, 0)
6893    }
6894
6895    #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
6896    #[inline(always)]
6897    pub fn bsgtrgaf(
6898        self,
6899    ) -> crate::common::RegisterField<
6900        1,
6901        0x1,
6902        1,
6903        0,
6904        gticbsr::Bsgtrgaf,
6905        gticbsr::Bsgtrgaf,
6906        Gticbsr_SPEC,
6907        crate::common::RW,
6908    > {
6909        crate::common::RegisterField::<
6910            1,
6911            0x1,
6912            1,
6913            0,
6914            gticbsr::Bsgtrgaf,
6915            gticbsr::Bsgtrgaf,
6916            Gticbsr_SPEC,
6917            crate::common::RW,
6918        >::from_register(self, 0)
6919    }
6920
6921    #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
6922    #[inline(always)]
6923    pub fn bsgtrgbr(
6924        self,
6925    ) -> crate::common::RegisterField<
6926        2,
6927        0x1,
6928        1,
6929        0,
6930        gticbsr::Bsgtrgbr,
6931        gticbsr::Bsgtrgbr,
6932        Gticbsr_SPEC,
6933        crate::common::RW,
6934    > {
6935        crate::common::RegisterField::<
6936            2,
6937            0x1,
6938            1,
6939            0,
6940            gticbsr::Bsgtrgbr,
6941            gticbsr::Bsgtrgbr,
6942            Gticbsr_SPEC,
6943            crate::common::RW,
6944        >::from_register(self, 0)
6945    }
6946
6947    #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
6948    #[inline(always)]
6949    pub fn bsgtrgbf(
6950        self,
6951    ) -> crate::common::RegisterField<
6952        3,
6953        0x1,
6954        1,
6955        0,
6956        gticbsr::Bsgtrgbf,
6957        gticbsr::Bsgtrgbf,
6958        Gticbsr_SPEC,
6959        crate::common::RW,
6960    > {
6961        crate::common::RegisterField::<
6962            3,
6963            0x1,
6964            1,
6965            0,
6966            gticbsr::Bsgtrgbf,
6967            gticbsr::Bsgtrgbf,
6968            Gticbsr_SPEC,
6969            crate::common::RW,
6970        >::from_register(self, 0)
6971    }
6972
6973    #[doc = "GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable"]
6974    #[inline(always)]
6975    pub fn bsgtrgcr(
6976        self,
6977    ) -> crate::common::RegisterField<
6978        4,
6979        0x1,
6980        1,
6981        0,
6982        gticbsr::Bsgtrgcr,
6983        gticbsr::Bsgtrgcr,
6984        Gticbsr_SPEC,
6985        crate::common::RW,
6986    > {
6987        crate::common::RegisterField::<
6988            4,
6989            0x1,
6990            1,
6991            0,
6992            gticbsr::Bsgtrgcr,
6993            gticbsr::Bsgtrgcr,
6994            Gticbsr_SPEC,
6995            crate::common::RW,
6996        >::from_register(self, 0)
6997    }
6998
6999    #[doc = "GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable"]
7000    #[inline(always)]
7001    pub fn bsgtrgcf(
7002        self,
7003    ) -> crate::common::RegisterField<
7004        5,
7005        0x1,
7006        1,
7007        0,
7008        gticbsr::Bsgtrgcf,
7009        gticbsr::Bsgtrgcf,
7010        Gticbsr_SPEC,
7011        crate::common::RW,
7012    > {
7013        crate::common::RegisterField::<
7014            5,
7015            0x1,
7016            1,
7017            0,
7018            gticbsr::Bsgtrgcf,
7019            gticbsr::Bsgtrgcf,
7020            Gticbsr_SPEC,
7021            crate::common::RW,
7022        >::from_register(self, 0)
7023    }
7024
7025    #[doc = "GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable"]
7026    #[inline(always)]
7027    pub fn bsgtrgdr(
7028        self,
7029    ) -> crate::common::RegisterField<
7030        6,
7031        0x1,
7032        1,
7033        0,
7034        gticbsr::Bsgtrgdr,
7035        gticbsr::Bsgtrgdr,
7036        Gticbsr_SPEC,
7037        crate::common::RW,
7038    > {
7039        crate::common::RegisterField::<
7040            6,
7041            0x1,
7042            1,
7043            0,
7044            gticbsr::Bsgtrgdr,
7045            gticbsr::Bsgtrgdr,
7046            Gticbsr_SPEC,
7047            crate::common::RW,
7048        >::from_register(self, 0)
7049    }
7050
7051    #[doc = "GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable"]
7052    #[inline(always)]
7053    pub fn bsgtrgdf(
7054        self,
7055    ) -> crate::common::RegisterField<
7056        7,
7057        0x1,
7058        1,
7059        0,
7060        gticbsr::Bsgtrgdf,
7061        gticbsr::Bsgtrgdf,
7062        Gticbsr_SPEC,
7063        crate::common::RW,
7064    > {
7065        crate::common::RegisterField::<
7066            7,
7067            0x1,
7068            1,
7069            0,
7070            gticbsr::Bsgtrgdf,
7071            gticbsr::Bsgtrgdf,
7072            Gticbsr_SPEC,
7073            crate::common::RW,
7074        >::from_register(self, 0)
7075    }
7076
7077    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
7078    #[inline(always)]
7079    pub fn bscarbl(
7080        self,
7081    ) -> crate::common::RegisterField<
7082        8,
7083        0x1,
7084        1,
7085        0,
7086        gticbsr::Bscarbl,
7087        gticbsr::Bscarbl,
7088        Gticbsr_SPEC,
7089        crate::common::RW,
7090    > {
7091        crate::common::RegisterField::<
7092            8,
7093            0x1,
7094            1,
7095            0,
7096            gticbsr::Bscarbl,
7097            gticbsr::Bscarbl,
7098            Gticbsr_SPEC,
7099            crate::common::RW,
7100        >::from_register(self, 0)
7101    }
7102
7103    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
7104    #[inline(always)]
7105    pub fn bscarbh(
7106        self,
7107    ) -> crate::common::RegisterField<
7108        9,
7109        0x1,
7110        1,
7111        0,
7112        gticbsr::Bscarbh,
7113        gticbsr::Bscarbh,
7114        Gticbsr_SPEC,
7115        crate::common::RW,
7116    > {
7117        crate::common::RegisterField::<
7118            9,
7119            0x1,
7120            1,
7121            0,
7122            gticbsr::Bscarbh,
7123            gticbsr::Bscarbh,
7124            Gticbsr_SPEC,
7125            crate::common::RW,
7126        >::from_register(self, 0)
7127    }
7128
7129    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
7130    #[inline(always)]
7131    pub fn bscafbl(
7132        self,
7133    ) -> crate::common::RegisterField<
7134        10,
7135        0x1,
7136        1,
7137        0,
7138        gticbsr::Bscafbl,
7139        gticbsr::Bscafbl,
7140        Gticbsr_SPEC,
7141        crate::common::RW,
7142    > {
7143        crate::common::RegisterField::<
7144            10,
7145            0x1,
7146            1,
7147            0,
7148            gticbsr::Bscafbl,
7149            gticbsr::Bscafbl,
7150            Gticbsr_SPEC,
7151            crate::common::RW,
7152        >::from_register(self, 0)
7153    }
7154
7155    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
7156    #[inline(always)]
7157    pub fn bscafbh(
7158        self,
7159    ) -> crate::common::RegisterField<
7160        11,
7161        0x1,
7162        1,
7163        0,
7164        gticbsr::Bscafbh,
7165        gticbsr::Bscafbh,
7166        Gticbsr_SPEC,
7167        crate::common::RW,
7168    > {
7169        crate::common::RegisterField::<
7170            11,
7171            0x1,
7172            1,
7173            0,
7174            gticbsr::Bscafbh,
7175            gticbsr::Bscafbh,
7176            Gticbsr_SPEC,
7177            crate::common::RW,
7178        >::from_register(self, 0)
7179    }
7180
7181    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
7182    #[inline(always)]
7183    pub fn bscbral(
7184        self,
7185    ) -> crate::common::RegisterField<
7186        12,
7187        0x1,
7188        1,
7189        0,
7190        gticbsr::Bscbral,
7191        gticbsr::Bscbral,
7192        Gticbsr_SPEC,
7193        crate::common::RW,
7194    > {
7195        crate::common::RegisterField::<
7196            12,
7197            0x1,
7198            1,
7199            0,
7200            gticbsr::Bscbral,
7201            gticbsr::Bscbral,
7202            Gticbsr_SPEC,
7203            crate::common::RW,
7204        >::from_register(self, 0)
7205    }
7206
7207    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
7208    #[inline(always)]
7209    pub fn bscbrah(
7210        self,
7211    ) -> crate::common::RegisterField<
7212        13,
7213        0x1,
7214        1,
7215        0,
7216        gticbsr::Bscbrah,
7217        gticbsr::Bscbrah,
7218        Gticbsr_SPEC,
7219        crate::common::RW,
7220    > {
7221        crate::common::RegisterField::<
7222            13,
7223            0x1,
7224            1,
7225            0,
7226            gticbsr::Bscbrah,
7227            gticbsr::Bscbrah,
7228            Gticbsr_SPEC,
7229            crate::common::RW,
7230        >::from_register(self, 0)
7231    }
7232
7233    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
7234    #[inline(always)]
7235    pub fn bscbfal(
7236        self,
7237    ) -> crate::common::RegisterField<
7238        14,
7239        0x1,
7240        1,
7241        0,
7242        gticbsr::Bscbfal,
7243        gticbsr::Bscbfal,
7244        Gticbsr_SPEC,
7245        crate::common::RW,
7246    > {
7247        crate::common::RegisterField::<
7248            14,
7249            0x1,
7250            1,
7251            0,
7252            gticbsr::Bscbfal,
7253            gticbsr::Bscbfal,
7254            Gticbsr_SPEC,
7255            crate::common::RW,
7256        >::from_register(self, 0)
7257    }
7258
7259    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
7260    #[inline(always)]
7261    pub fn bscbfah(
7262        self,
7263    ) -> crate::common::RegisterField<
7264        15,
7265        0x1,
7266        1,
7267        0,
7268        gticbsr::Bscbfah,
7269        gticbsr::Bscbfah,
7270        Gticbsr_SPEC,
7271        crate::common::RW,
7272    > {
7273        crate::common::RegisterField::<
7274            15,
7275            0x1,
7276            1,
7277            0,
7278            gticbsr::Bscbfah,
7279            gticbsr::Bscbfah,
7280            Gticbsr_SPEC,
7281            crate::common::RW,
7282        >::from_register(self, 0)
7283    }
7284
7285    #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
7286    #[inline(always)]
7287    pub fn bselca(
7288        self,
7289    ) -> crate::common::RegisterField<
7290        16,
7291        0x1,
7292        1,
7293        0,
7294        gticbsr::Bselca,
7295        gticbsr::Bselca,
7296        Gticbsr_SPEC,
7297        crate::common::RW,
7298    > {
7299        crate::common::RegisterField::<
7300            16,
7301            0x1,
7302            1,
7303            0,
7304            gticbsr::Bselca,
7305            gticbsr::Bselca,
7306            Gticbsr_SPEC,
7307            crate::common::RW,
7308        >::from_register(self, 0)
7309    }
7310
7311    #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
7312    #[inline(always)]
7313    pub fn bselcb(
7314        self,
7315    ) -> crate::common::RegisterField<
7316        17,
7317        0x1,
7318        1,
7319        0,
7320        gticbsr::Bselcb,
7321        gticbsr::Bselcb,
7322        Gticbsr_SPEC,
7323        crate::common::RW,
7324    > {
7325        crate::common::RegisterField::<
7326            17,
7327            0x1,
7328            1,
7329            0,
7330            gticbsr::Bselcb,
7331            gticbsr::Bselcb,
7332            Gticbsr_SPEC,
7333            crate::common::RW,
7334        >::from_register(self, 0)
7335    }
7336
7337    #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
7338    #[inline(always)]
7339    pub fn bselcc(
7340        self,
7341    ) -> crate::common::RegisterField<
7342        18,
7343        0x1,
7344        1,
7345        0,
7346        gticbsr::Bselcc,
7347        gticbsr::Bselcc,
7348        Gticbsr_SPEC,
7349        crate::common::RW,
7350    > {
7351        crate::common::RegisterField::<
7352            18,
7353            0x1,
7354            1,
7355            0,
7356            gticbsr::Bselcc,
7357            gticbsr::Bselcc,
7358            Gticbsr_SPEC,
7359            crate::common::RW,
7360        >::from_register(self, 0)
7361    }
7362
7363    #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
7364    #[inline(always)]
7365    pub fn bselcd(
7366        self,
7367    ) -> crate::common::RegisterField<
7368        19,
7369        0x1,
7370        1,
7371        0,
7372        gticbsr::Bselcd,
7373        gticbsr::Bselcd,
7374        Gticbsr_SPEC,
7375        crate::common::RW,
7376    > {
7377        crate::common::RegisterField::<
7378            19,
7379            0x1,
7380            1,
7381            0,
7382            gticbsr::Bselcd,
7383            gticbsr::Bselcd,
7384            Gticbsr_SPEC,
7385            crate::common::RW,
7386        >::from_register(self, 0)
7387    }
7388
7389    #[doc = "ELC_GPTE Event Source GTCCRB Input Capture Enable"]
7390    #[inline(always)]
7391    pub fn bselce(
7392        self,
7393    ) -> crate::common::RegisterField<
7394        20,
7395        0x1,
7396        1,
7397        0,
7398        gticbsr::Bselce,
7399        gticbsr::Bselce,
7400        Gticbsr_SPEC,
7401        crate::common::RW,
7402    > {
7403        crate::common::RegisterField::<
7404            20,
7405            0x1,
7406            1,
7407            0,
7408            gticbsr::Bselce,
7409            gticbsr::Bselce,
7410            Gticbsr_SPEC,
7411            crate::common::RW,
7412        >::from_register(self, 0)
7413    }
7414
7415    #[doc = "ELC_GPTF Event Source GTCCRB Input Capture Enable"]
7416    #[inline(always)]
7417    pub fn bselcf(
7418        self,
7419    ) -> crate::common::RegisterField<
7420        21,
7421        0x1,
7422        1,
7423        0,
7424        gticbsr::Bselcf,
7425        gticbsr::Bselcf,
7426        Gticbsr_SPEC,
7427        crate::common::RW,
7428    > {
7429        crate::common::RegisterField::<
7430            21,
7431            0x1,
7432            1,
7433            0,
7434            gticbsr::Bselcf,
7435            gticbsr::Bselcf,
7436            Gticbsr_SPEC,
7437            crate::common::RW,
7438        >::from_register(self, 0)
7439    }
7440
7441    #[doc = "ELC_GPTG Event Source GTCCRB Input Capture Enable"]
7442    #[inline(always)]
7443    pub fn bselcg(
7444        self,
7445    ) -> crate::common::RegisterField<
7446        22,
7447        0x1,
7448        1,
7449        0,
7450        gticbsr::Bselcg,
7451        gticbsr::Bselcg,
7452        Gticbsr_SPEC,
7453        crate::common::RW,
7454    > {
7455        crate::common::RegisterField::<
7456            22,
7457            0x1,
7458            1,
7459            0,
7460            gticbsr::Bselcg,
7461            gticbsr::Bselcg,
7462            Gticbsr_SPEC,
7463            crate::common::RW,
7464        >::from_register(self, 0)
7465    }
7466
7467    #[doc = "ELC_GPTH Event Source GTCCRB Input Capture Enable"]
7468    #[inline(always)]
7469    pub fn bselch(
7470        self,
7471    ) -> crate::common::RegisterField<
7472        23,
7473        0x1,
7474        1,
7475        0,
7476        gticbsr::Bselch,
7477        gticbsr::Bselch,
7478        Gticbsr_SPEC,
7479        crate::common::RW,
7480    > {
7481        crate::common::RegisterField::<
7482            23,
7483            0x1,
7484            1,
7485            0,
7486            gticbsr::Bselch,
7487            gticbsr::Bselch,
7488            Gticbsr_SPEC,
7489            crate::common::RW,
7490        >::from_register(self, 0)
7491    }
7492}
7493impl ::core::default::Default for Gticbsr {
7494    #[inline(always)]
7495    fn default() -> Gticbsr {
7496        <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
7497    }
7498}
7499pub mod gticbsr {
7500
7501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7502    pub struct Bsgtrgar_SPEC;
7503    pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
7504    impl Bsgtrgar {
7505        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGA input"]
7506        pub const _0: Self = Self::new(0);
7507
7508        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGA input"]
7509        pub const _1: Self = Self::new(1);
7510    }
7511    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7512    pub struct Bsgtrgaf_SPEC;
7513    pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
7514    impl Bsgtrgaf {
7515        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGA input"]
7516        pub const _0: Self = Self::new(0);
7517
7518        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGA input"]
7519        pub const _1: Self = Self::new(1);
7520    }
7521    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7522    pub struct Bsgtrgbr_SPEC;
7523    pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
7524    impl Bsgtrgbr {
7525        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGB input"]
7526        pub const _0: Self = Self::new(0);
7527
7528        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGB input"]
7529        pub const _1: Self = Self::new(1);
7530    }
7531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7532    pub struct Bsgtrgbf_SPEC;
7533    pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
7534    impl Bsgtrgbf {
7535        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGB input"]
7536        pub const _0: Self = Self::new(0);
7537
7538        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGB input"]
7539        pub const _1: Self = Self::new(1);
7540    }
7541    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7542    pub struct Bsgtrgcr_SPEC;
7543    pub type Bsgtrgcr = crate::EnumBitfieldStruct<u8, Bsgtrgcr_SPEC>;
7544    impl Bsgtrgcr {
7545        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGC input"]
7546        pub const _0: Self = Self::new(0);
7547
7548        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGC input"]
7549        pub const _1: Self = Self::new(1);
7550    }
7551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7552    pub struct Bsgtrgcf_SPEC;
7553    pub type Bsgtrgcf = crate::EnumBitfieldStruct<u8, Bsgtrgcf_SPEC>;
7554    impl Bsgtrgcf {
7555        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGC input"]
7556        pub const _0: Self = Self::new(0);
7557
7558        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGC input"]
7559        pub const _1: Self = Self::new(1);
7560    }
7561    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7562    pub struct Bsgtrgdr_SPEC;
7563    pub type Bsgtrgdr = crate::EnumBitfieldStruct<u8, Bsgtrgdr_SPEC>;
7564    impl Bsgtrgdr {
7565        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGD input"]
7566        pub const _0: Self = Self::new(0);
7567
7568        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGD input"]
7569        pub const _1: Self = Self::new(1);
7570    }
7571    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7572    pub struct Bsgtrgdf_SPEC;
7573    pub type Bsgtrgdf = crate::EnumBitfieldStruct<u8, Bsgtrgdf_SPEC>;
7574    impl Bsgtrgdf {
7575        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGD input"]
7576        pub const _0: Self = Self::new(0);
7577
7578        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGD input"]
7579        pub const _1: Self = Self::new(1);
7580    }
7581    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7582    pub struct Bscarbl_SPEC;
7583    pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
7584    impl Bscarbl {
7585        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7586        pub const _0: Self = Self::new(0);
7587
7588        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7589        pub const _1: Self = Self::new(1);
7590    }
7591    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7592    pub struct Bscarbh_SPEC;
7593    pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
7594    impl Bscarbh {
7595        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7596        pub const _0: Self = Self::new(0);
7597
7598        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7599        pub const _1: Self = Self::new(1);
7600    }
7601    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7602    pub struct Bscafbl_SPEC;
7603    pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
7604    impl Bscafbl {
7605        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7606        pub const _0: Self = Self::new(0);
7607
7608        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7609        pub const _1: Self = Self::new(1);
7610    }
7611    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7612    pub struct Bscafbh_SPEC;
7613    pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
7614    impl Bscafbh {
7615        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7616        pub const _0: Self = Self::new(0);
7617
7618        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7619        pub const _1: Self = Self::new(1);
7620    }
7621    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7622    pub struct Bscbral_SPEC;
7623    pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
7624    impl Bscbral {
7625        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7626        pub const _0: Self = Self::new(0);
7627
7628        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7629        pub const _1: Self = Self::new(1);
7630    }
7631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7632    pub struct Bscbrah_SPEC;
7633    pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
7634    impl Bscbrah {
7635        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7636        pub const _0: Self = Self::new(0);
7637
7638        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7639        pub const _1: Self = Self::new(1);
7640    }
7641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7642    pub struct Bscbfal_SPEC;
7643    pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
7644    impl Bscbfal {
7645        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7646        pub const _0: Self = Self::new(0);
7647
7648        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7649        pub const _1: Self = Self::new(1);
7650    }
7651    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7652    pub struct Bscbfah_SPEC;
7653    pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
7654    impl Bscbfah {
7655        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7656        pub const _0: Self = Self::new(0);
7657
7658        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7659        pub const _1: Self = Self::new(1);
7660    }
7661    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7662    pub struct Bselca_SPEC;
7663    pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
7664    impl Bselca {
7665        #[doc = "GTCCRB input capture disabled at the ELC_GPTA input"]
7666        pub const _0: Self = Self::new(0);
7667
7668        #[doc = "GTCCRB input capture enabled at the ELC_GPTA input"]
7669        pub const _1: Self = Self::new(1);
7670    }
7671    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7672    pub struct Bselcb_SPEC;
7673    pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
7674    impl Bselcb {
7675        #[doc = "GTCCRB input capture disabled at the ELC_GPTB input"]
7676        pub const _0: Self = Self::new(0);
7677
7678        #[doc = "GTCCRB input capture enabled at the ELC_GPTB input"]
7679        pub const _1: Self = Self::new(1);
7680    }
7681    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7682    pub struct Bselcc_SPEC;
7683    pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
7684    impl Bselcc {
7685        #[doc = "GTCCRB input capture disabled at the ELC_GPTC input"]
7686        pub const _0: Self = Self::new(0);
7687
7688        #[doc = "GTCCRB input capture enabled at the ELC_GPTC input"]
7689        pub const _1: Self = Self::new(1);
7690    }
7691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7692    pub struct Bselcd_SPEC;
7693    pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
7694    impl Bselcd {
7695        #[doc = "GTCCRB input capture disabled at the ELC_GPTD input"]
7696        pub const _0: Self = Self::new(0);
7697
7698        #[doc = "GTCCRB input capture enabled at the ELC_GPTD input"]
7699        pub const _1: Self = Self::new(1);
7700    }
7701    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7702    pub struct Bselce_SPEC;
7703    pub type Bselce = crate::EnumBitfieldStruct<u8, Bselce_SPEC>;
7704    impl Bselce {
7705        #[doc = "GTCCRB input capture disabled at the ELC_GPTE input"]
7706        pub const _0: Self = Self::new(0);
7707
7708        #[doc = "GTCCRB input capture enabled at the ELC_GPTE input"]
7709        pub const _1: Self = Self::new(1);
7710    }
7711    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7712    pub struct Bselcf_SPEC;
7713    pub type Bselcf = crate::EnumBitfieldStruct<u8, Bselcf_SPEC>;
7714    impl Bselcf {
7715        #[doc = "GTCCRB input capture disabled at the ELC_GPTF input"]
7716        pub const _0: Self = Self::new(0);
7717
7718        #[doc = "GTCCRB input capture enabled at the ELC_GPTF input"]
7719        pub const _1: Self = Self::new(1);
7720    }
7721    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7722    pub struct Bselcg_SPEC;
7723    pub type Bselcg = crate::EnumBitfieldStruct<u8, Bselcg_SPEC>;
7724    impl Bselcg {
7725        #[doc = "GTCCRB input capture disabled at the ELC_GPTG input"]
7726        pub const _0: Self = Self::new(0);
7727
7728        #[doc = "GTCCRB input capture enabled at the ELC_GPTG input"]
7729        pub const _1: Self = Self::new(1);
7730    }
7731    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7732    pub struct Bselch_SPEC;
7733    pub type Bselch = crate::EnumBitfieldStruct<u8, Bselch_SPEC>;
7734    impl Bselch {
7735        #[doc = "GTCCRB input capture disabled at the ELC_GPTH input"]
7736        pub const _0: Self = Self::new(0);
7737
7738        #[doc = "GTCCRB input capture enabled at the ELC_GPTH input"]
7739        pub const _1: Self = Self::new(1);
7740    }
7741}
7742#[doc(hidden)]
7743#[derive(Copy, Clone, Eq, PartialEq)]
7744pub struct Gtcr_SPEC;
7745impl crate::sealed::RegSpec for Gtcr_SPEC {
7746    type DataType = u32;
7747}
7748
7749#[doc = "General PWM Timer Control Register"]
7750pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
7751
7752impl Gtcr {
7753    #[doc = "Count Start"]
7754    #[inline(always)]
7755    pub fn cst(
7756        self,
7757    ) -> crate::common::RegisterField<
7758        0,
7759        0x1,
7760        1,
7761        0,
7762        gtcr::Cst,
7763        gtcr::Cst,
7764        Gtcr_SPEC,
7765        crate::common::RW,
7766    > {
7767        crate::common::RegisterField::<
7768            0,
7769            0x1,
7770            1,
7771            0,
7772            gtcr::Cst,
7773            gtcr::Cst,
7774            Gtcr_SPEC,
7775            crate::common::RW,
7776        >::from_register(self, 0)
7777    }
7778
7779    #[doc = "Mode Select"]
7780    #[inline(always)]
7781    pub fn md(
7782        self,
7783    ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
7784    {
7785        crate::common::RegisterField::<
7786            16,
7787            0x7,
7788            1,
7789            0,
7790            gtcr::Md,
7791            gtcr::Md,
7792            Gtcr_SPEC,
7793            crate::common::RW,
7794        >::from_register(self, 0)
7795    }
7796
7797    #[doc = "Timer Prescaler Select"]
7798    #[inline(always)]
7799    pub fn tpcs(
7800        self,
7801    ) -> crate::common::RegisterField<
7802        23,
7803        0xf,
7804        1,
7805        0,
7806        gtcr::Tpcs,
7807        gtcr::Tpcs,
7808        Gtcr_SPEC,
7809        crate::common::RW,
7810    > {
7811        crate::common::RegisterField::<
7812            23,
7813            0xf,
7814            1,
7815            0,
7816            gtcr::Tpcs,
7817            gtcr::Tpcs,
7818            Gtcr_SPEC,
7819            crate::common::RW,
7820        >::from_register(self, 0)
7821    }
7822}
7823impl ::core::default::Default for Gtcr {
7824    #[inline(always)]
7825    fn default() -> Gtcr {
7826        <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
7827    }
7828}
7829pub mod gtcr {
7830
7831    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7832    pub struct Cst_SPEC;
7833    pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
7834    impl Cst {
7835        #[doc = "Count operation is stopped"]
7836        pub const _0: Self = Self::new(0);
7837
7838        #[doc = "Count operation is performed"]
7839        pub const _1: Self = Self::new(1);
7840    }
7841    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7842    pub struct Md_SPEC;
7843    pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
7844    impl Md {
7845        #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
7846        pub const _000: Self = Self::new(0);
7847
7848        #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
7849        pub const _001: Self = Self::new(1);
7850
7851        #[doc = "Setting prohibited"]
7852        pub const _010: Self = Self::new(2);
7853
7854        #[doc = "Setting prohibited"]
7855        pub const _011: Self = Self::new(3);
7856
7857        #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at trough) (single buffer or double buffer is possible)"]
7858        pub const _100: Self = Self::new(4);
7859
7860        #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer is possible)"]
7861        pub const _101: Self = Self::new(5);
7862
7863        #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) (fixed buffer operation)"]
7864        pub const _110: Self = Self::new(6);
7865
7866        #[doc = "Setting prohibited"]
7867        pub const _111: Self = Self::new(7);
7868    }
7869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7870    pub struct Tpcs_SPEC;
7871    pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
7872    impl Tpcs {
7873        #[doc = "PCLKD/1"]
7874        pub const _0_X_0: Self = Self::new(0);
7875
7876        #[doc = "PCLKD/2"]
7877        pub const _0_X_1: Self = Self::new(1);
7878
7879        #[doc = "PCLKD/4"]
7880        pub const _0_X_2: Self = Self::new(2);
7881
7882        #[doc = "PCLKD/8"]
7883        pub const _0_X_3: Self = Self::new(3);
7884
7885        #[doc = "PCLKD/16"]
7886        pub const _0_X_4: Self = Self::new(4);
7887
7888        #[doc = "PCLKD/32"]
7889        pub const _0_X_5: Self = Self::new(5);
7890
7891        #[doc = "PCLKD/64"]
7892        pub const _0_X_6: Self = Self::new(6);
7893
7894        #[doc = "Setting prohibited"]
7895        pub const _0_X_7: Self = Self::new(7);
7896
7897        #[doc = "PCLKD/256"]
7898        pub const _0_X_8: Self = Self::new(8);
7899
7900        #[doc = "Setting prohibited"]
7901        pub const _0_X_9: Self = Self::new(9);
7902
7903        #[doc = "PCLKD/1024"]
7904        pub const _0_X_A: Self = Self::new(10);
7905
7906        #[doc = "Setting prohibited"]
7907        pub const _0_X_B: Self = Self::new(11);
7908
7909        #[doc = "GTETRGA (Via the POEG)"]
7910        pub const _0_X_C: Self = Self::new(12);
7911
7912        #[doc = "GTETRGB (Via the POEG)"]
7913        pub const _0_X_D: Self = Self::new(13);
7914
7915        #[doc = "GTETRGC (Via the POEG)"]
7916        pub const _0_X_E: Self = Self::new(14);
7917
7918        #[doc = "GTETRGD (Via the POEG)"]
7919        pub const _0_X_F: Self = Self::new(15);
7920    }
7921}
7922#[doc(hidden)]
7923#[derive(Copy, Clone, Eq, PartialEq)]
7924pub struct Gtuddtyc_SPEC;
7925impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
7926    type DataType = u32;
7927}
7928
7929#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
7930pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
7931
7932impl Gtuddtyc {
7933    #[doc = "Count Direction Setting"]
7934    #[inline(always)]
7935    pub fn ud(
7936        self,
7937    ) -> crate::common::RegisterField<
7938        0,
7939        0x1,
7940        1,
7941        0,
7942        gtuddtyc::Ud,
7943        gtuddtyc::Ud,
7944        Gtuddtyc_SPEC,
7945        crate::common::RW,
7946    > {
7947        crate::common::RegisterField::<
7948            0,
7949            0x1,
7950            1,
7951            0,
7952            gtuddtyc::Ud,
7953            gtuddtyc::Ud,
7954            Gtuddtyc_SPEC,
7955            crate::common::RW,
7956        >::from_register(self, 0)
7957    }
7958
7959    #[doc = "Forcible Count Direction Setting"]
7960    #[inline(always)]
7961    pub fn udf(
7962        self,
7963    ) -> crate::common::RegisterField<
7964        1,
7965        0x1,
7966        1,
7967        0,
7968        gtuddtyc::Udf,
7969        gtuddtyc::Udf,
7970        Gtuddtyc_SPEC,
7971        crate::common::RW,
7972    > {
7973        crate::common::RegisterField::<
7974            1,
7975            0x1,
7976            1,
7977            0,
7978            gtuddtyc::Udf,
7979            gtuddtyc::Udf,
7980            Gtuddtyc_SPEC,
7981            crate::common::RW,
7982        >::from_register(self, 0)
7983    }
7984
7985    #[doc = "GTIOCnA Output Duty Setting"]
7986    #[inline(always)]
7987    pub fn oadty(
7988        self,
7989    ) -> crate::common::RegisterField<
7990        16,
7991        0x3,
7992        1,
7993        0,
7994        gtuddtyc::Oadty,
7995        gtuddtyc::Oadty,
7996        Gtuddtyc_SPEC,
7997        crate::common::RW,
7998    > {
7999        crate::common::RegisterField::<
8000            16,
8001            0x3,
8002            1,
8003            0,
8004            gtuddtyc::Oadty,
8005            gtuddtyc::Oadty,
8006            Gtuddtyc_SPEC,
8007            crate::common::RW,
8008        >::from_register(self, 0)
8009    }
8010
8011    #[doc = "Forcible GTIOCnA Output Duty Setting"]
8012    #[inline(always)]
8013    pub fn oadtyf(
8014        self,
8015    ) -> crate::common::RegisterField<
8016        18,
8017        0x1,
8018        1,
8019        0,
8020        gtuddtyc::Oadtyf,
8021        gtuddtyc::Oadtyf,
8022        Gtuddtyc_SPEC,
8023        crate::common::RW,
8024    > {
8025        crate::common::RegisterField::<
8026            18,
8027            0x1,
8028            1,
8029            0,
8030            gtuddtyc::Oadtyf,
8031            gtuddtyc::Oadtyf,
8032            Gtuddtyc_SPEC,
8033            crate::common::RW,
8034        >::from_register(self, 0)
8035    }
8036
8037    #[doc = "GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting"]
8038    #[inline(always)]
8039    pub fn oadtyr(
8040        self,
8041    ) -> crate::common::RegisterField<
8042        19,
8043        0x1,
8044        1,
8045        0,
8046        gtuddtyc::Oadtyr,
8047        gtuddtyc::Oadtyr,
8048        Gtuddtyc_SPEC,
8049        crate::common::RW,
8050    > {
8051        crate::common::RegisterField::<
8052            19,
8053            0x1,
8054            1,
8055            0,
8056            gtuddtyc::Oadtyr,
8057            gtuddtyc::Oadtyr,
8058            Gtuddtyc_SPEC,
8059            crate::common::RW,
8060        >::from_register(self, 0)
8061    }
8062
8063    #[doc = "GTIOCnB Output Duty Setting"]
8064    #[inline(always)]
8065    pub fn obdty(
8066        self,
8067    ) -> crate::common::RegisterField<
8068        24,
8069        0x3,
8070        1,
8071        0,
8072        gtuddtyc::Obdty,
8073        gtuddtyc::Obdty,
8074        Gtuddtyc_SPEC,
8075        crate::common::RW,
8076    > {
8077        crate::common::RegisterField::<
8078            24,
8079            0x3,
8080            1,
8081            0,
8082            gtuddtyc::Obdty,
8083            gtuddtyc::Obdty,
8084            Gtuddtyc_SPEC,
8085            crate::common::RW,
8086        >::from_register(self, 0)
8087    }
8088
8089    #[doc = "Forcible GTIOCnB Output Duty Setting"]
8090    #[inline(always)]
8091    pub fn obdtyf(
8092        self,
8093    ) -> crate::common::RegisterField<
8094        26,
8095        0x1,
8096        1,
8097        0,
8098        gtuddtyc::Obdtyf,
8099        gtuddtyc::Obdtyf,
8100        Gtuddtyc_SPEC,
8101        crate::common::RW,
8102    > {
8103        crate::common::RegisterField::<
8104            26,
8105            0x1,
8106            1,
8107            0,
8108            gtuddtyc::Obdtyf,
8109            gtuddtyc::Obdtyf,
8110            Gtuddtyc_SPEC,
8111            crate::common::RW,
8112        >::from_register(self, 0)
8113    }
8114
8115    #[doc = "GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting"]
8116    #[inline(always)]
8117    pub fn obdtyr(
8118        self,
8119    ) -> crate::common::RegisterField<
8120        27,
8121        0x1,
8122        1,
8123        0,
8124        gtuddtyc::Obdtyr,
8125        gtuddtyc::Obdtyr,
8126        Gtuddtyc_SPEC,
8127        crate::common::RW,
8128    > {
8129        crate::common::RegisterField::<
8130            27,
8131            0x1,
8132            1,
8133            0,
8134            gtuddtyc::Obdtyr,
8135            gtuddtyc::Obdtyr,
8136            Gtuddtyc_SPEC,
8137            crate::common::RW,
8138        >::from_register(self, 0)
8139    }
8140}
8141impl ::core::default::Default for Gtuddtyc {
8142    #[inline(always)]
8143    fn default() -> Gtuddtyc {
8144        <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
8145    }
8146}
8147pub mod gtuddtyc {
8148
8149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8150    pub struct Ud_SPEC;
8151    pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
8152    impl Ud {
8153        #[doc = "GTCNT counts down"]
8154        pub const _0: Self = Self::new(0);
8155
8156        #[doc = "GTCNT counts up"]
8157        pub const _1: Self = Self::new(1);
8158    }
8159    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8160    pub struct Udf_SPEC;
8161    pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
8162    impl Udf {
8163        #[doc = "Not forcibly set"]
8164        pub const _0: Self = Self::new(0);
8165
8166        #[doc = "Forcibly set"]
8167        pub const _1: Self = Self::new(1);
8168    }
8169    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8170    pub struct Oadty_SPEC;
8171    pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
8172    impl Oadty {
8173        #[doc = "GTIOCnA pin duty depends on the compare match"]
8174        pub const _00: Self = Self::new(0);
8175
8176        #[doc = "GTIOCnA pin duty depends on the compare match"]
8177        pub const _01: Self = Self::new(1);
8178
8179        #[doc = "GTIOCnA pin duty 0%"]
8180        pub const _10: Self = Self::new(2);
8181
8182        #[doc = "GTIOCnA pin duty 100%"]
8183        pub const _11: Self = Self::new(3);
8184    }
8185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8186    pub struct Oadtyf_SPEC;
8187    pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
8188    impl Oadtyf {
8189        #[doc = "Not forcibly set"]
8190        pub const _0: Self = Self::new(0);
8191
8192        #[doc = "Forcibly set"]
8193        pub const _1: Self = Self::new(1);
8194    }
8195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8196    pub struct Oadtyr_SPEC;
8197    pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
8198    impl Oadtyr {
8199        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
8200        pub const _0: Self = Self::new(0);
8201
8202        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
8203        pub const _1: Self = Self::new(1);
8204    }
8205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8206    pub struct Obdty_SPEC;
8207    pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
8208    impl Obdty {
8209        #[doc = "GTIOCnB pin duty depends on the compare match"]
8210        pub const _00: Self = Self::new(0);
8211
8212        #[doc = "GTIOCnB pin duty depends on the compare match"]
8213        pub const _01: Self = Self::new(1);
8214
8215        #[doc = "GTIOCnB pin duty 0%"]
8216        pub const _10: Self = Self::new(2);
8217
8218        #[doc = "GTIOCnB pin duty 100%"]
8219        pub const _11: Self = Self::new(3);
8220    }
8221    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8222    pub struct Obdtyf_SPEC;
8223    pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
8224    impl Obdtyf {
8225        #[doc = "Not forcibly set"]
8226        pub const _0: Self = Self::new(0);
8227
8228        #[doc = "Forcibly set"]
8229        pub const _1: Self = Self::new(1);
8230    }
8231    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8232    pub struct Obdtyr_SPEC;
8233    pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
8234    impl Obdtyr {
8235        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
8236        pub const _0: Self = Self::new(0);
8237
8238        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
8239        pub const _1: Self = Self::new(1);
8240    }
8241}
8242#[doc(hidden)]
8243#[derive(Copy, Clone, Eq, PartialEq)]
8244pub struct Gtior_SPEC;
8245impl crate::sealed::RegSpec for Gtior_SPEC {
8246    type DataType = u32;
8247}
8248
8249#[doc = "General PWM Timer I/O Control Register"]
8250pub type Gtior = crate::RegValueT<Gtior_SPEC>;
8251
8252impl Gtior {
8253    #[doc = "GTIOCnA Pin Function Select"]
8254    #[inline(always)]
8255    pub fn gtioa(
8256        self,
8257    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8258        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8259    }
8260
8261    #[doc = "GTIOCnA Pin Output Value Setting at the Count Stop"]
8262    #[inline(always)]
8263    pub fn oadflt(
8264        self,
8265    ) -> crate::common::RegisterField<
8266        6,
8267        0x1,
8268        1,
8269        0,
8270        gtior::Oadflt,
8271        gtior::Oadflt,
8272        Gtior_SPEC,
8273        crate::common::RW,
8274    > {
8275        crate::common::RegisterField::<
8276            6,
8277            0x1,
8278            1,
8279            0,
8280            gtior::Oadflt,
8281            gtior::Oadflt,
8282            Gtior_SPEC,
8283            crate::common::RW,
8284        >::from_register(self, 0)
8285    }
8286
8287    #[doc = "GTIOCnA Pin Output Setting at the Start/Stop Count"]
8288    #[inline(always)]
8289    pub fn oahld(
8290        self,
8291    ) -> crate::common::RegisterField<
8292        7,
8293        0x1,
8294        1,
8295        0,
8296        gtior::Oahld,
8297        gtior::Oahld,
8298        Gtior_SPEC,
8299        crate::common::RW,
8300    > {
8301        crate::common::RegisterField::<
8302            7,
8303            0x1,
8304            1,
8305            0,
8306            gtior::Oahld,
8307            gtior::Oahld,
8308            Gtior_SPEC,
8309            crate::common::RW,
8310        >::from_register(self, 0)
8311    }
8312
8313    #[doc = "GTIOCnA Pin Output Enable"]
8314    #[inline(always)]
8315    pub fn oae(
8316        self,
8317    ) -> crate::common::RegisterField<
8318        8,
8319        0x1,
8320        1,
8321        0,
8322        gtior::Oae,
8323        gtior::Oae,
8324        Gtior_SPEC,
8325        crate::common::RW,
8326    > {
8327        crate::common::RegisterField::<
8328            8,
8329            0x1,
8330            1,
8331            0,
8332            gtior::Oae,
8333            gtior::Oae,
8334            Gtior_SPEC,
8335            crate::common::RW,
8336        >::from_register(self, 0)
8337    }
8338
8339    #[doc = "GTIOCnA Pin Disable Value Setting"]
8340    #[inline(always)]
8341    pub fn oadf(
8342        self,
8343    ) -> crate::common::RegisterField<
8344        9,
8345        0x3,
8346        1,
8347        0,
8348        gtior::Oadf,
8349        gtior::Oadf,
8350        Gtior_SPEC,
8351        crate::common::RW,
8352    > {
8353        crate::common::RegisterField::<
8354            9,
8355            0x3,
8356            1,
8357            0,
8358            gtior::Oadf,
8359            gtior::Oadf,
8360            Gtior_SPEC,
8361            crate::common::RW,
8362        >::from_register(self, 0)
8363    }
8364
8365    #[doc = "Noise Filter A Enable"]
8366    #[inline(always)]
8367    pub fn nfaen(
8368        self,
8369    ) -> crate::common::RegisterField<
8370        13,
8371        0x1,
8372        1,
8373        0,
8374        gtior::Nfaen,
8375        gtior::Nfaen,
8376        Gtior_SPEC,
8377        crate::common::RW,
8378    > {
8379        crate::common::RegisterField::<
8380            13,
8381            0x1,
8382            1,
8383            0,
8384            gtior::Nfaen,
8385            gtior::Nfaen,
8386            Gtior_SPEC,
8387            crate::common::RW,
8388        >::from_register(self, 0)
8389    }
8390
8391    #[doc = "Noise Filter A Sampling Clock Select"]
8392    #[inline(always)]
8393    pub fn nfcsa(
8394        self,
8395    ) -> crate::common::RegisterField<
8396        14,
8397        0x3,
8398        1,
8399        0,
8400        gtior::Nfcsa,
8401        gtior::Nfcsa,
8402        Gtior_SPEC,
8403        crate::common::RW,
8404    > {
8405        crate::common::RegisterField::<
8406            14,
8407            0x3,
8408            1,
8409            0,
8410            gtior::Nfcsa,
8411            gtior::Nfcsa,
8412            Gtior_SPEC,
8413            crate::common::RW,
8414        >::from_register(self, 0)
8415    }
8416
8417    #[doc = "GTIOCnB Pin Function Select"]
8418    #[inline(always)]
8419    pub fn gtiob(
8420        self,
8421    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8422        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8423    }
8424
8425    #[doc = "GTIOCnB Pin Output Value Setting at the Count Stop"]
8426    #[inline(always)]
8427    pub fn obdflt(
8428        self,
8429    ) -> crate::common::RegisterField<
8430        22,
8431        0x1,
8432        1,
8433        0,
8434        gtior::Obdflt,
8435        gtior::Obdflt,
8436        Gtior_SPEC,
8437        crate::common::RW,
8438    > {
8439        crate::common::RegisterField::<
8440            22,
8441            0x1,
8442            1,
8443            0,
8444            gtior::Obdflt,
8445            gtior::Obdflt,
8446            Gtior_SPEC,
8447            crate::common::RW,
8448        >::from_register(self, 0)
8449    }
8450
8451    #[doc = "GTIOCnB Pin Output Setting at the Start/Stop Count"]
8452    #[inline(always)]
8453    pub fn obhld(
8454        self,
8455    ) -> crate::common::RegisterField<
8456        23,
8457        0x1,
8458        1,
8459        0,
8460        gtior::Obhld,
8461        gtior::Obhld,
8462        Gtior_SPEC,
8463        crate::common::RW,
8464    > {
8465        crate::common::RegisterField::<
8466            23,
8467            0x1,
8468            1,
8469            0,
8470            gtior::Obhld,
8471            gtior::Obhld,
8472            Gtior_SPEC,
8473            crate::common::RW,
8474        >::from_register(self, 0)
8475    }
8476
8477    #[doc = "GTIOCnB Pin Output Enable"]
8478    #[inline(always)]
8479    pub fn obe(
8480        self,
8481    ) -> crate::common::RegisterField<
8482        24,
8483        0x1,
8484        1,
8485        0,
8486        gtior::Obe,
8487        gtior::Obe,
8488        Gtior_SPEC,
8489        crate::common::RW,
8490    > {
8491        crate::common::RegisterField::<
8492            24,
8493            0x1,
8494            1,
8495            0,
8496            gtior::Obe,
8497            gtior::Obe,
8498            Gtior_SPEC,
8499            crate::common::RW,
8500        >::from_register(self, 0)
8501    }
8502
8503    #[doc = "GTIOCnB Pin Disable Value Setting"]
8504    #[inline(always)]
8505    pub fn obdf(
8506        self,
8507    ) -> crate::common::RegisterField<
8508        25,
8509        0x3,
8510        1,
8511        0,
8512        gtior::Obdf,
8513        gtior::Obdf,
8514        Gtior_SPEC,
8515        crate::common::RW,
8516    > {
8517        crate::common::RegisterField::<
8518            25,
8519            0x3,
8520            1,
8521            0,
8522            gtior::Obdf,
8523            gtior::Obdf,
8524            Gtior_SPEC,
8525            crate::common::RW,
8526        >::from_register(self, 0)
8527    }
8528
8529    #[doc = "Noise Filter B Enable"]
8530    #[inline(always)]
8531    pub fn nfben(
8532        self,
8533    ) -> crate::common::RegisterField<
8534        29,
8535        0x1,
8536        1,
8537        0,
8538        gtior::Nfben,
8539        gtior::Nfben,
8540        Gtior_SPEC,
8541        crate::common::RW,
8542    > {
8543        crate::common::RegisterField::<
8544            29,
8545            0x1,
8546            1,
8547            0,
8548            gtior::Nfben,
8549            gtior::Nfben,
8550            Gtior_SPEC,
8551            crate::common::RW,
8552        >::from_register(self, 0)
8553    }
8554
8555    #[doc = "Noise Filter B Sampling Clock Select"]
8556    #[inline(always)]
8557    pub fn nfcsb(
8558        self,
8559    ) -> crate::common::RegisterField<
8560        30,
8561        0x3,
8562        1,
8563        0,
8564        gtior::Nfcsb,
8565        gtior::Nfcsb,
8566        Gtior_SPEC,
8567        crate::common::RW,
8568    > {
8569        crate::common::RegisterField::<
8570            30,
8571            0x3,
8572            1,
8573            0,
8574            gtior::Nfcsb,
8575            gtior::Nfcsb,
8576            Gtior_SPEC,
8577            crate::common::RW,
8578        >::from_register(self, 0)
8579    }
8580}
8581impl ::core::default::Default for Gtior {
8582    #[inline(always)]
8583    fn default() -> Gtior {
8584        <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
8585    }
8586}
8587pub mod gtior {
8588
8589    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8590    pub struct Oadflt_SPEC;
8591    pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
8592    impl Oadflt {
8593        #[doc = "The GTIOCnA pin outputs low when counting stops"]
8594        pub const _0: Self = Self::new(0);
8595
8596        #[doc = "The GTIOCnA pin outputs high when counting stops"]
8597        pub const _1: Self = Self::new(1);
8598    }
8599    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8600    pub struct Oahld_SPEC;
8601    pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
8602    impl Oahld {
8603        #[doc = "The GTIOCnA pin output level at the start or stop of counting depends on the register setting"]
8604        pub const _0: Self = Self::new(0);
8605
8606        #[doc = "The GTIOCnA pin output level is retained at the start or stop of counting"]
8607        pub const _1: Self = Self::new(1);
8608    }
8609    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8610    pub struct Oae_SPEC;
8611    pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
8612    impl Oae {
8613        #[doc = "Output is disabled"]
8614        pub const _0: Self = Self::new(0);
8615
8616        #[doc = "Output is enabled"]
8617        pub const _1: Self = Self::new(1);
8618    }
8619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8620    pub struct Oadf_SPEC;
8621    pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
8622    impl Oadf {
8623        #[doc = "None of the below options are specified"]
8624        pub const _00: Self = Self::new(0);
8625
8626        #[doc = "GTIOCnA pin is set to Hi-Z in response to controlling the output negation"]
8627        pub const _01: Self = Self::new(1);
8628
8629        #[doc = "GTIOCnA pin is set to 0 in response to controlling the output negation"]
8630        pub const _10: Self = Self::new(2);
8631
8632        #[doc = "GTIOCnA pin is set to 1 in response to controlling the output negation"]
8633        pub const _11: Self = Self::new(3);
8634    }
8635    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8636    pub struct Nfaen_SPEC;
8637    pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
8638    impl Nfaen {
8639        #[doc = "The noise filter for the GTIOCnA pin is disabled"]
8640        pub const _0: Self = Self::new(0);
8641
8642        #[doc = "The noise filter for the GTIOCnA pin is enabled"]
8643        pub const _1: Self = Self::new(1);
8644    }
8645    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8646    pub struct Nfcsa_SPEC;
8647    pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
8648    impl Nfcsa {
8649        #[doc = "PCLKD/1"]
8650        pub const _00: Self = Self::new(0);
8651
8652        #[doc = "PCLKD/4"]
8653        pub const _01: Self = Self::new(1);
8654
8655        #[doc = "PCLKD/16"]
8656        pub const _10: Self = Self::new(2);
8657
8658        #[doc = "PCLKD/64"]
8659        pub const _11: Self = Self::new(3);
8660    }
8661    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8662    pub struct Obdflt_SPEC;
8663    pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
8664    impl Obdflt {
8665        #[doc = "The GTIOCnB pin outputs low when counting stops"]
8666        pub const _0: Self = Self::new(0);
8667
8668        #[doc = "The GTIOCnB pin outputs high when counting stops"]
8669        pub const _1: Self = Self::new(1);
8670    }
8671    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8672    pub struct Obhld_SPEC;
8673    pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
8674    impl Obhld {
8675        #[doc = "The GTIOCnB pin output level at the start/stop of counting depends on the register setting"]
8676        pub const _0: Self = Self::new(0);
8677
8678        #[doc = "The GTIOCnB pin output level is retained at the start/stop of counting"]
8679        pub const _1: Self = Self::new(1);
8680    }
8681    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8682    pub struct Obe_SPEC;
8683    pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
8684    impl Obe {
8685        #[doc = "Output is disabled"]
8686        pub const _0: Self = Self::new(0);
8687
8688        #[doc = "Output is enabled"]
8689        pub const _1: Self = Self::new(1);
8690    }
8691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8692    pub struct Obdf_SPEC;
8693    pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
8694    impl Obdf {
8695        #[doc = "None of the below options are specified"]
8696        pub const _00: Self = Self::new(0);
8697
8698        #[doc = "GTIOCnB pin is set to Hi-Z in response to controlling the output negation"]
8699        pub const _01: Self = Self::new(1);
8700
8701        #[doc = "GTIOCnB pin is set to 0 in response to controlling the output negation"]
8702        pub const _10: Self = Self::new(2);
8703
8704        #[doc = "GTIOCnB pin is set to 1 in response to controlling the output negation"]
8705        pub const _11: Self = Self::new(3);
8706    }
8707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8708    pub struct Nfben_SPEC;
8709    pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
8710    impl Nfben {
8711        #[doc = "The noise filter for the GTIOCnB pin is disabled"]
8712        pub const _0: Self = Self::new(0);
8713
8714        #[doc = "The noise filter for the GTIOCnB pin is enabled"]
8715        pub const _1: Self = Self::new(1);
8716    }
8717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8718    pub struct Nfcsb_SPEC;
8719    pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
8720    impl Nfcsb {
8721        #[doc = "PCLKD/1"]
8722        pub const _00: Self = Self::new(0);
8723
8724        #[doc = "PCLKD/4"]
8725        pub const _01: Self = Self::new(1);
8726
8727        #[doc = "PCLKD/16"]
8728        pub const _10: Self = Self::new(2);
8729
8730        #[doc = "PCLKD/64"]
8731        pub const _11: Self = Self::new(3);
8732    }
8733}
8734#[doc(hidden)]
8735#[derive(Copy, Clone, Eq, PartialEq)]
8736pub struct Gtintad_SPEC;
8737impl crate::sealed::RegSpec for Gtintad_SPEC {
8738    type DataType = u32;
8739}
8740
8741#[doc = "General PWM Timer Interrupt Output Setting Register"]
8742pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
8743
8744impl Gtintad {
8745    #[doc = "Output Disable Source Select"]
8746    #[inline(always)]
8747    pub fn grp(
8748        self,
8749    ) -> crate::common::RegisterField<
8750        24,
8751        0x3,
8752        1,
8753        0,
8754        gtintad::Grp,
8755        gtintad::Grp,
8756        Gtintad_SPEC,
8757        crate::common::RW,
8758    > {
8759        crate::common::RegisterField::<
8760            24,
8761            0x3,
8762            1,
8763            0,
8764            gtintad::Grp,
8765            gtintad::Grp,
8766            Gtintad_SPEC,
8767            crate::common::RW,
8768        >::from_register(self, 0)
8769    }
8770
8771    #[doc = "Same Time Output Level High Disable Request Enable"]
8772    #[inline(always)]
8773    pub fn grpabh(
8774        self,
8775    ) -> crate::common::RegisterField<
8776        29,
8777        0x1,
8778        1,
8779        0,
8780        gtintad::Grpabh,
8781        gtintad::Grpabh,
8782        Gtintad_SPEC,
8783        crate::common::RW,
8784    > {
8785        crate::common::RegisterField::<
8786            29,
8787            0x1,
8788            1,
8789            0,
8790            gtintad::Grpabh,
8791            gtintad::Grpabh,
8792            Gtintad_SPEC,
8793            crate::common::RW,
8794        >::from_register(self, 0)
8795    }
8796
8797    #[doc = "Same Time Output Level Low Disable Request Enable"]
8798    #[inline(always)]
8799    pub fn grpabl(
8800        self,
8801    ) -> crate::common::RegisterField<
8802        30,
8803        0x1,
8804        1,
8805        0,
8806        gtintad::Grpabl,
8807        gtintad::Grpabl,
8808        Gtintad_SPEC,
8809        crate::common::RW,
8810    > {
8811        crate::common::RegisterField::<
8812            30,
8813            0x1,
8814            1,
8815            0,
8816            gtintad::Grpabl,
8817            gtintad::Grpabl,
8818            Gtintad_SPEC,
8819            crate::common::RW,
8820        >::from_register(self, 0)
8821    }
8822}
8823impl ::core::default::Default for Gtintad {
8824    #[inline(always)]
8825    fn default() -> Gtintad {
8826        <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
8827    }
8828}
8829pub mod gtintad {
8830
8831    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8832    pub struct Grp_SPEC;
8833    pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
8834    impl Grp {
8835        #[doc = "Group A output disable request is selected"]
8836        pub const _00: Self = Self::new(0);
8837
8838        #[doc = "Group B output disable request is selected"]
8839        pub const _01: Self = Self::new(1);
8840
8841        #[doc = "Group C output disable request is selected"]
8842        pub const _10: Self = Self::new(2);
8843
8844        #[doc = "Group D output disable request is selected"]
8845        pub const _11: Self = Self::new(3);
8846    }
8847    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8848    pub struct Grpabh_SPEC;
8849    pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
8850    impl Grpabh {
8851        #[doc = "Same time output level high disable request disabled"]
8852        pub const _0: Self = Self::new(0);
8853
8854        #[doc = "Same time output level high disable request enabled"]
8855        pub const _1: Self = Self::new(1);
8856    }
8857    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8858    pub struct Grpabl_SPEC;
8859    pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
8860    impl Grpabl {
8861        #[doc = "Same time output level low disable request disabled"]
8862        pub const _0: Self = Self::new(0);
8863
8864        #[doc = "Same time output level low disable request enabled"]
8865        pub const _1: Self = Self::new(1);
8866    }
8867}
8868#[doc(hidden)]
8869#[derive(Copy, Clone, Eq, PartialEq)]
8870pub struct Gtst_SPEC;
8871impl crate::sealed::RegSpec for Gtst_SPEC {
8872    type DataType = u32;
8873}
8874
8875#[doc = "General PWM Timer Status Register"]
8876pub type Gtst = crate::RegValueT<Gtst_SPEC>;
8877
8878impl Gtst {
8879    #[doc = "Input Capture/Compare Match Flag A"]
8880    #[inline(always)]
8881    pub fn tcfa(
8882        self,
8883    ) -> crate::common::RegisterField<
8884        0,
8885        0x1,
8886        1,
8887        0,
8888        gtst::Tcfa,
8889        gtst::Tcfa,
8890        Gtst_SPEC,
8891        crate::common::RW,
8892    > {
8893        crate::common::RegisterField::<
8894            0,
8895            0x1,
8896            1,
8897            0,
8898            gtst::Tcfa,
8899            gtst::Tcfa,
8900            Gtst_SPEC,
8901            crate::common::RW,
8902        >::from_register(self, 0)
8903    }
8904
8905    #[doc = "Input Capture/Compare Match Flag B"]
8906    #[inline(always)]
8907    pub fn tcfb(
8908        self,
8909    ) -> crate::common::RegisterField<
8910        1,
8911        0x1,
8912        1,
8913        0,
8914        gtst::Tcfb,
8915        gtst::Tcfb,
8916        Gtst_SPEC,
8917        crate::common::RW,
8918    > {
8919        crate::common::RegisterField::<
8920            1,
8921            0x1,
8922            1,
8923            0,
8924            gtst::Tcfb,
8925            gtst::Tcfb,
8926            Gtst_SPEC,
8927            crate::common::RW,
8928        >::from_register(self, 0)
8929    }
8930
8931    #[doc = "Input Compare Match Flag C"]
8932    #[inline(always)]
8933    pub fn tcfc(
8934        self,
8935    ) -> crate::common::RegisterField<
8936        2,
8937        0x1,
8938        1,
8939        0,
8940        gtst::Tcfc,
8941        gtst::Tcfc,
8942        Gtst_SPEC,
8943        crate::common::RW,
8944    > {
8945        crate::common::RegisterField::<
8946            2,
8947            0x1,
8948            1,
8949            0,
8950            gtst::Tcfc,
8951            gtst::Tcfc,
8952            Gtst_SPEC,
8953            crate::common::RW,
8954        >::from_register(self, 0)
8955    }
8956
8957    #[doc = "Input Compare Match Flag D"]
8958    #[inline(always)]
8959    pub fn tcfd(
8960        self,
8961    ) -> crate::common::RegisterField<
8962        3,
8963        0x1,
8964        1,
8965        0,
8966        gtst::Tcfd,
8967        gtst::Tcfd,
8968        Gtst_SPEC,
8969        crate::common::RW,
8970    > {
8971        crate::common::RegisterField::<
8972            3,
8973            0x1,
8974            1,
8975            0,
8976            gtst::Tcfd,
8977            gtst::Tcfd,
8978            Gtst_SPEC,
8979            crate::common::RW,
8980        >::from_register(self, 0)
8981    }
8982
8983    #[doc = "Input Compare Match Flag E"]
8984    #[inline(always)]
8985    pub fn tcfe(
8986        self,
8987    ) -> crate::common::RegisterField<
8988        4,
8989        0x1,
8990        1,
8991        0,
8992        gtst::Tcfe,
8993        gtst::Tcfe,
8994        Gtst_SPEC,
8995        crate::common::RW,
8996    > {
8997        crate::common::RegisterField::<
8998            4,
8999            0x1,
9000            1,
9001            0,
9002            gtst::Tcfe,
9003            gtst::Tcfe,
9004            Gtst_SPEC,
9005            crate::common::RW,
9006        >::from_register(self, 0)
9007    }
9008
9009    #[doc = "Input Compare Match Flag F"]
9010    #[inline(always)]
9011    pub fn tcff(
9012        self,
9013    ) -> crate::common::RegisterField<
9014        5,
9015        0x1,
9016        1,
9017        0,
9018        gtst::Tcff,
9019        gtst::Tcff,
9020        Gtst_SPEC,
9021        crate::common::RW,
9022    > {
9023        crate::common::RegisterField::<
9024            5,
9025            0x1,
9026            1,
9027            0,
9028            gtst::Tcff,
9029            gtst::Tcff,
9030            Gtst_SPEC,
9031            crate::common::RW,
9032        >::from_register(self, 0)
9033    }
9034
9035    #[doc = "Overflow Flag"]
9036    #[inline(always)]
9037    pub fn tcfpo(
9038        self,
9039    ) -> crate::common::RegisterField<
9040        6,
9041        0x1,
9042        1,
9043        0,
9044        gtst::Tcfpo,
9045        gtst::Tcfpo,
9046        Gtst_SPEC,
9047        crate::common::RW,
9048    > {
9049        crate::common::RegisterField::<
9050            6,
9051            0x1,
9052            1,
9053            0,
9054            gtst::Tcfpo,
9055            gtst::Tcfpo,
9056            Gtst_SPEC,
9057            crate::common::RW,
9058        >::from_register(self, 0)
9059    }
9060
9061    #[doc = "Underflow Flag"]
9062    #[inline(always)]
9063    pub fn tcfpu(
9064        self,
9065    ) -> crate::common::RegisterField<
9066        7,
9067        0x1,
9068        1,
9069        0,
9070        gtst::Tcfpu,
9071        gtst::Tcfpu,
9072        Gtst_SPEC,
9073        crate::common::RW,
9074    > {
9075        crate::common::RegisterField::<
9076            7,
9077            0x1,
9078            1,
9079            0,
9080            gtst::Tcfpu,
9081            gtst::Tcfpu,
9082            Gtst_SPEC,
9083            crate::common::RW,
9084        >::from_register(self, 0)
9085    }
9086
9087    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter"]
9088    #[inline(always)]
9089    pub fn itcnt(
9090        self,
9091    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Gtst_SPEC, crate::common::R> {
9092        crate::common::RegisterField::<8,0x7,1,0,u8,u8,Gtst_SPEC,crate::common::R>::from_register(self,0)
9093    }
9094
9095    #[doc = "Count Direction Flag"]
9096    #[inline(always)]
9097    pub fn tucf(
9098        self,
9099    ) -> crate::common::RegisterField<
9100        15,
9101        0x1,
9102        1,
9103        0,
9104        gtst::Tucf,
9105        gtst::Tucf,
9106        Gtst_SPEC,
9107        crate::common::R,
9108    > {
9109        crate::common::RegisterField::<
9110            15,
9111            0x1,
9112            1,
9113            0,
9114            gtst::Tucf,
9115            gtst::Tucf,
9116            Gtst_SPEC,
9117            crate::common::R,
9118        >::from_register(self, 0)
9119    }
9120
9121    #[doc = "GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag"]
9122    #[inline(always)]
9123    pub fn adtrauf(
9124        self,
9125    ) -> crate::common::RegisterField<
9126        16,
9127        0x1,
9128        1,
9129        0,
9130        gtst::Adtrauf,
9131        gtst::Adtrauf,
9132        Gtst_SPEC,
9133        crate::common::RW,
9134    > {
9135        crate::common::RegisterField::<
9136            16,
9137            0x1,
9138            1,
9139            0,
9140            gtst::Adtrauf,
9141            gtst::Adtrauf,
9142            Gtst_SPEC,
9143            crate::common::RW,
9144        >::from_register(self, 0)
9145    }
9146
9147    #[doc = "GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag"]
9148    #[inline(always)]
9149    pub fn adtradf(
9150        self,
9151    ) -> crate::common::RegisterField<
9152        17,
9153        0x1,
9154        1,
9155        0,
9156        gtst::Adtradf,
9157        gtst::Adtradf,
9158        Gtst_SPEC,
9159        crate::common::RW,
9160    > {
9161        crate::common::RegisterField::<
9162            17,
9163            0x1,
9164            1,
9165            0,
9166            gtst::Adtradf,
9167            gtst::Adtradf,
9168            Gtst_SPEC,
9169            crate::common::RW,
9170        >::from_register(self, 0)
9171    }
9172
9173    #[doc = "GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag"]
9174    #[inline(always)]
9175    pub fn adtrbuf(
9176        self,
9177    ) -> crate::common::RegisterField<
9178        18,
9179        0x1,
9180        1,
9181        0,
9182        gtst::Adtrbuf,
9183        gtst::Adtrbuf,
9184        Gtst_SPEC,
9185        crate::common::RW,
9186    > {
9187        crate::common::RegisterField::<
9188            18,
9189            0x1,
9190            1,
9191            0,
9192            gtst::Adtrbuf,
9193            gtst::Adtrbuf,
9194            Gtst_SPEC,
9195            crate::common::RW,
9196        >::from_register(self, 0)
9197    }
9198
9199    #[doc = "GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag"]
9200    #[inline(always)]
9201    pub fn adtrbdf(
9202        self,
9203    ) -> crate::common::RegisterField<
9204        19,
9205        0x1,
9206        1,
9207        0,
9208        gtst::Adtrbdf,
9209        gtst::Adtrbdf,
9210        Gtst_SPEC,
9211        crate::common::RW,
9212    > {
9213        crate::common::RegisterField::<
9214            19,
9215            0x1,
9216            1,
9217            0,
9218            gtst::Adtrbdf,
9219            gtst::Adtrbdf,
9220            Gtst_SPEC,
9221            crate::common::RW,
9222        >::from_register(self, 0)
9223    }
9224
9225    #[doc = "Output Disable Flag"]
9226    #[inline(always)]
9227    pub fn odf(
9228        self,
9229    ) -> crate::common::RegisterField<
9230        24,
9231        0x1,
9232        1,
9233        0,
9234        gtst::Odf,
9235        gtst::Odf,
9236        Gtst_SPEC,
9237        crate::common::R,
9238    > {
9239        crate::common::RegisterField::<
9240            24,
9241            0x1,
9242            1,
9243            0,
9244            gtst::Odf,
9245            gtst::Odf,
9246            Gtst_SPEC,
9247            crate::common::R,
9248        >::from_register(self, 0)
9249    }
9250
9251    #[doc = "Dead Time Error Flag"]
9252    #[inline(always)]
9253    pub fn dtef(
9254        self,
9255    ) -> crate::common::RegisterField<
9256        28,
9257        0x1,
9258        1,
9259        0,
9260        gtst::Dtef,
9261        gtst::Dtef,
9262        Gtst_SPEC,
9263        crate::common::R,
9264    > {
9265        crate::common::RegisterField::<
9266            28,
9267            0x1,
9268            1,
9269            0,
9270            gtst::Dtef,
9271            gtst::Dtef,
9272            Gtst_SPEC,
9273            crate::common::R,
9274        >::from_register(self, 0)
9275    }
9276
9277    #[doc = "Same Time Output Level High Flag"]
9278    #[inline(always)]
9279    pub fn oabhf(
9280        self,
9281    ) -> crate::common::RegisterField<
9282        29,
9283        0x1,
9284        1,
9285        0,
9286        gtst::Oabhf,
9287        gtst::Oabhf,
9288        Gtst_SPEC,
9289        crate::common::R,
9290    > {
9291        crate::common::RegisterField::<
9292            29,
9293            0x1,
9294            1,
9295            0,
9296            gtst::Oabhf,
9297            gtst::Oabhf,
9298            Gtst_SPEC,
9299            crate::common::R,
9300        >::from_register(self, 0)
9301    }
9302
9303    #[doc = "Same Time Output Level Low Flag"]
9304    #[inline(always)]
9305    pub fn oablf(
9306        self,
9307    ) -> crate::common::RegisterField<
9308        30,
9309        0x1,
9310        1,
9311        0,
9312        gtst::Oablf,
9313        gtst::Oablf,
9314        Gtst_SPEC,
9315        crate::common::R,
9316    > {
9317        crate::common::RegisterField::<
9318            30,
9319            0x1,
9320            1,
9321            0,
9322            gtst::Oablf,
9323            gtst::Oablf,
9324            Gtst_SPEC,
9325            crate::common::R,
9326        >::from_register(self, 0)
9327    }
9328
9329    #[doc = "Period Count Function Finish Flag"]
9330    #[inline(always)]
9331    pub fn pcf(
9332        self,
9333    ) -> crate::common::RegisterField<
9334        31,
9335        0x1,
9336        1,
9337        0,
9338        gtst::Pcf,
9339        gtst::Pcf,
9340        Gtst_SPEC,
9341        crate::common::RW,
9342    > {
9343        crate::common::RegisterField::<
9344            31,
9345            0x1,
9346            1,
9347            0,
9348            gtst::Pcf,
9349            gtst::Pcf,
9350            Gtst_SPEC,
9351            crate::common::RW,
9352        >::from_register(self, 0)
9353    }
9354}
9355impl ::core::default::Default for Gtst {
9356    #[inline(always)]
9357    fn default() -> Gtst {
9358        <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
9359    }
9360}
9361pub mod gtst {
9362
9363    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9364    pub struct Tcfa_SPEC;
9365    pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
9366    impl Tcfa {
9367        #[doc = "No input capture/compare match of GTCCRA is generated"]
9368        pub const _0: Self = Self::new(0);
9369
9370        #[doc = "An input capture/compare match of GTCCRA is generated"]
9371        pub const _1: Self = Self::new(1);
9372    }
9373    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9374    pub struct Tcfb_SPEC;
9375    pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
9376    impl Tcfb {
9377        #[doc = "No input capture/compare match of GTCCRB is generated"]
9378        pub const _0: Self = Self::new(0);
9379
9380        #[doc = "An input capture/compare match of GTCCRB is generated"]
9381        pub const _1: Self = Self::new(1);
9382    }
9383    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9384    pub struct Tcfc_SPEC;
9385    pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
9386    impl Tcfc {
9387        #[doc = "No compare match of GTCCRC is generated"]
9388        pub const _0: Self = Self::new(0);
9389
9390        #[doc = "A compare match of GTCCRC is generated"]
9391        pub const _1: Self = Self::new(1);
9392    }
9393    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9394    pub struct Tcfd_SPEC;
9395    pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
9396    impl Tcfd {
9397        #[doc = "No compare match of GTCCRD is generated"]
9398        pub const _0: Self = Self::new(0);
9399
9400        #[doc = "A compare match of GTCCRD is generated"]
9401        pub const _1: Self = Self::new(1);
9402    }
9403    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9404    pub struct Tcfe_SPEC;
9405    pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
9406    impl Tcfe {
9407        #[doc = "No compare match of GTCCRE is generated"]
9408        pub const _0: Self = Self::new(0);
9409
9410        #[doc = "A compare match of GTCCRE is generated"]
9411        pub const _1: Self = Self::new(1);
9412    }
9413    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9414    pub struct Tcff_SPEC;
9415    pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
9416    impl Tcff {
9417        #[doc = "No compare match of GTCCRF is generated"]
9418        pub const _0: Self = Self::new(0);
9419
9420        #[doc = "A compare match of GTCCRF is generated"]
9421        pub const _1: Self = Self::new(1);
9422    }
9423    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9424    pub struct Tcfpo_SPEC;
9425    pub type Tcfpo = crate::EnumBitfieldStruct<u8, Tcfpo_SPEC>;
9426    impl Tcfpo {
9427        #[doc = "No overflow (crest) occurred"]
9428        pub const _0: Self = Self::new(0);
9429
9430        #[doc = "An overflow (crest) occurred"]
9431        pub const _1: Self = Self::new(1);
9432    }
9433    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9434    pub struct Tcfpu_SPEC;
9435    pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
9436    impl Tcfpu {
9437        #[doc = "No underflow (trough) occurred"]
9438        pub const _0: Self = Self::new(0);
9439
9440        #[doc = "An underflow (trough) occurred"]
9441        pub const _1: Self = Self::new(1);
9442    }
9443    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9444    pub struct Tucf_SPEC;
9445    pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
9446    impl Tucf {
9447        #[doc = "GTCNT counter counts downward"]
9448        pub const _0: Self = Self::new(0);
9449
9450        #[doc = "GTCNT counter counts upward"]
9451        pub const _1: Self = Self::new(1);
9452    }
9453    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9454    pub struct Adtrauf_SPEC;
9455    pub type Adtrauf = crate::EnumBitfieldStruct<u8, Adtrauf_SPEC>;
9456    impl Adtrauf {
9457        #[doc = "No GTADTRA register compare match has occurred in up-counting"]
9458        pub const _0: Self = Self::new(0);
9459
9460        #[doc = "A GTADTRA register compare match has occurred in up-counting"]
9461        pub const _1: Self = Self::new(1);
9462    }
9463    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9464    pub struct Adtradf_SPEC;
9465    pub type Adtradf = crate::EnumBitfieldStruct<u8, Adtradf_SPEC>;
9466    impl Adtradf {
9467        #[doc = "No GTADTRA register compare match has occurred in down-counting"]
9468        pub const _0: Self = Self::new(0);
9469
9470        #[doc = "A GTADTRA register compare match has occurred in down-counting"]
9471        pub const _1: Self = Self::new(1);
9472    }
9473    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9474    pub struct Adtrbuf_SPEC;
9475    pub type Adtrbuf = crate::EnumBitfieldStruct<u8, Adtrbuf_SPEC>;
9476    impl Adtrbuf {
9477        #[doc = "No GTADTRB register compare match has occurred in up-counting"]
9478        pub const _0: Self = Self::new(0);
9479
9480        #[doc = "A GTADTRB register compare match has occurred in up-counting"]
9481        pub const _1: Self = Self::new(1);
9482    }
9483    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9484    pub struct Adtrbdf_SPEC;
9485    pub type Adtrbdf = crate::EnumBitfieldStruct<u8, Adtrbdf_SPEC>;
9486    impl Adtrbdf {
9487        #[doc = "No GTADTRB register compare match has occurred in down-counting"]
9488        pub const _0: Self = Self::new(0);
9489
9490        #[doc = "A GTADTRB register compare match has occurred in down-counting"]
9491        pub const _1: Self = Self::new(1);
9492    }
9493    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9494    pub struct Odf_SPEC;
9495    pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
9496    impl Odf {
9497        #[doc = "No output disable request is generated"]
9498        pub const _0: Self = Self::new(0);
9499
9500        #[doc = "An output disable request is generated"]
9501        pub const _1: Self = Self::new(1);
9502    }
9503    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9504    pub struct Dtef_SPEC;
9505    pub type Dtef = crate::EnumBitfieldStruct<u8, Dtef_SPEC>;
9506    impl Dtef {
9507        #[doc = "No dead time error has occurred"]
9508        pub const _0: Self = Self::new(0);
9509
9510        #[doc = "A dead time error has occurred"]
9511        pub const _1: Self = Self::new(1);
9512    }
9513    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9514    pub struct Oabhf_SPEC;
9515    pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
9516    impl Oabhf {
9517        #[doc = "No simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred"]
9518        pub const _0: Self = Self::new(0);
9519
9520        #[doc = "A simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred"]
9521        pub const _1: Self = Self::new(1);
9522    }
9523    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9524    pub struct Oablf_SPEC;
9525    pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
9526    impl Oablf {
9527        #[doc = "No simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred"]
9528        pub const _0: Self = Self::new(0);
9529
9530        #[doc = "A simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred"]
9531        pub const _1: Self = Self::new(1);
9532    }
9533    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9534    pub struct Pcf_SPEC;
9535    pub type Pcf = crate::EnumBitfieldStruct<u8, Pcf_SPEC>;
9536    impl Pcf {
9537        #[doc = "No period count function finish has occurred"]
9538        pub const _0: Self = Self::new(0);
9539
9540        #[doc = "A period count function finish has occurred"]
9541        pub const _1: Self = Self::new(1);
9542    }
9543}
9544#[doc(hidden)]
9545#[derive(Copy, Clone, Eq, PartialEq)]
9546pub struct Gtber_SPEC;
9547impl crate::sealed::RegSpec for Gtber_SPEC {
9548    type DataType = u32;
9549}
9550
9551#[doc = "General PWM Timer Buffer Enable Register"]
9552pub type Gtber = crate::RegValueT<Gtber_SPEC>;
9553
9554impl Gtber {
9555    #[doc = "GTCCR Buffer Operation Disable"]
9556    #[inline(always)]
9557    pub fn bd0(
9558        self,
9559    ) -> crate::common::RegisterField<
9560        0,
9561        0x1,
9562        1,
9563        0,
9564        gtber::Bd0,
9565        gtber::Bd0,
9566        Gtber_SPEC,
9567        crate::common::RW,
9568    > {
9569        crate::common::RegisterField::<
9570            0,
9571            0x1,
9572            1,
9573            0,
9574            gtber::Bd0,
9575            gtber::Bd0,
9576            Gtber_SPEC,
9577            crate::common::RW,
9578        >::from_register(self, 0)
9579    }
9580
9581    #[doc = "GTPR Buffer Operation Disable"]
9582    #[inline(always)]
9583    pub fn bd1(
9584        self,
9585    ) -> crate::common::RegisterField<
9586        1,
9587        0x1,
9588        1,
9589        0,
9590        gtber::Bd1,
9591        gtber::Bd1,
9592        Gtber_SPEC,
9593        crate::common::RW,
9594    > {
9595        crate::common::RegisterField::<
9596            1,
9597            0x1,
9598            1,
9599            0,
9600            gtber::Bd1,
9601            gtber::Bd1,
9602            Gtber_SPEC,
9603            crate::common::RW,
9604        >::from_register(self, 0)
9605    }
9606
9607    #[doc = "GTADTRA/GTADTRB Registers Buffer Operation Disable"]
9608    #[inline(always)]
9609    pub fn bd2(
9610        self,
9611    ) -> crate::common::RegisterField<
9612        2,
9613        0x1,
9614        1,
9615        0,
9616        gtber::Bd2,
9617        gtber::Bd2,
9618        Gtber_SPEC,
9619        crate::common::RW,
9620    > {
9621        crate::common::RegisterField::<
9622            2,
9623            0x1,
9624            1,
9625            0,
9626            gtber::Bd2,
9627            gtber::Bd2,
9628            Gtber_SPEC,
9629            crate::common::RW,
9630        >::from_register(self, 0)
9631    }
9632
9633    #[doc = "GTDVU/GTDVD Registers Buffer Operation Disable"]
9634    #[inline(always)]
9635    pub fn bd3(
9636        self,
9637    ) -> crate::common::RegisterField<
9638        3,
9639        0x1,
9640        1,
9641        0,
9642        gtber::Bd3,
9643        gtber::Bd3,
9644        Gtber_SPEC,
9645        crate::common::RW,
9646    > {
9647        crate::common::RegisterField::<
9648            3,
9649            0x1,
9650            1,
9651            0,
9652            gtber::Bd3,
9653            gtber::Bd3,
9654            Gtber_SPEC,
9655            crate::common::RW,
9656        >::from_register(self, 0)
9657    }
9658
9659    #[doc = "GTCCRA Buffer Operation"]
9660    #[inline(always)]
9661    pub fn ccra(
9662        self,
9663    ) -> crate::common::RegisterField<
9664        16,
9665        0x3,
9666        1,
9667        0,
9668        gtber::Ccra,
9669        gtber::Ccra,
9670        Gtber_SPEC,
9671        crate::common::RW,
9672    > {
9673        crate::common::RegisterField::<
9674            16,
9675            0x3,
9676            1,
9677            0,
9678            gtber::Ccra,
9679            gtber::Ccra,
9680            Gtber_SPEC,
9681            crate::common::RW,
9682        >::from_register(self, 0)
9683    }
9684
9685    #[doc = "GTCCRB Buffer Operation"]
9686    #[inline(always)]
9687    pub fn ccrb(
9688        self,
9689    ) -> crate::common::RegisterField<
9690        18,
9691        0x3,
9692        1,
9693        0,
9694        gtber::Ccrb,
9695        gtber::Ccrb,
9696        Gtber_SPEC,
9697        crate::common::RW,
9698    > {
9699        crate::common::RegisterField::<
9700            18,
9701            0x3,
9702            1,
9703            0,
9704            gtber::Ccrb,
9705            gtber::Ccrb,
9706            Gtber_SPEC,
9707            crate::common::RW,
9708        >::from_register(self, 0)
9709    }
9710
9711    #[doc = "GTPR Buffer Operation"]
9712    #[inline(always)]
9713    pub fn pr(
9714        self,
9715    ) -> crate::common::RegisterField<
9716        20,
9717        0x3,
9718        1,
9719        0,
9720        gtber::Pr,
9721        gtber::Pr,
9722        Gtber_SPEC,
9723        crate::common::RW,
9724    > {
9725        crate::common::RegisterField::<
9726            20,
9727            0x3,
9728            1,
9729            0,
9730            gtber::Pr,
9731            gtber::Pr,
9732            Gtber_SPEC,
9733            crate::common::RW,
9734        >::from_register(self, 0)
9735    }
9736
9737    #[doc = "GTCCRA and GTCCRB Forcible Buffer Operation"]
9738    #[inline(always)]
9739    pub fn ccrswt(
9740        self,
9741    ) -> crate::common::RegisterFieldBool<22, 1, 0, Gtber_SPEC, crate::common::W> {
9742        crate::common::RegisterFieldBool::<22, 1, 0, Gtber_SPEC, crate::common::W>::from_register(
9743            self, 0,
9744        )
9745    }
9746
9747    #[doc = "GTADTRA Register Buffer Transfer Timing Select"]
9748    #[inline(always)]
9749    pub fn adtta(
9750        self,
9751    ) -> crate::common::RegisterField<
9752        24,
9753        0x3,
9754        1,
9755        0,
9756        gtber::Adtta,
9757        gtber::Adtta,
9758        Gtber_SPEC,
9759        crate::common::RW,
9760    > {
9761        crate::common::RegisterField::<
9762            24,
9763            0x3,
9764            1,
9765            0,
9766            gtber::Adtta,
9767            gtber::Adtta,
9768            Gtber_SPEC,
9769            crate::common::RW,
9770        >::from_register(self, 0)
9771    }
9772
9773    #[doc = "GTADTRA Register Double Buffer Operation"]
9774    #[inline(always)]
9775    pub fn adtda(
9776        self,
9777    ) -> crate::common::RegisterField<
9778        26,
9779        0x1,
9780        1,
9781        0,
9782        gtber::Adtda,
9783        gtber::Adtda,
9784        Gtber_SPEC,
9785        crate::common::RW,
9786    > {
9787        crate::common::RegisterField::<
9788            26,
9789            0x1,
9790            1,
9791            0,
9792            gtber::Adtda,
9793            gtber::Adtda,
9794            Gtber_SPEC,
9795            crate::common::RW,
9796        >::from_register(self, 0)
9797    }
9798
9799    #[doc = "GTADTRB Register Buffer Transfer Timing Select"]
9800    #[inline(always)]
9801    pub fn adttb(
9802        self,
9803    ) -> crate::common::RegisterField<
9804        28,
9805        0x3,
9806        1,
9807        0,
9808        gtber::Adttb,
9809        gtber::Adttb,
9810        Gtber_SPEC,
9811        crate::common::RW,
9812    > {
9813        crate::common::RegisterField::<
9814            28,
9815            0x3,
9816            1,
9817            0,
9818            gtber::Adttb,
9819            gtber::Adttb,
9820            Gtber_SPEC,
9821            crate::common::RW,
9822        >::from_register(self, 0)
9823    }
9824
9825    #[doc = "GTADTRB Register Double Buffer Operation"]
9826    #[inline(always)]
9827    pub fn adtdb(
9828        self,
9829    ) -> crate::common::RegisterField<
9830        30,
9831        0x1,
9832        1,
9833        0,
9834        gtber::Adtdb,
9835        gtber::Adtdb,
9836        Gtber_SPEC,
9837        crate::common::RW,
9838    > {
9839        crate::common::RegisterField::<
9840            30,
9841            0x1,
9842            1,
9843            0,
9844            gtber::Adtdb,
9845            gtber::Adtdb,
9846            Gtber_SPEC,
9847            crate::common::RW,
9848        >::from_register(self, 0)
9849    }
9850}
9851impl ::core::default::Default for Gtber {
9852    #[inline(always)]
9853    fn default() -> Gtber {
9854        <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
9855    }
9856}
9857pub mod gtber {
9858
9859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9860    pub struct Bd0_SPEC;
9861    pub type Bd0 = crate::EnumBitfieldStruct<u8, Bd0_SPEC>;
9862    impl Bd0 {
9863        #[doc = "Buffer operation is enabled"]
9864        pub const _0: Self = Self::new(0);
9865
9866        #[doc = "Buffer operation is disabled"]
9867        pub const _1: Self = Self::new(1);
9868    }
9869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9870    pub struct Bd1_SPEC;
9871    pub type Bd1 = crate::EnumBitfieldStruct<u8, Bd1_SPEC>;
9872    impl Bd1 {
9873        #[doc = "Buffer operation is enabled"]
9874        pub const _0: Self = Self::new(0);
9875
9876        #[doc = "Buffer operation is disabled"]
9877        pub const _1: Self = Self::new(1);
9878    }
9879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9880    pub struct Bd2_SPEC;
9881    pub type Bd2 = crate::EnumBitfieldStruct<u8, Bd2_SPEC>;
9882    impl Bd2 {
9883        #[doc = "Buffer operation is enabled"]
9884        pub const _0: Self = Self::new(0);
9885
9886        #[doc = "Buffer operation is disabled"]
9887        pub const _1: Self = Self::new(1);
9888    }
9889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9890    pub struct Bd3_SPEC;
9891    pub type Bd3 = crate::EnumBitfieldStruct<u8, Bd3_SPEC>;
9892    impl Bd3 {
9893        #[doc = "Buffer operation is enabled"]
9894        pub const _0: Self = Self::new(0);
9895
9896        #[doc = "Buffer operation is disabled"]
9897        pub const _1: Self = Self::new(1);
9898    }
9899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9900    pub struct Ccra_SPEC;
9901    pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
9902    impl Ccra {
9903        #[doc = "No buffer operation"]
9904        pub const _00: Self = Self::new(0);
9905
9906        #[doc = "Single buffer operation (GTCCRA ↔ GTCCRC)"]
9907        pub const _01: Self = Self::new(1);
9908    }
9909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9910    pub struct Ccrb_SPEC;
9911    pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
9912    impl Ccrb {
9913        #[doc = "No buffer operation"]
9914        pub const _00: Self = Self::new(0);
9915
9916        #[doc = "Single buffer operation (GTCCRB ↔ GTCCRE)"]
9917        pub const _01: Self = Self::new(1);
9918    }
9919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9920    pub struct Pr_SPEC;
9921    pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
9922    impl Pr {
9923        #[doc = "No buffer operation"]
9924        pub const _00: Self = Self::new(0);
9925
9926        #[doc = "Single buffer operation (GTPBR → GTPR)"]
9927        pub const _01: Self = Self::new(1);
9928    }
9929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9930    pub struct Adtta_SPEC;
9931    pub type Adtta = crate::EnumBitfieldStruct<u8, Adtta_SPEC>;
9932    impl Adtta {
9933        #[doc = "In triangle wave, no transfer. In saw-wave mode, no transfer."]
9934        pub const _00: Self = Self::new(0);
9935
9936        #[doc = "In triangle wave, transfer at crest. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9937        pub const _01: Self = Self::new(1);
9938
9939        #[doc = "In triangle wave, transfer at trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9940        pub const _10: Self = Self::new(2);
9941
9942        #[doc = "In triangle wave, transfer at both crest and trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9943        pub const _11: Self = Self::new(3);
9944    }
9945    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9946    pub struct Adtda_SPEC;
9947    pub type Adtda = crate::EnumBitfieldStruct<u8, Adtda_SPEC>;
9948    impl Adtda {
9949        #[doc = "Single buffer operation (GTADTBRA → GTADTRA)"]
9950        pub const _0: Self = Self::new(0);
9951
9952        #[doc = "Double buffer operation (GTADTDBRA → GTADTBRA → GTADTRA)"]
9953        pub const _1: Self = Self::new(1);
9954    }
9955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9956    pub struct Adttb_SPEC;
9957    pub type Adttb = crate::EnumBitfieldStruct<u8, Adttb_SPEC>;
9958    impl Adttb {
9959        #[doc = "In triangle wave, no transfer. In saw-wave mode, no transfer."]
9960        pub const _00: Self = Self::new(0);
9961
9962        #[doc = "In triangle wave, transfer at crest. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9963        pub const _01: Self = Self::new(1);
9964
9965        #[doc = "In triangle wave, transfer at trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9966        pub const _10: Self = Self::new(2);
9967
9968        #[doc = "In triangle wave, transfer at both crest and trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9969        pub const _11: Self = Self::new(3);
9970    }
9971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9972    pub struct Adtdb_SPEC;
9973    pub type Adtdb = crate::EnumBitfieldStruct<u8, Adtdb_SPEC>;
9974    impl Adtdb {
9975        #[doc = "Single buffer operation (GTADTBRB → GTADTRB)"]
9976        pub const _0: Self = Self::new(0);
9977
9978        #[doc = "Double buffer operation (GTADTDBRB → GTADTRB)"]
9979        pub const _1: Self = Self::new(1);
9980    }
9981}
9982#[doc(hidden)]
9983#[derive(Copy, Clone, Eq, PartialEq)]
9984pub struct Gtitc_SPEC;
9985impl crate::sealed::RegSpec for Gtitc_SPEC {
9986    type DataType = u32;
9987}
9988
9989#[doc = "General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"]
9990pub type Gtitc = crate::RegValueT<Gtitc_SPEC>;
9991
9992impl Gtitc {
9993    #[doc = "GTCCRA Register Compare Match/Input Capture Interrupt Link"]
9994    #[inline(always)]
9995    pub fn itla(
9996        self,
9997    ) -> crate::common::RegisterField<
9998        0,
9999        0x1,
10000        1,
10001        0,
10002        gtitc::Itla,
10003        gtitc::Itla,
10004        Gtitc_SPEC,
10005        crate::common::RW,
10006    > {
10007        crate::common::RegisterField::<
10008            0,
10009            0x1,
10010            1,
10011            0,
10012            gtitc::Itla,
10013            gtitc::Itla,
10014            Gtitc_SPEC,
10015            crate::common::RW,
10016        >::from_register(self, 0)
10017    }
10018
10019    #[doc = "GTCCRB Register Compare Match/Input Capture Interrupt Link"]
10020    #[inline(always)]
10021    pub fn itlb(
10022        self,
10023    ) -> crate::common::RegisterField<
10024        1,
10025        0x1,
10026        1,
10027        0,
10028        gtitc::Itlb,
10029        gtitc::Itlb,
10030        Gtitc_SPEC,
10031        crate::common::RW,
10032    > {
10033        crate::common::RegisterField::<
10034            1,
10035            0x1,
10036            1,
10037            0,
10038            gtitc::Itlb,
10039            gtitc::Itlb,
10040            Gtitc_SPEC,
10041            crate::common::RW,
10042        >::from_register(self, 0)
10043    }
10044
10045    #[doc = "GTCCRC Register Compare Match Interrupt Link"]
10046    #[inline(always)]
10047    pub fn itlc(
10048        self,
10049    ) -> crate::common::RegisterField<
10050        2,
10051        0x1,
10052        1,
10053        0,
10054        gtitc::Itlc,
10055        gtitc::Itlc,
10056        Gtitc_SPEC,
10057        crate::common::RW,
10058    > {
10059        crate::common::RegisterField::<
10060            2,
10061            0x1,
10062            1,
10063            0,
10064            gtitc::Itlc,
10065            gtitc::Itlc,
10066            Gtitc_SPEC,
10067            crate::common::RW,
10068        >::from_register(self, 0)
10069    }
10070
10071    #[doc = "GTCCRD Register Compare Match Interrupt Link"]
10072    #[inline(always)]
10073    pub fn itld(
10074        self,
10075    ) -> crate::common::RegisterField<
10076        3,
10077        0x1,
10078        1,
10079        0,
10080        gtitc::Itld,
10081        gtitc::Itld,
10082        Gtitc_SPEC,
10083        crate::common::RW,
10084    > {
10085        crate::common::RegisterField::<
10086            3,
10087            0x1,
10088            1,
10089            0,
10090            gtitc::Itld,
10091            gtitc::Itld,
10092            Gtitc_SPEC,
10093            crate::common::RW,
10094        >::from_register(self, 0)
10095    }
10096
10097    #[doc = "GTCCRE Register Compare Match Interrupt Link"]
10098    #[inline(always)]
10099    pub fn itle(
10100        self,
10101    ) -> crate::common::RegisterField<
10102        4,
10103        0x1,
10104        1,
10105        0,
10106        gtitc::Itle,
10107        gtitc::Itle,
10108        Gtitc_SPEC,
10109        crate::common::RW,
10110    > {
10111        crate::common::RegisterField::<
10112            4,
10113            0x1,
10114            1,
10115            0,
10116            gtitc::Itle,
10117            gtitc::Itle,
10118            Gtitc_SPEC,
10119            crate::common::RW,
10120        >::from_register(self, 0)
10121    }
10122
10123    #[doc = "GTCCRF Register Compare Match Interrupt Link"]
10124    #[inline(always)]
10125    pub fn itlf(
10126        self,
10127    ) -> crate::common::RegisterField<
10128        5,
10129        0x1,
10130        1,
10131        0,
10132        gtitc::Itlf,
10133        gtitc::Itlf,
10134        Gtitc_SPEC,
10135        crate::common::RW,
10136    > {
10137        crate::common::RegisterField::<
10138            5,
10139            0x1,
10140            1,
10141            0,
10142            gtitc::Itlf,
10143            gtitc::Itlf,
10144            Gtitc_SPEC,
10145            crate::common::RW,
10146        >::from_register(self, 0)
10147    }
10148
10149    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select"]
10150    #[inline(always)]
10151    pub fn ivtc(
10152        self,
10153    ) -> crate::common::RegisterField<
10154        6,
10155        0x3,
10156        1,
10157        0,
10158        gtitc::Ivtc,
10159        gtitc::Ivtc,
10160        Gtitc_SPEC,
10161        crate::common::RW,
10162    > {
10163        crate::common::RegisterField::<
10164            6,
10165            0x3,
10166            1,
10167            0,
10168            gtitc::Ivtc,
10169            gtitc::Ivtc,
10170            Gtitc_SPEC,
10171            crate::common::RW,
10172        >::from_register(self, 0)
10173    }
10174
10175    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select"]
10176    #[inline(always)]
10177    pub fn ivtt(
10178        self,
10179    ) -> crate::common::RegisterField<
10180        8,
10181        0x7,
10182        1,
10183        0,
10184        gtitc::Ivtt,
10185        gtitc::Ivtt,
10186        Gtitc_SPEC,
10187        crate::common::RW,
10188    > {
10189        crate::common::RegisterField::<
10190            8,
10191            0x7,
10192            1,
10193            0,
10194            gtitc::Ivtt,
10195            gtitc::Ivtt,
10196            Gtitc_SPEC,
10197            crate::common::RW,
10198        >::from_register(self, 0)
10199    }
10200
10201    #[doc = "GTADTRA Register A/D Conversion Start Request Link"]
10202    #[inline(always)]
10203    pub fn adtal(
10204        self,
10205    ) -> crate::common::RegisterField<
10206        12,
10207        0x1,
10208        1,
10209        0,
10210        gtitc::Adtal,
10211        gtitc::Adtal,
10212        Gtitc_SPEC,
10213        crate::common::RW,
10214    > {
10215        crate::common::RegisterField::<
10216            12,
10217            0x1,
10218            1,
10219            0,
10220            gtitc::Adtal,
10221            gtitc::Adtal,
10222            Gtitc_SPEC,
10223            crate::common::RW,
10224        >::from_register(self, 0)
10225    }
10226
10227    #[doc = "GTADTRB Register A/D Conversion Start Request Link"]
10228    #[inline(always)]
10229    pub fn adtbl(
10230        self,
10231    ) -> crate::common::RegisterField<
10232        14,
10233        0x1,
10234        1,
10235        0,
10236        gtitc::Adtbl,
10237        gtitc::Adtbl,
10238        Gtitc_SPEC,
10239        crate::common::RW,
10240    > {
10241        crate::common::RegisterField::<
10242            14,
10243            0x1,
10244            1,
10245            0,
10246            gtitc::Adtbl,
10247            gtitc::Adtbl,
10248            Gtitc_SPEC,
10249            crate::common::RW,
10250        >::from_register(self, 0)
10251    }
10252}
10253impl ::core::default::Default for Gtitc {
10254    #[inline(always)]
10255    fn default() -> Gtitc {
10256        <crate::RegValueT<Gtitc_SPEC> as RegisterValue<_>>::new(0)
10257    }
10258}
10259pub mod gtitc {
10260
10261    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10262    pub struct Itla_SPEC;
10263    pub type Itla = crate::EnumBitfieldStruct<u8, Itla_SPEC>;
10264    impl Itla {
10265        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10266        pub const _0: Self = Self::new(0);
10267
10268        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10269        pub const _1: Self = Self::new(1);
10270    }
10271    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10272    pub struct Itlb_SPEC;
10273    pub type Itlb = crate::EnumBitfieldStruct<u8, Itlb_SPEC>;
10274    impl Itlb {
10275        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10276        pub const _0: Self = Self::new(0);
10277
10278        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10279        pub const _1: Self = Self::new(1);
10280    }
10281    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10282    pub struct Itlc_SPEC;
10283    pub type Itlc = crate::EnumBitfieldStruct<u8, Itlc_SPEC>;
10284    impl Itlc {
10285        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10286        pub const _0: Self = Self::new(0);
10287
10288        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10289        pub const _1: Self = Self::new(1);
10290    }
10291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10292    pub struct Itld_SPEC;
10293    pub type Itld = crate::EnumBitfieldStruct<u8, Itld_SPEC>;
10294    impl Itld {
10295        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10296        pub const _0: Self = Self::new(0);
10297
10298        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10299        pub const _1: Self = Self::new(1);
10300    }
10301    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10302    pub struct Itle_SPEC;
10303    pub type Itle = crate::EnumBitfieldStruct<u8, Itle_SPEC>;
10304    impl Itle {
10305        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10306        pub const _0: Self = Self::new(0);
10307
10308        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10309        pub const _1: Self = Self::new(1);
10310    }
10311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10312    pub struct Itlf_SPEC;
10313    pub type Itlf = crate::EnumBitfieldStruct<u8, Itlf_SPEC>;
10314    impl Itlf {
10315        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10316        pub const _0: Self = Self::new(0);
10317
10318        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10319        pub const _1: Self = Self::new(1);
10320    }
10321    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10322    pub struct Ivtc_SPEC;
10323    pub type Ivtc = crate::EnumBitfieldStruct<u8, Ivtc_SPEC>;
10324    impl Ivtc {
10325        #[doc = "Skipping is not performed"]
10326        pub const _00: Self = Self::new(0);
10327
10328        #[doc = "Both overflow and underflow for saw waves and crest for triangle waves are counted and skipped"]
10329        pub const _01: Self = Self::new(1);
10330
10331        #[doc = "Both overflow and underflow for saw waves and trough for triangle waves are counted and skipped"]
10332        pub const _10: Self = Self::new(2);
10333    }
10334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10335    pub struct Ivtt_SPEC;
10336    pub type Ivtt = crate::EnumBitfieldStruct<u8, Ivtt_SPEC>;
10337    impl Ivtt {
10338        #[doc = "Skipping is not performed"]
10339        pub const _000: Self = Self::new(0);
10340
10341        #[doc = "Skipping count of 1"]
10342        pub const _001: Self = Self::new(1);
10343
10344        #[doc = "Skipping count of 2"]
10345        pub const _010: Self = Self::new(2);
10346
10347        #[doc = "Skipping count of 3"]
10348        pub const _011: Self = Self::new(3);
10349
10350        #[doc = "Skipping count of 4"]
10351        pub const _100: Self = Self::new(4);
10352
10353        #[doc = "Skipping count of 5"]
10354        pub const _101: Self = Self::new(5);
10355
10356        #[doc = "Skipping count of 6"]
10357        pub const _110: Self = Self::new(6);
10358
10359        #[doc = "Skipping count of 7"]
10360        pub const _111: Self = Self::new(7);
10361    }
10362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10363    pub struct Adtal_SPEC;
10364    pub type Adtal = crate::EnumBitfieldStruct<u8, Adtal_SPEC>;
10365    impl Adtal {
10366        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10367        pub const _0: Self = Self::new(0);
10368
10369        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10370        pub const _1: Self = Self::new(1);
10371    }
10372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10373    pub struct Adtbl_SPEC;
10374    pub type Adtbl = crate::EnumBitfieldStruct<u8, Adtbl_SPEC>;
10375    impl Adtbl {
10376        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10377        pub const _0: Self = Self::new(0);
10378
10379        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10380        pub const _1: Self = Self::new(1);
10381    }
10382}
10383#[doc(hidden)]
10384#[derive(Copy, Clone, Eq, PartialEq)]
10385pub struct Gtcnt_SPEC;
10386impl crate::sealed::RegSpec for Gtcnt_SPEC {
10387    type DataType = u32;
10388}
10389
10390#[doc = "General PWM Timer Counter"]
10391pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
10392
10393impl NoBitfieldReg<Gtcnt_SPEC> for Gtcnt {}
10394impl ::core::default::Default for Gtcnt {
10395    #[inline(always)]
10396    fn default() -> Gtcnt {
10397        <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
10398    }
10399}
10400
10401#[doc(hidden)]
10402#[derive(Copy, Clone, Eq, PartialEq)]
10403pub struct Gtccra_SPEC;
10404impl crate::sealed::RegSpec for Gtccra_SPEC {
10405    type DataType = u32;
10406}
10407
10408#[doc = "General PWM Timer Compare Capture Register A"]
10409pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
10410
10411impl NoBitfieldReg<Gtccra_SPEC> for Gtccra {}
10412impl ::core::default::Default for Gtccra {
10413    #[inline(always)]
10414    fn default() -> Gtccra {
10415        <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(65535)
10416    }
10417}
10418
10419#[doc(hidden)]
10420#[derive(Copy, Clone, Eq, PartialEq)]
10421pub struct Gtccrb_SPEC;
10422impl crate::sealed::RegSpec for Gtccrb_SPEC {
10423    type DataType = u32;
10424}
10425
10426#[doc = "General PWM Timer Compare Capture Register B"]
10427pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
10428
10429impl NoBitfieldReg<Gtccrb_SPEC> for Gtccrb {}
10430impl ::core::default::Default for Gtccrb {
10431    #[inline(always)]
10432    fn default() -> Gtccrb {
10433        <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(65535)
10434    }
10435}
10436
10437#[doc(hidden)]
10438#[derive(Copy, Clone, Eq, PartialEq)]
10439pub struct Gtccrc_SPEC;
10440impl crate::sealed::RegSpec for Gtccrc_SPEC {
10441    type DataType = u32;
10442}
10443
10444#[doc = "General PWM Timer Compare Capture Register C"]
10445pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
10446
10447impl NoBitfieldReg<Gtccrc_SPEC> for Gtccrc {}
10448impl ::core::default::Default for Gtccrc {
10449    #[inline(always)]
10450    fn default() -> Gtccrc {
10451        <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(65535)
10452    }
10453}
10454
10455#[doc(hidden)]
10456#[derive(Copy, Clone, Eq, PartialEq)]
10457pub struct Gtccre_SPEC;
10458impl crate::sealed::RegSpec for Gtccre_SPEC {
10459    type DataType = u32;
10460}
10461
10462#[doc = "General PWM Timer Compare Capture Register E"]
10463pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
10464
10465impl NoBitfieldReg<Gtccre_SPEC> for Gtccre {}
10466impl ::core::default::Default for Gtccre {
10467    #[inline(always)]
10468    fn default() -> Gtccre {
10469        <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(65535)
10470    }
10471}
10472
10473#[doc(hidden)]
10474#[derive(Copy, Clone, Eq, PartialEq)]
10475pub struct Gtccrd_SPEC;
10476impl crate::sealed::RegSpec for Gtccrd_SPEC {
10477    type DataType = u32;
10478}
10479
10480#[doc = "General PWM Timer Compare Capture Register D"]
10481pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
10482
10483impl NoBitfieldReg<Gtccrd_SPEC> for Gtccrd {}
10484impl ::core::default::Default for Gtccrd {
10485    #[inline(always)]
10486    fn default() -> Gtccrd {
10487        <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(65535)
10488    }
10489}
10490
10491#[doc(hidden)]
10492#[derive(Copy, Clone, Eq, PartialEq)]
10493pub struct Gtccrf_SPEC;
10494impl crate::sealed::RegSpec for Gtccrf_SPEC {
10495    type DataType = u32;
10496}
10497
10498#[doc = "General PWM Timer Compare Capture Register F"]
10499pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
10500
10501impl NoBitfieldReg<Gtccrf_SPEC> for Gtccrf {}
10502impl ::core::default::Default for Gtccrf {
10503    #[inline(always)]
10504    fn default() -> Gtccrf {
10505        <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(65535)
10506    }
10507}
10508
10509#[doc(hidden)]
10510#[derive(Copy, Clone, Eq, PartialEq)]
10511pub struct Gtpr_SPEC;
10512impl crate::sealed::RegSpec for Gtpr_SPEC {
10513    type DataType = u32;
10514}
10515
10516#[doc = "General PWM Timer Cycle Setting Register"]
10517pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
10518
10519impl NoBitfieldReg<Gtpr_SPEC> for Gtpr {}
10520impl ::core::default::Default for Gtpr {
10521    #[inline(always)]
10522    fn default() -> Gtpr {
10523        <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(65535)
10524    }
10525}
10526
10527#[doc(hidden)]
10528#[derive(Copy, Clone, Eq, PartialEq)]
10529pub struct Gtpbr_SPEC;
10530impl crate::sealed::RegSpec for Gtpbr_SPEC {
10531    type DataType = u32;
10532}
10533
10534#[doc = "General PWM Timer Cycle Setting Buffer Register"]
10535pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
10536
10537impl NoBitfieldReg<Gtpbr_SPEC> for Gtpbr {}
10538impl ::core::default::Default for Gtpbr {
10539    #[inline(always)]
10540    fn default() -> Gtpbr {
10541        <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(65535)
10542    }
10543}
10544
10545#[doc(hidden)]
10546#[derive(Copy, Clone, Eq, PartialEq)]
10547pub struct Gtpdbr_SPEC;
10548impl crate::sealed::RegSpec for Gtpdbr_SPEC {
10549    type DataType = u32;
10550}
10551
10552#[doc = "General PWM Timer Period Setting Double-Buffer Register"]
10553pub type Gtpdbr = crate::RegValueT<Gtpdbr_SPEC>;
10554
10555impl NoBitfieldReg<Gtpdbr_SPEC> for Gtpdbr {}
10556impl ::core::default::Default for Gtpdbr {
10557    #[inline(always)]
10558    fn default() -> Gtpdbr {
10559        <crate::RegValueT<Gtpdbr_SPEC> as RegisterValue<_>>::new(65535)
10560    }
10561}
10562
10563#[doc(hidden)]
10564#[derive(Copy, Clone, Eq, PartialEq)]
10565pub struct Gtadtra_SPEC;
10566impl crate::sealed::RegSpec for Gtadtra_SPEC {
10567    type DataType = u32;
10568}
10569
10570#[doc = "A/D Conversion Start Request Timing Register A"]
10571pub type Gtadtra = crate::RegValueT<Gtadtra_SPEC>;
10572
10573impl NoBitfieldReg<Gtadtra_SPEC> for Gtadtra {}
10574impl ::core::default::Default for Gtadtra {
10575    #[inline(always)]
10576    fn default() -> Gtadtra {
10577        <crate::RegValueT<Gtadtra_SPEC> as RegisterValue<_>>::new(65535)
10578    }
10579}
10580
10581#[doc(hidden)]
10582#[derive(Copy, Clone, Eq, PartialEq)]
10583pub struct Gtadtbra_SPEC;
10584impl crate::sealed::RegSpec for Gtadtbra_SPEC {
10585    type DataType = u32;
10586}
10587
10588#[doc = "A/D Conversion Start Request Timing Buffer Register A"]
10589pub type Gtadtbra = crate::RegValueT<Gtadtbra_SPEC>;
10590
10591impl NoBitfieldReg<Gtadtbra_SPEC> for Gtadtbra {}
10592impl ::core::default::Default for Gtadtbra {
10593    #[inline(always)]
10594    fn default() -> Gtadtbra {
10595        <crate::RegValueT<Gtadtbra_SPEC> as RegisterValue<_>>::new(65535)
10596    }
10597}
10598
10599#[doc(hidden)]
10600#[derive(Copy, Clone, Eq, PartialEq)]
10601pub struct Gtadtdbra_SPEC;
10602impl crate::sealed::RegSpec for Gtadtdbra_SPEC {
10603    type DataType = u32;
10604}
10605
10606#[doc = "A/D Conversion Start Request Timing Double-Buffer Register A"]
10607pub type Gtadtdbra = crate::RegValueT<Gtadtdbra_SPEC>;
10608
10609impl NoBitfieldReg<Gtadtdbra_SPEC> for Gtadtdbra {}
10610impl ::core::default::Default for Gtadtdbra {
10611    #[inline(always)]
10612    fn default() -> Gtadtdbra {
10613        <crate::RegValueT<Gtadtdbra_SPEC> as RegisterValue<_>>::new(65535)
10614    }
10615}
10616
10617#[doc(hidden)]
10618#[derive(Copy, Clone, Eq, PartialEq)]
10619pub struct Gtadtrb_SPEC;
10620impl crate::sealed::RegSpec for Gtadtrb_SPEC {
10621    type DataType = u32;
10622}
10623
10624#[doc = "A/D Conversion Start Request Timing Register B"]
10625pub type Gtadtrb = crate::RegValueT<Gtadtrb_SPEC>;
10626
10627impl NoBitfieldReg<Gtadtrb_SPEC> for Gtadtrb {}
10628impl ::core::default::Default for Gtadtrb {
10629    #[inline(always)]
10630    fn default() -> Gtadtrb {
10631        <crate::RegValueT<Gtadtrb_SPEC> as RegisterValue<_>>::new(65535)
10632    }
10633}
10634
10635#[doc(hidden)]
10636#[derive(Copy, Clone, Eq, PartialEq)]
10637pub struct Gtadtbrb_SPEC;
10638impl crate::sealed::RegSpec for Gtadtbrb_SPEC {
10639    type DataType = u32;
10640}
10641
10642#[doc = "A/D Conversion Start Request Timing Buffer Register B"]
10643pub type Gtadtbrb = crate::RegValueT<Gtadtbrb_SPEC>;
10644
10645impl NoBitfieldReg<Gtadtbrb_SPEC> for Gtadtbrb {}
10646impl ::core::default::Default for Gtadtbrb {
10647    #[inline(always)]
10648    fn default() -> Gtadtbrb {
10649        <crate::RegValueT<Gtadtbrb_SPEC> as RegisterValue<_>>::new(65535)
10650    }
10651}
10652
10653#[doc(hidden)]
10654#[derive(Copy, Clone, Eq, PartialEq)]
10655pub struct Gtadtdbrb_SPEC;
10656impl crate::sealed::RegSpec for Gtadtdbrb_SPEC {
10657    type DataType = u32;
10658}
10659
10660#[doc = "A/D Conversion Start Request Timing Double-Buffer Register B"]
10661pub type Gtadtdbrb = crate::RegValueT<Gtadtdbrb_SPEC>;
10662
10663impl NoBitfieldReg<Gtadtdbrb_SPEC> for Gtadtdbrb {}
10664impl ::core::default::Default for Gtadtdbrb {
10665    #[inline(always)]
10666    fn default() -> Gtadtdbrb {
10667        <crate::RegValueT<Gtadtdbrb_SPEC> as RegisterValue<_>>::new(65535)
10668    }
10669}
10670
10671#[doc(hidden)]
10672#[derive(Copy, Clone, Eq, PartialEq)]
10673pub struct Gtdtcr_SPEC;
10674impl crate::sealed::RegSpec for Gtdtcr_SPEC {
10675    type DataType = u32;
10676}
10677
10678#[doc = "General PWM Timer Dead Time Control Register"]
10679pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
10680
10681impl Gtdtcr {
10682    #[doc = "Negative-Phase Waveform Setting"]
10683    #[inline(always)]
10684    pub fn tde(
10685        self,
10686    ) -> crate::common::RegisterField<
10687        0,
10688        0x1,
10689        1,
10690        0,
10691        gtdtcr::Tde,
10692        gtdtcr::Tde,
10693        Gtdtcr_SPEC,
10694        crate::common::RW,
10695    > {
10696        crate::common::RegisterField::<
10697            0,
10698            0x1,
10699            1,
10700            0,
10701            gtdtcr::Tde,
10702            gtdtcr::Tde,
10703            Gtdtcr_SPEC,
10704            crate::common::RW,
10705        >::from_register(self, 0)
10706    }
10707
10708    #[doc = "GTDVU Register Buffer Operation Enable"]
10709    #[inline(always)]
10710    pub fn tdbue(
10711        self,
10712    ) -> crate::common::RegisterField<
10713        4,
10714        0x1,
10715        1,
10716        0,
10717        gtdtcr::Tdbue,
10718        gtdtcr::Tdbue,
10719        Gtdtcr_SPEC,
10720        crate::common::RW,
10721    > {
10722        crate::common::RegisterField::<
10723            4,
10724            0x1,
10725            1,
10726            0,
10727            gtdtcr::Tdbue,
10728            gtdtcr::Tdbue,
10729            Gtdtcr_SPEC,
10730            crate::common::RW,
10731        >::from_register(self, 0)
10732    }
10733
10734    #[doc = "GTDVD Register Buffer Operation Enable"]
10735    #[inline(always)]
10736    pub fn tdbde(
10737        self,
10738    ) -> crate::common::RegisterField<
10739        5,
10740        0x1,
10741        1,
10742        0,
10743        gtdtcr::Tdbde,
10744        gtdtcr::Tdbde,
10745        Gtdtcr_SPEC,
10746        crate::common::RW,
10747    > {
10748        crate::common::RegisterField::<
10749            5,
10750            0x1,
10751            1,
10752            0,
10753            gtdtcr::Tdbde,
10754            gtdtcr::Tdbde,
10755            Gtdtcr_SPEC,
10756            crate::common::RW,
10757        >::from_register(self, 0)
10758    }
10759
10760    #[doc = "GTDVD Register Setting"]
10761    #[inline(always)]
10762    pub fn tdfer(
10763        self,
10764    ) -> crate::common::RegisterField<
10765        8,
10766        0x1,
10767        1,
10768        0,
10769        gtdtcr::Tdfer,
10770        gtdtcr::Tdfer,
10771        Gtdtcr_SPEC,
10772        crate::common::RW,
10773    > {
10774        crate::common::RegisterField::<
10775            8,
10776            0x1,
10777            1,
10778            0,
10779            gtdtcr::Tdfer,
10780            gtdtcr::Tdfer,
10781            Gtdtcr_SPEC,
10782            crate::common::RW,
10783        >::from_register(self, 0)
10784    }
10785}
10786impl ::core::default::Default for Gtdtcr {
10787    #[inline(always)]
10788    fn default() -> Gtdtcr {
10789        <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
10790    }
10791}
10792pub mod gtdtcr {
10793
10794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10795    pub struct Tde_SPEC;
10796    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
10797    impl Tde {
10798        #[doc = "GTCCRB is set without using DTDVU and GTDVD"]
10799        pub const _0: Self = Self::new(0);
10800
10801        #[doc = "DTDVU and GTDVD are used to set the compare match value for negative-phase waveform with dead time automatically in GTCCRB"]
10802        pub const _1: Self = Self::new(1);
10803    }
10804    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10805    pub struct Tdbue_SPEC;
10806    pub type Tdbue = crate::EnumBitfieldStruct<u8, Tdbue_SPEC>;
10807    impl Tdbue {
10808        #[doc = "GTDVU register buffer operation is disabled"]
10809        pub const _0: Self = Self::new(0);
10810
10811        #[doc = "GTDVU register buffer operation is enabled"]
10812        pub const _1: Self = Self::new(1);
10813    }
10814    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10815    pub struct Tdbde_SPEC;
10816    pub type Tdbde = crate::EnumBitfieldStruct<u8, Tdbde_SPEC>;
10817    impl Tdbde {
10818        #[doc = "GTDVD register buffer operation is disabled"]
10819        pub const _0: Self = Self::new(0);
10820
10821        #[doc = "GTDVD register buffer operation is enabled"]
10822        pub const _1: Self = Self::new(1);
10823    }
10824    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10825    pub struct Tdfer_SPEC;
10826    pub type Tdfer = crate::EnumBitfieldStruct<u8, Tdfer_SPEC>;
10827    impl Tdfer {
10828        #[doc = "GTDVU and GTDVD registers are set separately."]
10829        pub const _0: Self = Self::new(0);
10830
10831        #[doc = "The value written to GTDVU register is automatically set to GTDVD register"]
10832        pub const _1: Self = Self::new(1);
10833    }
10834}
10835#[doc(hidden)]
10836#[derive(Copy, Clone, Eq, PartialEq)]
10837pub struct Gtdvu_SPEC;
10838impl crate::sealed::RegSpec for Gtdvu_SPEC {
10839    type DataType = u32;
10840}
10841
10842#[doc = "General PWM Timer Dead Time Value Register U"]
10843pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
10844
10845impl NoBitfieldReg<Gtdvu_SPEC> for Gtdvu {}
10846impl ::core::default::Default for Gtdvu {
10847    #[inline(always)]
10848    fn default() -> Gtdvu {
10849        <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(65535)
10850    }
10851}
10852
10853#[doc(hidden)]
10854#[derive(Copy, Clone, Eq, PartialEq)]
10855pub struct Gtdvd_SPEC;
10856impl crate::sealed::RegSpec for Gtdvd_SPEC {
10857    type DataType = u32;
10858}
10859
10860#[doc = "General PWM Timer Dead Time Value Register D"]
10861pub type Gtdvd = crate::RegValueT<Gtdvd_SPEC>;
10862
10863impl NoBitfieldReg<Gtdvd_SPEC> for Gtdvd {}
10864impl ::core::default::Default for Gtdvd {
10865    #[inline(always)]
10866    fn default() -> Gtdvd {
10867        <crate::RegValueT<Gtdvd_SPEC> as RegisterValue<_>>::new(65535)
10868    }
10869}
10870
10871#[doc(hidden)]
10872#[derive(Copy, Clone, Eq, PartialEq)]
10873pub struct Gtdbu_SPEC;
10874impl crate::sealed::RegSpec for Gtdbu_SPEC {
10875    type DataType = u32;
10876}
10877
10878#[doc = "General PWM Timer Dead Time Buffer Register U"]
10879pub type Gtdbu = crate::RegValueT<Gtdbu_SPEC>;
10880
10881impl NoBitfieldReg<Gtdbu_SPEC> for Gtdbu {}
10882impl ::core::default::Default for Gtdbu {
10883    #[inline(always)]
10884    fn default() -> Gtdbu {
10885        <crate::RegValueT<Gtdbu_SPEC> as RegisterValue<_>>::new(65535)
10886    }
10887}
10888
10889#[doc(hidden)]
10890#[derive(Copy, Clone, Eq, PartialEq)]
10891pub struct Gtdbd_SPEC;
10892impl crate::sealed::RegSpec for Gtdbd_SPEC {
10893    type DataType = u32;
10894}
10895
10896#[doc = "General PWM Timer Dead Time Buffer Register D"]
10897pub type Gtdbd = crate::RegValueT<Gtdbd_SPEC>;
10898
10899impl NoBitfieldReg<Gtdbd_SPEC> for Gtdbd {}
10900impl ::core::default::Default for Gtdbd {
10901    #[inline(always)]
10902    fn default() -> Gtdbd {
10903        <crate::RegValueT<Gtdbd_SPEC> as RegisterValue<_>>::new(65535)
10904    }
10905}
10906
10907#[doc(hidden)]
10908#[derive(Copy, Clone, Eq, PartialEq)]
10909pub struct Gtsos_SPEC;
10910impl crate::sealed::RegSpec for Gtsos_SPEC {
10911    type DataType = u32;
10912}
10913
10914#[doc = "General PWM Timer Output Protection Function Status Register"]
10915pub type Gtsos = crate::RegValueT<Gtsos_SPEC>;
10916
10917impl Gtsos {
10918    #[doc = "Output Protection Function Status"]
10919    #[inline(always)]
10920    pub fn sos(
10921        self,
10922    ) -> crate::common::RegisterField<
10923        0,
10924        0x3,
10925        1,
10926        0,
10927        gtsos::Sos,
10928        gtsos::Sos,
10929        Gtsos_SPEC,
10930        crate::common::R,
10931    > {
10932        crate::common::RegisterField::<
10933            0,
10934            0x3,
10935            1,
10936            0,
10937            gtsos::Sos,
10938            gtsos::Sos,
10939            Gtsos_SPEC,
10940            crate::common::R,
10941        >::from_register(self, 0)
10942    }
10943}
10944impl ::core::default::Default for Gtsos {
10945    #[inline(always)]
10946    fn default() -> Gtsos {
10947        <crate::RegValueT<Gtsos_SPEC> as RegisterValue<_>>::new(0)
10948    }
10949}
10950pub mod gtsos {
10951
10952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10953    pub struct Sos_SPEC;
10954    pub type Sos = crate::EnumBitfieldStruct<u8, Sos_SPEC>;
10955    impl Sos {
10956        #[doc = "Normal operation"]
10957        pub const _00: Self = Self::new(0);
10958
10959        #[doc = "Protected state (GTCCRA = 0 is set during transfer at trough or crest)"]
10960        pub const _01: Self = Self::new(1);
10961
10962        #[doc = "Protected state (GTCCRA ≥ GTPR is set during transfer at trough)"]
10963        pub const _10: Self = Self::new(2);
10964
10965        #[doc = "Protected state (GTCCRA ≥ GTPR is set during transfer at crest)"]
10966        pub const _11: Self = Self::new(3);
10967    }
10968}
10969#[doc(hidden)]
10970#[derive(Copy, Clone, Eq, PartialEq)]
10971pub struct Gtsotr_SPEC;
10972impl crate::sealed::RegSpec for Gtsotr_SPEC {
10973    type DataType = u32;
10974}
10975
10976#[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
10977pub type Gtsotr = crate::RegValueT<Gtsotr_SPEC>;
10978
10979impl Gtsotr {
10980    #[doc = "Output Protection Function Temporary Release"]
10981    #[inline(always)]
10982    pub fn sotr(
10983        self,
10984    ) -> crate::common::RegisterField<
10985        0,
10986        0x1,
10987        1,
10988        0,
10989        gtsotr::Sotr,
10990        gtsotr::Sotr,
10991        Gtsotr_SPEC,
10992        crate::common::RW,
10993    > {
10994        crate::common::RegisterField::<
10995            0,
10996            0x1,
10997            1,
10998            0,
10999            gtsotr::Sotr,
11000            gtsotr::Sotr,
11001            Gtsotr_SPEC,
11002            crate::common::RW,
11003        >::from_register(self, 0)
11004    }
11005}
11006impl ::core::default::Default for Gtsotr {
11007    #[inline(always)]
11008    fn default() -> Gtsotr {
11009        <crate::RegValueT<Gtsotr_SPEC> as RegisterValue<_>>::new(0)
11010    }
11011}
11012pub mod gtsotr {
11013
11014    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11015    pub struct Sotr_SPEC;
11016    pub type Sotr = crate::EnumBitfieldStruct<u8, Sotr_SPEC>;
11017    impl Sotr {
11018        #[doc = "Protected state is not released"]
11019        pub const _0: Self = Self::new(0);
11020
11021        #[doc = "Protected state is released"]
11022        pub const _1: Self = Self::new(1);
11023    }
11024}
11025#[doc(hidden)]
11026#[derive(Copy, Clone, Eq, PartialEq)]
11027pub struct Gtadsmr_SPEC;
11028impl crate::sealed::RegSpec for Gtadsmr_SPEC {
11029    type DataType = u32;
11030}
11031
11032#[doc = "General PWM Timer A/D Conversion Start Request Signal Monitoring Register"]
11033pub type Gtadsmr = crate::RegValueT<Gtadsmr_SPEC>;
11034
11035impl Gtadsmr {
11036    #[doc = "A/D Conversion Start Request Signal Monitor 0 Selection"]
11037    #[inline(always)]
11038    pub fn adsms0(
11039        self,
11040    ) -> crate::common::RegisterField<
11041        0,
11042        0x3,
11043        1,
11044        0,
11045        gtadsmr::Adsms0,
11046        gtadsmr::Adsms0,
11047        Gtadsmr_SPEC,
11048        crate::common::RW,
11049    > {
11050        crate::common::RegisterField::<
11051            0,
11052            0x3,
11053            1,
11054            0,
11055            gtadsmr::Adsms0,
11056            gtadsmr::Adsms0,
11057            Gtadsmr_SPEC,
11058            crate::common::RW,
11059        >::from_register(self, 0)
11060    }
11061
11062    #[doc = "A/D Conversion Start Request Signal Monitor 0 Output Enabling"]
11063    #[inline(always)]
11064    pub fn adsmen0(
11065        self,
11066    ) -> crate::common::RegisterField<
11067        8,
11068        0x1,
11069        1,
11070        0,
11071        gtadsmr::Adsmen0,
11072        gtadsmr::Adsmen0,
11073        Gtadsmr_SPEC,
11074        crate::common::RW,
11075    > {
11076        crate::common::RegisterField::<
11077            8,
11078            0x1,
11079            1,
11080            0,
11081            gtadsmr::Adsmen0,
11082            gtadsmr::Adsmen0,
11083            Gtadsmr_SPEC,
11084            crate::common::RW,
11085        >::from_register(self, 0)
11086    }
11087
11088    #[doc = "A/D Conversion Start Request Signal Monitor 1 Selection"]
11089    #[inline(always)]
11090    pub fn adsms1(
11091        self,
11092    ) -> crate::common::RegisterField<
11093        16,
11094        0x3,
11095        1,
11096        0,
11097        gtadsmr::Adsms1,
11098        gtadsmr::Adsms1,
11099        Gtadsmr_SPEC,
11100        crate::common::RW,
11101    > {
11102        crate::common::RegisterField::<
11103            16,
11104            0x3,
11105            1,
11106            0,
11107            gtadsmr::Adsms1,
11108            gtadsmr::Adsms1,
11109            Gtadsmr_SPEC,
11110            crate::common::RW,
11111        >::from_register(self, 0)
11112    }
11113
11114    #[doc = "A/D Conversion Start Request Signal Monitor 1 Output Enabling"]
11115    #[inline(always)]
11116    pub fn adsmen1(
11117        self,
11118    ) -> crate::common::RegisterField<
11119        24,
11120        0x1,
11121        1,
11122        0,
11123        gtadsmr::Adsmen1,
11124        gtadsmr::Adsmen1,
11125        Gtadsmr_SPEC,
11126        crate::common::RW,
11127    > {
11128        crate::common::RegisterField::<
11129            24,
11130            0x1,
11131            1,
11132            0,
11133            gtadsmr::Adsmen1,
11134            gtadsmr::Adsmen1,
11135            Gtadsmr_SPEC,
11136            crate::common::RW,
11137        >::from_register(self, 0)
11138    }
11139}
11140impl ::core::default::Default for Gtadsmr {
11141    #[inline(always)]
11142    fn default() -> Gtadsmr {
11143        <crate::RegValueT<Gtadsmr_SPEC> as RegisterValue<_>>::new(0)
11144    }
11145}
11146pub mod gtadsmr {
11147
11148    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11149    pub struct Adsms0_SPEC;
11150    pub type Adsms0 = crate::EnumBitfieldStruct<u8, Adsms0_SPEC>;
11151    impl Adsms0 {
11152        #[doc = "A/D conversion start request signal generated by the GTADTRA register during up-counting"]
11153        pub const _00: Self = Self::new(0);
11154
11155        #[doc = "A/D conversion start request signal generated by the GTADTRA register during down-counting"]
11156        pub const _01: Self = Self::new(1);
11157
11158        #[doc = "A/D conversion start request signal generated by the GTADTRB register during up-counting"]
11159        pub const _10: Self = Self::new(2);
11160
11161        #[doc = "A/D conversion start request signal generated by the GTADTRB register during down-counting"]
11162        pub const _11: Self = Self::new(3);
11163    }
11164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11165    pub struct Adsmen0_SPEC;
11166    pub type Adsmen0 = crate::EnumBitfieldStruct<u8, Adsmen0_SPEC>;
11167    impl Adsmen0 {
11168        #[doc = "Output of A/D conversion start request signal monitor 0 is disabled"]
11169        pub const _0: Self = Self::new(0);
11170
11171        #[doc = "Output of A/D conversion start request signal monitor 0 is enabled"]
11172        pub const _1: Self = Self::new(1);
11173    }
11174    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11175    pub struct Adsms1_SPEC;
11176    pub type Adsms1 = crate::EnumBitfieldStruct<u8, Adsms1_SPEC>;
11177    impl Adsms1 {
11178        #[doc = "A/D conversion start request signal generated by the GTADTRA register during up-counting"]
11179        pub const _00: Self = Self::new(0);
11180
11181        #[doc = "A/D conversion start request signal generated by the GTADTRA register during down-counting"]
11182        pub const _01: Self = Self::new(1);
11183
11184        #[doc = "A/D conversion start request signal generated by the GTADTRB register during up-counting"]
11185        pub const _10: Self = Self::new(2);
11186
11187        #[doc = "A/D conversion start request signal generated by the GTADTRB register during down-counting"]
11188        pub const _11: Self = Self::new(3);
11189    }
11190    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11191    pub struct Adsmen1_SPEC;
11192    pub type Adsmen1 = crate::EnumBitfieldStruct<u8, Adsmen1_SPEC>;
11193    impl Adsmen1 {
11194        #[doc = "Output of A/D conversion start request signal monitor 1 is disabled"]
11195        pub const _0: Self = Self::new(0);
11196
11197        #[doc = "Output of A/D conversion start request signal monitor 1 is enabled"]
11198        pub const _1: Self = Self::new(1);
11199    }
11200}
11201#[doc(hidden)]
11202#[derive(Copy, Clone, Eq, PartialEq)]
11203pub struct Gticlf_SPEC;
11204impl crate::sealed::RegSpec for Gticlf_SPEC {
11205    type DataType = u32;
11206}
11207
11208#[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
11209pub type Gticlf = crate::RegValueT<Gticlf_SPEC>;
11210
11211impl Gticlf {
11212    #[doc = "GTIOCnA Output Logical Operation Function Select"]
11213    #[inline(always)]
11214    pub fn iclfa(
11215        self,
11216    ) -> crate::common::RegisterField<
11217        0,
11218        0x7,
11219        1,
11220        0,
11221        gticlf::Iclfa,
11222        gticlf::Iclfa,
11223        Gticlf_SPEC,
11224        crate::common::RW,
11225    > {
11226        crate::common::RegisterField::<
11227            0,
11228            0x7,
11229            1,
11230            0,
11231            gticlf::Iclfa,
11232            gticlf::Iclfa,
11233            Gticlf_SPEC,
11234            crate::common::RW,
11235        >::from_register(self, 0)
11236    }
11237
11238    #[doc = "Inter Channel Signal C Select"]
11239    #[inline(always)]
11240    pub fn iclfselc(
11241        self,
11242    ) -> crate::common::RegisterField<
11243        4,
11244        0x3f,
11245        1,
11246        0,
11247        gticlf::Iclfselc,
11248        gticlf::Iclfselc,
11249        Gticlf_SPEC,
11250        crate::common::RW,
11251    > {
11252        crate::common::RegisterField::<
11253            4,
11254            0x3f,
11255            1,
11256            0,
11257            gticlf::Iclfselc,
11258            gticlf::Iclfselc,
11259            Gticlf_SPEC,
11260            crate::common::RW,
11261        >::from_register(self, 0)
11262    }
11263
11264    #[doc = "GTIOCnB Output Logical Operation Function Select"]
11265    #[inline(always)]
11266    pub fn iclfb(
11267        self,
11268    ) -> crate::common::RegisterField<
11269        16,
11270        0x7,
11271        1,
11272        0,
11273        gticlf::Iclfb,
11274        gticlf::Iclfb,
11275        Gticlf_SPEC,
11276        crate::common::RW,
11277    > {
11278        crate::common::RegisterField::<
11279            16,
11280            0x7,
11281            1,
11282            0,
11283            gticlf::Iclfb,
11284            gticlf::Iclfb,
11285            Gticlf_SPEC,
11286            crate::common::RW,
11287        >::from_register(self, 0)
11288    }
11289
11290    #[doc = "Inter Channel Signal D Select"]
11291    #[inline(always)]
11292    pub fn iclfseld(
11293        self,
11294    ) -> crate::common::RegisterField<
11295        20,
11296        0x3f,
11297        1,
11298        0,
11299        gticlf::Iclfseld,
11300        gticlf::Iclfseld,
11301        Gticlf_SPEC,
11302        crate::common::RW,
11303    > {
11304        crate::common::RegisterField::<
11305            20,
11306            0x3f,
11307            1,
11308            0,
11309            gticlf::Iclfseld,
11310            gticlf::Iclfseld,
11311            Gticlf_SPEC,
11312            crate::common::RW,
11313        >::from_register(self, 0)
11314    }
11315}
11316impl ::core::default::Default for Gticlf {
11317    #[inline(always)]
11318    fn default() -> Gticlf {
11319        <crate::RegValueT<Gticlf_SPEC> as RegisterValue<_>>::new(0)
11320    }
11321}
11322pub mod gticlf {
11323
11324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11325    pub struct Iclfa_SPEC;
11326    pub type Iclfa = crate::EnumBitfieldStruct<u8, Iclfa_SPEC>;
11327    impl Iclfa {
11328        #[doc = "A (no delay)"]
11329        pub const _000: Self = Self::new(0);
11330
11331        #[doc = "NOT A (no delay)"]
11332        pub const _001: Self = Self::new(1);
11333
11334        #[doc = "C (1PCLKD delay)"]
11335        pub const _010: Self = Self::new(2);
11336
11337        #[doc = "NOT C (1PCLKD delay)"]
11338        pub const _011: Self = Self::new(3);
11339
11340        #[doc = "A AND C (1PCLKD delay)"]
11341        pub const _100: Self = Self::new(4);
11342
11343        #[doc = "A OR C (1PCLKD delay)"]
11344        pub const _101: Self = Self::new(5);
11345
11346        #[doc = "A EXOR C (1PCLKD delay)"]
11347        pub const _110: Self = Self::new(6);
11348
11349        #[doc = "A NOR C (1PCLKD delay)"]
11350        pub const _111: Self = Self::new(7);
11351    }
11352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11353    pub struct Iclfselc_SPEC;
11354    pub type Iclfselc = crate::EnumBitfieldStruct<u8, Iclfselc_SPEC>;
11355    impl Iclfselc {
11356        #[doc = "GTIOC0A"]
11357        pub const _0_X_00: Self = Self::new(0);
11358
11359        #[doc = "GTIOC0B"]
11360        pub const _0_X_01: Self = Self::new(1);
11361
11362        #[doc = "GTIOC1A"]
11363        pub const _0_X_02: Self = Self::new(2);
11364
11365        #[doc = "GTIOC1B"]
11366        pub const _0_X_03: Self = Self::new(3);
11367
11368        #[doc = "GTIOC2A"]
11369        pub const _0_X_04: Self = Self::new(4);
11370
11371        #[doc = "GTIOC2B"]
11372        pub const _0_X_05: Self = Self::new(5);
11373
11374        #[doc = "GTIOC3A"]
11375        pub const _0_X_06: Self = Self::new(6);
11376
11377        #[doc = "GTIOC3B"]
11378        pub const _0_X_07: Self = Self::new(7);
11379
11380        #[doc = "GTIOC4A"]
11381        pub const _0_X_08: Self = Self::new(8);
11382
11383        #[doc = "GTIOC4B"]
11384        pub const _0_X_09: Self = Self::new(9);
11385
11386        #[doc = "GTIOC5A"]
11387        pub const _0_X_0_A: Self = Self::new(10);
11388
11389        #[doc = "GTIOC5B"]
11390        pub const _0_X_0_B: Self = Self::new(11);
11391    }
11392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11393    pub struct Iclfb_SPEC;
11394    pub type Iclfb = crate::EnumBitfieldStruct<u8, Iclfb_SPEC>;
11395    impl Iclfb {
11396        #[doc = "B (no delay)"]
11397        pub const _000: Self = Self::new(0);
11398
11399        #[doc = "NOT B (no delay)"]
11400        pub const _001: Self = Self::new(1);
11401
11402        #[doc = "D (1PCLKD delay)"]
11403        pub const _010: Self = Self::new(2);
11404
11405        #[doc = "NOT D (1PCLKD delay)"]
11406        pub const _011: Self = Self::new(3);
11407
11408        #[doc = "B AND D (1PCLKD delay)"]
11409        pub const _100: Self = Self::new(4);
11410
11411        #[doc = "B OR D (1PCLKD delay)"]
11412        pub const _101: Self = Self::new(5);
11413
11414        #[doc = "B EXOR D (1PCLKD delay)"]
11415        pub const _110: Self = Self::new(6);
11416
11417        #[doc = "B NOR D (1PCLKD delay)"]
11418        pub const _111: Self = Self::new(7);
11419    }
11420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11421    pub struct Iclfseld_SPEC;
11422    pub type Iclfseld = crate::EnumBitfieldStruct<u8, Iclfseld_SPEC>;
11423    impl Iclfseld {
11424        #[doc = "GTIOC0A"]
11425        pub const _0_X_00: Self = Self::new(0);
11426
11427        #[doc = "GTIOC0B"]
11428        pub const _0_X_01: Self = Self::new(1);
11429
11430        #[doc = "GTIOC1A"]
11431        pub const _0_X_02: Self = Self::new(2);
11432
11433        #[doc = "GTIOC1B"]
11434        pub const _0_X_03: Self = Self::new(3);
11435
11436        #[doc = "GTIOC2A"]
11437        pub const _0_X_04: Self = Self::new(4);
11438
11439        #[doc = "GTIOC2B"]
11440        pub const _0_X_05: Self = Self::new(5);
11441
11442        #[doc = "GTIOC3A"]
11443        pub const _0_X_06: Self = Self::new(6);
11444
11445        #[doc = "GTIOC3B"]
11446        pub const _0_X_07: Self = Self::new(7);
11447
11448        #[doc = "GTIOC4A"]
11449        pub const _0_X_08: Self = Self::new(8);
11450
11451        #[doc = "GTIOC4B"]
11452        pub const _0_X_09: Self = Self::new(9);
11453
11454        #[doc = "GTIOC5A"]
11455        pub const _0_X_0_A: Self = Self::new(10);
11456
11457        #[doc = "GTIOC5B"]
11458        pub const _0_X_0_B: Self = Self::new(11);
11459    }
11460}
11461#[doc(hidden)]
11462#[derive(Copy, Clone, Eq, PartialEq)]
11463pub struct Gtpc_SPEC;
11464impl crate::sealed::RegSpec for Gtpc_SPEC {
11465    type DataType = u32;
11466}
11467
11468#[doc = "General PWM Timer Period Count Register"]
11469pub type Gtpc = crate::RegValueT<Gtpc_SPEC>;
11470
11471impl Gtpc {
11472    #[doc = "Period Count Function Enable"]
11473    #[inline(always)]
11474    pub fn pcen(
11475        self,
11476    ) -> crate::common::RegisterField<
11477        0,
11478        0x1,
11479        1,
11480        0,
11481        gtpc::Pcen,
11482        gtpc::Pcen,
11483        Gtpc_SPEC,
11484        crate::common::RW,
11485    > {
11486        crate::common::RegisterField::<
11487            0,
11488            0x1,
11489            1,
11490            0,
11491            gtpc::Pcen,
11492            gtpc::Pcen,
11493            Gtpc_SPEC,
11494            crate::common::RW,
11495        >::from_register(self, 0)
11496    }
11497
11498    #[doc = "Automatic Stop Function Enable"]
11499    #[inline(always)]
11500    pub fn astp(
11501        self,
11502    ) -> crate::common::RegisterField<
11503        8,
11504        0x1,
11505        1,
11506        0,
11507        gtpc::Astp,
11508        gtpc::Astp,
11509        Gtpc_SPEC,
11510        crate::common::RW,
11511    > {
11512        crate::common::RegisterField::<
11513            8,
11514            0x1,
11515            1,
11516            0,
11517            gtpc::Astp,
11518            gtpc::Astp,
11519            Gtpc_SPEC,
11520            crate::common::RW,
11521        >::from_register(self, 0)
11522    }
11523
11524    #[doc = "Period Counter"]
11525    #[inline(always)]
11526    pub fn pcnt(
11527        self,
11528    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Gtpc_SPEC, crate::common::RW> {
11529        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Gtpc_SPEC,crate::common::RW>::from_register(self,0)
11530    }
11531}
11532impl ::core::default::Default for Gtpc {
11533    #[inline(always)]
11534    fn default() -> Gtpc {
11535        <crate::RegValueT<Gtpc_SPEC> as RegisterValue<_>>::new(0)
11536    }
11537}
11538pub mod gtpc {
11539
11540    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11541    pub struct Pcen_SPEC;
11542    pub type Pcen = crate::EnumBitfieldStruct<u8, Pcen_SPEC>;
11543    impl Pcen {
11544        #[doc = "Period count function is disabled"]
11545        pub const _0: Self = Self::new(0);
11546
11547        #[doc = "Period count function is enabled"]
11548        pub const _1: Self = Self::new(1);
11549    }
11550    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11551    pub struct Astp_SPEC;
11552    pub type Astp = crate::EnumBitfieldStruct<u8, Astp_SPEC>;
11553    impl Astp {
11554        #[doc = "Automatic stop function is disabled"]
11555        pub const _0: Self = Self::new(0);
11556
11557        #[doc = "Automatic stop function is enabled"]
11558        pub const _1: Self = Self::new(1);
11559    }
11560}
11561#[doc(hidden)]
11562#[derive(Copy, Clone, Eq, PartialEq)]
11563pub struct Gtsecsr_SPEC;
11564impl crate::sealed::RegSpec for Gtsecsr_SPEC {
11565    type DataType = u32;
11566}
11567
11568#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
11569pub type Gtsecsr = crate::RegValueT<Gtsecsr_SPEC>;
11570
11571impl Gtsecsr {
11572    #[doc = "Channel 0 Operation Enable Bit Simultaneous Control Channel Select"]
11573    #[inline(always)]
11574    pub fn secsel0(
11575        self,
11576    ) -> crate::common::RegisterField<
11577        0,
11578        0x1,
11579        1,
11580        0,
11581        gtsecsr::Secsel0,
11582        gtsecsr::Secsel0,
11583        Gtsecsr_SPEC,
11584        crate::common::RW,
11585    > {
11586        crate::common::RegisterField::<
11587            0,
11588            0x1,
11589            1,
11590            0,
11591            gtsecsr::Secsel0,
11592            gtsecsr::Secsel0,
11593            Gtsecsr_SPEC,
11594            crate::common::RW,
11595        >::from_register(self, 0)
11596    }
11597
11598    #[doc = "Channel 1 Operation Enable Bit Simultaneous Control Channel Select"]
11599    #[inline(always)]
11600    pub fn secsel1(
11601        self,
11602    ) -> crate::common::RegisterField<
11603        1,
11604        0x1,
11605        1,
11606        0,
11607        gtsecsr::Secsel1,
11608        gtsecsr::Secsel1,
11609        Gtsecsr_SPEC,
11610        crate::common::RW,
11611    > {
11612        crate::common::RegisterField::<
11613            1,
11614            0x1,
11615            1,
11616            0,
11617            gtsecsr::Secsel1,
11618            gtsecsr::Secsel1,
11619            Gtsecsr_SPEC,
11620            crate::common::RW,
11621        >::from_register(self, 0)
11622    }
11623
11624    #[doc = "Channel 2 Operation Enable Bit Simultaneous Control Channel Select"]
11625    #[inline(always)]
11626    pub fn secsel2(
11627        self,
11628    ) -> crate::common::RegisterField<
11629        2,
11630        0x1,
11631        1,
11632        0,
11633        gtsecsr::Secsel2,
11634        gtsecsr::Secsel2,
11635        Gtsecsr_SPEC,
11636        crate::common::RW,
11637    > {
11638        crate::common::RegisterField::<
11639            2,
11640            0x1,
11641            1,
11642            0,
11643            gtsecsr::Secsel2,
11644            gtsecsr::Secsel2,
11645            Gtsecsr_SPEC,
11646            crate::common::RW,
11647        >::from_register(self, 0)
11648    }
11649
11650    #[doc = "Channel 3 Operation Enable Bit Simultaneous Control Channel Select"]
11651    #[inline(always)]
11652    pub fn secsel3(
11653        self,
11654    ) -> crate::common::RegisterField<
11655        3,
11656        0x1,
11657        1,
11658        0,
11659        gtsecsr::Secsel3,
11660        gtsecsr::Secsel3,
11661        Gtsecsr_SPEC,
11662        crate::common::RW,
11663    > {
11664        crate::common::RegisterField::<
11665            3,
11666            0x1,
11667            1,
11668            0,
11669            gtsecsr::Secsel3,
11670            gtsecsr::Secsel3,
11671            Gtsecsr_SPEC,
11672            crate::common::RW,
11673        >::from_register(self, 0)
11674    }
11675
11676    #[doc = "Channel 4 Operation Enable Bit Simultaneous Control Channel Select"]
11677    #[inline(always)]
11678    pub fn secsel4(
11679        self,
11680    ) -> crate::common::RegisterField<
11681        4,
11682        0x1,
11683        1,
11684        0,
11685        gtsecsr::Secsel4,
11686        gtsecsr::Secsel4,
11687        Gtsecsr_SPEC,
11688        crate::common::RW,
11689    > {
11690        crate::common::RegisterField::<
11691            4,
11692            0x1,
11693            1,
11694            0,
11695            gtsecsr::Secsel4,
11696            gtsecsr::Secsel4,
11697            Gtsecsr_SPEC,
11698            crate::common::RW,
11699        >::from_register(self, 0)
11700    }
11701
11702    #[doc = "Channel 5 Operation Enable Bit Simultaneous Control Channel Select"]
11703    #[inline(always)]
11704    pub fn secsel5(
11705        self,
11706    ) -> crate::common::RegisterField<
11707        5,
11708        0x1,
11709        1,
11710        0,
11711        gtsecsr::Secsel5,
11712        gtsecsr::Secsel5,
11713        Gtsecsr_SPEC,
11714        crate::common::RW,
11715    > {
11716        crate::common::RegisterField::<
11717            5,
11718            0x1,
11719            1,
11720            0,
11721            gtsecsr::Secsel5,
11722            gtsecsr::Secsel5,
11723            Gtsecsr_SPEC,
11724            crate::common::RW,
11725        >::from_register(self, 0)
11726    }
11727}
11728impl ::core::default::Default for Gtsecsr {
11729    #[inline(always)]
11730    fn default() -> Gtsecsr {
11731        <crate::RegValueT<Gtsecsr_SPEC> as RegisterValue<_>>::new(0)
11732    }
11733}
11734pub mod gtsecsr {
11735
11736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11737    pub struct Secsel0_SPEC;
11738    pub type Secsel0 = crate::EnumBitfieldStruct<u8, Secsel0_SPEC>;
11739    impl Secsel0 {
11740        #[doc = "Disable simultaneous control"]
11741        pub const _0: Self = Self::new(0);
11742
11743        #[doc = "Enable simultaneous control"]
11744        pub const _1: Self = Self::new(1);
11745    }
11746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11747    pub struct Secsel1_SPEC;
11748    pub type Secsel1 = crate::EnumBitfieldStruct<u8, Secsel1_SPEC>;
11749    impl Secsel1 {
11750        #[doc = "Disable simultaneous control"]
11751        pub const _0: Self = Self::new(0);
11752
11753        #[doc = "Enable simultaneous control"]
11754        pub const _1: Self = Self::new(1);
11755    }
11756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11757    pub struct Secsel2_SPEC;
11758    pub type Secsel2 = crate::EnumBitfieldStruct<u8, Secsel2_SPEC>;
11759    impl Secsel2 {
11760        #[doc = "Disable simultaneous control"]
11761        pub const _0: Self = Self::new(0);
11762
11763        #[doc = "Enable simultaneous control"]
11764        pub const _1: Self = Self::new(1);
11765    }
11766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11767    pub struct Secsel3_SPEC;
11768    pub type Secsel3 = crate::EnumBitfieldStruct<u8, Secsel3_SPEC>;
11769    impl Secsel3 {
11770        #[doc = "Disable simultaneous control"]
11771        pub const _0: Self = Self::new(0);
11772
11773        #[doc = "Enable simultaneous control"]
11774        pub const _1: Self = Self::new(1);
11775    }
11776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11777    pub struct Secsel4_SPEC;
11778    pub type Secsel4 = crate::EnumBitfieldStruct<u8, Secsel4_SPEC>;
11779    impl Secsel4 {
11780        #[doc = "Disable simultaneous control"]
11781        pub const _0: Self = Self::new(0);
11782
11783        #[doc = "Enable simultaneous control"]
11784        pub const _1: Self = Self::new(1);
11785    }
11786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11787    pub struct Secsel5_SPEC;
11788    pub type Secsel5 = crate::EnumBitfieldStruct<u8, Secsel5_SPEC>;
11789    impl Secsel5 {
11790        #[doc = "Disable simultaneous control"]
11791        pub const _0: Self = Self::new(0);
11792
11793        #[doc = "Enable simultaneous control"]
11794        pub const _1: Self = Self::new(1);
11795    }
11796}
11797#[doc(hidden)]
11798#[derive(Copy, Clone, Eq, PartialEq)]
11799pub struct Gtsecr_SPEC;
11800impl crate::sealed::RegSpec for Gtsecr_SPEC {
11801    type DataType = u32;
11802}
11803
11804#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
11805pub type Gtsecr = crate::RegValueT<Gtsecr_SPEC>;
11806
11807impl Gtsecr {
11808    #[doc = "GTCCR Register Buffer Operation Simultaneous Enable"]
11809    #[inline(always)]
11810    pub fn sbdce(
11811        self,
11812    ) -> crate::common::RegisterField<
11813        0,
11814        0x1,
11815        1,
11816        0,
11817        gtsecr::Sbdce,
11818        gtsecr::Sbdce,
11819        Gtsecr_SPEC,
11820        crate::common::RW,
11821    > {
11822        crate::common::RegisterField::<
11823            0,
11824            0x1,
11825            1,
11826            0,
11827            gtsecr::Sbdce,
11828            gtsecr::Sbdce,
11829            Gtsecr_SPEC,
11830            crate::common::RW,
11831        >::from_register(self, 0)
11832    }
11833
11834    #[doc = "GTPR Register Buffer Operation Simultaneous Enable"]
11835    #[inline(always)]
11836    pub fn sbdpe(
11837        self,
11838    ) -> crate::common::RegisterField<
11839        1,
11840        0x1,
11841        1,
11842        0,
11843        gtsecr::Sbdpe,
11844        gtsecr::Sbdpe,
11845        Gtsecr_SPEC,
11846        crate::common::RW,
11847    > {
11848        crate::common::RegisterField::<
11849            1,
11850            0x1,
11851            1,
11852            0,
11853            gtsecr::Sbdpe,
11854            gtsecr::Sbdpe,
11855            Gtsecr_SPEC,
11856            crate::common::RW,
11857        >::from_register(self, 0)
11858    }
11859
11860    #[doc = "GTADTR Register Buffer Operation Simultaneous Enable"]
11861    #[inline(always)]
11862    pub fn sbdae(
11863        self,
11864    ) -> crate::common::RegisterField<
11865        2,
11866        0x1,
11867        1,
11868        0,
11869        gtsecr::Sbdae,
11870        gtsecr::Sbdae,
11871        Gtsecr_SPEC,
11872        crate::common::RW,
11873    > {
11874        crate::common::RegisterField::<
11875            2,
11876            0x1,
11877            1,
11878            0,
11879            gtsecr::Sbdae,
11880            gtsecr::Sbdae,
11881            Gtsecr_SPEC,
11882            crate::common::RW,
11883        >::from_register(self, 0)
11884    }
11885
11886    #[doc = "GTDV Register Buffer Operation Simultaneous Enable"]
11887    #[inline(always)]
11888    pub fn sbdde(
11889        self,
11890    ) -> crate::common::RegisterField<
11891        3,
11892        0x1,
11893        1,
11894        0,
11895        gtsecr::Sbdde,
11896        gtsecr::Sbdde,
11897        Gtsecr_SPEC,
11898        crate::common::RW,
11899    > {
11900        crate::common::RegisterField::<
11901            3,
11902            0x1,
11903            1,
11904            0,
11905            gtsecr::Sbdde,
11906            gtsecr::Sbdde,
11907            Gtsecr_SPEC,
11908            crate::common::RW,
11909        >::from_register(self, 0)
11910    }
11911
11912    #[doc = "GTCCR Register Buffer Operation Simultaneous Disable"]
11913    #[inline(always)]
11914    pub fn sbdcd(
11915        self,
11916    ) -> crate::common::RegisterField<
11917        8,
11918        0x1,
11919        1,
11920        0,
11921        gtsecr::Sbdcd,
11922        gtsecr::Sbdcd,
11923        Gtsecr_SPEC,
11924        crate::common::RW,
11925    > {
11926        crate::common::RegisterField::<
11927            8,
11928            0x1,
11929            1,
11930            0,
11931            gtsecr::Sbdcd,
11932            gtsecr::Sbdcd,
11933            Gtsecr_SPEC,
11934            crate::common::RW,
11935        >::from_register(self, 0)
11936    }
11937
11938    #[doc = "GTPR Register Buffer Operation Simultaneous Disable"]
11939    #[inline(always)]
11940    pub fn sbdpd(
11941        self,
11942    ) -> crate::common::RegisterField<
11943        9,
11944        0x1,
11945        1,
11946        0,
11947        gtsecr::Sbdpd,
11948        gtsecr::Sbdpd,
11949        Gtsecr_SPEC,
11950        crate::common::RW,
11951    > {
11952        crate::common::RegisterField::<
11953            9,
11954            0x1,
11955            1,
11956            0,
11957            gtsecr::Sbdpd,
11958            gtsecr::Sbdpd,
11959            Gtsecr_SPEC,
11960            crate::common::RW,
11961        >::from_register(self, 0)
11962    }
11963
11964    #[doc = "GTADTR Register Buffer Operation Simultaneous Disable"]
11965    #[inline(always)]
11966    pub fn sbdad(
11967        self,
11968    ) -> crate::common::RegisterField<
11969        10,
11970        0x1,
11971        1,
11972        0,
11973        gtsecr::Sbdad,
11974        gtsecr::Sbdad,
11975        Gtsecr_SPEC,
11976        crate::common::RW,
11977    > {
11978        crate::common::RegisterField::<
11979            10,
11980            0x1,
11981            1,
11982            0,
11983            gtsecr::Sbdad,
11984            gtsecr::Sbdad,
11985            Gtsecr_SPEC,
11986            crate::common::RW,
11987        >::from_register(self, 0)
11988    }
11989
11990    #[doc = "GTDV Register Buffer Operation Simultaneous Disable"]
11991    #[inline(always)]
11992    pub fn sbddd(
11993        self,
11994    ) -> crate::common::RegisterField<
11995        11,
11996        0x1,
11997        1,
11998        0,
11999        gtsecr::Sbddd,
12000        gtsecr::Sbddd,
12001        Gtsecr_SPEC,
12002        crate::common::RW,
12003    > {
12004        crate::common::RegisterField::<
12005            11,
12006            0x1,
12007            1,
12008            0,
12009            gtsecr::Sbddd,
12010            gtsecr::Sbddd,
12011            Gtsecr_SPEC,
12012            crate::common::RW,
12013        >::from_register(self, 0)
12014    }
12015
12016    #[doc = "Period Count Function Simultaneous Enable"]
12017    #[inline(always)]
12018    pub fn spce(
12019        self,
12020    ) -> crate::common::RegisterField<
12021        16,
12022        0x1,
12023        1,
12024        0,
12025        gtsecr::Spce,
12026        gtsecr::Spce,
12027        Gtsecr_SPEC,
12028        crate::common::RW,
12029    > {
12030        crate::common::RegisterField::<
12031            16,
12032            0x1,
12033            1,
12034            0,
12035            gtsecr::Spce,
12036            gtsecr::Spce,
12037            Gtsecr_SPEC,
12038            crate::common::RW,
12039        >::from_register(self, 0)
12040    }
12041
12042    #[doc = "Period Count Function Simultaneous Disable"]
12043    #[inline(always)]
12044    pub fn spcd(
12045        self,
12046    ) -> crate::common::RegisterField<
12047        24,
12048        0x1,
12049        1,
12050        0,
12051        gtsecr::Spcd,
12052        gtsecr::Spcd,
12053        Gtsecr_SPEC,
12054        crate::common::RW,
12055    > {
12056        crate::common::RegisterField::<
12057            24,
12058            0x1,
12059            1,
12060            0,
12061            gtsecr::Spcd,
12062            gtsecr::Spcd,
12063            Gtsecr_SPEC,
12064            crate::common::RW,
12065        >::from_register(self, 0)
12066    }
12067}
12068impl ::core::default::Default for Gtsecr {
12069    #[inline(always)]
12070    fn default() -> Gtsecr {
12071        <crate::RegValueT<Gtsecr_SPEC> as RegisterValue<_>>::new(0)
12072    }
12073}
12074pub mod gtsecr {
12075
12076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12077    pub struct Sbdce_SPEC;
12078    pub type Sbdce = crate::EnumBitfieldStruct<u8, Sbdce_SPEC>;
12079    impl Sbdce {
12080        #[doc = "Disable simultaneous enabling GTCCR buffer operations"]
12081        pub const _0: Self = Self::new(0);
12082
12083        #[doc = "Enable GTCCR register buffer operations simultaneously"]
12084        pub const _1: Self = Self::new(1);
12085    }
12086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12087    pub struct Sbdpe_SPEC;
12088    pub type Sbdpe = crate::EnumBitfieldStruct<u8, Sbdpe_SPEC>;
12089    impl Sbdpe {
12090        #[doc = "Disable simultaneous enabling GTPR buffer operations"]
12091        pub const _0: Self = Self::new(0);
12092
12093        #[doc = "Enable GTPR register buffer operations simultaneously"]
12094        pub const _1: Self = Self::new(1);
12095    }
12096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12097    pub struct Sbdae_SPEC;
12098    pub type Sbdae = crate::EnumBitfieldStruct<u8, Sbdae_SPEC>;
12099    impl Sbdae {
12100        #[doc = "Disable simultaneous enabling GTADTR buffer operations"]
12101        pub const _0: Self = Self::new(0);
12102
12103        #[doc = "Enable GTADTR register buffer operations simultaneously"]
12104        pub const _1: Self = Self::new(1);
12105    }
12106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12107    pub struct Sbdde_SPEC;
12108    pub type Sbdde = crate::EnumBitfieldStruct<u8, Sbdde_SPEC>;
12109    impl Sbdde {
12110        #[doc = "Disable simultaneous enabling GTDV buffer operations"]
12111        pub const _0: Self = Self::new(0);
12112
12113        #[doc = "Enable GTDV register buffer operations simultaneously"]
12114        pub const _1: Self = Self::new(1);
12115    }
12116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12117    pub struct Sbdcd_SPEC;
12118    pub type Sbdcd = crate::EnumBitfieldStruct<u8, Sbdcd_SPEC>;
12119    impl Sbdcd {
12120        #[doc = "Disable simultaneous disabling GTCCR buffer operations"]
12121        pub const _0: Self = Self::new(0);
12122
12123        #[doc = "Disable GTCCR register buffer operations simultaneously"]
12124        pub const _1: Self = Self::new(1);
12125    }
12126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12127    pub struct Sbdpd_SPEC;
12128    pub type Sbdpd = crate::EnumBitfieldStruct<u8, Sbdpd_SPEC>;
12129    impl Sbdpd {
12130        #[doc = "Disable simultaneous disabling GTPR buffer operations"]
12131        pub const _0: Self = Self::new(0);
12132
12133        #[doc = "Disable GTPR register buffer operations simultaneously"]
12134        pub const _1: Self = Self::new(1);
12135    }
12136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12137    pub struct Sbdad_SPEC;
12138    pub type Sbdad = crate::EnumBitfieldStruct<u8, Sbdad_SPEC>;
12139    impl Sbdad {
12140        #[doc = "Disable simultaneous disabling GTADTR buffer operations"]
12141        pub const _0: Self = Self::new(0);
12142
12143        #[doc = "Disable GTADTR register buffer operations simultaneously"]
12144        pub const _1: Self = Self::new(1);
12145    }
12146    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12147    pub struct Sbddd_SPEC;
12148    pub type Sbddd = crate::EnumBitfieldStruct<u8, Sbddd_SPEC>;
12149    impl Sbddd {
12150        #[doc = "Disable simultaneous disabling GTDV buffer operations"]
12151        pub const _0: Self = Self::new(0);
12152
12153        #[doc = "Disable GTDV register buffer operations simultaneously"]
12154        pub const _1: Self = Self::new(1);
12155    }
12156    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12157    pub struct Spce_SPEC;
12158    pub type Spce = crate::EnumBitfieldStruct<u8, Spce_SPEC>;
12159    impl Spce {
12160        #[doc = "Disable simultaneous enabling period count function"]
12161        pub const _0: Self = Self::new(0);
12162
12163        #[doc = "Enable period count function simultaneously"]
12164        pub const _1: Self = Self::new(1);
12165    }
12166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12167    pub struct Spcd_SPEC;
12168    pub type Spcd = crate::EnumBitfieldStruct<u8, Spcd_SPEC>;
12169    impl Spcd {
12170        #[doc = "Disable simultaneous disabling period count function"]
12171        pub const _0: Self = Self::new(0);
12172
12173        #[doc = "Disable period count function simultaneously"]
12174        pub const _1: Self = Self::new(1);
12175    }
12176}