1#[doc = "Register `SD_INFO2_MASK` reader"]
2pub struct R(crate::R<SD_INFO2_MASK_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SD_INFO2_MASK_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SD_INFO2_MASK_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SD_INFO2_MASK_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SD_INFO2_MASK` writer"]
17pub struct W(crate::W<SD_INFO2_MASK_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SD_INFO2_MASK_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SD_INFO2_MASK_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SD_INFO2_MASK_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CMDEM` reader - Command Error Interrupt Request Mask"]
38pub type CMDEM_R = crate::BitReader<CMDEM_A>;
39#[doc = "Command Error Interrupt Request Mask\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum CMDEM_A {
42 #[doc = "0: Do not mask command error interrupt request"]
43 _0 = 0,
44 #[doc = "1: Mask command error interrupt request"]
45 _1 = 1,
46}
47impl From<CMDEM_A> for bool {
48 #[inline(always)]
49 fn from(variant: CMDEM_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl CMDEM_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> CMDEM_A {
57 match self.bits {
58 false => CMDEM_A::_0,
59 true => CMDEM_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == CMDEM_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == CMDEM_A::_1
71 }
72}
73#[doc = "Field `CMDEM` writer - Command Error Interrupt Request Mask"]
74pub type CMDEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, CMDEM_A, O>;
75impl<'a, const O: u8> CMDEM_W<'a, O> {
76 #[doc = "Do not mask command error interrupt request"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(CMDEM_A::_0)
80 }
81 #[doc = "Mask command error interrupt request"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(CMDEM_A::_1)
85 }
86}
87#[doc = "Field `CRCEM` reader - CRC Error Interrupt Request Mask"]
88pub type CRCEM_R = crate::BitReader<CRCEM_A>;
89#[doc = "CRC Error Interrupt Request Mask\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum CRCEM_A {
92 #[doc = "0: Do not mask CRC error interrupt request"]
93 _0 = 0,
94 #[doc = "1: Mask CRC error interrupt request"]
95 _1 = 1,
96}
97impl From<CRCEM_A> for bool {
98 #[inline(always)]
99 fn from(variant: CRCEM_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl CRCEM_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> CRCEM_A {
107 match self.bits {
108 false => CRCEM_A::_0,
109 true => CRCEM_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == CRCEM_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == CRCEM_A::_1
121 }
122}
123#[doc = "Field `CRCEM` writer - CRC Error Interrupt Request Mask"]
124pub type CRCEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, CRCEM_A, O>;
125impl<'a, const O: u8> CRCEM_W<'a, O> {
126 #[doc = "Do not mask CRC error interrupt request"]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(CRCEM_A::_0)
130 }
131 #[doc = "Mask CRC error interrupt request"]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(CRCEM_A::_1)
135 }
136}
137#[doc = "Field `ENDEM` reader - End Bit Error Interrupt Request Mask"]
138pub type ENDEM_R = crate::BitReader<ENDEM_A>;
139#[doc = "End Bit Error Interrupt Request Mask\n\nValue on reset: 1"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum ENDEM_A {
142 #[doc = "0: Do not mask end bit detection error interrupt request"]
143 _0 = 0,
144 #[doc = "1: Mask end bit detection error interrupt request"]
145 _1 = 1,
146}
147impl From<ENDEM_A> for bool {
148 #[inline(always)]
149 fn from(variant: ENDEM_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl ENDEM_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> ENDEM_A {
157 match self.bits {
158 false => ENDEM_A::_0,
159 true => ENDEM_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == ENDEM_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == ENDEM_A::_1
171 }
172}
173#[doc = "Field `ENDEM` writer - End Bit Error Interrupt Request Mask"]
174pub type ENDEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, ENDEM_A, O>;
175impl<'a, const O: u8> ENDEM_W<'a, O> {
176 #[doc = "Do not mask end bit detection error interrupt request"]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(ENDEM_A::_0)
180 }
181 #[doc = "Mask end bit detection error interrupt request"]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(ENDEM_A::_1)
185 }
186}
187#[doc = "Field `DTOM` reader - Data Timeout Interrupt Request Mask"]
188pub type DTOM_R = crate::BitReader<DTOM_A>;
189#[doc = "Data Timeout Interrupt Request Mask\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum DTOM_A {
192 #[doc = "0: Do not mask data timeout interrupt request"]
193 _0 = 0,
194 #[doc = "1: Mask data timeout interrupt request"]
195 _1 = 1,
196}
197impl From<DTOM_A> for bool {
198 #[inline(always)]
199 fn from(variant: DTOM_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl DTOM_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> DTOM_A {
207 match self.bits {
208 false => DTOM_A::_0,
209 true => DTOM_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == DTOM_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == DTOM_A::_1
221 }
222}
223#[doc = "Field `DTOM` writer - Data Timeout Interrupt Request Mask"]
224pub type DTOM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, DTOM_A, O>;
225impl<'a, const O: u8> DTOM_W<'a, O> {
226 #[doc = "Do not mask data timeout interrupt request"]
227 #[inline(always)]
228 pub fn _0(self) -> &'a mut W {
229 self.variant(DTOM_A::_0)
230 }
231 #[doc = "Mask data timeout interrupt request"]
232 #[inline(always)]
233 pub fn _1(self) -> &'a mut W {
234 self.variant(DTOM_A::_1)
235 }
236}
237#[doc = "Field `ILWM` reader - SD_BUF0 Register Illegal Write Interrupt Request Mask"]
238pub type ILWM_R = crate::BitReader<ILWM_A>;
239#[doc = "SD_BUF0 Register Illegal Write Interrupt Request Mask\n\nValue on reset: 1"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum ILWM_A {
242 #[doc = "0: Do not mask illegal write detection interrupt request for the SD_BUF0 register"]
243 _0 = 0,
244 #[doc = "1: Mask illegal write detection interrupt request for the SD_BUF0 register"]
245 _1 = 1,
246}
247impl From<ILWM_A> for bool {
248 #[inline(always)]
249 fn from(variant: ILWM_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl ILWM_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> ILWM_A {
257 match self.bits {
258 false => ILWM_A::_0,
259 true => ILWM_A::_1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `_0`"]
263 #[inline(always)]
264 pub fn is_0(&self) -> bool {
265 *self == ILWM_A::_0
266 }
267 #[doc = "Checks if the value of the field is `_1`"]
268 #[inline(always)]
269 pub fn is_1(&self) -> bool {
270 *self == ILWM_A::_1
271 }
272}
273#[doc = "Field `ILWM` writer - SD_BUF0 Register Illegal Write Interrupt Request Mask"]
274pub type ILWM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, ILWM_A, O>;
275impl<'a, const O: u8> ILWM_W<'a, O> {
276 #[doc = "Do not mask illegal write detection interrupt request for the SD_BUF0 register"]
277 #[inline(always)]
278 pub fn _0(self) -> &'a mut W {
279 self.variant(ILWM_A::_0)
280 }
281 #[doc = "Mask illegal write detection interrupt request for the SD_BUF0 register"]
282 #[inline(always)]
283 pub fn _1(self) -> &'a mut W {
284 self.variant(ILWM_A::_1)
285 }
286}
287#[doc = "Field `ILRM` reader - SD_BUF0 Register Illegal Read Interrupt Request Mask"]
288pub type ILRM_R = crate::BitReader<ILRM_A>;
289#[doc = "SD_BUF0 Register Illegal Read Interrupt Request Mask\n\nValue on reset: 1"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum ILRM_A {
292 #[doc = "0: Do not mask illegal read detection interrupt request for the SD_BUF0 register"]
293 _0 = 0,
294 #[doc = "1: Mask illegal read detection interrupt request for the SD_BUF0 register"]
295 _1 = 1,
296}
297impl From<ILRM_A> for bool {
298 #[inline(always)]
299 fn from(variant: ILRM_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl ILRM_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> ILRM_A {
307 match self.bits {
308 false => ILRM_A::_0,
309 true => ILRM_A::_1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `_0`"]
313 #[inline(always)]
314 pub fn is_0(&self) -> bool {
315 *self == ILRM_A::_0
316 }
317 #[doc = "Checks if the value of the field is `_1`"]
318 #[inline(always)]
319 pub fn is_1(&self) -> bool {
320 *self == ILRM_A::_1
321 }
322}
323#[doc = "Field `ILRM` writer - SD_BUF0 Register Illegal Read Interrupt Request Mask"]
324pub type ILRM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, ILRM_A, O>;
325impl<'a, const O: u8> ILRM_W<'a, O> {
326 #[doc = "Do not mask illegal read detection interrupt request for the SD_BUF0 register"]
327 #[inline(always)]
328 pub fn _0(self) -> &'a mut W {
329 self.variant(ILRM_A::_0)
330 }
331 #[doc = "Mask illegal read detection interrupt request for the SD_BUF0 register"]
332 #[inline(always)]
333 pub fn _1(self) -> &'a mut W {
334 self.variant(ILRM_A::_1)
335 }
336}
337#[doc = "Field `RSPTOM` reader - Response Timeout Interrupt Request Mask"]
338pub type RSPTOM_R = crate::BitReader<RSPTOM_A>;
339#[doc = "Response Timeout Interrupt Request Mask\n\nValue on reset: 1"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum RSPTOM_A {
342 #[doc = "0: Do not mask response timeout interrupt request"]
343 _0 = 0,
344 #[doc = "1: Mask response timeout interrupt request"]
345 _1 = 1,
346}
347impl From<RSPTOM_A> for bool {
348 #[inline(always)]
349 fn from(variant: RSPTOM_A) -> Self {
350 variant as u8 != 0
351 }
352}
353impl RSPTOM_R {
354 #[doc = "Get enumerated values variant"]
355 #[inline(always)]
356 pub fn variant(&self) -> RSPTOM_A {
357 match self.bits {
358 false => RSPTOM_A::_0,
359 true => RSPTOM_A::_1,
360 }
361 }
362 #[doc = "Checks if the value of the field is `_0`"]
363 #[inline(always)]
364 pub fn is_0(&self) -> bool {
365 *self == RSPTOM_A::_0
366 }
367 #[doc = "Checks if the value of the field is `_1`"]
368 #[inline(always)]
369 pub fn is_1(&self) -> bool {
370 *self == RSPTOM_A::_1
371 }
372}
373#[doc = "Field `RSPTOM` writer - Response Timeout Interrupt Request Mask"]
374pub type RSPTOM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, RSPTOM_A, O>;
375impl<'a, const O: u8> RSPTOM_W<'a, O> {
376 #[doc = "Do not mask response timeout interrupt request"]
377 #[inline(always)]
378 pub fn _0(self) -> &'a mut W {
379 self.variant(RSPTOM_A::_0)
380 }
381 #[doc = "Mask response timeout interrupt request"]
382 #[inline(always)]
383 pub fn _1(self) -> &'a mut W {
384 self.variant(RSPTOM_A::_1)
385 }
386}
387#[doc = "Field `BREM` reader - BRE Interrupt Request Mask"]
388pub type BREM_R = crate::BitReader<BREM_A>;
389#[doc = "BRE Interrupt Request Mask\n\nValue on reset: 1"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum BREM_A {
392 #[doc = "0: Do not mask read enable interrupt request for the SD buffer"]
393 _0 = 0,
394 #[doc = "1: Mask read enable interrupt request for the SD buffer"]
395 _1 = 1,
396}
397impl From<BREM_A> for bool {
398 #[inline(always)]
399 fn from(variant: BREM_A) -> Self {
400 variant as u8 != 0
401 }
402}
403impl BREM_R {
404 #[doc = "Get enumerated values variant"]
405 #[inline(always)]
406 pub fn variant(&self) -> BREM_A {
407 match self.bits {
408 false => BREM_A::_0,
409 true => BREM_A::_1,
410 }
411 }
412 #[doc = "Checks if the value of the field is `_0`"]
413 #[inline(always)]
414 pub fn is_0(&self) -> bool {
415 *self == BREM_A::_0
416 }
417 #[doc = "Checks if the value of the field is `_1`"]
418 #[inline(always)]
419 pub fn is_1(&self) -> bool {
420 *self == BREM_A::_1
421 }
422}
423#[doc = "Field `BREM` writer - BRE Interrupt Request Mask"]
424pub type BREM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, BREM_A, O>;
425impl<'a, const O: u8> BREM_W<'a, O> {
426 #[doc = "Do not mask read enable interrupt request for the SD buffer"]
427 #[inline(always)]
428 pub fn _0(self) -> &'a mut W {
429 self.variant(BREM_A::_0)
430 }
431 #[doc = "Mask read enable interrupt request for the SD buffer"]
432 #[inline(always)]
433 pub fn _1(self) -> &'a mut W {
434 self.variant(BREM_A::_1)
435 }
436}
437#[doc = "Field `BWEM` reader - BWE Interrupt Request Mask"]
438pub type BWEM_R = crate::BitReader<BWEM_A>;
439#[doc = "BWE Interrupt Request Mask\n\nValue on reset: 1"]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum BWEM_A {
442 #[doc = "0: Do not mask write enable interrupt request for the SD_BUF0 register"]
443 _0 = 0,
444 #[doc = "1: Mask write enable interrupt request for the SD_BUF0 register"]
445 _1 = 1,
446}
447impl From<BWEM_A> for bool {
448 #[inline(always)]
449 fn from(variant: BWEM_A) -> Self {
450 variant as u8 != 0
451 }
452}
453impl BWEM_R {
454 #[doc = "Get enumerated values variant"]
455 #[inline(always)]
456 pub fn variant(&self) -> BWEM_A {
457 match self.bits {
458 false => BWEM_A::_0,
459 true => BWEM_A::_1,
460 }
461 }
462 #[doc = "Checks if the value of the field is `_0`"]
463 #[inline(always)]
464 pub fn is_0(&self) -> bool {
465 *self == BWEM_A::_0
466 }
467 #[doc = "Checks if the value of the field is `_1`"]
468 #[inline(always)]
469 pub fn is_1(&self) -> bool {
470 *self == BWEM_A::_1
471 }
472}
473#[doc = "Field `BWEM` writer - BWE Interrupt Request Mask"]
474pub type BWEM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, BWEM_A, O>;
475impl<'a, const O: u8> BWEM_W<'a, O> {
476 #[doc = "Do not mask write enable interrupt request for the SD_BUF0 register"]
477 #[inline(always)]
478 pub fn _0(self) -> &'a mut W {
479 self.variant(BWEM_A::_0)
480 }
481 #[doc = "Mask write enable interrupt request for the SD_BUF0 register"]
482 #[inline(always)]
483 pub fn _1(self) -> &'a mut W {
484 self.variant(BWEM_A::_1)
485 }
486}
487#[doc = "Field `ILAM` reader - Illegal Access Error Interrupt Request Mask"]
488pub type ILAM_R = crate::BitReader<ILAM_A>;
489#[doc = "Illegal Access Error Interrupt Request Mask\n\nValue on reset: 1"]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491pub enum ILAM_A {
492 #[doc = "0: Do not mask illegal access error interrupt request"]
493 _0 = 0,
494 #[doc = "1: Mask illegal access error interrupt request"]
495 _1 = 1,
496}
497impl From<ILAM_A> for bool {
498 #[inline(always)]
499 fn from(variant: ILAM_A) -> Self {
500 variant as u8 != 0
501 }
502}
503impl ILAM_R {
504 #[doc = "Get enumerated values variant"]
505 #[inline(always)]
506 pub fn variant(&self) -> ILAM_A {
507 match self.bits {
508 false => ILAM_A::_0,
509 true => ILAM_A::_1,
510 }
511 }
512 #[doc = "Checks if the value of the field is `_0`"]
513 #[inline(always)]
514 pub fn is_0(&self) -> bool {
515 *self == ILAM_A::_0
516 }
517 #[doc = "Checks if the value of the field is `_1`"]
518 #[inline(always)]
519 pub fn is_1(&self) -> bool {
520 *self == ILAM_A::_1
521 }
522}
523#[doc = "Field `ILAM` writer - Illegal Access Error Interrupt Request Mask"]
524pub type ILAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, SD_INFO2_MASK_SPEC, ILAM_A, O>;
525impl<'a, const O: u8> ILAM_W<'a, O> {
526 #[doc = "Do not mask illegal access error interrupt request"]
527 #[inline(always)]
528 pub fn _0(self) -> &'a mut W {
529 self.variant(ILAM_A::_0)
530 }
531 #[doc = "Mask illegal access error interrupt request"]
532 #[inline(always)]
533 pub fn _1(self) -> &'a mut W {
534 self.variant(ILAM_A::_1)
535 }
536}
537impl R {
538 #[doc = "Bit 0 - Command Error Interrupt Request Mask"]
539 #[inline(always)]
540 pub fn cmdem(&self) -> CMDEM_R {
541 CMDEM_R::new((self.bits & 1) != 0)
542 }
543 #[doc = "Bit 1 - CRC Error Interrupt Request Mask"]
544 #[inline(always)]
545 pub fn crcem(&self) -> CRCEM_R {
546 CRCEM_R::new(((self.bits >> 1) & 1) != 0)
547 }
548 #[doc = "Bit 2 - End Bit Error Interrupt Request Mask"]
549 #[inline(always)]
550 pub fn endem(&self) -> ENDEM_R {
551 ENDEM_R::new(((self.bits >> 2) & 1) != 0)
552 }
553 #[doc = "Bit 3 - Data Timeout Interrupt Request Mask"]
554 #[inline(always)]
555 pub fn dtom(&self) -> DTOM_R {
556 DTOM_R::new(((self.bits >> 3) & 1) != 0)
557 }
558 #[doc = "Bit 4 - SD_BUF0 Register Illegal Write Interrupt Request Mask"]
559 #[inline(always)]
560 pub fn ilwm(&self) -> ILWM_R {
561 ILWM_R::new(((self.bits >> 4) & 1) != 0)
562 }
563 #[doc = "Bit 5 - SD_BUF0 Register Illegal Read Interrupt Request Mask"]
564 #[inline(always)]
565 pub fn ilrm(&self) -> ILRM_R {
566 ILRM_R::new(((self.bits >> 5) & 1) != 0)
567 }
568 #[doc = "Bit 6 - Response Timeout Interrupt Request Mask"]
569 #[inline(always)]
570 pub fn rsptom(&self) -> RSPTOM_R {
571 RSPTOM_R::new(((self.bits >> 6) & 1) != 0)
572 }
573 #[doc = "Bit 8 - BRE Interrupt Request Mask"]
574 #[inline(always)]
575 pub fn brem(&self) -> BREM_R {
576 BREM_R::new(((self.bits >> 8) & 1) != 0)
577 }
578 #[doc = "Bit 9 - BWE Interrupt Request Mask"]
579 #[inline(always)]
580 pub fn bwem(&self) -> BWEM_R {
581 BWEM_R::new(((self.bits >> 9) & 1) != 0)
582 }
583 #[doc = "Bit 15 - Illegal Access Error Interrupt Request Mask"]
584 #[inline(always)]
585 pub fn ilam(&self) -> ILAM_R {
586 ILAM_R::new(((self.bits >> 15) & 1) != 0)
587 }
588}
589impl W {
590 #[doc = "Bit 0 - Command Error Interrupt Request Mask"]
591 #[inline(always)]
592 #[must_use]
593 pub fn cmdem(&mut self) -> CMDEM_W<0> {
594 CMDEM_W::new(self)
595 }
596 #[doc = "Bit 1 - CRC Error Interrupt Request Mask"]
597 #[inline(always)]
598 #[must_use]
599 pub fn crcem(&mut self) -> CRCEM_W<1> {
600 CRCEM_W::new(self)
601 }
602 #[doc = "Bit 2 - End Bit Error Interrupt Request Mask"]
603 #[inline(always)]
604 #[must_use]
605 pub fn endem(&mut self) -> ENDEM_W<2> {
606 ENDEM_W::new(self)
607 }
608 #[doc = "Bit 3 - Data Timeout Interrupt Request Mask"]
609 #[inline(always)]
610 #[must_use]
611 pub fn dtom(&mut self) -> DTOM_W<3> {
612 DTOM_W::new(self)
613 }
614 #[doc = "Bit 4 - SD_BUF0 Register Illegal Write Interrupt Request Mask"]
615 #[inline(always)]
616 #[must_use]
617 pub fn ilwm(&mut self) -> ILWM_W<4> {
618 ILWM_W::new(self)
619 }
620 #[doc = "Bit 5 - SD_BUF0 Register Illegal Read Interrupt Request Mask"]
621 #[inline(always)]
622 #[must_use]
623 pub fn ilrm(&mut self) -> ILRM_W<5> {
624 ILRM_W::new(self)
625 }
626 #[doc = "Bit 6 - Response Timeout Interrupt Request Mask"]
627 #[inline(always)]
628 #[must_use]
629 pub fn rsptom(&mut self) -> RSPTOM_W<6> {
630 RSPTOM_W::new(self)
631 }
632 #[doc = "Bit 8 - BRE Interrupt Request Mask"]
633 #[inline(always)]
634 #[must_use]
635 pub fn brem(&mut self) -> BREM_W<8> {
636 BREM_W::new(self)
637 }
638 #[doc = "Bit 9 - BWE Interrupt Request Mask"]
639 #[inline(always)]
640 #[must_use]
641 pub fn bwem(&mut self) -> BWEM_W<9> {
642 BWEM_W::new(self)
643 }
644 #[doc = "Bit 15 - Illegal Access Error Interrupt Request Mask"]
645 #[inline(always)]
646 #[must_use]
647 pub fn ilam(&mut self) -> ILAM_W<15> {
648 ILAM_W::new(self)
649 }
650 #[doc = "Writes raw bits to the register."]
651 #[inline(always)]
652 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
653 self.0.bits(bits);
654 self
655 }
656}
657#[doc = "SD INFO2 Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sd_info2_mask](index.html) module"]
658pub struct SD_INFO2_MASK_SPEC;
659impl crate::RegisterSpec for SD_INFO2_MASK_SPEC {
660 type Ux = u32;
661}
662#[doc = "`read()` method returns [sd_info2_mask::R](R) reader structure"]
663impl crate::Readable for SD_INFO2_MASK_SPEC {
664 type Reader = R;
665}
666#[doc = "`write(|w| ..)` method takes [sd_info2_mask::W](W) writer structure"]
667impl crate::Writable for SD_INFO2_MASK_SPEC {
668 type Writer = W;
669 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
670 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
671}
672#[doc = "`reset()` method sets SD_INFO2_MASK to value 0x8b7f"]
673impl crate::Resettable for SD_INFO2_MASK_SPEC {
674 const RESET_VALUE: Self::Ux = 0x8b7f;
675}