ra6e1_pac/
gpt321.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:50:30 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM 32-bit Timer 1"]
28unsafe impl ::core::marker::Send for super::Gpt321 {}
29unsafe impl ::core::marker::Sync for super::Gpt321 {}
30impl super::Gpt321 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "General PWM Timer Write-Protection Register"]
38    #[inline(always)]
39    pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "General PWM Timer Software Start Register"]
48    #[inline(always)]
49    pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "General PWM Timer Software Stop Register"]
58    #[inline(always)]
59    pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(8usize),
63            )
64        }
65    }
66
67    #[doc = "General PWM Timer Software Clear Register"]
68    #[inline(always)]
69    pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70        unsafe {
71            crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72                self._svd2pac_as_ptr().add(12usize),
73            )
74        }
75    }
76
77    #[doc = "General PWM Timer Start Source Select Register"]
78    #[inline(always)]
79    pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(16usize),
83            )
84        }
85    }
86
87    #[doc = "General PWM Timer Stop Source Select Register"]
88    #[inline(always)]
89    pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "General PWM Timer Clear Source Select Register"]
98    #[inline(always)]
99    pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(24usize),
103            )
104        }
105    }
106
107    #[doc = "General PWM Timer Up Count Source Select Register"]
108    #[inline(always)]
109    pub const fn gtupsr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(28usize),
115            )
116        }
117    }
118
119    #[doc = "General PWM Timer Down Count Source Select Register"]
120    #[inline(always)]
121    pub const fn gtdnsr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(32usize),
127            )
128        }
129    }
130
131    #[doc = "General PWM Timer Input Capture Source Select Register A"]
132    #[inline(always)]
133    pub const fn gticasr(
134        &self,
135    ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(36usize),
139            )
140        }
141    }
142
143    #[doc = "General PWM Timer Input Capture Source Select Register B"]
144    #[inline(always)]
145    pub const fn gticbsr(
146        &self,
147    ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(40usize),
151            )
152        }
153    }
154
155    #[doc = "General PWM Timer Control Register"]
156    #[inline(always)]
157    pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(44usize),
161            )
162        }
163    }
164
165    #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166    #[inline(always)]
167    pub const fn gtuddtyc(
168        &self,
169    ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(48usize),
173            )
174        }
175    }
176
177    #[doc = "General PWM Timer I/O Control Register"]
178    #[inline(always)]
179    pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(52usize),
183            )
184        }
185    }
186
187    #[doc = "General PWM Timer Interrupt Output Setting Register"]
188    #[inline(always)]
189    pub const fn gtintad(
190        &self,
191    ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(56usize),
195            )
196        }
197    }
198
199    #[doc = "General PWM Timer Status Register"]
200    #[inline(always)]
201    pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(60usize),
205            )
206        }
207    }
208
209    #[doc = "General PWM Timer Buffer Enable Register"]
210    #[inline(always)]
211    pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(64usize),
215            )
216        }
217    }
218
219    #[doc = "General PWM Timer Counter"]
220    #[inline(always)]
221    pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(72usize),
225            )
226        }
227    }
228
229    #[doc = "General PWM Timer Compare Capture Register A"]
230    #[inline(always)]
231    pub const fn gtccra(
232        &self,
233    ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(76usize),
237            )
238        }
239    }
240
241    #[doc = "General PWM Timer Compare Capture Register B"]
242    #[inline(always)]
243    pub const fn gtccrb(
244        &self,
245    ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(80usize),
249            )
250        }
251    }
252
253    #[doc = "General PWM Timer Compare Capture Register C"]
254    #[inline(always)]
255    pub const fn gtccrc(
256        &self,
257    ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
258        unsafe {
259            crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
260                self._svd2pac_as_ptr().add(84usize),
261            )
262        }
263    }
264
265    #[doc = "General PWM Timer Compare Capture Register E"]
266    #[inline(always)]
267    pub const fn gtccre(
268        &self,
269    ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
270        unsafe {
271            crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
272                self._svd2pac_as_ptr().add(88usize),
273            )
274        }
275    }
276
277    #[doc = "General PWM Timer Compare Capture Register D"]
278    #[inline(always)]
279    pub const fn gtccrd(
280        &self,
281    ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(92usize),
285            )
286        }
287    }
288
289    #[doc = "General PWM Timer Compare Capture Register F"]
290    #[inline(always)]
291    pub const fn gtccrf(
292        &self,
293    ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
294        unsafe {
295            crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
296                self._svd2pac_as_ptr().add(96usize),
297            )
298        }
299    }
300
301    #[doc = "General PWM Timer Cycle Setting Register"]
302    #[inline(always)]
303    pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(100usize),
307            )
308        }
309    }
310
311    #[doc = "General PWM Timer Cycle Setting Buffer Register"]
312    #[inline(always)]
313    pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(104usize),
317            )
318        }
319    }
320
321    #[doc = "General PWM Timer Dead Time Control Register"]
322    #[inline(always)]
323    pub const fn gtdtcr(
324        &self,
325    ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
326        unsafe {
327            crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
328                self._svd2pac_as_ptr().add(136usize),
329            )
330        }
331    }
332
333    #[doc = "General PWM Timer Dead Time Value Register U"]
334    #[inline(always)]
335    pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(140usize),
339            )
340        }
341    }
342
343    #[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
344    #[inline(always)]
345    pub const fn gticlf(
346        &self,
347    ) -> &'static crate::common::Reg<self::Gticlf_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Gticlf_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(184usize),
351            )
352        }
353    }
354
355    #[doc = "General PWM Timer Period Count Register"]
356    #[inline(always)]
357    pub const fn gtpc(&self) -> &'static crate::common::Reg<self::Gtpc_SPEC, crate::common::RW> {
358        unsafe {
359            crate::common::Reg::<self::Gtpc_SPEC, crate::common::RW>::from_ptr(
360                self._svd2pac_as_ptr().add(188usize),
361            )
362        }
363    }
364
365    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
366    #[inline(always)]
367    pub const fn gtsecsr(
368        &self,
369    ) -> &'static crate::common::Reg<self::Gtsecsr_SPEC, crate::common::RW> {
370        unsafe {
371            crate::common::Reg::<self::Gtsecsr_SPEC, crate::common::RW>::from_ptr(
372                self._svd2pac_as_ptr().add(208usize),
373            )
374        }
375    }
376
377    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
378    #[inline(always)]
379    pub const fn gtsecr(
380        &self,
381    ) -> &'static crate::common::Reg<self::Gtsecr_SPEC, crate::common::RW> {
382        unsafe {
383            crate::common::Reg::<self::Gtsecr_SPEC, crate::common::RW>::from_ptr(
384                self._svd2pac_as_ptr().add(212usize),
385            )
386        }
387    }
388}
389#[doc(hidden)]
390#[derive(Copy, Clone, Eq, PartialEq)]
391pub struct Gtwp_SPEC;
392impl crate::sealed::RegSpec for Gtwp_SPEC {
393    type DataType = u32;
394}
395
396#[doc = "General PWM Timer Write-Protection Register"]
397pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
398
399impl Gtwp {
400    #[doc = "Register Write Disable"]
401    #[inline(always)]
402    pub fn wp(
403        self,
404    ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
405    {
406        crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
407    }
408
409    #[doc = "GTSTR.CSTRT Bit Write Disable"]
410    #[inline(always)]
411    pub fn strwp(
412        self,
413    ) -> crate::common::RegisterField<
414        1,
415        0x1,
416        1,
417        0,
418        gtwp::Strwp,
419        gtwp::Strwp,
420        Gtwp_SPEC,
421        crate::common::RW,
422    > {
423        crate::common::RegisterField::<
424            1,
425            0x1,
426            1,
427            0,
428            gtwp::Strwp,
429            gtwp::Strwp,
430            Gtwp_SPEC,
431            crate::common::RW,
432        >::from_register(self, 0)
433    }
434
435    #[doc = "GTSTP.CSTOP Bit Write Disable"]
436    #[inline(always)]
437    pub fn stpwp(
438        self,
439    ) -> crate::common::RegisterField<
440        2,
441        0x1,
442        1,
443        0,
444        gtwp::Stpwp,
445        gtwp::Stpwp,
446        Gtwp_SPEC,
447        crate::common::RW,
448    > {
449        crate::common::RegisterField::<
450            2,
451            0x1,
452            1,
453            0,
454            gtwp::Stpwp,
455            gtwp::Stpwp,
456            Gtwp_SPEC,
457            crate::common::RW,
458        >::from_register(self, 0)
459    }
460
461    #[doc = "GTCLR.CCLR Bit Write Disable"]
462    #[inline(always)]
463    pub fn clrwp(
464        self,
465    ) -> crate::common::RegisterField<
466        3,
467        0x1,
468        1,
469        0,
470        gtwp::Clrwp,
471        gtwp::Clrwp,
472        Gtwp_SPEC,
473        crate::common::RW,
474    > {
475        crate::common::RegisterField::<
476            3,
477            0x1,
478            1,
479            0,
480            gtwp::Clrwp,
481            gtwp::Clrwp,
482            Gtwp_SPEC,
483            crate::common::RW,
484        >::from_register(self, 0)
485    }
486
487    #[doc = "Common Register Write Disabled"]
488    #[inline(always)]
489    pub fn cmnwp(
490        self,
491    ) -> crate::common::RegisterField<
492        4,
493        0x1,
494        1,
495        0,
496        gtwp::Cmnwp,
497        gtwp::Cmnwp,
498        Gtwp_SPEC,
499        crate::common::RW,
500    > {
501        crate::common::RegisterField::<
502            4,
503            0x1,
504            1,
505            0,
506            gtwp::Cmnwp,
507            gtwp::Cmnwp,
508            Gtwp_SPEC,
509            crate::common::RW,
510        >::from_register(self, 0)
511    }
512
513    #[doc = "GTWP Key Code"]
514    #[inline(always)]
515    pub fn prkey(
516        self,
517    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Gtwp_SPEC, crate::common::W> {
518        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Gtwp_SPEC,crate::common::W>::from_register(self,0)
519    }
520}
521impl ::core::default::Default for Gtwp {
522    #[inline(always)]
523    fn default() -> Gtwp {
524        <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
525    }
526}
527pub mod gtwp {
528
529    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
530    pub struct Wp_SPEC;
531    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
532    impl Wp {
533        #[doc = "Write to the register enabled"]
534        pub const _0: Self = Self::new(0);
535
536        #[doc = "Write to the register disabled"]
537        pub const _1: Self = Self::new(1);
538    }
539    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
540    pub struct Strwp_SPEC;
541    pub type Strwp = crate::EnumBitfieldStruct<u8, Strwp_SPEC>;
542    impl Strwp {
543        #[doc = "Write to the bit is enabled"]
544        pub const _0: Self = Self::new(0);
545
546        #[doc = "Write to the bit is disabled"]
547        pub const _1: Self = Self::new(1);
548    }
549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
550    pub struct Stpwp_SPEC;
551    pub type Stpwp = crate::EnumBitfieldStruct<u8, Stpwp_SPEC>;
552    impl Stpwp {
553        #[doc = "Write to the bit is enabled"]
554        pub const _0: Self = Self::new(0);
555
556        #[doc = "Write to the bit is disabled"]
557        pub const _1: Self = Self::new(1);
558    }
559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
560    pub struct Clrwp_SPEC;
561    pub type Clrwp = crate::EnumBitfieldStruct<u8, Clrwp_SPEC>;
562    impl Clrwp {
563        #[doc = "Write to the bit is enabled"]
564        pub const _0: Self = Self::new(0);
565
566        #[doc = "Write to the bit is disabled"]
567        pub const _1: Self = Self::new(1);
568    }
569    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
570    pub struct Cmnwp_SPEC;
571    pub type Cmnwp = crate::EnumBitfieldStruct<u8, Cmnwp_SPEC>;
572    impl Cmnwp {
573        #[doc = "Write to the register is enabled"]
574        pub const _0: Self = Self::new(0);
575
576        #[doc = "Write to the register is disabled"]
577        pub const _1: Self = Self::new(1);
578    }
579}
580#[doc(hidden)]
581#[derive(Copy, Clone, Eq, PartialEq)]
582pub struct Gtstr_SPEC;
583impl crate::sealed::RegSpec for Gtstr_SPEC {
584    type DataType = u32;
585}
586
587#[doc = "General PWM Timer Software Start Register"]
588pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
589
590impl Gtstr {
591    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
592    #[inline(always)]
593    pub fn cstrt0(
594        self,
595    ) -> crate::common::RegisterField<
596        0,
597        0x1,
598        1,
599        0,
600        gtstr::Cstrt0,
601        gtstr::Cstrt0,
602        Gtstr_SPEC,
603        crate::common::RW,
604    > {
605        crate::common::RegisterField::<
606            0,
607            0x1,
608            1,
609            0,
610            gtstr::Cstrt0,
611            gtstr::Cstrt0,
612            Gtstr_SPEC,
613            crate::common::RW,
614        >::from_register(self, 0)
615    }
616
617    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
618    #[inline(always)]
619    pub fn cstrt1(
620        self,
621    ) -> crate::common::RegisterField<
622        1,
623        0x1,
624        1,
625        0,
626        gtstr::Cstrt1,
627        gtstr::Cstrt1,
628        Gtstr_SPEC,
629        crate::common::RW,
630    > {
631        crate::common::RegisterField::<
632            1,
633            0x1,
634            1,
635            0,
636            gtstr::Cstrt1,
637            gtstr::Cstrt1,
638            Gtstr_SPEC,
639            crate::common::RW,
640        >::from_register(self, 0)
641    }
642
643    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
644    #[inline(always)]
645    pub fn cstrt2(
646        self,
647    ) -> crate::common::RegisterField<
648        2,
649        0x1,
650        1,
651        0,
652        gtstr::Cstrt2,
653        gtstr::Cstrt2,
654        Gtstr_SPEC,
655        crate::common::RW,
656    > {
657        crate::common::RegisterField::<
658            2,
659            0x1,
660            1,
661            0,
662            gtstr::Cstrt2,
663            gtstr::Cstrt2,
664            Gtstr_SPEC,
665            crate::common::RW,
666        >::from_register(self, 0)
667    }
668
669    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
670    #[inline(always)]
671    pub fn cstrt3(
672        self,
673    ) -> crate::common::RegisterField<
674        3,
675        0x1,
676        1,
677        0,
678        gtstr::Cstrt3,
679        gtstr::Cstrt3,
680        Gtstr_SPEC,
681        crate::common::RW,
682    > {
683        crate::common::RegisterField::<
684            3,
685            0x1,
686            1,
687            0,
688            gtstr::Cstrt3,
689            gtstr::Cstrt3,
690            Gtstr_SPEC,
691            crate::common::RW,
692        >::from_register(self, 0)
693    }
694
695    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
696    #[inline(always)]
697    pub fn cstrt4(
698        self,
699    ) -> crate::common::RegisterField<
700        4,
701        0x1,
702        1,
703        0,
704        gtstr::Cstrt4,
705        gtstr::Cstrt4,
706        Gtstr_SPEC,
707        crate::common::RW,
708    > {
709        crate::common::RegisterField::<
710            4,
711            0x1,
712            1,
713            0,
714            gtstr::Cstrt4,
715            gtstr::Cstrt4,
716            Gtstr_SPEC,
717            crate::common::RW,
718        >::from_register(self, 0)
719    }
720
721    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
722    #[inline(always)]
723    pub fn cstrt5(
724        self,
725    ) -> crate::common::RegisterField<
726        5,
727        0x1,
728        1,
729        0,
730        gtstr::Cstrt5,
731        gtstr::Cstrt5,
732        Gtstr_SPEC,
733        crate::common::RW,
734    > {
735        crate::common::RegisterField::<
736            5,
737            0x1,
738            1,
739            0,
740            gtstr::Cstrt5,
741            gtstr::Cstrt5,
742            Gtstr_SPEC,
743            crate::common::RW,
744        >::from_register(self, 0)
745    }
746
747    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
748    #[inline(always)]
749    pub fn cstrt6(
750        self,
751    ) -> crate::common::RegisterField<
752        6,
753        0x1,
754        1,
755        0,
756        gtstr::Cstrt6,
757        gtstr::Cstrt6,
758        Gtstr_SPEC,
759        crate::common::RW,
760    > {
761        crate::common::RegisterField::<
762            6,
763            0x1,
764            1,
765            0,
766            gtstr::Cstrt6,
767            gtstr::Cstrt6,
768            Gtstr_SPEC,
769            crate::common::RW,
770        >::from_register(self, 0)
771    }
772
773    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
774    #[inline(always)]
775    pub fn cstrt7(
776        self,
777    ) -> crate::common::RegisterField<
778        7,
779        0x1,
780        1,
781        0,
782        gtstr::Cstrt7,
783        gtstr::Cstrt7,
784        Gtstr_SPEC,
785        crate::common::RW,
786    > {
787        crate::common::RegisterField::<
788            7,
789            0x1,
790            1,
791            0,
792            gtstr::Cstrt7,
793            gtstr::Cstrt7,
794            Gtstr_SPEC,
795            crate::common::RW,
796        >::from_register(self, 0)
797    }
798
799    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
800    #[inline(always)]
801    pub fn cstrt8(
802        self,
803    ) -> crate::common::RegisterField<
804        8,
805        0x1,
806        1,
807        0,
808        gtstr::Cstrt8,
809        gtstr::Cstrt8,
810        Gtstr_SPEC,
811        crate::common::RW,
812    > {
813        crate::common::RegisterField::<
814            8,
815            0x1,
816            1,
817            0,
818            gtstr::Cstrt8,
819            gtstr::Cstrt8,
820            Gtstr_SPEC,
821            crate::common::RW,
822        >::from_register(self, 0)
823    }
824
825    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
826    #[inline(always)]
827    pub fn cstrt9(
828        self,
829    ) -> crate::common::RegisterField<
830        9,
831        0x1,
832        1,
833        0,
834        gtstr::Cstrt9,
835        gtstr::Cstrt9,
836        Gtstr_SPEC,
837        crate::common::RW,
838    > {
839        crate::common::RegisterField::<
840            9,
841            0x1,
842            1,
843            0,
844            gtstr::Cstrt9,
845            gtstr::Cstrt9,
846            Gtstr_SPEC,
847            crate::common::RW,
848        >::from_register(self, 0)
849    }
850}
851impl ::core::default::Default for Gtstr {
852    #[inline(always)]
853    fn default() -> Gtstr {
854        <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
855    }
856}
857pub mod gtstr {
858
859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
860    pub struct Cstrt0_SPEC;
861    pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
862    impl Cstrt0 {
863        #[doc = "GTCNT counter not start"]
864        pub const _0: Self = Self::new(0);
865
866        #[doc = "GTCNT counter start"]
867        pub const _1: Self = Self::new(1);
868    }
869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
870    pub struct Cstrt1_SPEC;
871    pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
872    impl Cstrt1 {
873        #[doc = "GTCNT counter not start"]
874        pub const _0: Self = Self::new(0);
875
876        #[doc = "GTCNT counter start"]
877        pub const _1: Self = Self::new(1);
878    }
879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
880    pub struct Cstrt2_SPEC;
881    pub type Cstrt2 = crate::EnumBitfieldStruct<u8, Cstrt2_SPEC>;
882    impl Cstrt2 {
883        #[doc = "GTCNT counter not start"]
884        pub const _0: Self = Self::new(0);
885
886        #[doc = "GTCNT counter start"]
887        pub const _1: Self = Self::new(1);
888    }
889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
890    pub struct Cstrt3_SPEC;
891    pub type Cstrt3 = crate::EnumBitfieldStruct<u8, Cstrt3_SPEC>;
892    impl Cstrt3 {
893        #[doc = "GTCNT counter not start"]
894        pub const _0: Self = Self::new(0);
895
896        #[doc = "GTCNT counter start"]
897        pub const _1: Self = Self::new(1);
898    }
899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
900    pub struct Cstrt4_SPEC;
901    pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
902    impl Cstrt4 {
903        #[doc = "GTCNT counter not start"]
904        pub const _0: Self = Self::new(0);
905
906        #[doc = "GTCNT counter start"]
907        pub const _1: Self = Self::new(1);
908    }
909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
910    pub struct Cstrt5_SPEC;
911    pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
912    impl Cstrt5 {
913        #[doc = "GTCNT counter not start"]
914        pub const _0: Self = Self::new(0);
915
916        #[doc = "GTCNT counter start"]
917        pub const _1: Self = Self::new(1);
918    }
919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
920    pub struct Cstrt6_SPEC;
921    pub type Cstrt6 = crate::EnumBitfieldStruct<u8, Cstrt6_SPEC>;
922    impl Cstrt6 {
923        #[doc = "GTCNT counter not start"]
924        pub const _0: Self = Self::new(0);
925
926        #[doc = "GTCNT counter start"]
927        pub const _1: Self = Self::new(1);
928    }
929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
930    pub struct Cstrt7_SPEC;
931    pub type Cstrt7 = crate::EnumBitfieldStruct<u8, Cstrt7_SPEC>;
932    impl Cstrt7 {
933        #[doc = "GTCNT counter not start"]
934        pub const _0: Self = Self::new(0);
935
936        #[doc = "GTCNT counter start"]
937        pub const _1: Self = Self::new(1);
938    }
939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
940    pub struct Cstrt8_SPEC;
941    pub type Cstrt8 = crate::EnumBitfieldStruct<u8, Cstrt8_SPEC>;
942    impl Cstrt8 {
943        #[doc = "GTCNT counter not start"]
944        pub const _0: Self = Self::new(0);
945
946        #[doc = "GTCNT counter start"]
947        pub const _1: Self = Self::new(1);
948    }
949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
950    pub struct Cstrt9_SPEC;
951    pub type Cstrt9 = crate::EnumBitfieldStruct<u8, Cstrt9_SPEC>;
952    impl Cstrt9 {
953        #[doc = "GTCNT counter not start"]
954        pub const _0: Self = Self::new(0);
955
956        #[doc = "GTCNT counter start"]
957        pub const _1: Self = Self::new(1);
958    }
959}
960#[doc(hidden)]
961#[derive(Copy, Clone, Eq, PartialEq)]
962pub struct Gtstp_SPEC;
963impl crate::sealed::RegSpec for Gtstp_SPEC {
964    type DataType = u32;
965}
966
967#[doc = "General PWM Timer Software Stop Register"]
968pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
969
970impl Gtstp {
971    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
972    #[inline(always)]
973    pub fn cstop0(
974        self,
975    ) -> crate::common::RegisterField<
976        0,
977        0x1,
978        1,
979        0,
980        gtstp::Cstop0,
981        gtstp::Cstop0,
982        Gtstp_SPEC,
983        crate::common::RW,
984    > {
985        crate::common::RegisterField::<
986            0,
987            0x1,
988            1,
989            0,
990            gtstp::Cstop0,
991            gtstp::Cstop0,
992            Gtstp_SPEC,
993            crate::common::RW,
994        >::from_register(self, 0)
995    }
996
997    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
998    #[inline(always)]
999    pub fn cstop1(
1000        self,
1001    ) -> crate::common::RegisterField<
1002        1,
1003        0x1,
1004        1,
1005        0,
1006        gtstp::Cstop1,
1007        gtstp::Cstop1,
1008        Gtstp_SPEC,
1009        crate::common::RW,
1010    > {
1011        crate::common::RegisterField::<
1012            1,
1013            0x1,
1014            1,
1015            0,
1016            gtstp::Cstop1,
1017            gtstp::Cstop1,
1018            Gtstp_SPEC,
1019            crate::common::RW,
1020        >::from_register(self, 0)
1021    }
1022
1023    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1024    #[inline(always)]
1025    pub fn cstop2(
1026        self,
1027    ) -> crate::common::RegisterField<
1028        2,
1029        0x1,
1030        1,
1031        0,
1032        gtstp::Cstop2,
1033        gtstp::Cstop2,
1034        Gtstp_SPEC,
1035        crate::common::RW,
1036    > {
1037        crate::common::RegisterField::<
1038            2,
1039            0x1,
1040            1,
1041            0,
1042            gtstp::Cstop2,
1043            gtstp::Cstop2,
1044            Gtstp_SPEC,
1045            crate::common::RW,
1046        >::from_register(self, 0)
1047    }
1048
1049    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1050    #[inline(always)]
1051    pub fn cstop3(
1052        self,
1053    ) -> crate::common::RegisterField<
1054        3,
1055        0x1,
1056        1,
1057        0,
1058        gtstp::Cstop3,
1059        gtstp::Cstop3,
1060        Gtstp_SPEC,
1061        crate::common::RW,
1062    > {
1063        crate::common::RegisterField::<
1064            3,
1065            0x1,
1066            1,
1067            0,
1068            gtstp::Cstop3,
1069            gtstp::Cstop3,
1070            Gtstp_SPEC,
1071            crate::common::RW,
1072        >::from_register(self, 0)
1073    }
1074
1075    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1076    #[inline(always)]
1077    pub fn cstop4(
1078        self,
1079    ) -> crate::common::RegisterField<
1080        4,
1081        0x1,
1082        1,
1083        0,
1084        gtstp::Cstop4,
1085        gtstp::Cstop4,
1086        Gtstp_SPEC,
1087        crate::common::RW,
1088    > {
1089        crate::common::RegisterField::<
1090            4,
1091            0x1,
1092            1,
1093            0,
1094            gtstp::Cstop4,
1095            gtstp::Cstop4,
1096            Gtstp_SPEC,
1097            crate::common::RW,
1098        >::from_register(self, 0)
1099    }
1100
1101    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1102    #[inline(always)]
1103    pub fn cstop5(
1104        self,
1105    ) -> crate::common::RegisterField<
1106        5,
1107        0x1,
1108        1,
1109        0,
1110        gtstp::Cstop5,
1111        gtstp::Cstop5,
1112        Gtstp_SPEC,
1113        crate::common::RW,
1114    > {
1115        crate::common::RegisterField::<
1116            5,
1117            0x1,
1118            1,
1119            0,
1120            gtstp::Cstop5,
1121            gtstp::Cstop5,
1122            Gtstp_SPEC,
1123            crate::common::RW,
1124        >::from_register(self, 0)
1125    }
1126
1127    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1128    #[inline(always)]
1129    pub fn cstop6(
1130        self,
1131    ) -> crate::common::RegisterField<
1132        6,
1133        0x1,
1134        1,
1135        0,
1136        gtstp::Cstop6,
1137        gtstp::Cstop6,
1138        Gtstp_SPEC,
1139        crate::common::RW,
1140    > {
1141        crate::common::RegisterField::<
1142            6,
1143            0x1,
1144            1,
1145            0,
1146            gtstp::Cstop6,
1147            gtstp::Cstop6,
1148            Gtstp_SPEC,
1149            crate::common::RW,
1150        >::from_register(self, 0)
1151    }
1152
1153    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1154    #[inline(always)]
1155    pub fn cstop7(
1156        self,
1157    ) -> crate::common::RegisterField<
1158        7,
1159        0x1,
1160        1,
1161        0,
1162        gtstp::Cstop7,
1163        gtstp::Cstop7,
1164        Gtstp_SPEC,
1165        crate::common::RW,
1166    > {
1167        crate::common::RegisterField::<
1168            7,
1169            0x1,
1170            1,
1171            0,
1172            gtstp::Cstop7,
1173            gtstp::Cstop7,
1174            Gtstp_SPEC,
1175            crate::common::RW,
1176        >::from_register(self, 0)
1177    }
1178
1179    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1180    #[inline(always)]
1181    pub fn cstop8(
1182        self,
1183    ) -> crate::common::RegisterField<
1184        8,
1185        0x1,
1186        1,
1187        0,
1188        gtstp::Cstop8,
1189        gtstp::Cstop8,
1190        Gtstp_SPEC,
1191        crate::common::RW,
1192    > {
1193        crate::common::RegisterField::<
1194            8,
1195            0x1,
1196            1,
1197            0,
1198            gtstp::Cstop8,
1199            gtstp::Cstop8,
1200            Gtstp_SPEC,
1201            crate::common::RW,
1202        >::from_register(self, 0)
1203    }
1204
1205    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
1206    #[inline(always)]
1207    pub fn cstop9(
1208        self,
1209    ) -> crate::common::RegisterField<
1210        9,
1211        0x1,
1212        1,
1213        0,
1214        gtstp::Cstop9,
1215        gtstp::Cstop9,
1216        Gtstp_SPEC,
1217        crate::common::RW,
1218    > {
1219        crate::common::RegisterField::<
1220            9,
1221            0x1,
1222            1,
1223            0,
1224            gtstp::Cstop9,
1225            gtstp::Cstop9,
1226            Gtstp_SPEC,
1227            crate::common::RW,
1228        >::from_register(self, 0)
1229    }
1230}
1231impl ::core::default::Default for Gtstp {
1232    #[inline(always)]
1233    fn default() -> Gtstp {
1234        <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1235    }
1236}
1237pub mod gtstp {
1238
1239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1240    pub struct Cstop0_SPEC;
1241    pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1242    impl Cstop0 {
1243        #[doc = "GTCNT counter not stop"]
1244        pub const _0: Self = Self::new(0);
1245
1246        #[doc = "GTCNT counter stop"]
1247        pub const _1: Self = Self::new(1);
1248    }
1249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1250    pub struct Cstop1_SPEC;
1251    pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1252    impl Cstop1 {
1253        #[doc = "GTCNT counter not stop"]
1254        pub const _0: Self = Self::new(0);
1255
1256        #[doc = "GTCNT counter stop"]
1257        pub const _1: Self = Self::new(1);
1258    }
1259    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1260    pub struct Cstop2_SPEC;
1261    pub type Cstop2 = crate::EnumBitfieldStruct<u8, Cstop2_SPEC>;
1262    impl Cstop2 {
1263        #[doc = "GTCNT counter not stop"]
1264        pub const _0: Self = Self::new(0);
1265
1266        #[doc = "GTCNT counter stop"]
1267        pub const _1: Self = Self::new(1);
1268    }
1269    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1270    pub struct Cstop3_SPEC;
1271    pub type Cstop3 = crate::EnumBitfieldStruct<u8, Cstop3_SPEC>;
1272    impl Cstop3 {
1273        #[doc = "GTCNT counter not stop"]
1274        pub const _0: Self = Self::new(0);
1275
1276        #[doc = "GTCNT counter stop"]
1277        pub const _1: Self = Self::new(1);
1278    }
1279    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1280    pub struct Cstop4_SPEC;
1281    pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1282    impl Cstop4 {
1283        #[doc = "GTCNT counter not stop"]
1284        pub const _0: Self = Self::new(0);
1285
1286        #[doc = "GTCNT counter stop"]
1287        pub const _1: Self = Self::new(1);
1288    }
1289    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1290    pub struct Cstop5_SPEC;
1291    pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1292    impl Cstop5 {
1293        #[doc = "GTCNT counter not stop"]
1294        pub const _0: Self = Self::new(0);
1295
1296        #[doc = "GTCNT counter stop"]
1297        pub const _1: Self = Self::new(1);
1298    }
1299    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1300    pub struct Cstop6_SPEC;
1301    pub type Cstop6 = crate::EnumBitfieldStruct<u8, Cstop6_SPEC>;
1302    impl Cstop6 {
1303        #[doc = "GTCNT counter not stop"]
1304        pub const _0: Self = Self::new(0);
1305
1306        #[doc = "GTCNT counter stop"]
1307        pub const _1: Self = Self::new(1);
1308    }
1309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1310    pub struct Cstop7_SPEC;
1311    pub type Cstop7 = crate::EnumBitfieldStruct<u8, Cstop7_SPEC>;
1312    impl Cstop7 {
1313        #[doc = "GTCNT counter not stop"]
1314        pub const _0: Self = Self::new(0);
1315
1316        #[doc = "GTCNT counter stop"]
1317        pub const _1: Self = Self::new(1);
1318    }
1319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1320    pub struct Cstop8_SPEC;
1321    pub type Cstop8 = crate::EnumBitfieldStruct<u8, Cstop8_SPEC>;
1322    impl Cstop8 {
1323        #[doc = "GTCNT counter not stop"]
1324        pub const _0: Self = Self::new(0);
1325
1326        #[doc = "GTCNT counter stop"]
1327        pub const _1: Self = Self::new(1);
1328    }
1329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1330    pub struct Cstop9_SPEC;
1331    pub type Cstop9 = crate::EnumBitfieldStruct<u8, Cstop9_SPEC>;
1332    impl Cstop9 {
1333        #[doc = "GTCNT counter not stop"]
1334        pub const _0: Self = Self::new(0);
1335
1336        #[doc = "GTCNT counter stop"]
1337        pub const _1: Self = Self::new(1);
1338    }
1339}
1340#[doc(hidden)]
1341#[derive(Copy, Clone, Eq, PartialEq)]
1342pub struct Gtclr_SPEC;
1343impl crate::sealed::RegSpec for Gtclr_SPEC {
1344    type DataType = u32;
1345}
1346
1347#[doc = "General PWM Timer Software Clear Register"]
1348pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1349
1350impl Gtclr {
1351    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1352    #[inline(always)]
1353    pub fn cclr0(
1354        self,
1355    ) -> crate::common::RegisterField<
1356        0,
1357        0x1,
1358        1,
1359        0,
1360        gtclr::Cclr0,
1361        gtclr::Cclr0,
1362        Gtclr_SPEC,
1363        crate::common::W,
1364    > {
1365        crate::common::RegisterField::<
1366            0,
1367            0x1,
1368            1,
1369            0,
1370            gtclr::Cclr0,
1371            gtclr::Cclr0,
1372            Gtclr_SPEC,
1373            crate::common::W,
1374        >::from_register(self, 0)
1375    }
1376
1377    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1378    #[inline(always)]
1379    pub fn cclr1(
1380        self,
1381    ) -> crate::common::RegisterField<
1382        1,
1383        0x1,
1384        1,
1385        0,
1386        gtclr::Cclr1,
1387        gtclr::Cclr1,
1388        Gtclr_SPEC,
1389        crate::common::W,
1390    > {
1391        crate::common::RegisterField::<
1392            1,
1393            0x1,
1394            1,
1395            0,
1396            gtclr::Cclr1,
1397            gtclr::Cclr1,
1398            Gtclr_SPEC,
1399            crate::common::W,
1400        >::from_register(self, 0)
1401    }
1402
1403    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1404    #[inline(always)]
1405    pub fn cclr2(
1406        self,
1407    ) -> crate::common::RegisterField<
1408        2,
1409        0x1,
1410        1,
1411        0,
1412        gtclr::Cclr2,
1413        gtclr::Cclr2,
1414        Gtclr_SPEC,
1415        crate::common::W,
1416    > {
1417        crate::common::RegisterField::<
1418            2,
1419            0x1,
1420            1,
1421            0,
1422            gtclr::Cclr2,
1423            gtclr::Cclr2,
1424            Gtclr_SPEC,
1425            crate::common::W,
1426        >::from_register(self, 0)
1427    }
1428
1429    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1430    #[inline(always)]
1431    pub fn cclr3(
1432        self,
1433    ) -> crate::common::RegisterField<
1434        3,
1435        0x1,
1436        1,
1437        0,
1438        gtclr::Cclr3,
1439        gtclr::Cclr3,
1440        Gtclr_SPEC,
1441        crate::common::W,
1442    > {
1443        crate::common::RegisterField::<
1444            3,
1445            0x1,
1446            1,
1447            0,
1448            gtclr::Cclr3,
1449            gtclr::Cclr3,
1450            Gtclr_SPEC,
1451            crate::common::W,
1452        >::from_register(self, 0)
1453    }
1454
1455    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1456    #[inline(always)]
1457    pub fn cclr4(
1458        self,
1459    ) -> crate::common::RegisterField<
1460        4,
1461        0x1,
1462        1,
1463        0,
1464        gtclr::Cclr4,
1465        gtclr::Cclr4,
1466        Gtclr_SPEC,
1467        crate::common::W,
1468    > {
1469        crate::common::RegisterField::<
1470            4,
1471            0x1,
1472            1,
1473            0,
1474            gtclr::Cclr4,
1475            gtclr::Cclr4,
1476            Gtclr_SPEC,
1477            crate::common::W,
1478        >::from_register(self, 0)
1479    }
1480
1481    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1482    #[inline(always)]
1483    pub fn cclr5(
1484        self,
1485    ) -> crate::common::RegisterField<
1486        5,
1487        0x1,
1488        1,
1489        0,
1490        gtclr::Cclr5,
1491        gtclr::Cclr5,
1492        Gtclr_SPEC,
1493        crate::common::W,
1494    > {
1495        crate::common::RegisterField::<
1496            5,
1497            0x1,
1498            1,
1499            0,
1500            gtclr::Cclr5,
1501            gtclr::Cclr5,
1502            Gtclr_SPEC,
1503            crate::common::W,
1504        >::from_register(self, 0)
1505    }
1506
1507    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1508    #[inline(always)]
1509    pub fn cclr6(
1510        self,
1511    ) -> crate::common::RegisterField<
1512        6,
1513        0x1,
1514        1,
1515        0,
1516        gtclr::Cclr6,
1517        gtclr::Cclr6,
1518        Gtclr_SPEC,
1519        crate::common::W,
1520    > {
1521        crate::common::RegisterField::<
1522            6,
1523            0x1,
1524            1,
1525            0,
1526            gtclr::Cclr6,
1527            gtclr::Cclr6,
1528            Gtclr_SPEC,
1529            crate::common::W,
1530        >::from_register(self, 0)
1531    }
1532
1533    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1534    #[inline(always)]
1535    pub fn cclr7(
1536        self,
1537    ) -> crate::common::RegisterField<
1538        7,
1539        0x1,
1540        1,
1541        0,
1542        gtclr::Cclr7,
1543        gtclr::Cclr7,
1544        Gtclr_SPEC,
1545        crate::common::W,
1546    > {
1547        crate::common::RegisterField::<
1548            7,
1549            0x1,
1550            1,
1551            0,
1552            gtclr::Cclr7,
1553            gtclr::Cclr7,
1554            Gtclr_SPEC,
1555            crate::common::W,
1556        >::from_register(self, 0)
1557    }
1558
1559    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1560    #[inline(always)]
1561    pub fn cclr8(
1562        self,
1563    ) -> crate::common::RegisterField<
1564        8,
1565        0x1,
1566        1,
1567        0,
1568        gtclr::Cclr8,
1569        gtclr::Cclr8,
1570        Gtclr_SPEC,
1571        crate::common::W,
1572    > {
1573        crate::common::RegisterField::<
1574            8,
1575            0x1,
1576            1,
1577            0,
1578            gtclr::Cclr8,
1579            gtclr::Cclr8,
1580            Gtclr_SPEC,
1581            crate::common::W,
1582        >::from_register(self, 0)
1583    }
1584
1585    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1586    #[inline(always)]
1587    pub fn cclr9(
1588        self,
1589    ) -> crate::common::RegisterField<
1590        9,
1591        0x1,
1592        1,
1593        0,
1594        gtclr::Cclr9,
1595        gtclr::Cclr9,
1596        Gtclr_SPEC,
1597        crate::common::W,
1598    > {
1599        crate::common::RegisterField::<
1600            9,
1601            0x1,
1602            1,
1603            0,
1604            gtclr::Cclr9,
1605            gtclr::Cclr9,
1606            Gtclr_SPEC,
1607            crate::common::W,
1608        >::from_register(self, 0)
1609    }
1610}
1611impl ::core::default::Default for Gtclr {
1612    #[inline(always)]
1613    fn default() -> Gtclr {
1614        <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1615    }
1616}
1617pub mod gtclr {
1618
1619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1620    pub struct Cclr0_SPEC;
1621    pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
1622    impl Cclr0 {
1623        #[doc = "GTCNT counter is not cleared"]
1624        pub const _0: Self = Self::new(0);
1625
1626        #[doc = "GTCNT counter is cleared"]
1627        pub const _1: Self = Self::new(1);
1628    }
1629    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1630    pub struct Cclr1_SPEC;
1631    pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
1632    impl Cclr1 {
1633        #[doc = "GTCNT counter is not cleared"]
1634        pub const _0: Self = Self::new(0);
1635
1636        #[doc = "GTCNT counter is cleared"]
1637        pub const _1: Self = Self::new(1);
1638    }
1639    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1640    pub struct Cclr2_SPEC;
1641    pub type Cclr2 = crate::EnumBitfieldStruct<u8, Cclr2_SPEC>;
1642    impl Cclr2 {
1643        #[doc = "GTCNT counter is not cleared"]
1644        pub const _0: Self = Self::new(0);
1645
1646        #[doc = "GTCNT counter is cleared"]
1647        pub const _1: Self = Self::new(1);
1648    }
1649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1650    pub struct Cclr3_SPEC;
1651    pub type Cclr3 = crate::EnumBitfieldStruct<u8, Cclr3_SPEC>;
1652    impl Cclr3 {
1653        #[doc = "GTCNT counter is not cleared"]
1654        pub const _0: Self = Self::new(0);
1655
1656        #[doc = "GTCNT counter is cleared"]
1657        pub const _1: Self = Self::new(1);
1658    }
1659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1660    pub struct Cclr4_SPEC;
1661    pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
1662    impl Cclr4 {
1663        #[doc = "GTCNT counter is not cleared"]
1664        pub const _0: Self = Self::new(0);
1665
1666        #[doc = "GTCNT counter is cleared"]
1667        pub const _1: Self = Self::new(1);
1668    }
1669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1670    pub struct Cclr5_SPEC;
1671    pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
1672    impl Cclr5 {
1673        #[doc = "GTCNT counter is not cleared"]
1674        pub const _0: Self = Self::new(0);
1675
1676        #[doc = "GTCNT counter is cleared"]
1677        pub const _1: Self = Self::new(1);
1678    }
1679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1680    pub struct Cclr6_SPEC;
1681    pub type Cclr6 = crate::EnumBitfieldStruct<u8, Cclr6_SPEC>;
1682    impl Cclr6 {
1683        #[doc = "GTCNT counter is not cleared"]
1684        pub const _0: Self = Self::new(0);
1685
1686        #[doc = "GTCNT counter is cleared"]
1687        pub const _1: Self = Self::new(1);
1688    }
1689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1690    pub struct Cclr7_SPEC;
1691    pub type Cclr7 = crate::EnumBitfieldStruct<u8, Cclr7_SPEC>;
1692    impl Cclr7 {
1693        #[doc = "GTCNT counter is not cleared"]
1694        pub const _0: Self = Self::new(0);
1695
1696        #[doc = "GTCNT counter is cleared"]
1697        pub const _1: Self = Self::new(1);
1698    }
1699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1700    pub struct Cclr8_SPEC;
1701    pub type Cclr8 = crate::EnumBitfieldStruct<u8, Cclr8_SPEC>;
1702    impl Cclr8 {
1703        #[doc = "GTCNT counter is not cleared"]
1704        pub const _0: Self = Self::new(0);
1705
1706        #[doc = "GTCNT counter is cleared"]
1707        pub const _1: Self = Self::new(1);
1708    }
1709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1710    pub struct Cclr9_SPEC;
1711    pub type Cclr9 = crate::EnumBitfieldStruct<u8, Cclr9_SPEC>;
1712    impl Cclr9 {
1713        #[doc = "GTCNT counter is not cleared"]
1714        pub const _0: Self = Self::new(0);
1715
1716        #[doc = "GTCNT counter is cleared"]
1717        pub const _1: Self = Self::new(1);
1718    }
1719}
1720#[doc(hidden)]
1721#[derive(Copy, Clone, Eq, PartialEq)]
1722pub struct Gtssr_SPEC;
1723impl crate::sealed::RegSpec for Gtssr_SPEC {
1724    type DataType = u32;
1725}
1726
1727#[doc = "General PWM Timer Start Source Select Register"]
1728pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
1729
1730impl Gtssr {
1731    #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
1732    #[inline(always)]
1733    pub fn ssgtrgar(
1734        self,
1735    ) -> crate::common::RegisterField<
1736        0,
1737        0x1,
1738        1,
1739        0,
1740        gtssr::Ssgtrgar,
1741        gtssr::Ssgtrgar,
1742        Gtssr_SPEC,
1743        crate::common::RW,
1744    > {
1745        crate::common::RegisterField::<
1746            0,
1747            0x1,
1748            1,
1749            0,
1750            gtssr::Ssgtrgar,
1751            gtssr::Ssgtrgar,
1752            Gtssr_SPEC,
1753            crate::common::RW,
1754        >::from_register(self, 0)
1755    }
1756
1757    #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
1758    #[inline(always)]
1759    pub fn ssgtrgaf(
1760        self,
1761    ) -> crate::common::RegisterField<
1762        1,
1763        0x1,
1764        1,
1765        0,
1766        gtssr::Ssgtrgaf,
1767        gtssr::Ssgtrgaf,
1768        Gtssr_SPEC,
1769        crate::common::RW,
1770    > {
1771        crate::common::RegisterField::<
1772            1,
1773            0x1,
1774            1,
1775            0,
1776            gtssr::Ssgtrgaf,
1777            gtssr::Ssgtrgaf,
1778            Gtssr_SPEC,
1779            crate::common::RW,
1780        >::from_register(self, 0)
1781    }
1782
1783    #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
1784    #[inline(always)]
1785    pub fn ssgtrgbr(
1786        self,
1787    ) -> crate::common::RegisterField<
1788        2,
1789        0x1,
1790        1,
1791        0,
1792        gtssr::Ssgtrgbr,
1793        gtssr::Ssgtrgbr,
1794        Gtssr_SPEC,
1795        crate::common::RW,
1796    > {
1797        crate::common::RegisterField::<
1798            2,
1799            0x1,
1800            1,
1801            0,
1802            gtssr::Ssgtrgbr,
1803            gtssr::Ssgtrgbr,
1804            Gtssr_SPEC,
1805            crate::common::RW,
1806        >::from_register(self, 0)
1807    }
1808
1809    #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
1810    #[inline(always)]
1811    pub fn ssgtrgbf(
1812        self,
1813    ) -> crate::common::RegisterField<
1814        3,
1815        0x1,
1816        1,
1817        0,
1818        gtssr::Ssgtrgbf,
1819        gtssr::Ssgtrgbf,
1820        Gtssr_SPEC,
1821        crate::common::RW,
1822    > {
1823        crate::common::RegisterField::<
1824            3,
1825            0x1,
1826            1,
1827            0,
1828            gtssr::Ssgtrgbf,
1829            gtssr::Ssgtrgbf,
1830            Gtssr_SPEC,
1831            crate::common::RW,
1832        >::from_register(self, 0)
1833    }
1834
1835    #[doc = "GTETRGC Pin Rising Input Source Counter Start Enable"]
1836    #[inline(always)]
1837    pub fn ssgtrgcr(
1838        self,
1839    ) -> crate::common::RegisterField<
1840        4,
1841        0x1,
1842        1,
1843        0,
1844        gtssr::Ssgtrgcr,
1845        gtssr::Ssgtrgcr,
1846        Gtssr_SPEC,
1847        crate::common::RW,
1848    > {
1849        crate::common::RegisterField::<
1850            4,
1851            0x1,
1852            1,
1853            0,
1854            gtssr::Ssgtrgcr,
1855            gtssr::Ssgtrgcr,
1856            Gtssr_SPEC,
1857            crate::common::RW,
1858        >::from_register(self, 0)
1859    }
1860
1861    #[doc = "GTETRGC Pin Falling Input Source Counter Start Enable"]
1862    #[inline(always)]
1863    pub fn ssgtrgcf(
1864        self,
1865    ) -> crate::common::RegisterField<
1866        5,
1867        0x1,
1868        1,
1869        0,
1870        gtssr::Ssgtrgcf,
1871        gtssr::Ssgtrgcf,
1872        Gtssr_SPEC,
1873        crate::common::RW,
1874    > {
1875        crate::common::RegisterField::<
1876            5,
1877            0x1,
1878            1,
1879            0,
1880            gtssr::Ssgtrgcf,
1881            gtssr::Ssgtrgcf,
1882            Gtssr_SPEC,
1883            crate::common::RW,
1884        >::from_register(self, 0)
1885    }
1886
1887    #[doc = "GTETRGD Pin Rising Input Source Counter Start Enable"]
1888    #[inline(always)]
1889    pub fn ssgtrgdr(
1890        self,
1891    ) -> crate::common::RegisterField<
1892        6,
1893        0x1,
1894        1,
1895        0,
1896        gtssr::Ssgtrgdr,
1897        gtssr::Ssgtrgdr,
1898        Gtssr_SPEC,
1899        crate::common::RW,
1900    > {
1901        crate::common::RegisterField::<
1902            6,
1903            0x1,
1904            1,
1905            0,
1906            gtssr::Ssgtrgdr,
1907            gtssr::Ssgtrgdr,
1908            Gtssr_SPEC,
1909            crate::common::RW,
1910        >::from_register(self, 0)
1911    }
1912
1913    #[doc = "GTETRGD Pin Falling Input Source Counter Start Enable"]
1914    #[inline(always)]
1915    pub fn ssgtrgdf(
1916        self,
1917    ) -> crate::common::RegisterField<
1918        7,
1919        0x1,
1920        1,
1921        0,
1922        gtssr::Ssgtrgdf,
1923        gtssr::Ssgtrgdf,
1924        Gtssr_SPEC,
1925        crate::common::RW,
1926    > {
1927        crate::common::RegisterField::<
1928            7,
1929            0x1,
1930            1,
1931            0,
1932            gtssr::Ssgtrgdf,
1933            gtssr::Ssgtrgdf,
1934            Gtssr_SPEC,
1935            crate::common::RW,
1936        >::from_register(self, 0)
1937    }
1938
1939    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable"]
1940    #[inline(always)]
1941    pub fn sscarbl(
1942        self,
1943    ) -> crate::common::RegisterField<
1944        8,
1945        0x1,
1946        1,
1947        0,
1948        gtssr::Sscarbl,
1949        gtssr::Sscarbl,
1950        Gtssr_SPEC,
1951        crate::common::RW,
1952    > {
1953        crate::common::RegisterField::<
1954            8,
1955            0x1,
1956            1,
1957            0,
1958            gtssr::Sscarbl,
1959            gtssr::Sscarbl,
1960            Gtssr_SPEC,
1961            crate::common::RW,
1962        >::from_register(self, 0)
1963    }
1964
1965    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable"]
1966    #[inline(always)]
1967    pub fn sscarbh(
1968        self,
1969    ) -> crate::common::RegisterField<
1970        9,
1971        0x1,
1972        1,
1973        0,
1974        gtssr::Sscarbh,
1975        gtssr::Sscarbh,
1976        Gtssr_SPEC,
1977        crate::common::RW,
1978    > {
1979        crate::common::RegisterField::<
1980            9,
1981            0x1,
1982            1,
1983            0,
1984            gtssr::Sscarbh,
1985            gtssr::Sscarbh,
1986            Gtssr_SPEC,
1987            crate::common::RW,
1988        >::from_register(self, 0)
1989    }
1990
1991    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable"]
1992    #[inline(always)]
1993    pub fn sscafbl(
1994        self,
1995    ) -> crate::common::RegisterField<
1996        10,
1997        0x1,
1998        1,
1999        0,
2000        gtssr::Sscafbl,
2001        gtssr::Sscafbl,
2002        Gtssr_SPEC,
2003        crate::common::RW,
2004    > {
2005        crate::common::RegisterField::<
2006            10,
2007            0x1,
2008            1,
2009            0,
2010            gtssr::Sscafbl,
2011            gtssr::Sscafbl,
2012            Gtssr_SPEC,
2013            crate::common::RW,
2014        >::from_register(self, 0)
2015    }
2016
2017    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable"]
2018    #[inline(always)]
2019    pub fn sscafbh(
2020        self,
2021    ) -> crate::common::RegisterField<
2022        11,
2023        0x1,
2024        1,
2025        0,
2026        gtssr::Sscafbh,
2027        gtssr::Sscafbh,
2028        Gtssr_SPEC,
2029        crate::common::RW,
2030    > {
2031        crate::common::RegisterField::<
2032            11,
2033            0x1,
2034            1,
2035            0,
2036            gtssr::Sscafbh,
2037            gtssr::Sscafbh,
2038            Gtssr_SPEC,
2039            crate::common::RW,
2040        >::from_register(self, 0)
2041    }
2042
2043    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable"]
2044    #[inline(always)]
2045    pub fn sscbral(
2046        self,
2047    ) -> crate::common::RegisterField<
2048        12,
2049        0x1,
2050        1,
2051        0,
2052        gtssr::Sscbral,
2053        gtssr::Sscbral,
2054        Gtssr_SPEC,
2055        crate::common::RW,
2056    > {
2057        crate::common::RegisterField::<
2058            12,
2059            0x1,
2060            1,
2061            0,
2062            gtssr::Sscbral,
2063            gtssr::Sscbral,
2064            Gtssr_SPEC,
2065            crate::common::RW,
2066        >::from_register(self, 0)
2067    }
2068
2069    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable"]
2070    #[inline(always)]
2071    pub fn sscbrah(
2072        self,
2073    ) -> crate::common::RegisterField<
2074        13,
2075        0x1,
2076        1,
2077        0,
2078        gtssr::Sscbrah,
2079        gtssr::Sscbrah,
2080        Gtssr_SPEC,
2081        crate::common::RW,
2082    > {
2083        crate::common::RegisterField::<
2084            13,
2085            0x1,
2086            1,
2087            0,
2088            gtssr::Sscbrah,
2089            gtssr::Sscbrah,
2090            Gtssr_SPEC,
2091            crate::common::RW,
2092        >::from_register(self, 0)
2093    }
2094
2095    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable"]
2096    #[inline(always)]
2097    pub fn sscbfal(
2098        self,
2099    ) -> crate::common::RegisterField<
2100        14,
2101        0x1,
2102        1,
2103        0,
2104        gtssr::Sscbfal,
2105        gtssr::Sscbfal,
2106        Gtssr_SPEC,
2107        crate::common::RW,
2108    > {
2109        crate::common::RegisterField::<
2110            14,
2111            0x1,
2112            1,
2113            0,
2114            gtssr::Sscbfal,
2115            gtssr::Sscbfal,
2116            Gtssr_SPEC,
2117            crate::common::RW,
2118        >::from_register(self, 0)
2119    }
2120
2121    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable"]
2122    #[inline(always)]
2123    pub fn sscbfah(
2124        self,
2125    ) -> crate::common::RegisterField<
2126        15,
2127        0x1,
2128        1,
2129        0,
2130        gtssr::Sscbfah,
2131        gtssr::Sscbfah,
2132        Gtssr_SPEC,
2133        crate::common::RW,
2134    > {
2135        crate::common::RegisterField::<
2136            15,
2137            0x1,
2138            1,
2139            0,
2140            gtssr::Sscbfah,
2141            gtssr::Sscbfah,
2142            Gtssr_SPEC,
2143            crate::common::RW,
2144        >::from_register(self, 0)
2145    }
2146
2147    #[doc = "ELC_GPTA Event Source Counter Start Enable"]
2148    #[inline(always)]
2149    pub fn sselca(
2150        self,
2151    ) -> crate::common::RegisterField<
2152        16,
2153        0x1,
2154        1,
2155        0,
2156        gtssr::Sselca,
2157        gtssr::Sselca,
2158        Gtssr_SPEC,
2159        crate::common::RW,
2160    > {
2161        crate::common::RegisterField::<
2162            16,
2163            0x1,
2164            1,
2165            0,
2166            gtssr::Sselca,
2167            gtssr::Sselca,
2168            Gtssr_SPEC,
2169            crate::common::RW,
2170        >::from_register(self, 0)
2171    }
2172
2173    #[doc = "ELC_GPTB Event Source Counter Start Enable"]
2174    #[inline(always)]
2175    pub fn sselcb(
2176        self,
2177    ) -> crate::common::RegisterField<
2178        17,
2179        0x1,
2180        1,
2181        0,
2182        gtssr::Sselcb,
2183        gtssr::Sselcb,
2184        Gtssr_SPEC,
2185        crate::common::RW,
2186    > {
2187        crate::common::RegisterField::<
2188            17,
2189            0x1,
2190            1,
2191            0,
2192            gtssr::Sselcb,
2193            gtssr::Sselcb,
2194            Gtssr_SPEC,
2195            crate::common::RW,
2196        >::from_register(self, 0)
2197    }
2198
2199    #[doc = "ELC_GPTC Event Source Counter Start Enable"]
2200    #[inline(always)]
2201    pub fn sselcc(
2202        self,
2203    ) -> crate::common::RegisterField<
2204        18,
2205        0x1,
2206        1,
2207        0,
2208        gtssr::Sselcc,
2209        gtssr::Sselcc,
2210        Gtssr_SPEC,
2211        crate::common::RW,
2212    > {
2213        crate::common::RegisterField::<
2214            18,
2215            0x1,
2216            1,
2217            0,
2218            gtssr::Sselcc,
2219            gtssr::Sselcc,
2220            Gtssr_SPEC,
2221            crate::common::RW,
2222        >::from_register(self, 0)
2223    }
2224
2225    #[doc = "ELC_GPTD Event Source Counter Start Enable"]
2226    #[inline(always)]
2227    pub fn sselcd(
2228        self,
2229    ) -> crate::common::RegisterField<
2230        19,
2231        0x1,
2232        1,
2233        0,
2234        gtssr::Sselcd,
2235        gtssr::Sselcd,
2236        Gtssr_SPEC,
2237        crate::common::RW,
2238    > {
2239        crate::common::RegisterField::<
2240            19,
2241            0x1,
2242            1,
2243            0,
2244            gtssr::Sselcd,
2245            gtssr::Sselcd,
2246            Gtssr_SPEC,
2247            crate::common::RW,
2248        >::from_register(self, 0)
2249    }
2250
2251    #[doc = "ELC_GPTE Event Source Counter Start Enable"]
2252    #[inline(always)]
2253    pub fn sselce(
2254        self,
2255    ) -> crate::common::RegisterField<
2256        20,
2257        0x1,
2258        1,
2259        0,
2260        gtssr::Sselce,
2261        gtssr::Sselce,
2262        Gtssr_SPEC,
2263        crate::common::RW,
2264    > {
2265        crate::common::RegisterField::<
2266            20,
2267            0x1,
2268            1,
2269            0,
2270            gtssr::Sselce,
2271            gtssr::Sselce,
2272            Gtssr_SPEC,
2273            crate::common::RW,
2274        >::from_register(self, 0)
2275    }
2276
2277    #[doc = "ELC_GPTF Event Source Counter Start Enable"]
2278    #[inline(always)]
2279    pub fn sselcf(
2280        self,
2281    ) -> crate::common::RegisterField<
2282        21,
2283        0x1,
2284        1,
2285        0,
2286        gtssr::Sselcf,
2287        gtssr::Sselcf,
2288        Gtssr_SPEC,
2289        crate::common::RW,
2290    > {
2291        crate::common::RegisterField::<
2292            21,
2293            0x1,
2294            1,
2295            0,
2296            gtssr::Sselcf,
2297            gtssr::Sselcf,
2298            Gtssr_SPEC,
2299            crate::common::RW,
2300        >::from_register(self, 0)
2301    }
2302
2303    #[doc = "ELC_GPTG Event Source Counter Start Enable"]
2304    #[inline(always)]
2305    pub fn sselcg(
2306        self,
2307    ) -> crate::common::RegisterField<
2308        22,
2309        0x1,
2310        1,
2311        0,
2312        gtssr::Sselcg,
2313        gtssr::Sselcg,
2314        Gtssr_SPEC,
2315        crate::common::RW,
2316    > {
2317        crate::common::RegisterField::<
2318            22,
2319            0x1,
2320            1,
2321            0,
2322            gtssr::Sselcg,
2323            gtssr::Sselcg,
2324            Gtssr_SPEC,
2325            crate::common::RW,
2326        >::from_register(self, 0)
2327    }
2328
2329    #[doc = "ELC_GPTH Event Source Counter Start Enable"]
2330    #[inline(always)]
2331    pub fn sselch(
2332        self,
2333    ) -> crate::common::RegisterField<
2334        23,
2335        0x1,
2336        1,
2337        0,
2338        gtssr::Sselch,
2339        gtssr::Sselch,
2340        Gtssr_SPEC,
2341        crate::common::RW,
2342    > {
2343        crate::common::RegisterField::<
2344            23,
2345            0x1,
2346            1,
2347            0,
2348            gtssr::Sselch,
2349            gtssr::Sselch,
2350            Gtssr_SPEC,
2351            crate::common::RW,
2352        >::from_register(self, 0)
2353    }
2354
2355    #[doc = "Software Source Counter Start Enable"]
2356    #[inline(always)]
2357    pub fn cstrt(
2358        self,
2359    ) -> crate::common::RegisterField<
2360        31,
2361        0x1,
2362        1,
2363        0,
2364        gtssr::Cstrt,
2365        gtssr::Cstrt,
2366        Gtssr_SPEC,
2367        crate::common::RW,
2368    > {
2369        crate::common::RegisterField::<
2370            31,
2371            0x1,
2372            1,
2373            0,
2374            gtssr::Cstrt,
2375            gtssr::Cstrt,
2376            Gtssr_SPEC,
2377            crate::common::RW,
2378        >::from_register(self, 0)
2379    }
2380}
2381impl ::core::default::Default for Gtssr {
2382    #[inline(always)]
2383    fn default() -> Gtssr {
2384        <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
2385    }
2386}
2387pub mod gtssr {
2388
2389    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2390    pub struct Ssgtrgar_SPEC;
2391    pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
2392    impl Ssgtrgar {
2393        #[doc = "Counter start disabled on the rising edge of GTETRGA input"]
2394        pub const _0: Self = Self::new(0);
2395
2396        #[doc = "Counter start enabled on the rising edge of GTETRGA input"]
2397        pub const _1: Self = Self::new(1);
2398    }
2399    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2400    pub struct Ssgtrgaf_SPEC;
2401    pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
2402    impl Ssgtrgaf {
2403        #[doc = "Counter start disabled on the falling edge of GTETRGA input"]
2404        pub const _0: Self = Self::new(0);
2405
2406        #[doc = "Counter start enabled on the falling edge of GTETRGA input"]
2407        pub const _1: Self = Self::new(1);
2408    }
2409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2410    pub struct Ssgtrgbr_SPEC;
2411    pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
2412    impl Ssgtrgbr {
2413        #[doc = "Counter start disabled on the rising edge of GTETRGB input"]
2414        pub const _0: Self = Self::new(0);
2415
2416        #[doc = "Counter start enabled on the rising edge of GTETRGB input"]
2417        pub const _1: Self = Self::new(1);
2418    }
2419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2420    pub struct Ssgtrgbf_SPEC;
2421    pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
2422    impl Ssgtrgbf {
2423        #[doc = "Counter start disabled on the falling edge of GTETRGB input"]
2424        pub const _0: Self = Self::new(0);
2425
2426        #[doc = "Counter start enabled on the falling edge of GTETRGB input"]
2427        pub const _1: Self = Self::new(1);
2428    }
2429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2430    pub struct Ssgtrgcr_SPEC;
2431    pub type Ssgtrgcr = crate::EnumBitfieldStruct<u8, Ssgtrgcr_SPEC>;
2432    impl Ssgtrgcr {
2433        #[doc = "Counter start disabled on the rising edge of GTETRGC input"]
2434        pub const _0: Self = Self::new(0);
2435
2436        #[doc = "Counter start enabled on the rising edge of GTETRGC input"]
2437        pub const _1: Self = Self::new(1);
2438    }
2439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2440    pub struct Ssgtrgcf_SPEC;
2441    pub type Ssgtrgcf = crate::EnumBitfieldStruct<u8, Ssgtrgcf_SPEC>;
2442    impl Ssgtrgcf {
2443        #[doc = "Counter start disabled on the falling edge of GTETRGC input"]
2444        pub const _0: Self = Self::new(0);
2445
2446        #[doc = "Counter start enabled on the falling edge of GTETRGC input"]
2447        pub const _1: Self = Self::new(1);
2448    }
2449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2450    pub struct Ssgtrgdr_SPEC;
2451    pub type Ssgtrgdr = crate::EnumBitfieldStruct<u8, Ssgtrgdr_SPEC>;
2452    impl Ssgtrgdr {
2453        #[doc = "Counter start disabled on the rising edge of GTETRGD input"]
2454        pub const _0: Self = Self::new(0);
2455
2456        #[doc = "Counter start enabled on the rising edge of GTETRGD input"]
2457        pub const _1: Self = Self::new(1);
2458    }
2459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2460    pub struct Ssgtrgdf_SPEC;
2461    pub type Ssgtrgdf = crate::EnumBitfieldStruct<u8, Ssgtrgdf_SPEC>;
2462    impl Ssgtrgdf {
2463        #[doc = "Counter start disabled on the falling edge of GTETRGD input"]
2464        pub const _0: Self = Self::new(0);
2465
2466        #[doc = "Counter start enabled on the falling edge of GTETRGD input"]
2467        pub const _1: Self = Self::new(1);
2468    }
2469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2470    pub struct Sscarbl_SPEC;
2471    pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
2472    impl Sscarbl {
2473        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2474        pub const _0: Self = Self::new(0);
2475
2476        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2477        pub const _1: Self = Self::new(1);
2478    }
2479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2480    pub struct Sscarbh_SPEC;
2481    pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
2482    impl Sscarbh {
2483        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2484        pub const _0: Self = Self::new(0);
2485
2486        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2487        pub const _1: Self = Self::new(1);
2488    }
2489    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2490    pub struct Sscafbl_SPEC;
2491    pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2492    impl Sscafbl {
2493        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2494        pub const _0: Self = Self::new(0);
2495
2496        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2497        pub const _1: Self = Self::new(1);
2498    }
2499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2500    pub struct Sscafbh_SPEC;
2501    pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2502    impl Sscafbh {
2503        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2504        pub const _0: Self = Self::new(0);
2505
2506        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2507        pub const _1: Self = Self::new(1);
2508    }
2509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2510    pub struct Sscbral_SPEC;
2511    pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2512    impl Sscbral {
2513        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2514        pub const _0: Self = Self::new(0);
2515
2516        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2517        pub const _1: Self = Self::new(1);
2518    }
2519    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2520    pub struct Sscbrah_SPEC;
2521    pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2522    impl Sscbrah {
2523        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2524        pub const _0: Self = Self::new(0);
2525
2526        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2527        pub const _1: Self = Self::new(1);
2528    }
2529    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2530    pub struct Sscbfal_SPEC;
2531    pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2532    impl Sscbfal {
2533        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2534        pub const _0: Self = Self::new(0);
2535
2536        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2537        pub const _1: Self = Self::new(1);
2538    }
2539    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2540    pub struct Sscbfah_SPEC;
2541    pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2542    impl Sscbfah {
2543        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2544        pub const _0: Self = Self::new(0);
2545
2546        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2547        pub const _1: Self = Self::new(1);
2548    }
2549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2550    pub struct Sselca_SPEC;
2551    pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2552    impl Sselca {
2553        #[doc = "Counter start disabled at the ELC_GPTA input"]
2554        pub const _0: Self = Self::new(0);
2555
2556        #[doc = "Counter start enabled at the ELC_GPTA input"]
2557        pub const _1: Self = Self::new(1);
2558    }
2559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2560    pub struct Sselcb_SPEC;
2561    pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2562    impl Sselcb {
2563        #[doc = "Counter start disabled at the ELC_GPTB input"]
2564        pub const _0: Self = Self::new(0);
2565
2566        #[doc = "Counter start enabled at the ELC_GPTB input"]
2567        pub const _1: Self = Self::new(1);
2568    }
2569    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2570    pub struct Sselcc_SPEC;
2571    pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2572    impl Sselcc {
2573        #[doc = "Counter start disabled at the ELC_GPTC input"]
2574        pub const _0: Self = Self::new(0);
2575
2576        #[doc = "Counter start enabled at the ELC_GPTC input"]
2577        pub const _1: Self = Self::new(1);
2578    }
2579    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2580    pub struct Sselcd_SPEC;
2581    pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2582    impl Sselcd {
2583        #[doc = "Counter start disabled at the ELC_GPTD input"]
2584        pub const _0: Self = Self::new(0);
2585
2586        #[doc = "Counter start enabled at the ELC_GPTD input"]
2587        pub const _1: Self = Self::new(1);
2588    }
2589    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2590    pub struct Sselce_SPEC;
2591    pub type Sselce = crate::EnumBitfieldStruct<u8, Sselce_SPEC>;
2592    impl Sselce {
2593        #[doc = "Counter start disabled at the ELC_GPTE input"]
2594        pub const _0: Self = Self::new(0);
2595
2596        #[doc = "Counter start enabled at the ELC_GPTE input"]
2597        pub const _1: Self = Self::new(1);
2598    }
2599    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2600    pub struct Sselcf_SPEC;
2601    pub type Sselcf = crate::EnumBitfieldStruct<u8, Sselcf_SPEC>;
2602    impl Sselcf {
2603        #[doc = "Counter start disabled at the ELC_GPTF input"]
2604        pub const _0: Self = Self::new(0);
2605
2606        #[doc = "Counter start enabled at the ELC_GPTF input"]
2607        pub const _1: Self = Self::new(1);
2608    }
2609    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2610    pub struct Sselcg_SPEC;
2611    pub type Sselcg = crate::EnumBitfieldStruct<u8, Sselcg_SPEC>;
2612    impl Sselcg {
2613        #[doc = "Counter start disabled at the ELC_GPTG input"]
2614        pub const _0: Self = Self::new(0);
2615
2616        #[doc = "Counter start enabled at the ELC_GPTG input"]
2617        pub const _1: Self = Self::new(1);
2618    }
2619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2620    pub struct Sselch_SPEC;
2621    pub type Sselch = crate::EnumBitfieldStruct<u8, Sselch_SPEC>;
2622    impl Sselch {
2623        #[doc = "Counter start disabled at the ELC_GPTH input"]
2624        pub const _0: Self = Self::new(0);
2625
2626        #[doc = "Counter start enabled at the ELC_GPTH input"]
2627        pub const _1: Self = Self::new(1);
2628    }
2629    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2630    pub struct Cstrt_SPEC;
2631    pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2632    impl Cstrt {
2633        #[doc = "Counter start disabled by the GTSTR register"]
2634        pub const _0: Self = Self::new(0);
2635
2636        #[doc = "Counter start enabled by the GTSTR register"]
2637        pub const _1: Self = Self::new(1);
2638    }
2639}
2640#[doc(hidden)]
2641#[derive(Copy, Clone, Eq, PartialEq)]
2642pub struct Gtpsr_SPEC;
2643impl crate::sealed::RegSpec for Gtpsr_SPEC {
2644    type DataType = u32;
2645}
2646
2647#[doc = "General PWM Timer Stop Source Select Register"]
2648pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
2649
2650impl Gtpsr {
2651    #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
2652    #[inline(always)]
2653    pub fn psgtrgar(
2654        self,
2655    ) -> crate::common::RegisterField<
2656        0,
2657        0x1,
2658        1,
2659        0,
2660        gtpsr::Psgtrgar,
2661        gtpsr::Psgtrgar,
2662        Gtpsr_SPEC,
2663        crate::common::RW,
2664    > {
2665        crate::common::RegisterField::<
2666            0,
2667            0x1,
2668            1,
2669            0,
2670            gtpsr::Psgtrgar,
2671            gtpsr::Psgtrgar,
2672            Gtpsr_SPEC,
2673            crate::common::RW,
2674        >::from_register(self, 0)
2675    }
2676
2677    #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
2678    #[inline(always)]
2679    pub fn psgtrgaf(
2680        self,
2681    ) -> crate::common::RegisterField<
2682        1,
2683        0x1,
2684        1,
2685        0,
2686        gtpsr::Psgtrgaf,
2687        gtpsr::Psgtrgaf,
2688        Gtpsr_SPEC,
2689        crate::common::RW,
2690    > {
2691        crate::common::RegisterField::<
2692            1,
2693            0x1,
2694            1,
2695            0,
2696            gtpsr::Psgtrgaf,
2697            gtpsr::Psgtrgaf,
2698            Gtpsr_SPEC,
2699            crate::common::RW,
2700        >::from_register(self, 0)
2701    }
2702
2703    #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
2704    #[inline(always)]
2705    pub fn psgtrgbr(
2706        self,
2707    ) -> crate::common::RegisterField<
2708        2,
2709        0x1,
2710        1,
2711        0,
2712        gtpsr::Psgtrgbr,
2713        gtpsr::Psgtrgbr,
2714        Gtpsr_SPEC,
2715        crate::common::RW,
2716    > {
2717        crate::common::RegisterField::<
2718            2,
2719            0x1,
2720            1,
2721            0,
2722            gtpsr::Psgtrgbr,
2723            gtpsr::Psgtrgbr,
2724            Gtpsr_SPEC,
2725            crate::common::RW,
2726        >::from_register(self, 0)
2727    }
2728
2729    #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
2730    #[inline(always)]
2731    pub fn psgtrgbf(
2732        self,
2733    ) -> crate::common::RegisterField<
2734        3,
2735        0x1,
2736        1,
2737        0,
2738        gtpsr::Psgtrgbf,
2739        gtpsr::Psgtrgbf,
2740        Gtpsr_SPEC,
2741        crate::common::RW,
2742    > {
2743        crate::common::RegisterField::<
2744            3,
2745            0x1,
2746            1,
2747            0,
2748            gtpsr::Psgtrgbf,
2749            gtpsr::Psgtrgbf,
2750            Gtpsr_SPEC,
2751            crate::common::RW,
2752        >::from_register(self, 0)
2753    }
2754
2755    #[doc = "GTETRGC Pin Rising Input Source Counter Stop Enable"]
2756    #[inline(always)]
2757    pub fn psgtrgcr(
2758        self,
2759    ) -> crate::common::RegisterField<
2760        4,
2761        0x1,
2762        1,
2763        0,
2764        gtpsr::Psgtrgcr,
2765        gtpsr::Psgtrgcr,
2766        Gtpsr_SPEC,
2767        crate::common::RW,
2768    > {
2769        crate::common::RegisterField::<
2770            4,
2771            0x1,
2772            1,
2773            0,
2774            gtpsr::Psgtrgcr,
2775            gtpsr::Psgtrgcr,
2776            Gtpsr_SPEC,
2777            crate::common::RW,
2778        >::from_register(self, 0)
2779    }
2780
2781    #[doc = "GTETRGC Pin Falling Input Source Counter Stop Enable"]
2782    #[inline(always)]
2783    pub fn psgtrgcf(
2784        self,
2785    ) -> crate::common::RegisterField<
2786        5,
2787        0x1,
2788        1,
2789        0,
2790        gtpsr::Psgtrgcf,
2791        gtpsr::Psgtrgcf,
2792        Gtpsr_SPEC,
2793        crate::common::RW,
2794    > {
2795        crate::common::RegisterField::<
2796            5,
2797            0x1,
2798            1,
2799            0,
2800            gtpsr::Psgtrgcf,
2801            gtpsr::Psgtrgcf,
2802            Gtpsr_SPEC,
2803            crate::common::RW,
2804        >::from_register(self, 0)
2805    }
2806
2807    #[doc = "GTETRGD Pin Rising Input Source Counter Stop Enable"]
2808    #[inline(always)]
2809    pub fn psgtrgdr(
2810        self,
2811    ) -> crate::common::RegisterField<
2812        6,
2813        0x1,
2814        1,
2815        0,
2816        gtpsr::Psgtrgdr,
2817        gtpsr::Psgtrgdr,
2818        Gtpsr_SPEC,
2819        crate::common::RW,
2820    > {
2821        crate::common::RegisterField::<
2822            6,
2823            0x1,
2824            1,
2825            0,
2826            gtpsr::Psgtrgdr,
2827            gtpsr::Psgtrgdr,
2828            Gtpsr_SPEC,
2829            crate::common::RW,
2830        >::from_register(self, 0)
2831    }
2832
2833    #[doc = "GTETRGD Pin Falling Input Source Counter Stop Enable"]
2834    #[inline(always)]
2835    pub fn psgtrgdf(
2836        self,
2837    ) -> crate::common::RegisterField<
2838        7,
2839        0x1,
2840        1,
2841        0,
2842        gtpsr::Psgtrgdf,
2843        gtpsr::Psgtrgdf,
2844        Gtpsr_SPEC,
2845        crate::common::RW,
2846    > {
2847        crate::common::RegisterField::<
2848            7,
2849            0x1,
2850            1,
2851            0,
2852            gtpsr::Psgtrgdf,
2853            gtpsr::Psgtrgdf,
2854            Gtpsr_SPEC,
2855            crate::common::RW,
2856        >::from_register(self, 0)
2857    }
2858
2859    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable"]
2860    #[inline(always)]
2861    pub fn pscarbl(
2862        self,
2863    ) -> crate::common::RegisterField<
2864        8,
2865        0x1,
2866        1,
2867        0,
2868        gtpsr::Pscarbl,
2869        gtpsr::Pscarbl,
2870        Gtpsr_SPEC,
2871        crate::common::RW,
2872    > {
2873        crate::common::RegisterField::<
2874            8,
2875            0x1,
2876            1,
2877            0,
2878            gtpsr::Pscarbl,
2879            gtpsr::Pscarbl,
2880            Gtpsr_SPEC,
2881            crate::common::RW,
2882        >::from_register(self, 0)
2883    }
2884
2885    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable"]
2886    #[inline(always)]
2887    pub fn pscarbh(
2888        self,
2889    ) -> crate::common::RegisterField<
2890        9,
2891        0x1,
2892        1,
2893        0,
2894        gtpsr::Pscarbh,
2895        gtpsr::Pscarbh,
2896        Gtpsr_SPEC,
2897        crate::common::RW,
2898    > {
2899        crate::common::RegisterField::<
2900            9,
2901            0x1,
2902            1,
2903            0,
2904            gtpsr::Pscarbh,
2905            gtpsr::Pscarbh,
2906            Gtpsr_SPEC,
2907            crate::common::RW,
2908        >::from_register(self, 0)
2909    }
2910
2911    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable"]
2912    #[inline(always)]
2913    pub fn pscafbl(
2914        self,
2915    ) -> crate::common::RegisterField<
2916        10,
2917        0x1,
2918        1,
2919        0,
2920        gtpsr::Pscafbl,
2921        gtpsr::Pscafbl,
2922        Gtpsr_SPEC,
2923        crate::common::RW,
2924    > {
2925        crate::common::RegisterField::<
2926            10,
2927            0x1,
2928            1,
2929            0,
2930            gtpsr::Pscafbl,
2931            gtpsr::Pscafbl,
2932            Gtpsr_SPEC,
2933            crate::common::RW,
2934        >::from_register(self, 0)
2935    }
2936
2937    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable"]
2938    #[inline(always)]
2939    pub fn pscafbh(
2940        self,
2941    ) -> crate::common::RegisterField<
2942        11,
2943        0x1,
2944        1,
2945        0,
2946        gtpsr::Pscafbh,
2947        gtpsr::Pscafbh,
2948        Gtpsr_SPEC,
2949        crate::common::RW,
2950    > {
2951        crate::common::RegisterField::<
2952            11,
2953            0x1,
2954            1,
2955            0,
2956            gtpsr::Pscafbh,
2957            gtpsr::Pscafbh,
2958            Gtpsr_SPEC,
2959            crate::common::RW,
2960        >::from_register(self, 0)
2961    }
2962
2963    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable"]
2964    #[inline(always)]
2965    pub fn pscbral(
2966        self,
2967    ) -> crate::common::RegisterField<
2968        12,
2969        0x1,
2970        1,
2971        0,
2972        gtpsr::Pscbral,
2973        gtpsr::Pscbral,
2974        Gtpsr_SPEC,
2975        crate::common::RW,
2976    > {
2977        crate::common::RegisterField::<
2978            12,
2979            0x1,
2980            1,
2981            0,
2982            gtpsr::Pscbral,
2983            gtpsr::Pscbral,
2984            Gtpsr_SPEC,
2985            crate::common::RW,
2986        >::from_register(self, 0)
2987    }
2988
2989    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable"]
2990    #[inline(always)]
2991    pub fn pscbrah(
2992        self,
2993    ) -> crate::common::RegisterField<
2994        13,
2995        0x1,
2996        1,
2997        0,
2998        gtpsr::Pscbrah,
2999        gtpsr::Pscbrah,
3000        Gtpsr_SPEC,
3001        crate::common::RW,
3002    > {
3003        crate::common::RegisterField::<
3004            13,
3005            0x1,
3006            1,
3007            0,
3008            gtpsr::Pscbrah,
3009            gtpsr::Pscbrah,
3010            Gtpsr_SPEC,
3011            crate::common::RW,
3012        >::from_register(self, 0)
3013    }
3014
3015    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable"]
3016    #[inline(always)]
3017    pub fn pscbfal(
3018        self,
3019    ) -> crate::common::RegisterField<
3020        14,
3021        0x1,
3022        1,
3023        0,
3024        gtpsr::Pscbfal,
3025        gtpsr::Pscbfal,
3026        Gtpsr_SPEC,
3027        crate::common::RW,
3028    > {
3029        crate::common::RegisterField::<
3030            14,
3031            0x1,
3032            1,
3033            0,
3034            gtpsr::Pscbfal,
3035            gtpsr::Pscbfal,
3036            Gtpsr_SPEC,
3037            crate::common::RW,
3038        >::from_register(self, 0)
3039    }
3040
3041    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable"]
3042    #[inline(always)]
3043    pub fn pscbfah(
3044        self,
3045    ) -> crate::common::RegisterField<
3046        15,
3047        0x1,
3048        1,
3049        0,
3050        gtpsr::Pscbfah,
3051        gtpsr::Pscbfah,
3052        Gtpsr_SPEC,
3053        crate::common::RW,
3054    > {
3055        crate::common::RegisterField::<
3056            15,
3057            0x1,
3058            1,
3059            0,
3060            gtpsr::Pscbfah,
3061            gtpsr::Pscbfah,
3062            Gtpsr_SPEC,
3063            crate::common::RW,
3064        >::from_register(self, 0)
3065    }
3066
3067    #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
3068    #[inline(always)]
3069    pub fn pselca(
3070        self,
3071    ) -> crate::common::RegisterField<
3072        16,
3073        0x1,
3074        1,
3075        0,
3076        gtpsr::Pselca,
3077        gtpsr::Pselca,
3078        Gtpsr_SPEC,
3079        crate::common::RW,
3080    > {
3081        crate::common::RegisterField::<
3082            16,
3083            0x1,
3084            1,
3085            0,
3086            gtpsr::Pselca,
3087            gtpsr::Pselca,
3088            Gtpsr_SPEC,
3089            crate::common::RW,
3090        >::from_register(self, 0)
3091    }
3092
3093    #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
3094    #[inline(always)]
3095    pub fn pselcb(
3096        self,
3097    ) -> crate::common::RegisterField<
3098        17,
3099        0x1,
3100        1,
3101        0,
3102        gtpsr::Pselcb,
3103        gtpsr::Pselcb,
3104        Gtpsr_SPEC,
3105        crate::common::RW,
3106    > {
3107        crate::common::RegisterField::<
3108            17,
3109            0x1,
3110            1,
3111            0,
3112            gtpsr::Pselcb,
3113            gtpsr::Pselcb,
3114            Gtpsr_SPEC,
3115            crate::common::RW,
3116        >::from_register(self, 0)
3117    }
3118
3119    #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
3120    #[inline(always)]
3121    pub fn pselcc(
3122        self,
3123    ) -> crate::common::RegisterField<
3124        18,
3125        0x1,
3126        1,
3127        0,
3128        gtpsr::Pselcc,
3129        gtpsr::Pselcc,
3130        Gtpsr_SPEC,
3131        crate::common::RW,
3132    > {
3133        crate::common::RegisterField::<
3134            18,
3135            0x1,
3136            1,
3137            0,
3138            gtpsr::Pselcc,
3139            gtpsr::Pselcc,
3140            Gtpsr_SPEC,
3141            crate::common::RW,
3142        >::from_register(self, 0)
3143    }
3144
3145    #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
3146    #[inline(always)]
3147    pub fn pselcd(
3148        self,
3149    ) -> crate::common::RegisterField<
3150        19,
3151        0x1,
3152        1,
3153        0,
3154        gtpsr::Pselcd,
3155        gtpsr::Pselcd,
3156        Gtpsr_SPEC,
3157        crate::common::RW,
3158    > {
3159        crate::common::RegisterField::<
3160            19,
3161            0x1,
3162            1,
3163            0,
3164            gtpsr::Pselcd,
3165            gtpsr::Pselcd,
3166            Gtpsr_SPEC,
3167            crate::common::RW,
3168        >::from_register(self, 0)
3169    }
3170
3171    #[doc = "ELC_GPTE Event Source Counter Stop Enable"]
3172    #[inline(always)]
3173    pub fn pselce(
3174        self,
3175    ) -> crate::common::RegisterField<
3176        20,
3177        0x1,
3178        1,
3179        0,
3180        gtpsr::Pselce,
3181        gtpsr::Pselce,
3182        Gtpsr_SPEC,
3183        crate::common::RW,
3184    > {
3185        crate::common::RegisterField::<
3186            20,
3187            0x1,
3188            1,
3189            0,
3190            gtpsr::Pselce,
3191            gtpsr::Pselce,
3192            Gtpsr_SPEC,
3193            crate::common::RW,
3194        >::from_register(self, 0)
3195    }
3196
3197    #[doc = "ELC_GPTF Event Source Counter Stop Enable"]
3198    #[inline(always)]
3199    pub fn pselcf(
3200        self,
3201    ) -> crate::common::RegisterField<
3202        21,
3203        0x1,
3204        1,
3205        0,
3206        gtpsr::Pselcf,
3207        gtpsr::Pselcf,
3208        Gtpsr_SPEC,
3209        crate::common::RW,
3210    > {
3211        crate::common::RegisterField::<
3212            21,
3213            0x1,
3214            1,
3215            0,
3216            gtpsr::Pselcf,
3217            gtpsr::Pselcf,
3218            Gtpsr_SPEC,
3219            crate::common::RW,
3220        >::from_register(self, 0)
3221    }
3222
3223    #[doc = "ELC_GPTG Event Source Counter Stop Enable"]
3224    #[inline(always)]
3225    pub fn pselcg(
3226        self,
3227    ) -> crate::common::RegisterField<
3228        22,
3229        0x1,
3230        1,
3231        0,
3232        gtpsr::Pselcg,
3233        gtpsr::Pselcg,
3234        Gtpsr_SPEC,
3235        crate::common::RW,
3236    > {
3237        crate::common::RegisterField::<
3238            22,
3239            0x1,
3240            1,
3241            0,
3242            gtpsr::Pselcg,
3243            gtpsr::Pselcg,
3244            Gtpsr_SPEC,
3245            crate::common::RW,
3246        >::from_register(self, 0)
3247    }
3248
3249    #[doc = "ELC_GPTH Event Source Counter Stop Enable"]
3250    #[inline(always)]
3251    pub fn pselch(
3252        self,
3253    ) -> crate::common::RegisterField<
3254        23,
3255        0x1,
3256        1,
3257        0,
3258        gtpsr::Pselch,
3259        gtpsr::Pselch,
3260        Gtpsr_SPEC,
3261        crate::common::RW,
3262    > {
3263        crate::common::RegisterField::<
3264            23,
3265            0x1,
3266            1,
3267            0,
3268            gtpsr::Pselch,
3269            gtpsr::Pselch,
3270            Gtpsr_SPEC,
3271            crate::common::RW,
3272        >::from_register(self, 0)
3273    }
3274
3275    #[doc = "Software Source Counter Stop Enable"]
3276    #[inline(always)]
3277    pub fn cstop(
3278        self,
3279    ) -> crate::common::RegisterField<
3280        31,
3281        0x1,
3282        1,
3283        0,
3284        gtpsr::Cstop,
3285        gtpsr::Cstop,
3286        Gtpsr_SPEC,
3287        crate::common::RW,
3288    > {
3289        crate::common::RegisterField::<
3290            31,
3291            0x1,
3292            1,
3293            0,
3294            gtpsr::Cstop,
3295            gtpsr::Cstop,
3296            Gtpsr_SPEC,
3297            crate::common::RW,
3298        >::from_register(self, 0)
3299    }
3300}
3301impl ::core::default::Default for Gtpsr {
3302    #[inline(always)]
3303    fn default() -> Gtpsr {
3304        <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
3305    }
3306}
3307pub mod gtpsr {
3308
3309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3310    pub struct Psgtrgar_SPEC;
3311    pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
3312    impl Psgtrgar {
3313        #[doc = "Counter stop disabled on the rising edge of GTETRGA input"]
3314        pub const _0: Self = Self::new(0);
3315
3316        #[doc = "Counter stop enabled on the rising edge of GTETRGA input"]
3317        pub const _1: Self = Self::new(1);
3318    }
3319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3320    pub struct Psgtrgaf_SPEC;
3321    pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
3322    impl Psgtrgaf {
3323        #[doc = "Counter stop disabled on the falling edge of GTETRGA input"]
3324        pub const _0: Self = Self::new(0);
3325
3326        #[doc = "Counter stop enabled on the falling edge of GTETRGA input"]
3327        pub const _1: Self = Self::new(1);
3328    }
3329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3330    pub struct Psgtrgbr_SPEC;
3331    pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
3332    impl Psgtrgbr {
3333        #[doc = "Counter stop disabled on the rising edge of GTETRGB input"]
3334        pub const _0: Self = Self::new(0);
3335
3336        #[doc = "Counter stop enabled on the rising edge of GTETRGB input"]
3337        pub const _1: Self = Self::new(1);
3338    }
3339    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3340    pub struct Psgtrgbf_SPEC;
3341    pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
3342    impl Psgtrgbf {
3343        #[doc = "Counter stop disabled on the falling edge of GTETRGB input"]
3344        pub const _0: Self = Self::new(0);
3345
3346        #[doc = "Counter stop enabled on the falling edge of GTETRGB input"]
3347        pub const _1: Self = Self::new(1);
3348    }
3349    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3350    pub struct Psgtrgcr_SPEC;
3351    pub type Psgtrgcr = crate::EnumBitfieldStruct<u8, Psgtrgcr_SPEC>;
3352    impl Psgtrgcr {
3353        #[doc = "Counter stop disabled on the rising edge of GTETRGC input"]
3354        pub const _0: Self = Self::new(0);
3355
3356        #[doc = "Counter stop enabled on the rising edge of GTETRGC input"]
3357        pub const _1: Self = Self::new(1);
3358    }
3359    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3360    pub struct Psgtrgcf_SPEC;
3361    pub type Psgtrgcf = crate::EnumBitfieldStruct<u8, Psgtrgcf_SPEC>;
3362    impl Psgtrgcf {
3363        #[doc = "Counter stop disabled on the falling edge of GTETRGC input"]
3364        pub const _0: Self = Self::new(0);
3365
3366        #[doc = "Counter stop enabled on the falling edge of GTETRGC input"]
3367        pub const _1: Self = Self::new(1);
3368    }
3369    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3370    pub struct Psgtrgdr_SPEC;
3371    pub type Psgtrgdr = crate::EnumBitfieldStruct<u8, Psgtrgdr_SPEC>;
3372    impl Psgtrgdr {
3373        #[doc = "Counter stop disabled on the rising edge of GTETRGD input"]
3374        pub const _0: Self = Self::new(0);
3375
3376        #[doc = "Counter stop enabled on the rising edge of GTETRGD input"]
3377        pub const _1: Self = Self::new(1);
3378    }
3379    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3380    pub struct Psgtrgdf_SPEC;
3381    pub type Psgtrgdf = crate::EnumBitfieldStruct<u8, Psgtrgdf_SPEC>;
3382    impl Psgtrgdf {
3383        #[doc = "Counter stop disabled on the falling edge of GTETRGD input"]
3384        pub const _0: Self = Self::new(0);
3385
3386        #[doc = "Counter stop enabled on the falling edge of GTETRGD input"]
3387        pub const _1: Self = Self::new(1);
3388    }
3389    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3390    pub struct Pscarbl_SPEC;
3391    pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
3392    impl Pscarbl {
3393        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3394        pub const _0: Self = Self::new(0);
3395
3396        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3397        pub const _1: Self = Self::new(1);
3398    }
3399    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3400    pub struct Pscarbh_SPEC;
3401    pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
3402    impl Pscarbh {
3403        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3404        pub const _0: Self = Self::new(0);
3405
3406        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3407        pub const _1: Self = Self::new(1);
3408    }
3409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3410    pub struct Pscafbl_SPEC;
3411    pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
3412    impl Pscafbl {
3413        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3414        pub const _0: Self = Self::new(0);
3415
3416        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3417        pub const _1: Self = Self::new(1);
3418    }
3419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3420    pub struct Pscafbh_SPEC;
3421    pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
3422    impl Pscafbh {
3423        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3424        pub const _0: Self = Self::new(0);
3425
3426        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3427        pub const _1: Self = Self::new(1);
3428    }
3429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3430    pub struct Pscbral_SPEC;
3431    pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
3432    impl Pscbral {
3433        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3434        pub const _0: Self = Self::new(0);
3435
3436        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3437        pub const _1: Self = Self::new(1);
3438    }
3439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3440    pub struct Pscbrah_SPEC;
3441    pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
3442    impl Pscbrah {
3443        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3444        pub const _0: Self = Self::new(0);
3445
3446        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3447        pub const _1: Self = Self::new(1);
3448    }
3449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3450    pub struct Pscbfal_SPEC;
3451    pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
3452    impl Pscbfal {
3453        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3454        pub const _0: Self = Self::new(0);
3455
3456        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3457        pub const _1: Self = Self::new(1);
3458    }
3459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3460    pub struct Pscbfah_SPEC;
3461    pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
3462    impl Pscbfah {
3463        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3464        pub const _0: Self = Self::new(0);
3465
3466        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3467        pub const _1: Self = Self::new(1);
3468    }
3469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3470    pub struct Pselca_SPEC;
3471    pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
3472    impl Pselca {
3473        #[doc = "Counter stop disabled at the ELC_GPTA input"]
3474        pub const _0: Self = Self::new(0);
3475
3476        #[doc = "Counter stop enabled at the ELC_GPTA input"]
3477        pub const _1: Self = Self::new(1);
3478    }
3479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3480    pub struct Pselcb_SPEC;
3481    pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
3482    impl Pselcb {
3483        #[doc = "Counter stop disabled at the ELC_GPTB input"]
3484        pub const _0: Self = Self::new(0);
3485
3486        #[doc = "Counter stop enabled at the ELC_GPTB input"]
3487        pub const _1: Self = Self::new(1);
3488    }
3489    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3490    pub struct Pselcc_SPEC;
3491    pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
3492    impl Pselcc {
3493        #[doc = "Counter stop disabled at the ELC_GPTC input"]
3494        pub const _0: Self = Self::new(0);
3495
3496        #[doc = "Counter stop enabled at the ELC_GPTC input"]
3497        pub const _1: Self = Self::new(1);
3498    }
3499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3500    pub struct Pselcd_SPEC;
3501    pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
3502    impl Pselcd {
3503        #[doc = "Counter stop disabled at the ELC_GPTD input"]
3504        pub const _0: Self = Self::new(0);
3505
3506        #[doc = "Counter stop enabled at the ELC_GPTD input"]
3507        pub const _1: Self = Self::new(1);
3508    }
3509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3510    pub struct Pselce_SPEC;
3511    pub type Pselce = crate::EnumBitfieldStruct<u8, Pselce_SPEC>;
3512    impl Pselce {
3513        #[doc = "Counter stop disabled at the ELC_GPTE input"]
3514        pub const _0: Self = Self::new(0);
3515
3516        #[doc = "Counter stop enabled at the ELC_GPTE input"]
3517        pub const _1: Self = Self::new(1);
3518    }
3519    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3520    pub struct Pselcf_SPEC;
3521    pub type Pselcf = crate::EnumBitfieldStruct<u8, Pselcf_SPEC>;
3522    impl Pselcf {
3523        #[doc = "Counter stop disabled at the ELC_GPTF input"]
3524        pub const _0: Self = Self::new(0);
3525
3526        #[doc = "Counter stop enabled at the ELC_GPTF input"]
3527        pub const _1: Self = Self::new(1);
3528    }
3529    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3530    pub struct Pselcg_SPEC;
3531    pub type Pselcg = crate::EnumBitfieldStruct<u8, Pselcg_SPEC>;
3532    impl Pselcg {
3533        #[doc = "Counter stop disabled at the ELC_GPTG input"]
3534        pub const _0: Self = Self::new(0);
3535
3536        #[doc = "Counter stop enabled at the ELC_GPTG input"]
3537        pub const _1: Self = Self::new(1);
3538    }
3539    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3540    pub struct Pselch_SPEC;
3541    pub type Pselch = crate::EnumBitfieldStruct<u8, Pselch_SPEC>;
3542    impl Pselch {
3543        #[doc = "Counter stop disabled at the ELC_GPTH input"]
3544        pub const _0: Self = Self::new(0);
3545
3546        #[doc = "Counter stop enabled at the ELC_GPTH input"]
3547        pub const _1: Self = Self::new(1);
3548    }
3549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3550    pub struct Cstop_SPEC;
3551    pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
3552    impl Cstop {
3553        #[doc = "Counter stop disabled by the GTSTP register"]
3554        pub const _0: Self = Self::new(0);
3555
3556        #[doc = "Counter stop enabled by the GTSTP register"]
3557        pub const _1: Self = Self::new(1);
3558    }
3559}
3560#[doc(hidden)]
3561#[derive(Copy, Clone, Eq, PartialEq)]
3562pub struct Gtcsr_SPEC;
3563impl crate::sealed::RegSpec for Gtcsr_SPEC {
3564    type DataType = u32;
3565}
3566
3567#[doc = "General PWM Timer Clear Source Select Register"]
3568pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
3569
3570impl Gtcsr {
3571    #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
3572    #[inline(always)]
3573    pub fn csgtrgar(
3574        self,
3575    ) -> crate::common::RegisterField<
3576        0,
3577        0x1,
3578        1,
3579        0,
3580        gtcsr::Csgtrgar,
3581        gtcsr::Csgtrgar,
3582        Gtcsr_SPEC,
3583        crate::common::RW,
3584    > {
3585        crate::common::RegisterField::<
3586            0,
3587            0x1,
3588            1,
3589            0,
3590            gtcsr::Csgtrgar,
3591            gtcsr::Csgtrgar,
3592            Gtcsr_SPEC,
3593            crate::common::RW,
3594        >::from_register(self, 0)
3595    }
3596
3597    #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
3598    #[inline(always)]
3599    pub fn csgtrgaf(
3600        self,
3601    ) -> crate::common::RegisterField<
3602        1,
3603        0x1,
3604        1,
3605        0,
3606        gtcsr::Csgtrgaf,
3607        gtcsr::Csgtrgaf,
3608        Gtcsr_SPEC,
3609        crate::common::RW,
3610    > {
3611        crate::common::RegisterField::<
3612            1,
3613            0x1,
3614            1,
3615            0,
3616            gtcsr::Csgtrgaf,
3617            gtcsr::Csgtrgaf,
3618            Gtcsr_SPEC,
3619            crate::common::RW,
3620        >::from_register(self, 0)
3621    }
3622
3623    #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
3624    #[inline(always)]
3625    pub fn csgtrgbr(
3626        self,
3627    ) -> crate::common::RegisterField<
3628        2,
3629        0x1,
3630        1,
3631        0,
3632        gtcsr::Csgtrgbr,
3633        gtcsr::Csgtrgbr,
3634        Gtcsr_SPEC,
3635        crate::common::RW,
3636    > {
3637        crate::common::RegisterField::<
3638            2,
3639            0x1,
3640            1,
3641            0,
3642            gtcsr::Csgtrgbr,
3643            gtcsr::Csgtrgbr,
3644            Gtcsr_SPEC,
3645            crate::common::RW,
3646        >::from_register(self, 0)
3647    }
3648
3649    #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
3650    #[inline(always)]
3651    pub fn csgtrgbf(
3652        self,
3653    ) -> crate::common::RegisterField<
3654        3,
3655        0x1,
3656        1,
3657        0,
3658        gtcsr::Csgtrgbf,
3659        gtcsr::Csgtrgbf,
3660        Gtcsr_SPEC,
3661        crate::common::RW,
3662    > {
3663        crate::common::RegisterField::<
3664            3,
3665            0x1,
3666            1,
3667            0,
3668            gtcsr::Csgtrgbf,
3669            gtcsr::Csgtrgbf,
3670            Gtcsr_SPEC,
3671            crate::common::RW,
3672        >::from_register(self, 0)
3673    }
3674
3675    #[doc = "GTETRGC Pin Rising Input Source Counter Clear Enable"]
3676    #[inline(always)]
3677    pub fn csgtrgcr(
3678        self,
3679    ) -> crate::common::RegisterField<
3680        4,
3681        0x1,
3682        1,
3683        0,
3684        gtcsr::Csgtrgcr,
3685        gtcsr::Csgtrgcr,
3686        Gtcsr_SPEC,
3687        crate::common::RW,
3688    > {
3689        crate::common::RegisterField::<
3690            4,
3691            0x1,
3692            1,
3693            0,
3694            gtcsr::Csgtrgcr,
3695            gtcsr::Csgtrgcr,
3696            Gtcsr_SPEC,
3697            crate::common::RW,
3698        >::from_register(self, 0)
3699    }
3700
3701    #[doc = "GTETRGC Pin Falling Input Source Counter Clear Enable"]
3702    #[inline(always)]
3703    pub fn csgtrgcf(
3704        self,
3705    ) -> crate::common::RegisterField<
3706        5,
3707        0x1,
3708        1,
3709        0,
3710        gtcsr::Csgtrgcf,
3711        gtcsr::Csgtrgcf,
3712        Gtcsr_SPEC,
3713        crate::common::RW,
3714    > {
3715        crate::common::RegisterField::<
3716            5,
3717            0x1,
3718            1,
3719            0,
3720            gtcsr::Csgtrgcf,
3721            gtcsr::Csgtrgcf,
3722            Gtcsr_SPEC,
3723            crate::common::RW,
3724        >::from_register(self, 0)
3725    }
3726
3727    #[doc = "GTETRGD Pin Rising Input Source Counter Clear Enable"]
3728    #[inline(always)]
3729    pub fn csgtrgdr(
3730        self,
3731    ) -> crate::common::RegisterField<
3732        6,
3733        0x1,
3734        1,
3735        0,
3736        gtcsr::Csgtrgdr,
3737        gtcsr::Csgtrgdr,
3738        Gtcsr_SPEC,
3739        crate::common::RW,
3740    > {
3741        crate::common::RegisterField::<
3742            6,
3743            0x1,
3744            1,
3745            0,
3746            gtcsr::Csgtrgdr,
3747            gtcsr::Csgtrgdr,
3748            Gtcsr_SPEC,
3749            crate::common::RW,
3750        >::from_register(self, 0)
3751    }
3752
3753    #[doc = "GTETRGD Pin Falling Input Source Counter Clear Enable"]
3754    #[inline(always)]
3755    pub fn csgtrgdf(
3756        self,
3757    ) -> crate::common::RegisterField<
3758        7,
3759        0x1,
3760        1,
3761        0,
3762        gtcsr::Csgtrgdf,
3763        gtcsr::Csgtrgdf,
3764        Gtcsr_SPEC,
3765        crate::common::RW,
3766    > {
3767        crate::common::RegisterField::<
3768            7,
3769            0x1,
3770            1,
3771            0,
3772            gtcsr::Csgtrgdf,
3773            gtcsr::Csgtrgdf,
3774            Gtcsr_SPEC,
3775            crate::common::RW,
3776        >::from_register(self, 0)
3777    }
3778
3779    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable"]
3780    #[inline(always)]
3781    pub fn cscarbl(
3782        self,
3783    ) -> crate::common::RegisterField<
3784        8,
3785        0x1,
3786        1,
3787        0,
3788        gtcsr::Cscarbl,
3789        gtcsr::Cscarbl,
3790        Gtcsr_SPEC,
3791        crate::common::RW,
3792    > {
3793        crate::common::RegisterField::<
3794            8,
3795            0x1,
3796            1,
3797            0,
3798            gtcsr::Cscarbl,
3799            gtcsr::Cscarbl,
3800            Gtcsr_SPEC,
3801            crate::common::RW,
3802        >::from_register(self, 0)
3803    }
3804
3805    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable"]
3806    #[inline(always)]
3807    pub fn cscarbh(
3808        self,
3809    ) -> crate::common::RegisterField<
3810        9,
3811        0x1,
3812        1,
3813        0,
3814        gtcsr::Cscarbh,
3815        gtcsr::Cscarbh,
3816        Gtcsr_SPEC,
3817        crate::common::RW,
3818    > {
3819        crate::common::RegisterField::<
3820            9,
3821            0x1,
3822            1,
3823            0,
3824            gtcsr::Cscarbh,
3825            gtcsr::Cscarbh,
3826            Gtcsr_SPEC,
3827            crate::common::RW,
3828        >::from_register(self, 0)
3829    }
3830
3831    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable"]
3832    #[inline(always)]
3833    pub fn cscafbl(
3834        self,
3835    ) -> crate::common::RegisterField<
3836        10,
3837        0x1,
3838        1,
3839        0,
3840        gtcsr::Cscafbl,
3841        gtcsr::Cscafbl,
3842        Gtcsr_SPEC,
3843        crate::common::RW,
3844    > {
3845        crate::common::RegisterField::<
3846            10,
3847            0x1,
3848            1,
3849            0,
3850            gtcsr::Cscafbl,
3851            gtcsr::Cscafbl,
3852            Gtcsr_SPEC,
3853            crate::common::RW,
3854        >::from_register(self, 0)
3855    }
3856
3857    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable"]
3858    #[inline(always)]
3859    pub fn cscafbh(
3860        self,
3861    ) -> crate::common::RegisterField<
3862        11,
3863        0x1,
3864        1,
3865        0,
3866        gtcsr::Cscafbh,
3867        gtcsr::Cscafbh,
3868        Gtcsr_SPEC,
3869        crate::common::RW,
3870    > {
3871        crate::common::RegisterField::<
3872            11,
3873            0x1,
3874            1,
3875            0,
3876            gtcsr::Cscafbh,
3877            gtcsr::Cscafbh,
3878            Gtcsr_SPEC,
3879            crate::common::RW,
3880        >::from_register(self, 0)
3881    }
3882
3883    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable"]
3884    #[inline(always)]
3885    pub fn cscbral(
3886        self,
3887    ) -> crate::common::RegisterField<
3888        12,
3889        0x1,
3890        1,
3891        0,
3892        gtcsr::Cscbral,
3893        gtcsr::Cscbral,
3894        Gtcsr_SPEC,
3895        crate::common::RW,
3896    > {
3897        crate::common::RegisterField::<
3898            12,
3899            0x1,
3900            1,
3901            0,
3902            gtcsr::Cscbral,
3903            gtcsr::Cscbral,
3904            Gtcsr_SPEC,
3905            crate::common::RW,
3906        >::from_register(self, 0)
3907    }
3908
3909    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable"]
3910    #[inline(always)]
3911    pub fn cscbrah(
3912        self,
3913    ) -> crate::common::RegisterField<
3914        13,
3915        0x1,
3916        1,
3917        0,
3918        gtcsr::Cscbrah,
3919        gtcsr::Cscbrah,
3920        Gtcsr_SPEC,
3921        crate::common::RW,
3922    > {
3923        crate::common::RegisterField::<
3924            13,
3925            0x1,
3926            1,
3927            0,
3928            gtcsr::Cscbrah,
3929            gtcsr::Cscbrah,
3930            Gtcsr_SPEC,
3931            crate::common::RW,
3932        >::from_register(self, 0)
3933    }
3934
3935    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable"]
3936    #[inline(always)]
3937    pub fn cscbfal(
3938        self,
3939    ) -> crate::common::RegisterField<
3940        14,
3941        0x1,
3942        1,
3943        0,
3944        gtcsr::Cscbfal,
3945        gtcsr::Cscbfal,
3946        Gtcsr_SPEC,
3947        crate::common::RW,
3948    > {
3949        crate::common::RegisterField::<
3950            14,
3951            0x1,
3952            1,
3953            0,
3954            gtcsr::Cscbfal,
3955            gtcsr::Cscbfal,
3956            Gtcsr_SPEC,
3957            crate::common::RW,
3958        >::from_register(self, 0)
3959    }
3960
3961    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable"]
3962    #[inline(always)]
3963    pub fn cscbfah(
3964        self,
3965    ) -> crate::common::RegisterField<
3966        15,
3967        0x1,
3968        1,
3969        0,
3970        gtcsr::Cscbfah,
3971        gtcsr::Cscbfah,
3972        Gtcsr_SPEC,
3973        crate::common::RW,
3974    > {
3975        crate::common::RegisterField::<
3976            15,
3977            0x1,
3978            1,
3979            0,
3980            gtcsr::Cscbfah,
3981            gtcsr::Cscbfah,
3982            Gtcsr_SPEC,
3983            crate::common::RW,
3984        >::from_register(self, 0)
3985    }
3986
3987    #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
3988    #[inline(always)]
3989    pub fn cselca(
3990        self,
3991    ) -> crate::common::RegisterField<
3992        16,
3993        0x1,
3994        1,
3995        0,
3996        gtcsr::Cselca,
3997        gtcsr::Cselca,
3998        Gtcsr_SPEC,
3999        crate::common::RW,
4000    > {
4001        crate::common::RegisterField::<
4002            16,
4003            0x1,
4004            1,
4005            0,
4006            gtcsr::Cselca,
4007            gtcsr::Cselca,
4008            Gtcsr_SPEC,
4009            crate::common::RW,
4010        >::from_register(self, 0)
4011    }
4012
4013    #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
4014    #[inline(always)]
4015    pub fn cselcb(
4016        self,
4017    ) -> crate::common::RegisterField<
4018        17,
4019        0x1,
4020        1,
4021        0,
4022        gtcsr::Cselcb,
4023        gtcsr::Cselcb,
4024        Gtcsr_SPEC,
4025        crate::common::RW,
4026    > {
4027        crate::common::RegisterField::<
4028            17,
4029            0x1,
4030            1,
4031            0,
4032            gtcsr::Cselcb,
4033            gtcsr::Cselcb,
4034            Gtcsr_SPEC,
4035            crate::common::RW,
4036        >::from_register(self, 0)
4037    }
4038
4039    #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
4040    #[inline(always)]
4041    pub fn cselcc(
4042        self,
4043    ) -> crate::common::RegisterField<
4044        18,
4045        0x1,
4046        1,
4047        0,
4048        gtcsr::Cselcc,
4049        gtcsr::Cselcc,
4050        Gtcsr_SPEC,
4051        crate::common::RW,
4052    > {
4053        crate::common::RegisterField::<
4054            18,
4055            0x1,
4056            1,
4057            0,
4058            gtcsr::Cselcc,
4059            gtcsr::Cselcc,
4060            Gtcsr_SPEC,
4061            crate::common::RW,
4062        >::from_register(self, 0)
4063    }
4064
4065    #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
4066    #[inline(always)]
4067    pub fn cselcd(
4068        self,
4069    ) -> crate::common::RegisterField<
4070        19,
4071        0x1,
4072        1,
4073        0,
4074        gtcsr::Cselcd,
4075        gtcsr::Cselcd,
4076        Gtcsr_SPEC,
4077        crate::common::RW,
4078    > {
4079        crate::common::RegisterField::<
4080            19,
4081            0x1,
4082            1,
4083            0,
4084            gtcsr::Cselcd,
4085            gtcsr::Cselcd,
4086            Gtcsr_SPEC,
4087            crate::common::RW,
4088        >::from_register(self, 0)
4089    }
4090
4091    #[doc = "ELC_GPTE Event Source Counter Clear Enable"]
4092    #[inline(always)]
4093    pub fn cselce(
4094        self,
4095    ) -> crate::common::RegisterField<
4096        20,
4097        0x1,
4098        1,
4099        0,
4100        gtcsr::Cselce,
4101        gtcsr::Cselce,
4102        Gtcsr_SPEC,
4103        crate::common::RW,
4104    > {
4105        crate::common::RegisterField::<
4106            20,
4107            0x1,
4108            1,
4109            0,
4110            gtcsr::Cselce,
4111            gtcsr::Cselce,
4112            Gtcsr_SPEC,
4113            crate::common::RW,
4114        >::from_register(self, 0)
4115    }
4116
4117    #[doc = "ELC_GPTF Event Source Counter Clear Enable"]
4118    #[inline(always)]
4119    pub fn cselcf(
4120        self,
4121    ) -> crate::common::RegisterField<
4122        21,
4123        0x1,
4124        1,
4125        0,
4126        gtcsr::Cselcf,
4127        gtcsr::Cselcf,
4128        Gtcsr_SPEC,
4129        crate::common::RW,
4130    > {
4131        crate::common::RegisterField::<
4132            21,
4133            0x1,
4134            1,
4135            0,
4136            gtcsr::Cselcf,
4137            gtcsr::Cselcf,
4138            Gtcsr_SPEC,
4139            crate::common::RW,
4140        >::from_register(self, 0)
4141    }
4142
4143    #[doc = "ELC_GPTG Event Source Counter Clear Enable"]
4144    #[inline(always)]
4145    pub fn cselcg(
4146        self,
4147    ) -> crate::common::RegisterField<
4148        22,
4149        0x1,
4150        1,
4151        0,
4152        gtcsr::Cselcg,
4153        gtcsr::Cselcg,
4154        Gtcsr_SPEC,
4155        crate::common::RW,
4156    > {
4157        crate::common::RegisterField::<
4158            22,
4159            0x1,
4160            1,
4161            0,
4162            gtcsr::Cselcg,
4163            gtcsr::Cselcg,
4164            Gtcsr_SPEC,
4165            crate::common::RW,
4166        >::from_register(self, 0)
4167    }
4168
4169    #[doc = "ELC_GPTH Event Source Counter Clear Enable"]
4170    #[inline(always)]
4171    pub fn cselch(
4172        self,
4173    ) -> crate::common::RegisterField<
4174        23,
4175        0x1,
4176        1,
4177        0,
4178        gtcsr::Cselch,
4179        gtcsr::Cselch,
4180        Gtcsr_SPEC,
4181        crate::common::RW,
4182    > {
4183        crate::common::RegisterField::<
4184            23,
4185            0x1,
4186            1,
4187            0,
4188            gtcsr::Cselch,
4189            gtcsr::Cselch,
4190            Gtcsr_SPEC,
4191            crate::common::RW,
4192        >::from_register(self, 0)
4193    }
4194
4195    #[doc = "Software Source Counter Clear Enable"]
4196    #[inline(always)]
4197    pub fn cclr(
4198        self,
4199    ) -> crate::common::RegisterField<
4200        31,
4201        0x1,
4202        1,
4203        0,
4204        gtcsr::Cclr,
4205        gtcsr::Cclr,
4206        Gtcsr_SPEC,
4207        crate::common::RW,
4208    > {
4209        crate::common::RegisterField::<
4210            31,
4211            0x1,
4212            1,
4213            0,
4214            gtcsr::Cclr,
4215            gtcsr::Cclr,
4216            Gtcsr_SPEC,
4217            crate::common::RW,
4218        >::from_register(self, 0)
4219    }
4220}
4221impl ::core::default::Default for Gtcsr {
4222    #[inline(always)]
4223    fn default() -> Gtcsr {
4224        <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
4225    }
4226}
4227pub mod gtcsr {
4228
4229    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4230    pub struct Csgtrgar_SPEC;
4231    pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
4232    impl Csgtrgar {
4233        #[doc = "Counter clear disabled on the rising edge of GTETRGA input"]
4234        pub const _0: Self = Self::new(0);
4235
4236        #[doc = "Counter clear enabled on the rising edge of GTETRGA input"]
4237        pub const _1: Self = Self::new(1);
4238    }
4239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4240    pub struct Csgtrgaf_SPEC;
4241    pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
4242    impl Csgtrgaf {
4243        #[doc = "Counter clear disabled on the falling edge of GTETRGA input"]
4244        pub const _0: Self = Self::new(0);
4245
4246        #[doc = "Counter clear enabled on the falling edge of GTETRGA input"]
4247        pub const _1: Self = Self::new(1);
4248    }
4249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4250    pub struct Csgtrgbr_SPEC;
4251    pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
4252    impl Csgtrgbr {
4253        #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
4254        pub const _0: Self = Self::new(0);
4255
4256        #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
4257        pub const _1: Self = Self::new(1);
4258    }
4259    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4260    pub struct Csgtrgbf_SPEC;
4261    pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
4262    impl Csgtrgbf {
4263        #[doc = "Counter clear disabled on the falling edge of GTETRGB input"]
4264        pub const _0: Self = Self::new(0);
4265
4266        #[doc = "Counter clear enabled on the falling edge of GTETRGB input"]
4267        pub const _1: Self = Self::new(1);
4268    }
4269    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4270    pub struct Csgtrgcr_SPEC;
4271    pub type Csgtrgcr = crate::EnumBitfieldStruct<u8, Csgtrgcr_SPEC>;
4272    impl Csgtrgcr {
4273        #[doc = "Disable counter clear on the rising edge of GTETRGC input"]
4274        pub const _0: Self = Self::new(0);
4275
4276        #[doc = "Enable counter clear on the rising edge of GTETRGC input"]
4277        pub const _1: Self = Self::new(1);
4278    }
4279    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4280    pub struct Csgtrgcf_SPEC;
4281    pub type Csgtrgcf = crate::EnumBitfieldStruct<u8, Csgtrgcf_SPEC>;
4282    impl Csgtrgcf {
4283        #[doc = "Counter clear disabled on the falling edge of GTETRGC input"]
4284        pub const _0: Self = Self::new(0);
4285
4286        #[doc = "Counter clear enabled on the falling edge of GTETRGC input"]
4287        pub const _1: Self = Self::new(1);
4288    }
4289    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4290    pub struct Csgtrgdr_SPEC;
4291    pub type Csgtrgdr = crate::EnumBitfieldStruct<u8, Csgtrgdr_SPEC>;
4292    impl Csgtrgdr {
4293        #[doc = "Disable counter clear on the rising edge of GTETRGD input"]
4294        pub const _0: Self = Self::new(0);
4295
4296        #[doc = "Enable counter clear on the rising edge of GTETRGD input"]
4297        pub const _1: Self = Self::new(1);
4298    }
4299    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4300    pub struct Csgtrgdf_SPEC;
4301    pub type Csgtrgdf = crate::EnumBitfieldStruct<u8, Csgtrgdf_SPEC>;
4302    impl Csgtrgdf {
4303        #[doc = "Counter clear disabled on the falling edge of GTETRGD input"]
4304        pub const _0: Self = Self::new(0);
4305
4306        #[doc = "Counter clear enabled on the falling edge of GTETRGD input"]
4307        pub const _1: Self = Self::new(1);
4308    }
4309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4310    pub struct Cscarbl_SPEC;
4311    pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
4312    impl Cscarbl {
4313        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4314        pub const _0: Self = Self::new(0);
4315
4316        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4317        pub const _1: Self = Self::new(1);
4318    }
4319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4320    pub struct Cscarbh_SPEC;
4321    pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
4322    impl Cscarbh {
4323        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4324        pub const _0: Self = Self::new(0);
4325
4326        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4327        pub const _1: Self = Self::new(1);
4328    }
4329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4330    pub struct Cscafbl_SPEC;
4331    pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
4332    impl Cscafbl {
4333        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4334        pub const _0: Self = Self::new(0);
4335
4336        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4337        pub const _1: Self = Self::new(1);
4338    }
4339    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4340    pub struct Cscafbh_SPEC;
4341    pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
4342    impl Cscafbh {
4343        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4344        pub const _0: Self = Self::new(0);
4345
4346        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4347        pub const _1: Self = Self::new(1);
4348    }
4349    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4350    pub struct Cscbral_SPEC;
4351    pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
4352    impl Cscbral {
4353        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4354        pub const _0: Self = Self::new(0);
4355
4356        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4357        pub const _1: Self = Self::new(1);
4358    }
4359    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4360    pub struct Cscbrah_SPEC;
4361    pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
4362    impl Cscbrah {
4363        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4364        pub const _0: Self = Self::new(0);
4365
4366        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4367        pub const _1: Self = Self::new(1);
4368    }
4369    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4370    pub struct Cscbfal_SPEC;
4371    pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
4372    impl Cscbfal {
4373        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4374        pub const _0: Self = Self::new(0);
4375
4376        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4377        pub const _1: Self = Self::new(1);
4378    }
4379    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4380    pub struct Cscbfah_SPEC;
4381    pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
4382    impl Cscbfah {
4383        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4384        pub const _0: Self = Self::new(0);
4385
4386        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4387        pub const _1: Self = Self::new(1);
4388    }
4389    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4390    pub struct Cselca_SPEC;
4391    pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
4392    impl Cselca {
4393        #[doc = "Counter clear disabled at the ELC_GPTA input"]
4394        pub const _0: Self = Self::new(0);
4395
4396        #[doc = "Counter clear enabled at the ELC_GPTA input"]
4397        pub const _1: Self = Self::new(1);
4398    }
4399    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4400    pub struct Cselcb_SPEC;
4401    pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
4402    impl Cselcb {
4403        #[doc = "Counter clear disabled at the ELC_GPTB input"]
4404        pub const _0: Self = Self::new(0);
4405
4406        #[doc = "Counter clear enabled at the ELC_GPTB input"]
4407        pub const _1: Self = Self::new(1);
4408    }
4409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4410    pub struct Cselcc_SPEC;
4411    pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
4412    impl Cselcc {
4413        #[doc = "Counter clear disabled at the ELC_GPTC input"]
4414        pub const _0: Self = Self::new(0);
4415
4416        #[doc = "Counter clear enabled at the ELC_GPTC input"]
4417        pub const _1: Self = Self::new(1);
4418    }
4419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4420    pub struct Cselcd_SPEC;
4421    pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
4422    impl Cselcd {
4423        #[doc = "Counter clear disabled at the ELC_GPTD input"]
4424        pub const _0: Self = Self::new(0);
4425
4426        #[doc = "Counter clear enabled at the ELC_GPTD input"]
4427        pub const _1: Self = Self::new(1);
4428    }
4429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4430    pub struct Cselce_SPEC;
4431    pub type Cselce = crate::EnumBitfieldStruct<u8, Cselce_SPEC>;
4432    impl Cselce {
4433        #[doc = "Counter clear disabled at the ELC_GPTE input"]
4434        pub const _0: Self = Self::new(0);
4435
4436        #[doc = "Counter clear enabled at the ELC_GPTE input"]
4437        pub const _1: Self = Self::new(1);
4438    }
4439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4440    pub struct Cselcf_SPEC;
4441    pub type Cselcf = crate::EnumBitfieldStruct<u8, Cselcf_SPEC>;
4442    impl Cselcf {
4443        #[doc = "Counter clear disabled at the ELC_GPTF input"]
4444        pub const _0: Self = Self::new(0);
4445
4446        #[doc = "Counter clear enabled at the ELC_GPTF input"]
4447        pub const _1: Self = Self::new(1);
4448    }
4449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4450    pub struct Cselcg_SPEC;
4451    pub type Cselcg = crate::EnumBitfieldStruct<u8, Cselcg_SPEC>;
4452    impl Cselcg {
4453        #[doc = "Counter clear disabled at the ELC_GPTG input"]
4454        pub const _0: Self = Self::new(0);
4455
4456        #[doc = "Counter clear enabled at the ELC_GPTG input"]
4457        pub const _1: Self = Self::new(1);
4458    }
4459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4460    pub struct Cselch_SPEC;
4461    pub type Cselch = crate::EnumBitfieldStruct<u8, Cselch_SPEC>;
4462    impl Cselch {
4463        #[doc = "Counter clear disabled at the ELC_GPTH input"]
4464        pub const _0: Self = Self::new(0);
4465
4466        #[doc = "Counter clear enabled at the ELC_GPTH input"]
4467        pub const _1: Self = Self::new(1);
4468    }
4469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4470    pub struct Cclr_SPEC;
4471    pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
4472    impl Cclr {
4473        #[doc = "Counter clear disabled by the GTCLR register"]
4474        pub const _0: Self = Self::new(0);
4475
4476        #[doc = "Counter clear enabled by the GTCLR register"]
4477        pub const _1: Self = Self::new(1);
4478    }
4479}
4480#[doc(hidden)]
4481#[derive(Copy, Clone, Eq, PartialEq)]
4482pub struct Gtupsr_SPEC;
4483impl crate::sealed::RegSpec for Gtupsr_SPEC {
4484    type DataType = u32;
4485}
4486
4487#[doc = "General PWM Timer Up Count Source Select Register"]
4488pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
4489
4490impl Gtupsr {
4491    #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
4492    #[inline(always)]
4493    pub fn usgtrgar(
4494        self,
4495    ) -> crate::common::RegisterField<
4496        0,
4497        0x1,
4498        1,
4499        0,
4500        gtupsr::Usgtrgar,
4501        gtupsr::Usgtrgar,
4502        Gtupsr_SPEC,
4503        crate::common::RW,
4504    > {
4505        crate::common::RegisterField::<
4506            0,
4507            0x1,
4508            1,
4509            0,
4510            gtupsr::Usgtrgar,
4511            gtupsr::Usgtrgar,
4512            Gtupsr_SPEC,
4513            crate::common::RW,
4514        >::from_register(self, 0)
4515    }
4516
4517    #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
4518    #[inline(always)]
4519    pub fn usgtrgaf(
4520        self,
4521    ) -> crate::common::RegisterField<
4522        1,
4523        0x1,
4524        1,
4525        0,
4526        gtupsr::Usgtrgaf,
4527        gtupsr::Usgtrgaf,
4528        Gtupsr_SPEC,
4529        crate::common::RW,
4530    > {
4531        crate::common::RegisterField::<
4532            1,
4533            0x1,
4534            1,
4535            0,
4536            gtupsr::Usgtrgaf,
4537            gtupsr::Usgtrgaf,
4538            Gtupsr_SPEC,
4539            crate::common::RW,
4540        >::from_register(self, 0)
4541    }
4542
4543    #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
4544    #[inline(always)]
4545    pub fn usgtrgbr(
4546        self,
4547    ) -> crate::common::RegisterField<
4548        2,
4549        0x1,
4550        1,
4551        0,
4552        gtupsr::Usgtrgbr,
4553        gtupsr::Usgtrgbr,
4554        Gtupsr_SPEC,
4555        crate::common::RW,
4556    > {
4557        crate::common::RegisterField::<
4558            2,
4559            0x1,
4560            1,
4561            0,
4562            gtupsr::Usgtrgbr,
4563            gtupsr::Usgtrgbr,
4564            Gtupsr_SPEC,
4565            crate::common::RW,
4566        >::from_register(self, 0)
4567    }
4568
4569    #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
4570    #[inline(always)]
4571    pub fn usgtrgbf(
4572        self,
4573    ) -> crate::common::RegisterField<
4574        3,
4575        0x1,
4576        1,
4577        0,
4578        gtupsr::Usgtrgbf,
4579        gtupsr::Usgtrgbf,
4580        Gtupsr_SPEC,
4581        crate::common::RW,
4582    > {
4583        crate::common::RegisterField::<
4584            3,
4585            0x1,
4586            1,
4587            0,
4588            gtupsr::Usgtrgbf,
4589            gtupsr::Usgtrgbf,
4590            Gtupsr_SPEC,
4591            crate::common::RW,
4592        >::from_register(self, 0)
4593    }
4594
4595    #[doc = "GTETRGC Pin Rising Input Source Counter Count Up Enable"]
4596    #[inline(always)]
4597    pub fn usgtrgcr(
4598        self,
4599    ) -> crate::common::RegisterField<
4600        4,
4601        0x1,
4602        1,
4603        0,
4604        gtupsr::Usgtrgcr,
4605        gtupsr::Usgtrgcr,
4606        Gtupsr_SPEC,
4607        crate::common::RW,
4608    > {
4609        crate::common::RegisterField::<
4610            4,
4611            0x1,
4612            1,
4613            0,
4614            gtupsr::Usgtrgcr,
4615            gtupsr::Usgtrgcr,
4616            Gtupsr_SPEC,
4617            crate::common::RW,
4618        >::from_register(self, 0)
4619    }
4620
4621    #[doc = "GTETRGC Pin Falling Input Source Counter Count Up Enable"]
4622    #[inline(always)]
4623    pub fn usgtrgcf(
4624        self,
4625    ) -> crate::common::RegisterField<
4626        5,
4627        0x1,
4628        1,
4629        0,
4630        gtupsr::Usgtrgcf,
4631        gtupsr::Usgtrgcf,
4632        Gtupsr_SPEC,
4633        crate::common::RW,
4634    > {
4635        crate::common::RegisterField::<
4636            5,
4637            0x1,
4638            1,
4639            0,
4640            gtupsr::Usgtrgcf,
4641            gtupsr::Usgtrgcf,
4642            Gtupsr_SPEC,
4643            crate::common::RW,
4644        >::from_register(self, 0)
4645    }
4646
4647    #[doc = "GTETRGD Pin Rising Input Source Counter Count Up Enable"]
4648    #[inline(always)]
4649    pub fn usgtrgdr(
4650        self,
4651    ) -> crate::common::RegisterField<
4652        6,
4653        0x1,
4654        1,
4655        0,
4656        gtupsr::Usgtrgdr,
4657        gtupsr::Usgtrgdr,
4658        Gtupsr_SPEC,
4659        crate::common::RW,
4660    > {
4661        crate::common::RegisterField::<
4662            6,
4663            0x1,
4664            1,
4665            0,
4666            gtupsr::Usgtrgdr,
4667            gtupsr::Usgtrgdr,
4668            Gtupsr_SPEC,
4669            crate::common::RW,
4670        >::from_register(self, 0)
4671    }
4672
4673    #[doc = "GTETRGD Pin Falling Input Source Counter Count Up Enable"]
4674    #[inline(always)]
4675    pub fn usgtrgdf(
4676        self,
4677    ) -> crate::common::RegisterField<
4678        7,
4679        0x1,
4680        1,
4681        0,
4682        gtupsr::Usgtrgdf,
4683        gtupsr::Usgtrgdf,
4684        Gtupsr_SPEC,
4685        crate::common::RW,
4686    > {
4687        crate::common::RegisterField::<
4688            7,
4689            0x1,
4690            1,
4691            0,
4692            gtupsr::Usgtrgdf,
4693            gtupsr::Usgtrgdf,
4694            Gtupsr_SPEC,
4695            crate::common::RW,
4696        >::from_register(self, 0)
4697    }
4698
4699    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4700    #[inline(always)]
4701    pub fn uscarbl(
4702        self,
4703    ) -> crate::common::RegisterField<
4704        8,
4705        0x1,
4706        1,
4707        0,
4708        gtupsr::Uscarbl,
4709        gtupsr::Uscarbl,
4710        Gtupsr_SPEC,
4711        crate::common::RW,
4712    > {
4713        crate::common::RegisterField::<
4714            8,
4715            0x1,
4716            1,
4717            0,
4718            gtupsr::Uscarbl,
4719            gtupsr::Uscarbl,
4720            Gtupsr_SPEC,
4721            crate::common::RW,
4722        >::from_register(self, 0)
4723    }
4724
4725    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable"]
4726    #[inline(always)]
4727    pub fn uscarbh(
4728        self,
4729    ) -> crate::common::RegisterField<
4730        9,
4731        0x1,
4732        1,
4733        0,
4734        gtupsr::Uscarbh,
4735        gtupsr::Uscarbh,
4736        Gtupsr_SPEC,
4737        crate::common::RW,
4738    > {
4739        crate::common::RegisterField::<
4740            9,
4741            0x1,
4742            1,
4743            0,
4744            gtupsr::Uscarbh,
4745            gtupsr::Uscarbh,
4746            Gtupsr_SPEC,
4747            crate::common::RW,
4748        >::from_register(self, 0)
4749    }
4750
4751    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4752    #[inline(always)]
4753    pub fn uscafbl(
4754        self,
4755    ) -> crate::common::RegisterField<
4756        10,
4757        0x1,
4758        1,
4759        0,
4760        gtupsr::Uscafbl,
4761        gtupsr::Uscafbl,
4762        Gtupsr_SPEC,
4763        crate::common::RW,
4764    > {
4765        crate::common::RegisterField::<
4766            10,
4767            0x1,
4768            1,
4769            0,
4770            gtupsr::Uscafbl,
4771            gtupsr::Uscafbl,
4772            Gtupsr_SPEC,
4773            crate::common::RW,
4774        >::from_register(self, 0)
4775    }
4776
4777    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable"]
4778    #[inline(always)]
4779    pub fn uscafbh(
4780        self,
4781    ) -> crate::common::RegisterField<
4782        11,
4783        0x1,
4784        1,
4785        0,
4786        gtupsr::Uscafbh,
4787        gtupsr::Uscafbh,
4788        Gtupsr_SPEC,
4789        crate::common::RW,
4790    > {
4791        crate::common::RegisterField::<
4792            11,
4793            0x1,
4794            1,
4795            0,
4796            gtupsr::Uscafbh,
4797            gtupsr::Uscafbh,
4798            Gtupsr_SPEC,
4799            crate::common::RW,
4800        >::from_register(self, 0)
4801    }
4802
4803    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4804    #[inline(always)]
4805    pub fn uscbral(
4806        self,
4807    ) -> crate::common::RegisterField<
4808        12,
4809        0x1,
4810        1,
4811        0,
4812        gtupsr::Uscbral,
4813        gtupsr::Uscbral,
4814        Gtupsr_SPEC,
4815        crate::common::RW,
4816    > {
4817        crate::common::RegisterField::<
4818            12,
4819            0x1,
4820            1,
4821            0,
4822            gtupsr::Uscbral,
4823            gtupsr::Uscbral,
4824            Gtupsr_SPEC,
4825            crate::common::RW,
4826        >::from_register(self, 0)
4827    }
4828
4829    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable"]
4830    #[inline(always)]
4831    pub fn uscbrah(
4832        self,
4833    ) -> crate::common::RegisterField<
4834        13,
4835        0x1,
4836        1,
4837        0,
4838        gtupsr::Uscbrah,
4839        gtupsr::Uscbrah,
4840        Gtupsr_SPEC,
4841        crate::common::RW,
4842    > {
4843        crate::common::RegisterField::<
4844            13,
4845            0x1,
4846            1,
4847            0,
4848            gtupsr::Uscbrah,
4849            gtupsr::Uscbrah,
4850            Gtupsr_SPEC,
4851            crate::common::RW,
4852        >::from_register(self, 0)
4853    }
4854
4855    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4856    #[inline(always)]
4857    pub fn uscbfal(
4858        self,
4859    ) -> crate::common::RegisterField<
4860        14,
4861        0x1,
4862        1,
4863        0,
4864        gtupsr::Uscbfal,
4865        gtupsr::Uscbfal,
4866        Gtupsr_SPEC,
4867        crate::common::RW,
4868    > {
4869        crate::common::RegisterField::<
4870            14,
4871            0x1,
4872            1,
4873            0,
4874            gtupsr::Uscbfal,
4875            gtupsr::Uscbfal,
4876            Gtupsr_SPEC,
4877            crate::common::RW,
4878        >::from_register(self, 0)
4879    }
4880
4881    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable"]
4882    #[inline(always)]
4883    pub fn uscbfah(
4884        self,
4885    ) -> crate::common::RegisterField<
4886        15,
4887        0x1,
4888        1,
4889        0,
4890        gtupsr::Uscbfah,
4891        gtupsr::Uscbfah,
4892        Gtupsr_SPEC,
4893        crate::common::RW,
4894    > {
4895        crate::common::RegisterField::<
4896            15,
4897            0x1,
4898            1,
4899            0,
4900            gtupsr::Uscbfah,
4901            gtupsr::Uscbfah,
4902            Gtupsr_SPEC,
4903            crate::common::RW,
4904        >::from_register(self, 0)
4905    }
4906
4907    #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
4908    #[inline(always)]
4909    pub fn uselca(
4910        self,
4911    ) -> crate::common::RegisterField<
4912        16,
4913        0x1,
4914        1,
4915        0,
4916        gtupsr::Uselca,
4917        gtupsr::Uselca,
4918        Gtupsr_SPEC,
4919        crate::common::RW,
4920    > {
4921        crate::common::RegisterField::<
4922            16,
4923            0x1,
4924            1,
4925            0,
4926            gtupsr::Uselca,
4927            gtupsr::Uselca,
4928            Gtupsr_SPEC,
4929            crate::common::RW,
4930        >::from_register(self, 0)
4931    }
4932
4933    #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
4934    #[inline(always)]
4935    pub fn uselcb(
4936        self,
4937    ) -> crate::common::RegisterField<
4938        17,
4939        0x1,
4940        1,
4941        0,
4942        gtupsr::Uselcb,
4943        gtupsr::Uselcb,
4944        Gtupsr_SPEC,
4945        crate::common::RW,
4946    > {
4947        crate::common::RegisterField::<
4948            17,
4949            0x1,
4950            1,
4951            0,
4952            gtupsr::Uselcb,
4953            gtupsr::Uselcb,
4954            Gtupsr_SPEC,
4955            crate::common::RW,
4956        >::from_register(self, 0)
4957    }
4958
4959    #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
4960    #[inline(always)]
4961    pub fn uselcc(
4962        self,
4963    ) -> crate::common::RegisterField<
4964        18,
4965        0x1,
4966        1,
4967        0,
4968        gtupsr::Uselcc,
4969        gtupsr::Uselcc,
4970        Gtupsr_SPEC,
4971        crate::common::RW,
4972    > {
4973        crate::common::RegisterField::<
4974            18,
4975            0x1,
4976            1,
4977            0,
4978            gtupsr::Uselcc,
4979            gtupsr::Uselcc,
4980            Gtupsr_SPEC,
4981            crate::common::RW,
4982        >::from_register(self, 0)
4983    }
4984
4985    #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
4986    #[inline(always)]
4987    pub fn uselcd(
4988        self,
4989    ) -> crate::common::RegisterField<
4990        19,
4991        0x1,
4992        1,
4993        0,
4994        gtupsr::Uselcd,
4995        gtupsr::Uselcd,
4996        Gtupsr_SPEC,
4997        crate::common::RW,
4998    > {
4999        crate::common::RegisterField::<
5000            19,
5001            0x1,
5002            1,
5003            0,
5004            gtupsr::Uselcd,
5005            gtupsr::Uselcd,
5006            Gtupsr_SPEC,
5007            crate::common::RW,
5008        >::from_register(self, 0)
5009    }
5010
5011    #[doc = "ELC_GPTE Event Source Counter Count Up Enable"]
5012    #[inline(always)]
5013    pub fn uselce(
5014        self,
5015    ) -> crate::common::RegisterField<
5016        20,
5017        0x1,
5018        1,
5019        0,
5020        gtupsr::Uselce,
5021        gtupsr::Uselce,
5022        Gtupsr_SPEC,
5023        crate::common::RW,
5024    > {
5025        crate::common::RegisterField::<
5026            20,
5027            0x1,
5028            1,
5029            0,
5030            gtupsr::Uselce,
5031            gtupsr::Uselce,
5032            Gtupsr_SPEC,
5033            crate::common::RW,
5034        >::from_register(self, 0)
5035    }
5036
5037    #[doc = "ELC_GPTF Event Source Counter Count Up Enable"]
5038    #[inline(always)]
5039    pub fn uselcf(
5040        self,
5041    ) -> crate::common::RegisterField<
5042        21,
5043        0x1,
5044        1,
5045        0,
5046        gtupsr::Uselcf,
5047        gtupsr::Uselcf,
5048        Gtupsr_SPEC,
5049        crate::common::RW,
5050    > {
5051        crate::common::RegisterField::<
5052            21,
5053            0x1,
5054            1,
5055            0,
5056            gtupsr::Uselcf,
5057            gtupsr::Uselcf,
5058            Gtupsr_SPEC,
5059            crate::common::RW,
5060        >::from_register(self, 0)
5061    }
5062
5063    #[doc = "ELC_GPTG Event Source Counter Count Up Enable"]
5064    #[inline(always)]
5065    pub fn uselcg(
5066        self,
5067    ) -> crate::common::RegisterField<
5068        22,
5069        0x1,
5070        1,
5071        0,
5072        gtupsr::Uselcg,
5073        gtupsr::Uselcg,
5074        Gtupsr_SPEC,
5075        crate::common::RW,
5076    > {
5077        crate::common::RegisterField::<
5078            22,
5079            0x1,
5080            1,
5081            0,
5082            gtupsr::Uselcg,
5083            gtupsr::Uselcg,
5084            Gtupsr_SPEC,
5085            crate::common::RW,
5086        >::from_register(self, 0)
5087    }
5088
5089    #[doc = "ELC_GPTH Event Source Counter Count Up Enable"]
5090    #[inline(always)]
5091    pub fn uselch(
5092        self,
5093    ) -> crate::common::RegisterField<
5094        23,
5095        0x1,
5096        1,
5097        0,
5098        gtupsr::Uselch,
5099        gtupsr::Uselch,
5100        Gtupsr_SPEC,
5101        crate::common::RW,
5102    > {
5103        crate::common::RegisterField::<
5104            23,
5105            0x1,
5106            1,
5107            0,
5108            gtupsr::Uselch,
5109            gtupsr::Uselch,
5110            Gtupsr_SPEC,
5111            crate::common::RW,
5112        >::from_register(self, 0)
5113    }
5114}
5115impl ::core::default::Default for Gtupsr {
5116    #[inline(always)]
5117    fn default() -> Gtupsr {
5118        <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
5119    }
5120}
5121pub mod gtupsr {
5122
5123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5124    pub struct Usgtrgar_SPEC;
5125    pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
5126    impl Usgtrgar {
5127        #[doc = "Counter count up disabled on the rising edge of GTETRGA input"]
5128        pub const _0: Self = Self::new(0);
5129
5130        #[doc = "Counter count up enabled on the rising edge of GTETRGA input"]
5131        pub const _1: Self = Self::new(1);
5132    }
5133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5134    pub struct Usgtrgaf_SPEC;
5135    pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
5136    impl Usgtrgaf {
5137        #[doc = "Counter count up disabled on the falling edge of GTETRGA input"]
5138        pub const _0: Self = Self::new(0);
5139
5140        #[doc = "Counter count up enabled on the falling edge of GTETRGA input"]
5141        pub const _1: Self = Self::new(1);
5142    }
5143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5144    pub struct Usgtrgbr_SPEC;
5145    pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
5146    impl Usgtrgbr {
5147        #[doc = "Counter count up disabled on the rising edge of GTETRGB input"]
5148        pub const _0: Self = Self::new(0);
5149
5150        #[doc = "Counter count up enabled on the rising edge of GTETRGB input"]
5151        pub const _1: Self = Self::new(1);
5152    }
5153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5154    pub struct Usgtrgbf_SPEC;
5155    pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
5156    impl Usgtrgbf {
5157        #[doc = "Counter count up disabled on the falling edge of GTETRGB input"]
5158        pub const _0: Self = Self::new(0);
5159
5160        #[doc = "Counter count up enabled on the falling edge of GTETRGB input"]
5161        pub const _1: Self = Self::new(1);
5162    }
5163    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5164    pub struct Usgtrgcr_SPEC;
5165    pub type Usgtrgcr = crate::EnumBitfieldStruct<u8, Usgtrgcr_SPEC>;
5166    impl Usgtrgcr {
5167        #[doc = "Counter count up disabled on the rising edge of GTETRGC input"]
5168        pub const _0: Self = Self::new(0);
5169
5170        #[doc = "Counter count up enabled on the rising edge of GTETRGC input"]
5171        pub const _1: Self = Self::new(1);
5172    }
5173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5174    pub struct Usgtrgcf_SPEC;
5175    pub type Usgtrgcf = crate::EnumBitfieldStruct<u8, Usgtrgcf_SPEC>;
5176    impl Usgtrgcf {
5177        #[doc = "Counter count up disabled on the falling edge of GTETRGC input"]
5178        pub const _0: Self = Self::new(0);
5179
5180        #[doc = "Counter count up enabled on the falling edge of GTETRGC input"]
5181        pub const _1: Self = Self::new(1);
5182    }
5183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5184    pub struct Usgtrgdr_SPEC;
5185    pub type Usgtrgdr = crate::EnumBitfieldStruct<u8, Usgtrgdr_SPEC>;
5186    impl Usgtrgdr {
5187        #[doc = "Counter count up disabled on the rising edge of GTETRGD input"]
5188        pub const _0: Self = Self::new(0);
5189
5190        #[doc = "Counter count up enabled on the rising edge of GTETRGD input"]
5191        pub const _1: Self = Self::new(1);
5192    }
5193    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5194    pub struct Usgtrgdf_SPEC;
5195    pub type Usgtrgdf = crate::EnumBitfieldStruct<u8, Usgtrgdf_SPEC>;
5196    impl Usgtrgdf {
5197        #[doc = "Counter count up disabled on the falling edge of GTETRGD input"]
5198        pub const _0: Self = Self::new(0);
5199
5200        #[doc = "Counter count up enabled on the falling edge of GTETRGD input"]
5201        pub const _1: Self = Self::new(1);
5202    }
5203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5204    pub struct Uscarbl_SPEC;
5205    pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
5206    impl Uscarbl {
5207        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5208        pub const _0: Self = Self::new(0);
5209
5210        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5211        pub const _1: Self = Self::new(1);
5212    }
5213    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5214    pub struct Uscarbh_SPEC;
5215    pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
5216    impl Uscarbh {
5217        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5218        pub const _0: Self = Self::new(0);
5219
5220        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5221        pub const _1: Self = Self::new(1);
5222    }
5223    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5224    pub struct Uscafbl_SPEC;
5225    pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
5226    impl Uscafbl {
5227        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5228        pub const _0: Self = Self::new(0);
5229
5230        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5231        pub const _1: Self = Self::new(1);
5232    }
5233    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5234    pub struct Uscafbh_SPEC;
5235    pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
5236    impl Uscafbh {
5237        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5238        pub const _0: Self = Self::new(0);
5239
5240        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5241        pub const _1: Self = Self::new(1);
5242    }
5243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5244    pub struct Uscbral_SPEC;
5245    pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
5246    impl Uscbral {
5247        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5248        pub const _0: Self = Self::new(0);
5249
5250        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5251        pub const _1: Self = Self::new(1);
5252    }
5253    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5254    pub struct Uscbrah_SPEC;
5255    pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
5256    impl Uscbrah {
5257        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5258        pub const _0: Self = Self::new(0);
5259
5260        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5261        pub const _1: Self = Self::new(1);
5262    }
5263    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5264    pub struct Uscbfal_SPEC;
5265    pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
5266    impl Uscbfal {
5267        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5268        pub const _0: Self = Self::new(0);
5269
5270        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5271        pub const _1: Self = Self::new(1);
5272    }
5273    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5274    pub struct Uscbfah_SPEC;
5275    pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
5276    impl Uscbfah {
5277        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5278        pub const _0: Self = Self::new(0);
5279
5280        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5281        pub const _1: Self = Self::new(1);
5282    }
5283    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5284    pub struct Uselca_SPEC;
5285    pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
5286    impl Uselca {
5287        #[doc = "Counter count up disabled at the ELC_GPTA input"]
5288        pub const _0: Self = Self::new(0);
5289
5290        #[doc = "Counter count up enabled at the ELC_GPTA input"]
5291        pub const _1: Self = Self::new(1);
5292    }
5293    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5294    pub struct Uselcb_SPEC;
5295    pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
5296    impl Uselcb {
5297        #[doc = "Counter count up disabled at the ELC_GPTB input"]
5298        pub const _0: Self = Self::new(0);
5299
5300        #[doc = "Counter count up enabled at the ELC_GPTB input"]
5301        pub const _1: Self = Self::new(1);
5302    }
5303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5304    pub struct Uselcc_SPEC;
5305    pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
5306    impl Uselcc {
5307        #[doc = "Counter count up disabled at the ELC_GPTC input"]
5308        pub const _0: Self = Self::new(0);
5309
5310        #[doc = "Counter count up enabled at the ELC_GPTC input"]
5311        pub const _1: Self = Self::new(1);
5312    }
5313    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5314    pub struct Uselcd_SPEC;
5315    pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
5316    impl Uselcd {
5317        #[doc = "Counter count up disabled at the ELC_GPTD input"]
5318        pub const _0: Self = Self::new(0);
5319
5320        #[doc = "Counter count up enabled at the ELC_GPTD input"]
5321        pub const _1: Self = Self::new(1);
5322    }
5323    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5324    pub struct Uselce_SPEC;
5325    pub type Uselce = crate::EnumBitfieldStruct<u8, Uselce_SPEC>;
5326    impl Uselce {
5327        #[doc = "Counter count up disabled at the ELC_GPTE input"]
5328        pub const _0: Self = Self::new(0);
5329
5330        #[doc = "Counter count up enabled at the ELC_GPTE input"]
5331        pub const _1: Self = Self::new(1);
5332    }
5333    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5334    pub struct Uselcf_SPEC;
5335    pub type Uselcf = crate::EnumBitfieldStruct<u8, Uselcf_SPEC>;
5336    impl Uselcf {
5337        #[doc = "Counter count up disabled at the ELC_GPTF input"]
5338        pub const _0: Self = Self::new(0);
5339
5340        #[doc = "Counter count up enabled at the ELC_GPTF input"]
5341        pub const _1: Self = Self::new(1);
5342    }
5343    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5344    pub struct Uselcg_SPEC;
5345    pub type Uselcg = crate::EnumBitfieldStruct<u8, Uselcg_SPEC>;
5346    impl Uselcg {
5347        #[doc = "Counter count up disabled at the ELC_GPTG input"]
5348        pub const _0: Self = Self::new(0);
5349
5350        #[doc = "Counter count up enabled at the ELC_GPTG input"]
5351        pub const _1: Self = Self::new(1);
5352    }
5353    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5354    pub struct Uselch_SPEC;
5355    pub type Uselch = crate::EnumBitfieldStruct<u8, Uselch_SPEC>;
5356    impl Uselch {
5357        #[doc = "Counter count up disabled at the ELC_GPTH input"]
5358        pub const _0: Self = Self::new(0);
5359
5360        #[doc = "Counter count up enabled at the ELC_GPTH input"]
5361        pub const _1: Self = Self::new(1);
5362    }
5363}
5364#[doc(hidden)]
5365#[derive(Copy, Clone, Eq, PartialEq)]
5366pub struct Gtdnsr_SPEC;
5367impl crate::sealed::RegSpec for Gtdnsr_SPEC {
5368    type DataType = u32;
5369}
5370
5371#[doc = "General PWM Timer Down Count Source Select Register"]
5372pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
5373
5374impl Gtdnsr {
5375    #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
5376    #[inline(always)]
5377    pub fn dsgtrgar(
5378        self,
5379    ) -> crate::common::RegisterField<
5380        0,
5381        0x1,
5382        1,
5383        0,
5384        gtdnsr::Dsgtrgar,
5385        gtdnsr::Dsgtrgar,
5386        Gtdnsr_SPEC,
5387        crate::common::RW,
5388    > {
5389        crate::common::RegisterField::<
5390            0,
5391            0x1,
5392            1,
5393            0,
5394            gtdnsr::Dsgtrgar,
5395            gtdnsr::Dsgtrgar,
5396            Gtdnsr_SPEC,
5397            crate::common::RW,
5398        >::from_register(self, 0)
5399    }
5400
5401    #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
5402    #[inline(always)]
5403    pub fn dsgtrgaf(
5404        self,
5405    ) -> crate::common::RegisterField<
5406        1,
5407        0x1,
5408        1,
5409        0,
5410        gtdnsr::Dsgtrgaf,
5411        gtdnsr::Dsgtrgaf,
5412        Gtdnsr_SPEC,
5413        crate::common::RW,
5414    > {
5415        crate::common::RegisterField::<
5416            1,
5417            0x1,
5418            1,
5419            0,
5420            gtdnsr::Dsgtrgaf,
5421            gtdnsr::Dsgtrgaf,
5422            Gtdnsr_SPEC,
5423            crate::common::RW,
5424        >::from_register(self, 0)
5425    }
5426
5427    #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
5428    #[inline(always)]
5429    pub fn dsgtrgbr(
5430        self,
5431    ) -> crate::common::RegisterField<
5432        2,
5433        0x1,
5434        1,
5435        0,
5436        gtdnsr::Dsgtrgbr,
5437        gtdnsr::Dsgtrgbr,
5438        Gtdnsr_SPEC,
5439        crate::common::RW,
5440    > {
5441        crate::common::RegisterField::<
5442            2,
5443            0x1,
5444            1,
5445            0,
5446            gtdnsr::Dsgtrgbr,
5447            gtdnsr::Dsgtrgbr,
5448            Gtdnsr_SPEC,
5449            crate::common::RW,
5450        >::from_register(self, 0)
5451    }
5452
5453    #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
5454    #[inline(always)]
5455    pub fn dsgtrgbf(
5456        self,
5457    ) -> crate::common::RegisterField<
5458        3,
5459        0x1,
5460        1,
5461        0,
5462        gtdnsr::Dsgtrgbf,
5463        gtdnsr::Dsgtrgbf,
5464        Gtdnsr_SPEC,
5465        crate::common::RW,
5466    > {
5467        crate::common::RegisterField::<
5468            3,
5469            0x1,
5470            1,
5471            0,
5472            gtdnsr::Dsgtrgbf,
5473            gtdnsr::Dsgtrgbf,
5474            Gtdnsr_SPEC,
5475            crate::common::RW,
5476        >::from_register(self, 0)
5477    }
5478
5479    #[doc = "GTETRGC Pin Rising Input Source Counter Count Down Enable"]
5480    #[inline(always)]
5481    pub fn dsgtrgcr(
5482        self,
5483    ) -> crate::common::RegisterField<
5484        4,
5485        0x1,
5486        1,
5487        0,
5488        gtdnsr::Dsgtrgcr,
5489        gtdnsr::Dsgtrgcr,
5490        Gtdnsr_SPEC,
5491        crate::common::RW,
5492    > {
5493        crate::common::RegisterField::<
5494            4,
5495            0x1,
5496            1,
5497            0,
5498            gtdnsr::Dsgtrgcr,
5499            gtdnsr::Dsgtrgcr,
5500            Gtdnsr_SPEC,
5501            crate::common::RW,
5502        >::from_register(self, 0)
5503    }
5504
5505    #[doc = "GTETRGC Pin Falling Input Source Counter Count Down Enable"]
5506    #[inline(always)]
5507    pub fn dsgtrgcf(
5508        self,
5509    ) -> crate::common::RegisterField<
5510        5,
5511        0x1,
5512        1,
5513        0,
5514        gtdnsr::Dsgtrgcf,
5515        gtdnsr::Dsgtrgcf,
5516        Gtdnsr_SPEC,
5517        crate::common::RW,
5518    > {
5519        crate::common::RegisterField::<
5520            5,
5521            0x1,
5522            1,
5523            0,
5524            gtdnsr::Dsgtrgcf,
5525            gtdnsr::Dsgtrgcf,
5526            Gtdnsr_SPEC,
5527            crate::common::RW,
5528        >::from_register(self, 0)
5529    }
5530
5531    #[doc = "GTETRGD Pin Rising Input Source Counter Count Down Enable"]
5532    #[inline(always)]
5533    pub fn dsgtrgdr(
5534        self,
5535    ) -> crate::common::RegisterField<
5536        6,
5537        0x1,
5538        1,
5539        0,
5540        gtdnsr::Dsgtrgdr,
5541        gtdnsr::Dsgtrgdr,
5542        Gtdnsr_SPEC,
5543        crate::common::RW,
5544    > {
5545        crate::common::RegisterField::<
5546            6,
5547            0x1,
5548            1,
5549            0,
5550            gtdnsr::Dsgtrgdr,
5551            gtdnsr::Dsgtrgdr,
5552            Gtdnsr_SPEC,
5553            crate::common::RW,
5554        >::from_register(self, 0)
5555    }
5556
5557    #[doc = "GTETRGD Pin Falling Input Source Counter Count Down Enable"]
5558    #[inline(always)]
5559    pub fn dsgtrgdf(
5560        self,
5561    ) -> crate::common::RegisterField<
5562        7,
5563        0x1,
5564        1,
5565        0,
5566        gtdnsr::Dsgtrgdf,
5567        gtdnsr::Dsgtrgdf,
5568        Gtdnsr_SPEC,
5569        crate::common::RW,
5570    > {
5571        crate::common::RegisterField::<
5572            7,
5573            0x1,
5574            1,
5575            0,
5576            gtdnsr::Dsgtrgdf,
5577            gtdnsr::Dsgtrgdf,
5578            Gtdnsr_SPEC,
5579            crate::common::RW,
5580        >::from_register(self, 0)
5581    }
5582
5583    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5584    #[inline(always)]
5585    pub fn dscarbl(
5586        self,
5587    ) -> crate::common::RegisterField<
5588        8,
5589        0x1,
5590        1,
5591        0,
5592        gtdnsr::Dscarbl,
5593        gtdnsr::Dscarbl,
5594        Gtdnsr_SPEC,
5595        crate::common::RW,
5596    > {
5597        crate::common::RegisterField::<
5598            8,
5599            0x1,
5600            1,
5601            0,
5602            gtdnsr::Dscarbl,
5603            gtdnsr::Dscarbl,
5604            Gtdnsr_SPEC,
5605            crate::common::RW,
5606        >::from_register(self, 0)
5607    }
5608
5609    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable"]
5610    #[inline(always)]
5611    pub fn dscarbh(
5612        self,
5613    ) -> crate::common::RegisterField<
5614        9,
5615        0x1,
5616        1,
5617        0,
5618        gtdnsr::Dscarbh,
5619        gtdnsr::Dscarbh,
5620        Gtdnsr_SPEC,
5621        crate::common::RW,
5622    > {
5623        crate::common::RegisterField::<
5624            9,
5625            0x1,
5626            1,
5627            0,
5628            gtdnsr::Dscarbh,
5629            gtdnsr::Dscarbh,
5630            Gtdnsr_SPEC,
5631            crate::common::RW,
5632        >::from_register(self, 0)
5633    }
5634
5635    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5636    #[inline(always)]
5637    pub fn dscafbl(
5638        self,
5639    ) -> crate::common::RegisterField<
5640        10,
5641        0x1,
5642        1,
5643        0,
5644        gtdnsr::Dscafbl,
5645        gtdnsr::Dscafbl,
5646        Gtdnsr_SPEC,
5647        crate::common::RW,
5648    > {
5649        crate::common::RegisterField::<
5650            10,
5651            0x1,
5652            1,
5653            0,
5654            gtdnsr::Dscafbl,
5655            gtdnsr::Dscafbl,
5656            Gtdnsr_SPEC,
5657            crate::common::RW,
5658        >::from_register(self, 0)
5659    }
5660
5661    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable"]
5662    #[inline(always)]
5663    pub fn dscafbh(
5664        self,
5665    ) -> crate::common::RegisterField<
5666        11,
5667        0x1,
5668        1,
5669        0,
5670        gtdnsr::Dscafbh,
5671        gtdnsr::Dscafbh,
5672        Gtdnsr_SPEC,
5673        crate::common::RW,
5674    > {
5675        crate::common::RegisterField::<
5676            11,
5677            0x1,
5678            1,
5679            0,
5680            gtdnsr::Dscafbh,
5681            gtdnsr::Dscafbh,
5682            Gtdnsr_SPEC,
5683            crate::common::RW,
5684        >::from_register(self, 0)
5685    }
5686
5687    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5688    #[inline(always)]
5689    pub fn dscbral(
5690        self,
5691    ) -> crate::common::RegisterField<
5692        12,
5693        0x1,
5694        1,
5695        0,
5696        gtdnsr::Dscbral,
5697        gtdnsr::Dscbral,
5698        Gtdnsr_SPEC,
5699        crate::common::RW,
5700    > {
5701        crate::common::RegisterField::<
5702            12,
5703            0x1,
5704            1,
5705            0,
5706            gtdnsr::Dscbral,
5707            gtdnsr::Dscbral,
5708            Gtdnsr_SPEC,
5709            crate::common::RW,
5710        >::from_register(self, 0)
5711    }
5712
5713    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable"]
5714    #[inline(always)]
5715    pub fn dscbrah(
5716        self,
5717    ) -> crate::common::RegisterField<
5718        13,
5719        0x1,
5720        1,
5721        0,
5722        gtdnsr::Dscbrah,
5723        gtdnsr::Dscbrah,
5724        Gtdnsr_SPEC,
5725        crate::common::RW,
5726    > {
5727        crate::common::RegisterField::<
5728            13,
5729            0x1,
5730            1,
5731            0,
5732            gtdnsr::Dscbrah,
5733            gtdnsr::Dscbrah,
5734            Gtdnsr_SPEC,
5735            crate::common::RW,
5736        >::from_register(self, 0)
5737    }
5738
5739    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5740    #[inline(always)]
5741    pub fn dscbfal(
5742        self,
5743    ) -> crate::common::RegisterField<
5744        14,
5745        0x1,
5746        1,
5747        0,
5748        gtdnsr::Dscbfal,
5749        gtdnsr::Dscbfal,
5750        Gtdnsr_SPEC,
5751        crate::common::RW,
5752    > {
5753        crate::common::RegisterField::<
5754            14,
5755            0x1,
5756            1,
5757            0,
5758            gtdnsr::Dscbfal,
5759            gtdnsr::Dscbfal,
5760            Gtdnsr_SPEC,
5761            crate::common::RW,
5762        >::from_register(self, 0)
5763    }
5764
5765    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable"]
5766    #[inline(always)]
5767    pub fn dscbfah(
5768        self,
5769    ) -> crate::common::RegisterField<
5770        15,
5771        0x1,
5772        1,
5773        0,
5774        gtdnsr::Dscbfah,
5775        gtdnsr::Dscbfah,
5776        Gtdnsr_SPEC,
5777        crate::common::RW,
5778    > {
5779        crate::common::RegisterField::<
5780            15,
5781            0x1,
5782            1,
5783            0,
5784            gtdnsr::Dscbfah,
5785            gtdnsr::Dscbfah,
5786            Gtdnsr_SPEC,
5787            crate::common::RW,
5788        >::from_register(self, 0)
5789    }
5790
5791    #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
5792    #[inline(always)]
5793    pub fn dselca(
5794        self,
5795    ) -> crate::common::RegisterField<
5796        16,
5797        0x1,
5798        1,
5799        0,
5800        gtdnsr::Dselca,
5801        gtdnsr::Dselca,
5802        Gtdnsr_SPEC,
5803        crate::common::RW,
5804    > {
5805        crate::common::RegisterField::<
5806            16,
5807            0x1,
5808            1,
5809            0,
5810            gtdnsr::Dselca,
5811            gtdnsr::Dselca,
5812            Gtdnsr_SPEC,
5813            crate::common::RW,
5814        >::from_register(self, 0)
5815    }
5816
5817    #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
5818    #[inline(always)]
5819    pub fn dselcb(
5820        self,
5821    ) -> crate::common::RegisterField<
5822        17,
5823        0x1,
5824        1,
5825        0,
5826        gtdnsr::Dselcb,
5827        gtdnsr::Dselcb,
5828        Gtdnsr_SPEC,
5829        crate::common::RW,
5830    > {
5831        crate::common::RegisterField::<
5832            17,
5833            0x1,
5834            1,
5835            0,
5836            gtdnsr::Dselcb,
5837            gtdnsr::Dselcb,
5838            Gtdnsr_SPEC,
5839            crate::common::RW,
5840        >::from_register(self, 0)
5841    }
5842
5843    #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
5844    #[inline(always)]
5845    pub fn dselcc(
5846        self,
5847    ) -> crate::common::RegisterField<
5848        18,
5849        0x1,
5850        1,
5851        0,
5852        gtdnsr::Dselcc,
5853        gtdnsr::Dselcc,
5854        Gtdnsr_SPEC,
5855        crate::common::RW,
5856    > {
5857        crate::common::RegisterField::<
5858            18,
5859            0x1,
5860            1,
5861            0,
5862            gtdnsr::Dselcc,
5863            gtdnsr::Dselcc,
5864            Gtdnsr_SPEC,
5865            crate::common::RW,
5866        >::from_register(self, 0)
5867    }
5868
5869    #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
5870    #[inline(always)]
5871    pub fn dselcd(
5872        self,
5873    ) -> crate::common::RegisterField<
5874        19,
5875        0x1,
5876        1,
5877        0,
5878        gtdnsr::Dselcd,
5879        gtdnsr::Dselcd,
5880        Gtdnsr_SPEC,
5881        crate::common::RW,
5882    > {
5883        crate::common::RegisterField::<
5884            19,
5885            0x1,
5886            1,
5887            0,
5888            gtdnsr::Dselcd,
5889            gtdnsr::Dselcd,
5890            Gtdnsr_SPEC,
5891            crate::common::RW,
5892        >::from_register(self, 0)
5893    }
5894
5895    #[doc = "ELC_GPTE Event Source Counter Count Down Enable"]
5896    #[inline(always)]
5897    pub fn dselce(
5898        self,
5899    ) -> crate::common::RegisterField<
5900        20,
5901        0x1,
5902        1,
5903        0,
5904        gtdnsr::Dselce,
5905        gtdnsr::Dselce,
5906        Gtdnsr_SPEC,
5907        crate::common::RW,
5908    > {
5909        crate::common::RegisterField::<
5910            20,
5911            0x1,
5912            1,
5913            0,
5914            gtdnsr::Dselce,
5915            gtdnsr::Dselce,
5916            Gtdnsr_SPEC,
5917            crate::common::RW,
5918        >::from_register(self, 0)
5919    }
5920
5921    #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5922    #[inline(always)]
5923    pub fn dselcf(
5924        self,
5925    ) -> crate::common::RegisterField<
5926        21,
5927        0x1,
5928        1,
5929        0,
5930        gtdnsr::Dselcf,
5931        gtdnsr::Dselcf,
5932        Gtdnsr_SPEC,
5933        crate::common::RW,
5934    > {
5935        crate::common::RegisterField::<
5936            21,
5937            0x1,
5938            1,
5939            0,
5940            gtdnsr::Dselcf,
5941            gtdnsr::Dselcf,
5942            Gtdnsr_SPEC,
5943            crate::common::RW,
5944        >::from_register(self, 0)
5945    }
5946
5947    #[doc = "ELC_GPTG Event Source Counter Count Down Enable"]
5948    #[inline(always)]
5949    pub fn dselcg(
5950        self,
5951    ) -> crate::common::RegisterField<
5952        22,
5953        0x1,
5954        1,
5955        0,
5956        gtdnsr::Dselcg,
5957        gtdnsr::Dselcg,
5958        Gtdnsr_SPEC,
5959        crate::common::RW,
5960    > {
5961        crate::common::RegisterField::<
5962            22,
5963            0x1,
5964            1,
5965            0,
5966            gtdnsr::Dselcg,
5967            gtdnsr::Dselcg,
5968            Gtdnsr_SPEC,
5969            crate::common::RW,
5970        >::from_register(self, 0)
5971    }
5972
5973    #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5974    #[inline(always)]
5975    pub fn dselch(
5976        self,
5977    ) -> crate::common::RegisterField<
5978        23,
5979        0x1,
5980        1,
5981        0,
5982        gtdnsr::Dselch,
5983        gtdnsr::Dselch,
5984        Gtdnsr_SPEC,
5985        crate::common::RW,
5986    > {
5987        crate::common::RegisterField::<
5988            23,
5989            0x1,
5990            1,
5991            0,
5992            gtdnsr::Dselch,
5993            gtdnsr::Dselch,
5994            Gtdnsr_SPEC,
5995            crate::common::RW,
5996        >::from_register(self, 0)
5997    }
5998}
5999impl ::core::default::Default for Gtdnsr {
6000    #[inline(always)]
6001    fn default() -> Gtdnsr {
6002        <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
6003    }
6004}
6005pub mod gtdnsr {
6006
6007    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6008    pub struct Dsgtrgar_SPEC;
6009    pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
6010    impl Dsgtrgar {
6011        #[doc = "Counter count down disabled on the rising edge of GTETRGA input"]
6012        pub const _0: Self = Self::new(0);
6013
6014        #[doc = "Counter count down enabled on the rising edge of GTETRGA input"]
6015        pub const _1: Self = Self::new(1);
6016    }
6017    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6018    pub struct Dsgtrgaf_SPEC;
6019    pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
6020    impl Dsgtrgaf {
6021        #[doc = "Counter count down disabled on the falling edge of GTETRGA input"]
6022        pub const _0: Self = Self::new(0);
6023
6024        #[doc = "Counter count down enabled on the falling edge of GTETRGA input"]
6025        pub const _1: Self = Self::new(1);
6026    }
6027    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6028    pub struct Dsgtrgbr_SPEC;
6029    pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
6030    impl Dsgtrgbr {
6031        #[doc = "Counter count down disabled on the rising edge of GTETRGB input"]
6032        pub const _0: Self = Self::new(0);
6033
6034        #[doc = "Counter count down enabled on the rising edge of GTETRGB input"]
6035        pub const _1: Self = Self::new(1);
6036    }
6037    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6038    pub struct Dsgtrgbf_SPEC;
6039    pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
6040    impl Dsgtrgbf {
6041        #[doc = "Counter count down disabled on the falling edge of GTETRGB input"]
6042        pub const _0: Self = Self::new(0);
6043
6044        #[doc = "Counter count down enabled on the falling edge of GTETRGB input"]
6045        pub const _1: Self = Self::new(1);
6046    }
6047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6048    pub struct Dsgtrgcr_SPEC;
6049    pub type Dsgtrgcr = crate::EnumBitfieldStruct<u8, Dsgtrgcr_SPEC>;
6050    impl Dsgtrgcr {
6051        #[doc = "Counter count down disabled on the rising edge of GTETRGC input"]
6052        pub const _0: Self = Self::new(0);
6053
6054        #[doc = "Counter count down enabled on the rising edge of GTETRGC input"]
6055        pub const _1: Self = Self::new(1);
6056    }
6057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6058    pub struct Dsgtrgcf_SPEC;
6059    pub type Dsgtrgcf = crate::EnumBitfieldStruct<u8, Dsgtrgcf_SPEC>;
6060    impl Dsgtrgcf {
6061        #[doc = "Counter count down disabled on the falling edge of GTETRGC input"]
6062        pub const _0: Self = Self::new(0);
6063
6064        #[doc = "Counter count down enabled on the falling edge of GTETRGC input"]
6065        pub const _1: Self = Self::new(1);
6066    }
6067    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6068    pub struct Dsgtrgdr_SPEC;
6069    pub type Dsgtrgdr = crate::EnumBitfieldStruct<u8, Dsgtrgdr_SPEC>;
6070    impl Dsgtrgdr {
6071        #[doc = "Counter count down disabled on the rising edge of GTETRGD input"]
6072        pub const _0: Self = Self::new(0);
6073
6074        #[doc = "Counter count down enabled on the rising edge of GTETRGD input"]
6075        pub const _1: Self = Self::new(1);
6076    }
6077    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6078    pub struct Dsgtrgdf_SPEC;
6079    pub type Dsgtrgdf = crate::EnumBitfieldStruct<u8, Dsgtrgdf_SPEC>;
6080    impl Dsgtrgdf {
6081        #[doc = "Counter count down disabled on the falling edge of GTETRGD input"]
6082        pub const _0: Self = Self::new(0);
6083
6084        #[doc = "Counter count down enabled on the falling edge of GTETRGD input"]
6085        pub const _1: Self = Self::new(1);
6086    }
6087    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6088    pub struct Dscarbl_SPEC;
6089    pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
6090    impl Dscarbl {
6091        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6092        pub const _0: Self = Self::new(0);
6093
6094        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6095        pub const _1: Self = Self::new(1);
6096    }
6097    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6098    pub struct Dscarbh_SPEC;
6099    pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
6100    impl Dscarbh {
6101        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6102        pub const _0: Self = Self::new(0);
6103
6104        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6105        pub const _1: Self = Self::new(1);
6106    }
6107    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6108    pub struct Dscafbl_SPEC;
6109    pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
6110    impl Dscafbl {
6111        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6112        pub const _0: Self = Self::new(0);
6113
6114        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6115        pub const _1: Self = Self::new(1);
6116    }
6117    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6118    pub struct Dscafbh_SPEC;
6119    pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
6120    impl Dscafbh {
6121        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6122        pub const _0: Self = Self::new(0);
6123
6124        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6125        pub const _1: Self = Self::new(1);
6126    }
6127    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6128    pub struct Dscbral_SPEC;
6129    pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
6130    impl Dscbral {
6131        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6132        pub const _0: Self = Self::new(0);
6133
6134        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6135        pub const _1: Self = Self::new(1);
6136    }
6137    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6138    pub struct Dscbrah_SPEC;
6139    pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
6140    impl Dscbrah {
6141        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6142        pub const _0: Self = Self::new(0);
6143
6144        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6145        pub const _1: Self = Self::new(1);
6146    }
6147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6148    pub struct Dscbfal_SPEC;
6149    pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
6150    impl Dscbfal {
6151        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6152        pub const _0: Self = Self::new(0);
6153
6154        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6155        pub const _1: Self = Self::new(1);
6156    }
6157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6158    pub struct Dscbfah_SPEC;
6159    pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
6160    impl Dscbfah {
6161        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6162        pub const _0: Self = Self::new(0);
6163
6164        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6165        pub const _1: Self = Self::new(1);
6166    }
6167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6168    pub struct Dselca_SPEC;
6169    pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
6170    impl Dselca {
6171        #[doc = "Counter count down disabled at the ELC_GPTA input"]
6172        pub const _0: Self = Self::new(0);
6173
6174        #[doc = "Counter count down enabled at the ELC_GPTA input"]
6175        pub const _1: Self = Self::new(1);
6176    }
6177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6178    pub struct Dselcb_SPEC;
6179    pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
6180    impl Dselcb {
6181        #[doc = "Counter count down disabled at the ELC_GPTB input"]
6182        pub const _0: Self = Self::new(0);
6183
6184        #[doc = "Counter count down enabled at the ELC_GPTB input"]
6185        pub const _1: Self = Self::new(1);
6186    }
6187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6188    pub struct Dselcc_SPEC;
6189    pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
6190    impl Dselcc {
6191        #[doc = "Counter count down disabled at the ELC_GPTC input"]
6192        pub const _0: Self = Self::new(0);
6193
6194        #[doc = "Counter count down enabled at the ELC_GPTC input"]
6195        pub const _1: Self = Self::new(1);
6196    }
6197    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6198    pub struct Dselcd_SPEC;
6199    pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
6200    impl Dselcd {
6201        #[doc = "Counter count down disabled at the ELC_GPTD input"]
6202        pub const _0: Self = Self::new(0);
6203
6204        #[doc = "Counter count down enabled at the ELC_GPTD input"]
6205        pub const _1: Self = Self::new(1);
6206    }
6207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6208    pub struct Dselce_SPEC;
6209    pub type Dselce = crate::EnumBitfieldStruct<u8, Dselce_SPEC>;
6210    impl Dselce {
6211        #[doc = "Counter count down disabled at the ELC_GPTE input"]
6212        pub const _0: Self = Self::new(0);
6213
6214        #[doc = "Counter count down enabled at the ELC_GPTE input"]
6215        pub const _1: Self = Self::new(1);
6216    }
6217    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6218    pub struct Dselcf_SPEC;
6219    pub type Dselcf = crate::EnumBitfieldStruct<u8, Dselcf_SPEC>;
6220    impl Dselcf {
6221        #[doc = "Counter count down disabled at the ELC_GPTF input"]
6222        pub const _0: Self = Self::new(0);
6223
6224        #[doc = "Counter count down enabled at the ELC_GPTF input"]
6225        pub const _1: Self = Self::new(1);
6226    }
6227    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6228    pub struct Dselcg_SPEC;
6229    pub type Dselcg = crate::EnumBitfieldStruct<u8, Dselcg_SPEC>;
6230    impl Dselcg {
6231        #[doc = "Counter count down disabled at the ELC_GPTG input"]
6232        pub const _0: Self = Self::new(0);
6233
6234        #[doc = "Counter count down enabled at the ELC_GPTG input"]
6235        pub const _1: Self = Self::new(1);
6236    }
6237    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6238    pub struct Dselch_SPEC;
6239    pub type Dselch = crate::EnumBitfieldStruct<u8, Dselch_SPEC>;
6240    impl Dselch {
6241        #[doc = "Counter count down disabled at the ELC_GPTF input"]
6242        pub const _0: Self = Self::new(0);
6243
6244        #[doc = "Counter count down enabled at the ELC_GPTF input"]
6245        pub const _1: Self = Self::new(1);
6246    }
6247}
6248#[doc(hidden)]
6249#[derive(Copy, Clone, Eq, PartialEq)]
6250pub struct Gticasr_SPEC;
6251impl crate::sealed::RegSpec for Gticasr_SPEC {
6252    type DataType = u32;
6253}
6254
6255#[doc = "General PWM Timer Input Capture Source Select Register A"]
6256pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
6257
6258impl Gticasr {
6259    #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
6260    #[inline(always)]
6261    pub fn asgtrgar(
6262        self,
6263    ) -> crate::common::RegisterField<
6264        0,
6265        0x1,
6266        1,
6267        0,
6268        gticasr::Asgtrgar,
6269        gticasr::Asgtrgar,
6270        Gticasr_SPEC,
6271        crate::common::RW,
6272    > {
6273        crate::common::RegisterField::<
6274            0,
6275            0x1,
6276            1,
6277            0,
6278            gticasr::Asgtrgar,
6279            gticasr::Asgtrgar,
6280            Gticasr_SPEC,
6281            crate::common::RW,
6282        >::from_register(self, 0)
6283    }
6284
6285    #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
6286    #[inline(always)]
6287    pub fn asgtrgaf(
6288        self,
6289    ) -> crate::common::RegisterField<
6290        1,
6291        0x1,
6292        1,
6293        0,
6294        gticasr::Asgtrgaf,
6295        gticasr::Asgtrgaf,
6296        Gticasr_SPEC,
6297        crate::common::RW,
6298    > {
6299        crate::common::RegisterField::<
6300            1,
6301            0x1,
6302            1,
6303            0,
6304            gticasr::Asgtrgaf,
6305            gticasr::Asgtrgaf,
6306            Gticasr_SPEC,
6307            crate::common::RW,
6308        >::from_register(self, 0)
6309    }
6310
6311    #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
6312    #[inline(always)]
6313    pub fn asgtrgbr(
6314        self,
6315    ) -> crate::common::RegisterField<
6316        2,
6317        0x1,
6318        1,
6319        0,
6320        gticasr::Asgtrgbr,
6321        gticasr::Asgtrgbr,
6322        Gticasr_SPEC,
6323        crate::common::RW,
6324    > {
6325        crate::common::RegisterField::<
6326            2,
6327            0x1,
6328            1,
6329            0,
6330            gticasr::Asgtrgbr,
6331            gticasr::Asgtrgbr,
6332            Gticasr_SPEC,
6333            crate::common::RW,
6334        >::from_register(self, 0)
6335    }
6336
6337    #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
6338    #[inline(always)]
6339    pub fn asgtrgbf(
6340        self,
6341    ) -> crate::common::RegisterField<
6342        3,
6343        0x1,
6344        1,
6345        0,
6346        gticasr::Asgtrgbf,
6347        gticasr::Asgtrgbf,
6348        Gticasr_SPEC,
6349        crate::common::RW,
6350    > {
6351        crate::common::RegisterField::<
6352            3,
6353            0x1,
6354            1,
6355            0,
6356            gticasr::Asgtrgbf,
6357            gticasr::Asgtrgbf,
6358            Gticasr_SPEC,
6359            crate::common::RW,
6360        >::from_register(self, 0)
6361    }
6362
6363    #[doc = "GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable"]
6364    #[inline(always)]
6365    pub fn asgtrgcr(
6366        self,
6367    ) -> crate::common::RegisterField<
6368        4,
6369        0x1,
6370        1,
6371        0,
6372        gticasr::Asgtrgcr,
6373        gticasr::Asgtrgcr,
6374        Gticasr_SPEC,
6375        crate::common::RW,
6376    > {
6377        crate::common::RegisterField::<
6378            4,
6379            0x1,
6380            1,
6381            0,
6382            gticasr::Asgtrgcr,
6383            gticasr::Asgtrgcr,
6384            Gticasr_SPEC,
6385            crate::common::RW,
6386        >::from_register(self, 0)
6387    }
6388
6389    #[doc = "GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable"]
6390    #[inline(always)]
6391    pub fn asgtrgcf(
6392        self,
6393    ) -> crate::common::RegisterField<
6394        5,
6395        0x1,
6396        1,
6397        0,
6398        gticasr::Asgtrgcf,
6399        gticasr::Asgtrgcf,
6400        Gticasr_SPEC,
6401        crate::common::RW,
6402    > {
6403        crate::common::RegisterField::<
6404            5,
6405            0x1,
6406            1,
6407            0,
6408            gticasr::Asgtrgcf,
6409            gticasr::Asgtrgcf,
6410            Gticasr_SPEC,
6411            crate::common::RW,
6412        >::from_register(self, 0)
6413    }
6414
6415    #[doc = "GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable"]
6416    #[inline(always)]
6417    pub fn asgtrgdr(
6418        self,
6419    ) -> crate::common::RegisterField<
6420        6,
6421        0x1,
6422        1,
6423        0,
6424        gticasr::Asgtrgdr,
6425        gticasr::Asgtrgdr,
6426        Gticasr_SPEC,
6427        crate::common::RW,
6428    > {
6429        crate::common::RegisterField::<
6430            6,
6431            0x1,
6432            1,
6433            0,
6434            gticasr::Asgtrgdr,
6435            gticasr::Asgtrgdr,
6436            Gticasr_SPEC,
6437            crate::common::RW,
6438        >::from_register(self, 0)
6439    }
6440
6441    #[doc = "GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable"]
6442    #[inline(always)]
6443    pub fn asgtrgdf(
6444        self,
6445    ) -> crate::common::RegisterField<
6446        7,
6447        0x1,
6448        1,
6449        0,
6450        gticasr::Asgtrgdf,
6451        gticasr::Asgtrgdf,
6452        Gticasr_SPEC,
6453        crate::common::RW,
6454    > {
6455        crate::common::RegisterField::<
6456            7,
6457            0x1,
6458            1,
6459            0,
6460            gticasr::Asgtrgdf,
6461            gticasr::Asgtrgdf,
6462            Gticasr_SPEC,
6463            crate::common::RW,
6464        >::from_register(self, 0)
6465    }
6466
6467    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
6468    #[inline(always)]
6469    pub fn ascarbl(
6470        self,
6471    ) -> crate::common::RegisterField<
6472        8,
6473        0x1,
6474        1,
6475        0,
6476        gticasr::Ascarbl,
6477        gticasr::Ascarbl,
6478        Gticasr_SPEC,
6479        crate::common::RW,
6480    > {
6481        crate::common::RegisterField::<
6482            8,
6483            0x1,
6484            1,
6485            0,
6486            gticasr::Ascarbl,
6487            gticasr::Ascarbl,
6488            Gticasr_SPEC,
6489            crate::common::RW,
6490        >::from_register(self, 0)
6491    }
6492
6493    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6494    #[inline(always)]
6495    pub fn ascarbh(
6496        self,
6497    ) -> crate::common::RegisterField<
6498        9,
6499        0x1,
6500        1,
6501        0,
6502        gticasr::Ascarbh,
6503        gticasr::Ascarbh,
6504        Gticasr_SPEC,
6505        crate::common::RW,
6506    > {
6507        crate::common::RegisterField::<
6508            9,
6509            0x1,
6510            1,
6511            0,
6512            gticasr::Ascarbh,
6513            gticasr::Ascarbh,
6514            Gticasr_SPEC,
6515            crate::common::RW,
6516        >::from_register(self, 0)
6517    }
6518
6519    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
6520    #[inline(always)]
6521    pub fn ascafbl(
6522        self,
6523    ) -> crate::common::RegisterField<
6524        10,
6525        0x1,
6526        1,
6527        0,
6528        gticasr::Ascafbl,
6529        gticasr::Ascafbl,
6530        Gticasr_SPEC,
6531        crate::common::RW,
6532    > {
6533        crate::common::RegisterField::<
6534            10,
6535            0x1,
6536            1,
6537            0,
6538            gticasr::Ascafbl,
6539            gticasr::Ascafbl,
6540            Gticasr_SPEC,
6541            crate::common::RW,
6542        >::from_register(self, 0)
6543    }
6544
6545    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6546    #[inline(always)]
6547    pub fn ascafbh(
6548        self,
6549    ) -> crate::common::RegisterField<
6550        11,
6551        0x1,
6552        1,
6553        0,
6554        gticasr::Ascafbh,
6555        gticasr::Ascafbh,
6556        Gticasr_SPEC,
6557        crate::common::RW,
6558    > {
6559        crate::common::RegisterField::<
6560            11,
6561            0x1,
6562            1,
6563            0,
6564            gticasr::Ascafbh,
6565            gticasr::Ascafbh,
6566            Gticasr_SPEC,
6567            crate::common::RW,
6568        >::from_register(self, 0)
6569    }
6570
6571    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6572    #[inline(always)]
6573    pub fn ascbral(
6574        self,
6575    ) -> crate::common::RegisterField<
6576        12,
6577        0x1,
6578        1,
6579        0,
6580        gticasr::Ascbral,
6581        gticasr::Ascbral,
6582        Gticasr_SPEC,
6583        crate::common::RW,
6584    > {
6585        crate::common::RegisterField::<
6586            12,
6587            0x1,
6588            1,
6589            0,
6590            gticasr::Ascbral,
6591            gticasr::Ascbral,
6592            Gticasr_SPEC,
6593            crate::common::RW,
6594        >::from_register(self, 0)
6595    }
6596
6597    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6598    #[inline(always)]
6599    pub fn ascbrah(
6600        self,
6601    ) -> crate::common::RegisterField<
6602        13,
6603        0x1,
6604        1,
6605        0,
6606        gticasr::Ascbrah,
6607        gticasr::Ascbrah,
6608        Gticasr_SPEC,
6609        crate::common::RW,
6610    > {
6611        crate::common::RegisterField::<
6612            13,
6613            0x1,
6614            1,
6615            0,
6616            gticasr::Ascbrah,
6617            gticasr::Ascbrah,
6618            Gticasr_SPEC,
6619            crate::common::RW,
6620        >::from_register(self, 0)
6621    }
6622
6623    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6624    #[inline(always)]
6625    pub fn ascbfal(
6626        self,
6627    ) -> crate::common::RegisterField<
6628        14,
6629        0x1,
6630        1,
6631        0,
6632        gticasr::Ascbfal,
6633        gticasr::Ascbfal,
6634        Gticasr_SPEC,
6635        crate::common::RW,
6636    > {
6637        crate::common::RegisterField::<
6638            14,
6639            0x1,
6640            1,
6641            0,
6642            gticasr::Ascbfal,
6643            gticasr::Ascbfal,
6644            Gticasr_SPEC,
6645            crate::common::RW,
6646        >::from_register(self, 0)
6647    }
6648
6649    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6650    #[inline(always)]
6651    pub fn ascbfah(
6652        self,
6653    ) -> crate::common::RegisterField<
6654        15,
6655        0x1,
6656        1,
6657        0,
6658        gticasr::Ascbfah,
6659        gticasr::Ascbfah,
6660        Gticasr_SPEC,
6661        crate::common::RW,
6662    > {
6663        crate::common::RegisterField::<
6664            15,
6665            0x1,
6666            1,
6667            0,
6668            gticasr::Ascbfah,
6669            gticasr::Ascbfah,
6670            Gticasr_SPEC,
6671            crate::common::RW,
6672        >::from_register(self, 0)
6673    }
6674
6675    #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
6676    #[inline(always)]
6677    pub fn aselca(
6678        self,
6679    ) -> crate::common::RegisterField<
6680        16,
6681        0x1,
6682        1,
6683        0,
6684        gticasr::Aselca,
6685        gticasr::Aselca,
6686        Gticasr_SPEC,
6687        crate::common::RW,
6688    > {
6689        crate::common::RegisterField::<
6690            16,
6691            0x1,
6692            1,
6693            0,
6694            gticasr::Aselca,
6695            gticasr::Aselca,
6696            Gticasr_SPEC,
6697            crate::common::RW,
6698        >::from_register(self, 0)
6699    }
6700
6701    #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
6702    #[inline(always)]
6703    pub fn aselcb(
6704        self,
6705    ) -> crate::common::RegisterField<
6706        17,
6707        0x1,
6708        1,
6709        0,
6710        gticasr::Aselcb,
6711        gticasr::Aselcb,
6712        Gticasr_SPEC,
6713        crate::common::RW,
6714    > {
6715        crate::common::RegisterField::<
6716            17,
6717            0x1,
6718            1,
6719            0,
6720            gticasr::Aselcb,
6721            gticasr::Aselcb,
6722            Gticasr_SPEC,
6723            crate::common::RW,
6724        >::from_register(self, 0)
6725    }
6726
6727    #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
6728    #[inline(always)]
6729    pub fn aselcc(
6730        self,
6731    ) -> crate::common::RegisterField<
6732        18,
6733        0x1,
6734        1,
6735        0,
6736        gticasr::Aselcc,
6737        gticasr::Aselcc,
6738        Gticasr_SPEC,
6739        crate::common::RW,
6740    > {
6741        crate::common::RegisterField::<
6742            18,
6743            0x1,
6744            1,
6745            0,
6746            gticasr::Aselcc,
6747            gticasr::Aselcc,
6748            Gticasr_SPEC,
6749            crate::common::RW,
6750        >::from_register(self, 0)
6751    }
6752
6753    #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
6754    #[inline(always)]
6755    pub fn aselcd(
6756        self,
6757    ) -> crate::common::RegisterField<
6758        19,
6759        0x1,
6760        1,
6761        0,
6762        gticasr::Aselcd,
6763        gticasr::Aselcd,
6764        Gticasr_SPEC,
6765        crate::common::RW,
6766    > {
6767        crate::common::RegisterField::<
6768            19,
6769            0x1,
6770            1,
6771            0,
6772            gticasr::Aselcd,
6773            gticasr::Aselcd,
6774            Gticasr_SPEC,
6775            crate::common::RW,
6776        >::from_register(self, 0)
6777    }
6778
6779    #[doc = "ELC_GPTE Event Source GTCCRA Input Capture Enable"]
6780    #[inline(always)]
6781    pub fn aselce(
6782        self,
6783    ) -> crate::common::RegisterField<
6784        20,
6785        0x1,
6786        1,
6787        0,
6788        gticasr::Aselce,
6789        gticasr::Aselce,
6790        Gticasr_SPEC,
6791        crate::common::RW,
6792    > {
6793        crate::common::RegisterField::<
6794            20,
6795            0x1,
6796            1,
6797            0,
6798            gticasr::Aselce,
6799            gticasr::Aselce,
6800            Gticasr_SPEC,
6801            crate::common::RW,
6802        >::from_register(self, 0)
6803    }
6804
6805    #[doc = "ELC_GPTF Event Source GTCCRA Input Capture Enable"]
6806    #[inline(always)]
6807    pub fn aselcf(
6808        self,
6809    ) -> crate::common::RegisterField<
6810        21,
6811        0x1,
6812        1,
6813        0,
6814        gticasr::Aselcf,
6815        gticasr::Aselcf,
6816        Gticasr_SPEC,
6817        crate::common::RW,
6818    > {
6819        crate::common::RegisterField::<
6820            21,
6821            0x1,
6822            1,
6823            0,
6824            gticasr::Aselcf,
6825            gticasr::Aselcf,
6826            Gticasr_SPEC,
6827            crate::common::RW,
6828        >::from_register(self, 0)
6829    }
6830
6831    #[doc = "ELC_GPTG Event Source GTCCRA Input Capture Enable"]
6832    #[inline(always)]
6833    pub fn aselcg(
6834        self,
6835    ) -> crate::common::RegisterField<
6836        22,
6837        0x1,
6838        1,
6839        0,
6840        gticasr::Aselcg,
6841        gticasr::Aselcg,
6842        Gticasr_SPEC,
6843        crate::common::RW,
6844    > {
6845        crate::common::RegisterField::<
6846            22,
6847            0x1,
6848            1,
6849            0,
6850            gticasr::Aselcg,
6851            gticasr::Aselcg,
6852            Gticasr_SPEC,
6853            crate::common::RW,
6854        >::from_register(self, 0)
6855    }
6856
6857    #[doc = "ELC_GPTH Event Source GTCCRA Input Capture Enable"]
6858    #[inline(always)]
6859    pub fn aselch(
6860        self,
6861    ) -> crate::common::RegisterField<
6862        23,
6863        0x1,
6864        1,
6865        0,
6866        gticasr::Aselch,
6867        gticasr::Aselch,
6868        Gticasr_SPEC,
6869        crate::common::RW,
6870    > {
6871        crate::common::RegisterField::<
6872            23,
6873            0x1,
6874            1,
6875            0,
6876            gticasr::Aselch,
6877            gticasr::Aselch,
6878            Gticasr_SPEC,
6879            crate::common::RW,
6880        >::from_register(self, 0)
6881    }
6882}
6883impl ::core::default::Default for Gticasr {
6884    #[inline(always)]
6885    fn default() -> Gticasr {
6886        <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
6887    }
6888}
6889pub mod gticasr {
6890
6891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6892    pub struct Asgtrgar_SPEC;
6893    pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
6894    impl Asgtrgar {
6895        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGA input"]
6896        pub const _0: Self = Self::new(0);
6897
6898        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGA input"]
6899        pub const _1: Self = Self::new(1);
6900    }
6901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6902    pub struct Asgtrgaf_SPEC;
6903    pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
6904    impl Asgtrgaf {
6905        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGA input"]
6906        pub const _0: Self = Self::new(0);
6907
6908        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGA input"]
6909        pub const _1: Self = Self::new(1);
6910    }
6911    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6912    pub struct Asgtrgbr_SPEC;
6913    pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
6914    impl Asgtrgbr {
6915        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGB input"]
6916        pub const _0: Self = Self::new(0);
6917
6918        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGB input"]
6919        pub const _1: Self = Self::new(1);
6920    }
6921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6922    pub struct Asgtrgbf_SPEC;
6923    pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
6924    impl Asgtrgbf {
6925        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGB input"]
6926        pub const _0: Self = Self::new(0);
6927
6928        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGB input"]
6929        pub const _1: Self = Self::new(1);
6930    }
6931    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6932    pub struct Asgtrgcr_SPEC;
6933    pub type Asgtrgcr = crate::EnumBitfieldStruct<u8, Asgtrgcr_SPEC>;
6934    impl Asgtrgcr {
6935        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGC input"]
6936        pub const _0: Self = Self::new(0);
6937
6938        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGC input"]
6939        pub const _1: Self = Self::new(1);
6940    }
6941    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6942    pub struct Asgtrgcf_SPEC;
6943    pub type Asgtrgcf = crate::EnumBitfieldStruct<u8, Asgtrgcf_SPEC>;
6944    impl Asgtrgcf {
6945        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGC input"]
6946        pub const _0: Self = Self::new(0);
6947
6948        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGC input"]
6949        pub const _1: Self = Self::new(1);
6950    }
6951    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6952    pub struct Asgtrgdr_SPEC;
6953    pub type Asgtrgdr = crate::EnumBitfieldStruct<u8, Asgtrgdr_SPEC>;
6954    impl Asgtrgdr {
6955        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGD input"]
6956        pub const _0: Self = Self::new(0);
6957
6958        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGD input"]
6959        pub const _1: Self = Self::new(1);
6960    }
6961    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6962    pub struct Asgtrgdf_SPEC;
6963    pub type Asgtrgdf = crate::EnumBitfieldStruct<u8, Asgtrgdf_SPEC>;
6964    impl Asgtrgdf {
6965        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGD input"]
6966        pub const _0: Self = Self::new(0);
6967
6968        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGD input"]
6969        pub const _1: Self = Self::new(1);
6970    }
6971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6972    pub struct Ascarbl_SPEC;
6973    pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
6974    impl Ascarbl {
6975        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6976        pub const _0: Self = Self::new(0);
6977
6978        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6979        pub const _1: Self = Self::new(1);
6980    }
6981    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6982    pub struct Ascarbh_SPEC;
6983    pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
6984    impl Ascarbh {
6985        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6986        pub const _0: Self = Self::new(0);
6987
6988        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6989        pub const _1: Self = Self::new(1);
6990    }
6991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6992    pub struct Ascafbl_SPEC;
6993    pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
6994    impl Ascafbl {
6995        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6996        pub const _0: Self = Self::new(0);
6997
6998        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6999        pub const _1: Self = Self::new(1);
7000    }
7001    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7002    pub struct Ascafbh_SPEC;
7003    pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
7004    impl Ascafbh {
7005        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7006        pub const _0: Self = Self::new(0);
7007
7008        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7009        pub const _1: Self = Self::new(1);
7010    }
7011    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7012    pub struct Ascbral_SPEC;
7013    pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
7014    impl Ascbral {
7015        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7016        pub const _0: Self = Self::new(0);
7017
7018        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7019        pub const _1: Self = Self::new(1);
7020    }
7021    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7022    pub struct Ascbrah_SPEC;
7023    pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
7024    impl Ascbrah {
7025        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7026        pub const _0: Self = Self::new(0);
7027
7028        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7029        pub const _1: Self = Self::new(1);
7030    }
7031    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7032    pub struct Ascbfal_SPEC;
7033    pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
7034    impl Ascbfal {
7035        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7036        pub const _0: Self = Self::new(0);
7037
7038        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7039        pub const _1: Self = Self::new(1);
7040    }
7041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7042    pub struct Ascbfah_SPEC;
7043    pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
7044    impl Ascbfah {
7045        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7046        pub const _0: Self = Self::new(0);
7047
7048        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7049        pub const _1: Self = Self::new(1);
7050    }
7051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7052    pub struct Aselca_SPEC;
7053    pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
7054    impl Aselca {
7055        #[doc = "GTCCRA input capture disabled at the ELC_GPTA input"]
7056        pub const _0: Self = Self::new(0);
7057
7058        #[doc = "GTCCRA input capture enabled at the ELC_GPTA input"]
7059        pub const _1: Self = Self::new(1);
7060    }
7061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7062    pub struct Aselcb_SPEC;
7063    pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
7064    impl Aselcb {
7065        #[doc = "GTCCRA input capture disabled at the ELC_GPTB input"]
7066        pub const _0: Self = Self::new(0);
7067
7068        #[doc = "GTCCRA input capture enabled at the ELC_GPTB input"]
7069        pub const _1: Self = Self::new(1);
7070    }
7071    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7072    pub struct Aselcc_SPEC;
7073    pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
7074    impl Aselcc {
7075        #[doc = "GTCCRA input capture disabled at the ELC_GPTC input"]
7076        pub const _0: Self = Self::new(0);
7077
7078        #[doc = "GTCCRA input capture enabled at the ELC_GPTC input"]
7079        pub const _1: Self = Self::new(1);
7080    }
7081    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7082    pub struct Aselcd_SPEC;
7083    pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
7084    impl Aselcd {
7085        #[doc = "GTCCRA input capture disabled at the ELC_GPTD input"]
7086        pub const _0: Self = Self::new(0);
7087
7088        #[doc = "GTCCRA input capture enabled at the ELC_GPTD input"]
7089        pub const _1: Self = Self::new(1);
7090    }
7091    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7092    pub struct Aselce_SPEC;
7093    pub type Aselce = crate::EnumBitfieldStruct<u8, Aselce_SPEC>;
7094    impl Aselce {
7095        #[doc = "GTCCRA input capture disabled at the ELC_GPTE input"]
7096        pub const _0: Self = Self::new(0);
7097
7098        #[doc = "GTCCRA input capture enabled at the ELC_GPTE input"]
7099        pub const _1: Self = Self::new(1);
7100    }
7101    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7102    pub struct Aselcf_SPEC;
7103    pub type Aselcf = crate::EnumBitfieldStruct<u8, Aselcf_SPEC>;
7104    impl Aselcf {
7105        #[doc = "GTCCRA input capture disabled at the ELC_GPTF input"]
7106        pub const _0: Self = Self::new(0);
7107
7108        #[doc = "GTCCRA input capture enabled at the ELC_GPTF input"]
7109        pub const _1: Self = Self::new(1);
7110    }
7111    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7112    pub struct Aselcg_SPEC;
7113    pub type Aselcg = crate::EnumBitfieldStruct<u8, Aselcg_SPEC>;
7114    impl Aselcg {
7115        #[doc = "GTCCRA input capture disabled at the ELC_GPTG input"]
7116        pub const _0: Self = Self::new(0);
7117
7118        #[doc = "GTCCRA input capture enabled at the ELC_GPTG input"]
7119        pub const _1: Self = Self::new(1);
7120    }
7121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7122    pub struct Aselch_SPEC;
7123    pub type Aselch = crate::EnumBitfieldStruct<u8, Aselch_SPEC>;
7124    impl Aselch {
7125        #[doc = "GTCCRA input capture disabled at the ELC_GPTH input"]
7126        pub const _0: Self = Self::new(0);
7127
7128        #[doc = "GTCCRA input capture enabled at the ELC_GPTH input"]
7129        pub const _1: Self = Self::new(1);
7130    }
7131}
7132#[doc(hidden)]
7133#[derive(Copy, Clone, Eq, PartialEq)]
7134pub struct Gticbsr_SPEC;
7135impl crate::sealed::RegSpec for Gticbsr_SPEC {
7136    type DataType = u32;
7137}
7138
7139#[doc = "General PWM Timer Input Capture Source Select Register B"]
7140pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
7141
7142impl Gticbsr {
7143    #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
7144    #[inline(always)]
7145    pub fn bsgtrgar(
7146        self,
7147    ) -> crate::common::RegisterField<
7148        0,
7149        0x1,
7150        1,
7151        0,
7152        gticbsr::Bsgtrgar,
7153        gticbsr::Bsgtrgar,
7154        Gticbsr_SPEC,
7155        crate::common::RW,
7156    > {
7157        crate::common::RegisterField::<
7158            0,
7159            0x1,
7160            1,
7161            0,
7162            gticbsr::Bsgtrgar,
7163            gticbsr::Bsgtrgar,
7164            Gticbsr_SPEC,
7165            crate::common::RW,
7166        >::from_register(self, 0)
7167    }
7168
7169    #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
7170    #[inline(always)]
7171    pub fn bsgtrgaf(
7172        self,
7173    ) -> crate::common::RegisterField<
7174        1,
7175        0x1,
7176        1,
7177        0,
7178        gticbsr::Bsgtrgaf,
7179        gticbsr::Bsgtrgaf,
7180        Gticbsr_SPEC,
7181        crate::common::RW,
7182    > {
7183        crate::common::RegisterField::<
7184            1,
7185            0x1,
7186            1,
7187            0,
7188            gticbsr::Bsgtrgaf,
7189            gticbsr::Bsgtrgaf,
7190            Gticbsr_SPEC,
7191            crate::common::RW,
7192        >::from_register(self, 0)
7193    }
7194
7195    #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
7196    #[inline(always)]
7197    pub fn bsgtrgbr(
7198        self,
7199    ) -> crate::common::RegisterField<
7200        2,
7201        0x1,
7202        1,
7203        0,
7204        gticbsr::Bsgtrgbr,
7205        gticbsr::Bsgtrgbr,
7206        Gticbsr_SPEC,
7207        crate::common::RW,
7208    > {
7209        crate::common::RegisterField::<
7210            2,
7211            0x1,
7212            1,
7213            0,
7214            gticbsr::Bsgtrgbr,
7215            gticbsr::Bsgtrgbr,
7216            Gticbsr_SPEC,
7217            crate::common::RW,
7218        >::from_register(self, 0)
7219    }
7220
7221    #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
7222    #[inline(always)]
7223    pub fn bsgtrgbf(
7224        self,
7225    ) -> crate::common::RegisterField<
7226        3,
7227        0x1,
7228        1,
7229        0,
7230        gticbsr::Bsgtrgbf,
7231        gticbsr::Bsgtrgbf,
7232        Gticbsr_SPEC,
7233        crate::common::RW,
7234    > {
7235        crate::common::RegisterField::<
7236            3,
7237            0x1,
7238            1,
7239            0,
7240            gticbsr::Bsgtrgbf,
7241            gticbsr::Bsgtrgbf,
7242            Gticbsr_SPEC,
7243            crate::common::RW,
7244        >::from_register(self, 0)
7245    }
7246
7247    #[doc = "GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable"]
7248    #[inline(always)]
7249    pub fn bsgtrgcr(
7250        self,
7251    ) -> crate::common::RegisterField<
7252        4,
7253        0x1,
7254        1,
7255        0,
7256        gticbsr::Bsgtrgcr,
7257        gticbsr::Bsgtrgcr,
7258        Gticbsr_SPEC,
7259        crate::common::RW,
7260    > {
7261        crate::common::RegisterField::<
7262            4,
7263            0x1,
7264            1,
7265            0,
7266            gticbsr::Bsgtrgcr,
7267            gticbsr::Bsgtrgcr,
7268            Gticbsr_SPEC,
7269            crate::common::RW,
7270        >::from_register(self, 0)
7271    }
7272
7273    #[doc = "GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable"]
7274    #[inline(always)]
7275    pub fn bsgtrgcf(
7276        self,
7277    ) -> crate::common::RegisterField<
7278        5,
7279        0x1,
7280        1,
7281        0,
7282        gticbsr::Bsgtrgcf,
7283        gticbsr::Bsgtrgcf,
7284        Gticbsr_SPEC,
7285        crate::common::RW,
7286    > {
7287        crate::common::RegisterField::<
7288            5,
7289            0x1,
7290            1,
7291            0,
7292            gticbsr::Bsgtrgcf,
7293            gticbsr::Bsgtrgcf,
7294            Gticbsr_SPEC,
7295            crate::common::RW,
7296        >::from_register(self, 0)
7297    }
7298
7299    #[doc = "GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable"]
7300    #[inline(always)]
7301    pub fn bsgtrgdr(
7302        self,
7303    ) -> crate::common::RegisterField<
7304        6,
7305        0x1,
7306        1,
7307        0,
7308        gticbsr::Bsgtrgdr,
7309        gticbsr::Bsgtrgdr,
7310        Gticbsr_SPEC,
7311        crate::common::RW,
7312    > {
7313        crate::common::RegisterField::<
7314            6,
7315            0x1,
7316            1,
7317            0,
7318            gticbsr::Bsgtrgdr,
7319            gticbsr::Bsgtrgdr,
7320            Gticbsr_SPEC,
7321            crate::common::RW,
7322        >::from_register(self, 0)
7323    }
7324
7325    #[doc = "GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable"]
7326    #[inline(always)]
7327    pub fn bsgtrgdf(
7328        self,
7329    ) -> crate::common::RegisterField<
7330        7,
7331        0x1,
7332        1,
7333        0,
7334        gticbsr::Bsgtrgdf,
7335        gticbsr::Bsgtrgdf,
7336        Gticbsr_SPEC,
7337        crate::common::RW,
7338    > {
7339        crate::common::RegisterField::<
7340            7,
7341            0x1,
7342            1,
7343            0,
7344            gticbsr::Bsgtrgdf,
7345            gticbsr::Bsgtrgdf,
7346            Gticbsr_SPEC,
7347            crate::common::RW,
7348        >::from_register(self, 0)
7349    }
7350
7351    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
7352    #[inline(always)]
7353    pub fn bscarbl(
7354        self,
7355    ) -> crate::common::RegisterField<
7356        8,
7357        0x1,
7358        1,
7359        0,
7360        gticbsr::Bscarbl,
7361        gticbsr::Bscarbl,
7362        Gticbsr_SPEC,
7363        crate::common::RW,
7364    > {
7365        crate::common::RegisterField::<
7366            8,
7367            0x1,
7368            1,
7369            0,
7370            gticbsr::Bscarbl,
7371            gticbsr::Bscarbl,
7372            Gticbsr_SPEC,
7373            crate::common::RW,
7374        >::from_register(self, 0)
7375    }
7376
7377    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
7378    #[inline(always)]
7379    pub fn bscarbh(
7380        self,
7381    ) -> crate::common::RegisterField<
7382        9,
7383        0x1,
7384        1,
7385        0,
7386        gticbsr::Bscarbh,
7387        gticbsr::Bscarbh,
7388        Gticbsr_SPEC,
7389        crate::common::RW,
7390    > {
7391        crate::common::RegisterField::<
7392            9,
7393            0x1,
7394            1,
7395            0,
7396            gticbsr::Bscarbh,
7397            gticbsr::Bscarbh,
7398            Gticbsr_SPEC,
7399            crate::common::RW,
7400        >::from_register(self, 0)
7401    }
7402
7403    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
7404    #[inline(always)]
7405    pub fn bscafbl(
7406        self,
7407    ) -> crate::common::RegisterField<
7408        10,
7409        0x1,
7410        1,
7411        0,
7412        gticbsr::Bscafbl,
7413        gticbsr::Bscafbl,
7414        Gticbsr_SPEC,
7415        crate::common::RW,
7416    > {
7417        crate::common::RegisterField::<
7418            10,
7419            0x1,
7420            1,
7421            0,
7422            gticbsr::Bscafbl,
7423            gticbsr::Bscafbl,
7424            Gticbsr_SPEC,
7425            crate::common::RW,
7426        >::from_register(self, 0)
7427    }
7428
7429    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
7430    #[inline(always)]
7431    pub fn bscafbh(
7432        self,
7433    ) -> crate::common::RegisterField<
7434        11,
7435        0x1,
7436        1,
7437        0,
7438        gticbsr::Bscafbh,
7439        gticbsr::Bscafbh,
7440        Gticbsr_SPEC,
7441        crate::common::RW,
7442    > {
7443        crate::common::RegisterField::<
7444            11,
7445            0x1,
7446            1,
7447            0,
7448            gticbsr::Bscafbh,
7449            gticbsr::Bscafbh,
7450            Gticbsr_SPEC,
7451            crate::common::RW,
7452        >::from_register(self, 0)
7453    }
7454
7455    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
7456    #[inline(always)]
7457    pub fn bscbral(
7458        self,
7459    ) -> crate::common::RegisterField<
7460        12,
7461        0x1,
7462        1,
7463        0,
7464        gticbsr::Bscbral,
7465        gticbsr::Bscbral,
7466        Gticbsr_SPEC,
7467        crate::common::RW,
7468    > {
7469        crate::common::RegisterField::<
7470            12,
7471            0x1,
7472            1,
7473            0,
7474            gticbsr::Bscbral,
7475            gticbsr::Bscbral,
7476            Gticbsr_SPEC,
7477            crate::common::RW,
7478        >::from_register(self, 0)
7479    }
7480
7481    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
7482    #[inline(always)]
7483    pub fn bscbrah(
7484        self,
7485    ) -> crate::common::RegisterField<
7486        13,
7487        0x1,
7488        1,
7489        0,
7490        gticbsr::Bscbrah,
7491        gticbsr::Bscbrah,
7492        Gticbsr_SPEC,
7493        crate::common::RW,
7494    > {
7495        crate::common::RegisterField::<
7496            13,
7497            0x1,
7498            1,
7499            0,
7500            gticbsr::Bscbrah,
7501            gticbsr::Bscbrah,
7502            Gticbsr_SPEC,
7503            crate::common::RW,
7504        >::from_register(self, 0)
7505    }
7506
7507    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
7508    #[inline(always)]
7509    pub fn bscbfal(
7510        self,
7511    ) -> crate::common::RegisterField<
7512        14,
7513        0x1,
7514        1,
7515        0,
7516        gticbsr::Bscbfal,
7517        gticbsr::Bscbfal,
7518        Gticbsr_SPEC,
7519        crate::common::RW,
7520    > {
7521        crate::common::RegisterField::<
7522            14,
7523            0x1,
7524            1,
7525            0,
7526            gticbsr::Bscbfal,
7527            gticbsr::Bscbfal,
7528            Gticbsr_SPEC,
7529            crate::common::RW,
7530        >::from_register(self, 0)
7531    }
7532
7533    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
7534    #[inline(always)]
7535    pub fn bscbfah(
7536        self,
7537    ) -> crate::common::RegisterField<
7538        15,
7539        0x1,
7540        1,
7541        0,
7542        gticbsr::Bscbfah,
7543        gticbsr::Bscbfah,
7544        Gticbsr_SPEC,
7545        crate::common::RW,
7546    > {
7547        crate::common::RegisterField::<
7548            15,
7549            0x1,
7550            1,
7551            0,
7552            gticbsr::Bscbfah,
7553            gticbsr::Bscbfah,
7554            Gticbsr_SPEC,
7555            crate::common::RW,
7556        >::from_register(self, 0)
7557    }
7558
7559    #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
7560    #[inline(always)]
7561    pub fn bselca(
7562        self,
7563    ) -> crate::common::RegisterField<
7564        16,
7565        0x1,
7566        1,
7567        0,
7568        gticbsr::Bselca,
7569        gticbsr::Bselca,
7570        Gticbsr_SPEC,
7571        crate::common::RW,
7572    > {
7573        crate::common::RegisterField::<
7574            16,
7575            0x1,
7576            1,
7577            0,
7578            gticbsr::Bselca,
7579            gticbsr::Bselca,
7580            Gticbsr_SPEC,
7581            crate::common::RW,
7582        >::from_register(self, 0)
7583    }
7584
7585    #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
7586    #[inline(always)]
7587    pub fn bselcb(
7588        self,
7589    ) -> crate::common::RegisterField<
7590        17,
7591        0x1,
7592        1,
7593        0,
7594        gticbsr::Bselcb,
7595        gticbsr::Bselcb,
7596        Gticbsr_SPEC,
7597        crate::common::RW,
7598    > {
7599        crate::common::RegisterField::<
7600            17,
7601            0x1,
7602            1,
7603            0,
7604            gticbsr::Bselcb,
7605            gticbsr::Bselcb,
7606            Gticbsr_SPEC,
7607            crate::common::RW,
7608        >::from_register(self, 0)
7609    }
7610
7611    #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
7612    #[inline(always)]
7613    pub fn bselcc(
7614        self,
7615    ) -> crate::common::RegisterField<
7616        18,
7617        0x1,
7618        1,
7619        0,
7620        gticbsr::Bselcc,
7621        gticbsr::Bselcc,
7622        Gticbsr_SPEC,
7623        crate::common::RW,
7624    > {
7625        crate::common::RegisterField::<
7626            18,
7627            0x1,
7628            1,
7629            0,
7630            gticbsr::Bselcc,
7631            gticbsr::Bselcc,
7632            Gticbsr_SPEC,
7633            crate::common::RW,
7634        >::from_register(self, 0)
7635    }
7636
7637    #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
7638    #[inline(always)]
7639    pub fn bselcd(
7640        self,
7641    ) -> crate::common::RegisterField<
7642        19,
7643        0x1,
7644        1,
7645        0,
7646        gticbsr::Bselcd,
7647        gticbsr::Bselcd,
7648        Gticbsr_SPEC,
7649        crate::common::RW,
7650    > {
7651        crate::common::RegisterField::<
7652            19,
7653            0x1,
7654            1,
7655            0,
7656            gticbsr::Bselcd,
7657            gticbsr::Bselcd,
7658            Gticbsr_SPEC,
7659            crate::common::RW,
7660        >::from_register(self, 0)
7661    }
7662
7663    #[doc = "ELC_GPTE Event Source GTCCRB Input Capture Enable"]
7664    #[inline(always)]
7665    pub fn bselce(
7666        self,
7667    ) -> crate::common::RegisterField<
7668        20,
7669        0x1,
7670        1,
7671        0,
7672        gticbsr::Bselce,
7673        gticbsr::Bselce,
7674        Gticbsr_SPEC,
7675        crate::common::RW,
7676    > {
7677        crate::common::RegisterField::<
7678            20,
7679            0x1,
7680            1,
7681            0,
7682            gticbsr::Bselce,
7683            gticbsr::Bselce,
7684            Gticbsr_SPEC,
7685            crate::common::RW,
7686        >::from_register(self, 0)
7687    }
7688
7689    #[doc = "ELC_GPTF Event Source GTCCRB Input Capture Enable"]
7690    #[inline(always)]
7691    pub fn bselcf(
7692        self,
7693    ) -> crate::common::RegisterField<
7694        21,
7695        0x1,
7696        1,
7697        0,
7698        gticbsr::Bselcf,
7699        gticbsr::Bselcf,
7700        Gticbsr_SPEC,
7701        crate::common::RW,
7702    > {
7703        crate::common::RegisterField::<
7704            21,
7705            0x1,
7706            1,
7707            0,
7708            gticbsr::Bselcf,
7709            gticbsr::Bselcf,
7710            Gticbsr_SPEC,
7711            crate::common::RW,
7712        >::from_register(self, 0)
7713    }
7714
7715    #[doc = "ELC_GPTG Event Source GTCCRB Input Capture Enable"]
7716    #[inline(always)]
7717    pub fn bselcg(
7718        self,
7719    ) -> crate::common::RegisterField<
7720        22,
7721        0x1,
7722        1,
7723        0,
7724        gticbsr::Bselcg,
7725        gticbsr::Bselcg,
7726        Gticbsr_SPEC,
7727        crate::common::RW,
7728    > {
7729        crate::common::RegisterField::<
7730            22,
7731            0x1,
7732            1,
7733            0,
7734            gticbsr::Bselcg,
7735            gticbsr::Bselcg,
7736            Gticbsr_SPEC,
7737            crate::common::RW,
7738        >::from_register(self, 0)
7739    }
7740
7741    #[doc = "ELC_GPTH Event Source GTCCRB Input Capture Enable"]
7742    #[inline(always)]
7743    pub fn bselch(
7744        self,
7745    ) -> crate::common::RegisterField<
7746        23,
7747        0x1,
7748        1,
7749        0,
7750        gticbsr::Bselch,
7751        gticbsr::Bselch,
7752        Gticbsr_SPEC,
7753        crate::common::RW,
7754    > {
7755        crate::common::RegisterField::<
7756            23,
7757            0x1,
7758            1,
7759            0,
7760            gticbsr::Bselch,
7761            gticbsr::Bselch,
7762            Gticbsr_SPEC,
7763            crate::common::RW,
7764        >::from_register(self, 0)
7765    }
7766}
7767impl ::core::default::Default for Gticbsr {
7768    #[inline(always)]
7769    fn default() -> Gticbsr {
7770        <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
7771    }
7772}
7773pub mod gticbsr {
7774
7775    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7776    pub struct Bsgtrgar_SPEC;
7777    pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
7778    impl Bsgtrgar {
7779        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGA input"]
7780        pub const _0: Self = Self::new(0);
7781
7782        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGA input"]
7783        pub const _1: Self = Self::new(1);
7784    }
7785    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7786    pub struct Bsgtrgaf_SPEC;
7787    pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
7788    impl Bsgtrgaf {
7789        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGA input"]
7790        pub const _0: Self = Self::new(0);
7791
7792        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGA input"]
7793        pub const _1: Self = Self::new(1);
7794    }
7795    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7796    pub struct Bsgtrgbr_SPEC;
7797    pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
7798    impl Bsgtrgbr {
7799        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGB input"]
7800        pub const _0: Self = Self::new(0);
7801
7802        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGB input"]
7803        pub const _1: Self = Self::new(1);
7804    }
7805    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7806    pub struct Bsgtrgbf_SPEC;
7807    pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
7808    impl Bsgtrgbf {
7809        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGB input"]
7810        pub const _0: Self = Self::new(0);
7811
7812        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGB input"]
7813        pub const _1: Self = Self::new(1);
7814    }
7815    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7816    pub struct Bsgtrgcr_SPEC;
7817    pub type Bsgtrgcr = crate::EnumBitfieldStruct<u8, Bsgtrgcr_SPEC>;
7818    impl Bsgtrgcr {
7819        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGC input"]
7820        pub const _0: Self = Self::new(0);
7821
7822        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGC input"]
7823        pub const _1: Self = Self::new(1);
7824    }
7825    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7826    pub struct Bsgtrgcf_SPEC;
7827    pub type Bsgtrgcf = crate::EnumBitfieldStruct<u8, Bsgtrgcf_SPEC>;
7828    impl Bsgtrgcf {
7829        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGC input"]
7830        pub const _0: Self = Self::new(0);
7831
7832        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGC input"]
7833        pub const _1: Self = Self::new(1);
7834    }
7835    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7836    pub struct Bsgtrgdr_SPEC;
7837    pub type Bsgtrgdr = crate::EnumBitfieldStruct<u8, Bsgtrgdr_SPEC>;
7838    impl Bsgtrgdr {
7839        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGD input"]
7840        pub const _0: Self = Self::new(0);
7841
7842        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGD input"]
7843        pub const _1: Self = Self::new(1);
7844    }
7845    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7846    pub struct Bsgtrgdf_SPEC;
7847    pub type Bsgtrgdf = crate::EnumBitfieldStruct<u8, Bsgtrgdf_SPEC>;
7848    impl Bsgtrgdf {
7849        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGD input"]
7850        pub const _0: Self = Self::new(0);
7851
7852        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGD input"]
7853        pub const _1: Self = Self::new(1);
7854    }
7855    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7856    pub struct Bscarbl_SPEC;
7857    pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
7858    impl Bscarbl {
7859        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7860        pub const _0: Self = Self::new(0);
7861
7862        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7863        pub const _1: Self = Self::new(1);
7864    }
7865    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7866    pub struct Bscarbh_SPEC;
7867    pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
7868    impl Bscarbh {
7869        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7870        pub const _0: Self = Self::new(0);
7871
7872        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7873        pub const _1: Self = Self::new(1);
7874    }
7875    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7876    pub struct Bscafbl_SPEC;
7877    pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
7878    impl Bscafbl {
7879        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7880        pub const _0: Self = Self::new(0);
7881
7882        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7883        pub const _1: Self = Self::new(1);
7884    }
7885    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7886    pub struct Bscafbh_SPEC;
7887    pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
7888    impl Bscafbh {
7889        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7890        pub const _0: Self = Self::new(0);
7891
7892        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7893        pub const _1: Self = Self::new(1);
7894    }
7895    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7896    pub struct Bscbral_SPEC;
7897    pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
7898    impl Bscbral {
7899        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7900        pub const _0: Self = Self::new(0);
7901
7902        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7903        pub const _1: Self = Self::new(1);
7904    }
7905    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7906    pub struct Bscbrah_SPEC;
7907    pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
7908    impl Bscbrah {
7909        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7910        pub const _0: Self = Self::new(0);
7911
7912        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7913        pub const _1: Self = Self::new(1);
7914    }
7915    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7916    pub struct Bscbfal_SPEC;
7917    pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
7918    impl Bscbfal {
7919        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7920        pub const _0: Self = Self::new(0);
7921
7922        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7923        pub const _1: Self = Self::new(1);
7924    }
7925    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7926    pub struct Bscbfah_SPEC;
7927    pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
7928    impl Bscbfah {
7929        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7930        pub const _0: Self = Self::new(0);
7931
7932        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7933        pub const _1: Self = Self::new(1);
7934    }
7935    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7936    pub struct Bselca_SPEC;
7937    pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
7938    impl Bselca {
7939        #[doc = "GTCCRB input capture disabled at the ELC_GPTA input"]
7940        pub const _0: Self = Self::new(0);
7941
7942        #[doc = "GTCCRB input capture enabled at the ELC_GPTA input"]
7943        pub const _1: Self = Self::new(1);
7944    }
7945    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7946    pub struct Bselcb_SPEC;
7947    pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
7948    impl Bselcb {
7949        #[doc = "GTCCRB input capture disabled at the ELC_GPTB input"]
7950        pub const _0: Self = Self::new(0);
7951
7952        #[doc = "GTCCRB input capture enabled at the ELC_GPTB input"]
7953        pub const _1: Self = Self::new(1);
7954    }
7955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7956    pub struct Bselcc_SPEC;
7957    pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
7958    impl Bselcc {
7959        #[doc = "GTCCRB input capture disabled at the ELC_GPTC input"]
7960        pub const _0: Self = Self::new(0);
7961
7962        #[doc = "GTCCRB input capture enabled at the ELC_GPTC input"]
7963        pub const _1: Self = Self::new(1);
7964    }
7965    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7966    pub struct Bselcd_SPEC;
7967    pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
7968    impl Bselcd {
7969        #[doc = "GTCCRB input capture disabled at the ELC_GPTD input"]
7970        pub const _0: Self = Self::new(0);
7971
7972        #[doc = "GTCCRB input capture enabled at the ELC_GPTD input"]
7973        pub const _1: Self = Self::new(1);
7974    }
7975    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7976    pub struct Bselce_SPEC;
7977    pub type Bselce = crate::EnumBitfieldStruct<u8, Bselce_SPEC>;
7978    impl Bselce {
7979        #[doc = "GTCCRB input capture disabled at the ELC_GPTE input"]
7980        pub const _0: Self = Self::new(0);
7981
7982        #[doc = "GTCCRB input capture enabled at the ELC_GPTE input"]
7983        pub const _1: Self = Self::new(1);
7984    }
7985    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7986    pub struct Bselcf_SPEC;
7987    pub type Bselcf = crate::EnumBitfieldStruct<u8, Bselcf_SPEC>;
7988    impl Bselcf {
7989        #[doc = "GTCCRB input capture disabled at the ELC_GPTF input"]
7990        pub const _0: Self = Self::new(0);
7991
7992        #[doc = "GTCCRB input capture enabled at the ELC_GPTF input"]
7993        pub const _1: Self = Self::new(1);
7994    }
7995    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7996    pub struct Bselcg_SPEC;
7997    pub type Bselcg = crate::EnumBitfieldStruct<u8, Bselcg_SPEC>;
7998    impl Bselcg {
7999        #[doc = "GTCCRB input capture disabled at the ELC_GPTG input"]
8000        pub const _0: Self = Self::new(0);
8001
8002        #[doc = "GTCCRB input capture enabled at the ELC_GPTG input"]
8003        pub const _1: Self = Self::new(1);
8004    }
8005    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8006    pub struct Bselch_SPEC;
8007    pub type Bselch = crate::EnumBitfieldStruct<u8, Bselch_SPEC>;
8008    impl Bselch {
8009        #[doc = "GTCCRB input capture disabled at the ELC_GPTH input"]
8010        pub const _0: Self = Self::new(0);
8011
8012        #[doc = "GTCCRB input capture enabled at the ELC_GPTH input"]
8013        pub const _1: Self = Self::new(1);
8014    }
8015}
8016#[doc(hidden)]
8017#[derive(Copy, Clone, Eq, PartialEq)]
8018pub struct Gtcr_SPEC;
8019impl crate::sealed::RegSpec for Gtcr_SPEC {
8020    type DataType = u32;
8021}
8022
8023#[doc = "General PWM Timer Control Register"]
8024pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
8025
8026impl Gtcr {
8027    #[doc = "Count Start"]
8028    #[inline(always)]
8029    pub fn cst(
8030        self,
8031    ) -> crate::common::RegisterField<
8032        0,
8033        0x1,
8034        1,
8035        0,
8036        gtcr::Cst,
8037        gtcr::Cst,
8038        Gtcr_SPEC,
8039        crate::common::RW,
8040    > {
8041        crate::common::RegisterField::<
8042            0,
8043            0x1,
8044            1,
8045            0,
8046            gtcr::Cst,
8047            gtcr::Cst,
8048            Gtcr_SPEC,
8049            crate::common::RW,
8050        >::from_register(self, 0)
8051    }
8052
8053    #[doc = "Mode Select"]
8054    #[inline(always)]
8055    pub fn md(
8056        self,
8057    ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
8058    {
8059        crate::common::RegisterField::<
8060            16,
8061            0x7,
8062            1,
8063            0,
8064            gtcr::Md,
8065            gtcr::Md,
8066            Gtcr_SPEC,
8067            crate::common::RW,
8068        >::from_register(self, 0)
8069    }
8070
8071    #[doc = "Timer Prescaler Select"]
8072    #[inline(always)]
8073    pub fn tpcs(
8074        self,
8075    ) -> crate::common::RegisterField<
8076        23,
8077        0xf,
8078        1,
8079        0,
8080        gtcr::Tpcs,
8081        gtcr::Tpcs,
8082        Gtcr_SPEC,
8083        crate::common::RW,
8084    > {
8085        crate::common::RegisterField::<
8086            23,
8087            0xf,
8088            1,
8089            0,
8090            gtcr::Tpcs,
8091            gtcr::Tpcs,
8092            Gtcr_SPEC,
8093            crate::common::RW,
8094        >::from_register(self, 0)
8095    }
8096}
8097impl ::core::default::Default for Gtcr {
8098    #[inline(always)]
8099    fn default() -> Gtcr {
8100        <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
8101    }
8102}
8103pub mod gtcr {
8104
8105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8106    pub struct Cst_SPEC;
8107    pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
8108    impl Cst {
8109        #[doc = "Count operation is stopped"]
8110        pub const _0: Self = Self::new(0);
8111
8112        #[doc = "Count operation is performed"]
8113        pub const _1: Self = Self::new(1);
8114    }
8115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8116    pub struct Md_SPEC;
8117    pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
8118    impl Md {
8119        #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
8120        pub const _000: Self = Self::new(0);
8121
8122        #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
8123        pub const _001: Self = Self::new(1);
8124
8125        #[doc = "Setting prohibited"]
8126        pub const _010: Self = Self::new(2);
8127
8128        #[doc = "Setting prohibited"]
8129        pub const _011: Self = Self::new(3);
8130
8131        #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at trough) (single buffer or double buffer is possible)"]
8132        pub const _100: Self = Self::new(4);
8133
8134        #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer is possible)"]
8135        pub const _101: Self = Self::new(5);
8136
8137        #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) (fixed buffer operation)"]
8138        pub const _110: Self = Self::new(6);
8139
8140        #[doc = "Setting prohibited"]
8141        pub const _111: Self = Self::new(7);
8142    }
8143    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8144    pub struct Tpcs_SPEC;
8145    pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
8146    impl Tpcs {
8147        #[doc = "PCLKD/1"]
8148        pub const _0_X_0: Self = Self::new(0);
8149
8150        #[doc = "PCLKD/2"]
8151        pub const _0_X_1: Self = Self::new(1);
8152
8153        #[doc = "PCLKD/4"]
8154        pub const _0_X_2: Self = Self::new(2);
8155
8156        #[doc = "PCLKD/8"]
8157        pub const _0_X_3: Self = Self::new(3);
8158
8159        #[doc = "PCLKD/16"]
8160        pub const _0_X_4: Self = Self::new(4);
8161
8162        #[doc = "PCLKD/32"]
8163        pub const _0_X_5: Self = Self::new(5);
8164
8165        #[doc = "PCLKD/64"]
8166        pub const _0_X_6: Self = Self::new(6);
8167
8168        #[doc = "Setting prohibited"]
8169        pub const _0_X_7: Self = Self::new(7);
8170
8171        #[doc = "PCLKD/256"]
8172        pub const _0_X_8: Self = Self::new(8);
8173
8174        #[doc = "Setting prohibited"]
8175        pub const _0_X_9: Self = Self::new(9);
8176
8177        #[doc = "PCLKD/1024"]
8178        pub const _0_X_A: Self = Self::new(10);
8179
8180        #[doc = "Setting prohibited"]
8181        pub const _0_X_B: Self = Self::new(11);
8182
8183        #[doc = "GTETRGA (Via the POEG)"]
8184        pub const _0_X_C: Self = Self::new(12);
8185
8186        #[doc = "GTETRGB (Via the POEG)"]
8187        pub const _0_X_D: Self = Self::new(13);
8188
8189        #[doc = "GTETRGC (Via the POEG)"]
8190        pub const _0_X_E: Self = Self::new(14);
8191
8192        #[doc = "GTETRGD (Via the POEG)"]
8193        pub const _0_X_F: Self = Self::new(15);
8194    }
8195}
8196#[doc(hidden)]
8197#[derive(Copy, Clone, Eq, PartialEq)]
8198pub struct Gtuddtyc_SPEC;
8199impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
8200    type DataType = u32;
8201}
8202
8203#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
8204pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
8205
8206impl Gtuddtyc {
8207    #[doc = "Count Direction Setting"]
8208    #[inline(always)]
8209    pub fn ud(
8210        self,
8211    ) -> crate::common::RegisterField<
8212        0,
8213        0x1,
8214        1,
8215        0,
8216        gtuddtyc::Ud,
8217        gtuddtyc::Ud,
8218        Gtuddtyc_SPEC,
8219        crate::common::RW,
8220    > {
8221        crate::common::RegisterField::<
8222            0,
8223            0x1,
8224            1,
8225            0,
8226            gtuddtyc::Ud,
8227            gtuddtyc::Ud,
8228            Gtuddtyc_SPEC,
8229            crate::common::RW,
8230        >::from_register(self, 0)
8231    }
8232
8233    #[doc = "Forcible Count Direction Setting"]
8234    #[inline(always)]
8235    pub fn udf(
8236        self,
8237    ) -> crate::common::RegisterField<
8238        1,
8239        0x1,
8240        1,
8241        0,
8242        gtuddtyc::Udf,
8243        gtuddtyc::Udf,
8244        Gtuddtyc_SPEC,
8245        crate::common::RW,
8246    > {
8247        crate::common::RegisterField::<
8248            1,
8249            0x1,
8250            1,
8251            0,
8252            gtuddtyc::Udf,
8253            gtuddtyc::Udf,
8254            Gtuddtyc_SPEC,
8255            crate::common::RW,
8256        >::from_register(self, 0)
8257    }
8258
8259    #[doc = "GTIOCnA Output Duty Setting"]
8260    #[inline(always)]
8261    pub fn oadty(
8262        self,
8263    ) -> crate::common::RegisterField<
8264        16,
8265        0x3,
8266        1,
8267        0,
8268        gtuddtyc::Oadty,
8269        gtuddtyc::Oadty,
8270        Gtuddtyc_SPEC,
8271        crate::common::RW,
8272    > {
8273        crate::common::RegisterField::<
8274            16,
8275            0x3,
8276            1,
8277            0,
8278            gtuddtyc::Oadty,
8279            gtuddtyc::Oadty,
8280            Gtuddtyc_SPEC,
8281            crate::common::RW,
8282        >::from_register(self, 0)
8283    }
8284
8285    #[doc = "Forcible GTIOCnA Output Duty Setting"]
8286    #[inline(always)]
8287    pub fn oadtyf(
8288        self,
8289    ) -> crate::common::RegisterField<
8290        18,
8291        0x1,
8292        1,
8293        0,
8294        gtuddtyc::Oadtyf,
8295        gtuddtyc::Oadtyf,
8296        Gtuddtyc_SPEC,
8297        crate::common::RW,
8298    > {
8299        crate::common::RegisterField::<
8300            18,
8301            0x1,
8302            1,
8303            0,
8304            gtuddtyc::Oadtyf,
8305            gtuddtyc::Oadtyf,
8306            Gtuddtyc_SPEC,
8307            crate::common::RW,
8308        >::from_register(self, 0)
8309    }
8310
8311    #[doc = "GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting"]
8312    #[inline(always)]
8313    pub fn oadtyr(
8314        self,
8315    ) -> crate::common::RegisterField<
8316        19,
8317        0x1,
8318        1,
8319        0,
8320        gtuddtyc::Oadtyr,
8321        gtuddtyc::Oadtyr,
8322        Gtuddtyc_SPEC,
8323        crate::common::RW,
8324    > {
8325        crate::common::RegisterField::<
8326            19,
8327            0x1,
8328            1,
8329            0,
8330            gtuddtyc::Oadtyr,
8331            gtuddtyc::Oadtyr,
8332            Gtuddtyc_SPEC,
8333            crate::common::RW,
8334        >::from_register(self, 0)
8335    }
8336
8337    #[doc = "GTIOCnB Output Duty Setting"]
8338    #[inline(always)]
8339    pub fn obdty(
8340        self,
8341    ) -> crate::common::RegisterField<
8342        24,
8343        0x3,
8344        1,
8345        0,
8346        gtuddtyc::Obdty,
8347        gtuddtyc::Obdty,
8348        Gtuddtyc_SPEC,
8349        crate::common::RW,
8350    > {
8351        crate::common::RegisterField::<
8352            24,
8353            0x3,
8354            1,
8355            0,
8356            gtuddtyc::Obdty,
8357            gtuddtyc::Obdty,
8358            Gtuddtyc_SPEC,
8359            crate::common::RW,
8360        >::from_register(self, 0)
8361    }
8362
8363    #[doc = "Forcible GTIOCnB Output Duty Setting"]
8364    #[inline(always)]
8365    pub fn obdtyf(
8366        self,
8367    ) -> crate::common::RegisterField<
8368        26,
8369        0x1,
8370        1,
8371        0,
8372        gtuddtyc::Obdtyf,
8373        gtuddtyc::Obdtyf,
8374        Gtuddtyc_SPEC,
8375        crate::common::RW,
8376    > {
8377        crate::common::RegisterField::<
8378            26,
8379            0x1,
8380            1,
8381            0,
8382            gtuddtyc::Obdtyf,
8383            gtuddtyc::Obdtyf,
8384            Gtuddtyc_SPEC,
8385            crate::common::RW,
8386        >::from_register(self, 0)
8387    }
8388
8389    #[doc = "GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting"]
8390    #[inline(always)]
8391    pub fn obdtyr(
8392        self,
8393    ) -> crate::common::RegisterField<
8394        27,
8395        0x1,
8396        1,
8397        0,
8398        gtuddtyc::Obdtyr,
8399        gtuddtyc::Obdtyr,
8400        Gtuddtyc_SPEC,
8401        crate::common::RW,
8402    > {
8403        crate::common::RegisterField::<
8404            27,
8405            0x1,
8406            1,
8407            0,
8408            gtuddtyc::Obdtyr,
8409            gtuddtyc::Obdtyr,
8410            Gtuddtyc_SPEC,
8411            crate::common::RW,
8412        >::from_register(self, 0)
8413    }
8414}
8415impl ::core::default::Default for Gtuddtyc {
8416    #[inline(always)]
8417    fn default() -> Gtuddtyc {
8418        <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
8419    }
8420}
8421pub mod gtuddtyc {
8422
8423    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8424    pub struct Ud_SPEC;
8425    pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
8426    impl Ud {
8427        #[doc = "GTCNT counts down"]
8428        pub const _0: Self = Self::new(0);
8429
8430        #[doc = "GTCNT counts up"]
8431        pub const _1: Self = Self::new(1);
8432    }
8433    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8434    pub struct Udf_SPEC;
8435    pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
8436    impl Udf {
8437        #[doc = "Not forcibly set"]
8438        pub const _0: Self = Self::new(0);
8439
8440        #[doc = "Forcibly set"]
8441        pub const _1: Self = Self::new(1);
8442    }
8443    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8444    pub struct Oadty_SPEC;
8445    pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
8446    impl Oadty {
8447        #[doc = "GTIOCnA pin duty depends on the compare match"]
8448        pub const _00: Self = Self::new(0);
8449
8450        #[doc = "GTIOCnA pin duty depends on the compare match"]
8451        pub const _01: Self = Self::new(1);
8452
8453        #[doc = "GTIOCnA pin duty 0%"]
8454        pub const _10: Self = Self::new(2);
8455
8456        #[doc = "GTIOCnA pin duty 100%"]
8457        pub const _11: Self = Self::new(3);
8458    }
8459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8460    pub struct Oadtyf_SPEC;
8461    pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
8462    impl Oadtyf {
8463        #[doc = "Not forcibly set"]
8464        pub const _0: Self = Self::new(0);
8465
8466        #[doc = "Forcibly set"]
8467        pub const _1: Self = Self::new(1);
8468    }
8469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8470    pub struct Oadtyr_SPEC;
8471    pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
8472    impl Oadtyr {
8473        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
8474        pub const _0: Self = Self::new(0);
8475
8476        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
8477        pub const _1: Self = Self::new(1);
8478    }
8479    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8480    pub struct Obdty_SPEC;
8481    pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
8482    impl Obdty {
8483        #[doc = "GTIOCnB pin duty depends on the compare match"]
8484        pub const _00: Self = Self::new(0);
8485
8486        #[doc = "GTIOCnB pin duty depends on the compare match"]
8487        pub const _01: Self = Self::new(1);
8488
8489        #[doc = "GTIOCnB pin duty 0%"]
8490        pub const _10: Self = Self::new(2);
8491
8492        #[doc = "GTIOCnB pin duty 100%"]
8493        pub const _11: Self = Self::new(3);
8494    }
8495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8496    pub struct Obdtyf_SPEC;
8497    pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
8498    impl Obdtyf {
8499        #[doc = "Not forcibly set"]
8500        pub const _0: Self = Self::new(0);
8501
8502        #[doc = "Forcibly set"]
8503        pub const _1: Self = Self::new(1);
8504    }
8505    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8506    pub struct Obdtyr_SPEC;
8507    pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
8508    impl Obdtyr {
8509        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
8510        pub const _0: Self = Self::new(0);
8511
8512        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
8513        pub const _1: Self = Self::new(1);
8514    }
8515}
8516#[doc(hidden)]
8517#[derive(Copy, Clone, Eq, PartialEq)]
8518pub struct Gtior_SPEC;
8519impl crate::sealed::RegSpec for Gtior_SPEC {
8520    type DataType = u32;
8521}
8522
8523#[doc = "General PWM Timer I/O Control Register"]
8524pub type Gtior = crate::RegValueT<Gtior_SPEC>;
8525
8526impl Gtior {
8527    #[doc = "GTIOCnA Pin Function Select"]
8528    #[inline(always)]
8529    pub fn gtioa(
8530        self,
8531    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8532        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8533    }
8534
8535    #[doc = "GTIOCnA Pin Output Value Setting at the Count Stop"]
8536    #[inline(always)]
8537    pub fn oadflt(
8538        self,
8539    ) -> crate::common::RegisterField<
8540        6,
8541        0x1,
8542        1,
8543        0,
8544        gtior::Oadflt,
8545        gtior::Oadflt,
8546        Gtior_SPEC,
8547        crate::common::RW,
8548    > {
8549        crate::common::RegisterField::<
8550            6,
8551            0x1,
8552            1,
8553            0,
8554            gtior::Oadflt,
8555            gtior::Oadflt,
8556            Gtior_SPEC,
8557            crate::common::RW,
8558        >::from_register(self, 0)
8559    }
8560
8561    #[doc = "GTIOCnA Pin Output Setting at the Start/Stop Count"]
8562    #[inline(always)]
8563    pub fn oahld(
8564        self,
8565    ) -> crate::common::RegisterField<
8566        7,
8567        0x1,
8568        1,
8569        0,
8570        gtior::Oahld,
8571        gtior::Oahld,
8572        Gtior_SPEC,
8573        crate::common::RW,
8574    > {
8575        crate::common::RegisterField::<
8576            7,
8577            0x1,
8578            1,
8579            0,
8580            gtior::Oahld,
8581            gtior::Oahld,
8582            Gtior_SPEC,
8583            crate::common::RW,
8584        >::from_register(self, 0)
8585    }
8586
8587    #[doc = "GTIOCnA Pin Output Enable"]
8588    #[inline(always)]
8589    pub fn oae(
8590        self,
8591    ) -> crate::common::RegisterField<
8592        8,
8593        0x1,
8594        1,
8595        0,
8596        gtior::Oae,
8597        gtior::Oae,
8598        Gtior_SPEC,
8599        crate::common::RW,
8600    > {
8601        crate::common::RegisterField::<
8602            8,
8603            0x1,
8604            1,
8605            0,
8606            gtior::Oae,
8607            gtior::Oae,
8608            Gtior_SPEC,
8609            crate::common::RW,
8610        >::from_register(self, 0)
8611    }
8612
8613    #[doc = "GTIOCnA Pin Disable Value Setting"]
8614    #[inline(always)]
8615    pub fn oadf(
8616        self,
8617    ) -> crate::common::RegisterField<
8618        9,
8619        0x3,
8620        1,
8621        0,
8622        gtior::Oadf,
8623        gtior::Oadf,
8624        Gtior_SPEC,
8625        crate::common::RW,
8626    > {
8627        crate::common::RegisterField::<
8628            9,
8629            0x3,
8630            1,
8631            0,
8632            gtior::Oadf,
8633            gtior::Oadf,
8634            Gtior_SPEC,
8635            crate::common::RW,
8636        >::from_register(self, 0)
8637    }
8638
8639    #[doc = "Noise Filter A Enable"]
8640    #[inline(always)]
8641    pub fn nfaen(
8642        self,
8643    ) -> crate::common::RegisterField<
8644        13,
8645        0x1,
8646        1,
8647        0,
8648        gtior::Nfaen,
8649        gtior::Nfaen,
8650        Gtior_SPEC,
8651        crate::common::RW,
8652    > {
8653        crate::common::RegisterField::<
8654            13,
8655            0x1,
8656            1,
8657            0,
8658            gtior::Nfaen,
8659            gtior::Nfaen,
8660            Gtior_SPEC,
8661            crate::common::RW,
8662        >::from_register(self, 0)
8663    }
8664
8665    #[doc = "Noise Filter A Sampling Clock Select"]
8666    #[inline(always)]
8667    pub fn nfcsa(
8668        self,
8669    ) -> crate::common::RegisterField<
8670        14,
8671        0x3,
8672        1,
8673        0,
8674        gtior::Nfcsa,
8675        gtior::Nfcsa,
8676        Gtior_SPEC,
8677        crate::common::RW,
8678    > {
8679        crate::common::RegisterField::<
8680            14,
8681            0x3,
8682            1,
8683            0,
8684            gtior::Nfcsa,
8685            gtior::Nfcsa,
8686            Gtior_SPEC,
8687            crate::common::RW,
8688        >::from_register(self, 0)
8689    }
8690
8691    #[doc = "GTIOCnB Pin Function Select"]
8692    #[inline(always)]
8693    pub fn gtiob(
8694        self,
8695    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8696        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8697    }
8698
8699    #[doc = "GTIOCnB Pin Output Value Setting at the Count Stop"]
8700    #[inline(always)]
8701    pub fn obdflt(
8702        self,
8703    ) -> crate::common::RegisterField<
8704        22,
8705        0x1,
8706        1,
8707        0,
8708        gtior::Obdflt,
8709        gtior::Obdflt,
8710        Gtior_SPEC,
8711        crate::common::RW,
8712    > {
8713        crate::common::RegisterField::<
8714            22,
8715            0x1,
8716            1,
8717            0,
8718            gtior::Obdflt,
8719            gtior::Obdflt,
8720            Gtior_SPEC,
8721            crate::common::RW,
8722        >::from_register(self, 0)
8723    }
8724
8725    #[doc = "GTIOCnB Pin Output Setting at the Start/Stop Count"]
8726    #[inline(always)]
8727    pub fn obhld(
8728        self,
8729    ) -> crate::common::RegisterField<
8730        23,
8731        0x1,
8732        1,
8733        0,
8734        gtior::Obhld,
8735        gtior::Obhld,
8736        Gtior_SPEC,
8737        crate::common::RW,
8738    > {
8739        crate::common::RegisterField::<
8740            23,
8741            0x1,
8742            1,
8743            0,
8744            gtior::Obhld,
8745            gtior::Obhld,
8746            Gtior_SPEC,
8747            crate::common::RW,
8748        >::from_register(self, 0)
8749    }
8750
8751    #[doc = "GTIOCnB Pin Output Enable"]
8752    #[inline(always)]
8753    pub fn obe(
8754        self,
8755    ) -> crate::common::RegisterField<
8756        24,
8757        0x1,
8758        1,
8759        0,
8760        gtior::Obe,
8761        gtior::Obe,
8762        Gtior_SPEC,
8763        crate::common::RW,
8764    > {
8765        crate::common::RegisterField::<
8766            24,
8767            0x1,
8768            1,
8769            0,
8770            gtior::Obe,
8771            gtior::Obe,
8772            Gtior_SPEC,
8773            crate::common::RW,
8774        >::from_register(self, 0)
8775    }
8776
8777    #[doc = "GTIOCnB Pin Disable Value Setting"]
8778    #[inline(always)]
8779    pub fn obdf(
8780        self,
8781    ) -> crate::common::RegisterField<
8782        25,
8783        0x3,
8784        1,
8785        0,
8786        gtior::Obdf,
8787        gtior::Obdf,
8788        Gtior_SPEC,
8789        crate::common::RW,
8790    > {
8791        crate::common::RegisterField::<
8792            25,
8793            0x3,
8794            1,
8795            0,
8796            gtior::Obdf,
8797            gtior::Obdf,
8798            Gtior_SPEC,
8799            crate::common::RW,
8800        >::from_register(self, 0)
8801    }
8802
8803    #[doc = "Noise Filter B Enable"]
8804    #[inline(always)]
8805    pub fn nfben(
8806        self,
8807    ) -> crate::common::RegisterField<
8808        29,
8809        0x1,
8810        1,
8811        0,
8812        gtior::Nfben,
8813        gtior::Nfben,
8814        Gtior_SPEC,
8815        crate::common::RW,
8816    > {
8817        crate::common::RegisterField::<
8818            29,
8819            0x1,
8820            1,
8821            0,
8822            gtior::Nfben,
8823            gtior::Nfben,
8824            Gtior_SPEC,
8825            crate::common::RW,
8826        >::from_register(self, 0)
8827    }
8828
8829    #[doc = "Noise Filter B Sampling Clock Select"]
8830    #[inline(always)]
8831    pub fn nfcsb(
8832        self,
8833    ) -> crate::common::RegisterField<
8834        30,
8835        0x3,
8836        1,
8837        0,
8838        gtior::Nfcsb,
8839        gtior::Nfcsb,
8840        Gtior_SPEC,
8841        crate::common::RW,
8842    > {
8843        crate::common::RegisterField::<
8844            30,
8845            0x3,
8846            1,
8847            0,
8848            gtior::Nfcsb,
8849            gtior::Nfcsb,
8850            Gtior_SPEC,
8851            crate::common::RW,
8852        >::from_register(self, 0)
8853    }
8854}
8855impl ::core::default::Default for Gtior {
8856    #[inline(always)]
8857    fn default() -> Gtior {
8858        <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
8859    }
8860}
8861pub mod gtior {
8862
8863    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8864    pub struct Oadflt_SPEC;
8865    pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
8866    impl Oadflt {
8867        #[doc = "The GTIOCnA pin outputs low when counting stops"]
8868        pub const _0: Self = Self::new(0);
8869
8870        #[doc = "The GTIOCnA pin outputs high when counting stops"]
8871        pub const _1: Self = Self::new(1);
8872    }
8873    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8874    pub struct Oahld_SPEC;
8875    pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
8876    impl Oahld {
8877        #[doc = "The GTIOCnA pin output level at the start or stop of counting depends on the register setting"]
8878        pub const _0: Self = Self::new(0);
8879
8880        #[doc = "The GTIOCnA pin output level is retained at the start or stop of counting"]
8881        pub const _1: Self = Self::new(1);
8882    }
8883    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8884    pub struct Oae_SPEC;
8885    pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
8886    impl Oae {
8887        #[doc = "Output is disabled"]
8888        pub const _0: Self = Self::new(0);
8889
8890        #[doc = "Output is enabled"]
8891        pub const _1: Self = Self::new(1);
8892    }
8893    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8894    pub struct Oadf_SPEC;
8895    pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
8896    impl Oadf {
8897        #[doc = "None of the below options are specified"]
8898        pub const _00: Self = Self::new(0);
8899
8900        #[doc = "GTIOCnA pin is set to Hi-Z in response to controlling the output negation"]
8901        pub const _01: Self = Self::new(1);
8902
8903        #[doc = "GTIOCnA pin is set to 0 in response to controlling the output negation"]
8904        pub const _10: Self = Self::new(2);
8905
8906        #[doc = "GTIOCnA pin is set to 1 in response to controlling the output negation"]
8907        pub const _11: Self = Self::new(3);
8908    }
8909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8910    pub struct Nfaen_SPEC;
8911    pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
8912    impl Nfaen {
8913        #[doc = "The noise filter for the GTIOCnA pin is disabled"]
8914        pub const _0: Self = Self::new(0);
8915
8916        #[doc = "The noise filter for the GTIOCnA pin is enabled"]
8917        pub const _1: Self = Self::new(1);
8918    }
8919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8920    pub struct Nfcsa_SPEC;
8921    pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
8922    impl Nfcsa {
8923        #[doc = "PCLKD/1"]
8924        pub const _00: Self = Self::new(0);
8925
8926        #[doc = "PCLKD/4"]
8927        pub const _01: Self = Self::new(1);
8928
8929        #[doc = "PCLKD/16"]
8930        pub const _10: Self = Self::new(2);
8931
8932        #[doc = "PCLKD/64"]
8933        pub const _11: Self = Self::new(3);
8934    }
8935    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8936    pub struct Obdflt_SPEC;
8937    pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
8938    impl Obdflt {
8939        #[doc = "The GTIOCnB pin outputs low when counting stops"]
8940        pub const _0: Self = Self::new(0);
8941
8942        #[doc = "The GTIOCnB pin outputs high when counting stops"]
8943        pub const _1: Self = Self::new(1);
8944    }
8945    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8946    pub struct Obhld_SPEC;
8947    pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
8948    impl Obhld {
8949        #[doc = "The GTIOCnB pin output level at the start/stop of counting depends on the register setting"]
8950        pub const _0: Self = Self::new(0);
8951
8952        #[doc = "The GTIOCnB pin output level is retained at the start/stop of counting"]
8953        pub const _1: Self = Self::new(1);
8954    }
8955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8956    pub struct Obe_SPEC;
8957    pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
8958    impl Obe {
8959        #[doc = "Output is disabled"]
8960        pub const _0: Self = Self::new(0);
8961
8962        #[doc = "Output is enabled"]
8963        pub const _1: Self = Self::new(1);
8964    }
8965    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8966    pub struct Obdf_SPEC;
8967    pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
8968    impl Obdf {
8969        #[doc = "None of the below options are specified"]
8970        pub const _00: Self = Self::new(0);
8971
8972        #[doc = "GTIOCnB pin is set to Hi-Z in response to controlling the output negation"]
8973        pub const _01: Self = Self::new(1);
8974
8975        #[doc = "GTIOCnB pin is set to 0 in response to controlling the output negation"]
8976        pub const _10: Self = Self::new(2);
8977
8978        #[doc = "GTIOCnB pin is set to 1 in response to controlling the output negation"]
8979        pub const _11: Self = Self::new(3);
8980    }
8981    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8982    pub struct Nfben_SPEC;
8983    pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
8984    impl Nfben {
8985        #[doc = "The noise filter for the GTIOCnB pin is disabled"]
8986        pub const _0: Self = Self::new(0);
8987
8988        #[doc = "The noise filter for the GTIOCnB pin is enabled"]
8989        pub const _1: Self = Self::new(1);
8990    }
8991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8992    pub struct Nfcsb_SPEC;
8993    pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
8994    impl Nfcsb {
8995        #[doc = "PCLKD/1"]
8996        pub const _00: Self = Self::new(0);
8997
8998        #[doc = "PCLKD/4"]
8999        pub const _01: Self = Self::new(1);
9000
9001        #[doc = "PCLKD/16"]
9002        pub const _10: Self = Self::new(2);
9003
9004        #[doc = "PCLKD/64"]
9005        pub const _11: Self = Self::new(3);
9006    }
9007}
9008#[doc(hidden)]
9009#[derive(Copy, Clone, Eq, PartialEq)]
9010pub struct Gtintad_SPEC;
9011impl crate::sealed::RegSpec for Gtintad_SPEC {
9012    type DataType = u32;
9013}
9014
9015#[doc = "General PWM Timer Interrupt Output Setting Register"]
9016pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
9017
9018impl Gtintad {
9019    #[doc = "Output Disable Source Select"]
9020    #[inline(always)]
9021    pub fn grp(
9022        self,
9023    ) -> crate::common::RegisterField<
9024        24,
9025        0x3,
9026        1,
9027        0,
9028        gtintad::Grp,
9029        gtintad::Grp,
9030        Gtintad_SPEC,
9031        crate::common::RW,
9032    > {
9033        crate::common::RegisterField::<
9034            24,
9035            0x3,
9036            1,
9037            0,
9038            gtintad::Grp,
9039            gtintad::Grp,
9040            Gtintad_SPEC,
9041            crate::common::RW,
9042        >::from_register(self, 0)
9043    }
9044
9045    #[doc = "Same Time Output Level High Disable Request Enable"]
9046    #[inline(always)]
9047    pub fn grpabh(
9048        self,
9049    ) -> crate::common::RegisterField<
9050        29,
9051        0x1,
9052        1,
9053        0,
9054        gtintad::Grpabh,
9055        gtintad::Grpabh,
9056        Gtintad_SPEC,
9057        crate::common::RW,
9058    > {
9059        crate::common::RegisterField::<
9060            29,
9061            0x1,
9062            1,
9063            0,
9064            gtintad::Grpabh,
9065            gtintad::Grpabh,
9066            Gtintad_SPEC,
9067            crate::common::RW,
9068        >::from_register(self, 0)
9069    }
9070
9071    #[doc = "Same Time Output Level Low Disable Request Enable"]
9072    #[inline(always)]
9073    pub fn grpabl(
9074        self,
9075    ) -> crate::common::RegisterField<
9076        30,
9077        0x1,
9078        1,
9079        0,
9080        gtintad::Grpabl,
9081        gtintad::Grpabl,
9082        Gtintad_SPEC,
9083        crate::common::RW,
9084    > {
9085        crate::common::RegisterField::<
9086            30,
9087            0x1,
9088            1,
9089            0,
9090            gtintad::Grpabl,
9091            gtintad::Grpabl,
9092            Gtintad_SPEC,
9093            crate::common::RW,
9094        >::from_register(self, 0)
9095    }
9096}
9097impl ::core::default::Default for Gtintad {
9098    #[inline(always)]
9099    fn default() -> Gtintad {
9100        <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
9101    }
9102}
9103pub mod gtintad {
9104
9105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9106    pub struct Grp_SPEC;
9107    pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
9108    impl Grp {
9109        #[doc = "Group A output disable request is selected"]
9110        pub const _00: Self = Self::new(0);
9111
9112        #[doc = "Group B output disable request is selected"]
9113        pub const _01: Self = Self::new(1);
9114
9115        #[doc = "Group C output disable request is selected"]
9116        pub const _10: Self = Self::new(2);
9117
9118        #[doc = "Group D output disable request is selected"]
9119        pub const _11: Self = Self::new(3);
9120    }
9121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9122    pub struct Grpabh_SPEC;
9123    pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
9124    impl Grpabh {
9125        #[doc = "Same time output level high disable request disabled"]
9126        pub const _0: Self = Self::new(0);
9127
9128        #[doc = "Same time output level high disable request enabled"]
9129        pub const _1: Self = Self::new(1);
9130    }
9131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9132    pub struct Grpabl_SPEC;
9133    pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
9134    impl Grpabl {
9135        #[doc = "Same time output level low disable request disabled"]
9136        pub const _0: Self = Self::new(0);
9137
9138        #[doc = "Same time output level low disable request enabled"]
9139        pub const _1: Self = Self::new(1);
9140    }
9141}
9142#[doc(hidden)]
9143#[derive(Copy, Clone, Eq, PartialEq)]
9144pub struct Gtst_SPEC;
9145impl crate::sealed::RegSpec for Gtst_SPEC {
9146    type DataType = u32;
9147}
9148
9149#[doc = "General PWM Timer Status Register"]
9150pub type Gtst = crate::RegValueT<Gtst_SPEC>;
9151
9152impl Gtst {
9153    #[doc = "Input Capture/Compare Match Flag A"]
9154    #[inline(always)]
9155    pub fn tcfa(
9156        self,
9157    ) -> crate::common::RegisterField<
9158        0,
9159        0x1,
9160        1,
9161        0,
9162        gtst::Tcfa,
9163        gtst::Tcfa,
9164        Gtst_SPEC,
9165        crate::common::RW,
9166    > {
9167        crate::common::RegisterField::<
9168            0,
9169            0x1,
9170            1,
9171            0,
9172            gtst::Tcfa,
9173            gtst::Tcfa,
9174            Gtst_SPEC,
9175            crate::common::RW,
9176        >::from_register(self, 0)
9177    }
9178
9179    #[doc = "Input Capture/Compare Match Flag B"]
9180    #[inline(always)]
9181    pub fn tcfb(
9182        self,
9183    ) -> crate::common::RegisterField<
9184        1,
9185        0x1,
9186        1,
9187        0,
9188        gtst::Tcfb,
9189        gtst::Tcfb,
9190        Gtst_SPEC,
9191        crate::common::RW,
9192    > {
9193        crate::common::RegisterField::<
9194            1,
9195            0x1,
9196            1,
9197            0,
9198            gtst::Tcfb,
9199            gtst::Tcfb,
9200            Gtst_SPEC,
9201            crate::common::RW,
9202        >::from_register(self, 0)
9203    }
9204
9205    #[doc = "Input Compare Match Flag C"]
9206    #[inline(always)]
9207    pub fn tcfc(
9208        self,
9209    ) -> crate::common::RegisterField<
9210        2,
9211        0x1,
9212        1,
9213        0,
9214        gtst::Tcfc,
9215        gtst::Tcfc,
9216        Gtst_SPEC,
9217        crate::common::RW,
9218    > {
9219        crate::common::RegisterField::<
9220            2,
9221            0x1,
9222            1,
9223            0,
9224            gtst::Tcfc,
9225            gtst::Tcfc,
9226            Gtst_SPEC,
9227            crate::common::RW,
9228        >::from_register(self, 0)
9229    }
9230
9231    #[doc = "Input Compare Match Flag D"]
9232    #[inline(always)]
9233    pub fn tcfd(
9234        self,
9235    ) -> crate::common::RegisterField<
9236        3,
9237        0x1,
9238        1,
9239        0,
9240        gtst::Tcfd,
9241        gtst::Tcfd,
9242        Gtst_SPEC,
9243        crate::common::RW,
9244    > {
9245        crate::common::RegisterField::<
9246            3,
9247            0x1,
9248            1,
9249            0,
9250            gtst::Tcfd,
9251            gtst::Tcfd,
9252            Gtst_SPEC,
9253            crate::common::RW,
9254        >::from_register(self, 0)
9255    }
9256
9257    #[doc = "Input Compare Match Flag E"]
9258    #[inline(always)]
9259    pub fn tcfe(
9260        self,
9261    ) -> crate::common::RegisterField<
9262        4,
9263        0x1,
9264        1,
9265        0,
9266        gtst::Tcfe,
9267        gtst::Tcfe,
9268        Gtst_SPEC,
9269        crate::common::RW,
9270    > {
9271        crate::common::RegisterField::<
9272            4,
9273            0x1,
9274            1,
9275            0,
9276            gtst::Tcfe,
9277            gtst::Tcfe,
9278            Gtst_SPEC,
9279            crate::common::RW,
9280        >::from_register(self, 0)
9281    }
9282
9283    #[doc = "Input Compare Match Flag F"]
9284    #[inline(always)]
9285    pub fn tcff(
9286        self,
9287    ) -> crate::common::RegisterField<
9288        5,
9289        0x1,
9290        1,
9291        0,
9292        gtst::Tcff,
9293        gtst::Tcff,
9294        Gtst_SPEC,
9295        crate::common::RW,
9296    > {
9297        crate::common::RegisterField::<
9298            5,
9299            0x1,
9300            1,
9301            0,
9302            gtst::Tcff,
9303            gtst::Tcff,
9304            Gtst_SPEC,
9305            crate::common::RW,
9306        >::from_register(self, 0)
9307    }
9308
9309    #[doc = "Overflow Flag"]
9310    #[inline(always)]
9311    pub fn tcfpo(
9312        self,
9313    ) -> crate::common::RegisterField<
9314        6,
9315        0x1,
9316        1,
9317        0,
9318        gtst::Tcfpo,
9319        gtst::Tcfpo,
9320        Gtst_SPEC,
9321        crate::common::RW,
9322    > {
9323        crate::common::RegisterField::<
9324            6,
9325            0x1,
9326            1,
9327            0,
9328            gtst::Tcfpo,
9329            gtst::Tcfpo,
9330            Gtst_SPEC,
9331            crate::common::RW,
9332        >::from_register(self, 0)
9333    }
9334
9335    #[doc = "Underflow Flag"]
9336    #[inline(always)]
9337    pub fn tcfpu(
9338        self,
9339    ) -> crate::common::RegisterField<
9340        7,
9341        0x1,
9342        1,
9343        0,
9344        gtst::Tcfpu,
9345        gtst::Tcfpu,
9346        Gtst_SPEC,
9347        crate::common::RW,
9348    > {
9349        crate::common::RegisterField::<
9350            7,
9351            0x1,
9352            1,
9353            0,
9354            gtst::Tcfpu,
9355            gtst::Tcfpu,
9356            Gtst_SPEC,
9357            crate::common::RW,
9358        >::from_register(self, 0)
9359    }
9360
9361    #[doc = "Count Direction Flag"]
9362    #[inline(always)]
9363    pub fn tucf(
9364        self,
9365    ) -> crate::common::RegisterField<
9366        15,
9367        0x1,
9368        1,
9369        0,
9370        gtst::Tucf,
9371        gtst::Tucf,
9372        Gtst_SPEC,
9373        crate::common::R,
9374    > {
9375        crate::common::RegisterField::<
9376            15,
9377            0x1,
9378            1,
9379            0,
9380            gtst::Tucf,
9381            gtst::Tucf,
9382            Gtst_SPEC,
9383            crate::common::R,
9384        >::from_register(self, 0)
9385    }
9386
9387    #[doc = "Output Disable Flag"]
9388    #[inline(always)]
9389    pub fn odf(
9390        self,
9391    ) -> crate::common::RegisterField<
9392        24,
9393        0x1,
9394        1,
9395        0,
9396        gtst::Odf,
9397        gtst::Odf,
9398        Gtst_SPEC,
9399        crate::common::R,
9400    > {
9401        crate::common::RegisterField::<
9402            24,
9403            0x1,
9404            1,
9405            0,
9406            gtst::Odf,
9407            gtst::Odf,
9408            Gtst_SPEC,
9409            crate::common::R,
9410        >::from_register(self, 0)
9411    }
9412
9413    #[doc = "Same Time Output Level High Flag"]
9414    #[inline(always)]
9415    pub fn oabhf(
9416        self,
9417    ) -> crate::common::RegisterField<
9418        29,
9419        0x1,
9420        1,
9421        0,
9422        gtst::Oabhf,
9423        gtst::Oabhf,
9424        Gtst_SPEC,
9425        crate::common::R,
9426    > {
9427        crate::common::RegisterField::<
9428            29,
9429            0x1,
9430            1,
9431            0,
9432            gtst::Oabhf,
9433            gtst::Oabhf,
9434            Gtst_SPEC,
9435            crate::common::R,
9436        >::from_register(self, 0)
9437    }
9438
9439    #[doc = "Same Time Output Level Low Flag"]
9440    #[inline(always)]
9441    pub fn oablf(
9442        self,
9443    ) -> crate::common::RegisterField<
9444        30,
9445        0x1,
9446        1,
9447        0,
9448        gtst::Oablf,
9449        gtst::Oablf,
9450        Gtst_SPEC,
9451        crate::common::R,
9452    > {
9453        crate::common::RegisterField::<
9454            30,
9455            0x1,
9456            1,
9457            0,
9458            gtst::Oablf,
9459            gtst::Oablf,
9460            Gtst_SPEC,
9461            crate::common::R,
9462        >::from_register(self, 0)
9463    }
9464
9465    #[doc = "Period Count Function Finish Flag"]
9466    #[inline(always)]
9467    pub fn pcf(
9468        self,
9469    ) -> crate::common::RegisterField<
9470        31,
9471        0x1,
9472        1,
9473        0,
9474        gtst::Pcf,
9475        gtst::Pcf,
9476        Gtst_SPEC,
9477        crate::common::RW,
9478    > {
9479        crate::common::RegisterField::<
9480            31,
9481            0x1,
9482            1,
9483            0,
9484            gtst::Pcf,
9485            gtst::Pcf,
9486            Gtst_SPEC,
9487            crate::common::RW,
9488        >::from_register(self, 0)
9489    }
9490}
9491impl ::core::default::Default for Gtst {
9492    #[inline(always)]
9493    fn default() -> Gtst {
9494        <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
9495    }
9496}
9497pub mod gtst {
9498
9499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9500    pub struct Tcfa_SPEC;
9501    pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
9502    impl Tcfa {
9503        #[doc = "No input capture/compare match of GTCCRA is generated"]
9504        pub const _0: Self = Self::new(0);
9505
9506        #[doc = "An input capture/compare match of GTCCRA is generated"]
9507        pub const _1: Self = Self::new(1);
9508    }
9509    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9510    pub struct Tcfb_SPEC;
9511    pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
9512    impl Tcfb {
9513        #[doc = "No input capture/compare match of GTCCRB is generated"]
9514        pub const _0: Self = Self::new(0);
9515
9516        #[doc = "An input capture/compare match of GTCCRB is generated"]
9517        pub const _1: Self = Self::new(1);
9518    }
9519    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9520    pub struct Tcfc_SPEC;
9521    pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
9522    impl Tcfc {
9523        #[doc = "No compare match of GTCCRC is generated"]
9524        pub const _0: Self = Self::new(0);
9525
9526        #[doc = "A compare match of GTCCRC is generated"]
9527        pub const _1: Self = Self::new(1);
9528    }
9529    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9530    pub struct Tcfd_SPEC;
9531    pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
9532    impl Tcfd {
9533        #[doc = "No compare match of GTCCRD is generated"]
9534        pub const _0: Self = Self::new(0);
9535
9536        #[doc = "A compare match of GTCCRD is generated"]
9537        pub const _1: Self = Self::new(1);
9538    }
9539    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9540    pub struct Tcfe_SPEC;
9541    pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
9542    impl Tcfe {
9543        #[doc = "No compare match of GTCCRE is generated"]
9544        pub const _0: Self = Self::new(0);
9545
9546        #[doc = "A compare match of GTCCRE is generated"]
9547        pub const _1: Self = Self::new(1);
9548    }
9549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9550    pub struct Tcff_SPEC;
9551    pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
9552    impl Tcff {
9553        #[doc = "No compare match of GTCCRF is generated"]
9554        pub const _0: Self = Self::new(0);
9555
9556        #[doc = "A compare match of GTCCRF is generated"]
9557        pub const _1: Self = Self::new(1);
9558    }
9559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9560    pub struct Tcfpo_SPEC;
9561    pub type Tcfpo = crate::EnumBitfieldStruct<u8, Tcfpo_SPEC>;
9562    impl Tcfpo {
9563        #[doc = "No overflow (crest) occurred"]
9564        pub const _0: Self = Self::new(0);
9565
9566        #[doc = "An overflow (crest) occurred"]
9567        pub const _1: Self = Self::new(1);
9568    }
9569    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9570    pub struct Tcfpu_SPEC;
9571    pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
9572    impl Tcfpu {
9573        #[doc = "No underflow (trough) occurred"]
9574        pub const _0: Self = Self::new(0);
9575
9576        #[doc = "An underflow (trough) occurred"]
9577        pub const _1: Self = Self::new(1);
9578    }
9579    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9580    pub struct Tucf_SPEC;
9581    pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
9582    impl Tucf {
9583        #[doc = "GTCNT counter counts downward"]
9584        pub const _0: Self = Self::new(0);
9585
9586        #[doc = "GTCNT counter counts upward"]
9587        pub const _1: Self = Self::new(1);
9588    }
9589    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9590    pub struct Odf_SPEC;
9591    pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
9592    impl Odf {
9593        #[doc = "No output disable request is generated"]
9594        pub const _0: Self = Self::new(0);
9595
9596        #[doc = "An output disable request is generated"]
9597        pub const _1: Self = Self::new(1);
9598    }
9599    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9600    pub struct Oabhf_SPEC;
9601    pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
9602    impl Oabhf {
9603        #[doc = "No simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred."]
9604        pub const _0: Self = Self::new(0);
9605
9606        #[doc = "A simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred."]
9607        pub const _1: Self = Self::new(1);
9608    }
9609    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9610    pub struct Oablf_SPEC;
9611    pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
9612    impl Oablf {
9613        #[doc = "No simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred."]
9614        pub const _0: Self = Self::new(0);
9615
9616        #[doc = "A simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred."]
9617        pub const _1: Self = Self::new(1);
9618    }
9619    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9620    pub struct Pcf_SPEC;
9621    pub type Pcf = crate::EnumBitfieldStruct<u8, Pcf_SPEC>;
9622    impl Pcf {
9623        #[doc = "No period count function finish has occurred"]
9624        pub const _0: Self = Self::new(0);
9625
9626        #[doc = "A period count function finish has occurred"]
9627        pub const _1: Self = Self::new(1);
9628    }
9629}
9630#[doc(hidden)]
9631#[derive(Copy, Clone, Eq, PartialEq)]
9632pub struct Gtber_SPEC;
9633impl crate::sealed::RegSpec for Gtber_SPEC {
9634    type DataType = u32;
9635}
9636
9637#[doc = "General PWM Timer Buffer Enable Register"]
9638pub type Gtber = crate::RegValueT<Gtber_SPEC>;
9639
9640impl Gtber {
9641    #[doc = "GTCCR Buffer Operation Disable"]
9642    #[inline(always)]
9643    pub fn bd0(
9644        self,
9645    ) -> crate::common::RegisterField<
9646        0,
9647        0x1,
9648        1,
9649        0,
9650        gtber::Bd0,
9651        gtber::Bd0,
9652        Gtber_SPEC,
9653        crate::common::RW,
9654    > {
9655        crate::common::RegisterField::<
9656            0,
9657            0x1,
9658            1,
9659            0,
9660            gtber::Bd0,
9661            gtber::Bd0,
9662            Gtber_SPEC,
9663            crate::common::RW,
9664        >::from_register(self, 0)
9665    }
9666
9667    #[doc = "GTPR Buffer Operation Disable"]
9668    #[inline(always)]
9669    pub fn bd1(
9670        self,
9671    ) -> crate::common::RegisterField<
9672        1,
9673        0x1,
9674        1,
9675        0,
9676        gtber::Bd1,
9677        gtber::Bd1,
9678        Gtber_SPEC,
9679        crate::common::RW,
9680    > {
9681        crate::common::RegisterField::<
9682            1,
9683            0x1,
9684            1,
9685            0,
9686            gtber::Bd1,
9687            gtber::Bd1,
9688            Gtber_SPEC,
9689            crate::common::RW,
9690        >::from_register(self, 0)
9691    }
9692
9693    #[doc = "GTCCRA Buffer Operation"]
9694    #[inline(always)]
9695    pub fn ccra(
9696        self,
9697    ) -> crate::common::RegisterField<
9698        16,
9699        0x3,
9700        1,
9701        0,
9702        gtber::Ccra,
9703        gtber::Ccra,
9704        Gtber_SPEC,
9705        crate::common::RW,
9706    > {
9707        crate::common::RegisterField::<
9708            16,
9709            0x3,
9710            1,
9711            0,
9712            gtber::Ccra,
9713            gtber::Ccra,
9714            Gtber_SPEC,
9715            crate::common::RW,
9716        >::from_register(self, 0)
9717    }
9718
9719    #[doc = "GTCCRB Buffer Operation"]
9720    #[inline(always)]
9721    pub fn ccrb(
9722        self,
9723    ) -> crate::common::RegisterField<
9724        18,
9725        0x3,
9726        1,
9727        0,
9728        gtber::Ccrb,
9729        gtber::Ccrb,
9730        Gtber_SPEC,
9731        crate::common::RW,
9732    > {
9733        crate::common::RegisterField::<
9734            18,
9735            0x3,
9736            1,
9737            0,
9738            gtber::Ccrb,
9739            gtber::Ccrb,
9740            Gtber_SPEC,
9741            crate::common::RW,
9742        >::from_register(self, 0)
9743    }
9744
9745    #[doc = "GTPR Buffer Operation"]
9746    #[inline(always)]
9747    pub fn pr(
9748        self,
9749    ) -> crate::common::RegisterField<
9750        20,
9751        0x3,
9752        1,
9753        0,
9754        gtber::Pr,
9755        gtber::Pr,
9756        Gtber_SPEC,
9757        crate::common::RW,
9758    > {
9759        crate::common::RegisterField::<
9760            20,
9761            0x3,
9762            1,
9763            0,
9764            gtber::Pr,
9765            gtber::Pr,
9766            Gtber_SPEC,
9767            crate::common::RW,
9768        >::from_register(self, 0)
9769    }
9770
9771    #[doc = "GTCCRA and GTCCRB Forcible Buffer Operation"]
9772    #[inline(always)]
9773    pub fn ccrswt(
9774        self,
9775    ) -> crate::common::RegisterFieldBool<22, 1, 0, Gtber_SPEC, crate::common::W> {
9776        crate::common::RegisterFieldBool::<22, 1, 0, Gtber_SPEC, crate::common::W>::from_register(
9777            self, 0,
9778        )
9779    }
9780}
9781impl ::core::default::Default for Gtber {
9782    #[inline(always)]
9783    fn default() -> Gtber {
9784        <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
9785    }
9786}
9787pub mod gtber {
9788
9789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9790    pub struct Bd0_SPEC;
9791    pub type Bd0 = crate::EnumBitfieldStruct<u8, Bd0_SPEC>;
9792    impl Bd0 {
9793        #[doc = "Buffer operation is enabled"]
9794        pub const _0: Self = Self::new(0);
9795
9796        #[doc = "Buffer operation is disabled"]
9797        pub const _1: Self = Self::new(1);
9798    }
9799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9800    pub struct Bd1_SPEC;
9801    pub type Bd1 = crate::EnumBitfieldStruct<u8, Bd1_SPEC>;
9802    impl Bd1 {
9803        #[doc = "Buffer operation is enabled"]
9804        pub const _0: Self = Self::new(0);
9805
9806        #[doc = "Buffer operation is disabled"]
9807        pub const _1: Self = Self::new(1);
9808    }
9809    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9810    pub struct Ccra_SPEC;
9811    pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
9812    impl Ccra {
9813        #[doc = "No buffer operation"]
9814        pub const _00: Self = Self::new(0);
9815
9816        #[doc = "Single buffer operation (GTCCRA <---->GTCCRC)"]
9817        pub const _01: Self = Self::new(1);
9818
9819        #[doc = "Double buffer operation (GTCCRA <----> GTCCRC <----> GTCCRD)"]
9820        pub const OTHERS: Self = Self::new(0);
9821    }
9822    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9823    pub struct Ccrb_SPEC;
9824    pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
9825    impl Ccrb {
9826        #[doc = "No buffer operation"]
9827        pub const _00: Self = Self::new(0);
9828
9829        #[doc = "Single buffer operation (GTCCRB <----> GTCCRE)"]
9830        pub const _01: Self = Self::new(1);
9831
9832        #[doc = "Double buffer operation (GTCCRB <----> GTCCRE <----> GTCCRF)"]
9833        pub const OTHERS: Self = Self::new(0);
9834    }
9835    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9836    pub struct Pr_SPEC;
9837    pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
9838    impl Pr {
9839        #[doc = "No buffer operation"]
9840        pub const _00: Self = Self::new(0);
9841
9842        #[doc = "Single buffer operation (GTPBR --> GTPR)"]
9843        pub const _01: Self = Self::new(1);
9844
9845        #[doc = "Setting prohibited"]
9846        pub const OTHERS: Self = Self::new(0);
9847    }
9848}
9849#[doc(hidden)]
9850#[derive(Copy, Clone, Eq, PartialEq)]
9851pub struct Gtcnt_SPEC;
9852impl crate::sealed::RegSpec for Gtcnt_SPEC {
9853    type DataType = u32;
9854}
9855
9856#[doc = "General PWM Timer Counter"]
9857pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
9858
9859impl NoBitfieldReg<Gtcnt_SPEC> for Gtcnt {}
9860impl ::core::default::Default for Gtcnt {
9861    #[inline(always)]
9862    fn default() -> Gtcnt {
9863        <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
9864    }
9865}
9866
9867#[doc(hidden)]
9868#[derive(Copy, Clone, Eq, PartialEq)]
9869pub struct Gtccra_SPEC;
9870impl crate::sealed::RegSpec for Gtccra_SPEC {
9871    type DataType = u32;
9872}
9873
9874#[doc = "General PWM Timer Compare Capture Register A"]
9875pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
9876
9877impl NoBitfieldReg<Gtccra_SPEC> for Gtccra {}
9878impl ::core::default::Default for Gtccra {
9879    #[inline(always)]
9880    fn default() -> Gtccra {
9881        <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(4294967295)
9882    }
9883}
9884
9885#[doc(hidden)]
9886#[derive(Copy, Clone, Eq, PartialEq)]
9887pub struct Gtccrb_SPEC;
9888impl crate::sealed::RegSpec for Gtccrb_SPEC {
9889    type DataType = u32;
9890}
9891
9892#[doc = "General PWM Timer Compare Capture Register B"]
9893pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
9894
9895impl NoBitfieldReg<Gtccrb_SPEC> for Gtccrb {}
9896impl ::core::default::Default for Gtccrb {
9897    #[inline(always)]
9898    fn default() -> Gtccrb {
9899        <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(4294967295)
9900    }
9901}
9902
9903#[doc(hidden)]
9904#[derive(Copy, Clone, Eq, PartialEq)]
9905pub struct Gtccrc_SPEC;
9906impl crate::sealed::RegSpec for Gtccrc_SPEC {
9907    type DataType = u32;
9908}
9909
9910#[doc = "General PWM Timer Compare Capture Register C"]
9911pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
9912
9913impl NoBitfieldReg<Gtccrc_SPEC> for Gtccrc {}
9914impl ::core::default::Default for Gtccrc {
9915    #[inline(always)]
9916    fn default() -> Gtccrc {
9917        <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(4294967295)
9918    }
9919}
9920
9921#[doc(hidden)]
9922#[derive(Copy, Clone, Eq, PartialEq)]
9923pub struct Gtccre_SPEC;
9924impl crate::sealed::RegSpec for Gtccre_SPEC {
9925    type DataType = u32;
9926}
9927
9928#[doc = "General PWM Timer Compare Capture Register E"]
9929pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
9930
9931impl NoBitfieldReg<Gtccre_SPEC> for Gtccre {}
9932impl ::core::default::Default for Gtccre {
9933    #[inline(always)]
9934    fn default() -> Gtccre {
9935        <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(4294967295)
9936    }
9937}
9938
9939#[doc(hidden)]
9940#[derive(Copy, Clone, Eq, PartialEq)]
9941pub struct Gtccrd_SPEC;
9942impl crate::sealed::RegSpec for Gtccrd_SPEC {
9943    type DataType = u32;
9944}
9945
9946#[doc = "General PWM Timer Compare Capture Register D"]
9947pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
9948
9949impl NoBitfieldReg<Gtccrd_SPEC> for Gtccrd {}
9950impl ::core::default::Default for Gtccrd {
9951    #[inline(always)]
9952    fn default() -> Gtccrd {
9953        <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(4294967295)
9954    }
9955}
9956
9957#[doc(hidden)]
9958#[derive(Copy, Clone, Eq, PartialEq)]
9959pub struct Gtccrf_SPEC;
9960impl crate::sealed::RegSpec for Gtccrf_SPEC {
9961    type DataType = u32;
9962}
9963
9964#[doc = "General PWM Timer Compare Capture Register F"]
9965pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
9966
9967impl NoBitfieldReg<Gtccrf_SPEC> for Gtccrf {}
9968impl ::core::default::Default for Gtccrf {
9969    #[inline(always)]
9970    fn default() -> Gtccrf {
9971        <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(4294967295)
9972    }
9973}
9974
9975#[doc(hidden)]
9976#[derive(Copy, Clone, Eq, PartialEq)]
9977pub struct Gtpr_SPEC;
9978impl crate::sealed::RegSpec for Gtpr_SPEC {
9979    type DataType = u32;
9980}
9981
9982#[doc = "General PWM Timer Cycle Setting Register"]
9983pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
9984
9985impl NoBitfieldReg<Gtpr_SPEC> for Gtpr {}
9986impl ::core::default::Default for Gtpr {
9987    #[inline(always)]
9988    fn default() -> Gtpr {
9989        <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(4294967295)
9990    }
9991}
9992
9993#[doc(hidden)]
9994#[derive(Copy, Clone, Eq, PartialEq)]
9995pub struct Gtpbr_SPEC;
9996impl crate::sealed::RegSpec for Gtpbr_SPEC {
9997    type DataType = u32;
9998}
9999
10000#[doc = "General PWM Timer Cycle Setting Buffer Register"]
10001pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
10002
10003impl NoBitfieldReg<Gtpbr_SPEC> for Gtpbr {}
10004impl ::core::default::Default for Gtpbr {
10005    #[inline(always)]
10006    fn default() -> Gtpbr {
10007        <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(4294967295)
10008    }
10009}
10010
10011#[doc(hidden)]
10012#[derive(Copy, Clone, Eq, PartialEq)]
10013pub struct Gtdtcr_SPEC;
10014impl crate::sealed::RegSpec for Gtdtcr_SPEC {
10015    type DataType = u32;
10016}
10017
10018#[doc = "General PWM Timer Dead Time Control Register"]
10019pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
10020
10021impl Gtdtcr {
10022    #[doc = "Negative-Phase Waveform Setting"]
10023    #[inline(always)]
10024    pub fn tde(
10025        self,
10026    ) -> crate::common::RegisterField<
10027        0,
10028        0x1,
10029        1,
10030        0,
10031        gtdtcr::Tde,
10032        gtdtcr::Tde,
10033        Gtdtcr_SPEC,
10034        crate::common::RW,
10035    > {
10036        crate::common::RegisterField::<
10037            0,
10038            0x1,
10039            1,
10040            0,
10041            gtdtcr::Tde,
10042            gtdtcr::Tde,
10043            Gtdtcr_SPEC,
10044            crate::common::RW,
10045        >::from_register(self, 0)
10046    }
10047}
10048impl ::core::default::Default for Gtdtcr {
10049    #[inline(always)]
10050    fn default() -> Gtdtcr {
10051        <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
10052    }
10053}
10054pub mod gtdtcr {
10055
10056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10057    pub struct Tde_SPEC;
10058    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
10059    impl Tde {
10060        #[doc = "GTCCRB is set without using GTDVU"]
10061        pub const _0: Self = Self::new(0);
10062
10063        #[doc = "GTDVU is used to set the compare match value for negative-phase waveform with dead time automatically in GTCCRB"]
10064        pub const _1: Self = Self::new(1);
10065    }
10066}
10067#[doc(hidden)]
10068#[derive(Copy, Clone, Eq, PartialEq)]
10069pub struct Gtdvu_SPEC;
10070impl crate::sealed::RegSpec for Gtdvu_SPEC {
10071    type DataType = u32;
10072}
10073
10074#[doc = "General PWM Timer Dead Time Value Register U"]
10075pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
10076
10077impl NoBitfieldReg<Gtdvu_SPEC> for Gtdvu {}
10078impl ::core::default::Default for Gtdvu {
10079    #[inline(always)]
10080    fn default() -> Gtdvu {
10081        <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(4294967295)
10082    }
10083}
10084
10085#[doc(hidden)]
10086#[derive(Copy, Clone, Eq, PartialEq)]
10087pub struct Gticlf_SPEC;
10088impl crate::sealed::RegSpec for Gticlf_SPEC {
10089    type DataType = u32;
10090}
10091
10092#[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
10093pub type Gticlf = crate::RegValueT<Gticlf_SPEC>;
10094
10095impl Gticlf {
10096    #[doc = "GTIOCnA Output Logical Operation Function Select"]
10097    #[inline(always)]
10098    pub fn iclfa(
10099        self,
10100    ) -> crate::common::RegisterField<
10101        0,
10102        0x7,
10103        1,
10104        0,
10105        gticlf::Iclfa,
10106        gticlf::Iclfa,
10107        Gticlf_SPEC,
10108        crate::common::RW,
10109    > {
10110        crate::common::RegisterField::<
10111            0,
10112            0x7,
10113            1,
10114            0,
10115            gticlf::Iclfa,
10116            gticlf::Iclfa,
10117            Gticlf_SPEC,
10118            crate::common::RW,
10119        >::from_register(self, 0)
10120    }
10121
10122    #[doc = "Inter Channel Signal C Select"]
10123    #[inline(always)]
10124    pub fn iclfselc(
10125        self,
10126    ) -> crate::common::RegisterField<
10127        4,
10128        0x3f,
10129        1,
10130        0,
10131        gticlf::Iclfselc,
10132        gticlf::Iclfselc,
10133        Gticlf_SPEC,
10134        crate::common::RW,
10135    > {
10136        crate::common::RegisterField::<
10137            4,
10138            0x3f,
10139            1,
10140            0,
10141            gticlf::Iclfselc,
10142            gticlf::Iclfselc,
10143            Gticlf_SPEC,
10144            crate::common::RW,
10145        >::from_register(self, 0)
10146    }
10147
10148    #[doc = "GTIOCnB Output Logical Operation Function Select"]
10149    #[inline(always)]
10150    pub fn iclfb(
10151        self,
10152    ) -> crate::common::RegisterField<
10153        16,
10154        0x7,
10155        1,
10156        0,
10157        gticlf::Iclfb,
10158        gticlf::Iclfb,
10159        Gticlf_SPEC,
10160        crate::common::RW,
10161    > {
10162        crate::common::RegisterField::<
10163            16,
10164            0x7,
10165            1,
10166            0,
10167            gticlf::Iclfb,
10168            gticlf::Iclfb,
10169            Gticlf_SPEC,
10170            crate::common::RW,
10171        >::from_register(self, 0)
10172    }
10173
10174    #[doc = "Inter Channel Signal D Select"]
10175    #[inline(always)]
10176    pub fn iclfseld(
10177        self,
10178    ) -> crate::common::RegisterField<
10179        20,
10180        0x3f,
10181        1,
10182        0,
10183        gticlf::Iclfseld,
10184        gticlf::Iclfseld,
10185        Gticlf_SPEC,
10186        crate::common::RW,
10187    > {
10188        crate::common::RegisterField::<
10189            20,
10190            0x3f,
10191            1,
10192            0,
10193            gticlf::Iclfseld,
10194            gticlf::Iclfseld,
10195            Gticlf_SPEC,
10196            crate::common::RW,
10197        >::from_register(self, 0)
10198    }
10199}
10200impl ::core::default::Default for Gticlf {
10201    #[inline(always)]
10202    fn default() -> Gticlf {
10203        <crate::RegValueT<Gticlf_SPEC> as RegisterValue<_>>::new(0)
10204    }
10205}
10206pub mod gticlf {
10207
10208    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10209    pub struct Iclfa_SPEC;
10210    pub type Iclfa = crate::EnumBitfieldStruct<u8, Iclfa_SPEC>;
10211    impl Iclfa {
10212        #[doc = "A (no delay)"]
10213        pub const _000: Self = Self::new(0);
10214
10215        #[doc = "NOT A (no delay)"]
10216        pub const _001: Self = Self::new(1);
10217
10218        #[doc = "C (1PCLKD delay)"]
10219        pub const _010: Self = Self::new(2);
10220
10221        #[doc = "NOT C (1PCLKD delay)"]
10222        pub const _011: Self = Self::new(3);
10223
10224        #[doc = "A AND C (1PCLKD delay)"]
10225        pub const _100: Self = Self::new(4);
10226
10227        #[doc = "A OR C (1PCLKD delay)"]
10228        pub const _101: Self = Self::new(5);
10229
10230        #[doc = "A EXOR C (1PCLKD delay)"]
10231        pub const _110: Self = Self::new(6);
10232
10233        #[doc = "A NOR C (1PCLKD delay)"]
10234        pub const _111: Self = Self::new(7);
10235    }
10236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10237    pub struct Iclfselc_SPEC;
10238    pub type Iclfselc = crate::EnumBitfieldStruct<u8, Iclfselc_SPEC>;
10239    impl Iclfselc {
10240        #[doc = "GTIOC0A"]
10241        pub const _0_X_00: Self = Self::new(0);
10242
10243        #[doc = "GTIOC0B"]
10244        pub const _0_X_01: Self = Self::new(1);
10245
10246        #[doc = "GTIOC1A"]
10247        pub const _0_X_02: Self = Self::new(2);
10248
10249        #[doc = "GTIOC1B"]
10250        pub const _0_X_03: Self = Self::new(3);
10251
10252        #[doc = "GTIOC2A"]
10253        pub const _0_X_04: Self = Self::new(4);
10254
10255        #[doc = "GTIOC2B"]
10256        pub const _0_X_05: Self = Self::new(5);
10257
10258        #[doc = "GTIOC3A"]
10259        pub const _0_X_06: Self = Self::new(6);
10260
10261        #[doc = "GTIOC3B"]
10262        pub const _0_X_07: Self = Self::new(7);
10263
10264        #[doc = "GTIOC4A"]
10265        pub const _0_X_08: Self = Self::new(8);
10266
10267        #[doc = "GTIOC4B"]
10268        pub const _0_X_09: Self = Self::new(9);
10269
10270        #[doc = "GTIOC5A"]
10271        pub const _0_X_0_A: Self = Self::new(10);
10272
10273        #[doc = "GTIOC5B"]
10274        pub const _0_X_0_B: Self = Self::new(11);
10275
10276        #[doc = "GTIOC6A"]
10277        pub const _0_X_0_C: Self = Self::new(12);
10278
10279        #[doc = "GTIOC6B"]
10280        pub const _0_X_0_D: Self = Self::new(13);
10281
10282        #[doc = "GTIOC7A"]
10283        pub const _0_X_0_E: Self = Self::new(14);
10284
10285        #[doc = "GTIOC7B"]
10286        pub const _0_X_0_F: Self = Self::new(15);
10287
10288        #[doc = "GTIOC8A"]
10289        pub const _0_X_10: Self = Self::new(16);
10290
10291        #[doc = "GTIOC8B"]
10292        pub const _0_X_11: Self = Self::new(17);
10293
10294        #[doc = "GTIOC9A"]
10295        pub const _0_X_12: Self = Self::new(18);
10296
10297        #[doc = "GTIOC9B"]
10298        pub const _0_X_13: Self = Self::new(19);
10299
10300        #[doc = "Setting prohibited"]
10301        pub const OTHERS: Self = Self::new(0);
10302    }
10303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10304    pub struct Iclfb_SPEC;
10305    pub type Iclfb = crate::EnumBitfieldStruct<u8, Iclfb_SPEC>;
10306    impl Iclfb {
10307        #[doc = "B (no delay)"]
10308        pub const _000: Self = Self::new(0);
10309
10310        #[doc = "NOT B (no delay)"]
10311        pub const _001: Self = Self::new(1);
10312
10313        #[doc = "D (1PCLKD delay)"]
10314        pub const _010: Self = Self::new(2);
10315
10316        #[doc = "NOT D (1PCLKD delay)"]
10317        pub const _011: Self = Self::new(3);
10318
10319        #[doc = "B AND D (1PCLKD delay)"]
10320        pub const _100: Self = Self::new(4);
10321
10322        #[doc = "B OR D (1PCLKDn delay)"]
10323        pub const _101: Self = Self::new(5);
10324
10325        #[doc = "B EXOR D (1PCLKD delay)"]
10326        pub const _110: Self = Self::new(6);
10327
10328        #[doc = "B NOR D (1PCLKD delay)"]
10329        pub const _111: Self = Self::new(7);
10330    }
10331    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10332    pub struct Iclfseld_SPEC;
10333    pub type Iclfseld = crate::EnumBitfieldStruct<u8, Iclfseld_SPEC>;
10334    impl Iclfseld {
10335        #[doc = "GTIOC0A"]
10336        pub const _0_X_00: Self = Self::new(0);
10337
10338        #[doc = "GTIOC0B"]
10339        pub const _0_X_01: Self = Self::new(1);
10340
10341        #[doc = "GTIOC1A"]
10342        pub const _0_X_02: Self = Self::new(2);
10343
10344        #[doc = "GTIOC1B"]
10345        pub const _0_X_03: Self = Self::new(3);
10346
10347        #[doc = "GTIOC2A"]
10348        pub const _0_X_04: Self = Self::new(4);
10349
10350        #[doc = "GTIOC2B"]
10351        pub const _0_X_05: Self = Self::new(5);
10352
10353        #[doc = "GTIOC3A"]
10354        pub const _0_X_06: Self = Self::new(6);
10355
10356        #[doc = "GTIOC3B"]
10357        pub const _0_X_07: Self = Self::new(7);
10358
10359        #[doc = "GTIOC4A"]
10360        pub const _0_X_08: Self = Self::new(8);
10361
10362        #[doc = "GTIOC4B"]
10363        pub const _0_X_09: Self = Self::new(9);
10364
10365        #[doc = "GTIOC5A"]
10366        pub const _0_X_0_A: Self = Self::new(10);
10367
10368        #[doc = "GTIOC5B"]
10369        pub const _0_X_0_B: Self = Self::new(11);
10370
10371        #[doc = "GTIOC6A"]
10372        pub const _0_X_0_C: Self = Self::new(12);
10373
10374        #[doc = "GTIOC6B"]
10375        pub const _0_X_0_D: Self = Self::new(13);
10376
10377        #[doc = "GTIOC7A"]
10378        pub const _0_X_0_E: Self = Self::new(14);
10379
10380        #[doc = "GTIOC7B"]
10381        pub const _0_X_0_F: Self = Self::new(15);
10382
10383        #[doc = "GTIOC8A"]
10384        pub const _0_X_10: Self = Self::new(16);
10385
10386        #[doc = "GTIOC8B"]
10387        pub const _0_X_11: Self = Self::new(17);
10388
10389        #[doc = "GTIOC9A"]
10390        pub const _0_X_12: Self = Self::new(18);
10391
10392        #[doc = "GTIOC9B"]
10393        pub const _0_X_13: Self = Self::new(19);
10394
10395        #[doc = "Setting prohibited"]
10396        pub const OTHERS: Self = Self::new(0);
10397    }
10398}
10399#[doc(hidden)]
10400#[derive(Copy, Clone, Eq, PartialEq)]
10401pub struct Gtpc_SPEC;
10402impl crate::sealed::RegSpec for Gtpc_SPEC {
10403    type DataType = u32;
10404}
10405
10406#[doc = "General PWM Timer Period Count Register"]
10407pub type Gtpc = crate::RegValueT<Gtpc_SPEC>;
10408
10409impl Gtpc {
10410    #[doc = "Period Count Function Enable"]
10411    #[inline(always)]
10412    pub fn pcen(
10413        self,
10414    ) -> crate::common::RegisterField<
10415        0,
10416        0x1,
10417        1,
10418        0,
10419        gtpc::Pcen,
10420        gtpc::Pcen,
10421        Gtpc_SPEC,
10422        crate::common::RW,
10423    > {
10424        crate::common::RegisterField::<
10425            0,
10426            0x1,
10427            1,
10428            0,
10429            gtpc::Pcen,
10430            gtpc::Pcen,
10431            Gtpc_SPEC,
10432            crate::common::RW,
10433        >::from_register(self, 0)
10434    }
10435
10436    #[doc = "Automatic Stop Function Enable"]
10437    #[inline(always)]
10438    pub fn astp(
10439        self,
10440    ) -> crate::common::RegisterField<
10441        8,
10442        0x1,
10443        1,
10444        0,
10445        gtpc::Astp,
10446        gtpc::Astp,
10447        Gtpc_SPEC,
10448        crate::common::RW,
10449    > {
10450        crate::common::RegisterField::<
10451            8,
10452            0x1,
10453            1,
10454            0,
10455            gtpc::Astp,
10456            gtpc::Astp,
10457            Gtpc_SPEC,
10458            crate::common::RW,
10459        >::from_register(self, 0)
10460    }
10461
10462    #[doc = "Period Counter"]
10463    #[inline(always)]
10464    pub fn pcnt(
10465        self,
10466    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Gtpc_SPEC, crate::common::RW> {
10467        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Gtpc_SPEC,crate::common::RW>::from_register(self,0)
10468    }
10469}
10470impl ::core::default::Default for Gtpc {
10471    #[inline(always)]
10472    fn default() -> Gtpc {
10473        <crate::RegValueT<Gtpc_SPEC> as RegisterValue<_>>::new(0)
10474    }
10475}
10476pub mod gtpc {
10477
10478    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10479    pub struct Pcen_SPEC;
10480    pub type Pcen = crate::EnumBitfieldStruct<u8, Pcen_SPEC>;
10481    impl Pcen {
10482        #[doc = "Period count function is disabled"]
10483        pub const _0: Self = Self::new(0);
10484
10485        #[doc = "Period count function is enabled"]
10486        pub const _1: Self = Self::new(1);
10487    }
10488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10489    pub struct Astp_SPEC;
10490    pub type Astp = crate::EnumBitfieldStruct<u8, Astp_SPEC>;
10491    impl Astp {
10492        #[doc = "Automatic stop function is disabled"]
10493        pub const _0: Self = Self::new(0);
10494
10495        #[doc = "Automatic stop function is enabled"]
10496        pub const _1: Self = Self::new(1);
10497    }
10498}
10499#[doc(hidden)]
10500#[derive(Copy, Clone, Eq, PartialEq)]
10501pub struct Gtsecsr_SPEC;
10502impl crate::sealed::RegSpec for Gtsecsr_SPEC {
10503    type DataType = u32;
10504}
10505
10506#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
10507pub type Gtsecsr = crate::RegValueT<Gtsecsr_SPEC>;
10508
10509impl Gtsecsr {
10510    #[doc = "Channel 0 Operation Enable Bit Simultaneous Control Channel Select"]
10511    #[inline(always)]
10512    pub fn secsel0(
10513        self,
10514    ) -> crate::common::RegisterField<
10515        0,
10516        0x1,
10517        1,
10518        0,
10519        gtsecsr::Secsel0,
10520        gtsecsr::Secsel0,
10521        Gtsecsr_SPEC,
10522        crate::common::RW,
10523    > {
10524        crate::common::RegisterField::<
10525            0,
10526            0x1,
10527            1,
10528            0,
10529            gtsecsr::Secsel0,
10530            gtsecsr::Secsel0,
10531            Gtsecsr_SPEC,
10532            crate::common::RW,
10533        >::from_register(self, 0)
10534    }
10535
10536    #[doc = "Channel 1 Operation Enable Bit Simultaneous Control Channel Select"]
10537    #[inline(always)]
10538    pub fn secsel1(
10539        self,
10540    ) -> crate::common::RegisterField<
10541        1,
10542        0x1,
10543        1,
10544        0,
10545        gtsecsr::Secsel1,
10546        gtsecsr::Secsel1,
10547        Gtsecsr_SPEC,
10548        crate::common::RW,
10549    > {
10550        crate::common::RegisterField::<
10551            1,
10552            0x1,
10553            1,
10554            0,
10555            gtsecsr::Secsel1,
10556            gtsecsr::Secsel1,
10557            Gtsecsr_SPEC,
10558            crate::common::RW,
10559        >::from_register(self, 0)
10560    }
10561
10562    #[doc = "Channel 2 Operation Enable Bit Simultaneous Control Channel Select"]
10563    #[inline(always)]
10564    pub fn secsel2(
10565        self,
10566    ) -> crate::common::RegisterField<
10567        2,
10568        0x1,
10569        1,
10570        0,
10571        gtsecsr::Secsel2,
10572        gtsecsr::Secsel2,
10573        Gtsecsr_SPEC,
10574        crate::common::RW,
10575    > {
10576        crate::common::RegisterField::<
10577            2,
10578            0x1,
10579            1,
10580            0,
10581            gtsecsr::Secsel2,
10582            gtsecsr::Secsel2,
10583            Gtsecsr_SPEC,
10584            crate::common::RW,
10585        >::from_register(self, 0)
10586    }
10587
10588    #[doc = "Channel 3 Operation Enable Bit Simultaneous Control Channel Select"]
10589    #[inline(always)]
10590    pub fn secsel3(
10591        self,
10592    ) -> crate::common::RegisterField<
10593        3,
10594        0x1,
10595        1,
10596        0,
10597        gtsecsr::Secsel3,
10598        gtsecsr::Secsel3,
10599        Gtsecsr_SPEC,
10600        crate::common::RW,
10601    > {
10602        crate::common::RegisterField::<
10603            3,
10604            0x1,
10605            1,
10606            0,
10607            gtsecsr::Secsel3,
10608            gtsecsr::Secsel3,
10609            Gtsecsr_SPEC,
10610            crate::common::RW,
10611        >::from_register(self, 0)
10612    }
10613
10614    #[doc = "Channel 4 Operation Enable Bit Simultaneous Control Channel Select"]
10615    #[inline(always)]
10616    pub fn secsel4(
10617        self,
10618    ) -> crate::common::RegisterField<
10619        4,
10620        0x1,
10621        1,
10622        0,
10623        gtsecsr::Secsel4,
10624        gtsecsr::Secsel4,
10625        Gtsecsr_SPEC,
10626        crate::common::RW,
10627    > {
10628        crate::common::RegisterField::<
10629            4,
10630            0x1,
10631            1,
10632            0,
10633            gtsecsr::Secsel4,
10634            gtsecsr::Secsel4,
10635            Gtsecsr_SPEC,
10636            crate::common::RW,
10637        >::from_register(self, 0)
10638    }
10639
10640    #[doc = "Channel 5 Operation Enable Bit Simultaneous Control Channel Select"]
10641    #[inline(always)]
10642    pub fn secsel5(
10643        self,
10644    ) -> crate::common::RegisterField<
10645        5,
10646        0x1,
10647        1,
10648        0,
10649        gtsecsr::Secsel5,
10650        gtsecsr::Secsel5,
10651        Gtsecsr_SPEC,
10652        crate::common::RW,
10653    > {
10654        crate::common::RegisterField::<
10655            5,
10656            0x1,
10657            1,
10658            0,
10659            gtsecsr::Secsel5,
10660            gtsecsr::Secsel5,
10661            Gtsecsr_SPEC,
10662            crate::common::RW,
10663        >::from_register(self, 0)
10664    }
10665
10666    #[doc = "Channel 6 Operation Enable Bit Simultaneous Control Channel Select"]
10667    #[inline(always)]
10668    pub fn secsel6(
10669        self,
10670    ) -> crate::common::RegisterField<
10671        6,
10672        0x1,
10673        1,
10674        0,
10675        gtsecsr::Secsel6,
10676        gtsecsr::Secsel6,
10677        Gtsecsr_SPEC,
10678        crate::common::RW,
10679    > {
10680        crate::common::RegisterField::<
10681            6,
10682            0x1,
10683            1,
10684            0,
10685            gtsecsr::Secsel6,
10686            gtsecsr::Secsel6,
10687            Gtsecsr_SPEC,
10688            crate::common::RW,
10689        >::from_register(self, 0)
10690    }
10691
10692    #[doc = "Channel 7 Operation Enable Bit Simultaneous Control Channel Select"]
10693    #[inline(always)]
10694    pub fn secsel7(
10695        self,
10696    ) -> crate::common::RegisterField<
10697        7,
10698        0x1,
10699        1,
10700        0,
10701        gtsecsr::Secsel7,
10702        gtsecsr::Secsel7,
10703        Gtsecsr_SPEC,
10704        crate::common::RW,
10705    > {
10706        crate::common::RegisterField::<
10707            7,
10708            0x1,
10709            1,
10710            0,
10711            gtsecsr::Secsel7,
10712            gtsecsr::Secsel7,
10713            Gtsecsr_SPEC,
10714            crate::common::RW,
10715        >::from_register(self, 0)
10716    }
10717
10718    #[doc = "Channel 8 Operation Enable Bit Simultaneous Control Channel Select"]
10719    #[inline(always)]
10720    pub fn secsel8(
10721        self,
10722    ) -> crate::common::RegisterField<
10723        8,
10724        0x1,
10725        1,
10726        0,
10727        gtsecsr::Secsel8,
10728        gtsecsr::Secsel8,
10729        Gtsecsr_SPEC,
10730        crate::common::RW,
10731    > {
10732        crate::common::RegisterField::<
10733            8,
10734            0x1,
10735            1,
10736            0,
10737            gtsecsr::Secsel8,
10738            gtsecsr::Secsel8,
10739            Gtsecsr_SPEC,
10740            crate::common::RW,
10741        >::from_register(self, 0)
10742    }
10743
10744    #[doc = "Channel 9 Operation Enable Bit Simultaneous Control Channel Select"]
10745    #[inline(always)]
10746    pub fn secsel9(
10747        self,
10748    ) -> crate::common::RegisterField<
10749        9,
10750        0x1,
10751        1,
10752        0,
10753        gtsecsr::Secsel9,
10754        gtsecsr::Secsel9,
10755        Gtsecsr_SPEC,
10756        crate::common::RW,
10757    > {
10758        crate::common::RegisterField::<
10759            9,
10760            0x1,
10761            1,
10762            0,
10763            gtsecsr::Secsel9,
10764            gtsecsr::Secsel9,
10765            Gtsecsr_SPEC,
10766            crate::common::RW,
10767        >::from_register(self, 0)
10768    }
10769}
10770impl ::core::default::Default for Gtsecsr {
10771    #[inline(always)]
10772    fn default() -> Gtsecsr {
10773        <crate::RegValueT<Gtsecsr_SPEC> as RegisterValue<_>>::new(0)
10774    }
10775}
10776pub mod gtsecsr {
10777
10778    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10779    pub struct Secsel0_SPEC;
10780    pub type Secsel0 = crate::EnumBitfieldStruct<u8, Secsel0_SPEC>;
10781    impl Secsel0 {
10782        #[doc = "Disable simultaneous control"]
10783        pub const _0: Self = Self::new(0);
10784
10785        #[doc = "Enable simultaneous control"]
10786        pub const _1: Self = Self::new(1);
10787    }
10788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10789    pub struct Secsel1_SPEC;
10790    pub type Secsel1 = crate::EnumBitfieldStruct<u8, Secsel1_SPEC>;
10791    impl Secsel1 {
10792        #[doc = "Disable simultaneous control"]
10793        pub const _0: Self = Self::new(0);
10794
10795        #[doc = "Enable simultaneous control"]
10796        pub const _1: Self = Self::new(1);
10797    }
10798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10799    pub struct Secsel2_SPEC;
10800    pub type Secsel2 = crate::EnumBitfieldStruct<u8, Secsel2_SPEC>;
10801    impl Secsel2 {
10802        #[doc = "Disable simultaneous control"]
10803        pub const _0: Self = Self::new(0);
10804
10805        #[doc = "Enable simultaneous control"]
10806        pub const _1: Self = Self::new(1);
10807    }
10808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10809    pub struct Secsel3_SPEC;
10810    pub type Secsel3 = crate::EnumBitfieldStruct<u8, Secsel3_SPEC>;
10811    impl Secsel3 {
10812        #[doc = "Disable simultaneous control"]
10813        pub const _0: Self = Self::new(0);
10814
10815        #[doc = "Enable simultaneous control"]
10816        pub const _1: Self = Self::new(1);
10817    }
10818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10819    pub struct Secsel4_SPEC;
10820    pub type Secsel4 = crate::EnumBitfieldStruct<u8, Secsel4_SPEC>;
10821    impl Secsel4 {
10822        #[doc = "Disable simultaneous control"]
10823        pub const _0: Self = Self::new(0);
10824
10825        #[doc = "Enable simultaneous control"]
10826        pub const _1: Self = Self::new(1);
10827    }
10828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10829    pub struct Secsel5_SPEC;
10830    pub type Secsel5 = crate::EnumBitfieldStruct<u8, Secsel5_SPEC>;
10831    impl Secsel5 {
10832        #[doc = "Disable simultaneous control"]
10833        pub const _0: Self = Self::new(0);
10834
10835        #[doc = "Enable simultaneous control"]
10836        pub const _1: Self = Self::new(1);
10837    }
10838    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10839    pub struct Secsel6_SPEC;
10840    pub type Secsel6 = crate::EnumBitfieldStruct<u8, Secsel6_SPEC>;
10841    impl Secsel6 {
10842        #[doc = "Disable simultaneous control"]
10843        pub const _0: Self = Self::new(0);
10844
10845        #[doc = "Enable simultaneous control"]
10846        pub const _1: Self = Self::new(1);
10847    }
10848    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10849    pub struct Secsel7_SPEC;
10850    pub type Secsel7 = crate::EnumBitfieldStruct<u8, Secsel7_SPEC>;
10851    impl Secsel7 {
10852        #[doc = "Disable simultaneous control"]
10853        pub const _0: Self = Self::new(0);
10854
10855        #[doc = "Enable simultaneous control"]
10856        pub const _1: Self = Self::new(1);
10857    }
10858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10859    pub struct Secsel8_SPEC;
10860    pub type Secsel8 = crate::EnumBitfieldStruct<u8, Secsel8_SPEC>;
10861    impl Secsel8 {
10862        #[doc = "Disable simultaneous control"]
10863        pub const _0: Self = Self::new(0);
10864
10865        #[doc = "Enable simultaneous control"]
10866        pub const _1: Self = Self::new(1);
10867    }
10868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10869    pub struct Secsel9_SPEC;
10870    pub type Secsel9 = crate::EnumBitfieldStruct<u8, Secsel9_SPEC>;
10871    impl Secsel9 {
10872        #[doc = "Disable simultaneous control"]
10873        pub const _0: Self = Self::new(0);
10874
10875        #[doc = "Enable simultaneous control"]
10876        pub const _1: Self = Self::new(1);
10877    }
10878}
10879#[doc(hidden)]
10880#[derive(Copy, Clone, Eq, PartialEq)]
10881pub struct Gtsecr_SPEC;
10882impl crate::sealed::RegSpec for Gtsecr_SPEC {
10883    type DataType = u32;
10884}
10885
10886#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
10887pub type Gtsecr = crate::RegValueT<Gtsecr_SPEC>;
10888
10889impl Gtsecr {
10890    #[doc = "GTCCR Register Buffer Operation Simultaneous Enable"]
10891    #[inline(always)]
10892    pub fn sbdce(
10893        self,
10894    ) -> crate::common::RegisterField<
10895        0,
10896        0x1,
10897        1,
10898        0,
10899        gtsecr::Sbdce,
10900        gtsecr::Sbdce,
10901        Gtsecr_SPEC,
10902        crate::common::RW,
10903    > {
10904        crate::common::RegisterField::<
10905            0,
10906            0x1,
10907            1,
10908            0,
10909            gtsecr::Sbdce,
10910            gtsecr::Sbdce,
10911            Gtsecr_SPEC,
10912            crate::common::RW,
10913        >::from_register(self, 0)
10914    }
10915
10916    #[doc = "GTPR Register Buffer Operation Simultaneous Enable"]
10917    #[inline(always)]
10918    pub fn sbdpe(
10919        self,
10920    ) -> crate::common::RegisterField<
10921        1,
10922        0x1,
10923        1,
10924        0,
10925        gtsecr::Sbdpe,
10926        gtsecr::Sbdpe,
10927        Gtsecr_SPEC,
10928        crate::common::RW,
10929    > {
10930        crate::common::RegisterField::<
10931            1,
10932            0x1,
10933            1,
10934            0,
10935            gtsecr::Sbdpe,
10936            gtsecr::Sbdpe,
10937            Gtsecr_SPEC,
10938            crate::common::RW,
10939        >::from_register(self, 0)
10940    }
10941
10942    #[doc = "GTCCR Register Buffer Operation Simultaneous Disable"]
10943    #[inline(always)]
10944    pub fn sbdcd(
10945        self,
10946    ) -> crate::common::RegisterField<
10947        8,
10948        0x1,
10949        1,
10950        0,
10951        gtsecr::Sbdcd,
10952        gtsecr::Sbdcd,
10953        Gtsecr_SPEC,
10954        crate::common::RW,
10955    > {
10956        crate::common::RegisterField::<
10957            8,
10958            0x1,
10959            1,
10960            0,
10961            gtsecr::Sbdcd,
10962            gtsecr::Sbdcd,
10963            Gtsecr_SPEC,
10964            crate::common::RW,
10965        >::from_register(self, 0)
10966    }
10967
10968    #[doc = "GTPR Register Buffer Operation Simultaneous Disable"]
10969    #[inline(always)]
10970    pub fn sbdpd(
10971        self,
10972    ) -> crate::common::RegisterField<
10973        9,
10974        0x1,
10975        1,
10976        0,
10977        gtsecr::Sbdpd,
10978        gtsecr::Sbdpd,
10979        Gtsecr_SPEC,
10980        crate::common::RW,
10981    > {
10982        crate::common::RegisterField::<
10983            9,
10984            0x1,
10985            1,
10986            0,
10987            gtsecr::Sbdpd,
10988            gtsecr::Sbdpd,
10989            Gtsecr_SPEC,
10990            crate::common::RW,
10991        >::from_register(self, 0)
10992    }
10993
10994    #[doc = "Period Count Function Simultaneous Enable"]
10995    #[inline(always)]
10996    pub fn spce(
10997        self,
10998    ) -> crate::common::RegisterField<
10999        16,
11000        0x1,
11001        1,
11002        0,
11003        gtsecr::Spce,
11004        gtsecr::Spce,
11005        Gtsecr_SPEC,
11006        crate::common::RW,
11007    > {
11008        crate::common::RegisterField::<
11009            16,
11010            0x1,
11011            1,
11012            0,
11013            gtsecr::Spce,
11014            gtsecr::Spce,
11015            Gtsecr_SPEC,
11016            crate::common::RW,
11017        >::from_register(self, 0)
11018    }
11019
11020    #[doc = "Period Count Function Simultaneous Disable"]
11021    #[inline(always)]
11022    pub fn spcd(
11023        self,
11024    ) -> crate::common::RegisterField<
11025        24,
11026        0x1,
11027        1,
11028        0,
11029        gtsecr::Spcd,
11030        gtsecr::Spcd,
11031        Gtsecr_SPEC,
11032        crate::common::RW,
11033    > {
11034        crate::common::RegisterField::<
11035            24,
11036            0x1,
11037            1,
11038            0,
11039            gtsecr::Spcd,
11040            gtsecr::Spcd,
11041            Gtsecr_SPEC,
11042            crate::common::RW,
11043        >::from_register(self, 0)
11044    }
11045}
11046impl ::core::default::Default for Gtsecr {
11047    #[inline(always)]
11048    fn default() -> Gtsecr {
11049        <crate::RegValueT<Gtsecr_SPEC> as RegisterValue<_>>::new(0)
11050    }
11051}
11052pub mod gtsecr {
11053
11054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11055    pub struct Sbdce_SPEC;
11056    pub type Sbdce = crate::EnumBitfieldStruct<u8, Sbdce_SPEC>;
11057    impl Sbdce {
11058        #[doc = "Disable simultaneous enabling GTCCR buffer operations"]
11059        pub const _0: Self = Self::new(0);
11060
11061        #[doc = "Enable GTCCR register buffer operations simultaneously"]
11062        pub const _1: Self = Self::new(1);
11063    }
11064    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11065    pub struct Sbdpe_SPEC;
11066    pub type Sbdpe = crate::EnumBitfieldStruct<u8, Sbdpe_SPEC>;
11067    impl Sbdpe {
11068        #[doc = "Disable simultaneous enabling GTPR buffer operations"]
11069        pub const _0: Self = Self::new(0);
11070
11071        #[doc = "Enable GTPR register buffer operations simultaneously"]
11072        pub const _1: Self = Self::new(1);
11073    }
11074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11075    pub struct Sbdcd_SPEC;
11076    pub type Sbdcd = crate::EnumBitfieldStruct<u8, Sbdcd_SPEC>;
11077    impl Sbdcd {
11078        #[doc = "Disable simultaneous disabling GTCCR buffer operations"]
11079        pub const _0: Self = Self::new(0);
11080
11081        #[doc = "Disable GTCCR register buffer operations simultaneously"]
11082        pub const _1: Self = Self::new(1);
11083    }
11084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11085    pub struct Sbdpd_SPEC;
11086    pub type Sbdpd = crate::EnumBitfieldStruct<u8, Sbdpd_SPEC>;
11087    impl Sbdpd {
11088        #[doc = "Disable simultaneous disabling GTPR buffer operations"]
11089        pub const _0: Self = Self::new(0);
11090
11091        #[doc = "Disable GTPR register buffer operations simultaneously"]
11092        pub const _1: Self = Self::new(1);
11093    }
11094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11095    pub struct Spce_SPEC;
11096    pub type Spce = crate::EnumBitfieldStruct<u8, Spce_SPEC>;
11097    impl Spce {
11098        #[doc = "Disable simultaneous enabling period count function"]
11099        pub const _0: Self = Self::new(0);
11100
11101        #[doc = "Enable period count function simultaneously"]
11102        pub const _1: Self = Self::new(1);
11103    }
11104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11105    pub struct Spcd_SPEC;
11106    pub type Spcd = crate::EnumBitfieldStruct<u8, Spcd_SPEC>;
11107    impl Spcd {
11108        #[doc = "Disable simultaneous disabling period count function"]
11109        pub const _0: Self = Self::new(0);
11110
11111        #[doc = "Disable period count function simultaneously"]
11112        pub const _1: Self = Self::new(1);
11113    }
11114}