ra6e1_pac/
edmac0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:50:30 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"DMA Controller for the Ethernet Controller Channel 0"]
28unsafe impl ::core::marker::Send for super::Edmac0 {}
29unsafe impl ::core::marker::Sync for super::Edmac0 {}
30impl super::Edmac0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "EDMAC Mode Register"]
38    #[inline(always)]
39    pub const fn edmr(&self) -> &'static crate::common::Reg<self::Edmr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Edmr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "EDMAC Transmit Request Register"]
48    #[inline(always)]
49    pub const fn edtrr(&self) -> &'static crate::common::Reg<self::Edtrr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Edtrr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(8usize),
53            )
54        }
55    }
56
57    #[doc = "EDMAC Receive Request Register"]
58    #[inline(always)]
59    pub const fn edrrr(&self) -> &'static crate::common::Reg<self::Edrrr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Edrrr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(16usize),
63            )
64        }
65    }
66
67    #[doc = "Transmit Descriptor List Start Address Register"]
68    #[inline(always)]
69    pub const fn tdlar(&self) -> &'static crate::common::Reg<self::Tdlar_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Tdlar_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(24usize),
73            )
74        }
75    }
76
77    #[doc = "Receive Descriptor List Start Address Register"]
78    #[inline(always)]
79    pub const fn rdlar(&self) -> &'static crate::common::Reg<self::Rdlar_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Rdlar_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(32usize),
83            )
84        }
85    }
86
87    #[doc = "ETHERC/EDMAC Status Register"]
88    #[inline(always)]
89    pub const fn eesr(&self) -> &'static crate::common::Reg<self::Eesr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Eesr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(40usize),
93            )
94        }
95    }
96
97    #[doc = "ETHERC/EDMAC Status Interrupt Enable Register"]
98    #[inline(always)]
99    pub const fn eesipr(
100        &self,
101    ) -> &'static crate::common::Reg<self::Eesipr_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Eesipr_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(48usize),
105            )
106        }
107    }
108
109    #[doc = "ETHERC/EDMAC Transmit/Receive Status Copy Enable Register"]
110    #[inline(always)]
111    pub const fn trscer(
112        &self,
113    ) -> &'static crate::common::Reg<self::Trscer_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Trscer_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(56usize),
117            )
118        }
119    }
120
121    #[doc = "Missed-Frame Counter Register"]
122    #[inline(always)]
123    pub const fn rmfcr(&self) -> &'static crate::common::Reg<self::Rmfcr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Rmfcr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(64usize),
127            )
128        }
129    }
130
131    #[doc = "Transmit FIFO Threshold Register"]
132    #[inline(always)]
133    pub const fn tftr(&self) -> &'static crate::common::Reg<self::Tftr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Tftr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(72usize),
137            )
138        }
139    }
140
141    #[doc = "FIFO Depth Register"]
142    #[inline(always)]
143    pub const fn fdr(&self) -> &'static crate::common::Reg<self::Fdr_SPEC, crate::common::RW> {
144        unsafe {
145            crate::common::Reg::<self::Fdr_SPEC, crate::common::RW>::from_ptr(
146                self._svd2pac_as_ptr().add(80usize),
147            )
148        }
149    }
150
151    #[doc = "Receive Method Control Register"]
152    #[inline(always)]
153    pub const fn rmcr(&self) -> &'static crate::common::Reg<self::Rmcr_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Rmcr_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(88usize),
157            )
158        }
159    }
160
161    #[doc = "Transmit FIFO Underflow Counter"]
162    #[inline(always)]
163    pub const fn tfucr(&self) -> &'static crate::common::Reg<self::Tfucr_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::Tfucr_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(100usize),
167            )
168        }
169    }
170
171    #[doc = "Receive FIFO Overflow Counter"]
172    #[inline(always)]
173    pub const fn rfocr(&self) -> &'static crate::common::Reg<self::Rfocr_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Rfocr_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(104usize),
177            )
178        }
179    }
180
181    #[doc = "Independent Output Signal Setting Register"]
182    #[inline(always)]
183    pub const fn iosr(&self) -> &'static crate::common::Reg<self::Iosr_SPEC, crate::common::RW> {
184        unsafe {
185            crate::common::Reg::<self::Iosr_SPEC, crate::common::RW>::from_ptr(
186                self._svd2pac_as_ptr().add(108usize),
187            )
188        }
189    }
190
191    #[doc = "Flow Control Start FIFO Threshold Setting Register"]
192    #[inline(always)]
193    pub const fn fcftr(&self) -> &'static crate::common::Reg<self::Fcftr_SPEC, crate::common::RW> {
194        unsafe {
195            crate::common::Reg::<self::Fcftr_SPEC, crate::common::RW>::from_ptr(
196                self._svd2pac_as_ptr().add(112usize),
197            )
198        }
199    }
200
201    #[doc = "Receive Data Padding Insert Register"]
202    #[inline(always)]
203    pub const fn rpadir(
204        &self,
205    ) -> &'static crate::common::Reg<self::Rpadir_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Rpadir_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(120usize),
209            )
210        }
211    }
212
213    #[doc = "Transmit Interrupt Setting Register"]
214    #[inline(always)]
215    pub const fn trimd(&self) -> &'static crate::common::Reg<self::Trimd_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Trimd_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(124usize),
219            )
220        }
221    }
222
223    #[doc = "Receive Buffer Write Address Register"]
224    #[inline(always)]
225    pub const fn rbwar(&self) -> &'static crate::common::Reg<self::Rbwar_SPEC, crate::common::R> {
226        unsafe {
227            crate::common::Reg::<self::Rbwar_SPEC, crate::common::R>::from_ptr(
228                self._svd2pac_as_ptr().add(200usize),
229            )
230        }
231    }
232
233    #[doc = "Receive Descriptor Fetch Address Register"]
234    #[inline(always)]
235    pub const fn rdfar(&self) -> &'static crate::common::Reg<self::Rdfar_SPEC, crate::common::R> {
236        unsafe {
237            crate::common::Reg::<self::Rdfar_SPEC, crate::common::R>::from_ptr(
238                self._svd2pac_as_ptr().add(204usize),
239            )
240        }
241    }
242
243    #[doc = "Transmit Buffer Read Address Register"]
244    #[inline(always)]
245    pub const fn tbrar(&self) -> &'static crate::common::Reg<self::Tbrar_SPEC, crate::common::R> {
246        unsafe {
247            crate::common::Reg::<self::Tbrar_SPEC, crate::common::R>::from_ptr(
248                self._svd2pac_as_ptr().add(212usize),
249            )
250        }
251    }
252
253    #[doc = "Transmit Descriptor Fetch Address Register"]
254    #[inline(always)]
255    pub const fn tdfar(&self) -> &'static crate::common::Reg<self::Tdfar_SPEC, crate::common::R> {
256        unsafe {
257            crate::common::Reg::<self::Tdfar_SPEC, crate::common::R>::from_ptr(
258                self._svd2pac_as_ptr().add(216usize),
259            )
260        }
261    }
262}
263#[doc(hidden)]
264#[derive(Copy, Clone, Eq, PartialEq)]
265pub struct Edmr_SPEC;
266impl crate::sealed::RegSpec for Edmr_SPEC {
267    type DataType = u32;
268}
269
270#[doc = "EDMAC Mode Register"]
271pub type Edmr = crate::RegValueT<Edmr_SPEC>;
272
273impl Edmr {
274    #[doc = "Software Reset"]
275    #[inline(always)]
276    pub fn swr(self) -> crate::common::RegisterFieldBool<0, 1, 0, Edmr_SPEC, crate::common::RW> {
277        crate::common::RegisterFieldBool::<0, 1, 0, Edmr_SPEC, crate::common::RW>::from_register(
278            self, 0,
279        )
280    }
281
282    #[doc = "Transmit/Receive Descriptor Length"]
283    #[inline(always)]
284    pub fn dl(
285        self,
286    ) -> crate::common::RegisterField<4, 0x3, 1, 0, edmr::Dl, edmr::Dl, Edmr_SPEC, crate::common::RW>
287    {
288        crate::common::RegisterField::<4,0x3,1,0,edmr::Dl,edmr::Dl,Edmr_SPEC,crate::common::RW>::from_register(self,0)
289    }
290
291    #[doc = "Big Endian Mode/Little Endian Mode"]
292    #[inline(always)]
293    pub fn de(
294        self,
295    ) -> crate::common::RegisterField<6, 0x1, 1, 0, edmr::De, edmr::De, Edmr_SPEC, crate::common::RW>
296    {
297        crate::common::RegisterField::<6,0x1,1,0,edmr::De,edmr::De,Edmr_SPEC,crate::common::RW>::from_register(self,0)
298    }
299}
300impl ::core::default::Default for Edmr {
301    #[inline(always)]
302    fn default() -> Edmr {
303        <crate::RegValueT<Edmr_SPEC> as RegisterValue<_>>::new(0)
304    }
305}
306pub mod edmr {
307
308    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
309    pub struct Dl_SPEC;
310    pub type Dl = crate::EnumBitfieldStruct<u8, Dl_SPEC>;
311    impl Dl {
312        #[doc = "16 bytes"]
313        pub const _00: Self = Self::new(0);
314
315        #[doc = "32 bytes"]
316        pub const _01: Self = Self::new(1);
317
318        #[doc = "64 bytes"]
319        pub const _10: Self = Self::new(2);
320
321        #[doc = "16 bytes."]
322        pub const _11: Self = Self::new(3);
323    }
324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
325    pub struct De_SPEC;
326    pub type De = crate::EnumBitfieldStruct<u8, De_SPEC>;
327    impl De {
328        #[doc = "Big endian mode"]
329        pub const _0: Self = Self::new(0);
330
331        #[doc = "Little endian mode."]
332        pub const _1: Self = Self::new(1);
333    }
334}
335#[doc(hidden)]
336#[derive(Copy, Clone, Eq, PartialEq)]
337pub struct Edtrr_SPEC;
338impl crate::sealed::RegSpec for Edtrr_SPEC {
339    type DataType = u32;
340}
341
342#[doc = "EDMAC Transmit Request Register"]
343pub type Edtrr = crate::RegValueT<Edtrr_SPEC>;
344
345impl Edtrr {
346    #[doc = "Transmit Request"]
347    #[inline(always)]
348    pub fn tr(self) -> crate::common::RegisterFieldBool<0, 1, 0, Edtrr_SPEC, crate::common::RW> {
349        crate::common::RegisterFieldBool::<0, 1, 0, Edtrr_SPEC, crate::common::RW>::from_register(
350            self, 0,
351        )
352    }
353}
354impl ::core::default::Default for Edtrr {
355    #[inline(always)]
356    fn default() -> Edtrr {
357        <crate::RegValueT<Edtrr_SPEC> as RegisterValue<_>>::new(0)
358    }
359}
360
361#[doc(hidden)]
362#[derive(Copy, Clone, Eq, PartialEq)]
363pub struct Edrrr_SPEC;
364impl crate::sealed::RegSpec for Edrrr_SPEC {
365    type DataType = u32;
366}
367
368#[doc = "EDMAC Receive Request Register"]
369pub type Edrrr = crate::RegValueT<Edrrr_SPEC>;
370
371impl Edrrr {
372    #[doc = "Receive Request"]
373    #[inline(always)]
374    pub fn rr(
375        self,
376    ) -> crate::common::RegisterField<
377        0,
378        0x1,
379        1,
380        0,
381        edrrr::Rr,
382        edrrr::Rr,
383        Edrrr_SPEC,
384        crate::common::RW,
385    > {
386        crate::common::RegisterField::<
387            0,
388            0x1,
389            1,
390            0,
391            edrrr::Rr,
392            edrrr::Rr,
393            Edrrr_SPEC,
394            crate::common::RW,
395        >::from_register(self, 0)
396    }
397}
398impl ::core::default::Default for Edrrr {
399    #[inline(always)]
400    fn default() -> Edrrr {
401        <crate::RegValueT<Edrrr_SPEC> as RegisterValue<_>>::new(0)
402    }
403}
404pub mod edrrr {
405
406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
407    pub struct Rr_SPEC;
408    pub type Rr = crate::EnumBitfieldStruct<u8, Rr_SPEC>;
409    impl Rr {
410        #[doc = "Disable the receive function"]
411        pub const _0: Self = Self::new(0);
412
413        #[doc = "Read receive descriptor and enable the receive function."]
414        pub const _1: Self = Self::new(1);
415    }
416}
417#[doc(hidden)]
418#[derive(Copy, Clone, Eq, PartialEq)]
419pub struct Tdlar_SPEC;
420impl crate::sealed::RegSpec for Tdlar_SPEC {
421    type DataType = u32;
422}
423
424#[doc = "Transmit Descriptor List Start Address Register"]
425pub type Tdlar = crate::RegValueT<Tdlar_SPEC>;
426
427impl NoBitfieldReg<Tdlar_SPEC> for Tdlar {}
428impl ::core::default::Default for Tdlar {
429    #[inline(always)]
430    fn default() -> Tdlar {
431        <crate::RegValueT<Tdlar_SPEC> as RegisterValue<_>>::new(0)
432    }
433}
434
435#[doc(hidden)]
436#[derive(Copy, Clone, Eq, PartialEq)]
437pub struct Rdlar_SPEC;
438impl crate::sealed::RegSpec for Rdlar_SPEC {
439    type DataType = u32;
440}
441
442#[doc = "Receive Descriptor List Start Address Register"]
443pub type Rdlar = crate::RegValueT<Rdlar_SPEC>;
444
445impl NoBitfieldReg<Rdlar_SPEC> for Rdlar {}
446impl ::core::default::Default for Rdlar {
447    #[inline(always)]
448    fn default() -> Rdlar {
449        <crate::RegValueT<Rdlar_SPEC> as RegisterValue<_>>::new(0)
450    }
451}
452
453#[doc(hidden)]
454#[derive(Copy, Clone, Eq, PartialEq)]
455pub struct Eesr_SPEC;
456impl crate::sealed::RegSpec for Eesr_SPEC {
457    type DataType = u32;
458}
459
460#[doc = "ETHERC/EDMAC Status Register"]
461pub type Eesr = crate::RegValueT<Eesr_SPEC>;
462
463impl Eesr {
464    #[doc = "CRC Error Flag"]
465    #[inline(always)]
466    pub fn cerf(
467        self,
468    ) -> crate::common::RegisterField<
469        0,
470        0x1,
471        1,
472        0,
473        eesr::Cerf,
474        eesr::Cerf,
475        Eesr_SPEC,
476        crate::common::RW,
477    > {
478        crate::common::RegisterField::<
479            0,
480            0x1,
481            1,
482            0,
483            eesr::Cerf,
484            eesr::Cerf,
485            Eesr_SPEC,
486            crate::common::RW,
487        >::from_register(self, 0)
488    }
489
490    #[doc = "PHY-LSI Receive Error Flag"]
491    #[inline(always)]
492    pub fn pre(
493        self,
494    ) -> crate::common::RegisterField<
495        1,
496        0x1,
497        1,
498        0,
499        eesr::Pre,
500        eesr::Pre,
501        Eesr_SPEC,
502        crate::common::RW,
503    > {
504        crate::common::RegisterField::<
505            1,
506            0x1,
507            1,
508            0,
509            eesr::Pre,
510            eesr::Pre,
511            Eesr_SPEC,
512            crate::common::RW,
513        >::from_register(self, 0)
514    }
515
516    #[doc = "Frame-Too-Short Error Flag"]
517    #[inline(always)]
518    pub fn rtsf(
519        self,
520    ) -> crate::common::RegisterField<
521        2,
522        0x1,
523        1,
524        0,
525        eesr::Rtsf,
526        eesr::Rtsf,
527        Eesr_SPEC,
528        crate::common::RW,
529    > {
530        crate::common::RegisterField::<
531            2,
532            0x1,
533            1,
534            0,
535            eesr::Rtsf,
536            eesr::Rtsf,
537            Eesr_SPEC,
538            crate::common::RW,
539        >::from_register(self, 0)
540    }
541
542    #[doc = "Frame-Too-Long Error Flag"]
543    #[inline(always)]
544    pub fn rtlf(
545        self,
546    ) -> crate::common::RegisterField<
547        3,
548        0x1,
549        1,
550        0,
551        eesr::Rtlf,
552        eesr::Rtlf,
553        Eesr_SPEC,
554        crate::common::RW,
555    > {
556        crate::common::RegisterField::<
557            3,
558            0x1,
559            1,
560            0,
561            eesr::Rtlf,
562            eesr::Rtlf,
563            Eesr_SPEC,
564            crate::common::RW,
565        >::from_register(self, 0)
566    }
567
568    #[doc = "Alignment Error Flag"]
569    #[inline(always)]
570    pub fn rrf(
571        self,
572    ) -> crate::common::RegisterField<
573        4,
574        0x1,
575        1,
576        0,
577        eesr::Rrf,
578        eesr::Rrf,
579        Eesr_SPEC,
580        crate::common::RW,
581    > {
582        crate::common::RegisterField::<
583            4,
584            0x1,
585            1,
586            0,
587            eesr::Rrf,
588            eesr::Rrf,
589            Eesr_SPEC,
590            crate::common::RW,
591        >::from_register(self, 0)
592    }
593
594    #[doc = "Multicast Address Frame Receive Flag"]
595    #[inline(always)]
596    pub fn rmaf(
597        self,
598    ) -> crate::common::RegisterField<
599        7,
600        0x1,
601        1,
602        0,
603        eesr::Rmaf,
604        eesr::Rmaf,
605        Eesr_SPEC,
606        crate::common::RW,
607    > {
608        crate::common::RegisterField::<
609            7,
610            0x1,
611            1,
612            0,
613            eesr::Rmaf,
614            eesr::Rmaf,
615            Eesr_SPEC,
616            crate::common::RW,
617        >::from_register(self, 0)
618    }
619
620    #[doc = "Transmit Retry Over Flag"]
621    #[inline(always)]
622    pub fn tro(
623        self,
624    ) -> crate::common::RegisterField<
625        8,
626        0x1,
627        1,
628        0,
629        eesr::Tro,
630        eesr::Tro,
631        Eesr_SPEC,
632        crate::common::RW,
633    > {
634        crate::common::RegisterField::<
635            8,
636            0x1,
637            1,
638            0,
639            eesr::Tro,
640            eesr::Tro,
641            Eesr_SPEC,
642            crate::common::RW,
643        >::from_register(self, 0)
644    }
645
646    #[doc = "Late Collision Detect Flag"]
647    #[inline(always)]
648    pub fn cd(
649        self,
650    ) -> crate::common::RegisterField<9, 0x1, 1, 0, eesr::Cd, eesr::Cd, Eesr_SPEC, crate::common::RW>
651    {
652        crate::common::RegisterField::<9,0x1,1,0,eesr::Cd,eesr::Cd,Eesr_SPEC,crate::common::RW>::from_register(self,0)
653    }
654
655    #[doc = "Loss of Carrier Detect Flag"]
656    #[inline(always)]
657    pub fn dlc(
658        self,
659    ) -> crate::common::RegisterField<
660        10,
661        0x1,
662        1,
663        0,
664        eesr::Dlc,
665        eesr::Dlc,
666        Eesr_SPEC,
667        crate::common::RW,
668    > {
669        crate::common::RegisterField::<
670            10,
671            0x1,
672            1,
673            0,
674            eesr::Dlc,
675            eesr::Dlc,
676            Eesr_SPEC,
677            crate::common::RW,
678        >::from_register(self, 0)
679    }
680
681    #[doc = "Carrier Not Detect Flag"]
682    #[inline(always)]
683    pub fn cnd(
684        self,
685    ) -> crate::common::RegisterField<
686        11,
687        0x1,
688        1,
689        0,
690        eesr::Cnd,
691        eesr::Cnd,
692        Eesr_SPEC,
693        crate::common::RW,
694    > {
695        crate::common::RegisterField::<
696            11,
697            0x1,
698            1,
699            0,
700            eesr::Cnd,
701            eesr::Cnd,
702            Eesr_SPEC,
703            crate::common::RW,
704        >::from_register(self, 0)
705    }
706
707    #[doc = "Receive FIFO Overflow Flag"]
708    #[inline(always)]
709    pub fn rfof(
710        self,
711    ) -> crate::common::RegisterField<
712        16,
713        0x1,
714        1,
715        0,
716        eesr::Rfof,
717        eesr::Rfof,
718        Eesr_SPEC,
719        crate::common::RW,
720    > {
721        crate::common::RegisterField::<
722            16,
723            0x1,
724            1,
725            0,
726            eesr::Rfof,
727            eesr::Rfof,
728            Eesr_SPEC,
729            crate::common::RW,
730        >::from_register(self, 0)
731    }
732
733    #[doc = "Receive Descriptor Empty Flag"]
734    #[inline(always)]
735    pub fn rde(
736        self,
737    ) -> crate::common::RegisterField<
738        17,
739        0x1,
740        1,
741        0,
742        eesr::Rde,
743        eesr::Rde,
744        Eesr_SPEC,
745        crate::common::RW,
746    > {
747        crate::common::RegisterField::<
748            17,
749            0x1,
750            1,
751            0,
752            eesr::Rde,
753            eesr::Rde,
754            Eesr_SPEC,
755            crate::common::RW,
756        >::from_register(self, 0)
757    }
758
759    #[doc = "Frame Receive Flag"]
760    #[inline(always)]
761    pub fn fr(
762        self,
763    ) -> crate::common::RegisterField<18, 0x1, 1, 0, eesr::Fr, eesr::Fr, Eesr_SPEC, crate::common::RW>
764    {
765        crate::common::RegisterField::<
766            18,
767            0x1,
768            1,
769            0,
770            eesr::Fr,
771            eesr::Fr,
772            Eesr_SPEC,
773            crate::common::RW,
774        >::from_register(self, 0)
775    }
776
777    #[doc = "Transmit FIFO Underflow Flag"]
778    #[inline(always)]
779    pub fn tfuf(
780        self,
781    ) -> crate::common::RegisterField<
782        19,
783        0x1,
784        1,
785        0,
786        eesr::Tfuf,
787        eesr::Tfuf,
788        Eesr_SPEC,
789        crate::common::RW,
790    > {
791        crate::common::RegisterField::<
792            19,
793            0x1,
794            1,
795            0,
796            eesr::Tfuf,
797            eesr::Tfuf,
798            Eesr_SPEC,
799            crate::common::RW,
800        >::from_register(self, 0)
801    }
802
803    #[doc = "Transmit Descriptor Empty Flag"]
804    #[inline(always)]
805    pub fn tde(
806        self,
807    ) -> crate::common::RegisterField<
808        20,
809        0x1,
810        1,
811        0,
812        eesr::Tde,
813        eesr::Tde,
814        Eesr_SPEC,
815        crate::common::RW,
816    > {
817        crate::common::RegisterField::<
818            20,
819            0x1,
820            1,
821            0,
822            eesr::Tde,
823            eesr::Tde,
824            Eesr_SPEC,
825            crate::common::RW,
826        >::from_register(self, 0)
827    }
828
829    #[doc = "Frame Transfer Complete Flag"]
830    #[inline(always)]
831    pub fn tc(
832        self,
833    ) -> crate::common::RegisterField<21, 0x1, 1, 0, eesr::Tc, eesr::Tc, Eesr_SPEC, crate::common::RW>
834    {
835        crate::common::RegisterField::<
836            21,
837            0x1,
838            1,
839            0,
840            eesr::Tc,
841            eesr::Tc,
842            Eesr_SPEC,
843            crate::common::RW,
844        >::from_register(self, 0)
845    }
846
847    #[doc = "ETHERC Status Register Source Flag"]
848    #[inline(always)]
849    pub fn eci(
850        self,
851    ) -> crate::common::RegisterField<
852        22,
853        0x1,
854        1,
855        0,
856        eesr::Eci,
857        eesr::Eci,
858        Eesr_SPEC,
859        crate::common::R,
860    > {
861        crate::common::RegisterField::<
862            22,
863            0x1,
864            1,
865            0,
866            eesr::Eci,
867            eesr::Eci,
868            Eesr_SPEC,
869            crate::common::R,
870        >::from_register(self, 0)
871    }
872
873    #[doc = "Address Error Flag"]
874    #[inline(always)]
875    pub fn ade(
876        self,
877    ) -> crate::common::RegisterField<
878        23,
879        0x1,
880        1,
881        0,
882        eesr::Ade,
883        eesr::Ade,
884        Eesr_SPEC,
885        crate::common::RW,
886    > {
887        crate::common::RegisterField::<
888            23,
889            0x1,
890            1,
891            0,
892            eesr::Ade,
893            eesr::Ade,
894            Eesr_SPEC,
895            crate::common::RW,
896        >::from_register(self, 0)
897    }
898
899    #[doc = "Receive Frame Counter Overflow Flag"]
900    #[inline(always)]
901    pub fn rfcof(
902        self,
903    ) -> crate::common::RegisterField<
904        24,
905        0x1,
906        1,
907        0,
908        eesr::Rfcof,
909        eesr::Rfcof,
910        Eesr_SPEC,
911        crate::common::RW,
912    > {
913        crate::common::RegisterField::<
914            24,
915            0x1,
916            1,
917            0,
918            eesr::Rfcof,
919            eesr::Rfcof,
920            Eesr_SPEC,
921            crate::common::RW,
922        >::from_register(self, 0)
923    }
924
925    #[doc = "Receive Abort Detect Flag"]
926    #[inline(always)]
927    pub fn rabt(
928        self,
929    ) -> crate::common::RegisterField<
930        25,
931        0x1,
932        1,
933        0,
934        eesr::Rabt,
935        eesr::Rabt,
936        Eesr_SPEC,
937        crate::common::RW,
938    > {
939        crate::common::RegisterField::<
940            25,
941            0x1,
942            1,
943            0,
944            eesr::Rabt,
945            eesr::Rabt,
946            Eesr_SPEC,
947            crate::common::RW,
948        >::from_register(self, 0)
949    }
950
951    #[doc = "Transmit Abort Detect Flag"]
952    #[inline(always)]
953    pub fn tabt(
954        self,
955    ) -> crate::common::RegisterField<
956        26,
957        0x1,
958        1,
959        0,
960        eesr::Tabt,
961        eesr::Tabt,
962        Eesr_SPEC,
963        crate::common::RW,
964    > {
965        crate::common::RegisterField::<
966            26,
967            0x1,
968            1,
969            0,
970            eesr::Tabt,
971            eesr::Tabt,
972            Eesr_SPEC,
973            crate::common::RW,
974        >::from_register(self, 0)
975    }
976
977    #[doc = "Write-Back Complete Flag"]
978    #[inline(always)]
979    pub fn twb(
980        self,
981    ) -> crate::common::RegisterField<
982        30,
983        0x1,
984        1,
985        0,
986        eesr::Twb,
987        eesr::Twb,
988        Eesr_SPEC,
989        crate::common::RW,
990    > {
991        crate::common::RegisterField::<
992            30,
993            0x1,
994            1,
995            0,
996            eesr::Twb,
997            eesr::Twb,
998            Eesr_SPEC,
999            crate::common::RW,
1000        >::from_register(self, 0)
1001    }
1002}
1003impl ::core::default::Default for Eesr {
1004    #[inline(always)]
1005    fn default() -> Eesr {
1006        <crate::RegValueT<Eesr_SPEC> as RegisterValue<_>>::new(0)
1007    }
1008}
1009pub mod eesr {
1010
1011    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1012    pub struct Cerf_SPEC;
1013    pub type Cerf = crate::EnumBitfieldStruct<u8, Cerf_SPEC>;
1014    impl Cerf {
1015        #[doc = "CRC error not detected"]
1016        pub const _0: Self = Self::new(0);
1017
1018        #[doc = "CRC error detected."]
1019        pub const _1: Self = Self::new(1);
1020    }
1021    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1022    pub struct Pre_SPEC;
1023    pub type Pre = crate::EnumBitfieldStruct<u8, Pre_SPEC>;
1024    impl Pre {
1025        #[doc = "PHY-LSI receive error not detected"]
1026        pub const _0: Self = Self::new(0);
1027
1028        #[doc = "PHY-LSI receive error detected."]
1029        pub const _1: Self = Self::new(1);
1030    }
1031    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1032    pub struct Rtsf_SPEC;
1033    pub type Rtsf = crate::EnumBitfieldStruct<u8, Rtsf_SPEC>;
1034    impl Rtsf {
1035        #[doc = "Frame-too-short error not detected"]
1036        pub const _0: Self = Self::new(0);
1037
1038        #[doc = "Frame-too-short error detected."]
1039        pub const _1: Self = Self::new(1);
1040    }
1041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1042    pub struct Rtlf_SPEC;
1043    pub type Rtlf = crate::EnumBitfieldStruct<u8, Rtlf_SPEC>;
1044    impl Rtlf {
1045        #[doc = "Frame-too-long error not detected"]
1046        pub const _0: Self = Self::new(0);
1047
1048        #[doc = "Frame-too-long error detected."]
1049        pub const _1: Self = Self::new(1);
1050    }
1051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1052    pub struct Rrf_SPEC;
1053    pub type Rrf = crate::EnumBitfieldStruct<u8, Rrf_SPEC>;
1054    impl Rrf {
1055        #[doc = "Alignment error not detected"]
1056        pub const _0: Self = Self::new(0);
1057
1058        #[doc = "Alignment error detected."]
1059        pub const _1: Self = Self::new(1);
1060    }
1061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1062    pub struct Rmaf_SPEC;
1063    pub type Rmaf = crate::EnumBitfieldStruct<u8, Rmaf_SPEC>;
1064    impl Rmaf {
1065        #[doc = "Multicast address frame not received"]
1066        pub const _0: Self = Self::new(0);
1067
1068        #[doc = "Multicast address frame received."]
1069        pub const _1: Self = Self::new(1);
1070    }
1071    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1072    pub struct Tro_SPEC;
1073    pub type Tro = crate::EnumBitfieldStruct<u8, Tro_SPEC>;
1074    impl Tro {
1075        #[doc = "Transmit retry-over condition not detected"]
1076        pub const _0: Self = Self::new(0);
1077
1078        #[doc = "Transmit retry-over condition detected."]
1079        pub const _1: Self = Self::new(1);
1080    }
1081    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1082    pub struct Cd_SPEC;
1083    pub type Cd = crate::EnumBitfieldStruct<u8, Cd_SPEC>;
1084    impl Cd {
1085        #[doc = "Late collision not detected"]
1086        pub const _0: Self = Self::new(0);
1087
1088        #[doc = "Late collision detected during frame transmission."]
1089        pub const _1: Self = Self::new(1);
1090    }
1091    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1092    pub struct Dlc_SPEC;
1093    pub type Dlc = crate::EnumBitfieldStruct<u8, Dlc_SPEC>;
1094    impl Dlc {
1095        #[doc = "Loss of carrier not detected"]
1096        pub const _0: Self = Self::new(0);
1097
1098        #[doc = "Loss of carrier detected during frame transmission."]
1099        pub const _1: Self = Self::new(1);
1100    }
1101    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1102    pub struct Cnd_SPEC;
1103    pub type Cnd = crate::EnumBitfieldStruct<u8, Cnd_SPEC>;
1104    impl Cnd {
1105        #[doc = "Carrier detected when transmission started"]
1106        pub const _0: Self = Self::new(0);
1107
1108        #[doc = "Carrier not detected during preamble transmission."]
1109        pub const _1: Self = Self::new(1);
1110    }
1111    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1112    pub struct Rfof_SPEC;
1113    pub type Rfof = crate::EnumBitfieldStruct<u8, Rfof_SPEC>;
1114    impl Rfof {
1115        #[doc = "No overflow occurred"]
1116        pub const _0: Self = Self::new(0);
1117
1118        #[doc = "Overflow occurred."]
1119        pub const _1: Self = Self::new(1);
1120    }
1121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1122    pub struct Rde_SPEC;
1123    pub type Rde = crate::EnumBitfieldStruct<u8, Rde_SPEC>;
1124    impl Rde {
1125        #[doc = "EDMAC detected that the receive descriptor valid bit (RD0.RACT) is 1"]
1126        pub const _0: Self = Self::new(0);
1127
1128        #[doc = "EDMAC detected that the receive descriptor valid bit (RD0.RACT) is 0."]
1129        pub const _1: Self = Self::new(1);
1130    }
1131    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1132    pub struct Fr_SPEC;
1133    pub type Fr = crate::EnumBitfieldStruct<u8, Fr_SPEC>;
1134    impl Fr {
1135        #[doc = "Frame not received"]
1136        pub const _0: Self = Self::new(0);
1137
1138        #[doc = "Frame received and update of the receive descriptor is complete."]
1139        pub const _1: Self = Self::new(1);
1140    }
1141    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1142    pub struct Tfuf_SPEC;
1143    pub type Tfuf = crate::EnumBitfieldStruct<u8, Tfuf_SPEC>;
1144    impl Tfuf {
1145        #[doc = "No underflow occurred"]
1146        pub const _0: Self = Self::new(0);
1147
1148        #[doc = "Underflow occurred."]
1149        pub const _1: Self = Self::new(1);
1150    }
1151    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1152    pub struct Tde_SPEC;
1153    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
1154    impl Tde {
1155        #[doc = "EDMAC detected that the transmit descriptor valid bit (TD0.TACT) is 1"]
1156        pub const _0: Self = Self::new(0);
1157
1158        #[doc = "EDMAC detected that the transmit descriptor valid bit (TD0.TACT) is 0."]
1159        pub const _1: Self = Self::new(1);
1160    }
1161    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1162    pub struct Tc_SPEC;
1163    pub type Tc = crate::EnumBitfieldStruct<u8, Tc_SPEC>;
1164    impl Tc {
1165        #[doc = "Transfer not complete or no transfer requested"]
1166        pub const _0: Self = Self::new(0);
1167
1168        #[doc = "All frames indicated in the transmit descriptor were completely transferred to the transmit FIFO."]
1169        pub const _1: Self = Self::new(1);
1170    }
1171    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1172    pub struct Eci_SPEC;
1173    pub type Eci = crate::EnumBitfieldStruct<u8, Eci_SPEC>;
1174    impl Eci {
1175        #[doc = "ETHERC status interrupt source not detected"]
1176        pub const _0: Self = Self::new(0);
1177
1178        #[doc = "ETHERC status interrupt source detected."]
1179        pub const _1: Self = Self::new(1);
1180    }
1181    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1182    pub struct Ade_SPEC;
1183    pub type Ade = crate::EnumBitfieldStruct<u8, Ade_SPEC>;
1184    impl Ade {
1185        #[doc = "Invalid memory address not detected (normal operation)"]
1186        pub const _0: Self = Self::new(0);
1187
1188        #[doc = "Invalid memory address detected."]
1189        pub const _1: Self = Self::new(1);
1190    }
1191    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1192    pub struct Rfcof_SPEC;
1193    pub type Rfcof = crate::EnumBitfieldStruct<u8, Rfcof_SPEC>;
1194    impl Rfcof {
1195        #[doc = "Receive frame counter did not overflow"]
1196        pub const _0: Self = Self::new(0);
1197
1198        #[doc = "Receive frame counter overflowed."]
1199        pub const _1: Self = Self::new(1);
1200    }
1201    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1202    pub struct Rabt_SPEC;
1203    pub type Rabt = crate::EnumBitfieldStruct<u8, Rabt_SPEC>;
1204    impl Rabt {
1205        #[doc = "Frame reception not aborted or no reception requested"]
1206        pub const _0: Self = Self::new(0);
1207
1208        #[doc = "Frame reception aborted."]
1209        pub const _1: Self = Self::new(1);
1210    }
1211    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1212    pub struct Tabt_SPEC;
1213    pub type Tabt = crate::EnumBitfieldStruct<u8, Tabt_SPEC>;
1214    impl Tabt {
1215        #[doc = "Frame transmission not aborted or no transmission requested."]
1216        pub const _0: Self = Self::new(0);
1217
1218        #[doc = "Frame transmission aborted."]
1219        pub const _1: Self = Self::new(1);
1220    }
1221    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1222    pub struct Twb_SPEC;
1223    pub type Twb = crate::EnumBitfieldStruct<u8, Twb_SPEC>;
1224    impl Twb {
1225        #[doc = "Write-back not complete or no transmission requested"]
1226        pub const _0: Self = Self::new(0);
1227
1228        #[doc = "Write-back to the transmit descriptor completed."]
1229        pub const _1: Self = Self::new(1);
1230    }
1231}
1232#[doc(hidden)]
1233#[derive(Copy, Clone, Eq, PartialEq)]
1234pub struct Eesipr_SPEC;
1235impl crate::sealed::RegSpec for Eesipr_SPEC {
1236    type DataType = u32;
1237}
1238
1239#[doc = "ETHERC/EDMAC Status Interrupt Enable Register"]
1240pub type Eesipr = crate::RegValueT<Eesipr_SPEC>;
1241
1242impl Eesipr {
1243    #[doc = "CRC Error Interrupt Request Enable"]
1244    #[inline(always)]
1245    pub fn cerfip(
1246        self,
1247    ) -> crate::common::RegisterField<
1248        0,
1249        0x1,
1250        1,
1251        0,
1252        eesipr::Cerfip,
1253        eesipr::Cerfip,
1254        Eesipr_SPEC,
1255        crate::common::RW,
1256    > {
1257        crate::common::RegisterField::<
1258            0,
1259            0x1,
1260            1,
1261            0,
1262            eesipr::Cerfip,
1263            eesipr::Cerfip,
1264            Eesipr_SPEC,
1265            crate::common::RW,
1266        >::from_register(self, 0)
1267    }
1268
1269    #[doc = "PHY-LSI Receive Error Interrupt Request Enable"]
1270    #[inline(always)]
1271    pub fn preip(
1272        self,
1273    ) -> crate::common::RegisterField<
1274        1,
1275        0x1,
1276        1,
1277        0,
1278        eesipr::Preip,
1279        eesipr::Preip,
1280        Eesipr_SPEC,
1281        crate::common::RW,
1282    > {
1283        crate::common::RegisterField::<
1284            1,
1285            0x1,
1286            1,
1287            0,
1288            eesipr::Preip,
1289            eesipr::Preip,
1290            Eesipr_SPEC,
1291            crate::common::RW,
1292        >::from_register(self, 0)
1293    }
1294
1295    #[doc = "Frame-Too-Short Error Interrupt Request Enable"]
1296    #[inline(always)]
1297    pub fn rtsfip(
1298        self,
1299    ) -> crate::common::RegisterField<
1300        2,
1301        0x1,
1302        1,
1303        0,
1304        eesipr::Rtsfip,
1305        eesipr::Rtsfip,
1306        Eesipr_SPEC,
1307        crate::common::RW,
1308    > {
1309        crate::common::RegisterField::<
1310            2,
1311            0x1,
1312            1,
1313            0,
1314            eesipr::Rtsfip,
1315            eesipr::Rtsfip,
1316            Eesipr_SPEC,
1317            crate::common::RW,
1318        >::from_register(self, 0)
1319    }
1320
1321    #[doc = "Frame-Too-Long Error Interrupt Request Enable"]
1322    #[inline(always)]
1323    pub fn rtlfip(
1324        self,
1325    ) -> crate::common::RegisterField<
1326        3,
1327        0x1,
1328        1,
1329        0,
1330        eesipr::Rtlfip,
1331        eesipr::Rtlfip,
1332        Eesipr_SPEC,
1333        crate::common::RW,
1334    > {
1335        crate::common::RegisterField::<
1336            3,
1337            0x1,
1338            1,
1339            0,
1340            eesipr::Rtlfip,
1341            eesipr::Rtlfip,
1342            Eesipr_SPEC,
1343            crate::common::RW,
1344        >::from_register(self, 0)
1345    }
1346
1347    #[doc = "Alignment Error Interrupt Request Enable"]
1348    #[inline(always)]
1349    pub fn rrfip(
1350        self,
1351    ) -> crate::common::RegisterField<
1352        4,
1353        0x1,
1354        1,
1355        0,
1356        eesipr::Rrfip,
1357        eesipr::Rrfip,
1358        Eesipr_SPEC,
1359        crate::common::RW,
1360    > {
1361        crate::common::RegisterField::<
1362            4,
1363            0x1,
1364            1,
1365            0,
1366            eesipr::Rrfip,
1367            eesipr::Rrfip,
1368            Eesipr_SPEC,
1369            crate::common::RW,
1370        >::from_register(self, 0)
1371    }
1372
1373    #[doc = "Multicast Address Frame Receive Interrupt Request Enable"]
1374    #[inline(always)]
1375    pub fn rmafip(
1376        self,
1377    ) -> crate::common::RegisterField<
1378        7,
1379        0x1,
1380        1,
1381        0,
1382        eesipr::Rmafip,
1383        eesipr::Rmafip,
1384        Eesipr_SPEC,
1385        crate::common::RW,
1386    > {
1387        crate::common::RegisterField::<
1388            7,
1389            0x1,
1390            1,
1391            0,
1392            eesipr::Rmafip,
1393            eesipr::Rmafip,
1394            Eesipr_SPEC,
1395            crate::common::RW,
1396        >::from_register(self, 0)
1397    }
1398
1399    #[doc = "Transmit Retry Over Interrupt Request Enable"]
1400    #[inline(always)]
1401    pub fn troip(
1402        self,
1403    ) -> crate::common::RegisterField<
1404        8,
1405        0x1,
1406        1,
1407        0,
1408        eesipr::Troip,
1409        eesipr::Troip,
1410        Eesipr_SPEC,
1411        crate::common::RW,
1412    > {
1413        crate::common::RegisterField::<
1414            8,
1415            0x1,
1416            1,
1417            0,
1418            eesipr::Troip,
1419            eesipr::Troip,
1420            Eesipr_SPEC,
1421            crate::common::RW,
1422        >::from_register(self, 0)
1423    }
1424
1425    #[doc = "Late Collision Detect Interrupt Request Enable"]
1426    #[inline(always)]
1427    pub fn cdip(
1428        self,
1429    ) -> crate::common::RegisterField<
1430        9,
1431        0x1,
1432        1,
1433        0,
1434        eesipr::Cdip,
1435        eesipr::Cdip,
1436        Eesipr_SPEC,
1437        crate::common::RW,
1438    > {
1439        crate::common::RegisterField::<
1440            9,
1441            0x1,
1442            1,
1443            0,
1444            eesipr::Cdip,
1445            eesipr::Cdip,
1446            Eesipr_SPEC,
1447            crate::common::RW,
1448        >::from_register(self, 0)
1449    }
1450
1451    #[doc = "Loss of Carrier Detect Interrupt Request Enable"]
1452    #[inline(always)]
1453    pub fn dlcip(
1454        self,
1455    ) -> crate::common::RegisterField<
1456        10,
1457        0x1,
1458        1,
1459        0,
1460        eesipr::Dlcip,
1461        eesipr::Dlcip,
1462        Eesipr_SPEC,
1463        crate::common::RW,
1464    > {
1465        crate::common::RegisterField::<
1466            10,
1467            0x1,
1468            1,
1469            0,
1470            eesipr::Dlcip,
1471            eesipr::Dlcip,
1472            Eesipr_SPEC,
1473            crate::common::RW,
1474        >::from_register(self, 0)
1475    }
1476
1477    #[doc = "Carrier Not Detect Interrupt Request Enable"]
1478    #[inline(always)]
1479    pub fn cndip(
1480        self,
1481    ) -> crate::common::RegisterField<
1482        11,
1483        0x1,
1484        1,
1485        0,
1486        eesipr::Cndip,
1487        eesipr::Cndip,
1488        Eesipr_SPEC,
1489        crate::common::RW,
1490    > {
1491        crate::common::RegisterField::<
1492            11,
1493            0x1,
1494            1,
1495            0,
1496            eesipr::Cndip,
1497            eesipr::Cndip,
1498            Eesipr_SPEC,
1499            crate::common::RW,
1500        >::from_register(self, 0)
1501    }
1502
1503    #[doc = "Receive FIFO Overflow Interrupt Request Enable"]
1504    #[inline(always)]
1505    pub fn rfofip(
1506        self,
1507    ) -> crate::common::RegisterField<
1508        16,
1509        0x1,
1510        1,
1511        0,
1512        eesipr::Rfofip,
1513        eesipr::Rfofip,
1514        Eesipr_SPEC,
1515        crate::common::RW,
1516    > {
1517        crate::common::RegisterField::<
1518            16,
1519            0x1,
1520            1,
1521            0,
1522            eesipr::Rfofip,
1523            eesipr::Rfofip,
1524            Eesipr_SPEC,
1525            crate::common::RW,
1526        >::from_register(self, 0)
1527    }
1528
1529    #[doc = "Receive Descriptor Empty Interrupt Request Enable"]
1530    #[inline(always)]
1531    pub fn rdeip(
1532        self,
1533    ) -> crate::common::RegisterField<
1534        17,
1535        0x1,
1536        1,
1537        0,
1538        eesipr::Rdeip,
1539        eesipr::Rdeip,
1540        Eesipr_SPEC,
1541        crate::common::RW,
1542    > {
1543        crate::common::RegisterField::<
1544            17,
1545            0x1,
1546            1,
1547            0,
1548            eesipr::Rdeip,
1549            eesipr::Rdeip,
1550            Eesipr_SPEC,
1551            crate::common::RW,
1552        >::from_register(self, 0)
1553    }
1554
1555    #[doc = "Frame Receive Interrupt Request Enable"]
1556    #[inline(always)]
1557    pub fn frip(
1558        self,
1559    ) -> crate::common::RegisterField<
1560        18,
1561        0x1,
1562        1,
1563        0,
1564        eesipr::Frip,
1565        eesipr::Frip,
1566        Eesipr_SPEC,
1567        crate::common::RW,
1568    > {
1569        crate::common::RegisterField::<
1570            18,
1571            0x1,
1572            1,
1573            0,
1574            eesipr::Frip,
1575            eesipr::Frip,
1576            Eesipr_SPEC,
1577            crate::common::RW,
1578        >::from_register(self, 0)
1579    }
1580
1581    #[doc = "Transmit FIFO Underflow Interrupt Request Enable"]
1582    #[inline(always)]
1583    pub fn tfufip(
1584        self,
1585    ) -> crate::common::RegisterField<
1586        19,
1587        0x1,
1588        1,
1589        0,
1590        eesipr::Tfufip,
1591        eesipr::Tfufip,
1592        Eesipr_SPEC,
1593        crate::common::RW,
1594    > {
1595        crate::common::RegisterField::<
1596            19,
1597            0x1,
1598            1,
1599            0,
1600            eesipr::Tfufip,
1601            eesipr::Tfufip,
1602            Eesipr_SPEC,
1603            crate::common::RW,
1604        >::from_register(self, 0)
1605    }
1606
1607    #[doc = "Transmit Descriptor Empty Interrupt Request Enable"]
1608    #[inline(always)]
1609    pub fn tdeip(
1610        self,
1611    ) -> crate::common::RegisterField<
1612        20,
1613        0x1,
1614        1,
1615        0,
1616        eesipr::Tdeip,
1617        eesipr::Tdeip,
1618        Eesipr_SPEC,
1619        crate::common::RW,
1620    > {
1621        crate::common::RegisterField::<
1622            20,
1623            0x1,
1624            1,
1625            0,
1626            eesipr::Tdeip,
1627            eesipr::Tdeip,
1628            Eesipr_SPEC,
1629            crate::common::RW,
1630        >::from_register(self, 0)
1631    }
1632
1633    #[doc = "Frame Transfer Complete Interrupt Request Enable"]
1634    #[inline(always)]
1635    pub fn tcip(
1636        self,
1637    ) -> crate::common::RegisterField<
1638        21,
1639        0x1,
1640        1,
1641        0,
1642        eesipr::Tcip,
1643        eesipr::Tcip,
1644        Eesipr_SPEC,
1645        crate::common::RW,
1646    > {
1647        crate::common::RegisterField::<
1648            21,
1649            0x1,
1650            1,
1651            0,
1652            eesipr::Tcip,
1653            eesipr::Tcip,
1654            Eesipr_SPEC,
1655            crate::common::RW,
1656        >::from_register(self, 0)
1657    }
1658
1659    #[doc = "ETHERC Status Register Source Interrupt Request Enable"]
1660    #[inline(always)]
1661    pub fn eciip(
1662        self,
1663    ) -> crate::common::RegisterField<
1664        22,
1665        0x1,
1666        1,
1667        0,
1668        eesipr::Eciip,
1669        eesipr::Eciip,
1670        Eesipr_SPEC,
1671        crate::common::RW,
1672    > {
1673        crate::common::RegisterField::<
1674            22,
1675            0x1,
1676            1,
1677            0,
1678            eesipr::Eciip,
1679            eesipr::Eciip,
1680            Eesipr_SPEC,
1681            crate::common::RW,
1682        >::from_register(self, 0)
1683    }
1684
1685    #[doc = "Address Error Interrupt Request Enable"]
1686    #[inline(always)]
1687    pub fn adeip(
1688        self,
1689    ) -> crate::common::RegisterField<
1690        23,
1691        0x1,
1692        1,
1693        0,
1694        eesipr::Adeip,
1695        eesipr::Adeip,
1696        Eesipr_SPEC,
1697        crate::common::RW,
1698    > {
1699        crate::common::RegisterField::<
1700            23,
1701            0x1,
1702            1,
1703            0,
1704            eesipr::Adeip,
1705            eesipr::Adeip,
1706            Eesipr_SPEC,
1707            crate::common::RW,
1708        >::from_register(self, 0)
1709    }
1710
1711    #[doc = "Receive Frame Counter Overflow Interrupt Request Enable"]
1712    #[inline(always)]
1713    pub fn rfcofip(
1714        self,
1715    ) -> crate::common::RegisterField<
1716        24,
1717        0x1,
1718        1,
1719        0,
1720        eesipr::Rfcofip,
1721        eesipr::Rfcofip,
1722        Eesipr_SPEC,
1723        crate::common::RW,
1724    > {
1725        crate::common::RegisterField::<
1726            24,
1727            0x1,
1728            1,
1729            0,
1730            eesipr::Rfcofip,
1731            eesipr::Rfcofip,
1732            Eesipr_SPEC,
1733            crate::common::RW,
1734        >::from_register(self, 0)
1735    }
1736
1737    #[doc = "Receive Abort Detect Interrupt Request Enable"]
1738    #[inline(always)]
1739    pub fn rabtip(
1740        self,
1741    ) -> crate::common::RegisterField<
1742        25,
1743        0x1,
1744        1,
1745        0,
1746        eesipr::Rabtip,
1747        eesipr::Rabtip,
1748        Eesipr_SPEC,
1749        crate::common::RW,
1750    > {
1751        crate::common::RegisterField::<
1752            25,
1753            0x1,
1754            1,
1755            0,
1756            eesipr::Rabtip,
1757            eesipr::Rabtip,
1758            Eesipr_SPEC,
1759            crate::common::RW,
1760        >::from_register(self, 0)
1761    }
1762
1763    #[doc = "Transmit Abort Detect Interrupt Request Enable"]
1764    #[inline(always)]
1765    pub fn tabtip(
1766        self,
1767    ) -> crate::common::RegisterField<
1768        26,
1769        0x1,
1770        1,
1771        0,
1772        eesipr::Tabtip,
1773        eesipr::Tabtip,
1774        Eesipr_SPEC,
1775        crate::common::RW,
1776    > {
1777        crate::common::RegisterField::<
1778            26,
1779            0x1,
1780            1,
1781            0,
1782            eesipr::Tabtip,
1783            eesipr::Tabtip,
1784            Eesipr_SPEC,
1785            crate::common::RW,
1786        >::from_register(self, 0)
1787    }
1788
1789    #[doc = "Write-Back Complete Interrupt Request Enable"]
1790    #[inline(always)]
1791    pub fn twbip(
1792        self,
1793    ) -> crate::common::RegisterField<
1794        30,
1795        0x1,
1796        1,
1797        0,
1798        eesipr::Twbip,
1799        eesipr::Twbip,
1800        Eesipr_SPEC,
1801        crate::common::RW,
1802    > {
1803        crate::common::RegisterField::<
1804            30,
1805            0x1,
1806            1,
1807            0,
1808            eesipr::Twbip,
1809            eesipr::Twbip,
1810            Eesipr_SPEC,
1811            crate::common::RW,
1812        >::from_register(self, 0)
1813    }
1814}
1815impl ::core::default::Default for Eesipr {
1816    #[inline(always)]
1817    fn default() -> Eesipr {
1818        <crate::RegValueT<Eesipr_SPEC> as RegisterValue<_>>::new(0)
1819    }
1820}
1821pub mod eesipr {
1822
1823    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1824    pub struct Cerfip_SPEC;
1825    pub type Cerfip = crate::EnumBitfieldStruct<u8, Cerfip_SPEC>;
1826    impl Cerfip {
1827        #[doc = "Disable CRC error interrupt requests"]
1828        pub const _0: Self = Self::new(0);
1829
1830        #[doc = "Enable CRC error interrupt requests."]
1831        pub const _1: Self = Self::new(1);
1832    }
1833    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1834    pub struct Preip_SPEC;
1835    pub type Preip = crate::EnumBitfieldStruct<u8, Preip_SPEC>;
1836    impl Preip {
1837        #[doc = "Disable PHY-LSI receive error interrupt requests"]
1838        pub const _0: Self = Self::new(0);
1839
1840        #[doc = "Enable PHY-LSI receive error interrupt requests."]
1841        pub const _1: Self = Self::new(1);
1842    }
1843    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1844    pub struct Rtsfip_SPEC;
1845    pub type Rtsfip = crate::EnumBitfieldStruct<u8, Rtsfip_SPEC>;
1846    impl Rtsfip {
1847        #[doc = "Disable frame-too-short error interrupt requests"]
1848        pub const _0: Self = Self::new(0);
1849
1850        #[doc = "Enable frame-too-short error interrupt requests."]
1851        pub const _1: Self = Self::new(1);
1852    }
1853    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1854    pub struct Rtlfip_SPEC;
1855    pub type Rtlfip = crate::EnumBitfieldStruct<u8, Rtlfip_SPEC>;
1856    impl Rtlfip {
1857        #[doc = "Disable frame-too-long error interrupt requests"]
1858        pub const _0: Self = Self::new(0);
1859
1860        #[doc = "Enable frame-too-long error interrupt requests."]
1861        pub const _1: Self = Self::new(1);
1862    }
1863    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1864    pub struct Rrfip_SPEC;
1865    pub type Rrfip = crate::EnumBitfieldStruct<u8, Rrfip_SPEC>;
1866    impl Rrfip {
1867        #[doc = "Disable alignment error interrupt requests"]
1868        pub const _0: Self = Self::new(0);
1869
1870        #[doc = "Enable alignment error interrupt requests."]
1871        pub const _1: Self = Self::new(1);
1872    }
1873    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1874    pub struct Rmafip_SPEC;
1875    pub type Rmafip = crate::EnumBitfieldStruct<u8, Rmafip_SPEC>;
1876    impl Rmafip {
1877        #[doc = "Disable multicast address frame receive interrupt requests"]
1878        pub const _0: Self = Self::new(0);
1879
1880        #[doc = "Enable multicast address frame receive interrupt requests."]
1881        pub const _1: Self = Self::new(1);
1882    }
1883    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1884    pub struct Troip_SPEC;
1885    pub type Troip = crate::EnumBitfieldStruct<u8, Troip_SPEC>;
1886    impl Troip {
1887        #[doc = "Disable transmit retry over interrupt requests"]
1888        pub const _0: Self = Self::new(0);
1889
1890        #[doc = "Enable transmit retry over interrupt requests."]
1891        pub const _1: Self = Self::new(1);
1892    }
1893    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1894    pub struct Cdip_SPEC;
1895    pub type Cdip = crate::EnumBitfieldStruct<u8, Cdip_SPEC>;
1896    impl Cdip {
1897        #[doc = "Disable late collision detected interrupt requests"]
1898        pub const _0: Self = Self::new(0);
1899
1900        #[doc = "Enable late collision detected interrupt requests."]
1901        pub const _1: Self = Self::new(1);
1902    }
1903    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1904    pub struct Dlcip_SPEC;
1905    pub type Dlcip = crate::EnumBitfieldStruct<u8, Dlcip_SPEC>;
1906    impl Dlcip {
1907        #[doc = "Disable loss of carrier detected interrupt requests"]
1908        pub const _0: Self = Self::new(0);
1909
1910        #[doc = "Enable loss of carrier detected interrupt requests."]
1911        pub const _1: Self = Self::new(1);
1912    }
1913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1914    pub struct Cndip_SPEC;
1915    pub type Cndip = crate::EnumBitfieldStruct<u8, Cndip_SPEC>;
1916    impl Cndip {
1917        #[doc = "Disable carrier not detected interrupt requests"]
1918        pub const _0: Self = Self::new(0);
1919
1920        #[doc = "Enable carrier not detected interrupt requests."]
1921        pub const _1: Self = Self::new(1);
1922    }
1923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1924    pub struct Rfofip_SPEC;
1925    pub type Rfofip = crate::EnumBitfieldStruct<u8, Rfofip_SPEC>;
1926    impl Rfofip {
1927        #[doc = "Disable overflow interrupt requests"]
1928        pub const _0: Self = Self::new(0);
1929
1930        #[doc = "Enable overflow interrupt requests."]
1931        pub const _1: Self = Self::new(1);
1932    }
1933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1934    pub struct Rdeip_SPEC;
1935    pub type Rdeip = crate::EnumBitfieldStruct<u8, Rdeip_SPEC>;
1936    impl Rdeip {
1937        #[doc = "Disable receive descriptor empty interrupt requests"]
1938        pub const _0: Self = Self::new(0);
1939
1940        #[doc = "Enable receive descriptor empty interrupt requests."]
1941        pub const _1: Self = Self::new(1);
1942    }
1943    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1944    pub struct Frip_SPEC;
1945    pub type Frip = crate::EnumBitfieldStruct<u8, Frip_SPEC>;
1946    impl Frip {
1947        #[doc = "Disable frame reception interrupt requests"]
1948        pub const _0: Self = Self::new(0);
1949
1950        #[doc = "Enable frame reception interrupt requests."]
1951        pub const _1: Self = Self::new(1);
1952    }
1953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1954    pub struct Tfufip_SPEC;
1955    pub type Tfufip = crate::EnumBitfieldStruct<u8, Tfufip_SPEC>;
1956    impl Tfufip {
1957        #[doc = "Disable underflow interrupt requests"]
1958        pub const _0: Self = Self::new(0);
1959
1960        #[doc = "Enable underflow interrupt requests."]
1961        pub const _1: Self = Self::new(1);
1962    }
1963    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1964    pub struct Tdeip_SPEC;
1965    pub type Tdeip = crate::EnumBitfieldStruct<u8, Tdeip_SPEC>;
1966    impl Tdeip {
1967        #[doc = "Disable transmit descriptor empty interrupt requests"]
1968        pub const _0: Self = Self::new(0);
1969
1970        #[doc = "Enable transmit descriptor empty interrupt requests."]
1971        pub const _1: Self = Self::new(1);
1972    }
1973    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1974    pub struct Tcip_SPEC;
1975    pub type Tcip = crate::EnumBitfieldStruct<u8, Tcip_SPEC>;
1976    impl Tcip {
1977        #[doc = "Disable frame transmission complete interrupt requests"]
1978        pub const _0: Self = Self::new(0);
1979
1980        #[doc = "Enable frame transmission complete interrupt requests."]
1981        pub const _1: Self = Self::new(1);
1982    }
1983    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1984    pub struct Eciip_SPEC;
1985    pub type Eciip = crate::EnumBitfieldStruct<u8, Eciip_SPEC>;
1986    impl Eciip {
1987        #[doc = "Disable ETHERC status interrupt requests"]
1988        pub const _0: Self = Self::new(0);
1989
1990        #[doc = "Enable ETHERC status interrupt requests."]
1991        pub const _1: Self = Self::new(1);
1992    }
1993    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1994    pub struct Adeip_SPEC;
1995    pub type Adeip = crate::EnumBitfieldStruct<u8, Adeip_SPEC>;
1996    impl Adeip {
1997        #[doc = "Disable address error interrupt requests"]
1998        pub const _0: Self = Self::new(0);
1999
2000        #[doc = "Enable address error interrupt requests."]
2001        pub const _1: Self = Self::new(1);
2002    }
2003    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2004    pub struct Rfcofip_SPEC;
2005    pub type Rfcofip = crate::EnumBitfieldStruct<u8, Rfcofip_SPEC>;
2006    impl Rfcofip {
2007        #[doc = "Disable receive frame counter overflow interrupt requests"]
2008        pub const _0: Self = Self::new(0);
2009
2010        #[doc = "Enable receive frame counter overflow interrupt requests."]
2011        pub const _1: Self = Self::new(1);
2012    }
2013    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2014    pub struct Rabtip_SPEC;
2015    pub type Rabtip = crate::EnumBitfieldStruct<u8, Rabtip_SPEC>;
2016    impl Rabtip {
2017        #[doc = "Disable receive abort detected interrupt requests"]
2018        pub const _0: Self = Self::new(0);
2019
2020        #[doc = "Enable receive abort detected interrupt requests."]
2021        pub const _1: Self = Self::new(1);
2022    }
2023    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2024    pub struct Tabtip_SPEC;
2025    pub type Tabtip = crate::EnumBitfieldStruct<u8, Tabtip_SPEC>;
2026    impl Tabtip {
2027        #[doc = "Disable transmit abort detected interrupt requests"]
2028        pub const _0: Self = Self::new(0);
2029
2030        #[doc = "Enable transmit abort detected interrupt requests."]
2031        pub const _1: Self = Self::new(1);
2032    }
2033    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2034    pub struct Twbip_SPEC;
2035    pub type Twbip = crate::EnumBitfieldStruct<u8, Twbip_SPEC>;
2036    impl Twbip {
2037        #[doc = "Disable write-back complete interrupt requests"]
2038        pub const _0: Self = Self::new(0);
2039
2040        #[doc = "Enable write-back complete interrupt requests."]
2041        pub const _1: Self = Self::new(1);
2042    }
2043}
2044#[doc(hidden)]
2045#[derive(Copy, Clone, Eq, PartialEq)]
2046pub struct Trscer_SPEC;
2047impl crate::sealed::RegSpec for Trscer_SPEC {
2048    type DataType = u32;
2049}
2050
2051#[doc = "ETHERC/EDMAC Transmit/Receive Status Copy Enable Register"]
2052pub type Trscer = crate::RegValueT<Trscer_SPEC>;
2053
2054impl Trscer {
2055    #[doc = "RRF Flag Copy Enable"]
2056    #[inline(always)]
2057    pub fn rrfce(
2058        self,
2059    ) -> crate::common::RegisterField<
2060        4,
2061        0x1,
2062        1,
2063        0,
2064        trscer::Rrfce,
2065        trscer::Rrfce,
2066        Trscer_SPEC,
2067        crate::common::RW,
2068    > {
2069        crate::common::RegisterField::<
2070            4,
2071            0x1,
2072            1,
2073            0,
2074            trscer::Rrfce,
2075            trscer::Rrfce,
2076            Trscer_SPEC,
2077            crate::common::RW,
2078        >::from_register(self, 0)
2079    }
2080
2081    #[doc = "RMAF Flag Copy Enable"]
2082    #[inline(always)]
2083    pub fn rmafce(
2084        self,
2085    ) -> crate::common::RegisterField<
2086        7,
2087        0x1,
2088        1,
2089        0,
2090        trscer::Rmafce,
2091        trscer::Rmafce,
2092        Trscer_SPEC,
2093        crate::common::RW,
2094    > {
2095        crate::common::RegisterField::<
2096            7,
2097            0x1,
2098            1,
2099            0,
2100            trscer::Rmafce,
2101            trscer::Rmafce,
2102            Trscer_SPEC,
2103            crate::common::RW,
2104        >::from_register(self, 0)
2105    }
2106}
2107impl ::core::default::Default for Trscer {
2108    #[inline(always)]
2109    fn default() -> Trscer {
2110        <crate::RegValueT<Trscer_SPEC> as RegisterValue<_>>::new(0)
2111    }
2112}
2113pub mod trscer {
2114
2115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2116    pub struct Rrfce_SPEC;
2117    pub type Rrfce = crate::EnumBitfieldStruct<u8, Rrfce_SPEC>;
2118    impl Rrfce {
2119        #[doc = "Reflect the EESR.RRF flag status in the RD0.RFE bit of the receive descriptor"]
2120        pub const _0: Self = Self::new(0);
2121
2122        #[doc = "Do not reflect the EESR.RRF flag status in the RD0.RFE bit of the receive descriptor."]
2123        pub const _1: Self = Self::new(1);
2124    }
2125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2126    pub struct Rmafce_SPEC;
2127    pub type Rmafce = crate::EnumBitfieldStruct<u8, Rmafce_SPEC>;
2128    impl Rmafce {
2129        #[doc = "Reflect the EESR.RMAF flag status in the RD0.RFE bit of the receive descriptor"]
2130        pub const _0: Self = Self::new(0);
2131
2132        #[doc = "Do not reflect the EESR.RMAF flag status in the RD0.RFE bit of the receive descriptor."]
2133        pub const _1: Self = Self::new(1);
2134    }
2135}
2136#[doc(hidden)]
2137#[derive(Copy, Clone, Eq, PartialEq)]
2138pub struct Rmfcr_SPEC;
2139impl crate::sealed::RegSpec for Rmfcr_SPEC {
2140    type DataType = u32;
2141}
2142
2143#[doc = "Missed-Frame Counter Register"]
2144pub type Rmfcr = crate::RegValueT<Rmfcr_SPEC>;
2145
2146impl Rmfcr {
2147    #[doc = "Missed-Frame Counter"]
2148    #[inline(always)]
2149    pub fn mfc(
2150        self,
2151    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Rmfcr_SPEC, crate::common::RW>
2152    {
2153        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Rmfcr_SPEC,crate::common::RW>::from_register(self,0)
2154    }
2155}
2156impl ::core::default::Default for Rmfcr {
2157    #[inline(always)]
2158    fn default() -> Rmfcr {
2159        <crate::RegValueT<Rmfcr_SPEC> as RegisterValue<_>>::new(0)
2160    }
2161}
2162
2163#[doc(hidden)]
2164#[derive(Copy, Clone, Eq, PartialEq)]
2165pub struct Tftr_SPEC;
2166impl crate::sealed::RegSpec for Tftr_SPEC {
2167    type DataType = u32;
2168}
2169
2170#[doc = "Transmit FIFO Threshold Register"]
2171pub type Tftr = crate::RegValueT<Tftr_SPEC>;
2172
2173impl Tftr {
2174    #[doc = "Transmit FIFO Threshold"]
2175    #[inline(always)]
2176    pub fn tft(
2177        self,
2178    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Tftr_SPEC, crate::common::RW> {
2179        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Tftr_SPEC,crate::common::RW>::from_register(self,0)
2180    }
2181}
2182impl ::core::default::Default for Tftr {
2183    #[inline(always)]
2184    fn default() -> Tftr {
2185        <crate::RegValueT<Tftr_SPEC> as RegisterValue<_>>::new(0)
2186    }
2187}
2188
2189#[doc(hidden)]
2190#[derive(Copy, Clone, Eq, PartialEq)]
2191pub struct Fdr_SPEC;
2192impl crate::sealed::RegSpec for Fdr_SPEC {
2193    type DataType = u32;
2194}
2195
2196#[doc = "FIFO Depth Register"]
2197pub type Fdr = crate::RegValueT<Fdr_SPEC>;
2198
2199impl Fdr {
2200    #[doc = "Receive FIFO Depth"]
2201    #[inline(always)]
2202    pub fn rfd(
2203        self,
2204    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, fdr::Rfd, fdr::Rfd, Fdr_SPEC, crate::common::RW>
2205    {
2206        crate::common::RegisterField::<0,0x1f,1,0,fdr::Rfd,fdr::Rfd,Fdr_SPEC,crate::common::RW>::from_register(self,0)
2207    }
2208
2209    #[doc = "Transmit FIFO Depth"]
2210    #[inline(always)]
2211    pub fn tfd(
2212        self,
2213    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, fdr::Tfd, fdr::Tfd, Fdr_SPEC, crate::common::RW>
2214    {
2215        crate::common::RegisterField::<8,0x1f,1,0,fdr::Tfd,fdr::Tfd,Fdr_SPEC,crate::common::RW>::from_register(self,0)
2216    }
2217}
2218impl ::core::default::Default for Fdr {
2219    #[inline(always)]
2220    fn default() -> Fdr {
2221        <crate::RegValueT<Fdr_SPEC> as RegisterValue<_>>::new(0)
2222    }
2223}
2224pub mod fdr {
2225
2226    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2227    pub struct Rfd_SPEC;
2228    pub type Rfd = crate::EnumBitfieldStruct<u8, Rfd_SPEC>;
2229    impl Rfd {
2230        #[doc = "4096 bytes"]
2231        pub const _0_X_0_F: Self = Self::new(15);
2232
2233        #[doc = "settings prohibited"]
2234        pub const OTHERS: Self = Self::new(0);
2235    }
2236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2237    pub struct Tfd_SPEC;
2238    pub type Tfd = crate::EnumBitfieldStruct<u8, Tfd_SPEC>;
2239    impl Tfd {
2240        #[doc = "2048 bytes"]
2241        pub const _0_X_07: Self = Self::new(7);
2242
2243        #[doc = "settings prohibited"]
2244        pub const OTHERS: Self = Self::new(0);
2245    }
2246}
2247#[doc(hidden)]
2248#[derive(Copy, Clone, Eq, PartialEq)]
2249pub struct Rmcr_SPEC;
2250impl crate::sealed::RegSpec for Rmcr_SPEC {
2251    type DataType = u32;
2252}
2253
2254#[doc = "Receive Method Control Register"]
2255pub type Rmcr = crate::RegValueT<Rmcr_SPEC>;
2256
2257impl Rmcr {
2258    #[doc = "Receive Request Reset"]
2259    #[inline(always)]
2260    pub fn rnr(
2261        self,
2262    ) -> crate::common::RegisterField<
2263        0,
2264        0x1,
2265        1,
2266        0,
2267        rmcr::Rnr,
2268        rmcr::Rnr,
2269        Rmcr_SPEC,
2270        crate::common::RW,
2271    > {
2272        crate::common::RegisterField::<
2273            0,
2274            0x1,
2275            1,
2276            0,
2277            rmcr::Rnr,
2278            rmcr::Rnr,
2279            Rmcr_SPEC,
2280            crate::common::RW,
2281        >::from_register(self, 0)
2282    }
2283}
2284impl ::core::default::Default for Rmcr {
2285    #[inline(always)]
2286    fn default() -> Rmcr {
2287        <crate::RegValueT<Rmcr_SPEC> as RegisterValue<_>>::new(0)
2288    }
2289}
2290pub mod rmcr {
2291
2292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2293    pub struct Rnr_SPEC;
2294    pub type Rnr = crate::EnumBitfieldStruct<u8, Rnr_SPEC>;
2295    impl Rnr {
2296        #[doc = "EDRRR.RR bit (receive request bit) is cleared to 0 when one frame is received"]
2297        pub const _0: Self = Self::new(0);
2298
2299        #[doc = "EDRRR.RR bit (receive request bit) is not cleared to 0 when one frame is received."]
2300        pub const _1: Self = Self::new(1);
2301    }
2302}
2303#[doc(hidden)]
2304#[derive(Copy, Clone, Eq, PartialEq)]
2305pub struct Tfucr_SPEC;
2306impl crate::sealed::RegSpec for Tfucr_SPEC {
2307    type DataType = u32;
2308}
2309
2310#[doc = "Transmit FIFO Underflow Counter"]
2311pub type Tfucr = crate::RegValueT<Tfucr_SPEC>;
2312
2313impl Tfucr {
2314    #[doc = "Transmit FIFO Underflow Count"]
2315    #[inline(always)]
2316    pub fn under(
2317        self,
2318    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Tfucr_SPEC, crate::common::RW>
2319    {
2320        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Tfucr_SPEC,crate::common::RW>::from_register(self,0)
2321    }
2322}
2323impl ::core::default::Default for Tfucr {
2324    #[inline(always)]
2325    fn default() -> Tfucr {
2326        <crate::RegValueT<Tfucr_SPEC> as RegisterValue<_>>::new(0)
2327    }
2328}
2329
2330#[doc(hidden)]
2331#[derive(Copy, Clone, Eq, PartialEq)]
2332pub struct Rfocr_SPEC;
2333impl crate::sealed::RegSpec for Rfocr_SPEC {
2334    type DataType = u32;
2335}
2336
2337#[doc = "Receive FIFO Overflow Counter"]
2338pub type Rfocr = crate::RegValueT<Rfocr_SPEC>;
2339
2340impl Rfocr {
2341    #[doc = "Receive FIFO Overflow Count"]
2342    #[inline(always)]
2343    pub fn over(
2344        self,
2345    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Rfocr_SPEC, crate::common::RW>
2346    {
2347        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Rfocr_SPEC,crate::common::RW>::from_register(self,0)
2348    }
2349}
2350impl ::core::default::Default for Rfocr {
2351    #[inline(always)]
2352    fn default() -> Rfocr {
2353        <crate::RegValueT<Rfocr_SPEC> as RegisterValue<_>>::new(0)
2354    }
2355}
2356
2357#[doc(hidden)]
2358#[derive(Copy, Clone, Eq, PartialEq)]
2359pub struct Iosr_SPEC;
2360impl crate::sealed::RegSpec for Iosr_SPEC {
2361    type DataType = u32;
2362}
2363
2364#[doc = "Independent Output Signal Setting Register"]
2365pub type Iosr = crate::RegValueT<Iosr_SPEC>;
2366
2367impl Iosr {
2368    #[doc = "External Loopback Mode"]
2369    #[inline(always)]
2370    pub fn elb(
2371        self,
2372    ) -> crate::common::RegisterField<
2373        0,
2374        0x1,
2375        1,
2376        0,
2377        iosr::Elb,
2378        iosr::Elb,
2379        Iosr_SPEC,
2380        crate::common::RW,
2381    > {
2382        crate::common::RegisterField::<
2383            0,
2384            0x1,
2385            1,
2386            0,
2387            iosr::Elb,
2388            iosr::Elb,
2389            Iosr_SPEC,
2390            crate::common::RW,
2391        >::from_register(self, 0)
2392    }
2393}
2394impl ::core::default::Default for Iosr {
2395    #[inline(always)]
2396    fn default() -> Iosr {
2397        <crate::RegValueT<Iosr_SPEC> as RegisterValue<_>>::new(0)
2398    }
2399}
2400pub mod iosr {
2401
2402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2403    pub struct Elb_SPEC;
2404    pub type Elb = crate::EnumBitfieldStruct<u8, Elb_SPEC>;
2405    impl Elb {
2406        #[doc = "Output low on the ET0_EXOUT pin"]
2407        pub const _0: Self = Self::new(0);
2408
2409        #[doc = "Output high on the ET0_EXOUT pin."]
2410        pub const _1: Self = Self::new(1);
2411    }
2412}
2413#[doc(hidden)]
2414#[derive(Copy, Clone, Eq, PartialEq)]
2415pub struct Fcftr_SPEC;
2416impl crate::sealed::RegSpec for Fcftr_SPEC {
2417    type DataType = u32;
2418}
2419
2420#[doc = "Flow Control Start FIFO Threshold Setting Register"]
2421pub type Fcftr = crate::RegValueT<Fcftr_SPEC>;
2422
2423impl Fcftr {
2424    #[doc = "Receive FIFO Data PAUSE Output Threshold"]
2425    #[inline(always)]
2426    pub fn rfdo(
2427        self,
2428    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Fcftr_SPEC, crate::common::RW> {
2429        crate::common::RegisterField::<0,0x7,1,0,u8,u8,Fcftr_SPEC,crate::common::RW>::from_register(self,0)
2430    }
2431
2432    #[doc = "Receive FIFO Frame PAUSE Output Threshold"]
2433    #[inline(always)]
2434    pub fn rffo(
2435        self,
2436    ) -> crate::common::RegisterField<16, 0x7, 1, 0, u8, u8, Fcftr_SPEC, crate::common::RW> {
2437        crate::common::RegisterField::<16,0x7,1,0,u8,u8,Fcftr_SPEC,crate::common::RW>::from_register(self,0)
2438    }
2439}
2440impl ::core::default::Default for Fcftr {
2441    #[inline(always)]
2442    fn default() -> Fcftr {
2443        <crate::RegValueT<Fcftr_SPEC> as RegisterValue<_>>::new(458759)
2444    }
2445}
2446
2447#[doc(hidden)]
2448#[derive(Copy, Clone, Eq, PartialEq)]
2449pub struct Rpadir_SPEC;
2450impl crate::sealed::RegSpec for Rpadir_SPEC {
2451    type DataType = u32;
2452}
2453
2454#[doc = "Receive Data Padding Insert Register"]
2455pub type Rpadir = crate::RegValueT<Rpadir_SPEC>;
2456
2457impl Rpadir {
2458    #[doc = "Padding Slot"]
2459    #[inline(always)]
2460    pub fn padr(
2461        self,
2462    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Rpadir_SPEC, crate::common::RW> {
2463        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Rpadir_SPEC,crate::common::RW>::from_register(self,0)
2464    }
2465
2466    #[doc = "Padding Size"]
2467    #[inline(always)]
2468    pub fn pads(
2469        self,
2470    ) -> crate::common::RegisterField<
2471        16,
2472        0x3,
2473        1,
2474        0,
2475        rpadir::Pads,
2476        rpadir::Pads,
2477        Rpadir_SPEC,
2478        crate::common::RW,
2479    > {
2480        crate::common::RegisterField::<
2481            16,
2482            0x3,
2483            1,
2484            0,
2485            rpadir::Pads,
2486            rpadir::Pads,
2487            Rpadir_SPEC,
2488            crate::common::RW,
2489        >::from_register(self, 0)
2490    }
2491}
2492impl ::core::default::Default for Rpadir {
2493    #[inline(always)]
2494    fn default() -> Rpadir {
2495        <crate::RegValueT<Rpadir_SPEC> as RegisterValue<_>>::new(0)
2496    }
2497}
2498pub mod rpadir {
2499
2500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2501    pub struct Pads_SPEC;
2502    pub type Pads = crate::EnumBitfieldStruct<u8, Pads_SPEC>;
2503    impl Pads {
2504        #[doc = "Do not insert padding"]
2505        pub const _00: Self = Self::new(0);
2506
2507        #[doc = "settings prohibited"]
2508        pub const OTHERS: Self = Self::new(0);
2509    }
2510}
2511#[doc(hidden)]
2512#[derive(Copy, Clone, Eq, PartialEq)]
2513pub struct Trimd_SPEC;
2514impl crate::sealed::RegSpec for Trimd_SPEC {
2515    type DataType = u32;
2516}
2517
2518#[doc = "Transmit Interrupt Setting Register"]
2519pub type Trimd = crate::RegValueT<Trimd_SPEC>;
2520
2521impl Trimd {
2522    #[doc = "Transmit Interrupt Enable"]
2523    #[inline(always)]
2524    pub fn tis(
2525        self,
2526    ) -> crate::common::RegisterField<
2527        0,
2528        0x1,
2529        1,
2530        0,
2531        trimd::Tis,
2532        trimd::Tis,
2533        Trimd_SPEC,
2534        crate::common::RW,
2535    > {
2536        crate::common::RegisterField::<
2537            0,
2538            0x1,
2539            1,
2540            0,
2541            trimd::Tis,
2542            trimd::Tis,
2543            Trimd_SPEC,
2544            crate::common::RW,
2545        >::from_register(self, 0)
2546    }
2547
2548    #[doc = "Transmit Interrupt Mode"]
2549    #[inline(always)]
2550    pub fn tim(
2551        self,
2552    ) -> crate::common::RegisterField<
2553        4,
2554        0x1,
2555        1,
2556        0,
2557        trimd::Tim,
2558        trimd::Tim,
2559        Trimd_SPEC,
2560        crate::common::RW,
2561    > {
2562        crate::common::RegisterField::<
2563            4,
2564            0x1,
2565            1,
2566            0,
2567            trimd::Tim,
2568            trimd::Tim,
2569            Trimd_SPEC,
2570            crate::common::RW,
2571        >::from_register(self, 0)
2572    }
2573}
2574impl ::core::default::Default for Trimd {
2575    #[inline(always)]
2576    fn default() -> Trimd {
2577        <crate::RegValueT<Trimd_SPEC> as RegisterValue<_>>::new(0)
2578    }
2579}
2580pub mod trimd {
2581
2582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2583    pub struct Tis_SPEC;
2584    pub type Tis = crate::EnumBitfieldStruct<u8, Tis_SPEC>;
2585    impl Tis {
2586        #[doc = "Disable transmit interrupts"]
2587        pub const _0: Self = Self::new(0);
2588
2589        #[doc = "Enable transmit Interrupts."]
2590        pub const _1: Self = Self::new(1);
2591    }
2592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2593    pub struct Tim_SPEC;
2594    pub type Tim = crate::EnumBitfieldStruct<u8, Tim_SPEC>;
2595    impl Tim {
2596        #[doc = "Select transmission complete interrupt mode, where an interrupt occurs when a frame is transmitted"]
2597        pub const _0: Self = Self::new(0);
2598
2599        #[doc = "Select write-back complete interrupt mode, where an interrupt occurs when write-back to the transmit descriptor is complete while the TWBI bit is 1."]
2600        pub const _1: Self = Self::new(1);
2601    }
2602}
2603#[doc(hidden)]
2604#[derive(Copy, Clone, Eq, PartialEq)]
2605pub struct Rbwar_SPEC;
2606impl crate::sealed::RegSpec for Rbwar_SPEC {
2607    type DataType = u32;
2608}
2609
2610#[doc = "Receive Buffer Write Address Register"]
2611pub type Rbwar = crate::RegValueT<Rbwar_SPEC>;
2612
2613impl NoBitfieldReg<Rbwar_SPEC> for Rbwar {}
2614impl ::core::default::Default for Rbwar {
2615    #[inline(always)]
2616    fn default() -> Rbwar {
2617        <crate::RegValueT<Rbwar_SPEC> as RegisterValue<_>>::new(0)
2618    }
2619}
2620
2621#[doc(hidden)]
2622#[derive(Copy, Clone, Eq, PartialEq)]
2623pub struct Rdfar_SPEC;
2624impl crate::sealed::RegSpec for Rdfar_SPEC {
2625    type DataType = u32;
2626}
2627
2628#[doc = "Receive Descriptor Fetch Address Register"]
2629pub type Rdfar = crate::RegValueT<Rdfar_SPEC>;
2630
2631impl NoBitfieldReg<Rdfar_SPEC> for Rdfar {}
2632impl ::core::default::Default for Rdfar {
2633    #[inline(always)]
2634    fn default() -> Rdfar {
2635        <crate::RegValueT<Rdfar_SPEC> as RegisterValue<_>>::new(0)
2636    }
2637}
2638
2639#[doc(hidden)]
2640#[derive(Copy, Clone, Eq, PartialEq)]
2641pub struct Tbrar_SPEC;
2642impl crate::sealed::RegSpec for Tbrar_SPEC {
2643    type DataType = u32;
2644}
2645
2646#[doc = "Transmit Buffer Read Address Register"]
2647pub type Tbrar = crate::RegValueT<Tbrar_SPEC>;
2648
2649impl NoBitfieldReg<Tbrar_SPEC> for Tbrar {}
2650impl ::core::default::Default for Tbrar {
2651    #[inline(always)]
2652    fn default() -> Tbrar {
2653        <crate::RegValueT<Tbrar_SPEC> as RegisterValue<_>>::new(0)
2654    }
2655}
2656
2657#[doc(hidden)]
2658#[derive(Copy, Clone, Eq, PartialEq)]
2659pub struct Tdfar_SPEC;
2660impl crate::sealed::RegSpec for Tdfar_SPEC {
2661    type DataType = u32;
2662}
2663
2664#[doc = "Transmit Descriptor Fetch Address Register"]
2665pub type Tdfar = crate::RegValueT<Tdfar_SPEC>;
2666
2667impl NoBitfieldReg<Tdfar_SPEC> for Tdfar {}
2668impl ::core::default::Default for Tdfar {
2669    #[inline(always)]
2670    fn default() -> Tdfar {
2671        <crate::RegValueT<Tdfar_SPEC> as RegisterValue<_>>::new(0)
2672    }
2673}
ra6e1_pac/edmac0.rs

ra6e1_pac/
edmac0.rs
