1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Direct memory access controller 0"]
28unsafe impl ::core::marker::Send for super::Dmac0 {}
29unsafe impl ::core::marker::Sync for super::Dmac0 {}
30impl super::Dmac0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "DMA Source Address Register"]
38 #[inline(always)]
39 pub const fn dmsar(&self) -> &'static crate::common::Reg<self::Dmsar_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Dmsar_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "DMA Destination Address Register"]
48 #[inline(always)]
49 pub const fn dmdar(&self) -> &'static crate::common::Reg<self::Dmdar_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Dmdar_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "DMA Transfer Count Register"]
58 #[inline(always)]
59 pub const fn dmcra(&self) -> &'static crate::common::Reg<self::Dmcra_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Dmcra_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(8usize),
63 )
64 }
65 }
66
67 #[doc = "DMA Block Transfer Count Register"]
68 #[inline(always)]
69 pub const fn dmcrb(&self) -> &'static crate::common::Reg<self::Dmcrb_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Dmcrb_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(12usize),
73 )
74 }
75 }
76
77 #[doc = "DMA Transfer Mode Register"]
78 #[inline(always)]
79 pub const fn dmtmd(&self) -> &'static crate::common::Reg<self::Dmtmd_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Dmtmd_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(16usize),
83 )
84 }
85 }
86
87 #[doc = "DMA Interrupt Setting Register"]
88 #[inline(always)]
89 pub const fn dmint(&self) -> &'static crate::common::Reg<self::Dmint_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Dmint_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(19usize),
93 )
94 }
95 }
96
97 #[doc = "DMA Address Mode Register"]
98 #[inline(always)]
99 pub const fn dmamd(&self) -> &'static crate::common::Reg<self::Dmamd_SPEC, crate::common::RW> {
100 unsafe {
101 crate::common::Reg::<self::Dmamd_SPEC, crate::common::RW>::from_ptr(
102 self._svd2pac_as_ptr().add(20usize),
103 )
104 }
105 }
106
107 #[doc = "DMA Offset Register"]
108 #[inline(always)]
109 pub const fn dmofr(&self) -> &'static crate::common::Reg<self::Dmofr_SPEC, crate::common::RW> {
110 unsafe {
111 crate::common::Reg::<self::Dmofr_SPEC, crate::common::RW>::from_ptr(
112 self._svd2pac_as_ptr().add(24usize),
113 )
114 }
115 }
116
117 #[doc = "DMA Transfer Enable Register"]
118 #[inline(always)]
119 pub const fn dmcnt(&self) -> &'static crate::common::Reg<self::Dmcnt_SPEC, crate::common::RW> {
120 unsafe {
121 crate::common::Reg::<self::Dmcnt_SPEC, crate::common::RW>::from_ptr(
122 self._svd2pac_as_ptr().add(28usize),
123 )
124 }
125 }
126
127 #[doc = "DMA Software Start Register"]
128 #[inline(always)]
129 pub const fn dmreq(&self) -> &'static crate::common::Reg<self::Dmreq_SPEC, crate::common::RW> {
130 unsafe {
131 crate::common::Reg::<self::Dmreq_SPEC, crate::common::RW>::from_ptr(
132 self._svd2pac_as_ptr().add(29usize),
133 )
134 }
135 }
136
137 #[doc = "DMA Status Register"]
138 #[inline(always)]
139 pub const fn dmsts(&self) -> &'static crate::common::Reg<self::Dmsts_SPEC, crate::common::RW> {
140 unsafe {
141 crate::common::Reg::<self::Dmsts_SPEC, crate::common::RW>::from_ptr(
142 self._svd2pac_as_ptr().add(30usize),
143 )
144 }
145 }
146
147 #[doc = "DMA Source Reload Address Register"]
148 #[inline(always)]
149 pub const fn dmsrr(&self) -> &'static crate::common::Reg<self::Dmsrr_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::Dmsrr_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(32usize),
153 )
154 }
155 }
156
157 #[doc = "DMA Destination Reload Address Register"]
158 #[inline(always)]
159 pub const fn dmdrr(&self) -> &'static crate::common::Reg<self::Dmdrr_SPEC, crate::common::RW> {
160 unsafe {
161 crate::common::Reg::<self::Dmdrr_SPEC, crate::common::RW>::from_ptr(
162 self._svd2pac_as_ptr().add(36usize),
163 )
164 }
165 }
166
167 #[doc = "DMA Source Buffer Size Register"]
168 #[inline(always)]
169 pub const fn dmsbs(&self) -> &'static crate::common::Reg<self::Dmsbs_SPEC, crate::common::RW> {
170 unsafe {
171 crate::common::Reg::<self::Dmsbs_SPEC, crate::common::RW>::from_ptr(
172 self._svd2pac_as_ptr().add(40usize),
173 )
174 }
175 }
176
177 #[doc = "DMA Destination Buffer Size Register"]
178 #[inline(always)]
179 pub const fn dmdbs(&self) -> &'static crate::common::Reg<self::Dmdbs_SPEC, crate::common::RW> {
180 unsafe {
181 crate::common::Reg::<self::Dmdbs_SPEC, crate::common::RW>::from_ptr(
182 self._svd2pac_as_ptr().add(44usize),
183 )
184 }
185 }
186}
187#[doc(hidden)]
188#[derive(Copy, Clone, Eq, PartialEq)]
189pub struct Dmsar_SPEC;
190impl crate::sealed::RegSpec for Dmsar_SPEC {
191 type DataType = u32;
192}
193
194#[doc = "DMA Source Address Register"]
195pub type Dmsar = crate::RegValueT<Dmsar_SPEC>;
196
197impl NoBitfieldReg<Dmsar_SPEC> for Dmsar {}
198impl ::core::default::Default for Dmsar {
199 #[inline(always)]
200 fn default() -> Dmsar {
201 <crate::RegValueT<Dmsar_SPEC> as RegisterValue<_>>::new(0)
202 }
203}
204
205#[doc(hidden)]
206#[derive(Copy, Clone, Eq, PartialEq)]
207pub struct Dmdar_SPEC;
208impl crate::sealed::RegSpec for Dmdar_SPEC {
209 type DataType = u32;
210}
211
212#[doc = "DMA Destination Address Register"]
213pub type Dmdar = crate::RegValueT<Dmdar_SPEC>;
214
215impl NoBitfieldReg<Dmdar_SPEC> for Dmdar {}
216impl ::core::default::Default for Dmdar {
217 #[inline(always)]
218 fn default() -> Dmdar {
219 <crate::RegValueT<Dmdar_SPEC> as RegisterValue<_>>::new(0)
220 }
221}
222
223#[doc(hidden)]
224#[derive(Copy, Clone, Eq, PartialEq)]
225pub struct Dmcra_SPEC;
226impl crate::sealed::RegSpec for Dmcra_SPEC {
227 type DataType = u32;
228}
229
230#[doc = "DMA Transfer Count Register"]
231pub type Dmcra = crate::RegValueT<Dmcra_SPEC>;
232
233impl Dmcra {
234 #[doc = "Lower bits of transfer count"]
235 #[inline(always)]
236 pub fn dmcral(
237 self,
238 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Dmcra_SPEC, crate::common::RW>
239 {
240 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Dmcra_SPEC,crate::common::RW>::from_register(self,0)
241 }
242
243 #[doc = "Upper bits of transfer count"]
244 #[inline(always)]
245 pub fn dmcrah(
246 self,
247 ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, u16, Dmcra_SPEC, crate::common::RW>
248 {
249 crate::common::RegisterField::<16,0x3ff,1,0,u16,u16,Dmcra_SPEC,crate::common::RW>::from_register(self,0)
250 }
251}
252impl ::core::default::Default for Dmcra {
253 #[inline(always)]
254 fn default() -> Dmcra {
255 <crate::RegValueT<Dmcra_SPEC> as RegisterValue<_>>::new(0)
256 }
257}
258
259#[doc(hidden)]
260#[derive(Copy, Clone, Eq, PartialEq)]
261pub struct Dmcrb_SPEC;
262impl crate::sealed::RegSpec for Dmcrb_SPEC {
263 type DataType = u32;
264}
265
266#[doc = "DMA Block Transfer Count Register"]
267pub type Dmcrb = crate::RegValueT<Dmcrb_SPEC>;
268
269impl Dmcrb {
270 #[doc = "Functions as a number of block, repeat or repeat-block transfer counter."]
271 #[inline(always)]
272 pub fn dmcrbl(
273 self,
274 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Dmcrb_SPEC, crate::common::RW>
275 {
276 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Dmcrb_SPEC,crate::common::RW>::from_register(self,0)
277 }
278
279 #[doc = "Specifies the number of block, repeat or repeat-block transfer operations."]
280 #[inline(always)]
281 pub fn dmcrbh(
282 self,
283 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Dmcrb_SPEC, crate::common::RW>
284 {
285 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Dmcrb_SPEC,crate::common::RW>::from_register(self,0)
286 }
287}
288impl ::core::default::Default for Dmcrb {
289 #[inline(always)]
290 fn default() -> Dmcrb {
291 <crate::RegValueT<Dmcrb_SPEC> as RegisterValue<_>>::new(0)
292 }
293}
294
295#[doc(hidden)]
296#[derive(Copy, Clone, Eq, PartialEq)]
297pub struct Dmtmd_SPEC;
298impl crate::sealed::RegSpec for Dmtmd_SPEC {
299 type DataType = u16;
300}
301
302#[doc = "DMA Transfer Mode Register"]
303pub type Dmtmd = crate::RegValueT<Dmtmd_SPEC>;
304
305impl Dmtmd {
306 #[doc = "Transfer Request Source Select"]
307 #[inline(always)]
308 pub fn dctg(
309 self,
310 ) -> crate::common::RegisterField<
311 0,
312 0x3,
313 1,
314 0,
315 dmtmd::Dctg,
316 dmtmd::Dctg,
317 Dmtmd_SPEC,
318 crate::common::RW,
319 > {
320 crate::common::RegisterField::<
321 0,
322 0x3,
323 1,
324 0,
325 dmtmd::Dctg,
326 dmtmd::Dctg,
327 Dmtmd_SPEC,
328 crate::common::RW,
329 >::from_register(self, 0)
330 }
331
332 #[doc = "Transfer Data Size Select"]
333 #[inline(always)]
334 pub fn sz(
335 self,
336 ) -> crate::common::RegisterField<
337 8,
338 0x3,
339 1,
340 0,
341 dmtmd::Sz,
342 dmtmd::Sz,
343 Dmtmd_SPEC,
344 crate::common::RW,
345 > {
346 crate::common::RegisterField::<
347 8,
348 0x3,
349 1,
350 0,
351 dmtmd::Sz,
352 dmtmd::Sz,
353 Dmtmd_SPEC,
354 crate::common::RW,
355 >::from_register(self, 0)
356 }
357
358 #[doc = "Transfer Keeping"]
359 #[inline(always)]
360 pub fn tkp(
361 self,
362 ) -> crate::common::RegisterField<
363 10,
364 0x1,
365 1,
366 0,
367 dmtmd::Tkp,
368 dmtmd::Tkp,
369 Dmtmd_SPEC,
370 crate::common::RW,
371 > {
372 crate::common::RegisterField::<
373 10,
374 0x1,
375 1,
376 0,
377 dmtmd::Tkp,
378 dmtmd::Tkp,
379 Dmtmd_SPEC,
380 crate::common::RW,
381 >::from_register(self, 0)
382 }
383
384 #[doc = "Repeat Area Select"]
385 #[inline(always)]
386 pub fn dts(
387 self,
388 ) -> crate::common::RegisterField<
389 12,
390 0x3,
391 1,
392 0,
393 dmtmd::Dts,
394 dmtmd::Dts,
395 Dmtmd_SPEC,
396 crate::common::RW,
397 > {
398 crate::common::RegisterField::<
399 12,
400 0x3,
401 1,
402 0,
403 dmtmd::Dts,
404 dmtmd::Dts,
405 Dmtmd_SPEC,
406 crate::common::RW,
407 >::from_register(self, 0)
408 }
409
410 #[doc = "Transfer Mode Select"]
411 #[inline(always)]
412 pub fn md(
413 self,
414 ) -> crate::common::RegisterField<
415 14,
416 0x3,
417 1,
418 0,
419 dmtmd::Md,
420 dmtmd::Md,
421 Dmtmd_SPEC,
422 crate::common::RW,
423 > {
424 crate::common::RegisterField::<
425 14,
426 0x3,
427 1,
428 0,
429 dmtmd::Md,
430 dmtmd::Md,
431 Dmtmd_SPEC,
432 crate::common::RW,
433 >::from_register(self, 0)
434 }
435}
436impl ::core::default::Default for Dmtmd {
437 #[inline(always)]
438 fn default() -> Dmtmd {
439 <crate::RegValueT<Dmtmd_SPEC> as RegisterValue<_>>::new(0)
440 }
441}
442pub mod dmtmd {
443
444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
445 pub struct Dctg_SPEC;
446 pub type Dctg = crate::EnumBitfieldStruct<u8, Dctg_SPEC>;
447 impl Dctg {
448 #[doc = "Software request"]
449 pub const _00: Self = Self::new(0);
450
451 #[doc = "Hardware request"]
452 pub const _01: Self = Self::new(1);
453
454 #[doc = "Setting prohibited"]
455 pub const _10: Self = Self::new(2);
456
457 #[doc = "Setting prohibited"]
458 pub const _11: Self = Self::new(3);
459 }
460 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
461 pub struct Sz_SPEC;
462 pub type Sz = crate::EnumBitfieldStruct<u8, Sz_SPEC>;
463 impl Sz {
464 #[doc = "8 bits"]
465 pub const _00: Self = Self::new(0);
466
467 #[doc = "16 bits"]
468 pub const _01: Self = Self::new(1);
469
470 #[doc = "32 bits"]
471 pub const _10: Self = Self::new(2);
472
473 #[doc = "Setting prohibited"]
474 pub const _11: Self = Self::new(3);
475 }
476 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
477 pub struct Tkp_SPEC;
478 pub type Tkp = crate::EnumBitfieldStruct<u8, Tkp_SPEC>;
479 impl Tkp {
480 #[doc = "Transfer is stopped by completion of specified total number of transfer operations."]
481 pub const _0: Self = Self::new(0);
482
483 #[doc = "Transfer is not stopped by completion of specified total number of transfer operations (free-running)."]
484 pub const _1: Self = Self::new(1);
485 }
486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
487 pub struct Dts_SPEC;
488 pub type Dts = crate::EnumBitfieldStruct<u8, Dts_SPEC>;
489 impl Dts {
490 #[doc = "The destination is specified as the repeat area or block area."]
491 pub const _00: Self = Self::new(0);
492
493 #[doc = "The source is specified as the repeat area or block area."]
494 pub const _01: Self = Self::new(1);
495
496 #[doc = "The repeat area or block area is not specified."]
497 pub const _10: Self = Self::new(2);
498
499 #[doc = "Setting prohibited."]
500 pub const _11: Self = Self::new(3);
501 }
502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
503 pub struct Md_SPEC;
504 pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
505 impl Md {
506 #[doc = "Normal transfer"]
507 pub const _00: Self = Self::new(0);
508
509 #[doc = "Repeat transfer"]
510 pub const _01: Self = Self::new(1);
511
512 #[doc = "Block transfer"]
513 pub const _10: Self = Self::new(2);
514
515 #[doc = "Repeat-block transfer"]
516 pub const _11: Self = Self::new(3);
517 }
518}
519#[doc(hidden)]
520#[derive(Copy, Clone, Eq, PartialEq)]
521pub struct Dmint_SPEC;
522impl crate::sealed::RegSpec for Dmint_SPEC {
523 type DataType = u8;
524}
525
526#[doc = "DMA Interrupt Setting Register"]
527pub type Dmint = crate::RegValueT<Dmint_SPEC>;
528
529impl Dmint {
530 #[doc = "Destination Address Extended Repeat Area Overflow Interrupt Enable"]
531 #[inline(always)]
532 pub fn darie(
533 self,
534 ) -> crate::common::RegisterField<
535 0,
536 0x1,
537 1,
538 0,
539 dmint::Darie,
540 dmint::Darie,
541 Dmint_SPEC,
542 crate::common::RW,
543 > {
544 crate::common::RegisterField::<
545 0,
546 0x1,
547 1,
548 0,
549 dmint::Darie,
550 dmint::Darie,
551 Dmint_SPEC,
552 crate::common::RW,
553 >::from_register(self, 0)
554 }
555
556 #[doc = "Source Address Extended Repeat Area Overflow Interrupt Enable"]
557 #[inline(always)]
558 pub fn sarie(
559 self,
560 ) -> crate::common::RegisterField<
561 1,
562 0x1,
563 1,
564 0,
565 dmint::Sarie,
566 dmint::Sarie,
567 Dmint_SPEC,
568 crate::common::RW,
569 > {
570 crate::common::RegisterField::<
571 1,
572 0x1,
573 1,
574 0,
575 dmint::Sarie,
576 dmint::Sarie,
577 Dmint_SPEC,
578 crate::common::RW,
579 >::from_register(self, 0)
580 }
581
582 #[doc = "Repeat Size End Interrupt Enable"]
583 #[inline(always)]
584 pub fn rptie(
585 self,
586 ) -> crate::common::RegisterField<
587 2,
588 0x1,
589 1,
590 0,
591 dmint::Rptie,
592 dmint::Rptie,
593 Dmint_SPEC,
594 crate::common::RW,
595 > {
596 crate::common::RegisterField::<
597 2,
598 0x1,
599 1,
600 0,
601 dmint::Rptie,
602 dmint::Rptie,
603 Dmint_SPEC,
604 crate::common::RW,
605 >::from_register(self, 0)
606 }
607
608 #[doc = "Transfer Escape End Interrupt Enable"]
609 #[inline(always)]
610 pub fn esie(
611 self,
612 ) -> crate::common::RegisterField<
613 3,
614 0x1,
615 1,
616 0,
617 dmint::Esie,
618 dmint::Esie,
619 Dmint_SPEC,
620 crate::common::RW,
621 > {
622 crate::common::RegisterField::<
623 3,
624 0x1,
625 1,
626 0,
627 dmint::Esie,
628 dmint::Esie,
629 Dmint_SPEC,
630 crate::common::RW,
631 >::from_register(self, 0)
632 }
633
634 #[doc = "Transfer End Interrupt Enable"]
635 #[inline(always)]
636 pub fn dtie(
637 self,
638 ) -> crate::common::RegisterField<
639 4,
640 0x1,
641 1,
642 0,
643 dmint::Dtie,
644 dmint::Dtie,
645 Dmint_SPEC,
646 crate::common::RW,
647 > {
648 crate::common::RegisterField::<
649 4,
650 0x1,
651 1,
652 0,
653 dmint::Dtie,
654 dmint::Dtie,
655 Dmint_SPEC,
656 crate::common::RW,
657 >::from_register(self, 0)
658 }
659}
660impl ::core::default::Default for Dmint {
661 #[inline(always)]
662 fn default() -> Dmint {
663 <crate::RegValueT<Dmint_SPEC> as RegisterValue<_>>::new(0)
664 }
665}
666pub mod dmint {
667
668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
669 pub struct Darie_SPEC;
670 pub type Darie = crate::EnumBitfieldStruct<u8, Darie_SPEC>;
671 impl Darie {
672 #[doc = "Disables an interrupt request for an extended repeat area overflow on the destination address."]
673 pub const _0: Self = Self::new(0);
674
675 #[doc = "Enables an interrupt request for an extended repeat area overflow on the destination address."]
676 pub const _1: Self = Self::new(1);
677 }
678 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
679 pub struct Sarie_SPEC;
680 pub type Sarie = crate::EnumBitfieldStruct<u8, Sarie_SPEC>;
681 impl Sarie {
682 #[doc = "Disables an interrupt request for an extended repeat area overflow on the source address."]
683 pub const _0: Self = Self::new(0);
684
685 #[doc = "Enables an interrupt request for an extended repeat area overflow on the source address."]
686 pub const _1: Self = Self::new(1);
687 }
688 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
689 pub struct Rptie_SPEC;
690 pub type Rptie = crate::EnumBitfieldStruct<u8, Rptie_SPEC>;
691 impl Rptie {
692 #[doc = "Disables the repeat size end interrupt request."]
693 pub const _0: Self = Self::new(0);
694
695 #[doc = "Enables the repeat size end interrupt request."]
696 pub const _1: Self = Self::new(1);
697 }
698 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
699 pub struct Esie_SPEC;
700 pub type Esie = crate::EnumBitfieldStruct<u8, Esie_SPEC>;
701 impl Esie {
702 #[doc = "Disables the transfer escape end interrupt request."]
703 pub const _0: Self = Self::new(0);
704
705 #[doc = "Enables the transfer escape end interrupt request."]
706 pub const _1: Self = Self::new(1);
707 }
708 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
709 pub struct Dtie_SPEC;
710 pub type Dtie = crate::EnumBitfieldStruct<u8, Dtie_SPEC>;
711 impl Dtie {
712 #[doc = "Disables the transfer end interrupt request."]
713 pub const _0: Self = Self::new(0);
714
715 #[doc = "Enables the transfer end interrupt request."]
716 pub const _1: Self = Self::new(1);
717 }
718}
719#[doc(hidden)]
720#[derive(Copy, Clone, Eq, PartialEq)]
721pub struct Dmamd_SPEC;
722impl crate::sealed::RegSpec for Dmamd_SPEC {
723 type DataType = u16;
724}
725
726#[doc = "DMA Address Mode Register"]
727pub type Dmamd = crate::RegValueT<Dmamd_SPEC>;
728
729impl Dmamd {
730 #[doc = "Destination Address Extended Repeat Area"]
731 #[inline(always)]
732 pub fn dara(
733 self,
734 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Dmamd_SPEC, crate::common::RW> {
735 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Dmamd_SPEC,crate::common::RW>::from_register(self,0)
736 }
737
738 #[doc = "Destination Address Update Select After Reload"]
739 #[inline(always)]
740 pub fn dadr(
741 self,
742 ) -> crate::common::RegisterField<
743 5,
744 0x1,
745 1,
746 0,
747 dmamd::Dadr,
748 dmamd::Dadr,
749 Dmamd_SPEC,
750 crate::common::RW,
751 > {
752 crate::common::RegisterField::<
753 5,
754 0x1,
755 1,
756 0,
757 dmamd::Dadr,
758 dmamd::Dadr,
759 Dmamd_SPEC,
760 crate::common::RW,
761 >::from_register(self, 0)
762 }
763
764 #[doc = "Destination Address Update Mode"]
765 #[inline(always)]
766 pub fn dm(
767 self,
768 ) -> crate::common::RegisterField<
769 6,
770 0x3,
771 1,
772 0,
773 dmamd::Dm,
774 dmamd::Dm,
775 Dmamd_SPEC,
776 crate::common::RW,
777 > {
778 crate::common::RegisterField::<
779 6,
780 0x3,
781 1,
782 0,
783 dmamd::Dm,
784 dmamd::Dm,
785 Dmamd_SPEC,
786 crate::common::RW,
787 >::from_register(self, 0)
788 }
789
790 #[doc = "Source Address Extended Repeat Area"]
791 #[inline(always)]
792 pub fn sara(
793 self,
794 ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Dmamd_SPEC, crate::common::RW> {
795 crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Dmamd_SPEC,crate::common::RW>::from_register(self,0)
796 }
797
798 #[doc = "Source Address Update Select After Reload"]
799 #[inline(always)]
800 pub fn sadr(
801 self,
802 ) -> crate::common::RegisterField<
803 13,
804 0x1,
805 1,
806 0,
807 dmamd::Sadr,
808 dmamd::Sadr,
809 Dmamd_SPEC,
810 crate::common::RW,
811 > {
812 crate::common::RegisterField::<
813 13,
814 0x1,
815 1,
816 0,
817 dmamd::Sadr,
818 dmamd::Sadr,
819 Dmamd_SPEC,
820 crate::common::RW,
821 >::from_register(self, 0)
822 }
823
824 #[doc = "Source Address Update Mode"]
825 #[inline(always)]
826 pub fn sm(
827 self,
828 ) -> crate::common::RegisterField<
829 14,
830 0x3,
831 1,
832 0,
833 dmamd::Sm,
834 dmamd::Sm,
835 Dmamd_SPEC,
836 crate::common::RW,
837 > {
838 crate::common::RegisterField::<
839 14,
840 0x3,
841 1,
842 0,
843 dmamd::Sm,
844 dmamd::Sm,
845 Dmamd_SPEC,
846 crate::common::RW,
847 >::from_register(self, 0)
848 }
849}
850impl ::core::default::Default for Dmamd {
851 #[inline(always)]
852 fn default() -> Dmamd {
853 <crate::RegValueT<Dmamd_SPEC> as RegisterValue<_>>::new(0)
854 }
855}
856pub mod dmamd {
857
858 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
859 pub struct Dadr_SPEC;
860 pub type Dadr = crate::EnumBitfieldStruct<u8, Dadr_SPEC>;
861 impl Dadr {
862 #[doc = "Only reloading."]
863 pub const _0: Self = Self::new(0);
864
865 #[doc = "Add index after reloading."]
866 pub const _1: Self = Self::new(1);
867 }
868 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
869 pub struct Dm_SPEC;
870 pub type Dm = crate::EnumBitfieldStruct<u8, Dm_SPEC>;
871 impl Dm {
872 #[doc = "Destination address is fixed."]
873 pub const _00: Self = Self::new(0);
874
875 #[doc = "Offset addition."]
876 pub const _01: Self = Self::new(1);
877
878 #[doc = "Destination address is incremented."]
879 pub const _10: Self = Self::new(2);
880
881 #[doc = "Destination address is decremented."]
882 pub const _11: Self = Self::new(3);
883 }
884 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
885 pub struct Sadr_SPEC;
886 pub type Sadr = crate::EnumBitfieldStruct<u8, Sadr_SPEC>;
887 impl Sadr {
888 #[doc = "Only reloading."]
889 pub const _0: Self = Self::new(0);
890
891 #[doc = "Add index after reloading."]
892 pub const _1: Self = Self::new(1);
893 }
894 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
895 pub struct Sm_SPEC;
896 pub type Sm = crate::EnumBitfieldStruct<u8, Sm_SPEC>;
897 impl Sm {
898 #[doc = "Source address is fixed."]
899 pub const _00: Self = Self::new(0);
900
901 #[doc = "Offset addition."]
902 pub const _01: Self = Self::new(1);
903
904 #[doc = "Source address is incremented."]
905 pub const _10: Self = Self::new(2);
906
907 #[doc = "Source address is decremented."]
908 pub const _11: Self = Self::new(3);
909 }
910}
911#[doc(hidden)]
912#[derive(Copy, Clone, Eq, PartialEq)]
913pub struct Dmofr_SPEC;
914impl crate::sealed::RegSpec for Dmofr_SPEC {
915 type DataType = u32;
916}
917
918#[doc = "DMA Offset Register"]
919pub type Dmofr = crate::RegValueT<Dmofr_SPEC>;
920
921impl NoBitfieldReg<Dmofr_SPEC> for Dmofr {}
922impl ::core::default::Default for Dmofr {
923 #[inline(always)]
924 fn default() -> Dmofr {
925 <crate::RegValueT<Dmofr_SPEC> as RegisterValue<_>>::new(0)
926 }
927}
928
929#[doc(hidden)]
930#[derive(Copy, Clone, Eq, PartialEq)]
931pub struct Dmcnt_SPEC;
932impl crate::sealed::RegSpec for Dmcnt_SPEC {
933 type DataType = u8;
934}
935
936#[doc = "DMA Transfer Enable Register"]
937pub type Dmcnt = crate::RegValueT<Dmcnt_SPEC>;
938
939impl Dmcnt {
940 #[doc = "DMA Transfer Enable"]
941 #[inline(always)]
942 pub fn dte(
943 self,
944 ) -> crate::common::RegisterField<
945 0,
946 0x1,
947 1,
948 0,
949 dmcnt::Dte,
950 dmcnt::Dte,
951 Dmcnt_SPEC,
952 crate::common::RW,
953 > {
954 crate::common::RegisterField::<
955 0,
956 0x1,
957 1,
958 0,
959 dmcnt::Dte,
960 dmcnt::Dte,
961 Dmcnt_SPEC,
962 crate::common::RW,
963 >::from_register(self, 0)
964 }
965}
966impl ::core::default::Default for Dmcnt {
967 #[inline(always)]
968 fn default() -> Dmcnt {
969 <crate::RegValueT<Dmcnt_SPEC> as RegisterValue<_>>::new(0)
970 }
971}
972pub mod dmcnt {
973
974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
975 pub struct Dte_SPEC;
976 pub type Dte = crate::EnumBitfieldStruct<u8, Dte_SPEC>;
977 impl Dte {
978 #[doc = "Disables DMA transfer."]
979 pub const _0: Self = Self::new(0);
980
981 #[doc = "Enables DMA transfer."]
982 pub const _1: Self = Self::new(1);
983 }
984}
985#[doc(hidden)]
986#[derive(Copy, Clone, Eq, PartialEq)]
987pub struct Dmreq_SPEC;
988impl crate::sealed::RegSpec for Dmreq_SPEC {
989 type DataType = u8;
990}
991
992#[doc = "DMA Software Start Register"]
993pub type Dmreq = crate::RegValueT<Dmreq_SPEC>;
994
995impl Dmreq {
996 #[doc = "DMA Software Start"]
997 #[inline(always)]
998 pub fn swreq(
999 self,
1000 ) -> crate::common::RegisterField<
1001 0,
1002 0x1,
1003 1,
1004 0,
1005 dmreq::Swreq,
1006 dmreq::Swreq,
1007 Dmreq_SPEC,
1008 crate::common::RW,
1009 > {
1010 crate::common::RegisterField::<
1011 0,
1012 0x1,
1013 1,
1014 0,
1015 dmreq::Swreq,
1016 dmreq::Swreq,
1017 Dmreq_SPEC,
1018 crate::common::RW,
1019 >::from_register(self, 0)
1020 }
1021
1022 #[doc = "DMA Software Start Bit Auto Clear Select"]
1023 #[inline(always)]
1024 pub fn clrs(
1025 self,
1026 ) -> crate::common::RegisterField<
1027 4,
1028 0x1,
1029 1,
1030 0,
1031 dmreq::Clrs,
1032 dmreq::Clrs,
1033 Dmreq_SPEC,
1034 crate::common::RW,
1035 > {
1036 crate::common::RegisterField::<
1037 4,
1038 0x1,
1039 1,
1040 0,
1041 dmreq::Clrs,
1042 dmreq::Clrs,
1043 Dmreq_SPEC,
1044 crate::common::RW,
1045 >::from_register(self, 0)
1046 }
1047}
1048impl ::core::default::Default for Dmreq {
1049 #[inline(always)]
1050 fn default() -> Dmreq {
1051 <crate::RegValueT<Dmreq_SPEC> as RegisterValue<_>>::new(0)
1052 }
1053}
1054pub mod dmreq {
1055
1056 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1057 pub struct Swreq_SPEC;
1058 pub type Swreq = crate::EnumBitfieldStruct<u8, Swreq_SPEC>;
1059 impl Swreq {
1060 #[doc = "DMA transfer is not requested."]
1061 pub const _0: Self = Self::new(0);
1062
1063 #[doc = "DMA transfer is requested."]
1064 pub const _1: Self = Self::new(1);
1065 }
1066 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1067 pub struct Clrs_SPEC;
1068 pub type Clrs = crate::EnumBitfieldStruct<u8, Clrs_SPEC>;
1069 impl Clrs {
1070 #[doc = "SWREQ bit is cleared after DMA transfer is started by software."]
1071 pub const _0: Self = Self::new(0);
1072
1073 #[doc = "SWREQ bit is not cleared after DMA transfer is started by software."]
1074 pub const _1: Self = Self::new(1);
1075 }
1076}
1077#[doc(hidden)]
1078#[derive(Copy, Clone, Eq, PartialEq)]
1079pub struct Dmsts_SPEC;
1080impl crate::sealed::RegSpec for Dmsts_SPEC {
1081 type DataType = u8;
1082}
1083
1084#[doc = "DMA Status Register"]
1085pub type Dmsts = crate::RegValueT<Dmsts_SPEC>;
1086
1087impl Dmsts {
1088 #[doc = "Transfer Escape End Interrupt Flag"]
1089 #[inline(always)]
1090 pub fn esif(
1091 self,
1092 ) -> crate::common::RegisterField<
1093 0,
1094 0x1,
1095 1,
1096 0,
1097 dmsts::Esif,
1098 dmsts::Esif,
1099 Dmsts_SPEC,
1100 crate::common::RW,
1101 > {
1102 crate::common::RegisterField::<
1103 0,
1104 0x1,
1105 1,
1106 0,
1107 dmsts::Esif,
1108 dmsts::Esif,
1109 Dmsts_SPEC,
1110 crate::common::RW,
1111 >::from_register(self, 0)
1112 }
1113
1114 #[doc = "Transfer End Interrupt Flag"]
1115 #[inline(always)]
1116 pub fn dtif(
1117 self,
1118 ) -> crate::common::RegisterField<
1119 4,
1120 0x1,
1121 1,
1122 0,
1123 dmsts::Dtif,
1124 dmsts::Dtif,
1125 Dmsts_SPEC,
1126 crate::common::RW,
1127 > {
1128 crate::common::RegisterField::<
1129 4,
1130 0x1,
1131 1,
1132 0,
1133 dmsts::Dtif,
1134 dmsts::Dtif,
1135 Dmsts_SPEC,
1136 crate::common::RW,
1137 >::from_register(self, 0)
1138 }
1139
1140 #[doc = "DMAC Active Flag"]
1141 #[inline(always)]
1142 pub fn act(
1143 self,
1144 ) -> crate::common::RegisterField<
1145 7,
1146 0x1,
1147 1,
1148 0,
1149 dmsts::Act,
1150 dmsts::Act,
1151 Dmsts_SPEC,
1152 crate::common::R,
1153 > {
1154 crate::common::RegisterField::<
1155 7,
1156 0x1,
1157 1,
1158 0,
1159 dmsts::Act,
1160 dmsts::Act,
1161 Dmsts_SPEC,
1162 crate::common::R,
1163 >::from_register(self, 0)
1164 }
1165}
1166impl ::core::default::Default for Dmsts {
1167 #[inline(always)]
1168 fn default() -> Dmsts {
1169 <crate::RegValueT<Dmsts_SPEC> as RegisterValue<_>>::new(0)
1170 }
1171}
1172pub mod dmsts {
1173
1174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1175 pub struct Esif_SPEC;
1176 pub type Esif = crate::EnumBitfieldStruct<u8, Esif_SPEC>;
1177 impl Esif {
1178 #[doc = "A transfer escape end interrupt has not been generated."]
1179 pub const _0: Self = Self::new(0);
1180
1181 #[doc = "A transfer escape end interrupt has been generated."]
1182 pub const _1: Self = Self::new(1);
1183 }
1184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1185 pub struct Dtif_SPEC;
1186 pub type Dtif = crate::EnumBitfieldStruct<u8, Dtif_SPEC>;
1187 impl Dtif {
1188 #[doc = "A transfer end interrupt has not been generated."]
1189 pub const _0: Self = Self::new(0);
1190
1191 #[doc = "A transfer end interrupt has been generated."]
1192 pub const _1: Self = Self::new(1);
1193 }
1194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1195 pub struct Act_SPEC;
1196 pub type Act = crate::EnumBitfieldStruct<u8, Act_SPEC>;
1197 impl Act {
1198 #[doc = "DMAC is in the idle state."]
1199 pub const _0: Self = Self::new(0);
1200
1201 #[doc = "DMAC is operating."]
1202 pub const _1: Self = Self::new(1);
1203 }
1204}
1205#[doc(hidden)]
1206#[derive(Copy, Clone, Eq, PartialEq)]
1207pub struct Dmsrr_SPEC;
1208impl crate::sealed::RegSpec for Dmsrr_SPEC {
1209 type DataType = u32;
1210}
1211
1212#[doc = "DMA Source Reload Address Register"]
1213pub type Dmsrr = crate::RegValueT<Dmsrr_SPEC>;
1214
1215impl NoBitfieldReg<Dmsrr_SPEC> for Dmsrr {}
1216impl ::core::default::Default for Dmsrr {
1217 #[inline(always)]
1218 fn default() -> Dmsrr {
1219 <crate::RegValueT<Dmsrr_SPEC> as RegisterValue<_>>::new(0)
1220 }
1221}
1222
1223#[doc(hidden)]
1224#[derive(Copy, Clone, Eq, PartialEq)]
1225pub struct Dmdrr_SPEC;
1226impl crate::sealed::RegSpec for Dmdrr_SPEC {
1227 type DataType = u32;
1228}
1229
1230#[doc = "DMA Destination Reload Address Register"]
1231pub type Dmdrr = crate::RegValueT<Dmdrr_SPEC>;
1232
1233impl NoBitfieldReg<Dmdrr_SPEC> for Dmdrr {}
1234impl ::core::default::Default for Dmdrr {
1235 #[inline(always)]
1236 fn default() -> Dmdrr {
1237 <crate::RegValueT<Dmdrr_SPEC> as RegisterValue<_>>::new(0)
1238 }
1239}
1240
1241#[doc(hidden)]
1242#[derive(Copy, Clone, Eq, PartialEq)]
1243pub struct Dmsbs_SPEC;
1244impl crate::sealed::RegSpec for Dmsbs_SPEC {
1245 type DataType = u32;
1246}
1247
1248#[doc = "DMA Source Buffer Size Register"]
1249pub type Dmsbs = crate::RegValueT<Dmsbs_SPEC>;
1250
1251impl Dmsbs {
1252 #[doc = "Functions as data transfer counter in repeat-block transfer mode"]
1253 #[inline(always)]
1254 pub fn dmsbsl(
1255 self,
1256 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Dmsbs_SPEC, crate::common::RW>
1257 {
1258 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Dmsbs_SPEC,crate::common::RW>::from_register(self,0)
1259 }
1260
1261 #[doc = "Specifies the repeat-area size in repeat-block transfer mode"]
1262 #[inline(always)]
1263 pub fn dmsbsh(
1264 self,
1265 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Dmsbs_SPEC, crate::common::RW>
1266 {
1267 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Dmsbs_SPEC,crate::common::RW>::from_register(self,0)
1268 }
1269}
1270impl ::core::default::Default for Dmsbs {
1271 #[inline(always)]
1272 fn default() -> Dmsbs {
1273 <crate::RegValueT<Dmsbs_SPEC> as RegisterValue<_>>::new(0)
1274 }
1275}
1276
1277#[doc(hidden)]
1278#[derive(Copy, Clone, Eq, PartialEq)]
1279pub struct Dmdbs_SPEC;
1280impl crate::sealed::RegSpec for Dmdbs_SPEC {
1281 type DataType = u32;
1282}
1283
1284#[doc = "DMA Destination Buffer Size Register"]
1285pub type Dmdbs = crate::RegValueT<Dmdbs_SPEC>;
1286
1287impl Dmdbs {
1288 #[doc = "Functions as data transfer counter in repeat-block transfer mode."]
1289 #[inline(always)]
1290 pub fn dmdbsl(
1291 self,
1292 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Dmdbs_SPEC, crate::common::RW>
1293 {
1294 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Dmdbs_SPEC,crate::common::RW>::from_register(self,0)
1295 }
1296
1297 #[doc = "Specifies the repeat-area size in repeat-block transfer mode."]
1298 #[inline(always)]
1299 pub fn dmdbsh(
1300 self,
1301 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Dmdbs_SPEC, crate::common::RW>
1302 {
1303 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Dmdbs_SPEC,crate::common::RW>::from_register(self,0)
1304 }
1305}
1306impl ::core::default::Default for Dmdbs {
1307 #[inline(always)]
1308 fn default() -> Dmdbs {
1309 <crate::RegValueT<Dmdbs_SPEC> as RegisterValue<_>>::new(0)
1310 }
1311}