1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SRAM Control"]
28unsafe impl ::core::marker::Send for super::Sram {}
29unsafe impl ::core::marker::Sync for super::Sram {}
30impl super::Sram {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SRAM Parity Error Operation After Detection Register"]
38 #[inline(always)]
39 pub const fn parioad(
40 &self,
41 ) -> &'static crate::common::Reg<self::Parioad_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Parioad_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "SRAM Protection Register"]
50 #[inline(always)]
51 pub const fn sramprcr(
52 &self,
53 ) -> &'static crate::common::Reg<self::Sramprcr_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Sramprcr_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(4usize),
57 )
58 }
59 }
60
61 #[doc = "SRAM Wait State Control Register"]
62 #[inline(always)]
63 pub const fn sramwtsc(
64 &self,
65 ) -> &'static crate::common::Reg<self::Sramwtsc_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Sramwtsc_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(8usize),
69 )
70 }
71 }
72
73 #[doc = "SRAM Protection Register 2"]
74 #[inline(always)]
75 pub const fn sramprcr2(
76 &self,
77 ) -> &'static crate::common::Reg<self::Sramprcr2_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Sramprcr2_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(12usize),
81 )
82 }
83 }
84}
85#[doc(hidden)]
86#[derive(Copy, Clone, Eq, PartialEq)]
87pub struct Parioad_SPEC;
88impl crate::sealed::RegSpec for Parioad_SPEC {
89 type DataType = u8;
90}
91
92#[doc = "SRAM Parity Error Operation After Detection Register"]
93pub type Parioad = crate::RegValueT<Parioad_SPEC>;
94
95impl Parioad {
96 #[doc = "Operation After Detection"]
97 #[inline(always)]
98 pub fn oad(
99 self,
100 ) -> crate::common::RegisterField<
101 0,
102 0x1,
103 1,
104 0,
105 parioad::Oad,
106 parioad::Oad,
107 Parioad_SPEC,
108 crate::common::RW,
109 > {
110 crate::common::RegisterField::<
111 0,
112 0x1,
113 1,
114 0,
115 parioad::Oad,
116 parioad::Oad,
117 Parioad_SPEC,
118 crate::common::RW,
119 >::from_register(self, 0)
120 }
121}
122impl ::core::default::Default for Parioad {
123 #[inline(always)]
124 fn default() -> Parioad {
125 <crate::RegValueT<Parioad_SPEC> as RegisterValue<_>>::new(0)
126 }
127}
128pub mod parioad {
129
130 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
131 pub struct Oad_SPEC;
132 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
133 impl Oad {
134 #[doc = "Non-maskable interrupt"]
135 pub const _0: Self = Self::new(0);
136
137 #[doc = "Reset"]
138 pub const _1: Self = Self::new(1);
139 }
140}
141#[doc(hidden)]
142#[derive(Copy, Clone, Eq, PartialEq)]
143pub struct Sramprcr_SPEC;
144impl crate::sealed::RegSpec for Sramprcr_SPEC {
145 type DataType = u8;
146}
147
148#[doc = "SRAM Protection Register"]
149pub type Sramprcr = crate::RegValueT<Sramprcr_SPEC>;
150
151impl Sramprcr {
152 #[doc = "Register Write Control"]
153 #[inline(always)]
154 pub fn sramprcr(
155 self,
156 ) -> crate::common::RegisterField<
157 0,
158 0x1,
159 1,
160 0,
161 sramprcr::Sramprcr,
162 sramprcr::Sramprcr,
163 Sramprcr_SPEC,
164 crate::common::RW,
165 > {
166 crate::common::RegisterField::<
167 0,
168 0x1,
169 1,
170 0,
171 sramprcr::Sramprcr,
172 sramprcr::Sramprcr,
173 Sramprcr_SPEC,
174 crate::common::RW,
175 >::from_register(self, 0)
176 }
177
178 #[doc = "Write Key Code"]
179 #[inline(always)]
180 pub fn kw(
181 self,
182 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sramprcr_SPEC, crate::common::W> {
183 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sramprcr_SPEC,crate::common::W>::from_register(self,0)
184 }
185}
186impl ::core::default::Default for Sramprcr {
187 #[inline(always)]
188 fn default() -> Sramprcr {
189 <crate::RegValueT<Sramprcr_SPEC> as RegisterValue<_>>::new(0)
190 }
191}
192pub mod sramprcr {
193
194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
195 pub struct Sramprcr_SPEC;
196 pub type Sramprcr = crate::EnumBitfieldStruct<u8, Sramprcr_SPEC>;
197 impl Sramprcr {
198 #[doc = "Disable writes to protected registers"]
199 pub const _0: Self = Self::new(0);
200
201 #[doc = "Enable writes to protected registers"]
202 pub const _1: Self = Self::new(1);
203 }
204}
205#[doc(hidden)]
206#[derive(Copy, Clone, Eq, PartialEq)]
207pub struct Sramwtsc_SPEC;
208impl crate::sealed::RegSpec for Sramwtsc_SPEC {
209 type DataType = u8;
210}
211
212#[doc = "SRAM Wait State Control Register"]
213pub type Sramwtsc = crate::RegValueT<Sramwtsc_SPEC>;
214
215impl Sramwtsc {
216 #[doc = "SRAM0 wait enable"]
217 #[inline(always)]
218 pub fn sram0wten(
219 self,
220 ) -> crate::common::RegisterField<
221 0,
222 0x1,
223 1,
224 0,
225 sramwtsc::Sram0Wten,
226 sramwtsc::Sram0Wten,
227 Sramwtsc_SPEC,
228 crate::common::RW,
229 > {
230 crate::common::RegisterField::<
231 0,
232 0x1,
233 1,
234 0,
235 sramwtsc::Sram0Wten,
236 sramwtsc::Sram0Wten,
237 Sramwtsc_SPEC,
238 crate::common::RW,
239 >::from_register(self, 0)
240 }
241}
242impl ::core::default::Default for Sramwtsc {
243 #[inline(always)]
244 fn default() -> Sramwtsc {
245 <crate::RegValueT<Sramwtsc_SPEC> as RegisterValue<_>>::new(1)
246 }
247}
248pub mod sramwtsc {
249
250 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
251 pub struct Sram0Wten_SPEC;
252 pub type Sram0Wten = crate::EnumBitfieldStruct<u8, Sram0Wten_SPEC>;
253 impl Sram0Wten {
254 #[doc = "No wait"]
255 pub const _0: Self = Self::new(0);
256
257 #[doc = "Add wait state in read access cycle to SRAM0"]
258 pub const _1: Self = Self::new(1);
259 }
260}
261#[doc(hidden)]
262#[derive(Copy, Clone, Eq, PartialEq)]
263pub struct Sramprcr2_SPEC;
264impl crate::sealed::RegSpec for Sramprcr2_SPEC {
265 type DataType = u8;
266}
267
268#[doc = "SRAM Protection Register 2"]
269pub type Sramprcr2 = crate::RegValueT<Sramprcr2_SPEC>;
270
271impl Sramprcr2 {
272 #[doc = "Register Write Control"]
273 #[inline(always)]
274 pub fn sramprcr2(
275 self,
276 ) -> crate::common::RegisterField<
277 0,
278 0x1,
279 1,
280 0,
281 sramprcr2::Sramprcr2,
282 sramprcr2::Sramprcr2,
283 Sramprcr2_SPEC,
284 crate::common::RW,
285 > {
286 crate::common::RegisterField::<
287 0,
288 0x1,
289 1,
290 0,
291 sramprcr2::Sramprcr2,
292 sramprcr2::Sramprcr2,
293 Sramprcr2_SPEC,
294 crate::common::RW,
295 >::from_register(self, 0)
296 }
297
298 #[doc = "Write Key Code"]
299 #[inline(always)]
300 pub fn kw(
301 self,
302 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sramprcr2_SPEC, crate::common::W> {
303 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sramprcr2_SPEC,crate::common::W>::from_register(self,0)
304 }
305}
306impl ::core::default::Default for Sramprcr2 {
307 #[inline(always)]
308 fn default() -> Sramprcr2 {
309 <crate::RegValueT<Sramprcr2_SPEC> as RegisterValue<_>>::new(0)
310 }
311}
312pub mod sramprcr2 {
313
314 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
315 pub struct Sramprcr2_SPEC;
316 pub type Sramprcr2 = crate::EnumBitfieldStruct<u8, Sramprcr2_SPEC>;
317 impl Sramprcr2 {
318 #[doc = "Disable writes to the protected registers"]
319 pub const _0: Self = Self::new(0);
320
321 #[doc = "Enable writes to the protected registers"]
322 pub const _1: Self = Self::new(1);
323 }
324}