1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface 0"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "SPI Control Register"]
38 #[inline(always)]
39 pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "SPI Slave Select Polarity Register"]
48 #[inline(always)]
49 pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(1usize),
53 )
54 }
55 }
56
57 #[doc = "SPI Pin Control Register"]
58 #[inline(always)]
59 pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(2usize),
63 )
64 }
65 }
66
67 #[doc = "SPI Status Register"]
68 #[inline(always)]
69 pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
70 unsafe {
71 crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
72 self._svd2pac_as_ptr().add(3usize),
73 )
74 }
75 }
76
77 #[doc = "SPI Data Register"]
78 #[inline(always)]
79 pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
80 unsafe {
81 crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
82 self._svd2pac_as_ptr().add(4usize),
83 )
84 }
85 }
86
87 #[doc = "SPI Data Register"]
88 #[inline(always)]
89 pub const fn spdr_ha(
90 &self,
91 ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
92 unsafe {
93 crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
94 self._svd2pac_as_ptr().add(4usize),
95 )
96 }
97 }
98
99 #[doc = "SPI Data Register"]
100 #[inline(always)]
101 pub const fn spdr_by(
102 &self,
103 ) -> &'static crate::common::Reg<self::SpdrBy_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::SpdrBy_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(4usize),
107 )
108 }
109 }
110
111 #[doc = "SPI Sequence Control Register"]
112 #[inline(always)]
113 pub const fn spscr(&self) -> &'static crate::common::Reg<self::Spscr_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Spscr_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(8usize),
117 )
118 }
119 }
120
121 #[doc = "SPI Sequence Status Register"]
122 #[inline(always)]
123 pub const fn spssr(&self) -> &'static crate::common::Reg<self::Spssr_SPEC, crate::common::R> {
124 unsafe {
125 crate::common::Reg::<self::Spssr_SPEC, crate::common::R>::from_ptr(
126 self._svd2pac_as_ptr().add(9usize),
127 )
128 }
129 }
130
131 #[doc = "SPI Bit Rate Register"]
132 #[inline(always)]
133 pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(10usize),
137 )
138 }
139 }
140
141 #[doc = "SPI Data Control Register"]
142 #[inline(always)]
143 pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
144 unsafe {
145 crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
146 self._svd2pac_as_ptr().add(11usize),
147 )
148 }
149 }
150
151 #[doc = "SPI Clock Delay Register"]
152 #[inline(always)]
153 pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
154 unsafe {
155 crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
156 self._svd2pac_as_ptr().add(12usize),
157 )
158 }
159 }
160
161 #[doc = "SPI Slave Select Negation Delay Register"]
162 #[inline(always)]
163 pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
164 unsafe {
165 crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
166 self._svd2pac_as_ptr().add(13usize),
167 )
168 }
169 }
170
171 #[doc = "SPI Next-Access Delay Register"]
172 #[inline(always)]
173 pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(14usize),
177 )
178 }
179 }
180
181 #[doc = "SPI Control Register 2"]
182 #[inline(always)]
183 pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
184 unsafe {
185 crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
186 self._svd2pac_as_ptr().add(15usize),
187 )
188 }
189 }
190
191 #[doc = "SPI Command Register %s"]
192 #[inline(always)]
193 pub const fn spcmd(
194 &self,
195 ) -> &'static crate::common::ClusterRegisterArray<
196 crate::common::Reg<self::Spcmd_SPEC, crate::common::RW>,
197 8,
198 0x2,
199 > {
200 unsafe {
201 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x10usize))
202 }
203 }
204 #[inline(always)]
205 pub const fn spcmd0(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
206 unsafe {
207 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
208 self._svd2pac_as_ptr().add(0x10usize),
209 )
210 }
211 }
212 #[inline(always)]
213 pub const fn spcmd1(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
214 unsafe {
215 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
216 self._svd2pac_as_ptr().add(0x12usize),
217 )
218 }
219 }
220 #[inline(always)]
221 pub const fn spcmd2(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
222 unsafe {
223 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
224 self._svd2pac_as_ptr().add(0x14usize),
225 )
226 }
227 }
228 #[inline(always)]
229 pub const fn spcmd3(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(0x16usize),
233 )
234 }
235 }
236 #[inline(always)]
237 pub const fn spcmd4(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
238 unsafe {
239 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
240 self._svd2pac_as_ptr().add(0x18usize),
241 )
242 }
243 }
244 #[inline(always)]
245 pub const fn spcmd5(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
246 unsafe {
247 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
248 self._svd2pac_as_ptr().add(0x1ausize),
249 )
250 }
251 }
252 #[inline(always)]
253 pub const fn spcmd6(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
254 unsafe {
255 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
256 self._svd2pac_as_ptr().add(0x1cusize),
257 )
258 }
259 }
260 #[inline(always)]
261 pub const fn spcmd7(&self) -> &'static crate::common::Reg<self::Spcmd_SPEC, crate::common::RW> {
262 unsafe {
263 crate::common::Reg::<self::Spcmd_SPEC, crate::common::RW>::from_ptr(
264 self._svd2pac_as_ptr().add(0x1eusize),
265 )
266 }
267 }
268
269 #[doc = "SPI Data Control Register 2"]
270 #[inline(always)]
271 pub const fn spdcr2(
272 &self,
273 ) -> &'static crate::common::Reg<self::Spdcr2_SPEC, crate::common::RW> {
274 unsafe {
275 crate::common::Reg::<self::Spdcr2_SPEC, crate::common::RW>::from_ptr(
276 self._svd2pac_as_ptr().add(32usize),
277 )
278 }
279 }
280
281 #[doc = "SPI Control Register 3"]
282 #[inline(always)]
283 pub const fn spcr3(&self) -> &'static crate::common::Reg<self::Spcr3_SPEC, crate::common::RW> {
284 unsafe {
285 crate::common::Reg::<self::Spcr3_SPEC, crate::common::RW>::from_ptr(
286 self._svd2pac_as_ptr().add(33usize),
287 )
288 }
289 }
290}
291#[doc(hidden)]
292#[derive(Copy, Clone, Eq, PartialEq)]
293pub struct Spcr_SPEC;
294impl crate::sealed::RegSpec for Spcr_SPEC {
295 type DataType = u8;
296}
297
298#[doc = "SPI Control Register"]
299pub type Spcr = crate::RegValueT<Spcr_SPEC>;
300
301impl Spcr {
302 #[doc = "SPI Mode Select"]
303 #[inline(always)]
304 pub fn spms(
305 self,
306 ) -> crate::common::RegisterField<
307 0,
308 0x1,
309 1,
310 0,
311 spcr::Spms,
312 spcr::Spms,
313 Spcr_SPEC,
314 crate::common::RW,
315 > {
316 crate::common::RegisterField::<
317 0,
318 0x1,
319 1,
320 0,
321 spcr::Spms,
322 spcr::Spms,
323 Spcr_SPEC,
324 crate::common::RW,
325 >::from_register(self, 0)
326 }
327
328 #[doc = "Communications Operating Mode Select"]
329 #[inline(always)]
330 pub fn txmd(
331 self,
332 ) -> crate::common::RegisterField<
333 1,
334 0x1,
335 1,
336 0,
337 spcr::Txmd,
338 spcr::Txmd,
339 Spcr_SPEC,
340 crate::common::RW,
341 > {
342 crate::common::RegisterField::<
343 1,
344 0x1,
345 1,
346 0,
347 spcr::Txmd,
348 spcr::Txmd,
349 Spcr_SPEC,
350 crate::common::RW,
351 >::from_register(self, 0)
352 }
353
354 #[doc = "Mode Fault Error Detection Enable"]
355 #[inline(always)]
356 pub fn modfen(
357 self,
358 ) -> crate::common::RegisterField<
359 2,
360 0x1,
361 1,
362 0,
363 spcr::Modfen,
364 spcr::Modfen,
365 Spcr_SPEC,
366 crate::common::RW,
367 > {
368 crate::common::RegisterField::<
369 2,
370 0x1,
371 1,
372 0,
373 spcr::Modfen,
374 spcr::Modfen,
375 Spcr_SPEC,
376 crate::common::RW,
377 >::from_register(self, 0)
378 }
379
380 #[doc = "SPI Master/Slave Mode Select"]
381 #[inline(always)]
382 pub fn mstr(
383 self,
384 ) -> crate::common::RegisterField<
385 3,
386 0x1,
387 1,
388 0,
389 spcr::Mstr,
390 spcr::Mstr,
391 Spcr_SPEC,
392 crate::common::RW,
393 > {
394 crate::common::RegisterField::<
395 3,
396 0x1,
397 1,
398 0,
399 spcr::Mstr,
400 spcr::Mstr,
401 Spcr_SPEC,
402 crate::common::RW,
403 >::from_register(self, 0)
404 }
405
406 #[doc = "SPI Error Interrupt Enable"]
407 #[inline(always)]
408 pub fn speie(
409 self,
410 ) -> crate::common::RegisterField<
411 4,
412 0x1,
413 1,
414 0,
415 spcr::Speie,
416 spcr::Speie,
417 Spcr_SPEC,
418 crate::common::RW,
419 > {
420 crate::common::RegisterField::<
421 4,
422 0x1,
423 1,
424 0,
425 spcr::Speie,
426 spcr::Speie,
427 Spcr_SPEC,
428 crate::common::RW,
429 >::from_register(self, 0)
430 }
431
432 #[doc = "Transmit Buffer Empty Interrupt Enable"]
433 #[inline(always)]
434 pub fn sptie(
435 self,
436 ) -> crate::common::RegisterField<
437 5,
438 0x1,
439 1,
440 0,
441 spcr::Sptie,
442 spcr::Sptie,
443 Spcr_SPEC,
444 crate::common::RW,
445 > {
446 crate::common::RegisterField::<
447 5,
448 0x1,
449 1,
450 0,
451 spcr::Sptie,
452 spcr::Sptie,
453 Spcr_SPEC,
454 crate::common::RW,
455 >::from_register(self, 0)
456 }
457
458 #[doc = "SPI Function Enable"]
459 #[inline(always)]
460 pub fn spe(
461 self,
462 ) -> crate::common::RegisterField<
463 6,
464 0x1,
465 1,
466 0,
467 spcr::Spe,
468 spcr::Spe,
469 Spcr_SPEC,
470 crate::common::RW,
471 > {
472 crate::common::RegisterField::<
473 6,
474 0x1,
475 1,
476 0,
477 spcr::Spe,
478 spcr::Spe,
479 Spcr_SPEC,
480 crate::common::RW,
481 >::from_register(self, 0)
482 }
483
484 #[doc = "SPI Receive Buffer Full Interrupt Enable"]
485 #[inline(always)]
486 pub fn sprie(
487 self,
488 ) -> crate::common::RegisterField<
489 7,
490 0x1,
491 1,
492 0,
493 spcr::Sprie,
494 spcr::Sprie,
495 Spcr_SPEC,
496 crate::common::RW,
497 > {
498 crate::common::RegisterField::<
499 7,
500 0x1,
501 1,
502 0,
503 spcr::Sprie,
504 spcr::Sprie,
505 Spcr_SPEC,
506 crate::common::RW,
507 >::from_register(self, 0)
508 }
509}
510impl ::core::default::Default for Spcr {
511 #[inline(always)]
512 fn default() -> Spcr {
513 <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
514 }
515}
516pub mod spcr {
517
518 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
519 pub struct Spms_SPEC;
520 pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
521 impl Spms {
522 #[doc = "Select SPI operation (4-wire method)"]
523 pub const _0: Self = Self::new(0);
524
525 #[doc = "Select clock synchronous operation (3-wire method)"]
526 pub const _1: Self = Self::new(1);
527 }
528 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
529 pub struct Txmd_SPEC;
530 pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
531 impl Txmd {
532 #[doc = "Select full-duplex synchronous serial communications"]
533 pub const _0: Self = Self::new(0);
534
535 #[doc = "Select serial communications with transmit-only"]
536 pub const _1: Self = Self::new(1);
537 }
538 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
539 pub struct Modfen_SPEC;
540 pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
541 impl Modfen {
542 #[doc = "Disable detection of mode fault errors"]
543 pub const _0: Self = Self::new(0);
544
545 #[doc = "Enable detection of mode fault errors"]
546 pub const _1: Self = Self::new(1);
547 }
548 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
549 pub struct Mstr_SPEC;
550 pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
551 impl Mstr {
552 #[doc = "Select slave mode"]
553 pub const _0: Self = Self::new(0);
554
555 #[doc = "Select master mode"]
556 pub const _1: Self = Self::new(1);
557 }
558 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
559 pub struct Speie_SPEC;
560 pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
561 impl Speie {
562 #[doc = "Disable SPI error interrupt requests"]
563 pub const _0: Self = Self::new(0);
564
565 #[doc = "Enable SPI error interrupt requests"]
566 pub const _1: Self = Self::new(1);
567 }
568 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
569 pub struct Sptie_SPEC;
570 pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
571 impl Sptie {
572 #[doc = "Disable transmit buffer empty interrupt requests"]
573 pub const _0: Self = Self::new(0);
574
575 #[doc = "Enable transmit buffer empty interrupt requests"]
576 pub const _1: Self = Self::new(1);
577 }
578 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
579 pub struct Spe_SPEC;
580 pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
581 impl Spe {
582 #[doc = "Disable SPI function"]
583 pub const _0: Self = Self::new(0);
584
585 #[doc = "Enable SPI function"]
586 pub const _1: Self = Self::new(1);
587 }
588 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
589 pub struct Sprie_SPEC;
590 pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
591 impl Sprie {
592 #[doc = "Disable SPI receive buffer full interrupt requests"]
593 pub const _0: Self = Self::new(0);
594
595 #[doc = "Enable SPI receive buffer full interrupt requests"]
596 pub const _1: Self = Self::new(1);
597 }
598}
599#[doc(hidden)]
600#[derive(Copy, Clone, Eq, PartialEq)]
601pub struct Sslp_SPEC;
602impl crate::sealed::RegSpec for Sslp_SPEC {
603 type DataType = u8;
604}
605
606#[doc = "SPI Slave Select Polarity Register"]
607pub type Sslp = crate::RegValueT<Sslp_SPEC>;
608
609impl Sslp {
610 #[doc = "SSLn0 Signal Polarity Setting"]
611 #[inline(always)]
612 pub fn ssl0p(
613 self,
614 ) -> crate::common::RegisterField<
615 0,
616 0x1,
617 1,
618 0,
619 sslp::Ssl0P,
620 sslp::Ssl0P,
621 Sslp_SPEC,
622 crate::common::RW,
623 > {
624 crate::common::RegisterField::<
625 0,
626 0x1,
627 1,
628 0,
629 sslp::Ssl0P,
630 sslp::Ssl0P,
631 Sslp_SPEC,
632 crate::common::RW,
633 >::from_register(self, 0)
634 }
635
636 #[doc = "SSLn1 Signal Polarity Setting"]
637 #[inline(always)]
638 pub fn ssl1p(
639 self,
640 ) -> crate::common::RegisterField<
641 1,
642 0x1,
643 1,
644 0,
645 sslp::Ssl1P,
646 sslp::Ssl1P,
647 Sslp_SPEC,
648 crate::common::RW,
649 > {
650 crate::common::RegisterField::<
651 1,
652 0x1,
653 1,
654 0,
655 sslp::Ssl1P,
656 sslp::Ssl1P,
657 Sslp_SPEC,
658 crate::common::RW,
659 >::from_register(self, 0)
660 }
661
662 #[doc = "SSLn2 Signal Polarity Setting"]
663 #[inline(always)]
664 pub fn ssl2p(
665 self,
666 ) -> crate::common::RegisterField<
667 2,
668 0x1,
669 1,
670 0,
671 sslp::Ssl2P,
672 sslp::Ssl2P,
673 Sslp_SPEC,
674 crate::common::RW,
675 > {
676 crate::common::RegisterField::<
677 2,
678 0x1,
679 1,
680 0,
681 sslp::Ssl2P,
682 sslp::Ssl2P,
683 Sslp_SPEC,
684 crate::common::RW,
685 >::from_register(self, 0)
686 }
687
688 #[doc = "SSLn3 Signal Polarity Setting"]
689 #[inline(always)]
690 pub fn ssl3p(
691 self,
692 ) -> crate::common::RegisterField<
693 3,
694 0x1,
695 1,
696 0,
697 sslp::Ssl3P,
698 sslp::Ssl3P,
699 Sslp_SPEC,
700 crate::common::RW,
701 > {
702 crate::common::RegisterField::<
703 3,
704 0x1,
705 1,
706 0,
707 sslp::Ssl3P,
708 sslp::Ssl3P,
709 Sslp_SPEC,
710 crate::common::RW,
711 >::from_register(self, 0)
712 }
713}
714impl ::core::default::Default for Sslp {
715 #[inline(always)]
716 fn default() -> Sslp {
717 <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
718 }
719}
720pub mod sslp {
721
722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
723 pub struct Ssl0P_SPEC;
724 pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
725 impl Ssl0P {
726 #[doc = "Set SSLn0 signal to active-low"]
727 pub const _0: Self = Self::new(0);
728
729 #[doc = "Set SSLn0 signal to active-high"]
730 pub const _1: Self = Self::new(1);
731 }
732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
733 pub struct Ssl1P_SPEC;
734 pub type Ssl1P = crate::EnumBitfieldStruct<u8, Ssl1P_SPEC>;
735 impl Ssl1P {
736 #[doc = "Set SSLn1 signal to active-low"]
737 pub const _0: Self = Self::new(0);
738
739 #[doc = "Set SSLn1 signal to active-high"]
740 pub const _1: Self = Self::new(1);
741 }
742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
743 pub struct Ssl2P_SPEC;
744 pub type Ssl2P = crate::EnumBitfieldStruct<u8, Ssl2P_SPEC>;
745 impl Ssl2P {
746 #[doc = "Set SSLn2 signal to active-low"]
747 pub const _0: Self = Self::new(0);
748
749 #[doc = "Set SSLn2 signal to active-high"]
750 pub const _1: Self = Self::new(1);
751 }
752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
753 pub struct Ssl3P_SPEC;
754 pub type Ssl3P = crate::EnumBitfieldStruct<u8, Ssl3P_SPEC>;
755 impl Ssl3P {
756 #[doc = "Set SSLn3 signal to active-low"]
757 pub const _0: Self = Self::new(0);
758
759 #[doc = "Set SSLn3 signal to active-high"]
760 pub const _1: Self = Self::new(1);
761 }
762}
763#[doc(hidden)]
764#[derive(Copy, Clone, Eq, PartialEq)]
765pub struct Sppcr_SPEC;
766impl crate::sealed::RegSpec for Sppcr_SPEC {
767 type DataType = u8;
768}
769
770#[doc = "SPI Pin Control Register"]
771pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
772
773impl Sppcr {
774 #[doc = "SPI Loopback"]
775 #[inline(always)]
776 pub fn splp(
777 self,
778 ) -> crate::common::RegisterField<
779 0,
780 0x1,
781 1,
782 0,
783 sppcr::Splp,
784 sppcr::Splp,
785 Sppcr_SPEC,
786 crate::common::RW,
787 > {
788 crate::common::RegisterField::<
789 0,
790 0x1,
791 1,
792 0,
793 sppcr::Splp,
794 sppcr::Splp,
795 Sppcr_SPEC,
796 crate::common::RW,
797 >::from_register(self, 0)
798 }
799
800 #[doc = "SPI Loopback 2"]
801 #[inline(always)]
802 pub fn splp2(
803 self,
804 ) -> crate::common::RegisterField<
805 1,
806 0x1,
807 1,
808 0,
809 sppcr::Splp2,
810 sppcr::Splp2,
811 Sppcr_SPEC,
812 crate::common::RW,
813 > {
814 crate::common::RegisterField::<
815 1,
816 0x1,
817 1,
818 0,
819 sppcr::Splp2,
820 sppcr::Splp2,
821 Sppcr_SPEC,
822 crate::common::RW,
823 >::from_register(self, 0)
824 }
825
826 #[doc = "MOSI Idle Fixed Value"]
827 #[inline(always)]
828 pub fn moifv(
829 self,
830 ) -> crate::common::RegisterField<
831 4,
832 0x1,
833 1,
834 0,
835 sppcr::Moifv,
836 sppcr::Moifv,
837 Sppcr_SPEC,
838 crate::common::RW,
839 > {
840 crate::common::RegisterField::<
841 4,
842 0x1,
843 1,
844 0,
845 sppcr::Moifv,
846 sppcr::Moifv,
847 Sppcr_SPEC,
848 crate::common::RW,
849 >::from_register(self, 0)
850 }
851
852 #[doc = "MOSI Idle Value Fixing Enable"]
853 #[inline(always)]
854 pub fn moife(
855 self,
856 ) -> crate::common::RegisterField<
857 5,
858 0x1,
859 1,
860 0,
861 sppcr::Moife,
862 sppcr::Moife,
863 Sppcr_SPEC,
864 crate::common::RW,
865 > {
866 crate::common::RegisterField::<
867 5,
868 0x1,
869 1,
870 0,
871 sppcr::Moife,
872 sppcr::Moife,
873 Sppcr_SPEC,
874 crate::common::RW,
875 >::from_register(self, 0)
876 }
877}
878impl ::core::default::Default for Sppcr {
879 #[inline(always)]
880 fn default() -> Sppcr {
881 <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
882 }
883}
884pub mod sppcr {
885
886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
887 pub struct Splp_SPEC;
888 pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
889 impl Splp {
890 #[doc = "Normal mode"]
891 pub const _0: Self = Self::new(0);
892
893 #[doc = "Loopback mode (receive data = inverted transmit data)"]
894 pub const _1: Self = Self::new(1);
895 }
896 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
897 pub struct Splp2_SPEC;
898 pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
899 impl Splp2 {
900 #[doc = "Normal mode"]
901 pub const _0: Self = Self::new(0);
902
903 #[doc = "Loopback mode (receive data = transmit data)"]
904 pub const _1: Self = Self::new(1);
905 }
906 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
907 pub struct Moifv_SPEC;
908 pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
909 impl Moifv {
910 #[doc = "Set level output on MOSIn pin during MOSI idling to low"]
911 pub const _0: Self = Self::new(0);
912
913 #[doc = "Set level output on MOSIn pin during MOSI idling to high"]
914 pub const _1: Self = Self::new(1);
915 }
916 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
917 pub struct Moife_SPEC;
918 pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
919 impl Moife {
920 #[doc = "Set MOSI output value to equal final data from previous transfer"]
921 pub const _0: Self = Self::new(0);
922
923 #[doc = "Set MOSI output value to equal value set in the MOIFV bit"]
924 pub const _1: Self = Self::new(1);
925 }
926}
927#[doc(hidden)]
928#[derive(Copy, Clone, Eq, PartialEq)]
929pub struct Spsr_SPEC;
930impl crate::sealed::RegSpec for Spsr_SPEC {
931 type DataType = u8;
932}
933
934#[doc = "SPI Status Register"]
935pub type Spsr = crate::RegValueT<Spsr_SPEC>;
936
937impl Spsr {
938 #[doc = "Overrun Error Flag"]
939 #[inline(always)]
940 pub fn ovrf(
941 self,
942 ) -> crate::common::RegisterField<
943 0,
944 0x1,
945 1,
946 0,
947 spsr::Ovrf,
948 spsr::Ovrf,
949 Spsr_SPEC,
950 crate::common::RW,
951 > {
952 crate::common::RegisterField::<
953 0,
954 0x1,
955 1,
956 0,
957 spsr::Ovrf,
958 spsr::Ovrf,
959 Spsr_SPEC,
960 crate::common::RW,
961 >::from_register(self, 0)
962 }
963
964 #[doc = "SPI Idle Flag"]
965 #[inline(always)]
966 pub fn idlnf(
967 self,
968 ) -> crate::common::RegisterField<
969 1,
970 0x1,
971 1,
972 0,
973 spsr::Idlnf,
974 spsr::Idlnf,
975 Spsr_SPEC,
976 crate::common::R,
977 > {
978 crate::common::RegisterField::<
979 1,
980 0x1,
981 1,
982 0,
983 spsr::Idlnf,
984 spsr::Idlnf,
985 Spsr_SPEC,
986 crate::common::R,
987 >::from_register(self, 0)
988 }
989
990 #[doc = "Mode Fault Error Flag"]
991 #[inline(always)]
992 pub fn modf(
993 self,
994 ) -> crate::common::RegisterField<
995 2,
996 0x1,
997 1,
998 0,
999 spsr::Modf,
1000 spsr::Modf,
1001 Spsr_SPEC,
1002 crate::common::RW,
1003 > {
1004 crate::common::RegisterField::<
1005 2,
1006 0x1,
1007 1,
1008 0,
1009 spsr::Modf,
1010 spsr::Modf,
1011 Spsr_SPEC,
1012 crate::common::RW,
1013 >::from_register(self, 0)
1014 }
1015
1016 #[doc = "Parity Error Flag"]
1017 #[inline(always)]
1018 pub fn perf(
1019 self,
1020 ) -> crate::common::RegisterField<
1021 3,
1022 0x1,
1023 1,
1024 0,
1025 spsr::Perf,
1026 spsr::Perf,
1027 Spsr_SPEC,
1028 crate::common::RW,
1029 > {
1030 crate::common::RegisterField::<
1031 3,
1032 0x1,
1033 1,
1034 0,
1035 spsr::Perf,
1036 spsr::Perf,
1037 Spsr_SPEC,
1038 crate::common::RW,
1039 >::from_register(self, 0)
1040 }
1041
1042 #[doc = "Underrun Error Flag"]
1043 #[inline(always)]
1044 pub fn udrf(
1045 self,
1046 ) -> crate::common::RegisterField<
1047 4,
1048 0x1,
1049 1,
1050 0,
1051 spsr::Udrf,
1052 spsr::Udrf,
1053 Spsr_SPEC,
1054 crate::common::RW,
1055 > {
1056 crate::common::RegisterField::<
1057 4,
1058 0x1,
1059 1,
1060 0,
1061 spsr::Udrf,
1062 spsr::Udrf,
1063 Spsr_SPEC,
1064 crate::common::RW,
1065 >::from_register(self, 0)
1066 }
1067
1068 #[doc = "SPI Transmit Buffer Empty Flag"]
1069 #[inline(always)]
1070 pub fn sptef(
1071 self,
1072 ) -> crate::common::RegisterField<
1073 5,
1074 0x1,
1075 1,
1076 0,
1077 spsr::Sptef,
1078 spsr::Sptef,
1079 Spsr_SPEC,
1080 crate::common::RW,
1081 > {
1082 crate::common::RegisterField::<
1083 5,
1084 0x1,
1085 1,
1086 0,
1087 spsr::Sptef,
1088 spsr::Sptef,
1089 Spsr_SPEC,
1090 crate::common::RW,
1091 >::from_register(self, 0)
1092 }
1093
1094 #[doc = "Communication End Flag"]
1095 #[inline(always)]
1096 pub fn cendf(
1097 self,
1098 ) -> crate::common::RegisterField<
1099 6,
1100 0x1,
1101 1,
1102 0,
1103 spsr::Cendf,
1104 spsr::Cendf,
1105 Spsr_SPEC,
1106 crate::common::RW,
1107 > {
1108 crate::common::RegisterField::<
1109 6,
1110 0x1,
1111 1,
1112 0,
1113 spsr::Cendf,
1114 spsr::Cendf,
1115 Spsr_SPEC,
1116 crate::common::RW,
1117 >::from_register(self, 0)
1118 }
1119
1120 #[doc = "SPI Receive Buffer Full Flag"]
1121 #[inline(always)]
1122 pub fn sprf(
1123 self,
1124 ) -> crate::common::RegisterField<
1125 7,
1126 0x1,
1127 1,
1128 0,
1129 spsr::Sprf,
1130 spsr::Sprf,
1131 Spsr_SPEC,
1132 crate::common::RW,
1133 > {
1134 crate::common::RegisterField::<
1135 7,
1136 0x1,
1137 1,
1138 0,
1139 spsr::Sprf,
1140 spsr::Sprf,
1141 Spsr_SPEC,
1142 crate::common::RW,
1143 >::from_register(self, 0)
1144 }
1145}
1146impl ::core::default::Default for Spsr {
1147 #[inline(always)]
1148 fn default() -> Spsr {
1149 <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
1150 }
1151}
1152pub mod spsr {
1153
1154 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1155 pub struct Ovrf_SPEC;
1156 pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
1157 impl Ovrf {
1158 #[doc = "No overrun error occurred"]
1159 pub const _0: Self = Self::new(0);
1160
1161 #[doc = "Overrun error occurred"]
1162 pub const _1: Self = Self::new(1);
1163 }
1164 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1165 pub struct Idlnf_SPEC;
1166 pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
1167 impl Idlnf {
1168 #[doc = "SPI is in the idle state"]
1169 pub const _0: Self = Self::new(0);
1170
1171 #[doc = "SPI is in the transfer state"]
1172 pub const _1: Self = Self::new(1);
1173 }
1174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1175 pub struct Modf_SPEC;
1176 pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
1177 impl Modf {
1178 #[doc = "No mode fault or underrun error occurred"]
1179 pub const _0: Self = Self::new(0);
1180
1181 #[doc = "Mode fault error or underrun error occurred"]
1182 pub const _1: Self = Self::new(1);
1183 }
1184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1185 pub struct Perf_SPEC;
1186 pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
1187 impl Perf {
1188 #[doc = "No parity error occurred"]
1189 pub const _0: Self = Self::new(0);
1190
1191 #[doc = "Parity error occurred"]
1192 pub const _1: Self = Self::new(1);
1193 }
1194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1195 pub struct Udrf_SPEC;
1196 pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
1197 impl Udrf {
1198 #[doc = "Mode fault error occurred (MODF = 1)"]
1199 pub const _0: Self = Self::new(0);
1200
1201 #[doc = "Underrun error occurred (MODF = 1)"]
1202 pub const _1: Self = Self::new(1);
1203 }
1204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1205 pub struct Sptef_SPEC;
1206 pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
1207 impl Sptef {
1208 #[doc = "Data is in the transmit buffer"]
1209 pub const _0: Self = Self::new(0);
1210
1211 #[doc = "No data is in the transmit buffer"]
1212 pub const _1: Self = Self::new(1);
1213 }
1214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1215 pub struct Cendf_SPEC;
1216 pub type Cendf = crate::EnumBitfieldStruct<u8, Cendf_SPEC>;
1217 impl Cendf {
1218 #[doc = "Not communicating or communicating"]
1219 pub const _0: Self = Self::new(0);
1220
1221 #[doc = "Communication completed"]
1222 pub const _1: Self = Self::new(1);
1223 }
1224 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1225 pub struct Sprf_SPEC;
1226 pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
1227 impl Sprf {
1228 #[doc = "No valid data is in SPDR/SPDR_HA"]
1229 pub const _0: Self = Self::new(0);
1230
1231 #[doc = "Valid data is in SPDR/SPDR_HA"]
1232 pub const _1: Self = Self::new(1);
1233 }
1234}
1235#[doc(hidden)]
1236#[derive(Copy, Clone, Eq, PartialEq)]
1237pub struct Spdr_SPEC;
1238impl crate::sealed::RegSpec for Spdr_SPEC {
1239 type DataType = u32;
1240}
1241
1242#[doc = "SPI Data Register"]
1243pub type Spdr = crate::RegValueT<Spdr_SPEC>;
1244
1245impl NoBitfieldReg<Spdr_SPEC> for Spdr {}
1246impl ::core::default::Default for Spdr {
1247 #[inline(always)]
1248 fn default() -> Spdr {
1249 <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
1250 }
1251}
1252
1253#[doc(hidden)]
1254#[derive(Copy, Clone, Eq, PartialEq)]
1255pub struct SpdrHa_SPEC;
1256impl crate::sealed::RegSpec for SpdrHa_SPEC {
1257 type DataType = u16;
1258}
1259
1260#[doc = "SPI Data Register"]
1261pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
1262
1263impl NoBitfieldReg<SpdrHa_SPEC> for SpdrHa {}
1264impl ::core::default::Default for SpdrHa {
1265 #[inline(always)]
1266 fn default() -> SpdrHa {
1267 <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
1268 }
1269}
1270
1271#[doc(hidden)]
1272#[derive(Copy, Clone, Eq, PartialEq)]
1273pub struct SpdrBy_SPEC;
1274impl crate::sealed::RegSpec for SpdrBy_SPEC {
1275 type DataType = u8;
1276}
1277
1278#[doc = "SPI Data Register"]
1279pub type SpdrBy = crate::RegValueT<SpdrBy_SPEC>;
1280
1281impl NoBitfieldReg<SpdrBy_SPEC> for SpdrBy {}
1282impl ::core::default::Default for SpdrBy {
1283 #[inline(always)]
1284 fn default() -> SpdrBy {
1285 <crate::RegValueT<SpdrBy_SPEC> as RegisterValue<_>>::new(0)
1286 }
1287}
1288
1289#[doc(hidden)]
1290#[derive(Copy, Clone, Eq, PartialEq)]
1291pub struct Spscr_SPEC;
1292impl crate::sealed::RegSpec for Spscr_SPEC {
1293 type DataType = u8;
1294}
1295
1296#[doc = "SPI Sequence Control Register"]
1297pub type Spscr = crate::RegValueT<Spscr_SPEC>;
1298
1299impl Spscr {
1300 #[doc = "SPI Sequence Length Specification"]
1301 #[inline(always)]
1302 pub fn spsln(
1303 self,
1304 ) -> crate::common::RegisterField<
1305 0,
1306 0x7,
1307 1,
1308 0,
1309 spscr::Spsln,
1310 spscr::Spsln,
1311 Spscr_SPEC,
1312 crate::common::RW,
1313 > {
1314 crate::common::RegisterField::<
1315 0,
1316 0x7,
1317 1,
1318 0,
1319 spscr::Spsln,
1320 spscr::Spsln,
1321 Spscr_SPEC,
1322 crate::common::RW,
1323 >::from_register(self, 0)
1324 }
1325}
1326impl ::core::default::Default for Spscr {
1327 #[inline(always)]
1328 fn default() -> Spscr {
1329 <crate::RegValueT<Spscr_SPEC> as RegisterValue<_>>::new(0)
1330 }
1331}
1332pub mod spscr {
1333
1334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1335 pub struct Spsln_SPEC;
1336 pub type Spsln = crate::EnumBitfieldStruct<u8, Spsln_SPEC>;
1337 impl Spsln {
1338 #[doc = "Sequence Length is 1 (Referenced SPCMDn, n = 0→0→…)"]
1339 pub const _000: Self = Self::new(0);
1340
1341 #[doc = "Sequence Length is 2 (Referenced SPCMDn, n = 0→1→0→…)"]
1342 pub const _001: Self = Self::new(1);
1343
1344 #[doc = "Sequence Length is 3 (Referenced SPCMDn, n = 0→1→2→0→…)"]
1345 pub const _010: Self = Self::new(2);
1346
1347 #[doc = "Sequence Length is 4 (Referenced SPCMDn, n = 0→1→2→3→0→…)"]
1348 pub const _011: Self = Self::new(3);
1349
1350 #[doc = "Sequence Length is 5 (Referenced SPCMDn, n = 0→1→2→3→4→0→…)"]
1351 pub const _100: Self = Self::new(4);
1352
1353 #[doc = "Sequence Length is 6 (Referenced SPCMDn, n = 0→1→2→3→4→5→0→…)"]
1354 pub const _101: Self = Self::new(5);
1355
1356 #[doc = "Sequence Length is 7 (Referenced SPCMDn, n = 0→1→2→3→4→5→6→0→…)"]
1357 pub const _110: Self = Self::new(6);
1358
1359 #[doc = "Sequence Length is 8 (Referenced SPCMDn, n = 0→1→2→3→4→5→6→7→0→…)"]
1360 pub const _111: Self = Self::new(7);
1361 }
1362}
1363#[doc(hidden)]
1364#[derive(Copy, Clone, Eq, PartialEq)]
1365pub struct Spssr_SPEC;
1366impl crate::sealed::RegSpec for Spssr_SPEC {
1367 type DataType = u8;
1368}
1369
1370#[doc = "SPI Sequence Status Register"]
1371pub type Spssr = crate::RegValueT<Spssr_SPEC>;
1372
1373impl Spssr {
1374 #[doc = "SPI Command Pointer"]
1375 #[inline(always)]
1376 pub fn spcp(
1377 self,
1378 ) -> crate::common::RegisterField<
1379 0,
1380 0x7,
1381 1,
1382 0,
1383 spssr::Spcp,
1384 spssr::Spcp,
1385 Spssr_SPEC,
1386 crate::common::R,
1387 > {
1388 crate::common::RegisterField::<
1389 0,
1390 0x7,
1391 1,
1392 0,
1393 spssr::Spcp,
1394 spssr::Spcp,
1395 Spssr_SPEC,
1396 crate::common::R,
1397 >::from_register(self, 0)
1398 }
1399
1400 #[doc = "SPI Error Command"]
1401 #[inline(always)]
1402 pub fn specm(
1403 self,
1404 ) -> crate::common::RegisterField<
1405 4,
1406 0x7,
1407 1,
1408 0,
1409 spssr::Specm,
1410 spssr::Specm,
1411 Spssr_SPEC,
1412 crate::common::R,
1413 > {
1414 crate::common::RegisterField::<
1415 4,
1416 0x7,
1417 1,
1418 0,
1419 spssr::Specm,
1420 spssr::Specm,
1421 Spssr_SPEC,
1422 crate::common::R,
1423 >::from_register(self, 0)
1424 }
1425}
1426impl ::core::default::Default for Spssr {
1427 #[inline(always)]
1428 fn default() -> Spssr {
1429 <crate::RegValueT<Spssr_SPEC> as RegisterValue<_>>::new(0)
1430 }
1431}
1432pub mod spssr {
1433
1434 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1435 pub struct Spcp_SPEC;
1436 pub type Spcp = crate::EnumBitfieldStruct<u8, Spcp_SPEC>;
1437 impl Spcp {
1438 #[doc = "SPCMD0"]
1439 pub const _000: Self = Self::new(0);
1440
1441 #[doc = "SPCMD1"]
1442 pub const _001: Self = Self::new(1);
1443
1444 #[doc = "SPCMD2"]
1445 pub const _010: Self = Self::new(2);
1446
1447 #[doc = "SPCMD3"]
1448 pub const _011: Self = Self::new(3);
1449
1450 #[doc = "SPCMD4"]
1451 pub const _100: Self = Self::new(4);
1452
1453 #[doc = "SPCMD5"]
1454 pub const _101: Self = Self::new(5);
1455
1456 #[doc = "SPCMD6"]
1457 pub const _110: Self = Self::new(6);
1458
1459 #[doc = "SPCMD7"]
1460 pub const _111: Self = Self::new(7);
1461 }
1462 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1463 pub struct Specm_SPEC;
1464 pub type Specm = crate::EnumBitfieldStruct<u8, Specm_SPEC>;
1465 impl Specm {
1466 #[doc = "SPCMD0"]
1467 pub const _000: Self = Self::new(0);
1468
1469 #[doc = "SPCMD1"]
1470 pub const _001: Self = Self::new(1);
1471
1472 #[doc = "SPCMD2"]
1473 pub const _010: Self = Self::new(2);
1474
1475 #[doc = "SPCMD3"]
1476 pub const _011: Self = Self::new(3);
1477
1478 #[doc = "SPCMD4"]
1479 pub const _100: Self = Self::new(4);
1480
1481 #[doc = "SPCMD5"]
1482 pub const _101: Self = Self::new(5);
1483
1484 #[doc = "SPCMD6"]
1485 pub const _110: Self = Self::new(6);
1486
1487 #[doc = "SPCMD7"]
1488 pub const _111: Self = Self::new(7);
1489 }
1490}
1491#[doc(hidden)]
1492#[derive(Copy, Clone, Eq, PartialEq)]
1493pub struct Spbr_SPEC;
1494impl crate::sealed::RegSpec for Spbr_SPEC {
1495 type DataType = u8;
1496}
1497
1498#[doc = "SPI Bit Rate Register"]
1499pub type Spbr = crate::RegValueT<Spbr_SPEC>;
1500
1501impl NoBitfieldReg<Spbr_SPEC> for Spbr {}
1502impl ::core::default::Default for Spbr {
1503 #[inline(always)]
1504 fn default() -> Spbr {
1505 <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
1506 }
1507}
1508
1509#[doc(hidden)]
1510#[derive(Copy, Clone, Eq, PartialEq)]
1511pub struct Spdcr_SPEC;
1512impl crate::sealed::RegSpec for Spdcr_SPEC {
1513 type DataType = u8;
1514}
1515
1516#[doc = "SPI Data Control Register"]
1517pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
1518
1519impl Spdcr {
1520 #[doc = "Number of Frames Specification"]
1521 #[inline(always)]
1522 pub fn spfc(
1523 self,
1524 ) -> crate::common::RegisterField<
1525 0,
1526 0x3,
1527 1,
1528 0,
1529 spdcr::Spfc,
1530 spdcr::Spfc,
1531 Spdcr_SPEC,
1532 crate::common::RW,
1533 > {
1534 crate::common::RegisterField::<
1535 0,
1536 0x3,
1537 1,
1538 0,
1539 spdcr::Spfc,
1540 spdcr::Spfc,
1541 Spdcr_SPEC,
1542 crate::common::RW,
1543 >::from_register(self, 0)
1544 }
1545
1546 #[doc = "SPI Receive/Transmit Data Select"]
1547 #[inline(always)]
1548 pub fn sprdtd(
1549 self,
1550 ) -> crate::common::RegisterField<
1551 4,
1552 0x1,
1553 1,
1554 0,
1555 spdcr::Sprdtd,
1556 spdcr::Sprdtd,
1557 Spdcr_SPEC,
1558 crate::common::RW,
1559 > {
1560 crate::common::RegisterField::<
1561 4,
1562 0x1,
1563 1,
1564 0,
1565 spdcr::Sprdtd,
1566 spdcr::Sprdtd,
1567 Spdcr_SPEC,
1568 crate::common::RW,
1569 >::from_register(self, 0)
1570 }
1571
1572 #[doc = "SPI Word Access/Halfword Access Specification"]
1573 #[inline(always)]
1574 pub fn splw(
1575 self,
1576 ) -> crate::common::RegisterField<
1577 5,
1578 0x1,
1579 1,
1580 0,
1581 spdcr::Splw,
1582 spdcr::Splw,
1583 Spdcr_SPEC,
1584 crate::common::RW,
1585 > {
1586 crate::common::RegisterField::<
1587 5,
1588 0x1,
1589 1,
1590 0,
1591 spdcr::Splw,
1592 spdcr::Splw,
1593 Spdcr_SPEC,
1594 crate::common::RW,
1595 >::from_register(self, 0)
1596 }
1597
1598 #[doc = "SPI Byte Access Specification"]
1599 #[inline(always)]
1600 pub fn spbyt(
1601 self,
1602 ) -> crate::common::RegisterField<
1603 6,
1604 0x1,
1605 1,
1606 0,
1607 spdcr::Spbyt,
1608 spdcr::Spbyt,
1609 Spdcr_SPEC,
1610 crate::common::RW,
1611 > {
1612 crate::common::RegisterField::<
1613 6,
1614 0x1,
1615 1,
1616 0,
1617 spdcr::Spbyt,
1618 spdcr::Spbyt,
1619 Spdcr_SPEC,
1620 crate::common::RW,
1621 >::from_register(self, 0)
1622 }
1623}
1624impl ::core::default::Default for Spdcr {
1625 #[inline(always)]
1626 fn default() -> Spdcr {
1627 <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
1628 }
1629}
1630pub mod spdcr {
1631
1632 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1633 pub struct Spfc_SPEC;
1634 pub type Spfc = crate::EnumBitfieldStruct<u8, Spfc_SPEC>;
1635 impl Spfc {
1636 #[doc = "1 frame"]
1637 pub const _00: Self = Self::new(0);
1638
1639 #[doc = "2 frames"]
1640 pub const _01: Self = Self::new(1);
1641
1642 #[doc = "3 frames"]
1643 pub const _10: Self = Self::new(2);
1644
1645 #[doc = "4 frames"]
1646 pub const _11: Self = Self::new(3);
1647 }
1648 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1649 pub struct Sprdtd_SPEC;
1650 pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
1651 impl Sprdtd {
1652 #[doc = "Read SPDR/SPDR_HA values from receive buffer"]
1653 pub const _0: Self = Self::new(0);
1654
1655 #[doc = "Read SPDR/SPDR_HA values from transmit buffer, but only if the transmit buffer is empty"]
1656 pub const _1: Self = Self::new(1);
1657 }
1658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1659 pub struct Splw_SPEC;
1660 pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
1661 impl Splw {
1662 #[doc = "Set SPDR_HA to valid for halfword access"]
1663 pub const _0: Self = Self::new(0);
1664
1665 #[doc = "Set SPDR to valid for word access"]
1666 pub const _1: Self = Self::new(1);
1667 }
1668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1669 pub struct Spbyt_SPEC;
1670 pub type Spbyt = crate::EnumBitfieldStruct<u8, Spbyt_SPEC>;
1671 impl Spbyt {
1672 #[doc = "SPDR/SPDR_HA is accessed in halfword or word (SPLW is valid)"]
1673 pub const _0: Self = Self::new(0);
1674
1675 #[doc = "SPDR_BY is accessed in byte (SPLW is invalid)"]
1676 pub const _1: Self = Self::new(1);
1677 }
1678}
1679#[doc(hidden)]
1680#[derive(Copy, Clone, Eq, PartialEq)]
1681pub struct Spckd_SPEC;
1682impl crate::sealed::RegSpec for Spckd_SPEC {
1683 type DataType = u8;
1684}
1685
1686#[doc = "SPI Clock Delay Register"]
1687pub type Spckd = crate::RegValueT<Spckd_SPEC>;
1688
1689impl Spckd {
1690 #[doc = "RSPCK Delay Setting"]
1691 #[inline(always)]
1692 pub fn sckdl(
1693 self,
1694 ) -> crate::common::RegisterField<
1695 0,
1696 0x7,
1697 1,
1698 0,
1699 spckd::Sckdl,
1700 spckd::Sckdl,
1701 Spckd_SPEC,
1702 crate::common::RW,
1703 > {
1704 crate::common::RegisterField::<
1705 0,
1706 0x7,
1707 1,
1708 0,
1709 spckd::Sckdl,
1710 spckd::Sckdl,
1711 Spckd_SPEC,
1712 crate::common::RW,
1713 >::from_register(self, 0)
1714 }
1715}
1716impl ::core::default::Default for Spckd {
1717 #[inline(always)]
1718 fn default() -> Spckd {
1719 <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1720 }
1721}
1722pub mod spckd {
1723
1724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1725 pub struct Sckdl_SPEC;
1726 pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1727 impl Sckdl {
1728 #[doc = "1 RSPCK"]
1729 pub const _000: Self = Self::new(0);
1730
1731 #[doc = "2 RSPCK"]
1732 pub const _001: Self = Self::new(1);
1733
1734 #[doc = "3 RSPCK"]
1735 pub const _010: Self = Self::new(2);
1736
1737 #[doc = "4 RSPCK"]
1738 pub const _011: Self = Self::new(3);
1739
1740 #[doc = "5 RSPCK"]
1741 pub const _100: Self = Self::new(4);
1742
1743 #[doc = "6 RSPCK"]
1744 pub const _101: Self = Self::new(5);
1745
1746 #[doc = "7 RSPCK"]
1747 pub const _110: Self = Self::new(6);
1748
1749 #[doc = "8 RSPCK"]
1750 pub const _111: Self = Self::new(7);
1751 }
1752}
1753#[doc(hidden)]
1754#[derive(Copy, Clone, Eq, PartialEq)]
1755pub struct Sslnd_SPEC;
1756impl crate::sealed::RegSpec for Sslnd_SPEC {
1757 type DataType = u8;
1758}
1759
1760#[doc = "SPI Slave Select Negation Delay Register"]
1761pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1762
1763impl Sslnd {
1764 #[doc = "SSL Negation Delay Setting"]
1765 #[inline(always)]
1766 pub fn slndl(
1767 self,
1768 ) -> crate::common::RegisterField<
1769 0,
1770 0x7,
1771 1,
1772 0,
1773 sslnd::Slndl,
1774 sslnd::Slndl,
1775 Sslnd_SPEC,
1776 crate::common::RW,
1777 > {
1778 crate::common::RegisterField::<
1779 0,
1780 0x7,
1781 1,
1782 0,
1783 sslnd::Slndl,
1784 sslnd::Slndl,
1785 Sslnd_SPEC,
1786 crate::common::RW,
1787 >::from_register(self, 0)
1788 }
1789}
1790impl ::core::default::Default for Sslnd {
1791 #[inline(always)]
1792 fn default() -> Sslnd {
1793 <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1794 }
1795}
1796pub mod sslnd {
1797
1798 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1799 pub struct Slndl_SPEC;
1800 pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1801 impl Slndl {
1802 #[doc = "1 RSPCK"]
1803 pub const _000: Self = Self::new(0);
1804
1805 #[doc = "2 RSPCK"]
1806 pub const _001: Self = Self::new(1);
1807
1808 #[doc = "3 RSPCK"]
1809 pub const _010: Self = Self::new(2);
1810
1811 #[doc = "4 RSPCK"]
1812 pub const _011: Self = Self::new(3);
1813
1814 #[doc = "5 RSPCK"]
1815 pub const _100: Self = Self::new(4);
1816
1817 #[doc = "6 RSPCK"]
1818 pub const _101: Self = Self::new(5);
1819
1820 #[doc = "7 RSPCK"]
1821 pub const _110: Self = Self::new(6);
1822
1823 #[doc = "8 RSPCK"]
1824 pub const _111: Self = Self::new(7);
1825 }
1826}
1827#[doc(hidden)]
1828#[derive(Copy, Clone, Eq, PartialEq)]
1829pub struct Spnd_SPEC;
1830impl crate::sealed::RegSpec for Spnd_SPEC {
1831 type DataType = u8;
1832}
1833
1834#[doc = "SPI Next-Access Delay Register"]
1835pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1836
1837impl Spnd {
1838 #[doc = "SPI Next-Access Delay Setting"]
1839 #[inline(always)]
1840 pub fn spndl(
1841 self,
1842 ) -> crate::common::RegisterField<
1843 0,
1844 0x7,
1845 1,
1846 0,
1847 spnd::Spndl,
1848 spnd::Spndl,
1849 Spnd_SPEC,
1850 crate::common::RW,
1851 > {
1852 crate::common::RegisterField::<
1853 0,
1854 0x7,
1855 1,
1856 0,
1857 spnd::Spndl,
1858 spnd::Spndl,
1859 Spnd_SPEC,
1860 crate::common::RW,
1861 >::from_register(self, 0)
1862 }
1863}
1864impl ::core::default::Default for Spnd {
1865 #[inline(always)]
1866 fn default() -> Spnd {
1867 <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1868 }
1869}
1870pub mod spnd {
1871
1872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1873 pub struct Spndl_SPEC;
1874 pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1875 impl Spndl {
1876 #[doc = "1 RSPCK + 2 PCLKA"]
1877 pub const _000: Self = Self::new(0);
1878
1879 #[doc = "2 RSPCK + 2 PCLKA"]
1880 pub const _001: Self = Self::new(1);
1881
1882 #[doc = "3 RSPCK + 2 PCLKA"]
1883 pub const _010: Self = Self::new(2);
1884
1885 #[doc = "4 RSPCK + 2 PCLKA"]
1886 pub const _011: Self = Self::new(3);
1887
1888 #[doc = "5 RSPCK + 2 PCLKA"]
1889 pub const _100: Self = Self::new(4);
1890
1891 #[doc = "6 RSPCK + 2 PCLKA"]
1892 pub const _101: Self = Self::new(5);
1893
1894 #[doc = "7 RSPCK + 2 PCLKA"]
1895 pub const _110: Self = Self::new(6);
1896
1897 #[doc = "8 RSPCK + 2 PCLKA"]
1898 pub const _111: Self = Self::new(7);
1899 }
1900}
1901#[doc(hidden)]
1902#[derive(Copy, Clone, Eq, PartialEq)]
1903pub struct Spcr2_SPEC;
1904impl crate::sealed::RegSpec for Spcr2_SPEC {
1905 type DataType = u8;
1906}
1907
1908#[doc = "SPI Control Register 2"]
1909pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1910
1911impl Spcr2 {
1912 #[doc = "Parity Enable"]
1913 #[inline(always)]
1914 pub fn sppe(
1915 self,
1916 ) -> crate::common::RegisterField<
1917 0,
1918 0x1,
1919 1,
1920 0,
1921 spcr2::Sppe,
1922 spcr2::Sppe,
1923 Spcr2_SPEC,
1924 crate::common::RW,
1925 > {
1926 crate::common::RegisterField::<
1927 0,
1928 0x1,
1929 1,
1930 0,
1931 spcr2::Sppe,
1932 spcr2::Sppe,
1933 Spcr2_SPEC,
1934 crate::common::RW,
1935 >::from_register(self, 0)
1936 }
1937
1938 #[doc = "Parity Mode"]
1939 #[inline(always)]
1940 pub fn spoe(
1941 self,
1942 ) -> crate::common::RegisterField<
1943 1,
1944 0x1,
1945 1,
1946 0,
1947 spcr2::Spoe,
1948 spcr2::Spoe,
1949 Spcr2_SPEC,
1950 crate::common::RW,
1951 > {
1952 crate::common::RegisterField::<
1953 1,
1954 0x1,
1955 1,
1956 0,
1957 spcr2::Spoe,
1958 spcr2::Spoe,
1959 Spcr2_SPEC,
1960 crate::common::RW,
1961 >::from_register(self, 0)
1962 }
1963
1964 #[doc = "SPI Idle Interrupt Enable"]
1965 #[inline(always)]
1966 pub fn spiie(
1967 self,
1968 ) -> crate::common::RegisterField<
1969 2,
1970 0x1,
1971 1,
1972 0,
1973 spcr2::Spiie,
1974 spcr2::Spiie,
1975 Spcr2_SPEC,
1976 crate::common::RW,
1977 > {
1978 crate::common::RegisterField::<
1979 2,
1980 0x1,
1981 1,
1982 0,
1983 spcr2::Spiie,
1984 spcr2::Spiie,
1985 Spcr2_SPEC,
1986 crate::common::RW,
1987 >::from_register(self, 0)
1988 }
1989
1990 #[doc = "Parity Self-Testing"]
1991 #[inline(always)]
1992 pub fn pte(
1993 self,
1994 ) -> crate::common::RegisterField<
1995 3,
1996 0x1,
1997 1,
1998 0,
1999 spcr2::Pte,
2000 spcr2::Pte,
2001 Spcr2_SPEC,
2002 crate::common::RW,
2003 > {
2004 crate::common::RegisterField::<
2005 3,
2006 0x1,
2007 1,
2008 0,
2009 spcr2::Pte,
2010 spcr2::Pte,
2011 Spcr2_SPEC,
2012 crate::common::RW,
2013 >::from_register(self, 0)
2014 }
2015
2016 #[doc = "RSPCK Auto-Stop Function Enable"]
2017 #[inline(always)]
2018 pub fn sckase(
2019 self,
2020 ) -> crate::common::RegisterField<
2021 4,
2022 0x1,
2023 1,
2024 0,
2025 spcr2::Sckase,
2026 spcr2::Sckase,
2027 Spcr2_SPEC,
2028 crate::common::RW,
2029 > {
2030 crate::common::RegisterField::<
2031 4,
2032 0x1,
2033 1,
2034 0,
2035 spcr2::Sckase,
2036 spcr2::Sckase,
2037 Spcr2_SPEC,
2038 crate::common::RW,
2039 >::from_register(self, 0)
2040 }
2041}
2042impl ::core::default::Default for Spcr2 {
2043 #[inline(always)]
2044 fn default() -> Spcr2 {
2045 <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
2046 }
2047}
2048pub mod spcr2 {
2049
2050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2051 pub struct Sppe_SPEC;
2052 pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
2053 impl Sppe {
2054 #[doc = "Do not add parity bit to transmit data and do not check parity bit of receive data"]
2055 pub const _0: Self = Self::new(0);
2056
2057 #[doc = "When SPCR.TXMD = 0: Add parity bit to transmit data and check parity bit of receive data When SPCR.TXMD = 1: Add parity bit to transmit data but do not check parity bit of receive data"]
2058 pub const _1: Self = Self::new(1);
2059 }
2060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2061 pub struct Spoe_SPEC;
2062 pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
2063 impl Spoe {
2064 #[doc = "Select even parity for transmission and reception"]
2065 pub const _0: Self = Self::new(0);
2066
2067 #[doc = "Select odd parity for transmission and reception"]
2068 pub const _1: Self = Self::new(1);
2069 }
2070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2071 pub struct Spiie_SPEC;
2072 pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
2073 impl Spiie {
2074 #[doc = "Disable idle interrupt requests"]
2075 pub const _0: Self = Self::new(0);
2076
2077 #[doc = "Enable idle interrupt requests"]
2078 pub const _1: Self = Self::new(1);
2079 }
2080 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2081 pub struct Pte_SPEC;
2082 pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
2083 impl Pte {
2084 #[doc = "Disable self-diagnosis function of the parity circuit"]
2085 pub const _0: Self = Self::new(0);
2086
2087 #[doc = "Enable self-diagnosis function of the parity circuit"]
2088 pub const _1: Self = Self::new(1);
2089 }
2090 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2091 pub struct Sckase_SPEC;
2092 pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
2093 impl Sckase {
2094 #[doc = "Disable RSPCK auto-stop function"]
2095 pub const _0: Self = Self::new(0);
2096
2097 #[doc = "Enable RSPCK auto-stop function"]
2098 pub const _1: Self = Self::new(1);
2099 }
2100}
2101#[doc(hidden)]
2102#[derive(Copy, Clone, Eq, PartialEq)]
2103pub struct Spcmd_SPEC;
2104impl crate::sealed::RegSpec for Spcmd_SPEC {
2105 type DataType = u16;
2106}
2107
2108#[doc = "SPI Command Register %s"]
2109pub type Spcmd = crate::RegValueT<Spcmd_SPEC>;
2110
2111impl Spcmd {
2112 #[doc = "RSPCK Phase Setting"]
2113 #[inline(always)]
2114 pub fn cpha(
2115 self,
2116 ) -> crate::common::RegisterField<
2117 0,
2118 0x1,
2119 1,
2120 0,
2121 spcmd::Cpha,
2122 spcmd::Cpha,
2123 Spcmd_SPEC,
2124 crate::common::RW,
2125 > {
2126 crate::common::RegisterField::<
2127 0,
2128 0x1,
2129 1,
2130 0,
2131 spcmd::Cpha,
2132 spcmd::Cpha,
2133 Spcmd_SPEC,
2134 crate::common::RW,
2135 >::from_register(self, 0)
2136 }
2137
2138 #[doc = "RSPCK Polarity Setting"]
2139 #[inline(always)]
2140 pub fn cpol(
2141 self,
2142 ) -> crate::common::RegisterField<
2143 1,
2144 0x1,
2145 1,
2146 0,
2147 spcmd::Cpol,
2148 spcmd::Cpol,
2149 Spcmd_SPEC,
2150 crate::common::RW,
2151 > {
2152 crate::common::RegisterField::<
2153 1,
2154 0x1,
2155 1,
2156 0,
2157 spcmd::Cpol,
2158 spcmd::Cpol,
2159 Spcmd_SPEC,
2160 crate::common::RW,
2161 >::from_register(self, 0)
2162 }
2163
2164 #[doc = "Bit Rate Division Setting"]
2165 #[inline(always)]
2166 pub fn brdv(
2167 self,
2168 ) -> crate::common::RegisterField<
2169 2,
2170 0x3,
2171 1,
2172 0,
2173 spcmd::Brdv,
2174 spcmd::Brdv,
2175 Spcmd_SPEC,
2176 crate::common::RW,
2177 > {
2178 crate::common::RegisterField::<
2179 2,
2180 0x3,
2181 1,
2182 0,
2183 spcmd::Brdv,
2184 spcmd::Brdv,
2185 Spcmd_SPEC,
2186 crate::common::RW,
2187 >::from_register(self, 0)
2188 }
2189
2190 #[doc = "SSL Signal Assertion Setting"]
2191 #[inline(always)]
2192 pub fn ssla(
2193 self,
2194 ) -> crate::common::RegisterField<
2195 4,
2196 0x7,
2197 1,
2198 0,
2199 spcmd::Ssla,
2200 spcmd::Ssla,
2201 Spcmd_SPEC,
2202 crate::common::RW,
2203 > {
2204 crate::common::RegisterField::<
2205 4,
2206 0x7,
2207 1,
2208 0,
2209 spcmd::Ssla,
2210 spcmd::Ssla,
2211 Spcmd_SPEC,
2212 crate::common::RW,
2213 >::from_register(self, 0)
2214 }
2215
2216 #[doc = "SSL Signal Level Keeping"]
2217 #[inline(always)]
2218 pub fn sslkp(
2219 self,
2220 ) -> crate::common::RegisterField<
2221 7,
2222 0x1,
2223 1,
2224 0,
2225 spcmd::Sslkp,
2226 spcmd::Sslkp,
2227 Spcmd_SPEC,
2228 crate::common::RW,
2229 > {
2230 crate::common::RegisterField::<
2231 7,
2232 0x1,
2233 1,
2234 0,
2235 spcmd::Sslkp,
2236 spcmd::Sslkp,
2237 Spcmd_SPEC,
2238 crate::common::RW,
2239 >::from_register(self, 0)
2240 }
2241
2242 #[doc = "SPI Data Length Setting"]
2243 #[inline(always)]
2244 pub fn spb(
2245 self,
2246 ) -> crate::common::RegisterField<
2247 8,
2248 0xf,
2249 1,
2250 0,
2251 spcmd::Spb,
2252 spcmd::Spb,
2253 Spcmd_SPEC,
2254 crate::common::RW,
2255 > {
2256 crate::common::RegisterField::<
2257 8,
2258 0xf,
2259 1,
2260 0,
2261 spcmd::Spb,
2262 spcmd::Spb,
2263 Spcmd_SPEC,
2264 crate::common::RW,
2265 >::from_register(self, 0)
2266 }
2267
2268 #[doc = "SPI LSB First"]
2269 #[inline(always)]
2270 pub fn lsbf(
2271 self,
2272 ) -> crate::common::RegisterField<
2273 12,
2274 0x1,
2275 1,
2276 0,
2277 spcmd::Lsbf,
2278 spcmd::Lsbf,
2279 Spcmd_SPEC,
2280 crate::common::RW,
2281 > {
2282 crate::common::RegisterField::<
2283 12,
2284 0x1,
2285 1,
2286 0,
2287 spcmd::Lsbf,
2288 spcmd::Lsbf,
2289 Spcmd_SPEC,
2290 crate::common::RW,
2291 >::from_register(self, 0)
2292 }
2293
2294 #[doc = "SPI Next-Access Delay Enable"]
2295 #[inline(always)]
2296 pub fn spnden(
2297 self,
2298 ) -> crate::common::RegisterField<
2299 13,
2300 0x1,
2301 1,
2302 0,
2303 spcmd::Spnden,
2304 spcmd::Spnden,
2305 Spcmd_SPEC,
2306 crate::common::RW,
2307 > {
2308 crate::common::RegisterField::<
2309 13,
2310 0x1,
2311 1,
2312 0,
2313 spcmd::Spnden,
2314 spcmd::Spnden,
2315 Spcmd_SPEC,
2316 crate::common::RW,
2317 >::from_register(self, 0)
2318 }
2319
2320 #[doc = "SSL Negation Delay Setting Enable"]
2321 #[inline(always)]
2322 pub fn slnden(
2323 self,
2324 ) -> crate::common::RegisterField<
2325 14,
2326 0x1,
2327 1,
2328 0,
2329 spcmd::Slnden,
2330 spcmd::Slnden,
2331 Spcmd_SPEC,
2332 crate::common::RW,
2333 > {
2334 crate::common::RegisterField::<
2335 14,
2336 0x1,
2337 1,
2338 0,
2339 spcmd::Slnden,
2340 spcmd::Slnden,
2341 Spcmd_SPEC,
2342 crate::common::RW,
2343 >::from_register(self, 0)
2344 }
2345
2346 #[doc = "RSPCK Delay Setting Enable"]
2347 #[inline(always)]
2348 pub fn sckden(
2349 self,
2350 ) -> crate::common::RegisterField<
2351 15,
2352 0x1,
2353 1,
2354 0,
2355 spcmd::Sckden,
2356 spcmd::Sckden,
2357 Spcmd_SPEC,
2358 crate::common::RW,
2359 > {
2360 crate::common::RegisterField::<
2361 15,
2362 0x1,
2363 1,
2364 0,
2365 spcmd::Sckden,
2366 spcmd::Sckden,
2367 Spcmd_SPEC,
2368 crate::common::RW,
2369 >::from_register(self, 0)
2370 }
2371}
2372impl ::core::default::Default for Spcmd {
2373 #[inline(always)]
2374 fn default() -> Spcmd {
2375 <crate::RegValueT<Spcmd_SPEC> as RegisterValue<_>>::new(1805)
2376 }
2377}
2378pub mod spcmd {
2379
2380 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2381 pub struct Cpha_SPEC;
2382 pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
2383 impl Cpha {
2384 #[doc = "Select data sampling on leading edge, data change on trailing edge"]
2385 pub const _0: Self = Self::new(0);
2386
2387 #[doc = "Select data change on leading edge, data sampling on trailing edge"]
2388 pub const _1: Self = Self::new(1);
2389 }
2390 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2391 pub struct Cpol_SPEC;
2392 pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
2393 impl Cpol {
2394 #[doc = "Set RSPCK low during idle"]
2395 pub const _0: Self = Self::new(0);
2396
2397 #[doc = "Set RSPCK high during idle"]
2398 pub const _1: Self = Self::new(1);
2399 }
2400 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2401 pub struct Brdv_SPEC;
2402 pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
2403 impl Brdv {
2404 #[doc = "Base bit rate"]
2405 pub const _00: Self = Self::new(0);
2406
2407 #[doc = "Base bit rate divided by 2"]
2408 pub const _01: Self = Self::new(1);
2409
2410 #[doc = "Base bit rate divided by 4"]
2411 pub const _10: Self = Self::new(2);
2412
2413 #[doc = "Base bit rate divided by 8"]
2414 pub const _11: Self = Self::new(3);
2415 }
2416 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2417 pub struct Ssla_SPEC;
2418 pub type Ssla = crate::EnumBitfieldStruct<u8, Ssla_SPEC>;
2419 impl Ssla {
2420 #[doc = "SSL0"]
2421 pub const _000: Self = Self::new(0);
2422
2423 #[doc = "SSL1"]
2424 pub const _001: Self = Self::new(1);
2425
2426 #[doc = "SSL2"]
2427 pub const _010: Self = Self::new(2);
2428
2429 #[doc = "SSL3"]
2430 pub const _011: Self = Self::new(3);
2431
2432 #[doc = "Setting prohibited"]
2433 pub const OTHERS: Self = Self::new(0);
2434 }
2435 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2436 pub struct Sslkp_SPEC;
2437 pub type Sslkp = crate::EnumBitfieldStruct<u8, Sslkp_SPEC>;
2438 impl Sslkp {
2439 #[doc = "Negate all SSL signals on completion of transfer"]
2440 pub const _0: Self = Self::new(0);
2441
2442 #[doc = "Keep SSL signal level from the end of transfer until the beginning of the next access"]
2443 pub const _1: Self = Self::new(1);
2444 }
2445 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2446 pub struct Spb_SPEC;
2447 pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
2448 impl Spb {
2449 #[doc = "20 bits"]
2450 pub const _0_X_0: Self = Self::new(0);
2451
2452 #[doc = "24 bits"]
2453 pub const _0_X_1: Self = Self::new(1);
2454
2455 #[doc = "32 bits"]
2456 pub const _0_X_2: Self = Self::new(2);
2457
2458 #[doc = "32 bits"]
2459 pub const _0_X_3: Self = Self::new(3);
2460
2461 #[doc = "9 bits"]
2462 pub const _0_X_8: Self = Self::new(8);
2463
2464 #[doc = "10 bits"]
2465 pub const _0_X_9: Self = Self::new(9);
2466
2467 #[doc = "11 bits"]
2468 pub const _0_X_A: Self = Self::new(10);
2469
2470 #[doc = "12 bits"]
2471 pub const _0_X_B: Self = Self::new(11);
2472
2473 #[doc = "13 bits"]
2474 pub const _0_X_C: Self = Self::new(12);
2475
2476 #[doc = "14 bits"]
2477 pub const _0_X_D: Self = Self::new(13);
2478
2479 #[doc = "15 bits"]
2480 pub const _0_X_E: Self = Self::new(14);
2481
2482 #[doc = "16 bits"]
2483 pub const _0_X_F: Self = Self::new(15);
2484
2485 #[doc = "8 bits"]
2486 pub const OTHERS: Self = Self::new(0);
2487 }
2488 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2489 pub struct Lsbf_SPEC;
2490 pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
2491 impl Lsbf {
2492 #[doc = "MSB-first"]
2493 pub const _0: Self = Self::new(0);
2494
2495 #[doc = "LSB-first"]
2496 pub const _1: Self = Self::new(1);
2497 }
2498 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2499 pub struct Spnden_SPEC;
2500 pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
2501 impl Spnden {
2502 #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKA"]
2503 pub const _0: Self = Self::new(0);
2504
2505 #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
2506 pub const _1: Self = Self::new(1);
2507 }
2508 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2509 pub struct Slnden_SPEC;
2510 pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
2511 impl Slnden {
2512 #[doc = "Select SSL negation delay of 1 RSPCK"]
2513 pub const _0: Self = Self::new(0);
2514
2515 #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
2516 pub const _1: Self = Self::new(1);
2517 }
2518 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2519 pub struct Sckden_SPEC;
2520 pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
2521 impl Sckden {
2522 #[doc = "Select RSPCK delay of 1 RSPCK"]
2523 pub const _0: Self = Self::new(0);
2524
2525 #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
2526 pub const _1: Self = Self::new(1);
2527 }
2528}
2529#[doc(hidden)]
2530#[derive(Copy, Clone, Eq, PartialEq)]
2531pub struct Spdcr2_SPEC;
2532impl crate::sealed::RegSpec for Spdcr2_SPEC {
2533 type DataType = u8;
2534}
2535
2536#[doc = "SPI Data Control Register 2"]
2537pub type Spdcr2 = crate::RegValueT<Spdcr2_SPEC>;
2538
2539impl Spdcr2 {
2540 #[doc = "Byte Swap Operating Mode Select"]
2541 #[inline(always)]
2542 pub fn bysw(
2543 self,
2544 ) -> crate::common::RegisterField<
2545 0,
2546 0x1,
2547 1,
2548 0,
2549 spdcr2::Bysw,
2550 spdcr2::Bysw,
2551 Spdcr2_SPEC,
2552 crate::common::RW,
2553 > {
2554 crate::common::RegisterField::<
2555 0,
2556 0x1,
2557 1,
2558 0,
2559 spdcr2::Bysw,
2560 spdcr2::Bysw,
2561 Spdcr2_SPEC,
2562 crate::common::RW,
2563 >::from_register(self, 0)
2564 }
2565
2566 #[doc = "Serial Data Invert Bit"]
2567 #[inline(always)]
2568 pub fn sinv(
2569 self,
2570 ) -> crate::common::RegisterField<
2571 1,
2572 0x1,
2573 1,
2574 0,
2575 spdcr2::Sinv,
2576 spdcr2::Sinv,
2577 Spdcr2_SPEC,
2578 crate::common::RW,
2579 > {
2580 crate::common::RegisterField::<
2581 1,
2582 0x1,
2583 1,
2584 0,
2585 spdcr2::Sinv,
2586 spdcr2::Sinv,
2587 Spdcr2_SPEC,
2588 crate::common::RW,
2589 >::from_register(self, 0)
2590 }
2591}
2592impl ::core::default::Default for Spdcr2 {
2593 #[inline(always)]
2594 fn default() -> Spdcr2 {
2595 <crate::RegValueT<Spdcr2_SPEC> as RegisterValue<_>>::new(0)
2596 }
2597}
2598pub mod spdcr2 {
2599
2600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2601 pub struct Bysw_SPEC;
2602 pub type Bysw = crate::EnumBitfieldStruct<u8, Bysw_SPEC>;
2603 impl Bysw {
2604 #[doc = "Byte Swap OFF"]
2605 pub const _0: Self = Self::new(0);
2606
2607 #[doc = "Byte Swap ON"]
2608 pub const _1: Self = Self::new(1);
2609 }
2610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2611 pub struct Sinv_SPEC;
2612 pub type Sinv = crate::EnumBitfieldStruct<u8, Sinv_SPEC>;
2613 impl Sinv {
2614 #[doc = "Not invert serial data"]
2615 pub const _0: Self = Self::new(0);
2616
2617 #[doc = "Invert serial data"]
2618 pub const _1: Self = Self::new(1);
2619 }
2620}
2621#[doc(hidden)]
2622#[derive(Copy, Clone, Eq, PartialEq)]
2623pub struct Spcr3_SPEC;
2624impl crate::sealed::RegSpec for Spcr3_SPEC {
2625 type DataType = u8;
2626}
2627
2628#[doc = "SPI Control Register 3"]
2629pub type Spcr3 = crate::RegValueT<Spcr3_SPEC>;
2630
2631impl Spcr3 {
2632 #[doc = "Extended Communication Mode Select"]
2633 #[inline(always)]
2634 pub fn etxmd(
2635 self,
2636 ) -> crate::common::RegisterField<
2637 0,
2638 0x1,
2639 1,
2640 0,
2641 spcr3::Etxmd,
2642 spcr3::Etxmd,
2643 Spcr3_SPEC,
2644 crate::common::RW,
2645 > {
2646 crate::common::RegisterField::<
2647 0,
2648 0x1,
2649 1,
2650 0,
2651 spcr3::Etxmd,
2652 spcr3::Etxmd,
2653 Spcr3_SPEC,
2654 crate::common::RW,
2655 >::from_register(self, 0)
2656 }
2657
2658 #[doc = "Between Burst Transfer Frames Delay Select"]
2659 #[inline(always)]
2660 pub fn bfds(
2661 self,
2662 ) -> crate::common::RegisterField<
2663 1,
2664 0x1,
2665 1,
2666 0,
2667 spcr3::Bfds,
2668 spcr3::Bfds,
2669 Spcr3_SPEC,
2670 crate::common::RW,
2671 > {
2672 crate::common::RegisterField::<
2673 1,
2674 0x1,
2675 1,
2676 0,
2677 spcr3::Bfds,
2678 spcr3::Bfds,
2679 Spcr3_SPEC,
2680 crate::common::RW,
2681 >::from_register(self, 0)
2682 }
2683
2684 #[doc = "SPI Communication End Interrupt Enable"]
2685 #[inline(always)]
2686 pub fn cendie(
2687 self,
2688 ) -> crate::common::RegisterField<
2689 4,
2690 0x1,
2691 1,
2692 0,
2693 spcr3::Cendie,
2694 spcr3::Cendie,
2695 Spcr3_SPEC,
2696 crate::common::RW,
2697 > {
2698 crate::common::RegisterField::<
2699 4,
2700 0x1,
2701 1,
2702 0,
2703 spcr3::Cendie,
2704 spcr3::Cendie,
2705 Spcr3_SPEC,
2706 crate::common::RW,
2707 >::from_register(self, 0)
2708 }
2709}
2710impl ::core::default::Default for Spcr3 {
2711 #[inline(always)]
2712 fn default() -> Spcr3 {
2713 <crate::RegValueT<Spcr3_SPEC> as RegisterValue<_>>::new(0)
2714 }
2715}
2716pub mod spcr3 {
2717
2718 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2719 pub struct Etxmd_SPEC;
2720 pub type Etxmd = crate::EnumBitfieldStruct<u8, Etxmd_SPEC>;
2721 impl Etxmd {
2722 #[doc = "Full-duplex synchronous or transmit-only serial communications. \\[the SPCR.TXMD bit is enabled\\]"]
2723 pub const _0: Self = Self::new(0);
2724
2725 #[doc = "Receive-only serial communications in slave mode (SPCR.MSTR bit = 0). \\[the SPCR.TXMD bit is disabled\\] Setting is prohibited in master mode (SPCR.MSTR bit = 1)."]
2726 pub const _1: Self = Self::new(1);
2727 }
2728 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2729 pub struct Bfds_SPEC;
2730 pub type Bfds = crate::EnumBitfieldStruct<u8, Bfds_SPEC>;
2731 impl Bfds {
2732 #[doc = "Delay (RSPCK delay, SSL negation delay and next-access delay) between frames is inserted in burst transfer."]
2733 pub const _0: Self = Self::new(0);
2734
2735 #[doc = "Delay between frames is not inserted in burst transfer."]
2736 pub const _1: Self = Self::new(1);
2737 }
2738 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2739 pub struct Cendie_SPEC;
2740 pub type Cendie = crate::EnumBitfieldStruct<u8, Cendie_SPEC>;
2741 impl Cendie {
2742 #[doc = "Communication end interrupt request is disabled."]
2743 pub const _0: Self = Self::new(0);
2744
2745 #[doc = "Communication end interrupt request is enabled."]
2746 pub const _1: Self = Self::new(1);
2747 }
2748}