1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Renesas Memory Protection Unit"]
28unsafe impl ::core::marker::Send for super::Rmpu {}
29unsafe impl ::core::marker::Sync for super::Rmpu {}
30impl super::Rmpu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "MMPU Operation After Detection Register"]
38 #[inline(always)]
39 pub const fn mmpuoad(
40 &self,
41 ) -> &'static crate::common::Reg<self::Mmpuoad_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Mmpuoad_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "MMPU Operation After Detection Protect Register"]
50 #[inline(always)]
51 pub const fn mmpuoadpt(
52 &self,
53 ) -> &'static crate::common::Reg<self::Mmpuoadpt_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Mmpuoadpt_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(4usize),
57 )
58 }
59 }
60
61 #[doc = "MMPU Enable Register for DMAC"]
62 #[inline(always)]
63 pub const fn mmpuendmac(
64 &self,
65 ) -> &'static crate::common::Reg<self::Mmpuendmac_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::Mmpuendmac_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(256usize),
69 )
70 }
71 }
72
73 #[doc = "MMPU Enable Protect Register for DMAC"]
74 #[inline(always)]
75 pub const fn mmpuenptdmac(
76 &self,
77 ) -> &'static crate::common::Reg<self::Mmpuenptdmac_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::Mmpuenptdmac_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(260usize),
81 )
82 }
83 }
84
85 #[doc = "MMPU Regions Protect Register for DMAC"]
86 #[inline(always)]
87 pub const fn mmpurptdmac(
88 &self,
89 ) -> &'static crate::common::Reg<self::Mmpurptdmac_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::Mmpurptdmac_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(264usize),
93 )
94 }
95 }
96
97 #[doc = "MMPU Regions Protect register for DMAC Secure"]
98 #[inline(always)]
99 pub const fn mmpurptdmac_sec(
100 &self,
101 ) -> &'static crate::common::Reg<self::MmpurptdmacSec_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::MmpurptdmacSec_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(268usize),
105 )
106 }
107 }
108
109 #[doc = "MMPU Access Control Register for DMAC"]
110 #[inline(always)]
111 pub const fn mmpuacdmac(
112 &self,
113 ) -> &'static crate::common::ClusterRegisterArray<
114 crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW>,
115 8,
116 0x10,
117 > {
118 unsafe {
119 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
120 }
121 }
122 #[inline(always)]
123 pub const fn mmpuacdmac0(
124 &self,
125 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(0x200usize),
129 )
130 }
131 }
132 #[inline(always)]
133 pub const fn mmpuacdmac1(
134 &self,
135 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(0x210usize),
139 )
140 }
141 }
142 #[inline(always)]
143 pub const fn mmpuacdmac2(
144 &self,
145 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(0x220usize),
149 )
150 }
151 }
152 #[inline(always)]
153 pub const fn mmpuacdmac3(
154 &self,
155 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(0x230usize),
159 )
160 }
161 }
162 #[inline(always)]
163 pub const fn mmpuacdmac4(
164 &self,
165 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(0x240usize),
169 )
170 }
171 }
172 #[inline(always)]
173 pub const fn mmpuacdmac5(
174 &self,
175 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(0x250usize),
179 )
180 }
181 }
182 #[inline(always)]
183 pub const fn mmpuacdmac6(
184 &self,
185 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
186 unsafe {
187 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
188 self._svd2pac_as_ptr().add(0x260usize),
189 )
190 }
191 }
192 #[inline(always)]
193 pub const fn mmpuacdmac7(
194 &self,
195 ) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(0x270usize),
199 )
200 }
201 }
202
203 #[doc = "MMPU Start Address Register for DMAC"]
204 #[inline(always)]
205 pub const fn mmpusdmac(
206 &self,
207 ) -> &'static crate::common::ClusterRegisterArray<
208 crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW>,
209 8,
210 0x10,
211 > {
212 unsafe {
213 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
214 }
215 }
216 #[inline(always)]
217 pub const fn mmpusdmac0(
218 &self,
219 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(0x204usize),
223 )
224 }
225 }
226 #[inline(always)]
227 pub const fn mmpusdmac1(
228 &self,
229 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(0x214usize),
233 )
234 }
235 }
236 #[inline(always)]
237 pub const fn mmpusdmac2(
238 &self,
239 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
240 unsafe {
241 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
242 self._svd2pac_as_ptr().add(0x224usize),
243 )
244 }
245 }
246 #[inline(always)]
247 pub const fn mmpusdmac3(
248 &self,
249 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(0x234usize),
253 )
254 }
255 }
256 #[inline(always)]
257 pub const fn mmpusdmac4(
258 &self,
259 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
260 unsafe {
261 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
262 self._svd2pac_as_ptr().add(0x244usize),
263 )
264 }
265 }
266 #[inline(always)]
267 pub const fn mmpusdmac5(
268 &self,
269 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(0x254usize),
273 )
274 }
275 }
276 #[inline(always)]
277 pub const fn mmpusdmac6(
278 &self,
279 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
280 unsafe {
281 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
282 self._svd2pac_as_ptr().add(0x264usize),
283 )
284 }
285 }
286 #[inline(always)]
287 pub const fn mmpusdmac7(
288 &self,
289 ) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
290 unsafe {
291 crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
292 self._svd2pac_as_ptr().add(0x274usize),
293 )
294 }
295 }
296
297 #[doc = "MMPU End Address Register for DMAC"]
298 #[inline(always)]
299 pub const fn mmpuedmac(
300 &self,
301 ) -> &'static crate::common::ClusterRegisterArray<
302 crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW>,
303 8,
304 0x10,
305 > {
306 unsafe {
307 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
308 }
309 }
310 #[inline(always)]
311 pub const fn mmpuedmac0(
312 &self,
313 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
314 unsafe {
315 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
316 self._svd2pac_as_ptr().add(0x208usize),
317 )
318 }
319 }
320 #[inline(always)]
321 pub const fn mmpuedmac1(
322 &self,
323 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(0x218usize),
327 )
328 }
329 }
330 #[inline(always)]
331 pub const fn mmpuedmac2(
332 &self,
333 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
334 unsafe {
335 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
336 self._svd2pac_as_ptr().add(0x228usize),
337 )
338 }
339 }
340 #[inline(always)]
341 pub const fn mmpuedmac3(
342 &self,
343 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
344 unsafe {
345 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
346 self._svd2pac_as_ptr().add(0x238usize),
347 )
348 }
349 }
350 #[inline(always)]
351 pub const fn mmpuedmac4(
352 &self,
353 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(0x248usize),
357 )
358 }
359 }
360 #[inline(always)]
361 pub const fn mmpuedmac5(
362 &self,
363 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
364 unsafe {
365 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
366 self._svd2pac_as_ptr().add(0x258usize),
367 )
368 }
369 }
370 #[inline(always)]
371 pub const fn mmpuedmac6(
372 &self,
373 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
374 unsafe {
375 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
376 self._svd2pac_as_ptr().add(0x268usize),
377 )
378 }
379 }
380 #[inline(always)]
381 pub const fn mmpuedmac7(
382 &self,
383 ) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
384 unsafe {
385 crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
386 self._svd2pac_as_ptr().add(0x278usize),
387 )
388 }
389 }
390
391 #[doc = "MMPU Enable Register for EDMAC"]
392 #[inline(always)]
393 pub const fn mmpuenedmac(
394 &self,
395 ) -> &'static crate::common::Reg<self::Mmpuenedmac_SPEC, crate::common::RW> {
396 unsafe {
397 crate::common::Reg::<self::Mmpuenedmac_SPEC, crate::common::RW>::from_ptr(
398 self._svd2pac_as_ptr().add(1280usize),
399 )
400 }
401 }
402
403 #[doc = "MMPU Enable Protect Register for EDMAC"]
404 #[inline(always)]
405 pub const fn mmpuenptedmac(
406 &self,
407 ) -> &'static crate::common::Reg<self::Mmpuenptedmac_SPEC, crate::common::RW> {
408 unsafe {
409 crate::common::Reg::<self::Mmpuenptedmac_SPEC, crate::common::RW>::from_ptr(
410 self._svd2pac_as_ptr().add(1284usize),
411 )
412 }
413 }
414
415 #[doc = "MMPU Regions Protect Register for EDMAC"]
416 #[inline(always)]
417 pub const fn mmpurptedmac(
418 &self,
419 ) -> &'static crate::common::Reg<self::Mmpurptedmac_SPEC, crate::common::RW> {
420 unsafe {
421 crate::common::Reg::<self::Mmpurptedmac_SPEC, crate::common::RW>::from_ptr(
422 self._svd2pac_as_ptr().add(1288usize),
423 )
424 }
425 }
426
427 #[doc = "MMPU Access Control Register for EDMAC"]
428 #[inline(always)]
429 pub const fn mmpuacedmac(
430 &self,
431 ) -> &'static crate::common::ClusterRegisterArray<
432 crate::common::Reg<self::Mmpuacedmac_SPEC, crate::common::RW>,
433 4,
434 0x10,
435 > {
436 unsafe {
437 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x600usize))
438 }
439 }
440 #[inline(always)]
441 pub const fn mmpuacedmac0(
442 &self,
443 ) -> &'static crate::common::Reg<self::Mmpuacedmac_SPEC, crate::common::RW> {
444 unsafe {
445 crate::common::Reg::<self::Mmpuacedmac_SPEC, crate::common::RW>::from_ptr(
446 self._svd2pac_as_ptr().add(0x600usize),
447 )
448 }
449 }
450 #[inline(always)]
451 pub const fn mmpuacedmac1(
452 &self,
453 ) -> &'static crate::common::Reg<self::Mmpuacedmac_SPEC, crate::common::RW> {
454 unsafe {
455 crate::common::Reg::<self::Mmpuacedmac_SPEC, crate::common::RW>::from_ptr(
456 self._svd2pac_as_ptr().add(0x610usize),
457 )
458 }
459 }
460 #[inline(always)]
461 pub const fn mmpuacedmac2(
462 &self,
463 ) -> &'static crate::common::Reg<self::Mmpuacedmac_SPEC, crate::common::RW> {
464 unsafe {
465 crate::common::Reg::<self::Mmpuacedmac_SPEC, crate::common::RW>::from_ptr(
466 self._svd2pac_as_ptr().add(0x620usize),
467 )
468 }
469 }
470 #[inline(always)]
471 pub const fn mmpuacedmac3(
472 &self,
473 ) -> &'static crate::common::Reg<self::Mmpuacedmac_SPEC, crate::common::RW> {
474 unsafe {
475 crate::common::Reg::<self::Mmpuacedmac_SPEC, crate::common::RW>::from_ptr(
476 self._svd2pac_as_ptr().add(0x630usize),
477 )
478 }
479 }
480
481 #[doc = "MMPU Start Address Register for EDMAC"]
482 #[inline(always)]
483 pub const fn mmpusedmac(
484 &self,
485 ) -> &'static crate::common::ClusterRegisterArray<
486 crate::common::Reg<self::Mmpusedmac_SPEC, crate::common::RW>,
487 4,
488 0x10,
489 > {
490 unsafe {
491 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x604usize))
492 }
493 }
494 #[inline(always)]
495 pub const fn mmpusedmac0(
496 &self,
497 ) -> &'static crate::common::Reg<self::Mmpusedmac_SPEC, crate::common::RW> {
498 unsafe {
499 crate::common::Reg::<self::Mmpusedmac_SPEC, crate::common::RW>::from_ptr(
500 self._svd2pac_as_ptr().add(0x604usize),
501 )
502 }
503 }
504 #[inline(always)]
505 pub const fn mmpusedmac1(
506 &self,
507 ) -> &'static crate::common::Reg<self::Mmpusedmac_SPEC, crate::common::RW> {
508 unsafe {
509 crate::common::Reg::<self::Mmpusedmac_SPEC, crate::common::RW>::from_ptr(
510 self._svd2pac_as_ptr().add(0x614usize),
511 )
512 }
513 }
514 #[inline(always)]
515 pub const fn mmpusedmac2(
516 &self,
517 ) -> &'static crate::common::Reg<self::Mmpusedmac_SPEC, crate::common::RW> {
518 unsafe {
519 crate::common::Reg::<self::Mmpusedmac_SPEC, crate::common::RW>::from_ptr(
520 self._svd2pac_as_ptr().add(0x624usize),
521 )
522 }
523 }
524 #[inline(always)]
525 pub const fn mmpusedmac3(
526 &self,
527 ) -> &'static crate::common::Reg<self::Mmpusedmac_SPEC, crate::common::RW> {
528 unsafe {
529 crate::common::Reg::<self::Mmpusedmac_SPEC, crate::common::RW>::from_ptr(
530 self._svd2pac_as_ptr().add(0x634usize),
531 )
532 }
533 }
534
535 #[doc = "MMPU End Address Register for EDMAC"]
536 #[inline(always)]
537 pub const fn mmpueedmac(
538 &self,
539 ) -> &'static crate::common::ClusterRegisterArray<
540 crate::common::Reg<self::Mmpueedmac_SPEC, crate::common::RW>,
541 4,
542 0x10,
543 > {
544 unsafe {
545 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x608usize))
546 }
547 }
548 #[inline(always)]
549 pub const fn mmpueedmac0(
550 &self,
551 ) -> &'static crate::common::Reg<self::Mmpueedmac_SPEC, crate::common::RW> {
552 unsafe {
553 crate::common::Reg::<self::Mmpueedmac_SPEC, crate::common::RW>::from_ptr(
554 self._svd2pac_as_ptr().add(0x608usize),
555 )
556 }
557 }
558 #[inline(always)]
559 pub const fn mmpueedmac1(
560 &self,
561 ) -> &'static crate::common::Reg<self::Mmpueedmac_SPEC, crate::common::RW> {
562 unsafe {
563 crate::common::Reg::<self::Mmpueedmac_SPEC, crate::common::RW>::from_ptr(
564 self._svd2pac_as_ptr().add(0x618usize),
565 )
566 }
567 }
568 #[inline(always)]
569 pub const fn mmpueedmac2(
570 &self,
571 ) -> &'static crate::common::Reg<self::Mmpueedmac_SPEC, crate::common::RW> {
572 unsafe {
573 crate::common::Reg::<self::Mmpueedmac_SPEC, crate::common::RW>::from_ptr(
574 self._svd2pac_as_ptr().add(0x628usize),
575 )
576 }
577 }
578 #[inline(always)]
579 pub const fn mmpueedmac3(
580 &self,
581 ) -> &'static crate::common::Reg<self::Mmpueedmac_SPEC, crate::common::RW> {
582 unsafe {
583 crate::common::Reg::<self::Mmpueedmac_SPEC, crate::common::RW>::from_ptr(
584 self._svd2pac_as_ptr().add(0x638usize),
585 )
586 }
587 }
588}
589#[doc(hidden)]
590#[derive(Copy, Clone, Eq, PartialEq)]
591pub struct Mmpuoad_SPEC;
592impl crate::sealed::RegSpec for Mmpuoad_SPEC {
593 type DataType = u16;
594}
595
596#[doc = "MMPU Operation After Detection Register"]
597pub type Mmpuoad = crate::RegValueT<Mmpuoad_SPEC>;
598
599impl Mmpuoad {
600 #[doc = "Operation after detection"]
601 #[inline(always)]
602 pub fn oad(
603 self,
604 ) -> crate::common::RegisterField<
605 0,
606 0x1,
607 1,
608 0,
609 mmpuoad::Oad,
610 mmpuoad::Oad,
611 Mmpuoad_SPEC,
612 crate::common::RW,
613 > {
614 crate::common::RegisterField::<
615 0,
616 0x1,
617 1,
618 0,
619 mmpuoad::Oad,
620 mmpuoad::Oad,
621 Mmpuoad_SPEC,
622 crate::common::RW,
623 >::from_register(self, 0)
624 }
625
626 #[doc = "This bit enables or disables writes to the OAD bit."]
627 #[inline(always)]
628 pub fn key(
629 self,
630 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoad_SPEC, crate::common::W> {
631 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoad_SPEC,crate::common::W>::from_register(self,0)
632 }
633}
634impl ::core::default::Default for Mmpuoad {
635 #[inline(always)]
636 fn default() -> Mmpuoad {
637 <crate::RegValueT<Mmpuoad_SPEC> as RegisterValue<_>>::new(0)
638 }
639}
640pub mod mmpuoad {
641
642 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
643 pub struct Oad_SPEC;
644 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
645 impl Oad {
646 #[doc = "Non-maskable interrupt"]
647 pub const _0: Self = Self::new(0);
648
649 #[doc = "Reset"]
650 pub const _1: Self = Self::new(1);
651 }
652}
653#[doc(hidden)]
654#[derive(Copy, Clone, Eq, PartialEq)]
655pub struct Mmpuoadpt_SPEC;
656impl crate::sealed::RegSpec for Mmpuoadpt_SPEC {
657 type DataType = u16;
658}
659
660#[doc = "MMPU Operation After Detection Protect Register"]
661pub type Mmpuoadpt = crate::RegValueT<Mmpuoadpt_SPEC>;
662
663impl Mmpuoadpt {
664 #[doc = "Protection of register"]
665 #[inline(always)]
666 pub fn protect(
667 self,
668 ) -> crate::common::RegisterField<
669 0,
670 0x1,
671 1,
672 0,
673 mmpuoadpt::Protect,
674 mmpuoadpt::Protect,
675 Mmpuoadpt_SPEC,
676 crate::common::RW,
677 > {
678 crate::common::RegisterField::<
679 0,
680 0x1,
681 1,
682 0,
683 mmpuoadpt::Protect,
684 mmpuoadpt::Protect,
685 Mmpuoadpt_SPEC,
686 crate::common::RW,
687 >::from_register(self, 0)
688 }
689
690 #[doc = "Key code"]
691 #[inline(always)]
692 pub fn key(
693 self,
694 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoadpt_SPEC, crate::common::W> {
695 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoadpt_SPEC,crate::common::W>::from_register(self,0)
696 }
697}
698impl ::core::default::Default for Mmpuoadpt {
699 #[inline(always)]
700 fn default() -> Mmpuoadpt {
701 <crate::RegValueT<Mmpuoadpt_SPEC> as RegisterValue<_>>::new(0)
702 }
703}
704pub mod mmpuoadpt {
705
706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
707 pub struct Protect_SPEC;
708 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
709 impl Protect {
710 #[doc = "MMPUOAD register writes are possible."]
711 pub const _0: Self = Self::new(0);
712
713 #[doc = "MMPUOAD register writes are protected. Read is possible."]
714 pub const _1: Self = Self::new(1);
715 }
716}
717#[doc(hidden)]
718#[derive(Copy, Clone, Eq, PartialEq)]
719pub struct Mmpuendmac_SPEC;
720impl crate::sealed::RegSpec for Mmpuendmac_SPEC {
721 type DataType = u16;
722}
723
724#[doc = "MMPU Enable Register for DMAC"]
725pub type Mmpuendmac = crate::RegValueT<Mmpuendmac_SPEC>;
726
727impl Mmpuendmac {
728 #[doc = "Bus Master MPU of DMAC enable"]
729 #[inline(always)]
730 pub fn enable(
731 self,
732 ) -> crate::common::RegisterField<
733 0,
734 0x1,
735 1,
736 0,
737 mmpuendmac::Enable,
738 mmpuendmac::Enable,
739 Mmpuendmac_SPEC,
740 crate::common::RW,
741 > {
742 crate::common::RegisterField::<
743 0,
744 0x1,
745 1,
746 0,
747 mmpuendmac::Enable,
748 mmpuendmac::Enable,
749 Mmpuendmac_SPEC,
750 crate::common::RW,
751 >::from_register(self, 0)
752 }
753
754 #[doc = "These bits enable or disable writes to the ENABLE bit."]
755 #[inline(always)]
756 pub fn key(
757 self,
758 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuendmac_SPEC, crate::common::W>
759 {
760 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuendmac_SPEC,crate::common::W>::from_register(self,0)
761 }
762}
763impl ::core::default::Default for Mmpuendmac {
764 #[inline(always)]
765 fn default() -> Mmpuendmac {
766 <crate::RegValueT<Mmpuendmac_SPEC> as RegisterValue<_>>::new(0)
767 }
768}
769pub mod mmpuendmac {
770
771 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
772 pub struct Enable_SPEC;
773 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
774 impl Enable {
775 #[doc = "Bus Master MPU of DMAC is disabled."]
776 pub const _0: Self = Self::new(0);
777
778 #[doc = "Bus Master MPU of DMAC is enabled."]
779 pub const _1: Self = Self::new(1);
780 }
781}
782#[doc(hidden)]
783#[derive(Copy, Clone, Eq, PartialEq)]
784pub struct Mmpuenptdmac_SPEC;
785impl crate::sealed::RegSpec for Mmpuenptdmac_SPEC {
786 type DataType = u16;
787}
788
789#[doc = "MMPU Enable Protect Register for DMAC"]
790pub type Mmpuenptdmac = crate::RegValueT<Mmpuenptdmac_SPEC>;
791
792impl Mmpuenptdmac {
793 #[doc = "Protection of register"]
794 #[inline(always)]
795 pub fn protect(
796 self,
797 ) -> crate::common::RegisterField<
798 0,
799 0x1,
800 1,
801 0,
802 mmpuenptdmac::Protect,
803 mmpuenptdmac::Protect,
804 Mmpuenptdmac_SPEC,
805 crate::common::RW,
806 > {
807 crate::common::RegisterField::<
808 0,
809 0x1,
810 1,
811 0,
812 mmpuenptdmac::Protect,
813 mmpuenptdmac::Protect,
814 Mmpuenptdmac_SPEC,
815 crate::common::RW,
816 >::from_register(self, 0)
817 }
818
819 #[doc = "These bits enable or disable writes to the PROTECT bit."]
820 #[inline(always)]
821 pub fn key(
822 self,
823 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuenptdmac_SPEC, crate::common::W>
824 {
825 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuenptdmac_SPEC,crate::common::W>::from_register(self,0)
826 }
827}
828impl ::core::default::Default for Mmpuenptdmac {
829 #[inline(always)]
830 fn default() -> Mmpuenptdmac {
831 <crate::RegValueT<Mmpuenptdmac_SPEC> as RegisterValue<_>>::new(0)
832 }
833}
834pub mod mmpuenptdmac {
835
836 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
837 pub struct Protect_SPEC;
838 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
839 impl Protect {
840 #[doc = "MMPUENDMAC register writes are possible."]
841 pub const _0: Self = Self::new(0);
842
843 #[doc = "MMPUENDMAC register writes are protected. Read is possible."]
844 pub const _1: Self = Self::new(1);
845 }
846}
847#[doc(hidden)]
848#[derive(Copy, Clone, Eq, PartialEq)]
849pub struct Mmpurptdmac_SPEC;
850impl crate::sealed::RegSpec for Mmpurptdmac_SPEC {
851 type DataType = u16;
852}
853
854#[doc = "MMPU Regions Protect Register for DMAC"]
855pub type Mmpurptdmac = crate::RegValueT<Mmpurptdmac_SPEC>;
856
857impl Mmpurptdmac {
858 #[doc = "Protection of register"]
859 #[inline(always)]
860 pub fn protect(
861 self,
862 ) -> crate::common::RegisterField<
863 0,
864 0x1,
865 1,
866 0,
867 mmpurptdmac::Protect,
868 mmpurptdmac::Protect,
869 Mmpurptdmac_SPEC,
870 crate::common::RW,
871 > {
872 crate::common::RegisterField::<
873 0,
874 0x1,
875 1,
876 0,
877 mmpurptdmac::Protect,
878 mmpurptdmac::Protect,
879 Mmpurptdmac_SPEC,
880 crate::common::RW,
881 >::from_register(self, 0)
882 }
883
884 #[doc = "These bits enable or disable writes to the PROTECT bit."]
885 #[inline(always)]
886 pub fn key(
887 self,
888 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpurptdmac_SPEC, crate::common::W>
889 {
890 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpurptdmac_SPEC,crate::common::W>::from_register(self,0)
891 }
892}
893impl ::core::default::Default for Mmpurptdmac {
894 #[inline(always)]
895 fn default() -> Mmpurptdmac {
896 <crate::RegValueT<Mmpurptdmac_SPEC> as RegisterValue<_>>::new(0)
897 }
898}
899pub mod mmpurptdmac {
900
901 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
902 pub struct Protect_SPEC;
903 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
904 impl Protect {
905 #[doc = "Bus Master MPU register for DMAC writing is possible."]
906 pub const _0: Self = Self::new(0);
907
908 #[doc = "Bus Master MPU register for DMAC writing is protected. Read is possible."]
909 pub const _1: Self = Self::new(1);
910 }
911}
912#[doc(hidden)]
913#[derive(Copy, Clone, Eq, PartialEq)]
914pub struct MmpurptdmacSec_SPEC;
915impl crate::sealed::RegSpec for MmpurptdmacSec_SPEC {
916 type DataType = u16;
917}
918
919#[doc = "MMPU Regions Protect register for DMAC Secure"]
920pub type MmpurptdmacSec = crate::RegValueT<MmpurptdmacSec_SPEC>;
921
922impl MmpurptdmacSec {
923 #[doc = "Protection of register"]
924 #[inline(always)]
925 pub fn protect(
926 self,
927 ) -> crate::common::RegisterField<
928 0,
929 0x1,
930 1,
931 0,
932 mmpurptdmac_sec::Protect,
933 mmpurptdmac_sec::Protect,
934 MmpurptdmacSec_SPEC,
935 crate::common::RW,
936 > {
937 crate::common::RegisterField::<
938 0,
939 0x1,
940 1,
941 0,
942 mmpurptdmac_sec::Protect,
943 mmpurptdmac_sec::Protect,
944 MmpurptdmacSec_SPEC,
945 crate::common::RW,
946 >::from_register(self, 0)
947 }
948
949 #[doc = "These bits enable or disable writes to the PROTECT bit."]
950 #[inline(always)]
951 pub fn key(
952 self,
953 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, MmpurptdmacSec_SPEC, crate::common::W>
954 {
955 crate::common::RegisterField::<8,0xff,1,0,u8,u8,MmpurptdmacSec_SPEC,crate::common::W>::from_register(self,0)
956 }
957}
958impl ::core::default::Default for MmpurptdmacSec {
959 #[inline(always)]
960 fn default() -> MmpurptdmacSec {
961 <crate::RegValueT<MmpurptdmacSec_SPEC> as RegisterValue<_>>::new(0)
962 }
963}
964pub mod mmpurptdmac_sec {
965
966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
967 pub struct Protect_SPEC;
968 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
969 impl Protect {
970 #[doc = "Bus master MPU register for DMAC secure writes are possible."]
971 pub const _0: Self = Self::new(0);
972
973 #[doc = "Bus master MPU register for DMAC secure writes are protected. Read is possible."]
974 pub const _1: Self = Self::new(1);
975 }
976}
977#[doc(hidden)]
978#[derive(Copy, Clone, Eq, PartialEq)]
979pub struct Mmpuacdmac_SPEC;
980impl crate::sealed::RegSpec for Mmpuacdmac_SPEC {
981 type DataType = u16;
982}
983
984#[doc = "MMPU Access Control Register for DMAC"]
985pub type Mmpuacdmac = crate::RegValueT<Mmpuacdmac_SPEC>;
986
987impl Mmpuacdmac {
988 #[doc = "Region enable"]
989 #[inline(always)]
990 pub fn enable(
991 self,
992 ) -> crate::common::RegisterField<
993 0,
994 0x1,
995 1,
996 0,
997 mmpuacdmac::Enable,
998 mmpuacdmac::Enable,
999 Mmpuacdmac_SPEC,
1000 crate::common::RW,
1001 > {
1002 crate::common::RegisterField::<
1003 0,
1004 0x1,
1005 1,
1006 0,
1007 mmpuacdmac::Enable,
1008 mmpuacdmac::Enable,
1009 Mmpuacdmac_SPEC,
1010 crate::common::RW,
1011 >::from_register(self, 0)
1012 }
1013
1014 #[doc = "Read protection"]
1015 #[inline(always)]
1016 pub fn rp(
1017 self,
1018 ) -> crate::common::RegisterField<
1019 1,
1020 0x1,
1021 1,
1022 0,
1023 mmpuacdmac::Rp,
1024 mmpuacdmac::Rp,
1025 Mmpuacdmac_SPEC,
1026 crate::common::RW,
1027 > {
1028 crate::common::RegisterField::<
1029 1,
1030 0x1,
1031 1,
1032 0,
1033 mmpuacdmac::Rp,
1034 mmpuacdmac::Rp,
1035 Mmpuacdmac_SPEC,
1036 crate::common::RW,
1037 >::from_register(self, 0)
1038 }
1039
1040 #[doc = "Write protection"]
1041 #[inline(always)]
1042 pub fn wp(
1043 self,
1044 ) -> crate::common::RegisterField<
1045 2,
1046 0x1,
1047 1,
1048 0,
1049 mmpuacdmac::Wp,
1050 mmpuacdmac::Wp,
1051 Mmpuacdmac_SPEC,
1052 crate::common::RW,
1053 > {
1054 crate::common::RegisterField::<
1055 2,
1056 0x1,
1057 1,
1058 0,
1059 mmpuacdmac::Wp,
1060 mmpuacdmac::Wp,
1061 Mmpuacdmac_SPEC,
1062 crate::common::RW,
1063 >::from_register(self, 0)
1064 }
1065}
1066impl ::core::default::Default for Mmpuacdmac {
1067 #[inline(always)]
1068 fn default() -> Mmpuacdmac {
1069 <crate::RegValueT<Mmpuacdmac_SPEC> as RegisterValue<_>>::new(0)
1070 }
1071}
1072pub mod mmpuacdmac {
1073
1074 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1075 pub struct Enable_SPEC;
1076 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
1077 impl Enable {
1078 #[doc = "DMAC Region n unit is disabled"]
1079 pub const _0: Self = Self::new(0);
1080
1081 #[doc = "DMAC Region n unit is enabled"]
1082 pub const _1: Self = Self::new(1);
1083 }
1084 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1085 pub struct Rp_SPEC;
1086 pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
1087 impl Rp {
1088 #[doc = "Read permission"]
1089 pub const _0: Self = Self::new(0);
1090
1091 #[doc = "Read protection"]
1092 pub const _1: Self = Self::new(1);
1093 }
1094 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1095 pub struct Wp_SPEC;
1096 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
1097 impl Wp {
1098 #[doc = "Write permission"]
1099 pub const _0: Self = Self::new(0);
1100
1101 #[doc = "Write protection"]
1102 pub const _1: Self = Self::new(1);
1103 }
1104}
1105#[doc(hidden)]
1106#[derive(Copy, Clone, Eq, PartialEq)]
1107pub struct Mmpusdmac_SPEC;
1108impl crate::sealed::RegSpec for Mmpusdmac_SPEC {
1109 type DataType = u32;
1110}
1111
1112#[doc = "MMPU Start Address Register for DMAC"]
1113pub type Mmpusdmac = crate::RegValueT<Mmpusdmac_SPEC>;
1114
1115impl Mmpusdmac {
1116 #[doc = "Region start address register"]
1117 #[inline(always)]
1118 pub fn mmpus(
1119 self,
1120 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpusdmac_SPEC, crate::common::RW>
1121 {
1122 crate::common::RegisterField::<
1123 5,
1124 0x7ffffff,
1125 1,
1126 0,
1127 u32,
1128 u32,
1129 Mmpusdmac_SPEC,
1130 crate::common::RW,
1131 >::from_register(self, 0)
1132 }
1133}
1134impl ::core::default::Default for Mmpusdmac {
1135 #[inline(always)]
1136 fn default() -> Mmpusdmac {
1137 <crate::RegValueT<Mmpusdmac_SPEC> as RegisterValue<_>>::new(0)
1138 }
1139}
1140
1141#[doc(hidden)]
1142#[derive(Copy, Clone, Eq, PartialEq)]
1143pub struct Mmpuedmac_SPEC;
1144impl crate::sealed::RegSpec for Mmpuedmac_SPEC {
1145 type DataType = u32;
1146}
1147
1148#[doc = "MMPU End Address Register for DMAC"]
1149pub type Mmpuedmac = crate::RegValueT<Mmpuedmac_SPEC>;
1150
1151impl Mmpuedmac {
1152 #[doc = "Region end address register"]
1153 #[inline(always)]
1154 pub fn mmpue(
1155 self,
1156 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpuedmac_SPEC, crate::common::RW>
1157 {
1158 crate::common::RegisterField::<
1159 5,
1160 0x7ffffff,
1161 1,
1162 0,
1163 u32,
1164 u32,
1165 Mmpuedmac_SPEC,
1166 crate::common::RW,
1167 >::from_register(self, 0)
1168 }
1169}
1170impl ::core::default::Default for Mmpuedmac {
1171 #[inline(always)]
1172 fn default() -> Mmpuedmac {
1173 <crate::RegValueT<Mmpuedmac_SPEC> as RegisterValue<_>>::new(31)
1174 }
1175}
1176
1177#[doc(hidden)]
1178#[derive(Copy, Clone, Eq, PartialEq)]
1179pub struct Mmpuenedmac_SPEC;
1180impl crate::sealed::RegSpec for Mmpuenedmac_SPEC {
1181 type DataType = u16;
1182}
1183
1184#[doc = "MMPU Enable Register for EDMAC"]
1185pub type Mmpuenedmac = crate::RegValueT<Mmpuenedmac_SPEC>;
1186
1187impl Mmpuenedmac {
1188 #[doc = "Bus Master MPU of EDMAC enable"]
1189 #[inline(always)]
1190 pub fn enable(
1191 self,
1192 ) -> crate::common::RegisterField<
1193 0,
1194 0x1,
1195 1,
1196 0,
1197 mmpuenedmac::Enable,
1198 mmpuenedmac::Enable,
1199 Mmpuenedmac_SPEC,
1200 crate::common::RW,
1201 > {
1202 crate::common::RegisterField::<
1203 0,
1204 0x1,
1205 1,
1206 0,
1207 mmpuenedmac::Enable,
1208 mmpuenedmac::Enable,
1209 Mmpuenedmac_SPEC,
1210 crate::common::RW,
1211 >::from_register(self, 0)
1212 }
1213
1214 #[doc = "These bits enable or disable writes to the ENABLE bit."]
1215 #[inline(always)]
1216 pub fn key(
1217 self,
1218 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuenedmac_SPEC, crate::common::W>
1219 {
1220 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuenedmac_SPEC,crate::common::W>::from_register(self,0)
1221 }
1222}
1223impl ::core::default::Default for Mmpuenedmac {
1224 #[inline(always)]
1225 fn default() -> Mmpuenedmac {
1226 <crate::RegValueT<Mmpuenedmac_SPEC> as RegisterValue<_>>::new(0)
1227 }
1228}
1229pub mod mmpuenedmac {
1230
1231 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1232 pub struct Enable_SPEC;
1233 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
1234 impl Enable {
1235 #[doc = "Bus Master MPU of EDMAC is disabled."]
1236 pub const _0: Self = Self::new(0);
1237
1238 #[doc = "Bus Master MPU of EDMAC is enabled."]
1239 pub const _1: Self = Self::new(1);
1240 }
1241}
1242#[doc(hidden)]
1243#[derive(Copy, Clone, Eq, PartialEq)]
1244pub struct Mmpuenptedmac_SPEC;
1245impl crate::sealed::RegSpec for Mmpuenptedmac_SPEC {
1246 type DataType = u16;
1247}
1248
1249#[doc = "MMPU Enable Protect Register for EDMAC"]
1250pub type Mmpuenptedmac = crate::RegValueT<Mmpuenptedmac_SPEC>;
1251
1252impl Mmpuenptedmac {
1253 #[doc = "Protection of register"]
1254 #[inline(always)]
1255 pub fn protect(
1256 self,
1257 ) -> crate::common::RegisterField<
1258 0,
1259 0x1,
1260 1,
1261 0,
1262 mmpuenptedmac::Protect,
1263 mmpuenptedmac::Protect,
1264 Mmpuenptedmac_SPEC,
1265 crate::common::RW,
1266 > {
1267 crate::common::RegisterField::<
1268 0,
1269 0x1,
1270 1,
1271 0,
1272 mmpuenptedmac::Protect,
1273 mmpuenptedmac::Protect,
1274 Mmpuenptedmac_SPEC,
1275 crate::common::RW,
1276 >::from_register(self, 0)
1277 }
1278
1279 #[doc = "These bits enable or disable writes to the PROTECT bit."]
1280 #[inline(always)]
1281 pub fn key(
1282 self,
1283 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuenptedmac_SPEC, crate::common::W>
1284 {
1285 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuenptedmac_SPEC,crate::common::W>::from_register(self,0)
1286 }
1287}
1288impl ::core::default::Default for Mmpuenptedmac {
1289 #[inline(always)]
1290 fn default() -> Mmpuenptedmac {
1291 <crate::RegValueT<Mmpuenptedmac_SPEC> as RegisterValue<_>>::new(0)
1292 }
1293}
1294pub mod mmpuenptedmac {
1295
1296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1297 pub struct Protect_SPEC;
1298 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
1299 impl Protect {
1300 #[doc = "MMPUENEDMAC register writes are possible."]
1301 pub const _0: Self = Self::new(0);
1302
1303 #[doc = "MMPUENEDMAC register writes are protected. Read is possible."]
1304 pub const _1: Self = Self::new(1);
1305 }
1306}
1307#[doc(hidden)]
1308#[derive(Copy, Clone, Eq, PartialEq)]
1309pub struct Mmpurptedmac_SPEC;
1310impl crate::sealed::RegSpec for Mmpurptedmac_SPEC {
1311 type DataType = u16;
1312}
1313
1314#[doc = "MMPU Regions Protect Register for EDMAC"]
1315pub type Mmpurptedmac = crate::RegValueT<Mmpurptedmac_SPEC>;
1316
1317impl Mmpurptedmac {
1318 #[doc = "Protection of register"]
1319 #[inline(always)]
1320 pub fn protect(
1321 self,
1322 ) -> crate::common::RegisterField<
1323 0,
1324 0x1,
1325 1,
1326 0,
1327 mmpurptedmac::Protect,
1328 mmpurptedmac::Protect,
1329 Mmpurptedmac_SPEC,
1330 crate::common::RW,
1331 > {
1332 crate::common::RegisterField::<
1333 0,
1334 0x1,
1335 1,
1336 0,
1337 mmpurptedmac::Protect,
1338 mmpurptedmac::Protect,
1339 Mmpurptedmac_SPEC,
1340 crate::common::RW,
1341 >::from_register(self, 0)
1342 }
1343
1344 #[doc = "This bit is used to enable or disable writing of the PROTECT bit."]
1345 #[inline(always)]
1346 pub fn key(
1347 self,
1348 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpurptedmac_SPEC, crate::common::W>
1349 {
1350 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpurptedmac_SPEC,crate::common::W>::from_register(self,0)
1351 }
1352}
1353impl ::core::default::Default for Mmpurptedmac {
1354 #[inline(always)]
1355 fn default() -> Mmpurptedmac {
1356 <crate::RegValueT<Mmpurptedmac_SPEC> as RegisterValue<_>>::new(0)
1357 }
1358}
1359pub mod mmpurptedmac {
1360
1361 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1362 pub struct Protect_SPEC;
1363 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
1364 impl Protect {
1365 #[doc = "Bus Master MPU register for EDMAC writing is possible."]
1366 pub const _0: Self = Self::new(0);
1367
1368 #[doc = "Bus Master MPU register for EDMAC writing is protected. Read is possible."]
1369 pub const _1: Self = Self::new(1);
1370 }
1371}
1372#[doc(hidden)]
1373#[derive(Copy, Clone, Eq, PartialEq)]
1374pub struct Mmpuacedmac_SPEC;
1375impl crate::sealed::RegSpec for Mmpuacedmac_SPEC {
1376 type DataType = u16;
1377}
1378
1379#[doc = "MMPU Access Control Register for EDMAC"]
1380pub type Mmpuacedmac = crate::RegValueT<Mmpuacedmac_SPEC>;
1381
1382impl Mmpuacedmac {
1383 #[doc = "Region enable"]
1384 #[inline(always)]
1385 pub fn enable(
1386 self,
1387 ) -> crate::common::RegisterField<
1388 0,
1389 0x1,
1390 1,
1391 0,
1392 mmpuacedmac::Enable,
1393 mmpuacedmac::Enable,
1394 Mmpuacedmac_SPEC,
1395 crate::common::RW,
1396 > {
1397 crate::common::RegisterField::<
1398 0,
1399 0x1,
1400 1,
1401 0,
1402 mmpuacedmac::Enable,
1403 mmpuacedmac::Enable,
1404 Mmpuacedmac_SPEC,
1405 crate::common::RW,
1406 >::from_register(self, 0)
1407 }
1408
1409 #[doc = "Read protection"]
1410 #[inline(always)]
1411 pub fn rp(
1412 self,
1413 ) -> crate::common::RegisterField<
1414 1,
1415 0x1,
1416 1,
1417 0,
1418 mmpuacedmac::Rp,
1419 mmpuacedmac::Rp,
1420 Mmpuacedmac_SPEC,
1421 crate::common::RW,
1422 > {
1423 crate::common::RegisterField::<
1424 1,
1425 0x1,
1426 1,
1427 0,
1428 mmpuacedmac::Rp,
1429 mmpuacedmac::Rp,
1430 Mmpuacedmac_SPEC,
1431 crate::common::RW,
1432 >::from_register(self, 0)
1433 }
1434
1435 #[doc = "Write protection"]
1436 #[inline(always)]
1437 pub fn wp(
1438 self,
1439 ) -> crate::common::RegisterField<
1440 2,
1441 0x1,
1442 1,
1443 0,
1444 mmpuacedmac::Wp,
1445 mmpuacedmac::Wp,
1446 Mmpuacedmac_SPEC,
1447 crate::common::RW,
1448 > {
1449 crate::common::RegisterField::<
1450 2,
1451 0x1,
1452 1,
1453 0,
1454 mmpuacedmac::Wp,
1455 mmpuacedmac::Wp,
1456 Mmpuacedmac_SPEC,
1457 crate::common::RW,
1458 >::from_register(self, 0)
1459 }
1460}
1461impl ::core::default::Default for Mmpuacedmac {
1462 #[inline(always)]
1463 fn default() -> Mmpuacedmac {
1464 <crate::RegValueT<Mmpuacedmac_SPEC> as RegisterValue<_>>::new(0)
1465 }
1466}
1467pub mod mmpuacedmac {
1468
1469 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1470 pub struct Enable_SPEC;
1471 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
1472 impl Enable {
1473 #[doc = "EDMAC Region n unit is disabled"]
1474 pub const _0: Self = Self::new(0);
1475
1476 #[doc = "EDMAC Region n unit is enabled"]
1477 pub const _1: Self = Self::new(1);
1478 }
1479 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1480 pub struct Rp_SPEC;
1481 pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
1482 impl Rp {
1483 #[doc = "Read permission"]
1484 pub const _0: Self = Self::new(0);
1485
1486 #[doc = "Read protection"]
1487 pub const _1: Self = Self::new(1);
1488 }
1489 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1490 pub struct Wp_SPEC;
1491 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
1492 impl Wp {
1493 #[doc = "Write permission"]
1494 pub const _0: Self = Self::new(0);
1495
1496 #[doc = "Write protection"]
1497 pub const _1: Self = Self::new(1);
1498 }
1499}
1500#[doc(hidden)]
1501#[derive(Copy, Clone, Eq, PartialEq)]
1502pub struct Mmpusedmac_SPEC;
1503impl crate::sealed::RegSpec for Mmpusedmac_SPEC {
1504 type DataType = u32;
1505}
1506
1507#[doc = "MMPU Start Address Register for EDMAC"]
1508pub type Mmpusedmac = crate::RegValueT<Mmpusedmac_SPEC>;
1509
1510impl Mmpusedmac {
1511 #[doc = "Region start address register for EDMAC"]
1512 #[inline(always)]
1513 pub fn mmpus(
1514 self,
1515 ) -> crate::common::RegisterField<
1516 5,
1517 0x7ffffff,
1518 1,
1519 0,
1520 u32,
1521 u32,
1522 Mmpusedmac_SPEC,
1523 crate::common::RW,
1524 > {
1525 crate::common::RegisterField::<
1526 5,
1527 0x7ffffff,
1528 1,
1529 0,
1530 u32,
1531 u32,
1532 Mmpusedmac_SPEC,
1533 crate::common::RW,
1534 >::from_register(self, 0)
1535 }
1536}
1537impl ::core::default::Default for Mmpusedmac {
1538 #[inline(always)]
1539 fn default() -> Mmpusedmac {
1540 <crate::RegValueT<Mmpusedmac_SPEC> as RegisterValue<_>>::new(0)
1541 }
1542}
1543
1544#[doc(hidden)]
1545#[derive(Copy, Clone, Eq, PartialEq)]
1546pub struct Mmpueedmac_SPEC;
1547impl crate::sealed::RegSpec for Mmpueedmac_SPEC {
1548 type DataType = u32;
1549}
1550
1551#[doc = "MMPU End Address Register for EDMAC"]
1552pub type Mmpueedmac = crate::RegValueT<Mmpueedmac_SPEC>;
1553
1554impl Mmpueedmac {
1555 #[doc = "Region end address register for EDMAC"]
1556 #[inline(always)]
1557 pub fn mmpue(
1558 self,
1559 ) -> crate::common::RegisterField<
1560 5,
1561 0x7ffffff,
1562 1,
1563 0,
1564 u32,
1565 u32,
1566 Mmpueedmac_SPEC,
1567 crate::common::RW,
1568 > {
1569 crate::common::RegisterField::<
1570 5,
1571 0x7ffffff,
1572 1,
1573 0,
1574 u32,
1575 u32,
1576 Mmpueedmac_SPEC,
1577 crate::common::RW,
1578 >::from_register(self, 0)
1579 }
1580}
1581impl ::core::default::Default for Mmpueedmac {
1582 #[inline(always)]
1583 fn default() -> Mmpueedmac {
1584 <crate::RegValueT<Mmpueedmac_SPEC> as RegisterValue<_>>::new(31)
1585 }
1586}