ra4w1/gpt_ops/
opscr.rs

1#[doc = "Register `OPSCR` reader"]
2pub struct R(crate::R<OPSCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<OPSCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<OPSCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<OPSCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `OPSCR` writer"]
17pub struct W(crate::W<OPSCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<OPSCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<OPSCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<OPSCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `UF` reader - Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
38pub type UF_R = crate::BitReader<bool>;
39#[doc = "Field `UF` writer - Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
40pub type UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, bool, O>;
41#[doc = "Field `VF` reader - Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
42pub type VF_R = crate::BitReader<bool>;
43#[doc = "Field `VF` writer - Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
44pub type VF_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, bool, O>;
45#[doc = "Field `WF` reader - Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
46pub type WF_R = crate::BitReader<bool>;
47#[doc = "Field `WF` writer - Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
48pub type WF_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, bool, O>;
49#[doc = "Field `U` reader - Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
50pub type U_R = crate::BitReader<bool>;
51#[doc = "Field `V` reader - Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
52pub type V_R = crate::BitReader<bool>;
53#[doc = "Field `W` reader - Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
54pub type W_R = crate::BitReader<bool>;
55#[doc = "Field `EN` reader - Enable-Phase Output Control"]
56pub type EN_R = crate::BitReader<EN_A>;
57#[doc = "Enable-Phase Output Control\n\nValue on reset: 0"]
58#[derive(Clone, Copy, Debug, PartialEq, Eq)]
59pub enum EN_A {
60    #[doc = "0: Not Output(Hi-Z external terminals)."]
61    _0 = 0,
62    #[doc = "1: Output"]
63    _1 = 1,
64}
65impl From<EN_A> for bool {
66    #[inline(always)]
67    fn from(variant: EN_A) -> Self {
68        variant as u8 != 0
69    }
70}
71impl EN_R {
72    #[doc = "Get enumerated values variant"]
73    #[inline(always)]
74    pub fn variant(&self) -> EN_A {
75        match self.bits {
76            false => EN_A::_0,
77            true => EN_A::_1,
78        }
79    }
80    #[doc = "Checks if the value of the field is `_0`"]
81    #[inline(always)]
82    pub fn is_0(&self) -> bool {
83        *self == EN_A::_0
84    }
85    #[doc = "Checks if the value of the field is `_1`"]
86    #[inline(always)]
87    pub fn is_1(&self) -> bool {
88        *self == EN_A::_1
89    }
90}
91#[doc = "Field `EN` writer - Enable-Phase Output Control"]
92pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, EN_A, O>;
93impl<'a, const O: u8> EN_W<'a, O> {
94    #[doc = "Not Output(Hi-Z external terminals)."]
95    #[inline(always)]
96    pub fn _0(self) -> &'a mut W {
97        self.variant(EN_A::_0)
98    }
99    #[doc = "Output"]
100    #[inline(always)]
101    pub fn _1(self) -> &'a mut W {
102        self.variant(EN_A::_1)
103    }
104}
105#[doc = "Field `FB` reader - External Feedback Signal EnableThis bit selects the input phase from the software settings and external input."]
106pub type FB_R = crate::BitReader<FB_A>;
107#[doc = "External Feedback Signal EnableThis bit selects the input phase from the software settings and external input.\n\nValue on reset: 0"]
108#[derive(Clone, Copy, Debug, PartialEq, Eq)]
109pub enum FB_A {
110    #[doc = "0: Select the external input."]
111    _0 = 0,
112    #[doc = "1: Select the soft setting(OPSCR.UF, VF, WF)."]
113    _1 = 1,
114}
115impl From<FB_A> for bool {
116    #[inline(always)]
117    fn from(variant: FB_A) -> Self {
118        variant as u8 != 0
119    }
120}
121impl FB_R {
122    #[doc = "Get enumerated values variant"]
123    #[inline(always)]
124    pub fn variant(&self) -> FB_A {
125        match self.bits {
126            false => FB_A::_0,
127            true => FB_A::_1,
128        }
129    }
130    #[doc = "Checks if the value of the field is `_0`"]
131    #[inline(always)]
132    pub fn is_0(&self) -> bool {
133        *self == FB_A::_0
134    }
135    #[doc = "Checks if the value of the field is `_1`"]
136    #[inline(always)]
137    pub fn is_1(&self) -> bool {
138        *self == FB_A::_1
139    }
140}
141#[doc = "Field `FB` writer - External Feedback Signal EnableThis bit selects the input phase from the software settings and external input."]
142pub type FB_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, FB_A, O>;
143impl<'a, const O: u8> FB_W<'a, O> {
144    #[doc = "Select the external input."]
145    #[inline(always)]
146    pub fn _0(self) -> &'a mut W {
147        self.variant(FB_A::_0)
148    }
149    #[doc = "Select the soft setting(OPSCR.UF, VF, WF)."]
150    #[inline(always)]
151    pub fn _1(self) -> &'a mut W {
152        self.variant(FB_A::_1)
153    }
154}
155#[doc = "Field `P` reader - Positive-Phase Output (P) Control"]
156pub type P_R = crate::BitReader<P_A>;
157#[doc = "Positive-Phase Output (P) Control\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum P_A {
160    #[doc = "0: Level signal output"]
161    _0 = 0,
162    #[doc = "1: PWM signal output (PWM of GPT0)"]
163    _1 = 1,
164}
165impl From<P_A> for bool {
166    #[inline(always)]
167    fn from(variant: P_A) -> Self {
168        variant as u8 != 0
169    }
170}
171impl P_R {
172    #[doc = "Get enumerated values variant"]
173    #[inline(always)]
174    pub fn variant(&self) -> P_A {
175        match self.bits {
176            false => P_A::_0,
177            true => P_A::_1,
178        }
179    }
180    #[doc = "Checks if the value of the field is `_0`"]
181    #[inline(always)]
182    pub fn is_0(&self) -> bool {
183        *self == P_A::_0
184    }
185    #[doc = "Checks if the value of the field is `_1`"]
186    #[inline(always)]
187    pub fn is_1(&self) -> bool {
188        *self == P_A::_1
189    }
190}
191#[doc = "Field `P` writer - Positive-Phase Output (P) Control"]
192pub type P_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, P_A, O>;
193impl<'a, const O: u8> P_W<'a, O> {
194    #[doc = "Level signal output"]
195    #[inline(always)]
196    pub fn _0(self) -> &'a mut W {
197        self.variant(P_A::_0)
198    }
199    #[doc = "PWM signal output (PWM of GPT0)"]
200    #[inline(always)]
201    pub fn _1(self) -> &'a mut W {
202        self.variant(P_A::_1)
203    }
204}
205#[doc = "Field `N` reader - Negative-Phase Output (N) Control"]
206pub type N_R = crate::BitReader<N_A>;
207#[doc = "Negative-Phase Output (N) Control\n\nValue on reset: 0"]
208#[derive(Clone, Copy, Debug, PartialEq, Eq)]
209pub enum N_A {
210    #[doc = "0: Level signal output"]
211    _0 = 0,
212    #[doc = "1: PWM signal output (PWM of GPT0)"]
213    _1 = 1,
214}
215impl From<N_A> for bool {
216    #[inline(always)]
217    fn from(variant: N_A) -> Self {
218        variant as u8 != 0
219    }
220}
221impl N_R {
222    #[doc = "Get enumerated values variant"]
223    #[inline(always)]
224    pub fn variant(&self) -> N_A {
225        match self.bits {
226            false => N_A::_0,
227            true => N_A::_1,
228        }
229    }
230    #[doc = "Checks if the value of the field is `_0`"]
231    #[inline(always)]
232    pub fn is_0(&self) -> bool {
233        *self == N_A::_0
234    }
235    #[doc = "Checks if the value of the field is `_1`"]
236    #[inline(always)]
237    pub fn is_1(&self) -> bool {
238        *self == N_A::_1
239    }
240}
241#[doc = "Field `N` writer - Negative-Phase Output (N) Control"]
242pub type N_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, N_A, O>;
243impl<'a, const O: u8> N_W<'a, O> {
244    #[doc = "Level signal output"]
245    #[inline(always)]
246    pub fn _0(self) -> &'a mut W {
247        self.variant(N_A::_0)
248    }
249    #[doc = "PWM signal output (PWM of GPT0)"]
250    #[inline(always)]
251    pub fn _1(self) -> &'a mut W {
252        self.variant(N_A::_1)
253    }
254}
255#[doc = "Field `INV` reader - Invert-Phase Output Control"]
256pub type INV_R = crate::BitReader<INV_A>;
257#[doc = "Invert-Phase Output Control\n\nValue on reset: 0"]
258#[derive(Clone, Copy, Debug, PartialEq, Eq)]
259pub enum INV_A {
260    #[doc = "0: Positive Logic (Active High)output"]
261    _0 = 0,
262    #[doc = "1: Negative Logic (Active Low)output"]
263    _1 = 1,
264}
265impl From<INV_A> for bool {
266    #[inline(always)]
267    fn from(variant: INV_A) -> Self {
268        variant as u8 != 0
269    }
270}
271impl INV_R {
272    #[doc = "Get enumerated values variant"]
273    #[inline(always)]
274    pub fn variant(&self) -> INV_A {
275        match self.bits {
276            false => INV_A::_0,
277            true => INV_A::_1,
278        }
279    }
280    #[doc = "Checks if the value of the field is `_0`"]
281    #[inline(always)]
282    pub fn is_0(&self) -> bool {
283        *self == INV_A::_0
284    }
285    #[doc = "Checks if the value of the field is `_1`"]
286    #[inline(always)]
287    pub fn is_1(&self) -> bool {
288        *self == INV_A::_1
289    }
290}
291#[doc = "Field `INV` writer - Invert-Phase Output Control"]
292pub type INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, INV_A, O>;
293impl<'a, const O: u8> INV_W<'a, O> {
294    #[doc = "Positive Logic (Active High)output"]
295    #[inline(always)]
296    pub fn _0(self) -> &'a mut W {
297        self.variant(INV_A::_0)
298    }
299    #[doc = "Negative Logic (Active Low)output"]
300    #[inline(always)]
301    pub fn _1(self) -> &'a mut W {
302        self.variant(INV_A::_1)
303    }
304}
305#[doc = "Field `RV` reader - Output phase rotation direction reversal"]
306pub type RV_R = crate::BitReader<RV_A>;
307#[doc = "Output phase rotation direction reversal\n\nValue on reset: 0"]
308#[derive(Clone, Copy, Debug, PartialEq, Eq)]
309pub enum RV_A {
310    #[doc = "0: U/V/W-Phase output"]
311    _0 = 0,
312    #[doc = "1: Output to reverse the V / W-phase"]
313    _1 = 1,
314}
315impl From<RV_A> for bool {
316    #[inline(always)]
317    fn from(variant: RV_A) -> Self {
318        variant as u8 != 0
319    }
320}
321impl RV_R {
322    #[doc = "Get enumerated values variant"]
323    #[inline(always)]
324    pub fn variant(&self) -> RV_A {
325        match self.bits {
326            false => RV_A::_0,
327            true => RV_A::_1,
328        }
329    }
330    #[doc = "Checks if the value of the field is `_0`"]
331    #[inline(always)]
332    pub fn is_0(&self) -> bool {
333        *self == RV_A::_0
334    }
335    #[doc = "Checks if the value of the field is `_1`"]
336    #[inline(always)]
337    pub fn is_1(&self) -> bool {
338        *self == RV_A::_1
339    }
340}
341#[doc = "Field `RV` writer - Output phase rotation direction reversal"]
342pub type RV_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, RV_A, O>;
343impl<'a, const O: u8> RV_W<'a, O> {
344    #[doc = "U/V/W-Phase output"]
345    #[inline(always)]
346    pub fn _0(self) -> &'a mut W {
347        self.variant(RV_A::_0)
348    }
349    #[doc = "Output to reverse the V / W-phase"]
350    #[inline(always)]
351    pub fn _1(self) -> &'a mut W {
352        self.variant(RV_A::_1)
353    }
354}
355#[doc = "Field `ALIGN` reader - Input phase alignment"]
356pub type ALIGN_R = crate::BitReader<ALIGN_A>;
357#[doc = "Input phase alignment\n\nValue on reset: 0"]
358#[derive(Clone, Copy, Debug, PartialEq, Eq)]
359pub enum ALIGN_A {
360    #[doc = "0: Input phase is aligned to PCLK."]
361    _0 = 0,
362    #[doc = "1: Input phase is aligned PWM."]
363    _1 = 1,
364}
365impl From<ALIGN_A> for bool {
366    #[inline(always)]
367    fn from(variant: ALIGN_A) -> Self {
368        variant as u8 != 0
369    }
370}
371impl ALIGN_R {
372    #[doc = "Get enumerated values variant"]
373    #[inline(always)]
374    pub fn variant(&self) -> ALIGN_A {
375        match self.bits {
376            false => ALIGN_A::_0,
377            true => ALIGN_A::_1,
378        }
379    }
380    #[doc = "Checks if the value of the field is `_0`"]
381    #[inline(always)]
382    pub fn is_0(&self) -> bool {
383        *self == ALIGN_A::_0
384    }
385    #[doc = "Checks if the value of the field is `_1`"]
386    #[inline(always)]
387    pub fn is_1(&self) -> bool {
388        *self == ALIGN_A::_1
389    }
390}
391#[doc = "Field `ALIGN` writer - Input phase alignment"]
392pub type ALIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, ALIGN_A, O>;
393impl<'a, const O: u8> ALIGN_W<'a, O> {
394    #[doc = "Input phase is aligned to PCLK."]
395    #[inline(always)]
396    pub fn _0(self) -> &'a mut W {
397        self.variant(ALIGN_A::_0)
398    }
399    #[doc = "Input phase is aligned PWM."]
400    #[inline(always)]
401    pub fn _1(self) -> &'a mut W {
402        self.variant(ALIGN_A::_1)
403    }
404}
405#[doc = "Field `GRP` reader - Output disabled source selection"]
406pub type GRP_R = crate::FieldReader<u8, GRP_A>;
407#[doc = "Output disabled source selection\n\nValue on reset: 0"]
408#[derive(Clone, Copy, Debug, PartialEq, Eq)]
409#[repr(u8)]
410pub enum GRP_A {
411    #[doc = "0: Select Group A output disable source"]
412    _00 = 0,
413    #[doc = "1: Select Group B output disable source"]
414    _01 = 1,
415}
416impl From<GRP_A> for u8 {
417    #[inline(always)]
418    fn from(variant: GRP_A) -> Self {
419        variant as _
420    }
421}
422impl GRP_R {
423    #[doc = "Get enumerated values variant"]
424    #[inline(always)]
425    pub fn variant(&self) -> Option<GRP_A> {
426        match self.bits {
427            0 => Some(GRP_A::_00),
428            1 => Some(GRP_A::_01),
429            _ => None,
430        }
431    }
432    #[doc = "Checks if the value of the field is `_00`"]
433    #[inline(always)]
434    pub fn is_00(&self) -> bool {
435        *self == GRP_A::_00
436    }
437    #[doc = "Checks if the value of the field is `_01`"]
438    #[inline(always)]
439    pub fn is_01(&self) -> bool {
440        *self == GRP_A::_01
441    }
442}
443#[doc = "Field `GRP` writer - Output disabled source selection"]
444pub type GRP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OPSCR_SPEC, u8, GRP_A, 2, O>;
445impl<'a, const O: u8> GRP_W<'a, O> {
446    #[doc = "Select Group A output disable source"]
447    #[inline(always)]
448    pub fn _00(self) -> &'a mut W {
449        self.variant(GRP_A::_00)
450    }
451    #[doc = "Select Group B output disable source"]
452    #[inline(always)]
453    pub fn _01(self) -> &'a mut W {
454        self.variant(GRP_A::_01)
455    }
456}
457#[doc = "Field `GODF` reader - Group output disable function"]
458pub type GODF_R = crate::BitReader<GODF_A>;
459#[doc = "Group output disable function\n\nValue on reset: 0"]
460#[derive(Clone, Copy, Debug, PartialEq, Eq)]
461pub enum GODF_A {
462    #[doc = "0: This bit function is ignored."]
463    _0 = 0,
464    #[doc = "1: Group disable will clear OPSCR.EN Bit."]
465    _1 = 1,
466}
467impl From<GODF_A> for bool {
468    #[inline(always)]
469    fn from(variant: GODF_A) -> Self {
470        variant as u8 != 0
471    }
472}
473impl GODF_R {
474    #[doc = "Get enumerated values variant"]
475    #[inline(always)]
476    pub fn variant(&self) -> GODF_A {
477        match self.bits {
478            false => GODF_A::_0,
479            true => GODF_A::_1,
480        }
481    }
482    #[doc = "Checks if the value of the field is `_0`"]
483    #[inline(always)]
484    pub fn is_0(&self) -> bool {
485        *self == GODF_A::_0
486    }
487    #[doc = "Checks if the value of the field is `_1`"]
488    #[inline(always)]
489    pub fn is_1(&self) -> bool {
490        *self == GODF_A::_1
491    }
492}
493#[doc = "Field `GODF` writer - Group output disable function"]
494pub type GODF_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, GODF_A, O>;
495impl<'a, const O: u8> GODF_W<'a, O> {
496    #[doc = "This bit function is ignored."]
497    #[inline(always)]
498    pub fn _0(self) -> &'a mut W {
499        self.variant(GODF_A::_0)
500    }
501    #[doc = "Group disable will clear OPSCR.EN Bit."]
502    #[inline(always)]
503    pub fn _1(self) -> &'a mut W {
504        self.variant(GODF_A::_1)
505    }
506}
507#[doc = "Field `NFEN` reader - External Input Noise Filter Enable"]
508pub type NFEN_R = crate::BitReader<NFEN_A>;
509#[doc = "External Input Noise Filter Enable\n\nValue on reset: 0"]
510#[derive(Clone, Copy, Debug, PartialEq, Eq)]
511pub enum NFEN_A {
512    #[doc = "0: Do not use a noise filter to the external input."]
513    _0 = 0,
514    #[doc = "1: Use a noise filter to the external input."]
515    _1 = 1,
516}
517impl From<NFEN_A> for bool {
518    #[inline(always)]
519    fn from(variant: NFEN_A) -> Self {
520        variant as u8 != 0
521    }
522}
523impl NFEN_R {
524    #[doc = "Get enumerated values variant"]
525    #[inline(always)]
526    pub fn variant(&self) -> NFEN_A {
527        match self.bits {
528            false => NFEN_A::_0,
529            true => NFEN_A::_1,
530        }
531    }
532    #[doc = "Checks if the value of the field is `_0`"]
533    #[inline(always)]
534    pub fn is_0(&self) -> bool {
535        *self == NFEN_A::_0
536    }
537    #[doc = "Checks if the value of the field is `_1`"]
538    #[inline(always)]
539    pub fn is_1(&self) -> bool {
540        *self == NFEN_A::_1
541    }
542}
543#[doc = "Field `NFEN` writer - External Input Noise Filter Enable"]
544pub type NFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, OPSCR_SPEC, NFEN_A, O>;
545impl<'a, const O: u8> NFEN_W<'a, O> {
546    #[doc = "Do not use a noise filter to the external input."]
547    #[inline(always)]
548    pub fn _0(self) -> &'a mut W {
549        self.variant(NFEN_A::_0)
550    }
551    #[doc = "Use a noise filter to the external input."]
552    #[inline(always)]
553    pub fn _1(self) -> &'a mut W {
554        self.variant(NFEN_A::_1)
555    }
556}
557#[doc = "Field `NFCS` reader - External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input."]
558pub type NFCS_R = crate::FieldReader<u8, NFCS_A>;
559#[doc = "External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input.\n\nValue on reset: 0"]
560#[derive(Clone, Copy, Debug, PartialEq, Eq)]
561#[repr(u8)]
562pub enum NFCS_A {
563    #[doc = "0: PCLK/1"]
564    _00 = 0,
565    #[doc = "1: PCLK/4"]
566    _01 = 1,
567    #[doc = "2: PCLK/16"]
568    _10 = 2,
569    #[doc = "3: PCLK/64"]
570    _11 = 3,
571}
572impl From<NFCS_A> for u8 {
573    #[inline(always)]
574    fn from(variant: NFCS_A) -> Self {
575        variant as _
576    }
577}
578impl NFCS_R {
579    #[doc = "Get enumerated values variant"]
580    #[inline(always)]
581    pub fn variant(&self) -> NFCS_A {
582        match self.bits {
583            0 => NFCS_A::_00,
584            1 => NFCS_A::_01,
585            2 => NFCS_A::_10,
586            3 => NFCS_A::_11,
587            _ => unreachable!(),
588        }
589    }
590    #[doc = "Checks if the value of the field is `_00`"]
591    #[inline(always)]
592    pub fn is_00(&self) -> bool {
593        *self == NFCS_A::_00
594    }
595    #[doc = "Checks if the value of the field is `_01`"]
596    #[inline(always)]
597    pub fn is_01(&self) -> bool {
598        *self == NFCS_A::_01
599    }
600    #[doc = "Checks if the value of the field is `_10`"]
601    #[inline(always)]
602    pub fn is_10(&self) -> bool {
603        *self == NFCS_A::_10
604    }
605    #[doc = "Checks if the value of the field is `_11`"]
606    #[inline(always)]
607    pub fn is_11(&self) -> bool {
608        *self == NFCS_A::_11
609    }
610}
611#[doc = "Field `NFCS` writer - External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input."]
612pub type NFCS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, OPSCR_SPEC, u8, NFCS_A, 2, O>;
613impl<'a, const O: u8> NFCS_W<'a, O> {
614    #[doc = "PCLK/1"]
615    #[inline(always)]
616    pub fn _00(self) -> &'a mut W {
617        self.variant(NFCS_A::_00)
618    }
619    #[doc = "PCLK/4"]
620    #[inline(always)]
621    pub fn _01(self) -> &'a mut W {
622        self.variant(NFCS_A::_01)
623    }
624    #[doc = "PCLK/16"]
625    #[inline(always)]
626    pub fn _10(self) -> &'a mut W {
627        self.variant(NFCS_A::_10)
628    }
629    #[doc = "PCLK/64"]
630    #[inline(always)]
631    pub fn _11(self) -> &'a mut W {
632        self.variant(NFCS_A::_11)
633    }
634}
635impl R {
636    #[doc = "Bit 0 - Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
637    #[inline(always)]
638    pub fn uf(&self) -> UF_R {
639        UF_R::new((self.bits & 1) != 0)
640    }
641    #[doc = "Bit 1 - Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
642    #[inline(always)]
643    pub fn vf(&self) -> VF_R {
644        VF_R::new(((self.bits >> 1) & 1) != 0)
645    }
646    #[doc = "Bit 2 - Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
647    #[inline(always)]
648    pub fn wf(&self) -> WF_R {
649        WF_R::new(((self.bits >> 2) & 1) != 0)
650    }
651    #[doc = "Bit 4 - Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
652    #[inline(always)]
653    pub fn u(&self) -> U_R {
654        U_R::new(((self.bits >> 4) & 1) != 0)
655    }
656    #[doc = "Bit 5 - Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
657    #[inline(always)]
658    pub fn v(&self) -> V_R {
659        V_R::new(((self.bits >> 5) & 1) != 0)
660    }
661    #[doc = "Bit 6 - Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)"]
662    #[inline(always)]
663    pub fn w(&self) -> W_R {
664        W_R::new(((self.bits >> 6) & 1) != 0)
665    }
666    #[doc = "Bit 8 - Enable-Phase Output Control"]
667    #[inline(always)]
668    pub fn en(&self) -> EN_R {
669        EN_R::new(((self.bits >> 8) & 1) != 0)
670    }
671    #[doc = "Bit 16 - External Feedback Signal EnableThis bit selects the input phase from the software settings and external input."]
672    #[inline(always)]
673    pub fn fb(&self) -> FB_R {
674        FB_R::new(((self.bits >> 16) & 1) != 0)
675    }
676    #[doc = "Bit 17 - Positive-Phase Output (P) Control"]
677    #[inline(always)]
678    pub fn p(&self) -> P_R {
679        P_R::new(((self.bits >> 17) & 1) != 0)
680    }
681    #[doc = "Bit 18 - Negative-Phase Output (N) Control"]
682    #[inline(always)]
683    pub fn n(&self) -> N_R {
684        N_R::new(((self.bits >> 18) & 1) != 0)
685    }
686    #[doc = "Bit 19 - Invert-Phase Output Control"]
687    #[inline(always)]
688    pub fn inv(&self) -> INV_R {
689        INV_R::new(((self.bits >> 19) & 1) != 0)
690    }
691    #[doc = "Bit 20 - Output phase rotation direction reversal"]
692    #[inline(always)]
693    pub fn rv(&self) -> RV_R {
694        RV_R::new(((self.bits >> 20) & 1) != 0)
695    }
696    #[doc = "Bit 21 - Input phase alignment"]
697    #[inline(always)]
698    pub fn align(&self) -> ALIGN_R {
699        ALIGN_R::new(((self.bits >> 21) & 1) != 0)
700    }
701    #[doc = "Bits 24:25 - Output disabled source selection"]
702    #[inline(always)]
703    pub fn grp(&self) -> GRP_R {
704        GRP_R::new(((self.bits >> 24) & 3) as u8)
705    }
706    #[doc = "Bit 26 - Group output disable function"]
707    #[inline(always)]
708    pub fn godf(&self) -> GODF_R {
709        GODF_R::new(((self.bits >> 26) & 1) != 0)
710    }
711    #[doc = "Bit 29 - External Input Noise Filter Enable"]
712    #[inline(always)]
713    pub fn nfen(&self) -> NFEN_R {
714        NFEN_R::new(((self.bits >> 29) & 1) != 0)
715    }
716    #[doc = "Bits 30:31 - External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input."]
717    #[inline(always)]
718    pub fn nfcs(&self) -> NFCS_R {
719        NFCS_R::new(((self.bits >> 30) & 3) as u8)
720    }
721}
722impl W {
723    #[doc = "Bit 0 - Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
724    #[inline(always)]
725    #[must_use]
726    pub fn uf(&mut self) -> UF_W<0> {
727        UF_W::new(self)
728    }
729    #[doc = "Bit 1 - Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
730    #[inline(always)]
731    #[must_use]
732    pub fn vf(&mut self) -> VF_W<1> {
733        VF_W::new(self)
734    }
735    #[doc = "Bit 2 - Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1."]
736    #[inline(always)]
737    #[must_use]
738    pub fn wf(&mut self) -> WF_W<2> {
739        WF_W::new(self)
740    }
741    #[doc = "Bit 8 - Enable-Phase Output Control"]
742    #[inline(always)]
743    #[must_use]
744    pub fn en(&mut self) -> EN_W<8> {
745        EN_W::new(self)
746    }
747    #[doc = "Bit 16 - External Feedback Signal EnableThis bit selects the input phase from the software settings and external input."]
748    #[inline(always)]
749    #[must_use]
750    pub fn fb(&mut self) -> FB_W<16> {
751        FB_W::new(self)
752    }
753    #[doc = "Bit 17 - Positive-Phase Output (P) Control"]
754    #[inline(always)]
755    #[must_use]
756    pub fn p(&mut self) -> P_W<17> {
757        P_W::new(self)
758    }
759    #[doc = "Bit 18 - Negative-Phase Output (N) Control"]
760    #[inline(always)]
761    #[must_use]
762    pub fn n(&mut self) -> N_W<18> {
763        N_W::new(self)
764    }
765    #[doc = "Bit 19 - Invert-Phase Output Control"]
766    #[inline(always)]
767    #[must_use]
768    pub fn inv(&mut self) -> INV_W<19> {
769        INV_W::new(self)
770    }
771    #[doc = "Bit 20 - Output phase rotation direction reversal"]
772    #[inline(always)]
773    #[must_use]
774    pub fn rv(&mut self) -> RV_W<20> {
775        RV_W::new(self)
776    }
777    #[doc = "Bit 21 - Input phase alignment"]
778    #[inline(always)]
779    #[must_use]
780    pub fn align(&mut self) -> ALIGN_W<21> {
781        ALIGN_W::new(self)
782    }
783    #[doc = "Bits 24:25 - Output disabled source selection"]
784    #[inline(always)]
785    #[must_use]
786    pub fn grp(&mut self) -> GRP_W<24> {
787        GRP_W::new(self)
788    }
789    #[doc = "Bit 26 - Group output disable function"]
790    #[inline(always)]
791    #[must_use]
792    pub fn godf(&mut self) -> GODF_W<26> {
793        GODF_W::new(self)
794    }
795    #[doc = "Bit 29 - External Input Noise Filter Enable"]
796    #[inline(always)]
797    #[must_use]
798    pub fn nfen(&mut self) -> NFEN_W<29> {
799        NFEN_W::new(self)
800    }
801    #[doc = "Bits 30:31 - External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input."]
802    #[inline(always)]
803    #[must_use]
804    pub fn nfcs(&mut self) -> NFCS_W<30> {
805        NFCS_W::new(self)
806    }
807    #[doc = "Writes raw bits to the register."]
808    #[inline(always)]
809    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
810        self.0.bits(bits);
811        self
812    }
813}
814#[doc = "Output Phase Switching Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opscr](index.html) module"]
815pub struct OPSCR_SPEC;
816impl crate::RegisterSpec for OPSCR_SPEC {
817    type Ux = u32;
818}
819#[doc = "`read()` method returns [opscr::R](R) reader structure"]
820impl crate::Readable for OPSCR_SPEC {
821    type Reader = R;
822}
823#[doc = "`write(|w| ..)` method takes [opscr::W](W) writer structure"]
824impl crate::Writable for OPSCR_SPEC {
825    type Writer = W;
826    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
827    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
828}
829#[doc = "`reset()` method sets OPSCR to value 0"]
830impl crate::Resettable for OPSCR_SPEC {
831    const RESET_VALUE: Self::Ux = 0;
832}
ra4w1/gpt_ops/opscr.rs

ra4w1/gpt_ops/
opscr.rs
