1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Event Link Controller"]
28unsafe impl ::core::marker::Send for super::Elc {}
29unsafe impl ::core::marker::Sync for super::Elc {}
30impl super::Elc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Event Link Controller Register"]
38 #[inline(always)]
39 pub const fn elcr(&self) -> &'static crate::common::Reg<self::Elcr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Elcr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Event Link Software Event Generation Register %s"]
48 #[inline(always)]
49 pub const fn elsegr(
50 &self,
51 ) -> &'static crate::common::ClusterRegisterArray<
52 crate::common::Reg<self::Elsegr_SPEC, crate::common::RW>,
53 2,
54 0x2,
55 > {
56 unsafe {
57 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2usize))
58 }
59 }
60 #[inline(always)]
61 pub const fn elsegr0(
62 &self,
63 ) -> &'static crate::common::Reg<self::Elsegr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Elsegr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(0x2usize),
67 )
68 }
69 }
70 #[inline(always)]
71 pub const fn elsegr1(
72 &self,
73 ) -> &'static crate::common::Reg<self::Elsegr_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::Elsegr_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(0x4usize),
77 )
78 }
79 }
80
81 #[doc = "Event Link Setting Register 12"]
82 #[inline(always)]
83 pub const fn elsr12(
84 &self,
85 ) -> &'static crate::common::Reg<self::Elsr12_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::Elsr12_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(64usize),
89 )
90 }
91 }
92
93 #[doc = "Event Link Setting Register %s"]
94 #[inline(always)]
95 pub const fn elsr(
96 &self,
97 ) -> &'static crate::common::ClusterRegisterArray<
98 crate::common::Reg<self::Elsr_SPEC, crate::common::RW>,
99 5,
100 0x4,
101 > {
102 unsafe {
103 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x48usize))
104 }
105 }
106 #[inline(always)]
107 pub const fn elsr14(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(0x48usize),
111 )
112 }
113 }
114 #[inline(always)]
115 pub const fn elsr15(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
116 unsafe {
117 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
118 self._svd2pac_as_ptr().add(0x4cusize),
119 )
120 }
121 }
122 #[inline(always)]
123 pub const fn elsr16(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(0x50usize),
127 )
128 }
129 }
130 #[inline(always)]
131 pub const fn elsr17(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
132 unsafe {
133 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
134 self._svd2pac_as_ptr().add(0x54usize),
135 )
136 }
137 }
138 #[inline(always)]
139 pub const fn elsr18(&self) -> &'static crate::common::Reg<self::Elsr_SPEC, crate::common::RW> {
140 unsafe {
141 crate::common::Reg::<self::Elsr_SPEC, crate::common::RW>::from_ptr(
142 self._svd2pac_as_ptr().add(0x58usize),
143 )
144 }
145 }
146}
147#[doc(hidden)]
148#[derive(Copy, Clone, Eq, PartialEq)]
149pub struct Elcr_SPEC;
150impl crate::sealed::RegSpec for Elcr_SPEC {
151 type DataType = u8;
152}
153
154#[doc = "Event Link Controller Register"]
155pub type Elcr = crate::RegValueT<Elcr_SPEC>;
156
157impl Elcr {
158 #[doc = "All Event Link Enable"]
159 #[inline(always)]
160 pub fn elcon(
161 self,
162 ) -> crate::common::RegisterField<
163 7,
164 0x1,
165 1,
166 0,
167 elcr::Elcon,
168 elcr::Elcon,
169 Elcr_SPEC,
170 crate::common::RW,
171 > {
172 crate::common::RegisterField::<
173 7,
174 0x1,
175 1,
176 0,
177 elcr::Elcon,
178 elcr::Elcon,
179 Elcr_SPEC,
180 crate::common::RW,
181 >::from_register(self, 0)
182 }
183
184 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
185 #[inline(always)]
186 pub fn reserved(
187 self,
188 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Elcr_SPEC, crate::common::RW> {
189 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Elcr_SPEC,crate::common::RW>::from_register(self,0)
190 }
191}
192impl ::core::default::Default for Elcr {
193 #[inline(always)]
194 fn default() -> Elcr {
195 <crate::RegValueT<Elcr_SPEC> as RegisterValue<_>>::new(0)
196 }
197}
198pub mod elcr {
199
200 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
201 pub struct Elcon_SPEC;
202 pub type Elcon = crate::EnumBitfieldStruct<u8, Elcon_SPEC>;
203 impl Elcon {
204 #[doc = "ELC function is disabled."]
205 pub const _0: Self = Self::new(0);
206
207 #[doc = "ELC function is enabled."]
208 pub const _1: Self = Self::new(1);
209 }
210}
211#[doc(hidden)]
212#[derive(Copy, Clone, Eq, PartialEq)]
213pub struct Elsegr_SPEC;
214impl crate::sealed::RegSpec for Elsegr_SPEC {
215 type DataType = u8;
216}
217
218#[doc = "Event Link Software Event Generation Register %s"]
219pub type Elsegr = crate::RegValueT<Elsegr_SPEC>;
220
221impl Elsegr {
222 #[doc = "ELSEGR Register Write Disable"]
223 #[inline(always)]
224 pub fn wi(
225 self,
226 ) -> crate::common::RegisterField<
227 7,
228 0x1,
229 1,
230 0,
231 elsegr::Wi,
232 elsegr::Wi,
233 Elsegr_SPEC,
234 crate::common::W,
235 > {
236 crate::common::RegisterField::<
237 7,
238 0x1,
239 1,
240 0,
241 elsegr::Wi,
242 elsegr::Wi,
243 Elsegr_SPEC,
244 crate::common::W,
245 >::from_register(self, 0)
246 }
247
248 #[doc = "SEG Bit Write Enable"]
249 #[inline(always)]
250 pub fn we(
251 self,
252 ) -> crate::common::RegisterField<
253 6,
254 0x1,
255 1,
256 0,
257 elsegr::We,
258 elsegr::We,
259 Elsegr_SPEC,
260 crate::common::RW,
261 > {
262 crate::common::RegisterField::<
263 6,
264 0x1,
265 1,
266 0,
267 elsegr::We,
268 elsegr::We,
269 Elsegr_SPEC,
270 crate::common::RW,
271 >::from_register(self, 0)
272 }
273
274 #[doc = "These bits are read as 00000. The write value should be 00000."]
275 #[inline(always)]
276 pub fn reserved(
277 self,
278 ) -> crate::common::RegisterField<1, 0x1f, 1, 0, u8, u8, Elsegr_SPEC, crate::common::RW> {
279 crate::common::RegisterField::<1,0x1f,1,0,u8,u8,Elsegr_SPEC,crate::common::RW>::from_register(self,0)
280 }
281
282 #[doc = "Software Event Generation"]
283 #[inline(always)]
284 pub fn seg(
285 self,
286 ) -> crate::common::RegisterField<
287 0,
288 0x1,
289 1,
290 0,
291 elsegr::Seg,
292 elsegr::Seg,
293 Elsegr_SPEC,
294 crate::common::W,
295 > {
296 crate::common::RegisterField::<
297 0,
298 0x1,
299 1,
300 0,
301 elsegr::Seg,
302 elsegr::Seg,
303 Elsegr_SPEC,
304 crate::common::W,
305 >::from_register(self, 0)
306 }
307}
308impl ::core::default::Default for Elsegr {
309 #[inline(always)]
310 fn default() -> Elsegr {
311 <crate::RegValueT<Elsegr_SPEC> as RegisterValue<_>>::new(128)
312 }
313}
314pub mod elsegr {
315
316 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
317 pub struct Wi_SPEC;
318 pub type Wi = crate::EnumBitfieldStruct<u8, Wi_SPEC>;
319 impl Wi {
320 #[doc = "Write to ELSEGR register is enabled."]
321 pub const _0: Self = Self::new(0);
322
323 #[doc = "Write to ELSEGR register is disabled."]
324 pub const _1: Self = Self::new(1);
325 }
326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
327 pub struct We_SPEC;
328 pub type We = crate::EnumBitfieldStruct<u8, We_SPEC>;
329 impl We {
330 #[doc = "Write to SEG bit is disabled."]
331 pub const _0: Self = Self::new(0);
332
333 #[doc = "Write to SEG bit is enabled."]
334 pub const _1: Self = Self::new(1);
335 }
336 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
337 pub struct Seg_SPEC;
338 pub type Seg = crate::EnumBitfieldStruct<u8, Seg_SPEC>;
339 impl Seg {
340 #[doc = "Normal operation"]
341 pub const _0: Self = Self::new(0);
342
343 #[doc = "Software event is generated."]
344 pub const _1: Self = Self::new(1);
345 }
346}
347#[doc(hidden)]
348#[derive(Copy, Clone, Eq, PartialEq)]
349pub struct Elsr12_SPEC;
350impl crate::sealed::RegSpec for Elsr12_SPEC {
351 type DataType = u16;
352}
353
354#[doc = "Event Link Setting Register 12"]
355pub type Elsr12 = crate::RegValueT<Elsr12_SPEC>;
356
357impl Elsr12 {
358 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
359 #[inline(always)]
360 pub fn reserved(
361 self,
362 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Elsr12_SPEC, crate::common::RW> {
363 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Elsr12_SPEC,crate::common::RW>::from_register(self,0)
364 }
365
366 #[doc = "Event Link Select"]
367 #[inline(always)]
368 pub fn els(
369 self,
370 ) -> crate::common::RegisterField<
371 0,
372 0xff,
373 1,
374 0,
375 elsr12::Els,
376 elsr12::Els,
377 Elsr12_SPEC,
378 crate::common::RW,
379 > {
380 crate::common::RegisterField::<
381 0,
382 0xff,
383 1,
384 0,
385 elsr12::Els,
386 elsr12::Els,
387 Elsr12_SPEC,
388 crate::common::RW,
389 >::from_register(self, 0)
390 }
391}
392impl ::core::default::Default for Elsr12 {
393 #[inline(always)]
394 fn default() -> Elsr12 {
395 <crate::RegValueT<Elsr12_SPEC> as RegisterValue<_>>::new(0)
396 }
397}
398pub mod elsr12 {
399
400 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
401 pub struct Els_SPEC;
402 pub type Els = crate::EnumBitfieldStruct<u8, Els_SPEC>;
403 impl Els {
404 #[doc = "Event output to the corresponding peripheral module is disabled."]
405 pub const _0_X_00: Self = Self::new(0);
406
407 #[doc = "Set the number for the event signal to be linked."]
408 pub const OTHERS: Self = Self::new(0);
409 }
410}
411#[doc(hidden)]
412#[derive(Copy, Clone, Eq, PartialEq)]
413pub struct Elsr_SPEC;
414impl crate::sealed::RegSpec for Elsr_SPEC {
415 type DataType = u16;
416}
417
418#[doc = "Event Link Setting Register %s"]
419pub type Elsr = crate::RegValueT<Elsr_SPEC>;
420
421impl Elsr {
422 #[doc = "These bits are read as 00000000. The write value should be 00000000."]
423 #[inline(always)]
424 pub fn reserved(
425 self,
426 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Elsr_SPEC, crate::common::RW> {
427 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Elsr_SPEC,crate::common::RW>::from_register(self,0)
428 }
429
430 #[doc = "Event Link Select"]
431 #[inline(always)]
432 pub fn els(
433 self,
434 ) -> crate::common::RegisterField<
435 0,
436 0xff,
437 1,
438 0,
439 elsr::Els,
440 elsr::Els,
441 Elsr_SPEC,
442 crate::common::RW,
443 > {
444 crate::common::RegisterField::<
445 0,
446 0xff,
447 1,
448 0,
449 elsr::Els,
450 elsr::Els,
451 Elsr_SPEC,
452 crate::common::RW,
453 >::from_register(self, 0)
454 }
455}
456impl ::core::default::Default for Elsr {
457 #[inline(always)]
458 fn default() -> Elsr {
459 <crate::RegValueT<Elsr_SPEC> as RegisterValue<_>>::new(0)
460 }
461}
462pub mod elsr {
463
464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
465 pub struct Els_SPEC;
466 pub type Els = crate::EnumBitfieldStruct<u8, Els_SPEC>;
467 impl Els {
468 #[doc = "Event output to the corresponding peripheral module is disabled."]
469 pub const _0_X_00: Self = Self::new(0);
470
471 #[doc = "Set the number for the event signal to be linked."]
472 pub const OTHERS: Self = Self::new(0);
473 }
474}