1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::System {}
29unsafe impl ::core::marker::Sync for super::System {}
30impl super::System {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "VBATT Control Register1"]
38 #[inline(always)]
39 pub const fn vbtcr1(
40 &self,
41 ) -> &'static crate::common::Reg<self::Vbtcr1_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Vbtcr1_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(1055usize),
45 )
46 }
47 }
48
49 #[doc = "VBATT Control Register2"]
50 #[inline(always)]
51 pub const fn vbtcr2(
52 &self,
53 ) -> &'static crate::common::Reg<self::Vbtcr2_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Vbtcr2_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(1200usize),
57 )
58 }
59 }
60
61 #[doc = "VBATT Status Register"]
62 #[inline(always)]
63 pub const fn vbtsr(&self) -> &'static crate::common::Reg<self::Vbtsr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Vbtsr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(1201usize),
67 )
68 }
69 }
70
71 #[doc = "VBATT Comparator Control Register"]
72 #[inline(always)]
73 pub const fn vbtcmpcr(
74 &self,
75 ) -> &'static crate::common::Reg<self::Vbtcmpcr_SPEC, crate::common::RW> {
76 unsafe {
77 crate::common::Reg::<self::Vbtcmpcr_SPEC, crate::common::RW>::from_ptr(
78 self._svd2pac_as_ptr().add(1202usize),
79 )
80 }
81 }
82
83 #[doc = "VBATT Pin Low Voltage Detect Interrupt Control Register"]
84 #[inline(always)]
85 pub const fn vbtlvdicr(
86 &self,
87 ) -> &'static crate::common::Reg<self::Vbtlvdicr_SPEC, crate::common::RW> {
88 unsafe {
89 crate::common::Reg::<self::Vbtlvdicr_SPEC, crate::common::RW>::from_ptr(
90 self._svd2pac_as_ptr().add(1204usize),
91 )
92 }
93 }
94
95 #[doc = "VBATT Wakeup function Control Register"]
96 #[inline(always)]
97 pub const fn vbtwctlr(
98 &self,
99 ) -> &'static crate::common::Reg<self::Vbtwctlr_SPEC, crate::common::RW> {
100 unsafe {
101 crate::common::Reg::<self::Vbtwctlr_SPEC, crate::common::RW>::from_ptr(
102 self._svd2pac_as_ptr().add(1206usize),
103 )
104 }
105 }
106
107 #[doc = "VBATT Wakeup I/O 0 Output Trigger Select Register"]
108 #[inline(always)]
109 pub const fn vbtwch0otsr(
110 &self,
111 ) -> &'static crate::common::Reg<self::Vbtwch0Otsr_SPEC, crate::common::RW> {
112 unsafe {
113 crate::common::Reg::<self::Vbtwch0Otsr_SPEC, crate::common::RW>::from_ptr(
114 self._svd2pac_as_ptr().add(1208usize),
115 )
116 }
117 }
118
119 #[doc = "VBATT Wakeup I/O 1 Output Trigger Select Register"]
120 #[inline(always)]
121 pub const fn vbtwch1otsr(
122 &self,
123 ) -> &'static crate::common::Reg<self::Vbtwch1Otsr_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Vbtwch1Otsr_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(1209usize),
127 )
128 }
129 }
130
131 #[doc = "VBATT Wakeup I/O 2 Output Trigger Select Register"]
132 #[inline(always)]
133 pub const fn vbtwch2otsr(
134 &self,
135 ) -> &'static crate::common::Reg<self::Vbtwch2Otsr_SPEC, crate::common::RW> {
136 unsafe {
137 crate::common::Reg::<self::Vbtwch2Otsr_SPEC, crate::common::RW>::from_ptr(
138 self._svd2pac_as_ptr().add(1210usize),
139 )
140 }
141 }
142
143 #[doc = "VBATT Input Control Register"]
144 #[inline(always)]
145 pub const fn vbtictlr(
146 &self,
147 ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
148 unsafe {
149 crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
150 self._svd2pac_as_ptr().add(1211usize),
151 )
152 }
153 }
154
155 #[doc = "VBATT Output Control Register"]
156 #[inline(always)]
157 pub const fn vbtoctlr(
158 &self,
159 ) -> &'static crate::common::Reg<self::Vbtoctlr_SPEC, crate::common::RW> {
160 unsafe {
161 crate::common::Reg::<self::Vbtoctlr_SPEC, crate::common::RW>::from_ptr(
162 self._svd2pac_as_ptr().add(1212usize),
163 )
164 }
165 }
166
167 #[doc = "VBATT Wakeup Trigger source Enable Register"]
168 #[inline(always)]
169 pub const fn vbtwter(
170 &self,
171 ) -> &'static crate::common::Reg<self::Vbtwter_SPEC, crate::common::RW> {
172 unsafe {
173 crate::common::Reg::<self::Vbtwter_SPEC, crate::common::RW>::from_ptr(
174 self._svd2pac_as_ptr().add(1213usize),
175 )
176 }
177 }
178
179 #[doc = "VBATT Wakeup Trigger source Edge Register"]
180 #[inline(always)]
181 pub const fn vbtwegr(
182 &self,
183 ) -> &'static crate::common::Reg<self::Vbtwegr_SPEC, crate::common::RW> {
184 unsafe {
185 crate::common::Reg::<self::Vbtwegr_SPEC, crate::common::RW>::from_ptr(
186 self._svd2pac_as_ptr().add(1214usize),
187 )
188 }
189 }
190
191 #[doc = "VBATT Wakeup trigger source Flag Register"]
192 #[inline(always)]
193 pub const fn vbtwfr(
194 &self,
195 ) -> &'static crate::common::Reg<self::Vbtwfr_SPEC, crate::common::RW> {
196 unsafe {
197 crate::common::Reg::<self::Vbtwfr_SPEC, crate::common::RW>::from_ptr(
198 self._svd2pac_as_ptr().add(1215usize),
199 )
200 }
201 }
202
203 #[doc = "VBATT Backup Register \\[%s\\]"]
204 #[inline(always)]
205 pub const fn vbtbkr(
206 &self,
207 ) -> &'static crate::common::ClusterRegisterArray<
208 crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
209 512,
210 0x1,
211 > {
212 unsafe {
213 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x500usize))
214 }
215 }
216 #[inline(always)]
217 pub const fn vbtbkr_0_(
218 &self,
219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(0x500usize),
223 )
224 }
225 }
226 #[inline(always)]
227 pub const fn vbtbkr_1_(
228 &self,
229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
230 unsafe {
231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
232 self._svd2pac_as_ptr().add(0x501usize),
233 )
234 }
235 }
236 #[inline(always)]
237 pub const fn vbtbkr_2_(
238 &self,
239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
240 unsafe {
241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
242 self._svd2pac_as_ptr().add(0x502usize),
243 )
244 }
245 }
246 #[inline(always)]
247 pub const fn vbtbkr_3_(
248 &self,
249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(0x503usize),
253 )
254 }
255 }
256 #[inline(always)]
257 pub const fn vbtbkr_4_(
258 &self,
259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
260 unsafe {
261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
262 self._svd2pac_as_ptr().add(0x504usize),
263 )
264 }
265 }
266 #[inline(always)]
267 pub const fn vbtbkr_5_(
268 &self,
269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
270 unsafe {
271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
272 self._svd2pac_as_ptr().add(0x505usize),
273 )
274 }
275 }
276 #[inline(always)]
277 pub const fn vbtbkr_6_(
278 &self,
279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
280 unsafe {
281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
282 self._svd2pac_as_ptr().add(0x506usize),
283 )
284 }
285 }
286 #[inline(always)]
287 pub const fn vbtbkr_7_(
288 &self,
289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
290 unsafe {
291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
292 self._svd2pac_as_ptr().add(0x507usize),
293 )
294 }
295 }
296 #[inline(always)]
297 pub const fn vbtbkr_8_(
298 &self,
299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(0x508usize),
303 )
304 }
305 }
306 #[inline(always)]
307 pub const fn vbtbkr_9_(
308 &self,
309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
310 unsafe {
311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
312 self._svd2pac_as_ptr().add(0x509usize),
313 )
314 }
315 }
316 #[inline(always)]
317 pub const fn vbtbkr_10_(
318 &self,
319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
320 unsafe {
321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
322 self._svd2pac_as_ptr().add(0x50ausize),
323 )
324 }
325 }
326 #[inline(always)]
327 pub const fn vbtbkr_11_(
328 &self,
329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
330 unsafe {
331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
332 self._svd2pac_as_ptr().add(0x50busize),
333 )
334 }
335 }
336 #[inline(always)]
337 pub const fn vbtbkr_12_(
338 &self,
339 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
340 unsafe {
341 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
342 self._svd2pac_as_ptr().add(0x50cusize),
343 )
344 }
345 }
346 #[inline(always)]
347 pub const fn vbtbkr_13_(
348 &self,
349 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
350 unsafe {
351 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
352 self._svd2pac_as_ptr().add(0x50dusize),
353 )
354 }
355 }
356 #[inline(always)]
357 pub const fn vbtbkr_14_(
358 &self,
359 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
360 unsafe {
361 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
362 self._svd2pac_as_ptr().add(0x50eusize),
363 )
364 }
365 }
366 #[inline(always)]
367 pub const fn vbtbkr_15_(
368 &self,
369 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
370 unsafe {
371 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
372 self._svd2pac_as_ptr().add(0x50fusize),
373 )
374 }
375 }
376 #[inline(always)]
377 pub const fn vbtbkr_16_(
378 &self,
379 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
380 unsafe {
381 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
382 self._svd2pac_as_ptr().add(0x510usize),
383 )
384 }
385 }
386 #[inline(always)]
387 pub const fn vbtbkr_17_(
388 &self,
389 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(0x511usize),
393 )
394 }
395 }
396 #[inline(always)]
397 pub const fn vbtbkr_18_(
398 &self,
399 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
400 unsafe {
401 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
402 self._svd2pac_as_ptr().add(0x512usize),
403 )
404 }
405 }
406 #[inline(always)]
407 pub const fn vbtbkr_19_(
408 &self,
409 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
410 unsafe {
411 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
412 self._svd2pac_as_ptr().add(0x513usize),
413 )
414 }
415 }
416 #[inline(always)]
417 pub const fn vbtbkr_20_(
418 &self,
419 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
420 unsafe {
421 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
422 self._svd2pac_as_ptr().add(0x514usize),
423 )
424 }
425 }
426 #[inline(always)]
427 pub const fn vbtbkr_21_(
428 &self,
429 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
430 unsafe {
431 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
432 self._svd2pac_as_ptr().add(0x515usize),
433 )
434 }
435 }
436 #[inline(always)]
437 pub const fn vbtbkr_22_(
438 &self,
439 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
440 unsafe {
441 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
442 self._svd2pac_as_ptr().add(0x516usize),
443 )
444 }
445 }
446 #[inline(always)]
447 pub const fn vbtbkr_23_(
448 &self,
449 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(0x517usize),
453 )
454 }
455 }
456 #[inline(always)]
457 pub const fn vbtbkr_24_(
458 &self,
459 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
460 unsafe {
461 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
462 self._svd2pac_as_ptr().add(0x518usize),
463 )
464 }
465 }
466 #[inline(always)]
467 pub const fn vbtbkr_25_(
468 &self,
469 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
470 unsafe {
471 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
472 self._svd2pac_as_ptr().add(0x519usize),
473 )
474 }
475 }
476 #[inline(always)]
477 pub const fn vbtbkr_26_(
478 &self,
479 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
480 unsafe {
481 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
482 self._svd2pac_as_ptr().add(0x51ausize),
483 )
484 }
485 }
486 #[inline(always)]
487 pub const fn vbtbkr_27_(
488 &self,
489 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
490 unsafe {
491 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
492 self._svd2pac_as_ptr().add(0x51busize),
493 )
494 }
495 }
496 #[inline(always)]
497 pub const fn vbtbkr_28_(
498 &self,
499 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
500 unsafe {
501 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
502 self._svd2pac_as_ptr().add(0x51cusize),
503 )
504 }
505 }
506 #[inline(always)]
507 pub const fn vbtbkr_29_(
508 &self,
509 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
510 unsafe {
511 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
512 self._svd2pac_as_ptr().add(0x51dusize),
513 )
514 }
515 }
516 #[inline(always)]
517 pub const fn vbtbkr_30_(
518 &self,
519 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
520 unsafe {
521 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
522 self._svd2pac_as_ptr().add(0x51eusize),
523 )
524 }
525 }
526 #[inline(always)]
527 pub const fn vbtbkr_31_(
528 &self,
529 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
530 unsafe {
531 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
532 self._svd2pac_as_ptr().add(0x51fusize),
533 )
534 }
535 }
536 #[inline(always)]
537 pub const fn vbtbkr_32_(
538 &self,
539 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
540 unsafe {
541 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
542 self._svd2pac_as_ptr().add(0x520usize),
543 )
544 }
545 }
546 #[inline(always)]
547 pub const fn vbtbkr_33_(
548 &self,
549 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
550 unsafe {
551 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
552 self._svd2pac_as_ptr().add(0x521usize),
553 )
554 }
555 }
556 #[inline(always)]
557 pub const fn vbtbkr_34_(
558 &self,
559 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
560 unsafe {
561 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
562 self._svd2pac_as_ptr().add(0x522usize),
563 )
564 }
565 }
566 #[inline(always)]
567 pub const fn vbtbkr_35_(
568 &self,
569 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
570 unsafe {
571 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
572 self._svd2pac_as_ptr().add(0x523usize),
573 )
574 }
575 }
576 #[inline(always)]
577 pub const fn vbtbkr_36_(
578 &self,
579 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
580 unsafe {
581 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
582 self._svd2pac_as_ptr().add(0x524usize),
583 )
584 }
585 }
586 #[inline(always)]
587 pub const fn vbtbkr_37_(
588 &self,
589 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
590 unsafe {
591 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
592 self._svd2pac_as_ptr().add(0x525usize),
593 )
594 }
595 }
596 #[inline(always)]
597 pub const fn vbtbkr_38_(
598 &self,
599 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
600 unsafe {
601 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
602 self._svd2pac_as_ptr().add(0x526usize),
603 )
604 }
605 }
606 #[inline(always)]
607 pub const fn vbtbkr_39_(
608 &self,
609 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
610 unsafe {
611 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
612 self._svd2pac_as_ptr().add(0x527usize),
613 )
614 }
615 }
616 #[inline(always)]
617 pub const fn vbtbkr_40_(
618 &self,
619 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
620 unsafe {
621 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
622 self._svd2pac_as_ptr().add(0x528usize),
623 )
624 }
625 }
626 #[inline(always)]
627 pub const fn vbtbkr_41_(
628 &self,
629 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
630 unsafe {
631 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
632 self._svd2pac_as_ptr().add(0x529usize),
633 )
634 }
635 }
636 #[inline(always)]
637 pub const fn vbtbkr_42_(
638 &self,
639 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(0x52ausize),
643 )
644 }
645 }
646 #[inline(always)]
647 pub const fn vbtbkr_43_(
648 &self,
649 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
650 unsafe {
651 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
652 self._svd2pac_as_ptr().add(0x52busize),
653 )
654 }
655 }
656 #[inline(always)]
657 pub const fn vbtbkr_44_(
658 &self,
659 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
660 unsafe {
661 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
662 self._svd2pac_as_ptr().add(0x52cusize),
663 )
664 }
665 }
666 #[inline(always)]
667 pub const fn vbtbkr_45_(
668 &self,
669 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
670 unsafe {
671 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
672 self._svd2pac_as_ptr().add(0x52dusize),
673 )
674 }
675 }
676 #[inline(always)]
677 pub const fn vbtbkr_46_(
678 &self,
679 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
680 unsafe {
681 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
682 self._svd2pac_as_ptr().add(0x52eusize),
683 )
684 }
685 }
686 #[inline(always)]
687 pub const fn vbtbkr_47_(
688 &self,
689 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
690 unsafe {
691 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
692 self._svd2pac_as_ptr().add(0x52fusize),
693 )
694 }
695 }
696 #[inline(always)]
697 pub const fn vbtbkr_48_(
698 &self,
699 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
700 unsafe {
701 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
702 self._svd2pac_as_ptr().add(0x530usize),
703 )
704 }
705 }
706 #[inline(always)]
707 pub const fn vbtbkr_49_(
708 &self,
709 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
710 unsafe {
711 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
712 self._svd2pac_as_ptr().add(0x531usize),
713 )
714 }
715 }
716 #[inline(always)]
717 pub const fn vbtbkr_50_(
718 &self,
719 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
720 unsafe {
721 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
722 self._svd2pac_as_ptr().add(0x532usize),
723 )
724 }
725 }
726 #[inline(always)]
727 pub const fn vbtbkr_51_(
728 &self,
729 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
730 unsafe {
731 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
732 self._svd2pac_as_ptr().add(0x533usize),
733 )
734 }
735 }
736 #[inline(always)]
737 pub const fn vbtbkr_52_(
738 &self,
739 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
740 unsafe {
741 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
742 self._svd2pac_as_ptr().add(0x534usize),
743 )
744 }
745 }
746 #[inline(always)]
747 pub const fn vbtbkr_53_(
748 &self,
749 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
750 unsafe {
751 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
752 self._svd2pac_as_ptr().add(0x535usize),
753 )
754 }
755 }
756 #[inline(always)]
757 pub const fn vbtbkr_54_(
758 &self,
759 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
760 unsafe {
761 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
762 self._svd2pac_as_ptr().add(0x536usize),
763 )
764 }
765 }
766 #[inline(always)]
767 pub const fn vbtbkr_55_(
768 &self,
769 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
770 unsafe {
771 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
772 self._svd2pac_as_ptr().add(0x537usize),
773 )
774 }
775 }
776 #[inline(always)]
777 pub const fn vbtbkr_56_(
778 &self,
779 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
780 unsafe {
781 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
782 self._svd2pac_as_ptr().add(0x538usize),
783 )
784 }
785 }
786 #[inline(always)]
787 pub const fn vbtbkr_57_(
788 &self,
789 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
790 unsafe {
791 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
792 self._svd2pac_as_ptr().add(0x539usize),
793 )
794 }
795 }
796 #[inline(always)]
797 pub const fn vbtbkr_58_(
798 &self,
799 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
800 unsafe {
801 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
802 self._svd2pac_as_ptr().add(0x53ausize),
803 )
804 }
805 }
806 #[inline(always)]
807 pub const fn vbtbkr_59_(
808 &self,
809 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
810 unsafe {
811 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
812 self._svd2pac_as_ptr().add(0x53busize),
813 )
814 }
815 }
816 #[inline(always)]
817 pub const fn vbtbkr_60_(
818 &self,
819 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
820 unsafe {
821 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
822 self._svd2pac_as_ptr().add(0x53cusize),
823 )
824 }
825 }
826 #[inline(always)]
827 pub const fn vbtbkr_61_(
828 &self,
829 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
830 unsafe {
831 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
832 self._svd2pac_as_ptr().add(0x53dusize),
833 )
834 }
835 }
836 #[inline(always)]
837 pub const fn vbtbkr_62_(
838 &self,
839 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
840 unsafe {
841 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
842 self._svd2pac_as_ptr().add(0x53eusize),
843 )
844 }
845 }
846 #[inline(always)]
847 pub const fn vbtbkr_63_(
848 &self,
849 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
850 unsafe {
851 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
852 self._svd2pac_as_ptr().add(0x53fusize),
853 )
854 }
855 }
856 #[inline(always)]
857 pub const fn vbtbkr_64_(
858 &self,
859 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
860 unsafe {
861 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
862 self._svd2pac_as_ptr().add(0x540usize),
863 )
864 }
865 }
866 #[inline(always)]
867 pub const fn vbtbkr_65_(
868 &self,
869 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
870 unsafe {
871 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
872 self._svd2pac_as_ptr().add(0x541usize),
873 )
874 }
875 }
876 #[inline(always)]
877 pub const fn vbtbkr_66_(
878 &self,
879 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
880 unsafe {
881 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
882 self._svd2pac_as_ptr().add(0x542usize),
883 )
884 }
885 }
886 #[inline(always)]
887 pub const fn vbtbkr_67_(
888 &self,
889 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
890 unsafe {
891 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
892 self._svd2pac_as_ptr().add(0x543usize),
893 )
894 }
895 }
896 #[inline(always)]
897 pub const fn vbtbkr_68_(
898 &self,
899 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
900 unsafe {
901 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
902 self._svd2pac_as_ptr().add(0x544usize),
903 )
904 }
905 }
906 #[inline(always)]
907 pub const fn vbtbkr_69_(
908 &self,
909 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
910 unsafe {
911 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
912 self._svd2pac_as_ptr().add(0x545usize),
913 )
914 }
915 }
916 #[inline(always)]
917 pub const fn vbtbkr_70_(
918 &self,
919 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
920 unsafe {
921 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
922 self._svd2pac_as_ptr().add(0x546usize),
923 )
924 }
925 }
926 #[inline(always)]
927 pub const fn vbtbkr_71_(
928 &self,
929 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
930 unsafe {
931 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
932 self._svd2pac_as_ptr().add(0x547usize),
933 )
934 }
935 }
936 #[inline(always)]
937 pub const fn vbtbkr_72_(
938 &self,
939 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
940 unsafe {
941 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
942 self._svd2pac_as_ptr().add(0x548usize),
943 )
944 }
945 }
946 #[inline(always)]
947 pub const fn vbtbkr_73_(
948 &self,
949 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
950 unsafe {
951 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
952 self._svd2pac_as_ptr().add(0x549usize),
953 )
954 }
955 }
956 #[inline(always)]
957 pub const fn vbtbkr_74_(
958 &self,
959 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
960 unsafe {
961 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
962 self._svd2pac_as_ptr().add(0x54ausize),
963 )
964 }
965 }
966 #[inline(always)]
967 pub const fn vbtbkr_75_(
968 &self,
969 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
970 unsafe {
971 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
972 self._svd2pac_as_ptr().add(0x54busize),
973 )
974 }
975 }
976 #[inline(always)]
977 pub const fn vbtbkr_76_(
978 &self,
979 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
980 unsafe {
981 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
982 self._svd2pac_as_ptr().add(0x54cusize),
983 )
984 }
985 }
986 #[inline(always)]
987 pub const fn vbtbkr_77_(
988 &self,
989 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
990 unsafe {
991 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
992 self._svd2pac_as_ptr().add(0x54dusize),
993 )
994 }
995 }
996 #[inline(always)]
997 pub const fn vbtbkr_78_(
998 &self,
999 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1000 unsafe {
1001 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1002 self._svd2pac_as_ptr().add(0x54eusize),
1003 )
1004 }
1005 }
1006 #[inline(always)]
1007 pub const fn vbtbkr_79_(
1008 &self,
1009 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1010 unsafe {
1011 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1012 self._svd2pac_as_ptr().add(0x54fusize),
1013 )
1014 }
1015 }
1016 #[inline(always)]
1017 pub const fn vbtbkr_80_(
1018 &self,
1019 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1020 unsafe {
1021 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1022 self._svd2pac_as_ptr().add(0x550usize),
1023 )
1024 }
1025 }
1026 #[inline(always)]
1027 pub const fn vbtbkr_81_(
1028 &self,
1029 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1030 unsafe {
1031 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1032 self._svd2pac_as_ptr().add(0x551usize),
1033 )
1034 }
1035 }
1036 #[inline(always)]
1037 pub const fn vbtbkr_82_(
1038 &self,
1039 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1040 unsafe {
1041 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1042 self._svd2pac_as_ptr().add(0x552usize),
1043 )
1044 }
1045 }
1046 #[inline(always)]
1047 pub const fn vbtbkr_83_(
1048 &self,
1049 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1050 unsafe {
1051 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1052 self._svd2pac_as_ptr().add(0x553usize),
1053 )
1054 }
1055 }
1056 #[inline(always)]
1057 pub const fn vbtbkr_84_(
1058 &self,
1059 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1060 unsafe {
1061 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1062 self._svd2pac_as_ptr().add(0x554usize),
1063 )
1064 }
1065 }
1066 #[inline(always)]
1067 pub const fn vbtbkr_85_(
1068 &self,
1069 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1070 unsafe {
1071 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1072 self._svd2pac_as_ptr().add(0x555usize),
1073 )
1074 }
1075 }
1076 #[inline(always)]
1077 pub const fn vbtbkr_86_(
1078 &self,
1079 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1080 unsafe {
1081 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1082 self._svd2pac_as_ptr().add(0x556usize),
1083 )
1084 }
1085 }
1086 #[inline(always)]
1087 pub const fn vbtbkr_87_(
1088 &self,
1089 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1090 unsafe {
1091 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1092 self._svd2pac_as_ptr().add(0x557usize),
1093 )
1094 }
1095 }
1096 #[inline(always)]
1097 pub const fn vbtbkr_88_(
1098 &self,
1099 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1100 unsafe {
1101 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1102 self._svd2pac_as_ptr().add(0x558usize),
1103 )
1104 }
1105 }
1106 #[inline(always)]
1107 pub const fn vbtbkr_89_(
1108 &self,
1109 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1110 unsafe {
1111 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1112 self._svd2pac_as_ptr().add(0x559usize),
1113 )
1114 }
1115 }
1116 #[inline(always)]
1117 pub const fn vbtbkr_90_(
1118 &self,
1119 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1120 unsafe {
1121 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1122 self._svd2pac_as_ptr().add(0x55ausize),
1123 )
1124 }
1125 }
1126 #[inline(always)]
1127 pub const fn vbtbkr_91_(
1128 &self,
1129 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1130 unsafe {
1131 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1132 self._svd2pac_as_ptr().add(0x55busize),
1133 )
1134 }
1135 }
1136 #[inline(always)]
1137 pub const fn vbtbkr_92_(
1138 &self,
1139 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1140 unsafe {
1141 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1142 self._svd2pac_as_ptr().add(0x55cusize),
1143 )
1144 }
1145 }
1146 #[inline(always)]
1147 pub const fn vbtbkr_93_(
1148 &self,
1149 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1150 unsafe {
1151 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1152 self._svd2pac_as_ptr().add(0x55dusize),
1153 )
1154 }
1155 }
1156 #[inline(always)]
1157 pub const fn vbtbkr_94_(
1158 &self,
1159 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1160 unsafe {
1161 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1162 self._svd2pac_as_ptr().add(0x55eusize),
1163 )
1164 }
1165 }
1166 #[inline(always)]
1167 pub const fn vbtbkr_95_(
1168 &self,
1169 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1170 unsafe {
1171 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1172 self._svd2pac_as_ptr().add(0x55fusize),
1173 )
1174 }
1175 }
1176 #[inline(always)]
1177 pub const fn vbtbkr_96_(
1178 &self,
1179 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1180 unsafe {
1181 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1182 self._svd2pac_as_ptr().add(0x560usize),
1183 )
1184 }
1185 }
1186 #[inline(always)]
1187 pub const fn vbtbkr_97_(
1188 &self,
1189 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1190 unsafe {
1191 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1192 self._svd2pac_as_ptr().add(0x561usize),
1193 )
1194 }
1195 }
1196 #[inline(always)]
1197 pub const fn vbtbkr_98_(
1198 &self,
1199 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1200 unsafe {
1201 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1202 self._svd2pac_as_ptr().add(0x562usize),
1203 )
1204 }
1205 }
1206 #[inline(always)]
1207 pub const fn vbtbkr_99_(
1208 &self,
1209 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1210 unsafe {
1211 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1212 self._svd2pac_as_ptr().add(0x563usize),
1213 )
1214 }
1215 }
1216 #[inline(always)]
1217 pub const fn vbtbkr_100_(
1218 &self,
1219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1220 unsafe {
1221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1222 self._svd2pac_as_ptr().add(0x564usize),
1223 )
1224 }
1225 }
1226 #[inline(always)]
1227 pub const fn vbtbkr_101_(
1228 &self,
1229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1230 unsafe {
1231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1232 self._svd2pac_as_ptr().add(0x565usize),
1233 )
1234 }
1235 }
1236 #[inline(always)]
1237 pub const fn vbtbkr_102_(
1238 &self,
1239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1240 unsafe {
1241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1242 self._svd2pac_as_ptr().add(0x566usize),
1243 )
1244 }
1245 }
1246 #[inline(always)]
1247 pub const fn vbtbkr_103_(
1248 &self,
1249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1250 unsafe {
1251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1252 self._svd2pac_as_ptr().add(0x567usize),
1253 )
1254 }
1255 }
1256 #[inline(always)]
1257 pub const fn vbtbkr_104_(
1258 &self,
1259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1260 unsafe {
1261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1262 self._svd2pac_as_ptr().add(0x568usize),
1263 )
1264 }
1265 }
1266 #[inline(always)]
1267 pub const fn vbtbkr_105_(
1268 &self,
1269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1270 unsafe {
1271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1272 self._svd2pac_as_ptr().add(0x569usize),
1273 )
1274 }
1275 }
1276 #[inline(always)]
1277 pub const fn vbtbkr_106_(
1278 &self,
1279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1280 unsafe {
1281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1282 self._svd2pac_as_ptr().add(0x56ausize),
1283 )
1284 }
1285 }
1286 #[inline(always)]
1287 pub const fn vbtbkr_107_(
1288 &self,
1289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1290 unsafe {
1291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1292 self._svd2pac_as_ptr().add(0x56busize),
1293 )
1294 }
1295 }
1296 #[inline(always)]
1297 pub const fn vbtbkr_108_(
1298 &self,
1299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1300 unsafe {
1301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1302 self._svd2pac_as_ptr().add(0x56cusize),
1303 )
1304 }
1305 }
1306 #[inline(always)]
1307 pub const fn vbtbkr_109_(
1308 &self,
1309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1310 unsafe {
1311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1312 self._svd2pac_as_ptr().add(0x56dusize),
1313 )
1314 }
1315 }
1316 #[inline(always)]
1317 pub const fn vbtbkr_110_(
1318 &self,
1319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1320 unsafe {
1321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1322 self._svd2pac_as_ptr().add(0x56eusize),
1323 )
1324 }
1325 }
1326 #[inline(always)]
1327 pub const fn vbtbkr_111_(
1328 &self,
1329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1330 unsafe {
1331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1332 self._svd2pac_as_ptr().add(0x56fusize),
1333 )
1334 }
1335 }
1336 #[inline(always)]
1337 pub const fn vbtbkr_112_(
1338 &self,
1339 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1340 unsafe {
1341 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1342 self._svd2pac_as_ptr().add(0x570usize),
1343 )
1344 }
1345 }
1346 #[inline(always)]
1347 pub const fn vbtbkr_113_(
1348 &self,
1349 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1350 unsafe {
1351 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1352 self._svd2pac_as_ptr().add(0x571usize),
1353 )
1354 }
1355 }
1356 #[inline(always)]
1357 pub const fn vbtbkr_114_(
1358 &self,
1359 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1360 unsafe {
1361 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1362 self._svd2pac_as_ptr().add(0x572usize),
1363 )
1364 }
1365 }
1366 #[inline(always)]
1367 pub const fn vbtbkr_115_(
1368 &self,
1369 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1370 unsafe {
1371 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1372 self._svd2pac_as_ptr().add(0x573usize),
1373 )
1374 }
1375 }
1376 #[inline(always)]
1377 pub const fn vbtbkr_116_(
1378 &self,
1379 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1380 unsafe {
1381 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1382 self._svd2pac_as_ptr().add(0x574usize),
1383 )
1384 }
1385 }
1386 #[inline(always)]
1387 pub const fn vbtbkr_117_(
1388 &self,
1389 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1390 unsafe {
1391 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1392 self._svd2pac_as_ptr().add(0x575usize),
1393 )
1394 }
1395 }
1396 #[inline(always)]
1397 pub const fn vbtbkr_118_(
1398 &self,
1399 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1400 unsafe {
1401 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1402 self._svd2pac_as_ptr().add(0x576usize),
1403 )
1404 }
1405 }
1406 #[inline(always)]
1407 pub const fn vbtbkr_119_(
1408 &self,
1409 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1410 unsafe {
1411 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1412 self._svd2pac_as_ptr().add(0x577usize),
1413 )
1414 }
1415 }
1416 #[inline(always)]
1417 pub const fn vbtbkr_120_(
1418 &self,
1419 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1420 unsafe {
1421 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1422 self._svd2pac_as_ptr().add(0x578usize),
1423 )
1424 }
1425 }
1426 #[inline(always)]
1427 pub const fn vbtbkr_121_(
1428 &self,
1429 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1430 unsafe {
1431 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1432 self._svd2pac_as_ptr().add(0x579usize),
1433 )
1434 }
1435 }
1436 #[inline(always)]
1437 pub const fn vbtbkr_122_(
1438 &self,
1439 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1440 unsafe {
1441 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1442 self._svd2pac_as_ptr().add(0x57ausize),
1443 )
1444 }
1445 }
1446 #[inline(always)]
1447 pub const fn vbtbkr_123_(
1448 &self,
1449 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1450 unsafe {
1451 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1452 self._svd2pac_as_ptr().add(0x57busize),
1453 )
1454 }
1455 }
1456 #[inline(always)]
1457 pub const fn vbtbkr_124_(
1458 &self,
1459 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1460 unsafe {
1461 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1462 self._svd2pac_as_ptr().add(0x57cusize),
1463 )
1464 }
1465 }
1466 #[inline(always)]
1467 pub const fn vbtbkr_125_(
1468 &self,
1469 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1470 unsafe {
1471 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1472 self._svd2pac_as_ptr().add(0x57dusize),
1473 )
1474 }
1475 }
1476 #[inline(always)]
1477 pub const fn vbtbkr_126_(
1478 &self,
1479 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1480 unsafe {
1481 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1482 self._svd2pac_as_ptr().add(0x57eusize),
1483 )
1484 }
1485 }
1486 #[inline(always)]
1487 pub const fn vbtbkr_127_(
1488 &self,
1489 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1490 unsafe {
1491 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1492 self._svd2pac_as_ptr().add(0x57fusize),
1493 )
1494 }
1495 }
1496 #[inline(always)]
1497 pub const fn vbtbkr_128_(
1498 &self,
1499 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1500 unsafe {
1501 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1502 self._svd2pac_as_ptr().add(0x580usize),
1503 )
1504 }
1505 }
1506 #[inline(always)]
1507 pub const fn vbtbkr_129_(
1508 &self,
1509 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1510 unsafe {
1511 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1512 self._svd2pac_as_ptr().add(0x581usize),
1513 )
1514 }
1515 }
1516 #[inline(always)]
1517 pub const fn vbtbkr_130_(
1518 &self,
1519 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1520 unsafe {
1521 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1522 self._svd2pac_as_ptr().add(0x582usize),
1523 )
1524 }
1525 }
1526 #[inline(always)]
1527 pub const fn vbtbkr_131_(
1528 &self,
1529 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1530 unsafe {
1531 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1532 self._svd2pac_as_ptr().add(0x583usize),
1533 )
1534 }
1535 }
1536 #[inline(always)]
1537 pub const fn vbtbkr_132_(
1538 &self,
1539 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1540 unsafe {
1541 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1542 self._svd2pac_as_ptr().add(0x584usize),
1543 )
1544 }
1545 }
1546 #[inline(always)]
1547 pub const fn vbtbkr_133_(
1548 &self,
1549 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1550 unsafe {
1551 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1552 self._svd2pac_as_ptr().add(0x585usize),
1553 )
1554 }
1555 }
1556 #[inline(always)]
1557 pub const fn vbtbkr_134_(
1558 &self,
1559 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1560 unsafe {
1561 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1562 self._svd2pac_as_ptr().add(0x586usize),
1563 )
1564 }
1565 }
1566 #[inline(always)]
1567 pub const fn vbtbkr_135_(
1568 &self,
1569 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1570 unsafe {
1571 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1572 self._svd2pac_as_ptr().add(0x587usize),
1573 )
1574 }
1575 }
1576 #[inline(always)]
1577 pub const fn vbtbkr_136_(
1578 &self,
1579 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1580 unsafe {
1581 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1582 self._svd2pac_as_ptr().add(0x588usize),
1583 )
1584 }
1585 }
1586 #[inline(always)]
1587 pub const fn vbtbkr_137_(
1588 &self,
1589 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1590 unsafe {
1591 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1592 self._svd2pac_as_ptr().add(0x589usize),
1593 )
1594 }
1595 }
1596 #[inline(always)]
1597 pub const fn vbtbkr_138_(
1598 &self,
1599 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1600 unsafe {
1601 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1602 self._svd2pac_as_ptr().add(0x58ausize),
1603 )
1604 }
1605 }
1606 #[inline(always)]
1607 pub const fn vbtbkr_139_(
1608 &self,
1609 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1610 unsafe {
1611 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1612 self._svd2pac_as_ptr().add(0x58busize),
1613 )
1614 }
1615 }
1616 #[inline(always)]
1617 pub const fn vbtbkr_140_(
1618 &self,
1619 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1620 unsafe {
1621 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1622 self._svd2pac_as_ptr().add(0x58cusize),
1623 )
1624 }
1625 }
1626 #[inline(always)]
1627 pub const fn vbtbkr_141_(
1628 &self,
1629 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1630 unsafe {
1631 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1632 self._svd2pac_as_ptr().add(0x58dusize),
1633 )
1634 }
1635 }
1636 #[inline(always)]
1637 pub const fn vbtbkr_142_(
1638 &self,
1639 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1640 unsafe {
1641 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1642 self._svd2pac_as_ptr().add(0x58eusize),
1643 )
1644 }
1645 }
1646 #[inline(always)]
1647 pub const fn vbtbkr_143_(
1648 &self,
1649 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1650 unsafe {
1651 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1652 self._svd2pac_as_ptr().add(0x58fusize),
1653 )
1654 }
1655 }
1656 #[inline(always)]
1657 pub const fn vbtbkr_144_(
1658 &self,
1659 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1660 unsafe {
1661 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1662 self._svd2pac_as_ptr().add(0x590usize),
1663 )
1664 }
1665 }
1666 #[inline(always)]
1667 pub const fn vbtbkr_145_(
1668 &self,
1669 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1670 unsafe {
1671 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1672 self._svd2pac_as_ptr().add(0x591usize),
1673 )
1674 }
1675 }
1676 #[inline(always)]
1677 pub const fn vbtbkr_146_(
1678 &self,
1679 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1680 unsafe {
1681 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1682 self._svd2pac_as_ptr().add(0x592usize),
1683 )
1684 }
1685 }
1686 #[inline(always)]
1687 pub const fn vbtbkr_147_(
1688 &self,
1689 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1690 unsafe {
1691 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1692 self._svd2pac_as_ptr().add(0x593usize),
1693 )
1694 }
1695 }
1696 #[inline(always)]
1697 pub const fn vbtbkr_148_(
1698 &self,
1699 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1700 unsafe {
1701 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1702 self._svd2pac_as_ptr().add(0x594usize),
1703 )
1704 }
1705 }
1706 #[inline(always)]
1707 pub const fn vbtbkr_149_(
1708 &self,
1709 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1710 unsafe {
1711 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1712 self._svd2pac_as_ptr().add(0x595usize),
1713 )
1714 }
1715 }
1716 #[inline(always)]
1717 pub const fn vbtbkr_150_(
1718 &self,
1719 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1720 unsafe {
1721 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1722 self._svd2pac_as_ptr().add(0x596usize),
1723 )
1724 }
1725 }
1726 #[inline(always)]
1727 pub const fn vbtbkr_151_(
1728 &self,
1729 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1730 unsafe {
1731 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1732 self._svd2pac_as_ptr().add(0x597usize),
1733 )
1734 }
1735 }
1736 #[inline(always)]
1737 pub const fn vbtbkr_152_(
1738 &self,
1739 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1740 unsafe {
1741 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1742 self._svd2pac_as_ptr().add(0x598usize),
1743 )
1744 }
1745 }
1746 #[inline(always)]
1747 pub const fn vbtbkr_153_(
1748 &self,
1749 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1750 unsafe {
1751 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1752 self._svd2pac_as_ptr().add(0x599usize),
1753 )
1754 }
1755 }
1756 #[inline(always)]
1757 pub const fn vbtbkr_154_(
1758 &self,
1759 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1760 unsafe {
1761 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1762 self._svd2pac_as_ptr().add(0x59ausize),
1763 )
1764 }
1765 }
1766 #[inline(always)]
1767 pub const fn vbtbkr_155_(
1768 &self,
1769 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1770 unsafe {
1771 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1772 self._svd2pac_as_ptr().add(0x59busize),
1773 )
1774 }
1775 }
1776 #[inline(always)]
1777 pub const fn vbtbkr_156_(
1778 &self,
1779 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1780 unsafe {
1781 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1782 self._svd2pac_as_ptr().add(0x59cusize),
1783 )
1784 }
1785 }
1786 #[inline(always)]
1787 pub const fn vbtbkr_157_(
1788 &self,
1789 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1790 unsafe {
1791 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1792 self._svd2pac_as_ptr().add(0x59dusize),
1793 )
1794 }
1795 }
1796 #[inline(always)]
1797 pub const fn vbtbkr_158_(
1798 &self,
1799 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1800 unsafe {
1801 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1802 self._svd2pac_as_ptr().add(0x59eusize),
1803 )
1804 }
1805 }
1806 #[inline(always)]
1807 pub const fn vbtbkr_159_(
1808 &self,
1809 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1810 unsafe {
1811 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1812 self._svd2pac_as_ptr().add(0x59fusize),
1813 )
1814 }
1815 }
1816 #[inline(always)]
1817 pub const fn vbtbkr_160_(
1818 &self,
1819 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1820 unsafe {
1821 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1822 self._svd2pac_as_ptr().add(0x5a0usize),
1823 )
1824 }
1825 }
1826 #[inline(always)]
1827 pub const fn vbtbkr_161_(
1828 &self,
1829 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1830 unsafe {
1831 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1832 self._svd2pac_as_ptr().add(0x5a1usize),
1833 )
1834 }
1835 }
1836 #[inline(always)]
1837 pub const fn vbtbkr_162_(
1838 &self,
1839 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1840 unsafe {
1841 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1842 self._svd2pac_as_ptr().add(0x5a2usize),
1843 )
1844 }
1845 }
1846 #[inline(always)]
1847 pub const fn vbtbkr_163_(
1848 &self,
1849 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1850 unsafe {
1851 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1852 self._svd2pac_as_ptr().add(0x5a3usize),
1853 )
1854 }
1855 }
1856 #[inline(always)]
1857 pub const fn vbtbkr_164_(
1858 &self,
1859 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1860 unsafe {
1861 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1862 self._svd2pac_as_ptr().add(0x5a4usize),
1863 )
1864 }
1865 }
1866 #[inline(always)]
1867 pub const fn vbtbkr_165_(
1868 &self,
1869 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1870 unsafe {
1871 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1872 self._svd2pac_as_ptr().add(0x5a5usize),
1873 )
1874 }
1875 }
1876 #[inline(always)]
1877 pub const fn vbtbkr_166_(
1878 &self,
1879 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1880 unsafe {
1881 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1882 self._svd2pac_as_ptr().add(0x5a6usize),
1883 )
1884 }
1885 }
1886 #[inline(always)]
1887 pub const fn vbtbkr_167_(
1888 &self,
1889 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1890 unsafe {
1891 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1892 self._svd2pac_as_ptr().add(0x5a7usize),
1893 )
1894 }
1895 }
1896 #[inline(always)]
1897 pub const fn vbtbkr_168_(
1898 &self,
1899 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1900 unsafe {
1901 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1902 self._svd2pac_as_ptr().add(0x5a8usize),
1903 )
1904 }
1905 }
1906 #[inline(always)]
1907 pub const fn vbtbkr_169_(
1908 &self,
1909 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1910 unsafe {
1911 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1912 self._svd2pac_as_ptr().add(0x5a9usize),
1913 )
1914 }
1915 }
1916 #[inline(always)]
1917 pub const fn vbtbkr_170_(
1918 &self,
1919 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1920 unsafe {
1921 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1922 self._svd2pac_as_ptr().add(0x5aausize),
1923 )
1924 }
1925 }
1926 #[inline(always)]
1927 pub const fn vbtbkr_171_(
1928 &self,
1929 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1930 unsafe {
1931 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1932 self._svd2pac_as_ptr().add(0x5abusize),
1933 )
1934 }
1935 }
1936 #[inline(always)]
1937 pub const fn vbtbkr_172_(
1938 &self,
1939 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1940 unsafe {
1941 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1942 self._svd2pac_as_ptr().add(0x5acusize),
1943 )
1944 }
1945 }
1946 #[inline(always)]
1947 pub const fn vbtbkr_173_(
1948 &self,
1949 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1950 unsafe {
1951 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1952 self._svd2pac_as_ptr().add(0x5adusize),
1953 )
1954 }
1955 }
1956 #[inline(always)]
1957 pub const fn vbtbkr_174_(
1958 &self,
1959 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1960 unsafe {
1961 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1962 self._svd2pac_as_ptr().add(0x5aeusize),
1963 )
1964 }
1965 }
1966 #[inline(always)]
1967 pub const fn vbtbkr_175_(
1968 &self,
1969 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1970 unsafe {
1971 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1972 self._svd2pac_as_ptr().add(0x5afusize),
1973 )
1974 }
1975 }
1976 #[inline(always)]
1977 pub const fn vbtbkr_176_(
1978 &self,
1979 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1980 unsafe {
1981 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1982 self._svd2pac_as_ptr().add(0x5b0usize),
1983 )
1984 }
1985 }
1986 #[inline(always)]
1987 pub const fn vbtbkr_177_(
1988 &self,
1989 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
1990 unsafe {
1991 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
1992 self._svd2pac_as_ptr().add(0x5b1usize),
1993 )
1994 }
1995 }
1996 #[inline(always)]
1997 pub const fn vbtbkr_178_(
1998 &self,
1999 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2000 unsafe {
2001 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2002 self._svd2pac_as_ptr().add(0x5b2usize),
2003 )
2004 }
2005 }
2006 #[inline(always)]
2007 pub const fn vbtbkr_179_(
2008 &self,
2009 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2010 unsafe {
2011 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2012 self._svd2pac_as_ptr().add(0x5b3usize),
2013 )
2014 }
2015 }
2016 #[inline(always)]
2017 pub const fn vbtbkr_180_(
2018 &self,
2019 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2020 unsafe {
2021 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2022 self._svd2pac_as_ptr().add(0x5b4usize),
2023 )
2024 }
2025 }
2026 #[inline(always)]
2027 pub const fn vbtbkr_181_(
2028 &self,
2029 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2030 unsafe {
2031 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2032 self._svd2pac_as_ptr().add(0x5b5usize),
2033 )
2034 }
2035 }
2036 #[inline(always)]
2037 pub const fn vbtbkr_182_(
2038 &self,
2039 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2040 unsafe {
2041 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2042 self._svd2pac_as_ptr().add(0x5b6usize),
2043 )
2044 }
2045 }
2046 #[inline(always)]
2047 pub const fn vbtbkr_183_(
2048 &self,
2049 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2050 unsafe {
2051 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2052 self._svd2pac_as_ptr().add(0x5b7usize),
2053 )
2054 }
2055 }
2056 #[inline(always)]
2057 pub const fn vbtbkr_184_(
2058 &self,
2059 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2060 unsafe {
2061 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2062 self._svd2pac_as_ptr().add(0x5b8usize),
2063 )
2064 }
2065 }
2066 #[inline(always)]
2067 pub const fn vbtbkr_185_(
2068 &self,
2069 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2070 unsafe {
2071 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2072 self._svd2pac_as_ptr().add(0x5b9usize),
2073 )
2074 }
2075 }
2076 #[inline(always)]
2077 pub const fn vbtbkr_186_(
2078 &self,
2079 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2080 unsafe {
2081 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2082 self._svd2pac_as_ptr().add(0x5bausize),
2083 )
2084 }
2085 }
2086 #[inline(always)]
2087 pub const fn vbtbkr_187_(
2088 &self,
2089 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2090 unsafe {
2091 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2092 self._svd2pac_as_ptr().add(0x5bbusize),
2093 )
2094 }
2095 }
2096 #[inline(always)]
2097 pub const fn vbtbkr_188_(
2098 &self,
2099 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2100 unsafe {
2101 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2102 self._svd2pac_as_ptr().add(0x5bcusize),
2103 )
2104 }
2105 }
2106 #[inline(always)]
2107 pub const fn vbtbkr_189_(
2108 &self,
2109 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2110 unsafe {
2111 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2112 self._svd2pac_as_ptr().add(0x5bdusize),
2113 )
2114 }
2115 }
2116 #[inline(always)]
2117 pub const fn vbtbkr_190_(
2118 &self,
2119 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2120 unsafe {
2121 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2122 self._svd2pac_as_ptr().add(0x5beusize),
2123 )
2124 }
2125 }
2126 #[inline(always)]
2127 pub const fn vbtbkr_191_(
2128 &self,
2129 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2130 unsafe {
2131 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2132 self._svd2pac_as_ptr().add(0x5bfusize),
2133 )
2134 }
2135 }
2136 #[inline(always)]
2137 pub const fn vbtbkr_192_(
2138 &self,
2139 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2140 unsafe {
2141 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2142 self._svd2pac_as_ptr().add(0x5c0usize),
2143 )
2144 }
2145 }
2146 #[inline(always)]
2147 pub const fn vbtbkr_193_(
2148 &self,
2149 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2150 unsafe {
2151 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2152 self._svd2pac_as_ptr().add(0x5c1usize),
2153 )
2154 }
2155 }
2156 #[inline(always)]
2157 pub const fn vbtbkr_194_(
2158 &self,
2159 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2160 unsafe {
2161 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2162 self._svd2pac_as_ptr().add(0x5c2usize),
2163 )
2164 }
2165 }
2166 #[inline(always)]
2167 pub const fn vbtbkr_195_(
2168 &self,
2169 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2170 unsafe {
2171 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2172 self._svd2pac_as_ptr().add(0x5c3usize),
2173 )
2174 }
2175 }
2176 #[inline(always)]
2177 pub const fn vbtbkr_196_(
2178 &self,
2179 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2180 unsafe {
2181 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2182 self._svd2pac_as_ptr().add(0x5c4usize),
2183 )
2184 }
2185 }
2186 #[inline(always)]
2187 pub const fn vbtbkr_197_(
2188 &self,
2189 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2190 unsafe {
2191 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2192 self._svd2pac_as_ptr().add(0x5c5usize),
2193 )
2194 }
2195 }
2196 #[inline(always)]
2197 pub const fn vbtbkr_198_(
2198 &self,
2199 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2200 unsafe {
2201 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2202 self._svd2pac_as_ptr().add(0x5c6usize),
2203 )
2204 }
2205 }
2206 #[inline(always)]
2207 pub const fn vbtbkr_199_(
2208 &self,
2209 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2210 unsafe {
2211 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2212 self._svd2pac_as_ptr().add(0x5c7usize),
2213 )
2214 }
2215 }
2216 #[inline(always)]
2217 pub const fn vbtbkr_200_(
2218 &self,
2219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2220 unsafe {
2221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2222 self._svd2pac_as_ptr().add(0x5c8usize),
2223 )
2224 }
2225 }
2226 #[inline(always)]
2227 pub const fn vbtbkr_201_(
2228 &self,
2229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2230 unsafe {
2231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2232 self._svd2pac_as_ptr().add(0x5c9usize),
2233 )
2234 }
2235 }
2236 #[inline(always)]
2237 pub const fn vbtbkr_202_(
2238 &self,
2239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2240 unsafe {
2241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2242 self._svd2pac_as_ptr().add(0x5causize),
2243 )
2244 }
2245 }
2246 #[inline(always)]
2247 pub const fn vbtbkr_203_(
2248 &self,
2249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2250 unsafe {
2251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2252 self._svd2pac_as_ptr().add(0x5cbusize),
2253 )
2254 }
2255 }
2256 #[inline(always)]
2257 pub const fn vbtbkr_204_(
2258 &self,
2259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2260 unsafe {
2261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2262 self._svd2pac_as_ptr().add(0x5ccusize),
2263 )
2264 }
2265 }
2266 #[inline(always)]
2267 pub const fn vbtbkr_205_(
2268 &self,
2269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2270 unsafe {
2271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2272 self._svd2pac_as_ptr().add(0x5cdusize),
2273 )
2274 }
2275 }
2276 #[inline(always)]
2277 pub const fn vbtbkr_206_(
2278 &self,
2279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2280 unsafe {
2281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2282 self._svd2pac_as_ptr().add(0x5ceusize),
2283 )
2284 }
2285 }
2286 #[inline(always)]
2287 pub const fn vbtbkr_207_(
2288 &self,
2289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2290 unsafe {
2291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2292 self._svd2pac_as_ptr().add(0x5cfusize),
2293 )
2294 }
2295 }
2296 #[inline(always)]
2297 pub const fn vbtbkr_208_(
2298 &self,
2299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2300 unsafe {
2301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2302 self._svd2pac_as_ptr().add(0x5d0usize),
2303 )
2304 }
2305 }
2306 #[inline(always)]
2307 pub const fn vbtbkr_209_(
2308 &self,
2309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2310 unsafe {
2311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2312 self._svd2pac_as_ptr().add(0x5d1usize),
2313 )
2314 }
2315 }
2316 #[inline(always)]
2317 pub const fn vbtbkr_210_(
2318 &self,
2319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2320 unsafe {
2321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2322 self._svd2pac_as_ptr().add(0x5d2usize),
2323 )
2324 }
2325 }
2326 #[inline(always)]
2327 pub const fn vbtbkr_211_(
2328 &self,
2329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2330 unsafe {
2331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2332 self._svd2pac_as_ptr().add(0x5d3usize),
2333 )
2334 }
2335 }
2336 #[inline(always)]
2337 pub const fn vbtbkr_212_(
2338 &self,
2339 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2340 unsafe {
2341 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2342 self._svd2pac_as_ptr().add(0x5d4usize),
2343 )
2344 }
2345 }
2346 #[inline(always)]
2347 pub const fn vbtbkr_213_(
2348 &self,
2349 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2350 unsafe {
2351 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2352 self._svd2pac_as_ptr().add(0x5d5usize),
2353 )
2354 }
2355 }
2356 #[inline(always)]
2357 pub const fn vbtbkr_214_(
2358 &self,
2359 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2360 unsafe {
2361 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2362 self._svd2pac_as_ptr().add(0x5d6usize),
2363 )
2364 }
2365 }
2366 #[inline(always)]
2367 pub const fn vbtbkr_215_(
2368 &self,
2369 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2370 unsafe {
2371 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2372 self._svd2pac_as_ptr().add(0x5d7usize),
2373 )
2374 }
2375 }
2376 #[inline(always)]
2377 pub const fn vbtbkr_216_(
2378 &self,
2379 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2380 unsafe {
2381 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2382 self._svd2pac_as_ptr().add(0x5d8usize),
2383 )
2384 }
2385 }
2386 #[inline(always)]
2387 pub const fn vbtbkr_217_(
2388 &self,
2389 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2390 unsafe {
2391 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2392 self._svd2pac_as_ptr().add(0x5d9usize),
2393 )
2394 }
2395 }
2396 #[inline(always)]
2397 pub const fn vbtbkr_218_(
2398 &self,
2399 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2400 unsafe {
2401 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2402 self._svd2pac_as_ptr().add(0x5dausize),
2403 )
2404 }
2405 }
2406 #[inline(always)]
2407 pub const fn vbtbkr_219_(
2408 &self,
2409 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2410 unsafe {
2411 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2412 self._svd2pac_as_ptr().add(0x5dbusize),
2413 )
2414 }
2415 }
2416 #[inline(always)]
2417 pub const fn vbtbkr_220_(
2418 &self,
2419 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2420 unsafe {
2421 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2422 self._svd2pac_as_ptr().add(0x5dcusize),
2423 )
2424 }
2425 }
2426 #[inline(always)]
2427 pub const fn vbtbkr_221_(
2428 &self,
2429 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2430 unsafe {
2431 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2432 self._svd2pac_as_ptr().add(0x5ddusize),
2433 )
2434 }
2435 }
2436 #[inline(always)]
2437 pub const fn vbtbkr_222_(
2438 &self,
2439 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2440 unsafe {
2441 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2442 self._svd2pac_as_ptr().add(0x5deusize),
2443 )
2444 }
2445 }
2446 #[inline(always)]
2447 pub const fn vbtbkr_223_(
2448 &self,
2449 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2450 unsafe {
2451 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2452 self._svd2pac_as_ptr().add(0x5dfusize),
2453 )
2454 }
2455 }
2456 #[inline(always)]
2457 pub const fn vbtbkr_224_(
2458 &self,
2459 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2460 unsafe {
2461 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2462 self._svd2pac_as_ptr().add(0x5e0usize),
2463 )
2464 }
2465 }
2466 #[inline(always)]
2467 pub const fn vbtbkr_225_(
2468 &self,
2469 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2470 unsafe {
2471 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2472 self._svd2pac_as_ptr().add(0x5e1usize),
2473 )
2474 }
2475 }
2476 #[inline(always)]
2477 pub const fn vbtbkr_226_(
2478 &self,
2479 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2480 unsafe {
2481 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2482 self._svd2pac_as_ptr().add(0x5e2usize),
2483 )
2484 }
2485 }
2486 #[inline(always)]
2487 pub const fn vbtbkr_227_(
2488 &self,
2489 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2490 unsafe {
2491 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2492 self._svd2pac_as_ptr().add(0x5e3usize),
2493 )
2494 }
2495 }
2496 #[inline(always)]
2497 pub const fn vbtbkr_228_(
2498 &self,
2499 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2500 unsafe {
2501 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2502 self._svd2pac_as_ptr().add(0x5e4usize),
2503 )
2504 }
2505 }
2506 #[inline(always)]
2507 pub const fn vbtbkr_229_(
2508 &self,
2509 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2510 unsafe {
2511 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2512 self._svd2pac_as_ptr().add(0x5e5usize),
2513 )
2514 }
2515 }
2516 #[inline(always)]
2517 pub const fn vbtbkr_230_(
2518 &self,
2519 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2520 unsafe {
2521 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2522 self._svd2pac_as_ptr().add(0x5e6usize),
2523 )
2524 }
2525 }
2526 #[inline(always)]
2527 pub const fn vbtbkr_231_(
2528 &self,
2529 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2530 unsafe {
2531 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2532 self._svd2pac_as_ptr().add(0x5e7usize),
2533 )
2534 }
2535 }
2536 #[inline(always)]
2537 pub const fn vbtbkr_232_(
2538 &self,
2539 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2540 unsafe {
2541 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2542 self._svd2pac_as_ptr().add(0x5e8usize),
2543 )
2544 }
2545 }
2546 #[inline(always)]
2547 pub const fn vbtbkr_233_(
2548 &self,
2549 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2550 unsafe {
2551 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2552 self._svd2pac_as_ptr().add(0x5e9usize),
2553 )
2554 }
2555 }
2556 #[inline(always)]
2557 pub const fn vbtbkr_234_(
2558 &self,
2559 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2560 unsafe {
2561 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2562 self._svd2pac_as_ptr().add(0x5eausize),
2563 )
2564 }
2565 }
2566 #[inline(always)]
2567 pub const fn vbtbkr_235_(
2568 &self,
2569 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2570 unsafe {
2571 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2572 self._svd2pac_as_ptr().add(0x5ebusize),
2573 )
2574 }
2575 }
2576 #[inline(always)]
2577 pub const fn vbtbkr_236_(
2578 &self,
2579 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2580 unsafe {
2581 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2582 self._svd2pac_as_ptr().add(0x5ecusize),
2583 )
2584 }
2585 }
2586 #[inline(always)]
2587 pub const fn vbtbkr_237_(
2588 &self,
2589 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2590 unsafe {
2591 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2592 self._svd2pac_as_ptr().add(0x5edusize),
2593 )
2594 }
2595 }
2596 #[inline(always)]
2597 pub const fn vbtbkr_238_(
2598 &self,
2599 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2600 unsafe {
2601 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2602 self._svd2pac_as_ptr().add(0x5eeusize),
2603 )
2604 }
2605 }
2606 #[inline(always)]
2607 pub const fn vbtbkr_239_(
2608 &self,
2609 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2610 unsafe {
2611 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2612 self._svd2pac_as_ptr().add(0x5efusize),
2613 )
2614 }
2615 }
2616 #[inline(always)]
2617 pub const fn vbtbkr_240_(
2618 &self,
2619 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2620 unsafe {
2621 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2622 self._svd2pac_as_ptr().add(0x5f0usize),
2623 )
2624 }
2625 }
2626 #[inline(always)]
2627 pub const fn vbtbkr_241_(
2628 &self,
2629 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2630 unsafe {
2631 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2632 self._svd2pac_as_ptr().add(0x5f1usize),
2633 )
2634 }
2635 }
2636 #[inline(always)]
2637 pub const fn vbtbkr_242_(
2638 &self,
2639 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2640 unsafe {
2641 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2642 self._svd2pac_as_ptr().add(0x5f2usize),
2643 )
2644 }
2645 }
2646 #[inline(always)]
2647 pub const fn vbtbkr_243_(
2648 &self,
2649 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2650 unsafe {
2651 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2652 self._svd2pac_as_ptr().add(0x5f3usize),
2653 )
2654 }
2655 }
2656 #[inline(always)]
2657 pub const fn vbtbkr_244_(
2658 &self,
2659 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2660 unsafe {
2661 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2662 self._svd2pac_as_ptr().add(0x5f4usize),
2663 )
2664 }
2665 }
2666 #[inline(always)]
2667 pub const fn vbtbkr_245_(
2668 &self,
2669 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2670 unsafe {
2671 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2672 self._svd2pac_as_ptr().add(0x5f5usize),
2673 )
2674 }
2675 }
2676 #[inline(always)]
2677 pub const fn vbtbkr_246_(
2678 &self,
2679 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2680 unsafe {
2681 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2682 self._svd2pac_as_ptr().add(0x5f6usize),
2683 )
2684 }
2685 }
2686 #[inline(always)]
2687 pub const fn vbtbkr_247_(
2688 &self,
2689 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2690 unsafe {
2691 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2692 self._svd2pac_as_ptr().add(0x5f7usize),
2693 )
2694 }
2695 }
2696 #[inline(always)]
2697 pub const fn vbtbkr_248_(
2698 &self,
2699 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2700 unsafe {
2701 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2702 self._svd2pac_as_ptr().add(0x5f8usize),
2703 )
2704 }
2705 }
2706 #[inline(always)]
2707 pub const fn vbtbkr_249_(
2708 &self,
2709 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2710 unsafe {
2711 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2712 self._svd2pac_as_ptr().add(0x5f9usize),
2713 )
2714 }
2715 }
2716 #[inline(always)]
2717 pub const fn vbtbkr_250_(
2718 &self,
2719 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2720 unsafe {
2721 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2722 self._svd2pac_as_ptr().add(0x5fausize),
2723 )
2724 }
2725 }
2726 #[inline(always)]
2727 pub const fn vbtbkr_251_(
2728 &self,
2729 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2730 unsafe {
2731 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2732 self._svd2pac_as_ptr().add(0x5fbusize),
2733 )
2734 }
2735 }
2736 #[inline(always)]
2737 pub const fn vbtbkr_252_(
2738 &self,
2739 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2740 unsafe {
2741 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2742 self._svd2pac_as_ptr().add(0x5fcusize),
2743 )
2744 }
2745 }
2746 #[inline(always)]
2747 pub const fn vbtbkr_253_(
2748 &self,
2749 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2750 unsafe {
2751 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2752 self._svd2pac_as_ptr().add(0x5fdusize),
2753 )
2754 }
2755 }
2756 #[inline(always)]
2757 pub const fn vbtbkr_254_(
2758 &self,
2759 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2760 unsafe {
2761 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2762 self._svd2pac_as_ptr().add(0x5feusize),
2763 )
2764 }
2765 }
2766 #[inline(always)]
2767 pub const fn vbtbkr_255_(
2768 &self,
2769 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2770 unsafe {
2771 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2772 self._svd2pac_as_ptr().add(0x5ffusize),
2773 )
2774 }
2775 }
2776 #[inline(always)]
2777 pub const fn vbtbkr_256_(
2778 &self,
2779 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2780 unsafe {
2781 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2782 self._svd2pac_as_ptr().add(0x600usize),
2783 )
2784 }
2785 }
2786 #[inline(always)]
2787 pub const fn vbtbkr_257_(
2788 &self,
2789 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2790 unsafe {
2791 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2792 self._svd2pac_as_ptr().add(0x601usize),
2793 )
2794 }
2795 }
2796 #[inline(always)]
2797 pub const fn vbtbkr_258_(
2798 &self,
2799 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2800 unsafe {
2801 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2802 self._svd2pac_as_ptr().add(0x602usize),
2803 )
2804 }
2805 }
2806 #[inline(always)]
2807 pub const fn vbtbkr_259_(
2808 &self,
2809 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2810 unsafe {
2811 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2812 self._svd2pac_as_ptr().add(0x603usize),
2813 )
2814 }
2815 }
2816 #[inline(always)]
2817 pub const fn vbtbkr_260_(
2818 &self,
2819 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2820 unsafe {
2821 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2822 self._svd2pac_as_ptr().add(0x604usize),
2823 )
2824 }
2825 }
2826 #[inline(always)]
2827 pub const fn vbtbkr_261_(
2828 &self,
2829 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2830 unsafe {
2831 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2832 self._svd2pac_as_ptr().add(0x605usize),
2833 )
2834 }
2835 }
2836 #[inline(always)]
2837 pub const fn vbtbkr_262_(
2838 &self,
2839 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2840 unsafe {
2841 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2842 self._svd2pac_as_ptr().add(0x606usize),
2843 )
2844 }
2845 }
2846 #[inline(always)]
2847 pub const fn vbtbkr_263_(
2848 &self,
2849 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2850 unsafe {
2851 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2852 self._svd2pac_as_ptr().add(0x607usize),
2853 )
2854 }
2855 }
2856 #[inline(always)]
2857 pub const fn vbtbkr_264_(
2858 &self,
2859 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2860 unsafe {
2861 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2862 self._svd2pac_as_ptr().add(0x608usize),
2863 )
2864 }
2865 }
2866 #[inline(always)]
2867 pub const fn vbtbkr_265_(
2868 &self,
2869 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2870 unsafe {
2871 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2872 self._svd2pac_as_ptr().add(0x609usize),
2873 )
2874 }
2875 }
2876 #[inline(always)]
2877 pub const fn vbtbkr_266_(
2878 &self,
2879 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2880 unsafe {
2881 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2882 self._svd2pac_as_ptr().add(0x60ausize),
2883 )
2884 }
2885 }
2886 #[inline(always)]
2887 pub const fn vbtbkr_267_(
2888 &self,
2889 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2890 unsafe {
2891 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2892 self._svd2pac_as_ptr().add(0x60busize),
2893 )
2894 }
2895 }
2896 #[inline(always)]
2897 pub const fn vbtbkr_268_(
2898 &self,
2899 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2900 unsafe {
2901 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2902 self._svd2pac_as_ptr().add(0x60cusize),
2903 )
2904 }
2905 }
2906 #[inline(always)]
2907 pub const fn vbtbkr_269_(
2908 &self,
2909 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2910 unsafe {
2911 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2912 self._svd2pac_as_ptr().add(0x60dusize),
2913 )
2914 }
2915 }
2916 #[inline(always)]
2917 pub const fn vbtbkr_270_(
2918 &self,
2919 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2920 unsafe {
2921 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2922 self._svd2pac_as_ptr().add(0x60eusize),
2923 )
2924 }
2925 }
2926 #[inline(always)]
2927 pub const fn vbtbkr_271_(
2928 &self,
2929 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2930 unsafe {
2931 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2932 self._svd2pac_as_ptr().add(0x60fusize),
2933 )
2934 }
2935 }
2936 #[inline(always)]
2937 pub const fn vbtbkr_272_(
2938 &self,
2939 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2940 unsafe {
2941 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2942 self._svd2pac_as_ptr().add(0x610usize),
2943 )
2944 }
2945 }
2946 #[inline(always)]
2947 pub const fn vbtbkr_273_(
2948 &self,
2949 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2950 unsafe {
2951 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2952 self._svd2pac_as_ptr().add(0x611usize),
2953 )
2954 }
2955 }
2956 #[inline(always)]
2957 pub const fn vbtbkr_274_(
2958 &self,
2959 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2960 unsafe {
2961 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2962 self._svd2pac_as_ptr().add(0x612usize),
2963 )
2964 }
2965 }
2966 #[inline(always)]
2967 pub const fn vbtbkr_275_(
2968 &self,
2969 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2970 unsafe {
2971 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2972 self._svd2pac_as_ptr().add(0x613usize),
2973 )
2974 }
2975 }
2976 #[inline(always)]
2977 pub const fn vbtbkr_276_(
2978 &self,
2979 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2980 unsafe {
2981 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2982 self._svd2pac_as_ptr().add(0x614usize),
2983 )
2984 }
2985 }
2986 #[inline(always)]
2987 pub const fn vbtbkr_277_(
2988 &self,
2989 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
2990 unsafe {
2991 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
2992 self._svd2pac_as_ptr().add(0x615usize),
2993 )
2994 }
2995 }
2996 #[inline(always)]
2997 pub const fn vbtbkr_278_(
2998 &self,
2999 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3000 unsafe {
3001 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3002 self._svd2pac_as_ptr().add(0x616usize),
3003 )
3004 }
3005 }
3006 #[inline(always)]
3007 pub const fn vbtbkr_279_(
3008 &self,
3009 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3010 unsafe {
3011 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3012 self._svd2pac_as_ptr().add(0x617usize),
3013 )
3014 }
3015 }
3016 #[inline(always)]
3017 pub const fn vbtbkr_280_(
3018 &self,
3019 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3020 unsafe {
3021 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3022 self._svd2pac_as_ptr().add(0x618usize),
3023 )
3024 }
3025 }
3026 #[inline(always)]
3027 pub const fn vbtbkr_281_(
3028 &self,
3029 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3030 unsafe {
3031 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3032 self._svd2pac_as_ptr().add(0x619usize),
3033 )
3034 }
3035 }
3036 #[inline(always)]
3037 pub const fn vbtbkr_282_(
3038 &self,
3039 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3040 unsafe {
3041 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3042 self._svd2pac_as_ptr().add(0x61ausize),
3043 )
3044 }
3045 }
3046 #[inline(always)]
3047 pub const fn vbtbkr_283_(
3048 &self,
3049 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3050 unsafe {
3051 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3052 self._svd2pac_as_ptr().add(0x61busize),
3053 )
3054 }
3055 }
3056 #[inline(always)]
3057 pub const fn vbtbkr_284_(
3058 &self,
3059 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3060 unsafe {
3061 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3062 self._svd2pac_as_ptr().add(0x61cusize),
3063 )
3064 }
3065 }
3066 #[inline(always)]
3067 pub const fn vbtbkr_285_(
3068 &self,
3069 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3070 unsafe {
3071 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3072 self._svd2pac_as_ptr().add(0x61dusize),
3073 )
3074 }
3075 }
3076 #[inline(always)]
3077 pub const fn vbtbkr_286_(
3078 &self,
3079 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3080 unsafe {
3081 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3082 self._svd2pac_as_ptr().add(0x61eusize),
3083 )
3084 }
3085 }
3086 #[inline(always)]
3087 pub const fn vbtbkr_287_(
3088 &self,
3089 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3090 unsafe {
3091 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3092 self._svd2pac_as_ptr().add(0x61fusize),
3093 )
3094 }
3095 }
3096 #[inline(always)]
3097 pub const fn vbtbkr_288_(
3098 &self,
3099 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3100 unsafe {
3101 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3102 self._svd2pac_as_ptr().add(0x620usize),
3103 )
3104 }
3105 }
3106 #[inline(always)]
3107 pub const fn vbtbkr_289_(
3108 &self,
3109 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3110 unsafe {
3111 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3112 self._svd2pac_as_ptr().add(0x621usize),
3113 )
3114 }
3115 }
3116 #[inline(always)]
3117 pub const fn vbtbkr_290_(
3118 &self,
3119 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3120 unsafe {
3121 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3122 self._svd2pac_as_ptr().add(0x622usize),
3123 )
3124 }
3125 }
3126 #[inline(always)]
3127 pub const fn vbtbkr_291_(
3128 &self,
3129 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3130 unsafe {
3131 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3132 self._svd2pac_as_ptr().add(0x623usize),
3133 )
3134 }
3135 }
3136 #[inline(always)]
3137 pub const fn vbtbkr_292_(
3138 &self,
3139 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3140 unsafe {
3141 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3142 self._svd2pac_as_ptr().add(0x624usize),
3143 )
3144 }
3145 }
3146 #[inline(always)]
3147 pub const fn vbtbkr_293_(
3148 &self,
3149 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3150 unsafe {
3151 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3152 self._svd2pac_as_ptr().add(0x625usize),
3153 )
3154 }
3155 }
3156 #[inline(always)]
3157 pub const fn vbtbkr_294_(
3158 &self,
3159 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3160 unsafe {
3161 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3162 self._svd2pac_as_ptr().add(0x626usize),
3163 )
3164 }
3165 }
3166 #[inline(always)]
3167 pub const fn vbtbkr_295_(
3168 &self,
3169 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3170 unsafe {
3171 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3172 self._svd2pac_as_ptr().add(0x627usize),
3173 )
3174 }
3175 }
3176 #[inline(always)]
3177 pub const fn vbtbkr_296_(
3178 &self,
3179 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3180 unsafe {
3181 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3182 self._svd2pac_as_ptr().add(0x628usize),
3183 )
3184 }
3185 }
3186 #[inline(always)]
3187 pub const fn vbtbkr_297_(
3188 &self,
3189 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3190 unsafe {
3191 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3192 self._svd2pac_as_ptr().add(0x629usize),
3193 )
3194 }
3195 }
3196 #[inline(always)]
3197 pub const fn vbtbkr_298_(
3198 &self,
3199 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3200 unsafe {
3201 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3202 self._svd2pac_as_ptr().add(0x62ausize),
3203 )
3204 }
3205 }
3206 #[inline(always)]
3207 pub const fn vbtbkr_299_(
3208 &self,
3209 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3210 unsafe {
3211 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3212 self._svd2pac_as_ptr().add(0x62busize),
3213 )
3214 }
3215 }
3216 #[inline(always)]
3217 pub const fn vbtbkr_300_(
3218 &self,
3219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3220 unsafe {
3221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3222 self._svd2pac_as_ptr().add(0x62cusize),
3223 )
3224 }
3225 }
3226 #[inline(always)]
3227 pub const fn vbtbkr_301_(
3228 &self,
3229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3230 unsafe {
3231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3232 self._svd2pac_as_ptr().add(0x62dusize),
3233 )
3234 }
3235 }
3236 #[inline(always)]
3237 pub const fn vbtbkr_302_(
3238 &self,
3239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3240 unsafe {
3241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3242 self._svd2pac_as_ptr().add(0x62eusize),
3243 )
3244 }
3245 }
3246 #[inline(always)]
3247 pub const fn vbtbkr_303_(
3248 &self,
3249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3250 unsafe {
3251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3252 self._svd2pac_as_ptr().add(0x62fusize),
3253 )
3254 }
3255 }
3256 #[inline(always)]
3257 pub const fn vbtbkr_304_(
3258 &self,
3259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3260 unsafe {
3261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3262 self._svd2pac_as_ptr().add(0x630usize),
3263 )
3264 }
3265 }
3266 #[inline(always)]
3267 pub const fn vbtbkr_305_(
3268 &self,
3269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3270 unsafe {
3271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3272 self._svd2pac_as_ptr().add(0x631usize),
3273 )
3274 }
3275 }
3276 #[inline(always)]
3277 pub const fn vbtbkr_306_(
3278 &self,
3279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3280 unsafe {
3281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3282 self._svd2pac_as_ptr().add(0x632usize),
3283 )
3284 }
3285 }
3286 #[inline(always)]
3287 pub const fn vbtbkr_307_(
3288 &self,
3289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3290 unsafe {
3291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3292 self._svd2pac_as_ptr().add(0x633usize),
3293 )
3294 }
3295 }
3296 #[inline(always)]
3297 pub const fn vbtbkr_308_(
3298 &self,
3299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3300 unsafe {
3301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3302 self._svd2pac_as_ptr().add(0x634usize),
3303 )
3304 }
3305 }
3306 #[inline(always)]
3307 pub const fn vbtbkr_309_(
3308 &self,
3309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3310 unsafe {
3311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3312 self._svd2pac_as_ptr().add(0x635usize),
3313 )
3314 }
3315 }
3316 #[inline(always)]
3317 pub const fn vbtbkr_310_(
3318 &self,
3319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3320 unsafe {
3321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3322 self._svd2pac_as_ptr().add(0x636usize),
3323 )
3324 }
3325 }
3326 #[inline(always)]
3327 pub const fn vbtbkr_311_(
3328 &self,
3329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3330 unsafe {
3331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3332 self._svd2pac_as_ptr().add(0x637usize),
3333 )
3334 }
3335 }
3336 #[inline(always)]
3337 pub const fn vbtbkr_312_(
3338 &self,
3339 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3340 unsafe {
3341 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3342 self._svd2pac_as_ptr().add(0x638usize),
3343 )
3344 }
3345 }
3346 #[inline(always)]
3347 pub const fn vbtbkr_313_(
3348 &self,
3349 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3350 unsafe {
3351 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3352 self._svd2pac_as_ptr().add(0x639usize),
3353 )
3354 }
3355 }
3356 #[inline(always)]
3357 pub const fn vbtbkr_314_(
3358 &self,
3359 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3360 unsafe {
3361 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3362 self._svd2pac_as_ptr().add(0x63ausize),
3363 )
3364 }
3365 }
3366 #[inline(always)]
3367 pub const fn vbtbkr_315_(
3368 &self,
3369 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3370 unsafe {
3371 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3372 self._svd2pac_as_ptr().add(0x63busize),
3373 )
3374 }
3375 }
3376 #[inline(always)]
3377 pub const fn vbtbkr_316_(
3378 &self,
3379 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3380 unsafe {
3381 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3382 self._svd2pac_as_ptr().add(0x63cusize),
3383 )
3384 }
3385 }
3386 #[inline(always)]
3387 pub const fn vbtbkr_317_(
3388 &self,
3389 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3390 unsafe {
3391 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3392 self._svd2pac_as_ptr().add(0x63dusize),
3393 )
3394 }
3395 }
3396 #[inline(always)]
3397 pub const fn vbtbkr_318_(
3398 &self,
3399 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3400 unsafe {
3401 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3402 self._svd2pac_as_ptr().add(0x63eusize),
3403 )
3404 }
3405 }
3406 #[inline(always)]
3407 pub const fn vbtbkr_319_(
3408 &self,
3409 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3410 unsafe {
3411 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3412 self._svd2pac_as_ptr().add(0x63fusize),
3413 )
3414 }
3415 }
3416 #[inline(always)]
3417 pub const fn vbtbkr_320_(
3418 &self,
3419 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3420 unsafe {
3421 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3422 self._svd2pac_as_ptr().add(0x640usize),
3423 )
3424 }
3425 }
3426 #[inline(always)]
3427 pub const fn vbtbkr_321_(
3428 &self,
3429 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3430 unsafe {
3431 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3432 self._svd2pac_as_ptr().add(0x641usize),
3433 )
3434 }
3435 }
3436 #[inline(always)]
3437 pub const fn vbtbkr_322_(
3438 &self,
3439 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3440 unsafe {
3441 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3442 self._svd2pac_as_ptr().add(0x642usize),
3443 )
3444 }
3445 }
3446 #[inline(always)]
3447 pub const fn vbtbkr_323_(
3448 &self,
3449 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3450 unsafe {
3451 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3452 self._svd2pac_as_ptr().add(0x643usize),
3453 )
3454 }
3455 }
3456 #[inline(always)]
3457 pub const fn vbtbkr_324_(
3458 &self,
3459 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3460 unsafe {
3461 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3462 self._svd2pac_as_ptr().add(0x644usize),
3463 )
3464 }
3465 }
3466 #[inline(always)]
3467 pub const fn vbtbkr_325_(
3468 &self,
3469 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3470 unsafe {
3471 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3472 self._svd2pac_as_ptr().add(0x645usize),
3473 )
3474 }
3475 }
3476 #[inline(always)]
3477 pub const fn vbtbkr_326_(
3478 &self,
3479 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3480 unsafe {
3481 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3482 self._svd2pac_as_ptr().add(0x646usize),
3483 )
3484 }
3485 }
3486 #[inline(always)]
3487 pub const fn vbtbkr_327_(
3488 &self,
3489 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3490 unsafe {
3491 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3492 self._svd2pac_as_ptr().add(0x647usize),
3493 )
3494 }
3495 }
3496 #[inline(always)]
3497 pub const fn vbtbkr_328_(
3498 &self,
3499 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3500 unsafe {
3501 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3502 self._svd2pac_as_ptr().add(0x648usize),
3503 )
3504 }
3505 }
3506 #[inline(always)]
3507 pub const fn vbtbkr_329_(
3508 &self,
3509 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3510 unsafe {
3511 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3512 self._svd2pac_as_ptr().add(0x649usize),
3513 )
3514 }
3515 }
3516 #[inline(always)]
3517 pub const fn vbtbkr_330_(
3518 &self,
3519 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3520 unsafe {
3521 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3522 self._svd2pac_as_ptr().add(0x64ausize),
3523 )
3524 }
3525 }
3526 #[inline(always)]
3527 pub const fn vbtbkr_331_(
3528 &self,
3529 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3530 unsafe {
3531 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3532 self._svd2pac_as_ptr().add(0x64busize),
3533 )
3534 }
3535 }
3536 #[inline(always)]
3537 pub const fn vbtbkr_332_(
3538 &self,
3539 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3540 unsafe {
3541 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3542 self._svd2pac_as_ptr().add(0x64cusize),
3543 )
3544 }
3545 }
3546 #[inline(always)]
3547 pub const fn vbtbkr_333_(
3548 &self,
3549 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3550 unsafe {
3551 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3552 self._svd2pac_as_ptr().add(0x64dusize),
3553 )
3554 }
3555 }
3556 #[inline(always)]
3557 pub const fn vbtbkr_334_(
3558 &self,
3559 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3560 unsafe {
3561 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3562 self._svd2pac_as_ptr().add(0x64eusize),
3563 )
3564 }
3565 }
3566 #[inline(always)]
3567 pub const fn vbtbkr_335_(
3568 &self,
3569 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3570 unsafe {
3571 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3572 self._svd2pac_as_ptr().add(0x64fusize),
3573 )
3574 }
3575 }
3576 #[inline(always)]
3577 pub const fn vbtbkr_336_(
3578 &self,
3579 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3580 unsafe {
3581 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3582 self._svd2pac_as_ptr().add(0x650usize),
3583 )
3584 }
3585 }
3586 #[inline(always)]
3587 pub const fn vbtbkr_337_(
3588 &self,
3589 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3590 unsafe {
3591 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3592 self._svd2pac_as_ptr().add(0x651usize),
3593 )
3594 }
3595 }
3596 #[inline(always)]
3597 pub const fn vbtbkr_338_(
3598 &self,
3599 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3600 unsafe {
3601 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3602 self._svd2pac_as_ptr().add(0x652usize),
3603 )
3604 }
3605 }
3606 #[inline(always)]
3607 pub const fn vbtbkr_339_(
3608 &self,
3609 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3610 unsafe {
3611 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3612 self._svd2pac_as_ptr().add(0x653usize),
3613 )
3614 }
3615 }
3616 #[inline(always)]
3617 pub const fn vbtbkr_340_(
3618 &self,
3619 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3620 unsafe {
3621 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3622 self._svd2pac_as_ptr().add(0x654usize),
3623 )
3624 }
3625 }
3626 #[inline(always)]
3627 pub const fn vbtbkr_341_(
3628 &self,
3629 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3630 unsafe {
3631 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3632 self._svd2pac_as_ptr().add(0x655usize),
3633 )
3634 }
3635 }
3636 #[inline(always)]
3637 pub const fn vbtbkr_342_(
3638 &self,
3639 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3640 unsafe {
3641 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3642 self._svd2pac_as_ptr().add(0x656usize),
3643 )
3644 }
3645 }
3646 #[inline(always)]
3647 pub const fn vbtbkr_343_(
3648 &self,
3649 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3650 unsafe {
3651 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3652 self._svd2pac_as_ptr().add(0x657usize),
3653 )
3654 }
3655 }
3656 #[inline(always)]
3657 pub const fn vbtbkr_344_(
3658 &self,
3659 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3660 unsafe {
3661 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3662 self._svd2pac_as_ptr().add(0x658usize),
3663 )
3664 }
3665 }
3666 #[inline(always)]
3667 pub const fn vbtbkr_345_(
3668 &self,
3669 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3670 unsafe {
3671 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3672 self._svd2pac_as_ptr().add(0x659usize),
3673 )
3674 }
3675 }
3676 #[inline(always)]
3677 pub const fn vbtbkr_346_(
3678 &self,
3679 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3680 unsafe {
3681 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3682 self._svd2pac_as_ptr().add(0x65ausize),
3683 )
3684 }
3685 }
3686 #[inline(always)]
3687 pub const fn vbtbkr_347_(
3688 &self,
3689 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3690 unsafe {
3691 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3692 self._svd2pac_as_ptr().add(0x65busize),
3693 )
3694 }
3695 }
3696 #[inline(always)]
3697 pub const fn vbtbkr_348_(
3698 &self,
3699 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3700 unsafe {
3701 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3702 self._svd2pac_as_ptr().add(0x65cusize),
3703 )
3704 }
3705 }
3706 #[inline(always)]
3707 pub const fn vbtbkr_349_(
3708 &self,
3709 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3710 unsafe {
3711 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3712 self._svd2pac_as_ptr().add(0x65dusize),
3713 )
3714 }
3715 }
3716 #[inline(always)]
3717 pub const fn vbtbkr_350_(
3718 &self,
3719 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3720 unsafe {
3721 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3722 self._svd2pac_as_ptr().add(0x65eusize),
3723 )
3724 }
3725 }
3726 #[inline(always)]
3727 pub const fn vbtbkr_351_(
3728 &self,
3729 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3730 unsafe {
3731 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3732 self._svd2pac_as_ptr().add(0x65fusize),
3733 )
3734 }
3735 }
3736 #[inline(always)]
3737 pub const fn vbtbkr_352_(
3738 &self,
3739 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3740 unsafe {
3741 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3742 self._svd2pac_as_ptr().add(0x660usize),
3743 )
3744 }
3745 }
3746 #[inline(always)]
3747 pub const fn vbtbkr_353_(
3748 &self,
3749 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3750 unsafe {
3751 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3752 self._svd2pac_as_ptr().add(0x661usize),
3753 )
3754 }
3755 }
3756 #[inline(always)]
3757 pub const fn vbtbkr_354_(
3758 &self,
3759 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3760 unsafe {
3761 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3762 self._svd2pac_as_ptr().add(0x662usize),
3763 )
3764 }
3765 }
3766 #[inline(always)]
3767 pub const fn vbtbkr_355_(
3768 &self,
3769 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3770 unsafe {
3771 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3772 self._svd2pac_as_ptr().add(0x663usize),
3773 )
3774 }
3775 }
3776 #[inline(always)]
3777 pub const fn vbtbkr_356_(
3778 &self,
3779 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3780 unsafe {
3781 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3782 self._svd2pac_as_ptr().add(0x664usize),
3783 )
3784 }
3785 }
3786 #[inline(always)]
3787 pub const fn vbtbkr_357_(
3788 &self,
3789 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3790 unsafe {
3791 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3792 self._svd2pac_as_ptr().add(0x665usize),
3793 )
3794 }
3795 }
3796 #[inline(always)]
3797 pub const fn vbtbkr_358_(
3798 &self,
3799 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3800 unsafe {
3801 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3802 self._svd2pac_as_ptr().add(0x666usize),
3803 )
3804 }
3805 }
3806 #[inline(always)]
3807 pub const fn vbtbkr_359_(
3808 &self,
3809 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3810 unsafe {
3811 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3812 self._svd2pac_as_ptr().add(0x667usize),
3813 )
3814 }
3815 }
3816 #[inline(always)]
3817 pub const fn vbtbkr_360_(
3818 &self,
3819 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3820 unsafe {
3821 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3822 self._svd2pac_as_ptr().add(0x668usize),
3823 )
3824 }
3825 }
3826 #[inline(always)]
3827 pub const fn vbtbkr_361_(
3828 &self,
3829 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3830 unsafe {
3831 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3832 self._svd2pac_as_ptr().add(0x669usize),
3833 )
3834 }
3835 }
3836 #[inline(always)]
3837 pub const fn vbtbkr_362_(
3838 &self,
3839 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3840 unsafe {
3841 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3842 self._svd2pac_as_ptr().add(0x66ausize),
3843 )
3844 }
3845 }
3846 #[inline(always)]
3847 pub const fn vbtbkr_363_(
3848 &self,
3849 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3850 unsafe {
3851 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3852 self._svd2pac_as_ptr().add(0x66busize),
3853 )
3854 }
3855 }
3856 #[inline(always)]
3857 pub const fn vbtbkr_364_(
3858 &self,
3859 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3860 unsafe {
3861 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3862 self._svd2pac_as_ptr().add(0x66cusize),
3863 )
3864 }
3865 }
3866 #[inline(always)]
3867 pub const fn vbtbkr_365_(
3868 &self,
3869 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3870 unsafe {
3871 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3872 self._svd2pac_as_ptr().add(0x66dusize),
3873 )
3874 }
3875 }
3876 #[inline(always)]
3877 pub const fn vbtbkr_366_(
3878 &self,
3879 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3880 unsafe {
3881 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3882 self._svd2pac_as_ptr().add(0x66eusize),
3883 )
3884 }
3885 }
3886 #[inline(always)]
3887 pub const fn vbtbkr_367_(
3888 &self,
3889 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3890 unsafe {
3891 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3892 self._svd2pac_as_ptr().add(0x66fusize),
3893 )
3894 }
3895 }
3896 #[inline(always)]
3897 pub const fn vbtbkr_368_(
3898 &self,
3899 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3900 unsafe {
3901 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3902 self._svd2pac_as_ptr().add(0x670usize),
3903 )
3904 }
3905 }
3906 #[inline(always)]
3907 pub const fn vbtbkr_369_(
3908 &self,
3909 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3910 unsafe {
3911 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3912 self._svd2pac_as_ptr().add(0x671usize),
3913 )
3914 }
3915 }
3916 #[inline(always)]
3917 pub const fn vbtbkr_370_(
3918 &self,
3919 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3920 unsafe {
3921 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3922 self._svd2pac_as_ptr().add(0x672usize),
3923 )
3924 }
3925 }
3926 #[inline(always)]
3927 pub const fn vbtbkr_371_(
3928 &self,
3929 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3930 unsafe {
3931 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3932 self._svd2pac_as_ptr().add(0x673usize),
3933 )
3934 }
3935 }
3936 #[inline(always)]
3937 pub const fn vbtbkr_372_(
3938 &self,
3939 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3940 unsafe {
3941 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3942 self._svd2pac_as_ptr().add(0x674usize),
3943 )
3944 }
3945 }
3946 #[inline(always)]
3947 pub const fn vbtbkr_373_(
3948 &self,
3949 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3950 unsafe {
3951 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3952 self._svd2pac_as_ptr().add(0x675usize),
3953 )
3954 }
3955 }
3956 #[inline(always)]
3957 pub const fn vbtbkr_374_(
3958 &self,
3959 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3960 unsafe {
3961 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3962 self._svd2pac_as_ptr().add(0x676usize),
3963 )
3964 }
3965 }
3966 #[inline(always)]
3967 pub const fn vbtbkr_375_(
3968 &self,
3969 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3970 unsafe {
3971 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3972 self._svd2pac_as_ptr().add(0x677usize),
3973 )
3974 }
3975 }
3976 #[inline(always)]
3977 pub const fn vbtbkr_376_(
3978 &self,
3979 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3980 unsafe {
3981 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3982 self._svd2pac_as_ptr().add(0x678usize),
3983 )
3984 }
3985 }
3986 #[inline(always)]
3987 pub const fn vbtbkr_377_(
3988 &self,
3989 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
3990 unsafe {
3991 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
3992 self._svd2pac_as_ptr().add(0x679usize),
3993 )
3994 }
3995 }
3996 #[inline(always)]
3997 pub const fn vbtbkr_378_(
3998 &self,
3999 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4000 unsafe {
4001 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4002 self._svd2pac_as_ptr().add(0x67ausize),
4003 )
4004 }
4005 }
4006 #[inline(always)]
4007 pub const fn vbtbkr_379_(
4008 &self,
4009 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4010 unsafe {
4011 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4012 self._svd2pac_as_ptr().add(0x67busize),
4013 )
4014 }
4015 }
4016 #[inline(always)]
4017 pub const fn vbtbkr_380_(
4018 &self,
4019 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4020 unsafe {
4021 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4022 self._svd2pac_as_ptr().add(0x67cusize),
4023 )
4024 }
4025 }
4026 #[inline(always)]
4027 pub const fn vbtbkr_381_(
4028 &self,
4029 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4030 unsafe {
4031 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4032 self._svd2pac_as_ptr().add(0x67dusize),
4033 )
4034 }
4035 }
4036 #[inline(always)]
4037 pub const fn vbtbkr_382_(
4038 &self,
4039 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4040 unsafe {
4041 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4042 self._svd2pac_as_ptr().add(0x67eusize),
4043 )
4044 }
4045 }
4046 #[inline(always)]
4047 pub const fn vbtbkr_383_(
4048 &self,
4049 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4050 unsafe {
4051 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4052 self._svd2pac_as_ptr().add(0x67fusize),
4053 )
4054 }
4055 }
4056 #[inline(always)]
4057 pub const fn vbtbkr_384_(
4058 &self,
4059 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4060 unsafe {
4061 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4062 self._svd2pac_as_ptr().add(0x680usize),
4063 )
4064 }
4065 }
4066 #[inline(always)]
4067 pub const fn vbtbkr_385_(
4068 &self,
4069 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4070 unsafe {
4071 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4072 self._svd2pac_as_ptr().add(0x681usize),
4073 )
4074 }
4075 }
4076 #[inline(always)]
4077 pub const fn vbtbkr_386_(
4078 &self,
4079 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4080 unsafe {
4081 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4082 self._svd2pac_as_ptr().add(0x682usize),
4083 )
4084 }
4085 }
4086 #[inline(always)]
4087 pub const fn vbtbkr_387_(
4088 &self,
4089 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4090 unsafe {
4091 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4092 self._svd2pac_as_ptr().add(0x683usize),
4093 )
4094 }
4095 }
4096 #[inline(always)]
4097 pub const fn vbtbkr_388_(
4098 &self,
4099 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4100 unsafe {
4101 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4102 self._svd2pac_as_ptr().add(0x684usize),
4103 )
4104 }
4105 }
4106 #[inline(always)]
4107 pub const fn vbtbkr_389_(
4108 &self,
4109 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4110 unsafe {
4111 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4112 self._svd2pac_as_ptr().add(0x685usize),
4113 )
4114 }
4115 }
4116 #[inline(always)]
4117 pub const fn vbtbkr_390_(
4118 &self,
4119 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4120 unsafe {
4121 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4122 self._svd2pac_as_ptr().add(0x686usize),
4123 )
4124 }
4125 }
4126 #[inline(always)]
4127 pub const fn vbtbkr_391_(
4128 &self,
4129 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4130 unsafe {
4131 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4132 self._svd2pac_as_ptr().add(0x687usize),
4133 )
4134 }
4135 }
4136 #[inline(always)]
4137 pub const fn vbtbkr_392_(
4138 &self,
4139 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4140 unsafe {
4141 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4142 self._svd2pac_as_ptr().add(0x688usize),
4143 )
4144 }
4145 }
4146 #[inline(always)]
4147 pub const fn vbtbkr_393_(
4148 &self,
4149 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4150 unsafe {
4151 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4152 self._svd2pac_as_ptr().add(0x689usize),
4153 )
4154 }
4155 }
4156 #[inline(always)]
4157 pub const fn vbtbkr_394_(
4158 &self,
4159 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4160 unsafe {
4161 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4162 self._svd2pac_as_ptr().add(0x68ausize),
4163 )
4164 }
4165 }
4166 #[inline(always)]
4167 pub const fn vbtbkr_395_(
4168 &self,
4169 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4170 unsafe {
4171 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4172 self._svd2pac_as_ptr().add(0x68busize),
4173 )
4174 }
4175 }
4176 #[inline(always)]
4177 pub const fn vbtbkr_396_(
4178 &self,
4179 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4180 unsafe {
4181 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4182 self._svd2pac_as_ptr().add(0x68cusize),
4183 )
4184 }
4185 }
4186 #[inline(always)]
4187 pub const fn vbtbkr_397_(
4188 &self,
4189 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4190 unsafe {
4191 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4192 self._svd2pac_as_ptr().add(0x68dusize),
4193 )
4194 }
4195 }
4196 #[inline(always)]
4197 pub const fn vbtbkr_398_(
4198 &self,
4199 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4200 unsafe {
4201 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4202 self._svd2pac_as_ptr().add(0x68eusize),
4203 )
4204 }
4205 }
4206 #[inline(always)]
4207 pub const fn vbtbkr_399_(
4208 &self,
4209 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4210 unsafe {
4211 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4212 self._svd2pac_as_ptr().add(0x68fusize),
4213 )
4214 }
4215 }
4216 #[inline(always)]
4217 pub const fn vbtbkr_400_(
4218 &self,
4219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4220 unsafe {
4221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4222 self._svd2pac_as_ptr().add(0x690usize),
4223 )
4224 }
4225 }
4226 #[inline(always)]
4227 pub const fn vbtbkr_401_(
4228 &self,
4229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4230 unsafe {
4231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4232 self._svd2pac_as_ptr().add(0x691usize),
4233 )
4234 }
4235 }
4236 #[inline(always)]
4237 pub const fn vbtbkr_402_(
4238 &self,
4239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4240 unsafe {
4241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4242 self._svd2pac_as_ptr().add(0x692usize),
4243 )
4244 }
4245 }
4246 #[inline(always)]
4247 pub const fn vbtbkr_403_(
4248 &self,
4249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4250 unsafe {
4251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4252 self._svd2pac_as_ptr().add(0x693usize),
4253 )
4254 }
4255 }
4256 #[inline(always)]
4257 pub const fn vbtbkr_404_(
4258 &self,
4259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4260 unsafe {
4261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4262 self._svd2pac_as_ptr().add(0x694usize),
4263 )
4264 }
4265 }
4266 #[inline(always)]
4267 pub const fn vbtbkr_405_(
4268 &self,
4269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4270 unsafe {
4271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4272 self._svd2pac_as_ptr().add(0x695usize),
4273 )
4274 }
4275 }
4276 #[inline(always)]
4277 pub const fn vbtbkr_406_(
4278 &self,
4279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4280 unsafe {
4281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4282 self._svd2pac_as_ptr().add(0x696usize),
4283 )
4284 }
4285 }
4286 #[inline(always)]
4287 pub const fn vbtbkr_407_(
4288 &self,
4289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4290 unsafe {
4291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4292 self._svd2pac_as_ptr().add(0x697usize),
4293 )
4294 }
4295 }
4296 #[inline(always)]
4297 pub const fn vbtbkr_408_(
4298 &self,
4299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4300 unsafe {
4301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4302 self._svd2pac_as_ptr().add(0x698usize),
4303 )
4304 }
4305 }
4306 #[inline(always)]
4307 pub const fn vbtbkr_409_(
4308 &self,
4309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4310 unsafe {
4311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4312 self._svd2pac_as_ptr().add(0x699usize),
4313 )
4314 }
4315 }
4316 #[inline(always)]
4317 pub const fn vbtbkr_410_(
4318 &self,
4319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4320 unsafe {
4321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4322 self._svd2pac_as_ptr().add(0x69ausize),
4323 )
4324 }
4325 }
4326 #[inline(always)]
4327 pub const fn vbtbkr_411_(
4328 &self,
4329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4330 unsafe {
4331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4332 self._svd2pac_as_ptr().add(0x69busize),
4333 )
4334 }
4335 }
4336 #[inline(always)]
4337 pub const fn vbtbkr_412_(
4338 &self,
4339 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4340 unsafe {
4341 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4342 self._svd2pac_as_ptr().add(0x69cusize),
4343 )
4344 }
4345 }
4346 #[inline(always)]
4347 pub const fn vbtbkr_413_(
4348 &self,
4349 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4350 unsafe {
4351 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4352 self._svd2pac_as_ptr().add(0x69dusize),
4353 )
4354 }
4355 }
4356 #[inline(always)]
4357 pub const fn vbtbkr_414_(
4358 &self,
4359 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4360 unsafe {
4361 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4362 self._svd2pac_as_ptr().add(0x69eusize),
4363 )
4364 }
4365 }
4366 #[inline(always)]
4367 pub const fn vbtbkr_415_(
4368 &self,
4369 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4370 unsafe {
4371 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4372 self._svd2pac_as_ptr().add(0x69fusize),
4373 )
4374 }
4375 }
4376 #[inline(always)]
4377 pub const fn vbtbkr_416_(
4378 &self,
4379 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4380 unsafe {
4381 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4382 self._svd2pac_as_ptr().add(0x6a0usize),
4383 )
4384 }
4385 }
4386 #[inline(always)]
4387 pub const fn vbtbkr_417_(
4388 &self,
4389 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4390 unsafe {
4391 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4392 self._svd2pac_as_ptr().add(0x6a1usize),
4393 )
4394 }
4395 }
4396 #[inline(always)]
4397 pub const fn vbtbkr_418_(
4398 &self,
4399 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4400 unsafe {
4401 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4402 self._svd2pac_as_ptr().add(0x6a2usize),
4403 )
4404 }
4405 }
4406 #[inline(always)]
4407 pub const fn vbtbkr_419_(
4408 &self,
4409 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4410 unsafe {
4411 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4412 self._svd2pac_as_ptr().add(0x6a3usize),
4413 )
4414 }
4415 }
4416 #[inline(always)]
4417 pub const fn vbtbkr_420_(
4418 &self,
4419 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4420 unsafe {
4421 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4422 self._svd2pac_as_ptr().add(0x6a4usize),
4423 )
4424 }
4425 }
4426 #[inline(always)]
4427 pub const fn vbtbkr_421_(
4428 &self,
4429 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4430 unsafe {
4431 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4432 self._svd2pac_as_ptr().add(0x6a5usize),
4433 )
4434 }
4435 }
4436 #[inline(always)]
4437 pub const fn vbtbkr_422_(
4438 &self,
4439 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4440 unsafe {
4441 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4442 self._svd2pac_as_ptr().add(0x6a6usize),
4443 )
4444 }
4445 }
4446 #[inline(always)]
4447 pub const fn vbtbkr_423_(
4448 &self,
4449 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4450 unsafe {
4451 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4452 self._svd2pac_as_ptr().add(0x6a7usize),
4453 )
4454 }
4455 }
4456 #[inline(always)]
4457 pub const fn vbtbkr_424_(
4458 &self,
4459 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4460 unsafe {
4461 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4462 self._svd2pac_as_ptr().add(0x6a8usize),
4463 )
4464 }
4465 }
4466 #[inline(always)]
4467 pub const fn vbtbkr_425_(
4468 &self,
4469 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4470 unsafe {
4471 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4472 self._svd2pac_as_ptr().add(0x6a9usize),
4473 )
4474 }
4475 }
4476 #[inline(always)]
4477 pub const fn vbtbkr_426_(
4478 &self,
4479 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4480 unsafe {
4481 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4482 self._svd2pac_as_ptr().add(0x6aausize),
4483 )
4484 }
4485 }
4486 #[inline(always)]
4487 pub const fn vbtbkr_427_(
4488 &self,
4489 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4490 unsafe {
4491 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4492 self._svd2pac_as_ptr().add(0x6abusize),
4493 )
4494 }
4495 }
4496 #[inline(always)]
4497 pub const fn vbtbkr_428_(
4498 &self,
4499 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4500 unsafe {
4501 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4502 self._svd2pac_as_ptr().add(0x6acusize),
4503 )
4504 }
4505 }
4506 #[inline(always)]
4507 pub const fn vbtbkr_429_(
4508 &self,
4509 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4510 unsafe {
4511 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4512 self._svd2pac_as_ptr().add(0x6adusize),
4513 )
4514 }
4515 }
4516 #[inline(always)]
4517 pub const fn vbtbkr_430_(
4518 &self,
4519 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4520 unsafe {
4521 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4522 self._svd2pac_as_ptr().add(0x6aeusize),
4523 )
4524 }
4525 }
4526 #[inline(always)]
4527 pub const fn vbtbkr_431_(
4528 &self,
4529 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4530 unsafe {
4531 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4532 self._svd2pac_as_ptr().add(0x6afusize),
4533 )
4534 }
4535 }
4536 #[inline(always)]
4537 pub const fn vbtbkr_432_(
4538 &self,
4539 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4540 unsafe {
4541 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4542 self._svd2pac_as_ptr().add(0x6b0usize),
4543 )
4544 }
4545 }
4546 #[inline(always)]
4547 pub const fn vbtbkr_433_(
4548 &self,
4549 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4550 unsafe {
4551 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4552 self._svd2pac_as_ptr().add(0x6b1usize),
4553 )
4554 }
4555 }
4556 #[inline(always)]
4557 pub const fn vbtbkr_434_(
4558 &self,
4559 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4560 unsafe {
4561 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4562 self._svd2pac_as_ptr().add(0x6b2usize),
4563 )
4564 }
4565 }
4566 #[inline(always)]
4567 pub const fn vbtbkr_435_(
4568 &self,
4569 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4570 unsafe {
4571 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4572 self._svd2pac_as_ptr().add(0x6b3usize),
4573 )
4574 }
4575 }
4576 #[inline(always)]
4577 pub const fn vbtbkr_436_(
4578 &self,
4579 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4580 unsafe {
4581 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4582 self._svd2pac_as_ptr().add(0x6b4usize),
4583 )
4584 }
4585 }
4586 #[inline(always)]
4587 pub const fn vbtbkr_437_(
4588 &self,
4589 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4590 unsafe {
4591 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4592 self._svd2pac_as_ptr().add(0x6b5usize),
4593 )
4594 }
4595 }
4596 #[inline(always)]
4597 pub const fn vbtbkr_438_(
4598 &self,
4599 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4600 unsafe {
4601 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4602 self._svd2pac_as_ptr().add(0x6b6usize),
4603 )
4604 }
4605 }
4606 #[inline(always)]
4607 pub const fn vbtbkr_439_(
4608 &self,
4609 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4610 unsafe {
4611 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4612 self._svd2pac_as_ptr().add(0x6b7usize),
4613 )
4614 }
4615 }
4616 #[inline(always)]
4617 pub const fn vbtbkr_440_(
4618 &self,
4619 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4620 unsafe {
4621 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4622 self._svd2pac_as_ptr().add(0x6b8usize),
4623 )
4624 }
4625 }
4626 #[inline(always)]
4627 pub const fn vbtbkr_441_(
4628 &self,
4629 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4630 unsafe {
4631 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4632 self._svd2pac_as_ptr().add(0x6b9usize),
4633 )
4634 }
4635 }
4636 #[inline(always)]
4637 pub const fn vbtbkr_442_(
4638 &self,
4639 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4640 unsafe {
4641 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4642 self._svd2pac_as_ptr().add(0x6bausize),
4643 )
4644 }
4645 }
4646 #[inline(always)]
4647 pub const fn vbtbkr_443_(
4648 &self,
4649 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4650 unsafe {
4651 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4652 self._svd2pac_as_ptr().add(0x6bbusize),
4653 )
4654 }
4655 }
4656 #[inline(always)]
4657 pub const fn vbtbkr_444_(
4658 &self,
4659 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4660 unsafe {
4661 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4662 self._svd2pac_as_ptr().add(0x6bcusize),
4663 )
4664 }
4665 }
4666 #[inline(always)]
4667 pub const fn vbtbkr_445_(
4668 &self,
4669 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4670 unsafe {
4671 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4672 self._svd2pac_as_ptr().add(0x6bdusize),
4673 )
4674 }
4675 }
4676 #[inline(always)]
4677 pub const fn vbtbkr_446_(
4678 &self,
4679 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4680 unsafe {
4681 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4682 self._svd2pac_as_ptr().add(0x6beusize),
4683 )
4684 }
4685 }
4686 #[inline(always)]
4687 pub const fn vbtbkr_447_(
4688 &self,
4689 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4690 unsafe {
4691 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4692 self._svd2pac_as_ptr().add(0x6bfusize),
4693 )
4694 }
4695 }
4696 #[inline(always)]
4697 pub const fn vbtbkr_448_(
4698 &self,
4699 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4700 unsafe {
4701 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4702 self._svd2pac_as_ptr().add(0x6c0usize),
4703 )
4704 }
4705 }
4706 #[inline(always)]
4707 pub const fn vbtbkr_449_(
4708 &self,
4709 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4710 unsafe {
4711 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4712 self._svd2pac_as_ptr().add(0x6c1usize),
4713 )
4714 }
4715 }
4716 #[inline(always)]
4717 pub const fn vbtbkr_450_(
4718 &self,
4719 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4720 unsafe {
4721 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4722 self._svd2pac_as_ptr().add(0x6c2usize),
4723 )
4724 }
4725 }
4726 #[inline(always)]
4727 pub const fn vbtbkr_451_(
4728 &self,
4729 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4730 unsafe {
4731 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4732 self._svd2pac_as_ptr().add(0x6c3usize),
4733 )
4734 }
4735 }
4736 #[inline(always)]
4737 pub const fn vbtbkr_452_(
4738 &self,
4739 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4740 unsafe {
4741 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4742 self._svd2pac_as_ptr().add(0x6c4usize),
4743 )
4744 }
4745 }
4746 #[inline(always)]
4747 pub const fn vbtbkr_453_(
4748 &self,
4749 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4750 unsafe {
4751 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4752 self._svd2pac_as_ptr().add(0x6c5usize),
4753 )
4754 }
4755 }
4756 #[inline(always)]
4757 pub const fn vbtbkr_454_(
4758 &self,
4759 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4760 unsafe {
4761 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4762 self._svd2pac_as_ptr().add(0x6c6usize),
4763 )
4764 }
4765 }
4766 #[inline(always)]
4767 pub const fn vbtbkr_455_(
4768 &self,
4769 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4770 unsafe {
4771 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4772 self._svd2pac_as_ptr().add(0x6c7usize),
4773 )
4774 }
4775 }
4776 #[inline(always)]
4777 pub const fn vbtbkr_456_(
4778 &self,
4779 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4780 unsafe {
4781 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4782 self._svd2pac_as_ptr().add(0x6c8usize),
4783 )
4784 }
4785 }
4786 #[inline(always)]
4787 pub const fn vbtbkr_457_(
4788 &self,
4789 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4790 unsafe {
4791 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4792 self._svd2pac_as_ptr().add(0x6c9usize),
4793 )
4794 }
4795 }
4796 #[inline(always)]
4797 pub const fn vbtbkr_458_(
4798 &self,
4799 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4800 unsafe {
4801 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4802 self._svd2pac_as_ptr().add(0x6causize),
4803 )
4804 }
4805 }
4806 #[inline(always)]
4807 pub const fn vbtbkr_459_(
4808 &self,
4809 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4810 unsafe {
4811 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4812 self._svd2pac_as_ptr().add(0x6cbusize),
4813 )
4814 }
4815 }
4816 #[inline(always)]
4817 pub const fn vbtbkr_460_(
4818 &self,
4819 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4820 unsafe {
4821 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4822 self._svd2pac_as_ptr().add(0x6ccusize),
4823 )
4824 }
4825 }
4826 #[inline(always)]
4827 pub const fn vbtbkr_461_(
4828 &self,
4829 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4830 unsafe {
4831 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4832 self._svd2pac_as_ptr().add(0x6cdusize),
4833 )
4834 }
4835 }
4836 #[inline(always)]
4837 pub const fn vbtbkr_462_(
4838 &self,
4839 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4840 unsafe {
4841 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4842 self._svd2pac_as_ptr().add(0x6ceusize),
4843 )
4844 }
4845 }
4846 #[inline(always)]
4847 pub const fn vbtbkr_463_(
4848 &self,
4849 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4850 unsafe {
4851 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4852 self._svd2pac_as_ptr().add(0x6cfusize),
4853 )
4854 }
4855 }
4856 #[inline(always)]
4857 pub const fn vbtbkr_464_(
4858 &self,
4859 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4860 unsafe {
4861 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4862 self._svd2pac_as_ptr().add(0x6d0usize),
4863 )
4864 }
4865 }
4866 #[inline(always)]
4867 pub const fn vbtbkr_465_(
4868 &self,
4869 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4870 unsafe {
4871 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4872 self._svd2pac_as_ptr().add(0x6d1usize),
4873 )
4874 }
4875 }
4876 #[inline(always)]
4877 pub const fn vbtbkr_466_(
4878 &self,
4879 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4880 unsafe {
4881 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4882 self._svd2pac_as_ptr().add(0x6d2usize),
4883 )
4884 }
4885 }
4886 #[inline(always)]
4887 pub const fn vbtbkr_467_(
4888 &self,
4889 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4890 unsafe {
4891 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4892 self._svd2pac_as_ptr().add(0x6d3usize),
4893 )
4894 }
4895 }
4896 #[inline(always)]
4897 pub const fn vbtbkr_468_(
4898 &self,
4899 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4900 unsafe {
4901 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4902 self._svd2pac_as_ptr().add(0x6d4usize),
4903 )
4904 }
4905 }
4906 #[inline(always)]
4907 pub const fn vbtbkr_469_(
4908 &self,
4909 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4910 unsafe {
4911 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4912 self._svd2pac_as_ptr().add(0x6d5usize),
4913 )
4914 }
4915 }
4916 #[inline(always)]
4917 pub const fn vbtbkr_470_(
4918 &self,
4919 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4920 unsafe {
4921 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4922 self._svd2pac_as_ptr().add(0x6d6usize),
4923 )
4924 }
4925 }
4926 #[inline(always)]
4927 pub const fn vbtbkr_471_(
4928 &self,
4929 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4930 unsafe {
4931 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4932 self._svd2pac_as_ptr().add(0x6d7usize),
4933 )
4934 }
4935 }
4936 #[inline(always)]
4937 pub const fn vbtbkr_472_(
4938 &self,
4939 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4940 unsafe {
4941 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4942 self._svd2pac_as_ptr().add(0x6d8usize),
4943 )
4944 }
4945 }
4946 #[inline(always)]
4947 pub const fn vbtbkr_473_(
4948 &self,
4949 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4950 unsafe {
4951 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4952 self._svd2pac_as_ptr().add(0x6d9usize),
4953 )
4954 }
4955 }
4956 #[inline(always)]
4957 pub const fn vbtbkr_474_(
4958 &self,
4959 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4960 unsafe {
4961 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4962 self._svd2pac_as_ptr().add(0x6dausize),
4963 )
4964 }
4965 }
4966 #[inline(always)]
4967 pub const fn vbtbkr_475_(
4968 &self,
4969 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4970 unsafe {
4971 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4972 self._svd2pac_as_ptr().add(0x6dbusize),
4973 )
4974 }
4975 }
4976 #[inline(always)]
4977 pub const fn vbtbkr_476_(
4978 &self,
4979 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4980 unsafe {
4981 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4982 self._svd2pac_as_ptr().add(0x6dcusize),
4983 )
4984 }
4985 }
4986 #[inline(always)]
4987 pub const fn vbtbkr_477_(
4988 &self,
4989 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
4990 unsafe {
4991 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
4992 self._svd2pac_as_ptr().add(0x6ddusize),
4993 )
4994 }
4995 }
4996 #[inline(always)]
4997 pub const fn vbtbkr_478_(
4998 &self,
4999 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5000 unsafe {
5001 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5002 self._svd2pac_as_ptr().add(0x6deusize),
5003 )
5004 }
5005 }
5006 #[inline(always)]
5007 pub const fn vbtbkr_479_(
5008 &self,
5009 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5010 unsafe {
5011 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5012 self._svd2pac_as_ptr().add(0x6dfusize),
5013 )
5014 }
5015 }
5016 #[inline(always)]
5017 pub const fn vbtbkr_480_(
5018 &self,
5019 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5020 unsafe {
5021 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5022 self._svd2pac_as_ptr().add(0x6e0usize),
5023 )
5024 }
5025 }
5026 #[inline(always)]
5027 pub const fn vbtbkr_481_(
5028 &self,
5029 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5030 unsafe {
5031 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5032 self._svd2pac_as_ptr().add(0x6e1usize),
5033 )
5034 }
5035 }
5036 #[inline(always)]
5037 pub const fn vbtbkr_482_(
5038 &self,
5039 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5040 unsafe {
5041 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5042 self._svd2pac_as_ptr().add(0x6e2usize),
5043 )
5044 }
5045 }
5046 #[inline(always)]
5047 pub const fn vbtbkr_483_(
5048 &self,
5049 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5050 unsafe {
5051 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5052 self._svd2pac_as_ptr().add(0x6e3usize),
5053 )
5054 }
5055 }
5056 #[inline(always)]
5057 pub const fn vbtbkr_484_(
5058 &self,
5059 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5060 unsafe {
5061 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5062 self._svd2pac_as_ptr().add(0x6e4usize),
5063 )
5064 }
5065 }
5066 #[inline(always)]
5067 pub const fn vbtbkr_485_(
5068 &self,
5069 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5070 unsafe {
5071 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5072 self._svd2pac_as_ptr().add(0x6e5usize),
5073 )
5074 }
5075 }
5076 #[inline(always)]
5077 pub const fn vbtbkr_486_(
5078 &self,
5079 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5080 unsafe {
5081 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5082 self._svd2pac_as_ptr().add(0x6e6usize),
5083 )
5084 }
5085 }
5086 #[inline(always)]
5087 pub const fn vbtbkr_487_(
5088 &self,
5089 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5090 unsafe {
5091 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5092 self._svd2pac_as_ptr().add(0x6e7usize),
5093 )
5094 }
5095 }
5096 #[inline(always)]
5097 pub const fn vbtbkr_488_(
5098 &self,
5099 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5100 unsafe {
5101 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5102 self._svd2pac_as_ptr().add(0x6e8usize),
5103 )
5104 }
5105 }
5106 #[inline(always)]
5107 pub const fn vbtbkr_489_(
5108 &self,
5109 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5110 unsafe {
5111 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5112 self._svd2pac_as_ptr().add(0x6e9usize),
5113 )
5114 }
5115 }
5116 #[inline(always)]
5117 pub const fn vbtbkr_490_(
5118 &self,
5119 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5120 unsafe {
5121 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5122 self._svd2pac_as_ptr().add(0x6eausize),
5123 )
5124 }
5125 }
5126 #[inline(always)]
5127 pub const fn vbtbkr_491_(
5128 &self,
5129 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5130 unsafe {
5131 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5132 self._svd2pac_as_ptr().add(0x6ebusize),
5133 )
5134 }
5135 }
5136 #[inline(always)]
5137 pub const fn vbtbkr_492_(
5138 &self,
5139 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5140 unsafe {
5141 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5142 self._svd2pac_as_ptr().add(0x6ecusize),
5143 )
5144 }
5145 }
5146 #[inline(always)]
5147 pub const fn vbtbkr_493_(
5148 &self,
5149 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5150 unsafe {
5151 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5152 self._svd2pac_as_ptr().add(0x6edusize),
5153 )
5154 }
5155 }
5156 #[inline(always)]
5157 pub const fn vbtbkr_494_(
5158 &self,
5159 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5160 unsafe {
5161 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5162 self._svd2pac_as_ptr().add(0x6eeusize),
5163 )
5164 }
5165 }
5166 #[inline(always)]
5167 pub const fn vbtbkr_495_(
5168 &self,
5169 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5170 unsafe {
5171 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5172 self._svd2pac_as_ptr().add(0x6efusize),
5173 )
5174 }
5175 }
5176 #[inline(always)]
5177 pub const fn vbtbkr_496_(
5178 &self,
5179 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5180 unsafe {
5181 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5182 self._svd2pac_as_ptr().add(0x6f0usize),
5183 )
5184 }
5185 }
5186 #[inline(always)]
5187 pub const fn vbtbkr_497_(
5188 &self,
5189 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5190 unsafe {
5191 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5192 self._svd2pac_as_ptr().add(0x6f1usize),
5193 )
5194 }
5195 }
5196 #[inline(always)]
5197 pub const fn vbtbkr_498_(
5198 &self,
5199 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5200 unsafe {
5201 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5202 self._svd2pac_as_ptr().add(0x6f2usize),
5203 )
5204 }
5205 }
5206 #[inline(always)]
5207 pub const fn vbtbkr_499_(
5208 &self,
5209 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5210 unsafe {
5211 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5212 self._svd2pac_as_ptr().add(0x6f3usize),
5213 )
5214 }
5215 }
5216 #[inline(always)]
5217 pub const fn vbtbkr_500_(
5218 &self,
5219 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5220 unsafe {
5221 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5222 self._svd2pac_as_ptr().add(0x6f4usize),
5223 )
5224 }
5225 }
5226 #[inline(always)]
5227 pub const fn vbtbkr_501_(
5228 &self,
5229 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5230 unsafe {
5231 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5232 self._svd2pac_as_ptr().add(0x6f5usize),
5233 )
5234 }
5235 }
5236 #[inline(always)]
5237 pub const fn vbtbkr_502_(
5238 &self,
5239 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5240 unsafe {
5241 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5242 self._svd2pac_as_ptr().add(0x6f6usize),
5243 )
5244 }
5245 }
5246 #[inline(always)]
5247 pub const fn vbtbkr_503_(
5248 &self,
5249 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5250 unsafe {
5251 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5252 self._svd2pac_as_ptr().add(0x6f7usize),
5253 )
5254 }
5255 }
5256 #[inline(always)]
5257 pub const fn vbtbkr_504_(
5258 &self,
5259 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5260 unsafe {
5261 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5262 self._svd2pac_as_ptr().add(0x6f8usize),
5263 )
5264 }
5265 }
5266 #[inline(always)]
5267 pub const fn vbtbkr_505_(
5268 &self,
5269 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5270 unsafe {
5271 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5272 self._svd2pac_as_ptr().add(0x6f9usize),
5273 )
5274 }
5275 }
5276 #[inline(always)]
5277 pub const fn vbtbkr_506_(
5278 &self,
5279 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5280 unsafe {
5281 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5282 self._svd2pac_as_ptr().add(0x6fausize),
5283 )
5284 }
5285 }
5286 #[inline(always)]
5287 pub const fn vbtbkr_507_(
5288 &self,
5289 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5290 unsafe {
5291 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5292 self._svd2pac_as_ptr().add(0x6fbusize),
5293 )
5294 }
5295 }
5296 #[inline(always)]
5297 pub const fn vbtbkr_508_(
5298 &self,
5299 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5300 unsafe {
5301 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5302 self._svd2pac_as_ptr().add(0x6fcusize),
5303 )
5304 }
5305 }
5306 #[inline(always)]
5307 pub const fn vbtbkr_509_(
5308 &self,
5309 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5310 unsafe {
5311 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5312 self._svd2pac_as_ptr().add(0x6fdusize),
5313 )
5314 }
5315 }
5316 #[inline(always)]
5317 pub const fn vbtbkr_510_(
5318 &self,
5319 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5320 unsafe {
5321 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5322 self._svd2pac_as_ptr().add(0x6feusize),
5323 )
5324 }
5325 }
5326 #[inline(always)]
5327 pub const fn vbtbkr_511_(
5328 &self,
5329 ) -> &'static crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW> {
5330 unsafe {
5331 crate::common::Reg::<self::Vbtbkr_SPEC, crate::common::RW>::from_ptr(
5332 self._svd2pac_as_ptr().add(0x6ffusize),
5333 )
5334 }
5335 }
5336
5337 #[doc = "Reset Status Register 0"]
5338 #[inline(always)]
5339 pub const fn rstsr0(
5340 &self,
5341 ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
5342 unsafe {
5343 crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
5344 self._svd2pac_as_ptr().add(1040usize),
5345 )
5346 }
5347 }
5348
5349 #[doc = "Reset Status Register 2"]
5350 #[inline(always)]
5351 pub const fn rstsr2(
5352 &self,
5353 ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
5354 unsafe {
5355 crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
5356 self._svd2pac_as_ptr().add(1041usize),
5357 )
5358 }
5359 }
5360
5361 #[doc = "Reset Status Register 1"]
5362 #[inline(always)]
5363 pub const fn rstsr1(
5364 &self,
5365 ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
5366 unsafe {
5367 crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
5368 self._svd2pac_as_ptr().add(192usize),
5369 )
5370 }
5371 }
5372
5373 #[doc = "Protect Register"]
5374 #[inline(always)]
5375 pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
5376 unsafe {
5377 crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
5378 self._svd2pac_as_ptr().add(1022usize),
5379 )
5380 }
5381 }
5382
5383 #[doc = "Standby Control Register"]
5384 #[inline(always)]
5385 pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
5386 unsafe {
5387 crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
5388 self._svd2pac_as_ptr().add(12usize),
5389 )
5390 }
5391 }
5392
5393 #[doc = "Module Stop Control Register A"]
5394 #[inline(always)]
5395 pub const fn mstpcra(
5396 &self,
5397 ) -> &'static crate::common::Reg<self::Mstpcra_SPEC, crate::common::RW> {
5398 unsafe {
5399 crate::common::Reg::<self::Mstpcra_SPEC, crate::common::RW>::from_ptr(
5400 self._svd2pac_as_ptr().add(28usize),
5401 )
5402 }
5403 }
5404
5405 #[doc = "Snooze Control Register"]
5406 #[inline(always)]
5407 pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
5408 unsafe {
5409 crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
5410 self._svd2pac_as_ptr().add(146usize),
5411 )
5412 }
5413 }
5414
5415 #[doc = "Snooze End Control Register"]
5416 #[inline(always)]
5417 pub const fn snzedcr(
5418 &self,
5419 ) -> &'static crate::common::Reg<self::Snzedcr_SPEC, crate::common::RW> {
5420 unsafe {
5421 crate::common::Reg::<self::Snzedcr_SPEC, crate::common::RW>::from_ptr(
5422 self._svd2pac_as_ptr().add(148usize),
5423 )
5424 }
5425 }
5426
5427 #[doc = "Snooze Request Control Register"]
5428 #[inline(always)]
5429 pub const fn snzreqcr(
5430 &self,
5431 ) -> &'static crate::common::Reg<self::Snzreqcr_SPEC, crate::common::RW> {
5432 unsafe {
5433 crate::common::Reg::<self::Snzreqcr_SPEC, crate::common::RW>::from_ptr(
5434 self._svd2pac_as_ptr().add(152usize),
5435 )
5436 }
5437 }
5438
5439 #[doc = "Power Save Memory Control Register"]
5440 #[inline(always)]
5441 pub const fn psmcr(&self) -> &'static crate::common::Reg<self::Psmcr_SPEC, crate::common::RW> {
5442 unsafe {
5443 crate::common::Reg::<self::Psmcr_SPEC, crate::common::RW>::from_ptr(
5444 self._svd2pac_as_ptr().add(159usize),
5445 )
5446 }
5447 }
5448
5449 #[doc = "Flash Operation Control Register"]
5450 #[inline(always)]
5451 pub const fn flstop(
5452 &self,
5453 ) -> &'static crate::common::Reg<self::Flstop_SPEC, crate::common::RW> {
5454 unsafe {
5455 crate::common::Reg::<self::Flstop_SPEC, crate::common::RW>::from_ptr(
5456 self._svd2pac_as_ptr().add(158usize),
5457 )
5458 }
5459 }
5460
5461 #[doc = "Operating Power Control Register"]
5462 #[inline(always)]
5463 pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
5464 unsafe {
5465 crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
5466 self._svd2pac_as_ptr().add(160usize),
5467 )
5468 }
5469 }
5470
5471 #[doc = "Sub Operating Power Control Register"]
5472 #[inline(always)]
5473 pub const fn sopccr(
5474 &self,
5475 ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
5476 unsafe {
5477 crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
5478 self._svd2pac_as_ptr().add(170usize),
5479 )
5480 }
5481 }
5482
5483 #[doc = "System Control OCD Control Register"]
5484 #[inline(always)]
5485 pub const fn syocdcr(
5486 &self,
5487 ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
5488 unsafe {
5489 crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
5490 self._svd2pac_as_ptr().add(1038usize),
5491 )
5492 }
5493 }
5494
5495 #[doc = "System Clock Division Control Register"]
5496 #[inline(always)]
5497 pub const fn sckdivcr(
5498 &self,
5499 ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
5500 unsafe {
5501 crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
5502 self._svd2pac_as_ptr().add(32usize),
5503 )
5504 }
5505 }
5506
5507 #[doc = "System Clock Source Control Register"]
5508 #[inline(always)]
5509 pub const fn sckscr(
5510 &self,
5511 ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
5512 unsafe {
5513 crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
5514 self._svd2pac_as_ptr().add(38usize),
5515 )
5516 }
5517 }
5518
5519 #[doc = "PLL Control Register"]
5520 #[inline(always)]
5521 pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
5522 unsafe {
5523 crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
5524 self._svd2pac_as_ptr().add(42usize),
5525 )
5526 }
5527 }
5528
5529 #[doc = "PLL Clock Control Register2"]
5530 #[inline(always)]
5531 pub const fn pllccr2(
5532 &self,
5533 ) -> &'static crate::common::Reg<self::Pllccr2_SPEC, crate::common::RW> {
5534 unsafe {
5535 crate::common::Reg::<self::Pllccr2_SPEC, crate::common::RW>::from_ptr(
5536 self._svd2pac_as_ptr().add(43usize),
5537 )
5538 }
5539 }
5540
5541 #[doc = "External Bus Clock Control Register"]
5542 #[inline(always)]
5543 pub const fn bckcr(&self) -> &'static crate::common::Reg<self::Bckcr_SPEC, crate::common::RW> {
5544 unsafe {
5545 crate::common::Reg::<self::Bckcr_SPEC, crate::common::RW>::from_ptr(
5546 self._svd2pac_as_ptr().add(48usize),
5547 )
5548 }
5549 }
5550
5551 #[doc = "Memory Wait Cycle Control Register"]
5552 #[inline(always)]
5553 pub const fn memwait(
5554 &self,
5555 ) -> &'static crate::common::Reg<self::Memwait_SPEC, crate::common::RW> {
5556 unsafe {
5557 crate::common::Reg::<self::Memwait_SPEC, crate::common::RW>::from_ptr(
5558 self._svd2pac_as_ptr().add(49usize),
5559 )
5560 }
5561 }
5562
5563 #[doc = "Main Clock Oscillator Control Register"]
5564 #[inline(always)]
5565 pub const fn mosccr(
5566 &self,
5567 ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
5568 unsafe {
5569 crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
5570 self._svd2pac_as_ptr().add(50usize),
5571 )
5572 }
5573 }
5574
5575 #[doc = "High-Speed On-Chip Oscillator Control Register"]
5576 #[inline(always)]
5577 pub const fn hococr(
5578 &self,
5579 ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
5580 unsafe {
5581 crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
5582 self._svd2pac_as_ptr().add(54usize),
5583 )
5584 }
5585 }
5586
5587 #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
5588 #[inline(always)]
5589 pub const fn mococr(
5590 &self,
5591 ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
5592 unsafe {
5593 crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
5594 self._svd2pac_as_ptr().add(56usize),
5595 )
5596 }
5597 }
5598
5599 #[doc = "Oscillation Stabilization Flag Register"]
5600 #[inline(always)]
5601 pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
5602 unsafe {
5603 crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
5604 self._svd2pac_as_ptr().add(60usize),
5605 )
5606 }
5607 }
5608
5609 #[doc = "Clock Out Control Register"]
5610 #[inline(always)]
5611 pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
5612 unsafe {
5613 crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
5614 self._svd2pac_as_ptr().add(62usize),
5615 )
5616 }
5617 }
5618
5619 #[doc = "Trace Clock Control Register"]
5620 #[inline(always)]
5621 pub const fn trckcr(
5622 &self,
5623 ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
5624 unsafe {
5625 crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
5626 self._svd2pac_as_ptr().add(63usize),
5627 )
5628 }
5629 }
5630
5631 #[doc = "Oscillation Stop Detection Control Register"]
5632 #[inline(always)]
5633 pub const fn ostdcr(
5634 &self,
5635 ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
5636 unsafe {
5637 crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
5638 self._svd2pac_as_ptr().add(64usize),
5639 )
5640 }
5641 }
5642
5643 #[doc = "Oscillation Stop Detection Status Register"]
5644 #[inline(always)]
5645 pub const fn ostdsr(
5646 &self,
5647 ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
5648 unsafe {
5649 crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
5650 self._svd2pac_as_ptr().add(65usize),
5651 )
5652 }
5653 }
5654
5655 #[doc = "Segment LCD Source Clock Control Register"]
5656 #[inline(always)]
5657 pub const fn slcdsckcr(
5658 &self,
5659 ) -> &'static crate::common::Reg<self::Slcdsckcr_SPEC, crate::common::RW> {
5660 unsafe {
5661 crate::common::Reg::<self::Slcdsckcr_SPEC, crate::common::RW>::from_ptr(
5662 self._svd2pac_as_ptr().add(80usize),
5663 )
5664 }
5665 }
5666
5667 #[doc = "External Bus Clock Output Control Register"]
5668 #[inline(always)]
5669 pub const fn ebckocr(
5670 &self,
5671 ) -> &'static crate::common::Reg<self::Ebckocr_SPEC, crate::common::RW> {
5672 unsafe {
5673 crate::common::Reg::<self::Ebckocr_SPEC, crate::common::RW>::from_ptr(
5674 self._svd2pac_as_ptr().add(82usize),
5675 )
5676 }
5677 }
5678
5679 #[doc = "MOCO User Trimming Control Register"]
5680 #[inline(always)]
5681 pub const fn mocoutcr(
5682 &self,
5683 ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
5684 unsafe {
5685 crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
5686 self._svd2pac_as_ptr().add(97usize),
5687 )
5688 }
5689 }
5690
5691 #[doc = "HOCO User Trimming Control Register"]
5692 #[inline(always)]
5693 pub const fn hocoutcr(
5694 &self,
5695 ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
5696 unsafe {
5697 crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
5698 self._svd2pac_as_ptr().add(98usize),
5699 )
5700 }
5701 }
5702
5703 #[doc = "Main Clock Oscillator Wait Control Register"]
5704 #[inline(always)]
5705 pub const fn moscwtcr(
5706 &self,
5707 ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
5708 unsafe {
5709 crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
5710 self._svd2pac_as_ptr().add(162usize),
5711 )
5712 }
5713 }
5714
5715 #[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
5716 #[inline(always)]
5717 pub const fn hocowtcr(
5718 &self,
5719 ) -> &'static crate::common::Reg<self::Hocowtcr_SPEC, crate::common::RW> {
5720 unsafe {
5721 crate::common::Reg::<self::Hocowtcr_SPEC, crate::common::RW>::from_ptr(
5722 self._svd2pac_as_ptr().add(165usize),
5723 )
5724 }
5725 }
5726
5727 #[doc = "USB Clock Control register"]
5728 #[inline(always)]
5729 pub const fn usbckcr(
5730 &self,
5731 ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
5732 unsafe {
5733 crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
5734 self._svd2pac_as_ptr().add(208usize),
5735 )
5736 }
5737 }
5738
5739 #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
5740 #[inline(always)]
5741 pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
5742 unsafe {
5743 crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
5744 self._svd2pac_as_ptr().add(1043usize),
5745 )
5746 }
5747 }
5748
5749 #[doc = "Sub-Clock Oscillator Control Register"]
5750 #[inline(always)]
5751 pub const fn sosccr(
5752 &self,
5753 ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
5754 unsafe {
5755 crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
5756 self._svd2pac_as_ptr().add(1152usize),
5757 )
5758 }
5759 }
5760
5761 #[doc = "Sub Clock Oscillator Mode Control Register"]
5762 #[inline(always)]
5763 pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
5764 unsafe {
5765 crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
5766 self._svd2pac_as_ptr().add(1153usize),
5767 )
5768 }
5769 }
5770
5771 #[doc = "Low-Speed On-Chip Oscillator Control Register"]
5772 #[inline(always)]
5773 pub const fn lococr(
5774 &self,
5775 ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
5776 unsafe {
5777 crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
5778 self._svd2pac_as_ptr().add(1168usize),
5779 )
5780 }
5781 }
5782
5783 #[doc = "LOCO User Trimming Control Register"]
5784 #[inline(always)]
5785 pub const fn locoutcr(
5786 &self,
5787 ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
5788 unsafe {
5789 crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
5790 self._svd2pac_as_ptr().add(1170usize),
5791 )
5792 }
5793 }
5794
5795 #[doc = "Backup Register Access Control Register"]
5796 #[inline(always)]
5797 pub const fn bkracr(
5798 &self,
5799 ) -> &'static crate::common::Reg<self::Bkracr_SPEC, crate::common::RW> {
5800 unsafe {
5801 crate::common::Reg::<self::Bkracr_SPEC, crate::common::RW>::from_ptr(
5802 self._svd2pac_as_ptr().add(198usize),
5803 )
5804 }
5805 }
5806
5807 #[doc = "Voltage Monitor Circuit Control Register"]
5808 #[inline(always)]
5809 pub const fn lvcmpcr(
5810 &self,
5811 ) -> &'static crate::common::Reg<self::Lvcmpcr_SPEC, crate::common::RW> {
5812 unsafe {
5813 crate::common::Reg::<self::Lvcmpcr_SPEC, crate::common::RW>::from_ptr(
5814 self._svd2pac_as_ptr().add(1047usize),
5815 )
5816 }
5817 }
5818
5819 #[doc = "Voltage Detection Level Select Register"]
5820 #[inline(always)]
5821 pub const fn lvdlvlr(
5822 &self,
5823 ) -> &'static crate::common::Reg<self::Lvdlvlr_SPEC, crate::common::RW> {
5824 unsafe {
5825 crate::common::Reg::<self::Lvdlvlr_SPEC, crate::common::RW>::from_ptr(
5826 self._svd2pac_as_ptr().add(1048usize),
5827 )
5828 }
5829 }
5830
5831 #[doc = "Voltage Monitor %s Circuit Control Register 0"]
5832 #[inline(always)]
5833 pub const fn lvdcr0(
5834 &self,
5835 ) -> &'static crate::common::ClusterRegisterArray<
5836 crate::common::Reg<self::Lvdcr0_SPEC, crate::common::RW>,
5837 2,
5838 0x1,
5839 > {
5840 unsafe {
5841 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x41ausize))
5842 }
5843 }
5844 #[inline(always)]
5845 pub const fn lvd1cr0(
5846 &self,
5847 ) -> &'static crate::common::Reg<self::Lvdcr0_SPEC, crate::common::RW> {
5848 unsafe {
5849 crate::common::Reg::<self::Lvdcr0_SPEC, crate::common::RW>::from_ptr(
5850 self._svd2pac_as_ptr().add(0x41ausize),
5851 )
5852 }
5853 }
5854 #[inline(always)]
5855 pub const fn lvd2cr0(
5856 &self,
5857 ) -> &'static crate::common::Reg<self::Lvdcr0_SPEC, crate::common::RW> {
5858 unsafe {
5859 crate::common::Reg::<self::Lvdcr0_SPEC, crate::common::RW>::from_ptr(
5860 self._svd2pac_as_ptr().add(0x41busize),
5861 )
5862 }
5863 }
5864
5865 #[doc = "Voltage Monitor %s Circuit Control Register 1"]
5866 #[inline(always)]
5867 pub const fn lvdcr1(
5868 &self,
5869 ) -> &'static crate::common::ClusterRegisterArray<
5870 crate::common::Reg<self::Lvdcr1_SPEC, crate::common::RW>,
5871 2,
5872 0x2,
5873 > {
5874 unsafe {
5875 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe0usize))
5876 }
5877 }
5878 #[inline(always)]
5879 pub const fn lvd1cr1(
5880 &self,
5881 ) -> &'static crate::common::Reg<self::Lvdcr1_SPEC, crate::common::RW> {
5882 unsafe {
5883 crate::common::Reg::<self::Lvdcr1_SPEC, crate::common::RW>::from_ptr(
5884 self._svd2pac_as_ptr().add(0xe0usize),
5885 )
5886 }
5887 }
5888 #[inline(always)]
5889 pub const fn lvd2cr1(
5890 &self,
5891 ) -> &'static crate::common::Reg<self::Lvdcr1_SPEC, crate::common::RW> {
5892 unsafe {
5893 crate::common::Reg::<self::Lvdcr1_SPEC, crate::common::RW>::from_ptr(
5894 self._svd2pac_as_ptr().add(0xe2usize),
5895 )
5896 }
5897 }
5898
5899 #[doc = "Voltage Monitor %s Circuit Status Register"]
5900 #[inline(always)]
5901 pub const fn lvdsr(
5902 &self,
5903 ) -> &'static crate::common::ClusterRegisterArray<
5904 crate::common::Reg<self::Lvdsr_SPEC, crate::common::RW>,
5905 2,
5906 0x2,
5907 > {
5908 unsafe {
5909 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe1usize))
5910 }
5911 }
5912 #[inline(always)]
5913 pub const fn lvd1sr(&self) -> &'static crate::common::Reg<self::Lvdsr_SPEC, crate::common::RW> {
5914 unsafe {
5915 crate::common::Reg::<self::Lvdsr_SPEC, crate::common::RW>::from_ptr(
5916 self._svd2pac_as_ptr().add(0xe1usize),
5917 )
5918 }
5919 }
5920 #[inline(always)]
5921 pub const fn lvd2sr(&self) -> &'static crate::common::Reg<self::Lvdsr_SPEC, crate::common::RW> {
5922 unsafe {
5923 crate::common::Reg::<self::Lvdsr_SPEC, crate::common::RW>::from_ptr(
5924 self._svd2pac_as_ptr().add(0xe3usize),
5925 )
5926 }
5927 }
5928}
5929#[doc(hidden)]
5930#[derive(Copy, Clone, Eq, PartialEq)]
5931pub struct Vbtcr1_SPEC;
5932impl crate::sealed::RegSpec for Vbtcr1_SPEC {
5933 type DataType = u8;
5934}
5935
5936#[doc = "VBATT Control Register1"]
5937pub type Vbtcr1 = crate::RegValueT<Vbtcr1_SPEC>;
5938
5939impl Vbtcr1 {
5940 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
5941 #[inline(always)]
5942 pub fn reserved(
5943 self,
5944 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Vbtcr1_SPEC, crate::common::RW> {
5945 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Vbtcr1_SPEC,crate::common::RW>::from_register(self,0)
5946 }
5947
5948 #[doc = "Battery Power supply Switch Stop"]
5949 #[inline(always)]
5950 pub fn bpwswstp(
5951 self,
5952 ) -> crate::common::RegisterField<
5953 0,
5954 0x1,
5955 1,
5956 0,
5957 vbtcr1::Bpwswstp,
5958 vbtcr1::Bpwswstp,
5959 Vbtcr1_SPEC,
5960 crate::common::RW,
5961 > {
5962 crate::common::RegisterField::<
5963 0,
5964 0x1,
5965 1,
5966 0,
5967 vbtcr1::Bpwswstp,
5968 vbtcr1::Bpwswstp,
5969 Vbtcr1_SPEC,
5970 crate::common::RW,
5971 >::from_register(self, 0)
5972 }
5973}
5974impl ::core::default::Default for Vbtcr1 {
5975 #[inline(always)]
5976 fn default() -> Vbtcr1 {
5977 <crate::RegValueT<Vbtcr1_SPEC> as RegisterValue<_>>::new(0)
5978 }
5979}
5980pub mod vbtcr1 {
5981
5982 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5983 pub struct Bpwswstp_SPEC;
5984 pub type Bpwswstp = crate::EnumBitfieldStruct<u8, Bpwswstp_SPEC>;
5985 impl Bpwswstp {
5986 #[doc = "Battery Power supply Switch Enable"]
5987 pub const _0: Self = Self::new(0);
5988
5989 #[doc = "Battery Power supply Switch stop"]
5990 pub const _1: Self = Self::new(1);
5991 }
5992}
5993#[doc(hidden)]
5994#[derive(Copy, Clone, Eq, PartialEq)]
5995pub struct Vbtcr2_SPEC;
5996impl crate::sealed::RegSpec for Vbtcr2_SPEC {
5997 type DataType = u8;
5998}
5999
6000#[doc = "VBATT Control Register2"]
6001pub type Vbtcr2 = crate::RegValueT<Vbtcr2_SPEC>;
6002
6003impl Vbtcr2 {
6004 #[doc = "VBATT Pin Voltage Low Voltage Detect Level Select Bit"]
6005 #[inline(always)]
6006 pub fn vbtlvdlvl(
6007 self,
6008 ) -> crate::common::RegisterField<
6009 6,
6010 0x3,
6011 1,
6012 0,
6013 vbtcr2::Vbtlvdlvl,
6014 vbtcr2::Vbtlvdlvl,
6015 Vbtcr2_SPEC,
6016 crate::common::RW,
6017 > {
6018 crate::common::RegisterField::<
6019 6,
6020 0x3,
6021 1,
6022 0,
6023 vbtcr2::Vbtlvdlvl,
6024 vbtcr2::Vbtlvdlvl,
6025 Vbtcr2_SPEC,
6026 crate::common::RW,
6027 >::from_register(self, 0)
6028 }
6029
6030 #[doc = "VBATT Pin Low Voltage Detect Enable Bit"]
6031 #[inline(always)]
6032 pub fn vbtlvden(
6033 self,
6034 ) -> crate::common::RegisterField<
6035 4,
6036 0x1,
6037 1,
6038 0,
6039 vbtcr2::Vbtlvden,
6040 vbtcr2::Vbtlvden,
6041 Vbtcr2_SPEC,
6042 crate::common::RW,
6043 > {
6044 crate::common::RegisterField::<
6045 4,
6046 0x1,
6047 1,
6048 0,
6049 vbtcr2::Vbtlvden,
6050 vbtcr2::Vbtlvden,
6051 Vbtcr2_SPEC,
6052 crate::common::RW,
6053 >::from_register(self, 0)
6054 }
6055
6056 #[doc = "These bits are read as 0000. The write value should be 0000."]
6057 #[inline(always)]
6058 pub fn reserved(
6059 self,
6060 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Vbtcr2_SPEC, crate::common::RW> {
6061 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Vbtcr2_SPEC,crate::common::RW>::from_register(self,0)
6062 }
6063}
6064impl ::core::default::Default for Vbtcr2 {
6065 #[inline(always)]
6066 fn default() -> Vbtcr2 {
6067 <crate::RegValueT<Vbtcr2_SPEC> as RegisterValue<_>>::new(0)
6068 }
6069}
6070pub mod vbtcr2 {
6071
6072 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6073 pub struct Vbtlvdlvl_SPEC;
6074 pub type Vbtlvdlvl = crate::EnumBitfieldStruct<u8, Vbtlvdlvl_SPEC>;
6075 impl Vbtlvdlvl {
6076 #[doc = "2.7V"]
6077 pub const _00: Self = Self::new(0);
6078
6079 #[doc = "Setting prohibited"]
6080 pub const _01: Self = Self::new(1);
6081
6082 #[doc = "2.3V"]
6083 pub const _10: Self = Self::new(2);
6084
6085 #[doc = "2.1V"]
6086 pub const _11: Self = Self::new(3);
6087 }
6088 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6089 pub struct Vbtlvden_SPEC;
6090 pub type Vbtlvden = crate::EnumBitfieldStruct<u8, Vbtlvden_SPEC>;
6091 impl Vbtlvden {
6092 #[doc = "VBATT pin low voltage detect disable"]
6093 pub const _0: Self = Self::new(0);
6094
6095 #[doc = "VBATT pin low voltage detect enable"]
6096 pub const _1: Self = Self::new(1);
6097 }
6098}
6099#[doc(hidden)]
6100#[derive(Copy, Clone, Eq, PartialEq)]
6101pub struct Vbtsr_SPEC;
6102impl crate::sealed::RegSpec for Vbtsr_SPEC {
6103 type DataType = u8;
6104}
6105
6106#[doc = "VBATT Status Register"]
6107pub type Vbtsr = crate::RegValueT<Vbtsr_SPEC>;
6108
6109impl Vbtsr {
6110 #[doc = "VBATT_R Valid"]
6111 #[inline(always)]
6112 pub fn vbtrvld(
6113 self,
6114 ) -> crate::common::RegisterField<
6115 4,
6116 0x1,
6117 1,
6118 0,
6119 vbtsr::Vbtrvld,
6120 vbtsr::Vbtrvld,
6121 Vbtsr_SPEC,
6122 crate::common::R,
6123 > {
6124 crate::common::RegisterField::<
6125 4,
6126 0x1,
6127 1,
6128 0,
6129 vbtsr::Vbtrvld,
6130 vbtsr::Vbtrvld,
6131 Vbtsr_SPEC,
6132 crate::common::R,
6133 >::from_register(self, 0)
6134 }
6135
6136 #[doc = "These bits are read as 00. The write value should be 00."]
6137 #[inline(always)]
6138 pub fn reserved(
6139 self,
6140 ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Vbtsr_SPEC, crate::common::RW> {
6141 crate::common::RegisterField::<2,0x3,1,0,u8,u8,Vbtsr_SPEC,crate::common::RW>::from_register(self,0)
6142 }
6143
6144 #[doc = "VBATT Battery Low voltage Detect Flag"]
6145 #[inline(always)]
6146 pub fn vbtbldf(
6147 self,
6148 ) -> crate::common::RegisterField<
6149 1,
6150 0x1,
6151 1,
6152 0,
6153 vbtsr::Vbtbldf,
6154 vbtsr::Vbtbldf,
6155 Vbtsr_SPEC,
6156 crate::common::RW,
6157 > {
6158 crate::common::RegisterField::<
6159 1,
6160 0x1,
6161 1,
6162 0,
6163 vbtsr::Vbtbldf,
6164 vbtsr::Vbtbldf,
6165 Vbtsr_SPEC,
6166 crate::common::RW,
6167 >::from_register(self, 0)
6168 }
6169
6170 #[doc = "VBAT_R Reset Detect Flag"]
6171 #[inline(always)]
6172 pub fn vbtrdf(
6173 self,
6174 ) -> crate::common::RegisterField<
6175 0,
6176 0x1,
6177 1,
6178 0,
6179 vbtsr::Vbtrdf,
6180 vbtsr::Vbtrdf,
6181 Vbtsr_SPEC,
6182 crate::common::RW,
6183 > {
6184 crate::common::RegisterField::<
6185 0,
6186 0x1,
6187 1,
6188 0,
6189 vbtsr::Vbtrdf,
6190 vbtsr::Vbtrdf,
6191 Vbtsr_SPEC,
6192 crate::common::RW,
6193 >::from_register(self, 0)
6194 }
6195}
6196impl ::core::default::Default for Vbtsr {
6197 #[inline(always)]
6198 fn default() -> Vbtsr {
6199 <crate::RegValueT<Vbtsr_SPEC> as RegisterValue<_>>::new(0)
6200 }
6201}
6202pub mod vbtsr {
6203
6204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6205 pub struct Vbtrvld_SPEC;
6206 pub type Vbtrvld = crate::EnumBitfieldStruct<u8, Vbtrvld_SPEC>;
6207 impl Vbtrvld {
6208 #[doc = "VBATT_R area not valid"]
6209 pub const _0: Self = Self::new(0);
6210
6211 #[doc = "VBATT_R area valid"]
6212 pub const _1: Self = Self::new(1);
6213 }
6214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6215 pub struct Vbtbldf_SPEC;
6216 pub type Vbtbldf = crate::EnumBitfieldStruct<u8, Vbtbldf_SPEC>;
6217 impl Vbtbldf {
6218 #[doc = "VBATT pin low voltage not detected"]
6219 pub const _0: Self = Self::new(0);
6220
6221 #[doc = "VBATT pin low voltage detected."]
6222 pub const _1: Self = Self::new(1);
6223 }
6224 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6225 pub struct Vbtrdf_SPEC;
6226 pub type Vbtrdf = crate::EnumBitfieldStruct<u8, Vbtrdf_SPEC>;
6227 impl Vbtrdf {
6228 #[doc = "VBATT_R voltage power-on reset not detected"]
6229 pub const _0: Self = Self::new(0);
6230
6231 #[doc = "VBATT_R selected voltage power-on reset detected."]
6232 pub const _1: Self = Self::new(1);
6233 }
6234}
6235#[doc(hidden)]
6236#[derive(Copy, Clone, Eq, PartialEq)]
6237pub struct Vbtcmpcr_SPEC;
6238impl crate::sealed::RegSpec for Vbtcmpcr_SPEC {
6239 type DataType = u8;
6240}
6241
6242#[doc = "VBATT Comparator Control Register"]
6243pub type Vbtcmpcr = crate::RegValueT<Vbtcmpcr_SPEC>;
6244
6245impl Vbtcmpcr {
6246 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
6247 #[inline(always)]
6248 pub fn reserved(
6249 self,
6250 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Vbtcmpcr_SPEC, crate::common::RW> {
6251 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Vbtcmpcr_SPEC,crate::common::RW>::from_register(self,0)
6252 }
6253
6254 #[doc = "VBATT pin low voltage detect circuit output enable"]
6255 #[inline(always)]
6256 pub fn vbtcmpe(
6257 self,
6258 ) -> crate::common::RegisterField<
6259 0,
6260 0x1,
6261 1,
6262 0,
6263 vbtcmpcr::Vbtcmpe,
6264 vbtcmpcr::Vbtcmpe,
6265 Vbtcmpcr_SPEC,
6266 crate::common::RW,
6267 > {
6268 crate::common::RegisterField::<
6269 0,
6270 0x1,
6271 1,
6272 0,
6273 vbtcmpcr::Vbtcmpe,
6274 vbtcmpcr::Vbtcmpe,
6275 Vbtcmpcr_SPEC,
6276 crate::common::RW,
6277 >::from_register(self, 0)
6278 }
6279}
6280impl ::core::default::Default for Vbtcmpcr {
6281 #[inline(always)]
6282 fn default() -> Vbtcmpcr {
6283 <crate::RegValueT<Vbtcmpcr_SPEC> as RegisterValue<_>>::new(0)
6284 }
6285}
6286pub mod vbtcmpcr {
6287
6288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6289 pub struct Vbtcmpe_SPEC;
6290 pub type Vbtcmpe = crate::EnumBitfieldStruct<u8, Vbtcmpe_SPEC>;
6291 impl Vbtcmpe {
6292 #[doc = "VBATT pin low voltage detect circuit output disabled"]
6293 pub const _0: Self = Self::new(0);
6294
6295 #[doc = "VBATT pin low voltage detect circuit output enabled"]
6296 pub const _1: Self = Self::new(1);
6297 }
6298}
6299#[doc(hidden)]
6300#[derive(Copy, Clone, Eq, PartialEq)]
6301pub struct Vbtlvdicr_SPEC;
6302impl crate::sealed::RegSpec for Vbtlvdicr_SPEC {
6303 type DataType = u8;
6304}
6305
6306#[doc = "VBATT Pin Low Voltage Detect Interrupt Control Register"]
6307pub type Vbtlvdicr = crate::RegValueT<Vbtlvdicr_SPEC>;
6308
6309impl Vbtlvdicr {
6310 #[doc = "These bits are read as 000000. The write value should be 000000."]
6311 #[inline(always)]
6312 pub fn reserved(
6313 self,
6314 ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Vbtlvdicr_SPEC, crate::common::RW>
6315 {
6316 crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Vbtlvdicr_SPEC,crate::common::RW>::from_register(self,0)
6317 }
6318
6319 #[doc = "Pin Low Voltage Detect Interrupt Select bit"]
6320 #[inline(always)]
6321 pub fn vbtlvdisel(
6322 self,
6323 ) -> crate::common::RegisterField<
6324 1,
6325 0x1,
6326 1,
6327 0,
6328 vbtlvdicr::Vbtlvdisel,
6329 vbtlvdicr::Vbtlvdisel,
6330 Vbtlvdicr_SPEC,
6331 crate::common::RW,
6332 > {
6333 crate::common::RegisterField::<
6334 1,
6335 0x1,
6336 1,
6337 0,
6338 vbtlvdicr::Vbtlvdisel,
6339 vbtlvdicr::Vbtlvdisel,
6340 Vbtlvdicr_SPEC,
6341 crate::common::RW,
6342 >::from_register(self, 0)
6343 }
6344
6345 #[doc = "VBATT Pin Low Voltage Detect Interrupt Enable bit"]
6346 #[inline(always)]
6347 pub fn vbtlvdie(
6348 self,
6349 ) -> crate::common::RegisterField<
6350 0,
6351 0x1,
6352 1,
6353 0,
6354 vbtlvdicr::Vbtlvdie,
6355 vbtlvdicr::Vbtlvdie,
6356 Vbtlvdicr_SPEC,
6357 crate::common::RW,
6358 > {
6359 crate::common::RegisterField::<
6360 0,
6361 0x1,
6362 1,
6363 0,
6364 vbtlvdicr::Vbtlvdie,
6365 vbtlvdicr::Vbtlvdie,
6366 Vbtlvdicr_SPEC,
6367 crate::common::RW,
6368 >::from_register(self, 0)
6369 }
6370}
6371impl ::core::default::Default for Vbtlvdicr {
6372 #[inline(always)]
6373 fn default() -> Vbtlvdicr {
6374 <crate::RegValueT<Vbtlvdicr_SPEC> as RegisterValue<_>>::new(0)
6375 }
6376}
6377pub mod vbtlvdicr {
6378
6379 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6380 pub struct Vbtlvdisel_SPEC;
6381 pub type Vbtlvdisel = crate::EnumBitfieldStruct<u8, Vbtlvdisel_SPEC>;
6382 impl Vbtlvdisel {
6383 #[doc = "Non Maskable Interrupt"]
6384 pub const _0: Self = Self::new(0);
6385
6386 #[doc = "Maskable Interrupt"]
6387 pub const _1: Self = Self::new(1);
6388 }
6389 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6390 pub struct Vbtlvdie_SPEC;
6391 pub type Vbtlvdie = crate::EnumBitfieldStruct<u8, Vbtlvdie_SPEC>;
6392 impl Vbtlvdie {
6393 #[doc = "VBATT Pin Low Voltage Detect Interrupt Disable"]
6394 pub const _0: Self = Self::new(0);
6395
6396 #[doc = "VBATT Pin Low Voltage Detect Interrupt Enable"]
6397 pub const _1: Self = Self::new(1);
6398 }
6399}
6400#[doc(hidden)]
6401#[derive(Copy, Clone, Eq, PartialEq)]
6402pub struct Vbtwctlr_SPEC;
6403impl crate::sealed::RegSpec for Vbtwctlr_SPEC {
6404 type DataType = u8;
6405}
6406
6407#[doc = "VBATT Wakeup function Control Register"]
6408pub type Vbtwctlr = crate::RegValueT<Vbtwctlr_SPEC>;
6409
6410impl Vbtwctlr {
6411 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
6412 #[inline(always)]
6413 pub fn reserved(
6414 self,
6415 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Vbtwctlr_SPEC, crate::common::RW> {
6416 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Vbtwctlr_SPEC,crate::common::RW>::from_register(self,0)
6417 }
6418
6419 #[doc = "VBATT wakeup enable"]
6420 #[inline(always)]
6421 pub fn vwen(
6422 self,
6423 ) -> crate::common::RegisterField<
6424 0,
6425 0x1,
6426 1,
6427 0,
6428 vbtwctlr::Vwen,
6429 vbtwctlr::Vwen,
6430 Vbtwctlr_SPEC,
6431 crate::common::RW,
6432 > {
6433 crate::common::RegisterField::<
6434 0,
6435 0x1,
6436 1,
6437 0,
6438 vbtwctlr::Vwen,
6439 vbtwctlr::Vwen,
6440 Vbtwctlr_SPEC,
6441 crate::common::RW,
6442 >::from_register(self, 0)
6443 }
6444}
6445impl ::core::default::Default for Vbtwctlr {
6446 #[inline(always)]
6447 fn default() -> Vbtwctlr {
6448 <crate::RegValueT<Vbtwctlr_SPEC> as RegisterValue<_>>::new(0)
6449 }
6450}
6451pub mod vbtwctlr {
6452
6453 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6454 pub struct Vwen_SPEC;
6455 pub type Vwen = crate::EnumBitfieldStruct<u8, Vwen_SPEC>;
6456 impl Vwen {
6457 #[doc = "Disable Wakeup function"]
6458 pub const _0: Self = Self::new(0);
6459
6460 #[doc = "Enable Wakeup function"]
6461 pub const _1: Self = Self::new(1);
6462 }
6463}
6464#[doc(hidden)]
6465#[derive(Copy, Clone, Eq, PartialEq)]
6466pub struct Vbtwch0Otsr_SPEC;
6467impl crate::sealed::RegSpec for Vbtwch0Otsr_SPEC {
6468 type DataType = u8;
6469}
6470
6471#[doc = "VBATT Wakeup I/O 0 Output Trigger Select Register"]
6472pub type Vbtwch0Otsr = crate::RegValueT<Vbtwch0Otsr_SPEC>;
6473
6474impl Vbtwch0Otsr {
6475 #[doc = "VBATWIO0 Output RTC Alarm Signal Enable"]
6476 #[inline(always)]
6477 pub fn ch0vrtcate(
6478 self,
6479 ) -> crate::common::RegisterField<
6480 4,
6481 0x1,
6482 1,
6483 0,
6484 vbtwch0otsr::Ch0Vrtcate,
6485 vbtwch0otsr::Ch0Vrtcate,
6486 Vbtwch0Otsr_SPEC,
6487 crate::common::RW,
6488 > {
6489 crate::common::RegisterField::<
6490 4,
6491 0x1,
6492 1,
6493 0,
6494 vbtwch0otsr::Ch0Vrtcate,
6495 vbtwch0otsr::Ch0Vrtcate,
6496 Vbtwch0Otsr_SPEC,
6497 crate::common::RW,
6498 >::from_register(self, 0)
6499 }
6500
6501 #[doc = "VBATWIO0 Output RTC Periodic Signal Enable"]
6502 #[inline(always)]
6503 pub fn ch0vrtcte(
6504 self,
6505 ) -> crate::common::RegisterField<
6506 3,
6507 0x1,
6508 1,
6509 0,
6510 vbtwch0otsr::Ch0Vrtcte,
6511 vbtwch0otsr::Ch0Vrtcte,
6512 Vbtwch0Otsr_SPEC,
6513 crate::common::RW,
6514 > {
6515 crate::common::RegisterField::<
6516 3,
6517 0x1,
6518 1,
6519 0,
6520 vbtwch0otsr::Ch0Vrtcte,
6521 vbtwch0otsr::Ch0Vrtcte,
6522 Vbtwch0Otsr_SPEC,
6523 crate::common::RW,
6524 >::from_register(self, 0)
6525 }
6526
6527 #[doc = "VBATWIO0 Output VBATWIO2 Trigger Enable"]
6528 #[inline(always)]
6529 pub fn ch0vch2te(
6530 self,
6531 ) -> crate::common::RegisterField<
6532 2,
6533 0x1,
6534 1,
6535 0,
6536 vbtwch0otsr::Ch0Vch2Te,
6537 vbtwch0otsr::Ch0Vch2Te,
6538 Vbtwch0Otsr_SPEC,
6539 crate::common::RW,
6540 > {
6541 crate::common::RegisterField::<
6542 2,
6543 0x1,
6544 1,
6545 0,
6546 vbtwch0otsr::Ch0Vch2Te,
6547 vbtwch0otsr::Ch0Vch2Te,
6548 Vbtwch0Otsr_SPEC,
6549 crate::common::RW,
6550 >::from_register(self, 0)
6551 }
6552
6553 #[doc = "VBATWIO0 Output VBATWIO1 Trigger Enable"]
6554 #[inline(always)]
6555 pub fn ch0vch1te(
6556 self,
6557 ) -> crate::common::RegisterField<
6558 1,
6559 0x1,
6560 1,
6561 0,
6562 vbtwch0otsr::Ch0Vch1Te,
6563 vbtwch0otsr::Ch0Vch1Te,
6564 Vbtwch0Otsr_SPEC,
6565 crate::common::RW,
6566 > {
6567 crate::common::RegisterField::<
6568 1,
6569 0x1,
6570 1,
6571 0,
6572 vbtwch0otsr::Ch0Vch1Te,
6573 vbtwch0otsr::Ch0Vch1Te,
6574 Vbtwch0Otsr_SPEC,
6575 crate::common::RW,
6576 >::from_register(self, 0)
6577 }
6578
6579 #[doc = "This bit is read as 0. The write value should be 0."]
6580 #[inline(always)]
6581 pub fn reserved(
6582 self,
6583 ) -> crate::common::RegisterFieldBool<0, 1, 0, Vbtwch0Otsr_SPEC, crate::common::RW> {
6584 crate::common::RegisterFieldBool::<0,1,0,Vbtwch0Otsr_SPEC,crate::common::RW>::from_register(self,0)
6585 }
6586}
6587impl ::core::default::Default for Vbtwch0Otsr {
6588 #[inline(always)]
6589 fn default() -> Vbtwch0Otsr {
6590 <crate::RegValueT<Vbtwch0Otsr_SPEC> as RegisterValue<_>>::new(0)
6591 }
6592}
6593pub mod vbtwch0otsr {
6594
6595 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6596 pub struct Ch0Vrtcate_SPEC;
6597 pub type Ch0Vrtcate = crate::EnumBitfieldStruct<u8, Ch0Vrtcate_SPEC>;
6598 impl Ch0Vrtcate {
6599 #[doc = "VBATT wakeup I/O 0 output trigger by the RTC alarm signal is disabled"]
6600 pub const _0: Self = Self::new(0);
6601
6602 #[doc = "VBATT wakeup I/O 0 output trigger by the RTC alarm signal is enabled."]
6603 pub const _1: Self = Self::new(1);
6604 }
6605 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6606 pub struct Ch0Vrtcte_SPEC;
6607 pub type Ch0Vrtcte = crate::EnumBitfieldStruct<u8, Ch0Vrtcte_SPEC>;
6608 impl Ch0Vrtcte {
6609 #[doc = "VBATT wakeup I/O 0 output trigger by the RTC periodic signal is disabled"]
6610 pub const _0: Self = Self::new(0);
6611
6612 #[doc = "VBATT wakeup I/O 0 output trigger by the RTC periodic signal is enabled."]
6613 pub const _1: Self = Self::new(1);
6614 }
6615 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6616 pub struct Ch0Vch2Te_SPEC;
6617 pub type Ch0Vch2Te = crate::EnumBitfieldStruct<u8, Ch0Vch2Te_SPEC>;
6618 impl Ch0Vch2Te {
6619 #[doc = "VBATT wakeup I/O 0 output trigger by the VBATWIO2 pin is disabled"]
6620 pub const _0: Self = Self::new(0);
6621
6622 #[doc = "VBATT wakeup I/O 0 output trigger by the VBATWIO2 pin is enabled."]
6623 pub const _1: Self = Self::new(1);
6624 }
6625 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6626 pub struct Ch0Vch1Te_SPEC;
6627 pub type Ch0Vch1Te = crate::EnumBitfieldStruct<u8, Ch0Vch1Te_SPEC>;
6628 impl Ch0Vch1Te {
6629 #[doc = "VBATT wakeup I/O 0 output trigger by the VBATWIO1 pin is disabled"]
6630 pub const _0: Self = Self::new(0);
6631
6632 #[doc = "VBATT wakeup I/O 0 output trigger by the VBATWIO1 pin is enabled."]
6633 pub const _1: Self = Self::new(1);
6634 }
6635}
6636#[doc(hidden)]
6637#[derive(Copy, Clone, Eq, PartialEq)]
6638pub struct Vbtwch1Otsr_SPEC;
6639impl crate::sealed::RegSpec for Vbtwch1Otsr_SPEC {
6640 type DataType = u8;
6641}
6642
6643#[doc = "VBATT Wakeup I/O 1 Output Trigger Select Register"]
6644pub type Vbtwch1Otsr = crate::RegValueT<Vbtwch1Otsr_SPEC>;
6645
6646impl Vbtwch1Otsr {
6647 #[doc = "VBATWIO1 Output RTC Alarm Signal Enable"]
6648 #[inline(always)]
6649 pub fn ch1vrtcate(
6650 self,
6651 ) -> crate::common::RegisterField<
6652 4,
6653 0x1,
6654 1,
6655 0,
6656 vbtwch1otsr::Ch1Vrtcate,
6657 vbtwch1otsr::Ch1Vrtcate,
6658 Vbtwch1Otsr_SPEC,
6659 crate::common::RW,
6660 > {
6661 crate::common::RegisterField::<
6662 4,
6663 0x1,
6664 1,
6665 0,
6666 vbtwch1otsr::Ch1Vrtcate,
6667 vbtwch1otsr::Ch1Vrtcate,
6668 Vbtwch1Otsr_SPEC,
6669 crate::common::RW,
6670 >::from_register(self, 0)
6671 }
6672
6673 #[doc = "VBATWIO1 Output RTC Periodic Signal Enable"]
6674 #[inline(always)]
6675 pub fn ch1vrtcte(
6676 self,
6677 ) -> crate::common::RegisterField<
6678 3,
6679 0x1,
6680 1,
6681 0,
6682 vbtwch1otsr::Ch1Vrtcte,
6683 vbtwch1otsr::Ch1Vrtcte,
6684 Vbtwch1Otsr_SPEC,
6685 crate::common::RW,
6686 > {
6687 crate::common::RegisterField::<
6688 3,
6689 0x1,
6690 1,
6691 0,
6692 vbtwch1otsr::Ch1Vrtcte,
6693 vbtwch1otsr::Ch1Vrtcte,
6694 Vbtwch1Otsr_SPEC,
6695 crate::common::RW,
6696 >::from_register(self, 0)
6697 }
6698
6699 #[doc = "VBATWIO1 Output VBATWIO2 Trigger Enable"]
6700 #[inline(always)]
6701 pub fn ch1vch2te(
6702 self,
6703 ) -> crate::common::RegisterField<
6704 2,
6705 0x1,
6706 1,
6707 0,
6708 vbtwch1otsr::Ch1Vch2Te,
6709 vbtwch1otsr::Ch1Vch2Te,
6710 Vbtwch1Otsr_SPEC,
6711 crate::common::RW,
6712 > {
6713 crate::common::RegisterField::<
6714 2,
6715 0x1,
6716 1,
6717 0,
6718 vbtwch1otsr::Ch1Vch2Te,
6719 vbtwch1otsr::Ch1Vch2Te,
6720 Vbtwch1Otsr_SPEC,
6721 crate::common::RW,
6722 >::from_register(self, 0)
6723 }
6724
6725 #[doc = "This bit is read as 0. The write value should be 0."]
6726 #[inline(always)]
6727 pub fn reserved(
6728 self,
6729 ) -> crate::common::RegisterFieldBool<1, 1, 0, Vbtwch1Otsr_SPEC, crate::common::RW> {
6730 crate::common::RegisterFieldBool::<1,1,0,Vbtwch1Otsr_SPEC,crate::common::RW>::from_register(self,0)
6731 }
6732
6733 #[doc = "VBATWIO1 Output VBATWIO0 Trigger Enable"]
6734 #[inline(always)]
6735 pub fn ch1vch0te(
6736 self,
6737 ) -> crate::common::RegisterField<
6738 0,
6739 0x1,
6740 1,
6741 0,
6742 vbtwch1otsr::Ch1Vch0Te,
6743 vbtwch1otsr::Ch1Vch0Te,
6744 Vbtwch1Otsr_SPEC,
6745 crate::common::RW,
6746 > {
6747 crate::common::RegisterField::<
6748 0,
6749 0x1,
6750 1,
6751 0,
6752 vbtwch1otsr::Ch1Vch0Te,
6753 vbtwch1otsr::Ch1Vch0Te,
6754 Vbtwch1Otsr_SPEC,
6755 crate::common::RW,
6756 >::from_register(self, 0)
6757 }
6758}
6759impl ::core::default::Default for Vbtwch1Otsr {
6760 #[inline(always)]
6761 fn default() -> Vbtwch1Otsr {
6762 <crate::RegValueT<Vbtwch1Otsr_SPEC> as RegisterValue<_>>::new(0)
6763 }
6764}
6765pub mod vbtwch1otsr {
6766
6767 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6768 pub struct Ch1Vrtcate_SPEC;
6769 pub type Ch1Vrtcate = crate::EnumBitfieldStruct<u8, Ch1Vrtcate_SPEC>;
6770 impl Ch1Vrtcate {
6771 #[doc = "VBATT wakeup I/O 1 output trigger by the RTC alarm signal is disabled"]
6772 pub const _0: Self = Self::new(0);
6773
6774 #[doc = "VBATT wakeup I/O 1 output trigger by the RTC alarm signal is enabled."]
6775 pub const _1: Self = Self::new(1);
6776 }
6777 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6778 pub struct Ch1Vrtcte_SPEC;
6779 pub type Ch1Vrtcte = crate::EnumBitfieldStruct<u8, Ch1Vrtcte_SPEC>;
6780 impl Ch1Vrtcte {
6781 #[doc = "VBATT wakeup I/O 1 output trigger by the RTC periodic signal is disabled"]
6782 pub const _0: Self = Self::new(0);
6783
6784 #[doc = "VBATT wakeup I/O 1 output trigger by the RTC periodic signal is enabled"]
6785 pub const _1: Self = Self::new(1);
6786 }
6787 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6788 pub struct Ch1Vch2Te_SPEC;
6789 pub type Ch1Vch2Te = crate::EnumBitfieldStruct<u8, Ch1Vch2Te_SPEC>;
6790 impl Ch1Vch2Te {
6791 #[doc = "VBATT wakeup I/O 1 output trigger by the VBATWIO2 pin is disabled"]
6792 pub const _0: Self = Self::new(0);
6793
6794 #[doc = "VBATT wakeup I/O 1 output trigger by the VBATWIO2 pin is enabled."]
6795 pub const _1: Self = Self::new(1);
6796 }
6797 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6798 pub struct Ch1Vch0Te_SPEC;
6799 pub type Ch1Vch0Te = crate::EnumBitfieldStruct<u8, Ch1Vch0Te_SPEC>;
6800 impl Ch1Vch0Te {
6801 #[doc = "VBATT wakeup I/O 1 output trigger by the VBATWIO0 pin is disabled"]
6802 pub const _0: Self = Self::new(0);
6803
6804 #[doc = "VBATT wakeup I/O 1 output trigger by the VBATWIO0 pin is enabled."]
6805 pub const _1: Self = Self::new(1);
6806 }
6807}
6808#[doc(hidden)]
6809#[derive(Copy, Clone, Eq, PartialEq)]
6810pub struct Vbtwch2Otsr_SPEC;
6811impl crate::sealed::RegSpec for Vbtwch2Otsr_SPEC {
6812 type DataType = u8;
6813}
6814
6815#[doc = "VBATT Wakeup I/O 2 Output Trigger Select Register"]
6816pub type Vbtwch2Otsr = crate::RegValueT<Vbtwch2Otsr_SPEC>;
6817
6818impl Vbtwch2Otsr {
6819 #[doc = "VBATWIO2 Output RTC Alarm Signal Enable"]
6820 #[inline(always)]
6821 pub fn ch2vrtcate(
6822 self,
6823 ) -> crate::common::RegisterField<
6824 4,
6825 0x1,
6826 1,
6827 0,
6828 vbtwch2otsr::Ch2Vrtcate,
6829 vbtwch2otsr::Ch2Vrtcate,
6830 Vbtwch2Otsr_SPEC,
6831 crate::common::RW,
6832 > {
6833 crate::common::RegisterField::<
6834 4,
6835 0x1,
6836 1,
6837 0,
6838 vbtwch2otsr::Ch2Vrtcate,
6839 vbtwch2otsr::Ch2Vrtcate,
6840 Vbtwch2Otsr_SPEC,
6841 crate::common::RW,
6842 >::from_register(self, 0)
6843 }
6844
6845 #[doc = "VBATWIO2 Output RTC Periodic Signal Enable"]
6846 #[inline(always)]
6847 pub fn ch2vrtcte(
6848 self,
6849 ) -> crate::common::RegisterField<
6850 3,
6851 0x1,
6852 1,
6853 0,
6854 vbtwch2otsr::Ch2Vrtcte,
6855 vbtwch2otsr::Ch2Vrtcte,
6856 Vbtwch2Otsr_SPEC,
6857 crate::common::RW,
6858 > {
6859 crate::common::RegisterField::<
6860 3,
6861 0x1,
6862 1,
6863 0,
6864 vbtwch2otsr::Ch2Vrtcte,
6865 vbtwch2otsr::Ch2Vrtcte,
6866 Vbtwch2Otsr_SPEC,
6867 crate::common::RW,
6868 >::from_register(self, 0)
6869 }
6870
6871 #[doc = "This bit is read as 0. The write value should be 0."]
6872 #[inline(always)]
6873 pub fn reserved(
6874 self,
6875 ) -> crate::common::RegisterFieldBool<2, 1, 0, Vbtwch2Otsr_SPEC, crate::common::RW> {
6876 crate::common::RegisterFieldBool::<2,1,0,Vbtwch2Otsr_SPEC,crate::common::RW>::from_register(self,0)
6877 }
6878
6879 #[doc = "VBATWIO2 Output VBATWIO1 Trigger Enable"]
6880 #[inline(always)]
6881 pub fn ch2vch1te(
6882 self,
6883 ) -> crate::common::RegisterField<
6884 1,
6885 0x1,
6886 1,
6887 0,
6888 vbtwch2otsr::Ch2Vch1Te,
6889 vbtwch2otsr::Ch2Vch1Te,
6890 Vbtwch2Otsr_SPEC,
6891 crate::common::RW,
6892 > {
6893 crate::common::RegisterField::<
6894 1,
6895 0x1,
6896 1,
6897 0,
6898 vbtwch2otsr::Ch2Vch1Te,
6899 vbtwch2otsr::Ch2Vch1Te,
6900 Vbtwch2Otsr_SPEC,
6901 crate::common::RW,
6902 >::from_register(self, 0)
6903 }
6904
6905 #[doc = "VBATWIO2 Output VBATWIO0 Trigger Enable"]
6906 #[inline(always)]
6907 pub fn ch2vch0te(
6908 self,
6909 ) -> crate::common::RegisterField<
6910 0,
6911 0x1,
6912 1,
6913 0,
6914 vbtwch2otsr::Ch2Vch0Te,
6915 vbtwch2otsr::Ch2Vch0Te,
6916 Vbtwch2Otsr_SPEC,
6917 crate::common::RW,
6918 > {
6919 crate::common::RegisterField::<
6920 0,
6921 0x1,
6922 1,
6923 0,
6924 vbtwch2otsr::Ch2Vch0Te,
6925 vbtwch2otsr::Ch2Vch0Te,
6926 Vbtwch2Otsr_SPEC,
6927 crate::common::RW,
6928 >::from_register(self, 0)
6929 }
6930}
6931impl ::core::default::Default for Vbtwch2Otsr {
6932 #[inline(always)]
6933 fn default() -> Vbtwch2Otsr {
6934 <crate::RegValueT<Vbtwch2Otsr_SPEC> as RegisterValue<_>>::new(0)
6935 }
6936}
6937pub mod vbtwch2otsr {
6938
6939 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6940 pub struct Ch2Vrtcate_SPEC;
6941 pub type Ch2Vrtcate = crate::EnumBitfieldStruct<u8, Ch2Vrtcate_SPEC>;
6942 impl Ch2Vrtcate {
6943 #[doc = "VBATT wakeup I/O 2 output trigger by the RTC alarm signal is disabled"]
6944 pub const _0: Self = Self::new(0);
6945
6946 #[doc = "VBATT wakeup I/O 2 output trigger by the RTC alarm signal is enabled."]
6947 pub const _1: Self = Self::new(1);
6948 }
6949 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6950 pub struct Ch2Vrtcte_SPEC;
6951 pub type Ch2Vrtcte = crate::EnumBitfieldStruct<u8, Ch2Vrtcte_SPEC>;
6952 impl Ch2Vrtcte {
6953 #[doc = "VBATT wakeup I/O 2 output trigger by the RTC periodic signal is disabled"]
6954 pub const _0: Self = Self::new(0);
6955
6956 #[doc = "VBATT wakeup I/O 2 output trigger by the RTC periodic signal is enabled."]
6957 pub const _1: Self = Self::new(1);
6958 }
6959 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6960 pub struct Ch2Vch1Te_SPEC;
6961 pub type Ch2Vch1Te = crate::EnumBitfieldStruct<u8, Ch2Vch1Te_SPEC>;
6962 impl Ch2Vch1Te {
6963 #[doc = "VBATT wakeup I/O 2 output trigger by the VBATWIO1 pin is disabled"]
6964 pub const _0: Self = Self::new(0);
6965
6966 #[doc = "VBATT wakeup I/O 2 output trigger by the VBATWIO1 pin is enabled."]
6967 pub const _1: Self = Self::new(1);
6968 }
6969 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6970 pub struct Ch2Vch0Te_SPEC;
6971 pub type Ch2Vch0Te = crate::EnumBitfieldStruct<u8, Ch2Vch0Te_SPEC>;
6972 impl Ch2Vch0Te {
6973 #[doc = "VBATT wakeup I/O 2 output trigger by the VBATWIO0 pin is disabled"]
6974 pub const _0: Self = Self::new(0);
6975
6976 #[doc = "VBATT wakeup I/O 2 output trigger by the VBATWIO0 pin is enabled."]
6977 pub const _1: Self = Self::new(1);
6978 }
6979}
6980#[doc(hidden)]
6981#[derive(Copy, Clone, Eq, PartialEq)]
6982pub struct Vbtictlr_SPEC;
6983impl crate::sealed::RegSpec for Vbtictlr_SPEC {
6984 type DataType = u8;
6985}
6986
6987#[doc = "VBATT Input Control Register"]
6988pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
6989
6990impl Vbtictlr {
6991 #[doc = "These bits are read as 00000. The write value should be 00000."]
6992 #[inline(always)]
6993 pub fn reserved(
6994 self,
6995 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Vbtictlr_SPEC, crate::common::RW> {
6996 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Vbtictlr_SPEC,crate::common::RW>::from_register(self,0)
6997 }
6998
6999 #[doc = "VBATT Wakeup I/O 2 Input Enable"]
7000 #[inline(always)]
7001 pub fn vch2inen(
7002 self,
7003 ) -> crate::common::RegisterField<
7004 2,
7005 0x1,
7006 1,
7007 0,
7008 vbtictlr::Vch2Inen,
7009 vbtictlr::Vch2Inen,
7010 Vbtictlr_SPEC,
7011 crate::common::RW,
7012 > {
7013 crate::common::RegisterField::<
7014 2,
7015 0x1,
7016 1,
7017 0,
7018 vbtictlr::Vch2Inen,
7019 vbtictlr::Vch2Inen,
7020 Vbtictlr_SPEC,
7021 crate::common::RW,
7022 >::from_register(self, 0)
7023 }
7024
7025 #[doc = "VBATT Wakeup I/O 1 Input Enable"]
7026 #[inline(always)]
7027 pub fn vch1inen(
7028 self,
7029 ) -> crate::common::RegisterField<
7030 1,
7031 0x1,
7032 1,
7033 0,
7034 vbtictlr::Vch1Inen,
7035 vbtictlr::Vch1Inen,
7036 Vbtictlr_SPEC,
7037 crate::common::RW,
7038 > {
7039 crate::common::RegisterField::<
7040 1,
7041 0x1,
7042 1,
7043 0,
7044 vbtictlr::Vch1Inen,
7045 vbtictlr::Vch1Inen,
7046 Vbtictlr_SPEC,
7047 crate::common::RW,
7048 >::from_register(self, 0)
7049 }
7050
7051 #[doc = "VBATT Wakeup I/O 0 Input Enable"]
7052 #[inline(always)]
7053 pub fn vch0inen(
7054 self,
7055 ) -> crate::common::RegisterField<
7056 0,
7057 0x1,
7058 1,
7059 0,
7060 vbtictlr::Vch0Inen,
7061 vbtictlr::Vch0Inen,
7062 Vbtictlr_SPEC,
7063 crate::common::RW,
7064 > {
7065 crate::common::RegisterField::<
7066 0,
7067 0x1,
7068 1,
7069 0,
7070 vbtictlr::Vch0Inen,
7071 vbtictlr::Vch0Inen,
7072 Vbtictlr_SPEC,
7073 crate::common::RW,
7074 >::from_register(self, 0)
7075 }
7076}
7077impl ::core::default::Default for Vbtictlr {
7078 #[inline(always)]
7079 fn default() -> Vbtictlr {
7080 <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
7081 }
7082}
7083pub mod vbtictlr {
7084
7085 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7086 pub struct Vch2Inen_SPEC;
7087 pub type Vch2Inen = crate::EnumBitfieldStruct<u8, Vch2Inen_SPEC>;
7088 impl Vch2Inen {
7089 #[doc = "VBATWIO2 and RTCIC2 inputs disabled"]
7090 pub const _0: Self = Self::new(0);
7091
7092 #[doc = "VBATWIO2 and RTCIC2 inputs enabled."]
7093 pub const _1: Self = Self::new(1);
7094 }
7095 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7096 pub struct Vch1Inen_SPEC;
7097 pub type Vch1Inen = crate::EnumBitfieldStruct<u8, Vch1Inen_SPEC>;
7098 impl Vch1Inen {
7099 #[doc = "VBATWIO1, RTCIC1 inputs disabled"]
7100 pub const _0: Self = Self::new(0);
7101
7102 #[doc = "VBATWIO1, RTCIC1 inputs enabled."]
7103 pub const _1: Self = Self::new(1);
7104 }
7105 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7106 pub struct Vch0Inen_SPEC;
7107 pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
7108 impl Vch0Inen {
7109 #[doc = "VBATWIO0, RTCIC0 inputs disabled"]
7110 pub const _0: Self = Self::new(0);
7111
7112 #[doc = "VBATWIO0, RTCIC0 inputs enabled."]
7113 pub const _1: Self = Self::new(1);
7114 }
7115}
7116#[doc(hidden)]
7117#[derive(Copy, Clone, Eq, PartialEq)]
7118pub struct Vbtoctlr_SPEC;
7119impl crate::sealed::RegSpec for Vbtoctlr_SPEC {
7120 type DataType = u8;
7121}
7122
7123#[doc = "VBATT Output Control Register"]
7124pub type Vbtoctlr = crate::RegValueT<Vbtoctlr_SPEC>;
7125
7126impl Vbtoctlr {
7127 #[doc = "These bits are read as 00. The write value should be 00."]
7128 #[inline(always)]
7129 pub fn reserved(
7130 self,
7131 ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, Vbtoctlr_SPEC, crate::common::RW> {
7132 crate::common::RegisterField::<6,0x3,1,0,u8,u8,Vbtoctlr_SPEC,crate::common::RW>::from_register(self,0)
7133 }
7134
7135 #[doc = "VBATT Wakeup I/O 2 Output Level Selection"]
7136 #[inline(always)]
7137 pub fn vout2lsel(
7138 self,
7139 ) -> crate::common::RegisterField<
7140 5,
7141 0x1,
7142 1,
7143 0,
7144 vbtoctlr::Vout2Lsel,
7145 vbtoctlr::Vout2Lsel,
7146 Vbtoctlr_SPEC,
7147 crate::common::RW,
7148 > {
7149 crate::common::RegisterField::<
7150 5,
7151 0x1,
7152 1,
7153 0,
7154 vbtoctlr::Vout2Lsel,
7155 vbtoctlr::Vout2Lsel,
7156 Vbtoctlr_SPEC,
7157 crate::common::RW,
7158 >::from_register(self, 0)
7159 }
7160
7161 #[doc = "VBATT Wakeup I/O 1 Output Level Selection"]
7162 #[inline(always)]
7163 pub fn vcou1lsel(
7164 self,
7165 ) -> crate::common::RegisterField<
7166 4,
7167 0x1,
7168 1,
7169 0,
7170 vbtoctlr::Vcou1Lsel,
7171 vbtoctlr::Vcou1Lsel,
7172 Vbtoctlr_SPEC,
7173 crate::common::RW,
7174 > {
7175 crate::common::RegisterField::<
7176 4,
7177 0x1,
7178 1,
7179 0,
7180 vbtoctlr::Vcou1Lsel,
7181 vbtoctlr::Vcou1Lsel,
7182 Vbtoctlr_SPEC,
7183 crate::common::RW,
7184 >::from_register(self, 0)
7185 }
7186
7187 #[doc = "VBATT Wakeup I/O 0 Output Level Selection"]
7188 #[inline(always)]
7189 pub fn vout0lsel(
7190 self,
7191 ) -> crate::common::RegisterField<
7192 3,
7193 0x1,
7194 1,
7195 0,
7196 vbtoctlr::Vout0Lsel,
7197 vbtoctlr::Vout0Lsel,
7198 Vbtoctlr_SPEC,
7199 crate::common::RW,
7200 > {
7201 crate::common::RegisterField::<
7202 3,
7203 0x1,
7204 1,
7205 0,
7206 vbtoctlr::Vout0Lsel,
7207 vbtoctlr::Vout0Lsel,
7208 Vbtoctlr_SPEC,
7209 crate::common::RW,
7210 >::from_register(self, 0)
7211 }
7212
7213 #[doc = "VBATT Wakeup I/O 2 Output Enable"]
7214 #[inline(always)]
7215 pub fn vch2oen(
7216 self,
7217 ) -> crate::common::RegisterField<
7218 2,
7219 0x1,
7220 1,
7221 0,
7222 vbtoctlr::Vch2Oen,
7223 vbtoctlr::Vch2Oen,
7224 Vbtoctlr_SPEC,
7225 crate::common::RW,
7226 > {
7227 crate::common::RegisterField::<
7228 2,
7229 0x1,
7230 1,
7231 0,
7232 vbtoctlr::Vch2Oen,
7233 vbtoctlr::Vch2Oen,
7234 Vbtoctlr_SPEC,
7235 crate::common::RW,
7236 >::from_register(self, 0)
7237 }
7238
7239 #[doc = "VBATT Wakeup I/O 1 Output Enable"]
7240 #[inline(always)]
7241 pub fn vch1oen(
7242 self,
7243 ) -> crate::common::RegisterField<
7244 1,
7245 0x1,
7246 1,
7247 0,
7248 vbtoctlr::Vch1Oen,
7249 vbtoctlr::Vch1Oen,
7250 Vbtoctlr_SPEC,
7251 crate::common::RW,
7252 > {
7253 crate::common::RegisterField::<
7254 1,
7255 0x1,
7256 1,
7257 0,
7258 vbtoctlr::Vch1Oen,
7259 vbtoctlr::Vch1Oen,
7260 Vbtoctlr_SPEC,
7261 crate::common::RW,
7262 >::from_register(self, 0)
7263 }
7264
7265 #[doc = "VBATT Wakeup I/O 0 Output Enable"]
7266 #[inline(always)]
7267 pub fn vch0oen(
7268 self,
7269 ) -> crate::common::RegisterField<
7270 0,
7271 0x1,
7272 1,
7273 0,
7274 vbtoctlr::Vch0Oen,
7275 vbtoctlr::Vch0Oen,
7276 Vbtoctlr_SPEC,
7277 crate::common::RW,
7278 > {
7279 crate::common::RegisterField::<
7280 0,
7281 0x1,
7282 1,
7283 0,
7284 vbtoctlr::Vch0Oen,
7285 vbtoctlr::Vch0Oen,
7286 Vbtoctlr_SPEC,
7287 crate::common::RW,
7288 >::from_register(self, 0)
7289 }
7290}
7291impl ::core::default::Default for Vbtoctlr {
7292 #[inline(always)]
7293 fn default() -> Vbtoctlr {
7294 <crate::RegValueT<Vbtoctlr_SPEC> as RegisterValue<_>>::new(0)
7295 }
7296}
7297pub mod vbtoctlr {
7298
7299 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7300 pub struct Vout2Lsel_SPEC;
7301 pub type Vout2Lsel = crate::EnumBitfieldStruct<u8, Vout2Lsel_SPEC>;
7302 impl Vout2Lsel {
7303 #[doc = "Output L before VBATT wake up trigger"]
7304 pub const _0: Self = Self::new(0);
7305
7306 #[doc = "Output H before VBATT wake up trigger"]
7307 pub const _1: Self = Self::new(1);
7308 }
7309 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7310 pub struct Vcou1Lsel_SPEC;
7311 pub type Vcou1Lsel = crate::EnumBitfieldStruct<u8, Vcou1Lsel_SPEC>;
7312 impl Vcou1Lsel {
7313 #[doc = "Output L before VBATT wake up trigger"]
7314 pub const _0: Self = Self::new(0);
7315
7316 #[doc = "Output H before VBATT wake up trigger"]
7317 pub const _1: Self = Self::new(1);
7318 }
7319 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7320 pub struct Vout0Lsel_SPEC;
7321 pub type Vout0Lsel = crate::EnumBitfieldStruct<u8, Vout0Lsel_SPEC>;
7322 impl Vout0Lsel {
7323 #[doc = "Output L before VBATT wakeup trigger"]
7324 pub const _0: Self = Self::new(0);
7325
7326 #[doc = "Output H before VBATT wakeup trigger"]
7327 pub const _1: Self = Self::new(1);
7328 }
7329 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7330 pub struct Vch2Oen_SPEC;
7331 pub type Vch2Oen = crate::EnumBitfieldStruct<u8, Vch2Oen_SPEC>;
7332 impl Vch2Oen {
7333 #[doc = "VBATWIO2 output disabled"]
7334 pub const _0: Self = Self::new(0);
7335
7336 #[doc = "VBATWIO2 output enabled"]
7337 pub const _1: Self = Self::new(1);
7338 }
7339 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7340 pub struct Vch1Oen_SPEC;
7341 pub type Vch1Oen = crate::EnumBitfieldStruct<u8, Vch1Oen_SPEC>;
7342 impl Vch1Oen {
7343 #[doc = "VBATWIO1 output disabled"]
7344 pub const _0: Self = Self::new(0);
7345
7346 #[doc = "VBATWIO1 output enabled"]
7347 pub const _1: Self = Self::new(1);
7348 }
7349 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7350 pub struct Vch0Oen_SPEC;
7351 pub type Vch0Oen = crate::EnumBitfieldStruct<u8, Vch0Oen_SPEC>;
7352 impl Vch0Oen {
7353 #[doc = "VBATWIO0 output disabled"]
7354 pub const _0: Self = Self::new(0);
7355
7356 #[doc = "VBATWIO0 output enabled"]
7357 pub const _1: Self = Self::new(1);
7358 }
7359}
7360#[doc(hidden)]
7361#[derive(Copy, Clone, Eq, PartialEq)]
7362pub struct Vbtwter_SPEC;
7363impl crate::sealed::RegSpec for Vbtwter_SPEC {
7364 type DataType = u8;
7365}
7366
7367#[doc = "VBATT Wakeup Trigger source Enable Register"]
7368pub type Vbtwter = crate::RegValueT<Vbtwter_SPEC>;
7369
7370impl Vbtwter {
7371 #[doc = "These bits are read as 000. The write value should be 000."]
7372 #[inline(always)]
7373 pub fn reserved(
7374 self,
7375 ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, Vbtwter_SPEC, crate::common::RW> {
7376 crate::common::RegisterField::<5,0x7,1,0,u8,u8,Vbtwter_SPEC,crate::common::RW>::from_register(self,0)
7377 }
7378
7379 #[doc = "RTC Alarm Signal Enable"]
7380 #[inline(always)]
7381 pub fn vrtcae(
7382 self,
7383 ) -> crate::common::RegisterField<
7384 4,
7385 0x1,
7386 1,
7387 0,
7388 vbtwter::Vrtcae,
7389 vbtwter::Vrtcae,
7390 Vbtwter_SPEC,
7391 crate::common::RW,
7392 > {
7393 crate::common::RegisterField::<
7394 4,
7395 0x1,
7396 1,
7397 0,
7398 vbtwter::Vrtcae,
7399 vbtwter::Vrtcae,
7400 Vbtwter_SPEC,
7401 crate::common::RW,
7402 >::from_register(self, 0)
7403 }
7404
7405 #[doc = "RTC Periodic Signal Enable"]
7406 #[inline(always)]
7407 pub fn vrtcie(
7408 self,
7409 ) -> crate::common::RegisterField<
7410 3,
7411 0x1,
7412 1,
7413 0,
7414 vbtwter::Vrtcie,
7415 vbtwter::Vrtcie,
7416 Vbtwter_SPEC,
7417 crate::common::RW,
7418 > {
7419 crate::common::RegisterField::<
7420 3,
7421 0x1,
7422 1,
7423 0,
7424 vbtwter::Vrtcie,
7425 vbtwter::Vrtcie,
7426 Vbtwter_SPEC,
7427 crate::common::RW,
7428 >::from_register(self, 0)
7429 }
7430
7431 #[doc = "VBATWIO2 Pin Enable"]
7432 #[inline(always)]
7433 pub fn vch2e(
7434 self,
7435 ) -> crate::common::RegisterField<
7436 2,
7437 0x1,
7438 1,
7439 0,
7440 vbtwter::Vch2E,
7441 vbtwter::Vch2E,
7442 Vbtwter_SPEC,
7443 crate::common::RW,
7444 > {
7445 crate::common::RegisterField::<
7446 2,
7447 0x1,
7448 1,
7449 0,
7450 vbtwter::Vch2E,
7451 vbtwter::Vch2E,
7452 Vbtwter_SPEC,
7453 crate::common::RW,
7454 >::from_register(self, 0)
7455 }
7456
7457 #[doc = "VBATWIO1 Pin Enable"]
7458 #[inline(always)]
7459 pub fn vch1e(
7460 self,
7461 ) -> crate::common::RegisterField<
7462 1,
7463 0x1,
7464 1,
7465 0,
7466 vbtwter::Vch1E,
7467 vbtwter::Vch1E,
7468 Vbtwter_SPEC,
7469 crate::common::RW,
7470 > {
7471 crate::common::RegisterField::<
7472 1,
7473 0x1,
7474 1,
7475 0,
7476 vbtwter::Vch1E,
7477 vbtwter::Vch1E,
7478 Vbtwter_SPEC,
7479 crate::common::RW,
7480 >::from_register(self, 0)
7481 }
7482
7483 #[doc = "VBATWIO0 Pin Enable"]
7484 #[inline(always)]
7485 pub fn vch0e(
7486 self,
7487 ) -> crate::common::RegisterField<
7488 0,
7489 0x1,
7490 1,
7491 0,
7492 vbtwter::Vch0E,
7493 vbtwter::Vch0E,
7494 Vbtwter_SPEC,
7495 crate::common::RW,
7496 > {
7497 crate::common::RegisterField::<
7498 0,
7499 0x1,
7500 1,
7501 0,
7502 vbtwter::Vch0E,
7503 vbtwter::Vch0E,
7504 Vbtwter_SPEC,
7505 crate::common::RW,
7506 >::from_register(self, 0)
7507 }
7508}
7509impl ::core::default::Default for Vbtwter {
7510 #[inline(always)]
7511 fn default() -> Vbtwter {
7512 <crate::RegValueT<Vbtwter_SPEC> as RegisterValue<_>>::new(0)
7513 }
7514}
7515pub mod vbtwter {
7516
7517 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7518 pub struct Vrtcae_SPEC;
7519 pub type Vrtcae = crate::EnumBitfieldStruct<u8, Vrtcae_SPEC>;
7520 impl Vrtcae {
7521 #[doc = "VBATT wakeup triggered by RTC alarm signal is disabled"]
7522 pub const _0: Self = Self::new(0);
7523
7524 #[doc = "VBATT wakeup triggered by RTC alarm signal is enabled."]
7525 pub const _1: Self = Self::new(1);
7526 }
7527 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7528 pub struct Vrtcie_SPEC;
7529 pub type Vrtcie = crate::EnumBitfieldStruct<u8, Vrtcie_SPEC>;
7530 impl Vrtcie {
7531 #[doc = "VBATT wakeup triggered by RTC periodic signal is disabled"]
7532 pub const _0: Self = Self::new(0);
7533
7534 #[doc = "VBATT wakeup triggered by RTC periodic signal is enabled."]
7535 pub const _1: Self = Self::new(1);
7536 }
7537 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7538 pub struct Vch2E_SPEC;
7539 pub type Vch2E = crate::EnumBitfieldStruct<u8, Vch2E_SPEC>;
7540 impl Vch2E {
7541 #[doc = "VBATT wakeup triggered by the VBATWIO2 pin is disabled"]
7542 pub const _0: Self = Self::new(0);
7543
7544 #[doc = "VBATT wakeup triggered by the VBATWIO2 pin is enabled."]
7545 pub const _1: Self = Self::new(1);
7546 }
7547 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7548 pub struct Vch1E_SPEC;
7549 pub type Vch1E = crate::EnumBitfieldStruct<u8, Vch1E_SPEC>;
7550 impl Vch1E {
7551 #[doc = "VBATT wakeup triggered by the VBATWIO1 pin is disabled"]
7552 pub const _0: Self = Self::new(0);
7553
7554 #[doc = "VBATT wakeup triggered by the VBATWIO1 pin is enabled."]
7555 pub const _1: Self = Self::new(1);
7556 }
7557 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7558 pub struct Vch0E_SPEC;
7559 pub type Vch0E = crate::EnumBitfieldStruct<u8, Vch0E_SPEC>;
7560 impl Vch0E {
7561 #[doc = "VBATT wakeup triggered by the VBATWIO0 pin is disabled"]
7562 pub const _0: Self = Self::new(0);
7563
7564 #[doc = "VBATT wakeup triggered by the VBATWIO0 pin is enabled."]
7565 pub const _1: Self = Self::new(1);
7566 }
7567}
7568#[doc(hidden)]
7569#[derive(Copy, Clone, Eq, PartialEq)]
7570pub struct Vbtwegr_SPEC;
7571impl crate::sealed::RegSpec for Vbtwegr_SPEC {
7572 type DataType = u8;
7573}
7574
7575#[doc = "VBATT Wakeup Trigger source Edge Register"]
7576pub type Vbtwegr = crate::RegValueT<Vbtwegr_SPEC>;
7577
7578impl Vbtwegr {
7579 #[doc = "These bits are read as 00000. The write value should be 00000."]
7580 #[inline(always)]
7581 pub fn reserved(
7582 self,
7583 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Vbtwegr_SPEC, crate::common::RW> {
7584 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Vbtwegr_SPEC,crate::common::RW>::from_register(self,0)
7585 }
7586
7587 #[doc = "VBATWIO2 Wakeup Trigger Source Edge Select"]
7588 #[inline(always)]
7589 pub fn vch2eg(
7590 self,
7591 ) -> crate::common::RegisterField<
7592 2,
7593 0x1,
7594 1,
7595 0,
7596 vbtwegr::Vch2Eg,
7597 vbtwegr::Vch2Eg,
7598 Vbtwegr_SPEC,
7599 crate::common::RW,
7600 > {
7601 crate::common::RegisterField::<
7602 2,
7603 0x1,
7604 1,
7605 0,
7606 vbtwegr::Vch2Eg,
7607 vbtwegr::Vch2Eg,
7608 Vbtwegr_SPEC,
7609 crate::common::RW,
7610 >::from_register(self, 0)
7611 }
7612
7613 #[doc = "VBATWIO1 Wakeup Trigger Source Edge Select"]
7614 #[inline(always)]
7615 pub fn vch1eg(
7616 self,
7617 ) -> crate::common::RegisterField<
7618 1,
7619 0x1,
7620 1,
7621 0,
7622 vbtwegr::Vch1Eg,
7623 vbtwegr::Vch1Eg,
7624 Vbtwegr_SPEC,
7625 crate::common::RW,
7626 > {
7627 crate::common::RegisterField::<
7628 1,
7629 0x1,
7630 1,
7631 0,
7632 vbtwegr::Vch1Eg,
7633 vbtwegr::Vch1Eg,
7634 Vbtwegr_SPEC,
7635 crate::common::RW,
7636 >::from_register(self, 0)
7637 }
7638
7639 #[doc = "VBATWIO0 Wakeup Trigger Source Edge Select"]
7640 #[inline(always)]
7641 pub fn vch0eg(
7642 self,
7643 ) -> crate::common::RegisterField<
7644 0,
7645 0x1,
7646 1,
7647 0,
7648 vbtwegr::Vch0Eg,
7649 vbtwegr::Vch0Eg,
7650 Vbtwegr_SPEC,
7651 crate::common::RW,
7652 > {
7653 crate::common::RegisterField::<
7654 0,
7655 0x1,
7656 1,
7657 0,
7658 vbtwegr::Vch0Eg,
7659 vbtwegr::Vch0Eg,
7660 Vbtwegr_SPEC,
7661 crate::common::RW,
7662 >::from_register(self, 0)
7663 }
7664}
7665impl ::core::default::Default for Vbtwegr {
7666 #[inline(always)]
7667 fn default() -> Vbtwegr {
7668 <crate::RegValueT<Vbtwegr_SPEC> as RegisterValue<_>>::new(0)
7669 }
7670}
7671pub mod vbtwegr {
7672
7673 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7674 pub struct Vch2Eg_SPEC;
7675 pub type Vch2Eg = crate::EnumBitfieldStruct<u8, Vch2Eg_SPEC>;
7676 impl Vch2Eg {
7677 #[doc = "Wakeup trigger is generated at a falling edge"]
7678 pub const _0: Self = Self::new(0);
7679
7680 #[doc = "Wakeup trigger is generated at a rising edge."]
7681 pub const _1: Self = Self::new(1);
7682 }
7683 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7684 pub struct Vch1Eg_SPEC;
7685 pub type Vch1Eg = crate::EnumBitfieldStruct<u8, Vch1Eg_SPEC>;
7686 impl Vch1Eg {
7687 #[doc = "Wakeup trigger is generated at a falling edge"]
7688 pub const _0: Self = Self::new(0);
7689
7690 #[doc = "Wakeup trigger is generated at a rising edge."]
7691 pub const _1: Self = Self::new(1);
7692 }
7693 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7694 pub struct Vch0Eg_SPEC;
7695 pub type Vch0Eg = crate::EnumBitfieldStruct<u8, Vch0Eg_SPEC>;
7696 impl Vch0Eg {
7697 #[doc = "Wakeup trigger is generated at a falling edge"]
7698 pub const _0: Self = Self::new(0);
7699
7700 #[doc = "Wakeup trigger is generated at a rising edge."]
7701 pub const _1: Self = Self::new(1);
7702 }
7703}
7704#[doc(hidden)]
7705#[derive(Copy, Clone, Eq, PartialEq)]
7706pub struct Vbtwfr_SPEC;
7707impl crate::sealed::RegSpec for Vbtwfr_SPEC {
7708 type DataType = u8;
7709}
7710
7711#[doc = "VBATT Wakeup trigger source Flag Register"]
7712pub type Vbtwfr = crate::RegValueT<Vbtwfr_SPEC>;
7713
7714impl Vbtwfr {
7715 #[doc = "These bits are read as 000. The write value should be 000."]
7716 #[inline(always)]
7717 pub fn reserved(
7718 self,
7719 ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, Vbtwfr_SPEC, crate::common::RW> {
7720 crate::common::RegisterField::<5,0x7,1,0,u8,u8,Vbtwfr_SPEC,crate::common::RW>::from_register(self,0)
7721 }
7722
7723 #[doc = "VBATT RTC-Alarm Wakeup Trigger Flag"]
7724 #[inline(always)]
7725 pub fn vrtcaf(
7726 self,
7727 ) -> crate::common::RegisterField<
7728 4,
7729 0x1,
7730 1,
7731 0,
7732 vbtwfr::Vrtcaf,
7733 vbtwfr::Vrtcaf,
7734 Vbtwfr_SPEC,
7735 crate::common::RW,
7736 > {
7737 crate::common::RegisterField::<
7738 4,
7739 0x1,
7740 1,
7741 0,
7742 vbtwfr::Vrtcaf,
7743 vbtwfr::Vrtcaf,
7744 Vbtwfr_SPEC,
7745 crate::common::RW,
7746 >::from_register(self, 0)
7747 }
7748
7749 #[doc = "VBATT RTC-Interval Wakeup Trigger Flag"]
7750 #[inline(always)]
7751 pub fn vrtcif(
7752 self,
7753 ) -> crate::common::RegisterField<
7754 3,
7755 0x1,
7756 1,
7757 0,
7758 vbtwfr::Vrtcif,
7759 vbtwfr::Vrtcif,
7760 Vbtwfr_SPEC,
7761 crate::common::RW,
7762 > {
7763 crate::common::RegisterField::<
7764 3,
7765 0x1,
7766 1,
7767 0,
7768 vbtwfr::Vrtcif,
7769 vbtwfr::Vrtcif,
7770 Vbtwfr_SPEC,
7771 crate::common::RW,
7772 >::from_register(self, 0)
7773 }
7774
7775 #[doc = "VBATWIO2 Wakeup Trigger Flag"]
7776 #[inline(always)]
7777 pub fn vch2f(
7778 self,
7779 ) -> crate::common::RegisterField<
7780 2,
7781 0x1,
7782 1,
7783 0,
7784 vbtwfr::Vch2F,
7785 vbtwfr::Vch2F,
7786 Vbtwfr_SPEC,
7787 crate::common::RW,
7788 > {
7789 crate::common::RegisterField::<
7790 2,
7791 0x1,
7792 1,
7793 0,
7794 vbtwfr::Vch2F,
7795 vbtwfr::Vch2F,
7796 Vbtwfr_SPEC,
7797 crate::common::RW,
7798 >::from_register(self, 0)
7799 }
7800
7801 #[doc = "VBATWIO1 Wakeup Trigger Flag"]
7802 #[inline(always)]
7803 pub fn vch1f(
7804 self,
7805 ) -> crate::common::RegisterField<
7806 1,
7807 0x1,
7808 1,
7809 0,
7810 vbtwfr::Vch1F,
7811 vbtwfr::Vch1F,
7812 Vbtwfr_SPEC,
7813 crate::common::RW,
7814 > {
7815 crate::common::RegisterField::<
7816 1,
7817 0x1,
7818 1,
7819 0,
7820 vbtwfr::Vch1F,
7821 vbtwfr::Vch1F,
7822 Vbtwfr_SPEC,
7823 crate::common::RW,
7824 >::from_register(self, 0)
7825 }
7826
7827 #[doc = "VBATWIO0 Wakeup Trigger Flag"]
7828 #[inline(always)]
7829 pub fn vch0f(
7830 self,
7831 ) -> crate::common::RegisterField<
7832 0,
7833 0x1,
7834 1,
7835 0,
7836 vbtwfr::Vch0F,
7837 vbtwfr::Vch0F,
7838 Vbtwfr_SPEC,
7839 crate::common::RW,
7840 > {
7841 crate::common::RegisterField::<
7842 0,
7843 0x1,
7844 1,
7845 0,
7846 vbtwfr::Vch0F,
7847 vbtwfr::Vch0F,
7848 Vbtwfr_SPEC,
7849 crate::common::RW,
7850 >::from_register(self, 0)
7851 }
7852}
7853impl ::core::default::Default for Vbtwfr {
7854 #[inline(always)]
7855 fn default() -> Vbtwfr {
7856 <crate::RegValueT<Vbtwfr_SPEC> as RegisterValue<_>>::new(0)
7857 }
7858}
7859pub mod vbtwfr {
7860
7861 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7862 pub struct Vrtcaf_SPEC;
7863 pub type Vrtcaf = crate::EnumBitfieldStruct<u8, Vrtcaf_SPEC>;
7864 impl Vrtcaf {
7865 #[doc = "No wakeup trigger by the RTC alarm is generated"]
7866 pub const _0: Self = Self::new(0);
7867
7868 #[doc = "A wakeup trigger by the RTC alarm is generated"]
7869 pub const _1: Self = Self::new(1);
7870 }
7871 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7872 pub struct Vrtcif_SPEC;
7873 pub type Vrtcif = crate::EnumBitfieldStruct<u8, Vrtcif_SPEC>;
7874 impl Vrtcif {
7875 #[doc = "No wakeup trigger by the RTC interval is generated"]
7876 pub const _0: Self = Self::new(0);
7877
7878 #[doc = "A wakeup trigger by the RTC interval is generated"]
7879 pub const _1: Self = Self::new(1);
7880 }
7881 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7882 pub struct Vch2F_SPEC;
7883 pub type Vch2F = crate::EnumBitfieldStruct<u8, Vch2F_SPEC>;
7884 impl Vch2F {
7885 #[doc = "No wakeup trigger by the VBATWIO2 pin is generated"]
7886 pub const _0: Self = Self::new(0);
7887
7888 #[doc = "A wakeup trigger by the VBATWIO2 pin is generated"]
7889 pub const _1: Self = Self::new(1);
7890 }
7891 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7892 pub struct Vch1F_SPEC;
7893 pub type Vch1F = crate::EnumBitfieldStruct<u8, Vch1F_SPEC>;
7894 impl Vch1F {
7895 #[doc = "No wakeup trigger by the VBATWIO1 pin is generated"]
7896 pub const _0: Self = Self::new(0);
7897
7898 #[doc = "A wakeup trigger by the VBATWIO1 pin is generated"]
7899 pub const _1: Self = Self::new(1);
7900 }
7901 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7902 pub struct Vch0F_SPEC;
7903 pub type Vch0F = crate::EnumBitfieldStruct<u8, Vch0F_SPEC>;
7904 impl Vch0F {
7905 #[doc = "No wakeup trigger by the VBATWIO0 pin is generated"]
7906 pub const _0: Self = Self::new(0);
7907
7908 #[doc = "A wakeup trigger by the VBATWIO0 pin is generated"]
7909 pub const _1: Self = Self::new(1);
7910 }
7911}
7912#[doc(hidden)]
7913#[derive(Copy, Clone, Eq, PartialEq)]
7914pub struct Vbtbkr_SPEC;
7915impl crate::sealed::RegSpec for Vbtbkr_SPEC {
7916 type DataType = u8;
7917}
7918
7919#[doc = "VBATT Backup Register \\[%s\\]"]
7920pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
7921
7922impl Vbtbkr {
7923 #[doc = "VBTBKR is a 512-byte readable/writable register to store data powered by VBATT.The value of this register is retained even when VCC is not powered but VBATT is powered.VBTBKR is initialized by VBATT selected voltage power-on-reset."]
7924 #[inline(always)]
7925 pub fn vbtbkr(
7926 self,
7927 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Vbtbkr_SPEC, crate::common::RW> {
7928 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Vbtbkr_SPEC,crate::common::RW>::from_register(self,0)
7929 }
7930}
7931impl ::core::default::Default for Vbtbkr {
7932 #[inline(always)]
7933 fn default() -> Vbtbkr {
7934 <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
7935 }
7936}
7937
7938#[doc(hidden)]
7939#[derive(Copy, Clone, Eq, PartialEq)]
7940pub struct Rstsr0_SPEC;
7941impl crate::sealed::RegSpec for Rstsr0_SPEC {
7942 type DataType = u8;
7943}
7944
7945#[doc = "Reset Status Register 0"]
7946pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
7947
7948impl Rstsr0 {
7949 #[doc = "These bits are read as 0000. The write value should be 0000."]
7950 #[inline(always)]
7951 pub fn reserved(
7952 self,
7953 ) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, Rstsr0_SPEC, crate::common::RW> {
7954 crate::common::RegisterField::<4,0xf,1,0,u8,u8,Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
7955 }
7956
7957 #[doc = "Voltage Monitor 2 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1."]
7958 #[inline(always)]
7959 pub fn lvd2rf(
7960 self,
7961 ) -> crate::common::RegisterField<
7962 3,
7963 0x1,
7964 1,
7965 0,
7966 rstsr0::Lvd2Rf,
7967 rstsr0::Lvd2Rf,
7968 Rstsr0_SPEC,
7969 crate::common::RW,
7970 > {
7971 crate::common::RegisterField::<
7972 3,
7973 0x1,
7974 1,
7975 0,
7976 rstsr0::Lvd2Rf,
7977 rstsr0::Lvd2Rf,
7978 Rstsr0_SPEC,
7979 crate::common::RW,
7980 >::from_register(self, 0)
7981 }
7982
7983 #[doc = "Voltage Monitor 1 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1."]
7984 #[inline(always)]
7985 pub fn lvd1rf(
7986 self,
7987 ) -> crate::common::RegisterField<
7988 2,
7989 0x1,
7990 1,
7991 0,
7992 rstsr0::Lvd1Rf,
7993 rstsr0::Lvd1Rf,
7994 Rstsr0_SPEC,
7995 crate::common::RW,
7996 > {
7997 crate::common::RegisterField::<
7998 2,
7999 0x1,
8000 1,
8001 0,
8002 rstsr0::Lvd1Rf,
8003 rstsr0::Lvd1Rf,
8004 Rstsr0_SPEC,
8005 crate::common::RW,
8006 >::from_register(self, 0)
8007 }
8008
8009 #[doc = "Voltage Monitor 0 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1."]
8010 #[inline(always)]
8011 pub fn lvd0rf(
8012 self,
8013 ) -> crate::common::RegisterField<
8014 1,
8015 0x1,
8016 1,
8017 0,
8018 rstsr0::Lvd0Rf,
8019 rstsr0::Lvd0Rf,
8020 Rstsr0_SPEC,
8021 crate::common::RW,
8022 > {
8023 crate::common::RegisterField::<
8024 1,
8025 0x1,
8026 1,
8027 0,
8028 rstsr0::Lvd0Rf,
8029 rstsr0::Lvd0Rf,
8030 Rstsr0_SPEC,
8031 crate::common::RW,
8032 >::from_register(self, 0)
8033 }
8034
8035 #[doc = "Power-On Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1."]
8036 #[inline(always)]
8037 pub fn porf(
8038 self,
8039 ) -> crate::common::RegisterField<
8040 0,
8041 0x1,
8042 1,
8043 0,
8044 rstsr0::Porf,
8045 rstsr0::Porf,
8046 Rstsr0_SPEC,
8047 crate::common::RW,
8048 > {
8049 crate::common::RegisterField::<
8050 0,
8051 0x1,
8052 1,
8053 0,
8054 rstsr0::Porf,
8055 rstsr0::Porf,
8056 Rstsr0_SPEC,
8057 crate::common::RW,
8058 >::from_register(self, 0)
8059 }
8060}
8061impl ::core::default::Default for Rstsr0 {
8062 #[inline(always)]
8063 fn default() -> Rstsr0 {
8064 <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
8065 }
8066}
8067pub mod rstsr0 {
8068
8069 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8070 pub struct Lvd2Rf_SPEC;
8071 pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
8072 impl Lvd2Rf {
8073 #[doc = "Voltage Monitor 2 reset not detected."]
8074 pub const _0: Self = Self::new(0);
8075
8076 #[doc = "Voltage Monitor 2 reset detected."]
8077 pub const _1: Self = Self::new(1);
8078 }
8079 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8080 pub struct Lvd1Rf_SPEC;
8081 pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
8082 impl Lvd1Rf {
8083 #[doc = "Voltage Monitor 1 reset not detected."]
8084 pub const _0: Self = Self::new(0);
8085
8086 #[doc = "Voltage Monitor 1 reset detected."]
8087 pub const _1: Self = Self::new(1);
8088 }
8089 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8090 pub struct Lvd0Rf_SPEC;
8091 pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
8092 impl Lvd0Rf {
8093 #[doc = "Voltage Monitor 0 reset not detected."]
8094 pub const _0: Self = Self::new(0);
8095
8096 #[doc = "Voltage Monitor 0 reset detected."]
8097 pub const _1: Self = Self::new(1);
8098 }
8099 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8100 pub struct Porf_SPEC;
8101 pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
8102 impl Porf {
8103 #[doc = "Power-on reset not detected."]
8104 pub const _0: Self = Self::new(0);
8105
8106 #[doc = "Power-on reset detected."]
8107 pub const _1: Self = Self::new(1);
8108 }
8109}
8110#[doc(hidden)]
8111#[derive(Copy, Clone, Eq, PartialEq)]
8112pub struct Rstsr2_SPEC;
8113impl crate::sealed::RegSpec for Rstsr2_SPEC {
8114 type DataType = u8;
8115}
8116
8117#[doc = "Reset Status Register 2"]
8118pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
8119
8120impl Rstsr2 {
8121 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
8122 #[inline(always)]
8123 pub fn reserved(
8124 self,
8125 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Rstsr2_SPEC, crate::common::RW> {
8126 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Rstsr2_SPEC,crate::common::RW>::from_register(self,0)
8127 }
8128
8129 #[doc = "Cold/Warm Start Determination FlagNote: Only 1 can be written to set the flag."]
8130 #[inline(always)]
8131 pub fn cwsf(
8132 self,
8133 ) -> crate::common::RegisterField<
8134 0,
8135 0x1,
8136 1,
8137 0,
8138 rstsr2::Cwsf,
8139 rstsr2::Cwsf,
8140 Rstsr2_SPEC,
8141 crate::common::RW,
8142 > {
8143 crate::common::RegisterField::<
8144 0,
8145 0x1,
8146 1,
8147 0,
8148 rstsr2::Cwsf,
8149 rstsr2::Cwsf,
8150 Rstsr2_SPEC,
8151 crate::common::RW,
8152 >::from_register(self, 0)
8153 }
8154}
8155impl ::core::default::Default for Rstsr2 {
8156 #[inline(always)]
8157 fn default() -> Rstsr2 {
8158 <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
8159 }
8160}
8161pub mod rstsr2 {
8162
8163 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8164 pub struct Cwsf_SPEC;
8165 pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
8166 impl Cwsf {
8167 #[doc = "Cold start"]
8168 pub const _0: Self = Self::new(0);
8169
8170 #[doc = "Warm start"]
8171 pub const _1: Self = Self::new(1);
8172 }
8173}
8174#[doc(hidden)]
8175#[derive(Copy, Clone, Eq, PartialEq)]
8176pub struct Rstsr1_SPEC;
8177impl crate::sealed::RegSpec for Rstsr1_SPEC {
8178 type DataType = u16;
8179}
8180
8181#[doc = "Reset Status Register 1"]
8182pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
8183
8184impl Rstsr1 {
8185 #[doc = "SP Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8186 #[inline(always)]
8187 pub fn sperf(
8188 self,
8189 ) -> crate::common::RegisterField<
8190 12,
8191 0x1,
8192 1,
8193 0,
8194 rstsr1::Sperf,
8195 rstsr1::Sperf,
8196 Rstsr1_SPEC,
8197 crate::common::RW,
8198 > {
8199 crate::common::RegisterField::<
8200 12,
8201 0x1,
8202 1,
8203 0,
8204 rstsr1::Sperf,
8205 rstsr1::Sperf,
8206 Rstsr1_SPEC,
8207 crate::common::RW,
8208 >::from_register(self, 0)
8209 }
8210
8211 #[doc = "Bus Master MPU Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8212 #[inline(always)]
8213 pub fn busmrf(
8214 self,
8215 ) -> crate::common::RegisterField<
8216 11,
8217 0x1,
8218 1,
8219 0,
8220 rstsr1::Busmrf,
8221 rstsr1::Busmrf,
8222 Rstsr1_SPEC,
8223 crate::common::RW,
8224 > {
8225 crate::common::RegisterField::<
8226 11,
8227 0x1,
8228 1,
8229 0,
8230 rstsr1::Busmrf,
8231 rstsr1::Busmrf,
8232 Rstsr1_SPEC,
8233 crate::common::RW,
8234 >::from_register(self, 0)
8235 }
8236
8237 #[doc = "Bus Slave MPU Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8238 #[inline(always)]
8239 pub fn bussrf(
8240 self,
8241 ) -> crate::common::RegisterField<
8242 10,
8243 0x1,
8244 1,
8245 0,
8246 rstsr1::Bussrf,
8247 rstsr1::Bussrf,
8248 Rstsr1_SPEC,
8249 crate::common::RW,
8250 > {
8251 crate::common::RegisterField::<
8252 10,
8253 0x1,
8254 1,
8255 0,
8256 rstsr1::Bussrf,
8257 rstsr1::Bussrf,
8258 Rstsr1_SPEC,
8259 crate::common::RW,
8260 >::from_register(self, 0)
8261 }
8262
8263 #[doc = "RAM ECC Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8264 #[inline(always)]
8265 pub fn reerf(
8266 self,
8267 ) -> crate::common::RegisterField<
8268 9,
8269 0x1,
8270 1,
8271 0,
8272 rstsr1::Reerf,
8273 rstsr1::Reerf,
8274 Rstsr1_SPEC,
8275 crate::common::RW,
8276 > {
8277 crate::common::RegisterField::<
8278 9,
8279 0x1,
8280 1,
8281 0,
8282 rstsr1::Reerf,
8283 rstsr1::Reerf,
8284 Rstsr1_SPEC,
8285 crate::common::RW,
8286 >::from_register(self, 0)
8287 }
8288
8289 #[doc = "RAM Parity Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8290 #[inline(always)]
8291 pub fn rperf(
8292 self,
8293 ) -> crate::common::RegisterField<
8294 8,
8295 0x1,
8296 1,
8297 0,
8298 rstsr1::Rperf,
8299 rstsr1::Rperf,
8300 Rstsr1_SPEC,
8301 crate::common::RW,
8302 > {
8303 crate::common::RegisterField::<
8304 8,
8305 0x1,
8306 1,
8307 0,
8308 rstsr1::Rperf,
8309 rstsr1::Rperf,
8310 Rstsr1_SPEC,
8311 crate::common::RW,
8312 >::from_register(self, 0)
8313 }
8314
8315 #[doc = "These bits are read as 00000. The write value should be 00000."]
8316 #[inline(always)]
8317 pub fn reserved(
8318 self,
8319 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Rstsr1_SPEC, crate::common::RW> {
8320 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
8321 }
8322
8323 #[doc = "Software Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8324 #[inline(always)]
8325 pub fn swrf(
8326 self,
8327 ) -> crate::common::RegisterField<
8328 2,
8329 0x1,
8330 1,
8331 0,
8332 rstsr1::Swrf,
8333 rstsr1::Swrf,
8334 Rstsr1_SPEC,
8335 crate::common::RW,
8336 > {
8337 crate::common::RegisterField::<
8338 2,
8339 0x1,
8340 1,
8341 0,
8342 rstsr1::Swrf,
8343 rstsr1::Swrf,
8344 Rstsr1_SPEC,
8345 crate::common::RW,
8346 >::from_register(self, 0)
8347 }
8348
8349 #[doc = "Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8350 #[inline(always)]
8351 pub fn wdtrf(
8352 self,
8353 ) -> crate::common::RegisterField<
8354 1,
8355 0x1,
8356 1,
8357 0,
8358 rstsr1::Wdtrf,
8359 rstsr1::Wdtrf,
8360 Rstsr1_SPEC,
8361 crate::common::RW,
8362 > {
8363 crate::common::RegisterField::<
8364 1,
8365 0x1,
8366 1,
8367 0,
8368 rstsr1::Wdtrf,
8369 rstsr1::Wdtrf,
8370 Rstsr1_SPEC,
8371 crate::common::RW,
8372 >::from_register(self, 0)
8373 }
8374
8375 #[doc = "Independent Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1."]
8376 #[inline(always)]
8377 pub fn iwdtrf(
8378 self,
8379 ) -> crate::common::RegisterField<
8380 0,
8381 0x1,
8382 1,
8383 0,
8384 rstsr1::Iwdtrf,
8385 rstsr1::Iwdtrf,
8386 Rstsr1_SPEC,
8387 crate::common::RW,
8388 > {
8389 crate::common::RegisterField::<
8390 0,
8391 0x1,
8392 1,
8393 0,
8394 rstsr1::Iwdtrf,
8395 rstsr1::Iwdtrf,
8396 Rstsr1_SPEC,
8397 crate::common::RW,
8398 >::from_register(self, 0)
8399 }
8400}
8401impl ::core::default::Default for Rstsr1 {
8402 #[inline(always)]
8403 fn default() -> Rstsr1 {
8404 <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
8405 }
8406}
8407pub mod rstsr1 {
8408
8409 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8410 pub struct Sperf_SPEC;
8411 pub type Sperf = crate::EnumBitfieldStruct<u8, Sperf_SPEC>;
8412 impl Sperf {
8413 #[doc = "SP error reset not detected."]
8414 pub const _0: Self = Self::new(0);
8415
8416 #[doc = "SP error reset detected."]
8417 pub const _1: Self = Self::new(1);
8418 }
8419 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8420 pub struct Busmrf_SPEC;
8421 pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
8422 impl Busmrf {
8423 #[doc = "Bus Master MPU reset not detected."]
8424 pub const _0: Self = Self::new(0);
8425
8426 #[doc = "Bus Master MPU reset detected."]
8427 pub const _1: Self = Self::new(1);
8428 }
8429 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8430 pub struct Bussrf_SPEC;
8431 pub type Bussrf = crate::EnumBitfieldStruct<u8, Bussrf_SPEC>;
8432 impl Bussrf {
8433 #[doc = "Bus Slave MPU reset not detected."]
8434 pub const _0: Self = Self::new(0);
8435
8436 #[doc = "Bus Slave MPU reset detected."]
8437 pub const _1: Self = Self::new(1);
8438 }
8439 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8440 pub struct Reerf_SPEC;
8441 pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
8442 impl Reerf {
8443 #[doc = "RAM ECC error reset not detected."]
8444 pub const _0: Self = Self::new(0);
8445
8446 #[doc = "RAM ECC error reset detected."]
8447 pub const _1: Self = Self::new(1);
8448 }
8449 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8450 pub struct Rperf_SPEC;
8451 pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
8452 impl Rperf {
8453 #[doc = "RAM parity error reset not detected."]
8454 pub const _0: Self = Self::new(0);
8455
8456 #[doc = "RAM parity error reset detected."]
8457 pub const _1: Self = Self::new(1);
8458 }
8459 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8460 pub struct Swrf_SPEC;
8461 pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
8462 impl Swrf {
8463 #[doc = "Software reset not detected."]
8464 pub const _0: Self = Self::new(0);
8465
8466 #[doc = "Software reset detected."]
8467 pub const _1: Self = Self::new(1);
8468 }
8469 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8470 pub struct Wdtrf_SPEC;
8471 pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
8472 impl Wdtrf {
8473 #[doc = "Watchdog timer reset not detected."]
8474 pub const _0: Self = Self::new(0);
8475
8476 #[doc = "Watchdog timer reset detected."]
8477 pub const _1: Self = Self::new(1);
8478 }
8479 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8480 pub struct Iwdtrf_SPEC;
8481 pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
8482 impl Iwdtrf {
8483 #[doc = "Independent watchdog timer reset not detected."]
8484 pub const _0: Self = Self::new(0);
8485
8486 #[doc = "Independent watchdog timer reset detected."]
8487 pub const _1: Self = Self::new(1);
8488 }
8489}
8490#[doc(hidden)]
8491#[derive(Copy, Clone, Eq, PartialEq)]
8492pub struct Prcr_SPEC;
8493impl crate::sealed::RegSpec for Prcr_SPEC {
8494 type DataType = u16;
8495}
8496
8497#[doc = "Protect Register"]
8498pub type Prcr = crate::RegValueT<Prcr_SPEC>;
8499
8500impl Prcr {
8501 #[doc = "PRC Key Code"]
8502 #[inline(always)]
8503 pub fn prkey(
8504 self,
8505 ) -> crate::common::RegisterField<
8506 8,
8507 0xff,
8508 1,
8509 0,
8510 prcr::Prkey,
8511 prcr::Prkey,
8512 Prcr_SPEC,
8513 crate::common::W,
8514 > {
8515 crate::common::RegisterField::<
8516 8,
8517 0xff,
8518 1,
8519 0,
8520 prcr::Prkey,
8521 prcr::Prkey,
8522 Prcr_SPEC,
8523 crate::common::W,
8524 >::from_register(self, 0)
8525 }
8526
8527 #[doc = "Protect Bit 3"]
8528 #[inline(always)]
8529 pub fn prc3(
8530 self,
8531 ) -> crate::common::RegisterField<
8532 3,
8533 0x1,
8534 1,
8535 0,
8536 prcr::Prc3,
8537 prcr::Prc3,
8538 Prcr_SPEC,
8539 crate::common::RW,
8540 > {
8541 crate::common::RegisterField::<
8542 3,
8543 0x1,
8544 1,
8545 0,
8546 prcr::Prc3,
8547 prcr::Prc3,
8548 Prcr_SPEC,
8549 crate::common::RW,
8550 >::from_register(self, 0)
8551 }
8552
8553 #[doc = "This bit is read as 0. The write value should be 0."]
8554 #[inline(always)]
8555 pub fn reserved(
8556 self,
8557 ) -> crate::common::RegisterFieldBool<2, 1, 0, Prcr_SPEC, crate::common::RW> {
8558 crate::common::RegisterFieldBool::<2, 1, 0, Prcr_SPEC, crate::common::RW>::from_register(
8559 self, 0,
8560 )
8561 }
8562
8563 #[doc = "Protect Bit 1"]
8564 #[inline(always)]
8565 pub fn prc1(
8566 self,
8567 ) -> crate::common::RegisterField<
8568 1,
8569 0x1,
8570 1,
8571 0,
8572 prcr::Prc1,
8573 prcr::Prc1,
8574 Prcr_SPEC,
8575 crate::common::RW,
8576 > {
8577 crate::common::RegisterField::<
8578 1,
8579 0x1,
8580 1,
8581 0,
8582 prcr::Prc1,
8583 prcr::Prc1,
8584 Prcr_SPEC,
8585 crate::common::RW,
8586 >::from_register(self, 0)
8587 }
8588
8589 #[doc = "Protect Bit 0"]
8590 #[inline(always)]
8591 pub fn prc0(
8592 self,
8593 ) -> crate::common::RegisterField<
8594 0,
8595 0x1,
8596 1,
8597 0,
8598 prcr::Prc0,
8599 prcr::Prc0,
8600 Prcr_SPEC,
8601 crate::common::RW,
8602 > {
8603 crate::common::RegisterField::<
8604 0,
8605 0x1,
8606 1,
8607 0,
8608 prcr::Prc0,
8609 prcr::Prc0,
8610 Prcr_SPEC,
8611 crate::common::RW,
8612 >::from_register(self, 0)
8613 }
8614}
8615impl ::core::default::Default for Prcr {
8616 #[inline(always)]
8617 fn default() -> Prcr {
8618 <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
8619 }
8620}
8621pub mod prcr {
8622
8623 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8624 pub struct Prkey_SPEC;
8625 pub type Prkey = crate::EnumBitfieldStruct<u8, Prkey_SPEC>;
8626 impl Prkey {
8627 #[doc = "Enables writing to the PRCR register."]
8628 pub const _0_X_5_A: Self = Self::new(90);
8629
8630 #[doc = "Disables writing to the PRCR register."]
8631 pub const OTHERS: Self = Self::new(0);
8632 }
8633 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8634 pub struct Prc3_SPEC;
8635 pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
8636 impl Prc3 {
8637 #[doc = "Writes protected."]
8638 pub const _0: Self = Self::new(0);
8639
8640 #[doc = "Writes not protected."]
8641 pub const _1: Self = Self::new(1);
8642 }
8643 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8644 pub struct Prc1_SPEC;
8645 pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
8646 impl Prc1 {
8647 #[doc = "Writes protected."]
8648 pub const _0: Self = Self::new(0);
8649
8650 #[doc = "Writes not protected."]
8651 pub const _1: Self = Self::new(1);
8652 }
8653 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8654 pub struct Prc0_SPEC;
8655 pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
8656 impl Prc0 {
8657 #[doc = "Writes protected."]
8658 pub const _0: Self = Self::new(0);
8659
8660 #[doc = "Writes not protected."]
8661 pub const _1: Self = Self::new(1);
8662 }
8663}
8664#[doc(hidden)]
8665#[derive(Copy, Clone, Eq, PartialEq)]
8666pub struct Sbycr_SPEC;
8667impl crate::sealed::RegSpec for Sbycr_SPEC {
8668 type DataType = u16;
8669}
8670
8671#[doc = "Standby Control Register"]
8672pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
8673
8674impl Sbycr {
8675 #[doc = "Software Standby"]
8676 #[inline(always)]
8677 pub fn ssby(
8678 self,
8679 ) -> crate::common::RegisterField<
8680 15,
8681 0x1,
8682 1,
8683 0,
8684 sbycr::Ssby,
8685 sbycr::Ssby,
8686 Sbycr_SPEC,
8687 crate::common::RW,
8688 > {
8689 crate::common::RegisterField::<
8690 15,
8691 0x1,
8692 1,
8693 0,
8694 sbycr::Ssby,
8695 sbycr::Ssby,
8696 Sbycr_SPEC,
8697 crate::common::RW,
8698 >::from_register(self, 0)
8699 }
8700
8701 #[doc = "Output Port Enable"]
8702 #[inline(always)]
8703 pub fn ope(
8704 self,
8705 ) -> crate::common::RegisterField<
8706 14,
8707 0x1,
8708 1,
8709 0,
8710 sbycr::Ope,
8711 sbycr::Ope,
8712 Sbycr_SPEC,
8713 crate::common::RW,
8714 > {
8715 crate::common::RegisterField::<
8716 14,
8717 0x1,
8718 1,
8719 0,
8720 sbycr::Ope,
8721 sbycr::Ope,
8722 Sbycr_SPEC,
8723 crate::common::RW,
8724 >::from_register(self, 0)
8725 }
8726
8727 #[doc = "These bits are read as 00000000000000. The write value should be 00000000000000."]
8728 #[inline(always)]
8729 pub fn reserved(
8730 self,
8731 ) -> crate::common::RegisterField<0, 0x3fff, 1, 0, u16, u16, Sbycr_SPEC, crate::common::RW>
8732 {
8733 crate::common::RegisterField::<0,0x3fff,1,0,u16,u16,Sbycr_SPEC,crate::common::RW>::from_register(self,0)
8734 }
8735}
8736impl ::core::default::Default for Sbycr {
8737 #[inline(always)]
8738 fn default() -> Sbycr {
8739 <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
8740 }
8741}
8742pub mod sbycr {
8743
8744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8745 pub struct Ssby_SPEC;
8746 pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
8747 impl Ssby {
8748 #[doc = "Sleep mode"]
8749 pub const _0: Self = Self::new(0);
8750
8751 #[doc = "Software Standby mode"]
8752 pub const _1: Self = Self::new(1);
8753 }
8754 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8755 pub struct Ope_SPEC;
8756 pub type Ope = crate::EnumBitfieldStruct<u8, Ope_SPEC>;
8757 impl Ope {
8758 #[doc = "In software standby mode Address output pins, Data output pins, and other bus control signal output pins are set to the high-impedance state. In snooze mode, the status of the address bus and bus control signals are same as before entering software standby mode."]
8759 pub const _0: Self = Self::new(0);
8760
8761 #[doc = "In software standby mode Address output pins, Data output pins, and other bus control signal output pins retain the output state."]
8762 pub const _1: Self = Self::new(1);
8763 }
8764}
8765#[doc(hidden)]
8766#[derive(Copy, Clone, Eq, PartialEq)]
8767pub struct Mstpcra_SPEC;
8768impl crate::sealed::RegSpec for Mstpcra_SPEC {
8769 type DataType = u32;
8770}
8771
8772#[doc = "Module Stop Control Register A"]
8773pub type Mstpcra = crate::RegValueT<Mstpcra_SPEC>;
8774
8775impl Mstpcra {
8776 #[doc = "DMA Controller/Data Transfer Controller Module Stop"]
8777 #[inline(always)]
8778 pub fn mstpa22(
8779 self,
8780 ) -> crate::common::RegisterField<
8781 22,
8782 0x1,
8783 1,
8784 0,
8785 mstpcra::Mstpa22,
8786 mstpcra::Mstpa22,
8787 Mstpcra_SPEC,
8788 crate::common::RW,
8789 > {
8790 crate::common::RegisterField::<
8791 22,
8792 0x1,
8793 1,
8794 0,
8795 mstpcra::Mstpa22,
8796 mstpcra::Mstpa22,
8797 Mstpcra_SPEC,
8798 crate::common::RW,
8799 >::from_register(self, 0)
8800 }
8801
8802 #[doc = "ECCRAM Module Stop"]
8803 #[inline(always)]
8804 pub fn mstpa6(
8805 self,
8806 ) -> crate::common::RegisterField<
8807 6,
8808 0x1,
8809 1,
8810 0,
8811 mstpcra::Mstpa6,
8812 mstpcra::Mstpa6,
8813 Mstpcra_SPEC,
8814 crate::common::RW,
8815 > {
8816 crate::common::RegisterField::<
8817 6,
8818 0x1,
8819 1,
8820 0,
8821 mstpcra::Mstpa6,
8822 mstpcra::Mstpa6,
8823 Mstpcra_SPEC,
8824 crate::common::RW,
8825 >::from_register(self, 0)
8826 }
8827
8828 #[doc = "These bits are read as 11111. The write value should be 11111."]
8829 #[inline(always)]
8830 pub fn reserved(
8831 self,
8832 ) -> crate::common::RegisterField<1, 0x1f, 1, 0, u8, u8, Mstpcra_SPEC, crate::common::RW> {
8833 crate::common::RegisterField::<1,0x1f,1,0,u8,u8,Mstpcra_SPEC,crate::common::RW>::from_register(self,0)
8834 }
8835
8836 #[doc = "RAM0 Module Stop"]
8837 #[inline(always)]
8838 pub fn mstpa0(
8839 self,
8840 ) -> crate::common::RegisterField<
8841 0,
8842 0x1,
8843 1,
8844 0,
8845 mstpcra::Mstpa0,
8846 mstpcra::Mstpa0,
8847 Mstpcra_SPEC,
8848 crate::common::RW,
8849 > {
8850 crate::common::RegisterField::<
8851 0,
8852 0x1,
8853 1,
8854 0,
8855 mstpcra::Mstpa0,
8856 mstpcra::Mstpa0,
8857 Mstpcra_SPEC,
8858 crate::common::RW,
8859 >::from_register(self, 0)
8860 }
8861}
8862impl ::core::default::Default for Mstpcra {
8863 #[inline(always)]
8864 fn default() -> Mstpcra {
8865 <crate::RegValueT<Mstpcra_SPEC> as RegisterValue<_>>::new(4290772926)
8866 }
8867}
8868pub mod mstpcra {
8869
8870 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8871 pub struct Mstpa22_SPEC;
8872 pub type Mstpa22 = crate::EnumBitfieldStruct<u8, Mstpa22_SPEC>;
8873 impl Mstpa22 {
8874 #[doc = "Cancel the module-stop state"]
8875 pub const _0: Self = Self::new(0);
8876
8877 #[doc = "Enter the module-stop state"]
8878 pub const _1: Self = Self::new(1);
8879 }
8880 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8881 pub struct Mstpa6_SPEC;
8882 pub type Mstpa6 = crate::EnumBitfieldStruct<u8, Mstpa6_SPEC>;
8883 impl Mstpa6 {
8884 #[doc = "Cancel the module-stop state"]
8885 pub const _0: Self = Self::new(0);
8886
8887 #[doc = "Enter the module-stop state"]
8888 pub const _1: Self = Self::new(1);
8889 }
8890 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8891 pub struct Mstpa0_SPEC;
8892 pub type Mstpa0 = crate::EnumBitfieldStruct<u8, Mstpa0_SPEC>;
8893 impl Mstpa0 {
8894 #[doc = "Cancel the module-stop state"]
8895 pub const _0: Self = Self::new(0);
8896
8897 #[doc = "Enter the module-stop state"]
8898 pub const _1: Self = Self::new(1);
8899 }
8900}
8901#[doc(hidden)]
8902#[derive(Copy, Clone, Eq, PartialEq)]
8903pub struct Snzcr_SPEC;
8904impl crate::sealed::RegSpec for Snzcr_SPEC {
8905 type DataType = u8;
8906}
8907
8908#[doc = "Snooze Control Register"]
8909pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
8910
8911impl Snzcr {
8912 #[doc = "Snooze Mode Enable"]
8913 #[inline(always)]
8914 pub fn snze(
8915 self,
8916 ) -> crate::common::RegisterField<
8917 7,
8918 0x1,
8919 1,
8920 0,
8921 snzcr::Snze,
8922 snzcr::Snze,
8923 Snzcr_SPEC,
8924 crate::common::RW,
8925 > {
8926 crate::common::RegisterField::<
8927 7,
8928 0x1,
8929 1,
8930 0,
8931 snzcr::Snze,
8932 snzcr::Snze,
8933 Snzcr_SPEC,
8934 crate::common::RW,
8935 >::from_register(self, 0)
8936 }
8937
8938 #[doc = "These bits are read as 00000. The write value should be 00000."]
8939 #[inline(always)]
8940 pub fn reserved(
8941 self,
8942 ) -> crate::common::RegisterField<2, 0x1f, 1, 0, u8, u8, Snzcr_SPEC, crate::common::RW> {
8943 crate::common::RegisterField::<2,0x1f,1,0,u8,u8,Snzcr_SPEC,crate::common::RW>::from_register(self,0)
8944 }
8945
8946 #[doc = "DTC Enable in Snooze Mode"]
8947 #[inline(always)]
8948 pub fn snzdtcen(
8949 self,
8950 ) -> crate::common::RegisterField<
8951 1,
8952 0x1,
8953 1,
8954 0,
8955 snzcr::Snzdtcen,
8956 snzcr::Snzdtcen,
8957 Snzcr_SPEC,
8958 crate::common::RW,
8959 > {
8960 crate::common::RegisterField::<
8961 1,
8962 0x1,
8963 1,
8964 0,
8965 snzcr::Snzdtcen,
8966 snzcr::Snzdtcen,
8967 Snzcr_SPEC,
8968 crate::common::RW,
8969 >::from_register(self, 0)
8970 }
8971
8972 #[doc = "RXD0 Snooze Request Enable NOTE: Do not set to 1 other than in asynchronous mode."]
8973 #[inline(always)]
8974 pub fn rxdreqen(
8975 self,
8976 ) -> crate::common::RegisterField<
8977 0,
8978 0x1,
8979 1,
8980 0,
8981 snzcr::Rxdreqen,
8982 snzcr::Rxdreqen,
8983 Snzcr_SPEC,
8984 crate::common::RW,
8985 > {
8986 crate::common::RegisterField::<
8987 0,
8988 0x1,
8989 1,
8990 0,
8991 snzcr::Rxdreqen,
8992 snzcr::Rxdreqen,
8993 Snzcr_SPEC,
8994 crate::common::RW,
8995 >::from_register(self, 0)
8996 }
8997}
8998impl ::core::default::Default for Snzcr {
8999 #[inline(always)]
9000 fn default() -> Snzcr {
9001 <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
9002 }
9003}
9004pub mod snzcr {
9005
9006 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9007 pub struct Snze_SPEC;
9008 pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
9009 impl Snze {
9010 #[doc = "Disable Snooze Mode"]
9011 pub const _0: Self = Self::new(0);
9012
9013 #[doc = "Enable Snooze Mode"]
9014 pub const _1: Self = Self::new(1);
9015 }
9016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9017 pub struct Snzdtcen_SPEC;
9018 pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
9019 impl Snzdtcen {
9020 #[doc = "Disable DTC operation"]
9021 pub const _0: Self = Self::new(0);
9022
9023 #[doc = "Enable DTC operation"]
9024 pub const _1: Self = Self::new(1);
9025 }
9026 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9027 pub struct Rxdreqen_SPEC;
9028 pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
9029 impl Rxdreqen {
9030 #[doc = "Ignore RXD0 falling edge in Software Standby mode."]
9031 pub const _0: Self = Self::new(0);
9032
9033 #[doc = "Accept RXD0 falling edge in Standby mode as a request to transit to Snooze mode."]
9034 pub const _1: Self = Self::new(1);
9035 }
9036}
9037#[doc(hidden)]
9038#[derive(Copy, Clone, Eq, PartialEq)]
9039pub struct Snzedcr_SPEC;
9040impl crate::sealed::RegSpec for Snzedcr_SPEC {
9041 type DataType = u8;
9042}
9043
9044#[doc = "Snooze End Control Register"]
9045pub type Snzedcr = crate::RegValueT<Snzedcr_SPEC>;
9046
9047impl Snzedcr {
9048 #[doc = "SCI0 Address Mismatch Snooze End Enable"]
9049 #[inline(always)]
9050 pub fn sci0umted(
9051 self,
9052 ) -> crate::common::RegisterField<
9053 7,
9054 0x1,
9055 1,
9056 0,
9057 snzedcr::Sci0Umted,
9058 snzedcr::Sci0Umted,
9059 Snzedcr_SPEC,
9060 crate::common::RW,
9061 > {
9062 crate::common::RegisterField::<
9063 7,
9064 0x1,
9065 1,
9066 0,
9067 snzedcr::Sci0Umted,
9068 snzedcr::Sci0Umted,
9069 Snzedcr_SPEC,
9070 crate::common::RW,
9071 >::from_register(self, 0)
9072 }
9073
9074 #[doc = "These bits are read as 00. The write value should be 00."]
9075 #[inline(always)]
9076 pub fn reserved(
9077 self,
9078 ) -> crate::common::RegisterField<5, 0x3, 1, 0, u8, u8, Snzedcr_SPEC, crate::common::RW> {
9079 crate::common::RegisterField::<5,0x3,1,0,u8,u8,Snzedcr_SPEC,crate::common::RW>::from_register(self,0)
9080 }
9081
9082 #[doc = "ADC140 Compare Mismatch Snooze End Enable"]
9083 #[inline(always)]
9084 pub fn ad0umted(
9085 self,
9086 ) -> crate::common::RegisterField<
9087 4,
9088 0x1,
9089 1,
9090 0,
9091 snzedcr::Ad0Umted,
9092 snzedcr::Ad0Umted,
9093 Snzedcr_SPEC,
9094 crate::common::RW,
9095 > {
9096 crate::common::RegisterField::<
9097 4,
9098 0x1,
9099 1,
9100 0,
9101 snzedcr::Ad0Umted,
9102 snzedcr::Ad0Umted,
9103 Snzedcr_SPEC,
9104 crate::common::RW,
9105 >::from_register(self, 0)
9106 }
9107
9108 #[doc = "ADC140 Compare Match Snooze End Enable"]
9109 #[inline(always)]
9110 pub fn ad0mated(
9111 self,
9112 ) -> crate::common::RegisterField<
9113 3,
9114 0x1,
9115 1,
9116 0,
9117 snzedcr::Ad0Mated,
9118 snzedcr::Ad0Mated,
9119 Snzedcr_SPEC,
9120 crate::common::RW,
9121 > {
9122 crate::common::RegisterField::<
9123 3,
9124 0x1,
9125 1,
9126 0,
9127 snzedcr::Ad0Mated,
9128 snzedcr::Ad0Mated,
9129 Snzedcr_SPEC,
9130 crate::common::RW,
9131 >::from_register(self, 0)
9132 }
9133
9134 #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
9135 #[inline(always)]
9136 pub fn dtcnzred(
9137 self,
9138 ) -> crate::common::RegisterField<
9139 2,
9140 0x1,
9141 1,
9142 0,
9143 snzedcr::Dtcnzred,
9144 snzedcr::Dtcnzred,
9145 Snzedcr_SPEC,
9146 crate::common::RW,
9147 > {
9148 crate::common::RegisterField::<
9149 2,
9150 0x1,
9151 1,
9152 0,
9153 snzedcr::Dtcnzred,
9154 snzedcr::Dtcnzred,
9155 Snzedcr_SPEC,
9156 crate::common::RW,
9157 >::from_register(self, 0)
9158 }
9159
9160 #[doc = "Last DTC Transmission Completion Snooze End Enable"]
9161 #[inline(always)]
9162 pub fn dtczred(
9163 self,
9164 ) -> crate::common::RegisterField<
9165 1,
9166 0x1,
9167 1,
9168 0,
9169 snzedcr::Dtczred,
9170 snzedcr::Dtczred,
9171 Snzedcr_SPEC,
9172 crate::common::RW,
9173 > {
9174 crate::common::RegisterField::<
9175 1,
9176 0x1,
9177 1,
9178 0,
9179 snzedcr::Dtczred,
9180 snzedcr::Dtczred,
9181 Snzedcr_SPEC,
9182 crate::common::RW,
9183 >::from_register(self, 0)
9184 }
9185
9186 #[doc = "AGT1 Underflow Snooze End Enable"]
9187 #[inline(always)]
9188 pub fn agt1unfed(
9189 self,
9190 ) -> crate::common::RegisterField<
9191 0,
9192 0x1,
9193 1,
9194 0,
9195 snzedcr::Agt1Unfed,
9196 snzedcr::Agt1Unfed,
9197 Snzedcr_SPEC,
9198 crate::common::RW,
9199 > {
9200 crate::common::RegisterField::<
9201 0,
9202 0x1,
9203 1,
9204 0,
9205 snzedcr::Agt1Unfed,
9206 snzedcr::Agt1Unfed,
9207 Snzedcr_SPEC,
9208 crate::common::RW,
9209 >::from_register(self, 0)
9210 }
9211}
9212impl ::core::default::Default for Snzedcr {
9213 #[inline(always)]
9214 fn default() -> Snzedcr {
9215 <crate::RegValueT<Snzedcr_SPEC> as RegisterValue<_>>::new(0)
9216 }
9217}
9218pub mod snzedcr {
9219
9220 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9221 pub struct Sci0Umted_SPEC;
9222 pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
9223 impl Sci0Umted {
9224 #[doc = "Disable the Snooze End request"]
9225 pub const _0: Self = Self::new(0);
9226
9227 #[doc = "Enable the Snooze End request"]
9228 pub const _1: Self = Self::new(1);
9229 }
9230 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9231 pub struct Ad0Umted_SPEC;
9232 pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
9233 impl Ad0Umted {
9234 #[doc = "Disable the Snooze End request"]
9235 pub const _0: Self = Self::new(0);
9236
9237 #[doc = "Enable the Snooze End request"]
9238 pub const _1: Self = Self::new(1);
9239 }
9240 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9241 pub struct Ad0Mated_SPEC;
9242 pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
9243 impl Ad0Mated {
9244 #[doc = "Disable the Snooze End request"]
9245 pub const _0: Self = Self::new(0);
9246
9247 #[doc = "Enable the Snooze End request"]
9248 pub const _1: Self = Self::new(1);
9249 }
9250 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9251 pub struct Dtcnzred_SPEC;
9252 pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
9253 impl Dtcnzred {
9254 #[doc = "Disable the Snooze End request"]
9255 pub const _0: Self = Self::new(0);
9256
9257 #[doc = "Enable the Snooze End request"]
9258 pub const _1: Self = Self::new(1);
9259 }
9260 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9261 pub struct Dtczred_SPEC;
9262 pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
9263 impl Dtczred {
9264 #[doc = "Disable the Snooze End request"]
9265 pub const _0: Self = Self::new(0);
9266
9267 #[doc = "Enable the Snooze End request"]
9268 pub const _1: Self = Self::new(1);
9269 }
9270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9271 pub struct Agt1Unfed_SPEC;
9272 pub type Agt1Unfed = crate::EnumBitfieldStruct<u8, Agt1Unfed_SPEC>;
9273 impl Agt1Unfed {
9274 #[doc = "Disable the Snooze End request"]
9275 pub const _0: Self = Self::new(0);
9276
9277 #[doc = "Enable the Snooze End request"]
9278 pub const _1: Self = Self::new(1);
9279 }
9280}
9281#[doc(hidden)]
9282#[derive(Copy, Clone, Eq, PartialEq)]
9283pub struct Snzreqcr_SPEC;
9284impl crate::sealed::RegSpec for Snzreqcr_SPEC {
9285 type DataType = u32;
9286}
9287
9288#[doc = "Snooze Request Control Register"]
9289pub type Snzreqcr = crate::RegValueT<Snzreqcr_SPEC>;
9290
9291impl Snzreqcr {
9292 #[doc = "Snooze Request Enable 30Enable AGT1 compare match B snooze request"]
9293 #[inline(always)]
9294 pub fn snzreqen30(
9295 self,
9296 ) -> crate::common::RegisterField<
9297 30,
9298 0x1,
9299 1,
9300 0,
9301 snzreqcr::Snzreqen30,
9302 snzreqcr::Snzreqen30,
9303 Snzreqcr_SPEC,
9304 crate::common::RW,
9305 > {
9306 crate::common::RegisterField::<
9307 30,
9308 0x1,
9309 1,
9310 0,
9311 snzreqcr::Snzreqen30,
9312 snzreqcr::Snzreqen30,
9313 Snzreqcr_SPEC,
9314 crate::common::RW,
9315 >::from_register(self, 0)
9316 }
9317
9318 #[doc = "Snooze Request Enable 29Enable AGT1 compare match A snooze request"]
9319 #[inline(always)]
9320 pub fn snzreqen29(
9321 self,
9322 ) -> crate::common::RegisterField<
9323 29,
9324 0x1,
9325 1,
9326 0,
9327 snzreqcr::Snzreqen29,
9328 snzreqcr::Snzreqen29,
9329 Snzreqcr_SPEC,
9330 crate::common::RW,
9331 > {
9332 crate::common::RegisterField::<
9333 29,
9334 0x1,
9335 1,
9336 0,
9337 snzreqcr::Snzreqen29,
9338 snzreqcr::Snzreqen29,
9339 Snzreqcr_SPEC,
9340 crate::common::RW,
9341 >::from_register(self, 0)
9342 }
9343
9344 #[doc = "Snooze Request Enable 28Enable AGT1 underflow snooze request"]
9345 #[inline(always)]
9346 pub fn snzreqen28(
9347 self,
9348 ) -> crate::common::RegisterField<
9349 28,
9350 0x1,
9351 1,
9352 0,
9353 snzreqcr::Snzreqen28,
9354 snzreqcr::Snzreqen28,
9355 Snzreqcr_SPEC,
9356 crate::common::RW,
9357 > {
9358 crate::common::RegisterField::<
9359 28,
9360 0x1,
9361 1,
9362 0,
9363 snzreqcr::Snzreqen28,
9364 snzreqcr::Snzreqen28,
9365 Snzreqcr_SPEC,
9366 crate::common::RW,
9367 >::from_register(self, 0)
9368 }
9369
9370 #[doc = "Snooze Request Enable 25Enable RTC period snooze request"]
9371 #[inline(always)]
9372 pub fn snzreqen25(
9373 self,
9374 ) -> crate::common::RegisterField<
9375 25,
9376 0x1,
9377 1,
9378 0,
9379 snzreqcr::Snzreqen25,
9380 snzreqcr::Snzreqen25,
9381 Snzreqcr_SPEC,
9382 crate::common::RW,
9383 > {
9384 crate::common::RegisterField::<
9385 25,
9386 0x1,
9387 1,
9388 0,
9389 snzreqcr::Snzreqen25,
9390 snzreqcr::Snzreqen25,
9391 Snzreqcr_SPEC,
9392 crate::common::RW,
9393 >::from_register(self, 0)
9394 }
9395
9396 #[doc = "Snooze Request Enable 24Enable RTC alarm snooze request"]
9397 #[inline(always)]
9398 pub fn snzreqen24(
9399 self,
9400 ) -> crate::common::RegisterField<
9401 24,
9402 0x1,
9403 1,
9404 0,
9405 snzreqcr::Snzreqen24,
9406 snzreqcr::Snzreqen24,
9407 Snzreqcr_SPEC,
9408 crate::common::RW,
9409 > {
9410 crate::common::RegisterField::<
9411 24,
9412 0x1,
9413 1,
9414 0,
9415 snzreqcr::Snzreqen24,
9416 snzreqcr::Snzreqen24,
9417 Snzreqcr_SPEC,
9418 crate::common::RW,
9419 >::from_register(self, 0)
9420 }
9421
9422 #[doc = "Snooze Request Enable 23Enable RTC alarm snooze request"]
9423 #[inline(always)]
9424 pub fn snzreqen23(
9425 self,
9426 ) -> crate::common::RegisterField<
9427 23,
9428 0x1,
9429 1,
9430 0,
9431 snzreqcr::Snzreqen23,
9432 snzreqcr::Snzreqen23,
9433 Snzreqcr_SPEC,
9434 crate::common::RW,
9435 > {
9436 crate::common::RegisterField::<
9437 23,
9438 0x1,
9439 1,
9440 0,
9441 snzreqcr::Snzreqen23,
9442 snzreqcr::Snzreqen23,
9443 Snzreqcr_SPEC,
9444 crate::common::RW,
9445 >::from_register(self, 0)
9446 }
9447
9448 #[doc = "Snooze Request Enable 17Enable KR snooze request"]
9449 #[inline(always)]
9450 pub fn snzreqen17(
9451 self,
9452 ) -> crate::common::RegisterField<
9453 17,
9454 0x1,
9455 1,
9456 0,
9457 snzreqcr::Snzreqen17,
9458 snzreqcr::Snzreqen17,
9459 Snzreqcr_SPEC,
9460 crate::common::RW,
9461 > {
9462 crate::common::RegisterField::<
9463 17,
9464 0x1,
9465 1,
9466 0,
9467 snzreqcr::Snzreqen17,
9468 snzreqcr::Snzreqen17,
9469 Snzreqcr_SPEC,
9470 crate::common::RW,
9471 >::from_register(self, 0)
9472 }
9473
9474 #[doc = "This bit is read as 0. The write value should be 0."]
9475 #[inline(always)]
9476 pub fn reserved(
9477 self,
9478 ) -> crate::common::RegisterFieldBool<16, 1, 0, Snzreqcr_SPEC, crate::common::RW> {
9479 crate::common::RegisterFieldBool::<16,1,0,Snzreqcr_SPEC,crate::common::RW>::from_register(self,0)
9480 }
9481
9482 #[doc = "Snooze Request Enable 15Enable IRQ15 pin snooze request"]
9483 #[inline(always)]
9484 pub fn snzreqen15(
9485 self,
9486 ) -> crate::common::RegisterField<
9487 15,
9488 0x1,
9489 1,
9490 0,
9491 snzreqcr::Snzreqen15,
9492 snzreqcr::Snzreqen15,
9493 Snzreqcr_SPEC,
9494 crate::common::RW,
9495 > {
9496 crate::common::RegisterField::<
9497 15,
9498 0x1,
9499 1,
9500 0,
9501 snzreqcr::Snzreqen15,
9502 snzreqcr::Snzreqen15,
9503 Snzreqcr_SPEC,
9504 crate::common::RW,
9505 >::from_register(self, 0)
9506 }
9507
9508 #[doc = "Snooze Request Enable 14Enable IRQ14 pin snooze request"]
9509 #[inline(always)]
9510 pub fn snzreqen14(
9511 self,
9512 ) -> crate::common::RegisterField<
9513 14,
9514 0x1,
9515 1,
9516 0,
9517 snzreqcr::Snzreqen14,
9518 snzreqcr::Snzreqen14,
9519 Snzreqcr_SPEC,
9520 crate::common::RW,
9521 > {
9522 crate::common::RegisterField::<
9523 14,
9524 0x1,
9525 1,
9526 0,
9527 snzreqcr::Snzreqen14,
9528 snzreqcr::Snzreqen14,
9529 Snzreqcr_SPEC,
9530 crate::common::RW,
9531 >::from_register(self, 0)
9532 }
9533
9534 #[doc = "Snooze Request Enable 13Enable IRQ13 pin snooze request"]
9535 #[inline(always)]
9536 pub fn snzreqen13(
9537 self,
9538 ) -> crate::common::RegisterField<
9539 13,
9540 0x1,
9541 1,
9542 0,
9543 snzreqcr::Snzreqen13,
9544 snzreqcr::Snzreqen13,
9545 Snzreqcr_SPEC,
9546 crate::common::RW,
9547 > {
9548 crate::common::RegisterField::<
9549 13,
9550 0x1,
9551 1,
9552 0,
9553 snzreqcr::Snzreqen13,
9554 snzreqcr::Snzreqen13,
9555 Snzreqcr_SPEC,
9556 crate::common::RW,
9557 >::from_register(self, 0)
9558 }
9559
9560 #[doc = "Snooze Request Enable 12Enable IRQ12 pin snooze request"]
9561 #[inline(always)]
9562 pub fn snzreqen12(
9563 self,
9564 ) -> crate::common::RegisterField<
9565 12,
9566 0x1,
9567 1,
9568 0,
9569 snzreqcr::Snzreqen12,
9570 snzreqcr::Snzreqen12,
9571 Snzreqcr_SPEC,
9572 crate::common::RW,
9573 > {
9574 crate::common::RegisterField::<
9575 12,
9576 0x1,
9577 1,
9578 0,
9579 snzreqcr::Snzreqen12,
9580 snzreqcr::Snzreqen12,
9581 Snzreqcr_SPEC,
9582 crate::common::RW,
9583 >::from_register(self, 0)
9584 }
9585
9586 #[doc = "Snooze Request Enable 11Enable IRQ11 pin snooze request"]
9587 #[inline(always)]
9588 pub fn snzreqen11(
9589 self,
9590 ) -> crate::common::RegisterField<
9591 11,
9592 0x1,
9593 1,
9594 0,
9595 snzreqcr::Snzreqen11,
9596 snzreqcr::Snzreqen11,
9597 Snzreqcr_SPEC,
9598 crate::common::RW,
9599 > {
9600 crate::common::RegisterField::<
9601 11,
9602 0x1,
9603 1,
9604 0,
9605 snzreqcr::Snzreqen11,
9606 snzreqcr::Snzreqen11,
9607 Snzreqcr_SPEC,
9608 crate::common::RW,
9609 >::from_register(self, 0)
9610 }
9611
9612 #[doc = "Snooze Request Enable 10Enable IRQ10 pin snooze request"]
9613 #[inline(always)]
9614 pub fn snzreqen10(
9615 self,
9616 ) -> crate::common::RegisterField<
9617 10,
9618 0x1,
9619 1,
9620 0,
9621 snzreqcr::Snzreqen10,
9622 snzreqcr::Snzreqen10,
9623 Snzreqcr_SPEC,
9624 crate::common::RW,
9625 > {
9626 crate::common::RegisterField::<
9627 10,
9628 0x1,
9629 1,
9630 0,
9631 snzreqcr::Snzreqen10,
9632 snzreqcr::Snzreqen10,
9633 Snzreqcr_SPEC,
9634 crate::common::RW,
9635 >::from_register(self, 0)
9636 }
9637
9638 #[doc = "Snooze Request Enable 9Enable IRQ9 pin snooze request"]
9639 #[inline(always)]
9640 pub fn snzreqen9(
9641 self,
9642 ) -> crate::common::RegisterField<
9643 9,
9644 0x1,
9645 1,
9646 0,
9647 snzreqcr::Snzreqen9,
9648 snzreqcr::Snzreqen9,
9649 Snzreqcr_SPEC,
9650 crate::common::RW,
9651 > {
9652 crate::common::RegisterField::<
9653 9,
9654 0x1,
9655 1,
9656 0,
9657 snzreqcr::Snzreqen9,
9658 snzreqcr::Snzreqen9,
9659 Snzreqcr_SPEC,
9660 crate::common::RW,
9661 >::from_register(self, 0)
9662 }
9663
9664 #[doc = "Snooze Request Enable 8Enable IRQ8 pin snooze request"]
9665 #[inline(always)]
9666 pub fn snzreqen8(
9667 self,
9668 ) -> crate::common::RegisterField<
9669 8,
9670 0x1,
9671 1,
9672 0,
9673 snzreqcr::Snzreqen8,
9674 snzreqcr::Snzreqen8,
9675 Snzreqcr_SPEC,
9676 crate::common::RW,
9677 > {
9678 crate::common::RegisterField::<
9679 8,
9680 0x1,
9681 1,
9682 0,
9683 snzreqcr::Snzreqen8,
9684 snzreqcr::Snzreqen8,
9685 Snzreqcr_SPEC,
9686 crate::common::RW,
9687 >::from_register(self, 0)
9688 }
9689
9690 #[doc = "Snooze Request Enable 7Enable IRQ7 pin snooze request"]
9691 #[inline(always)]
9692 pub fn snzreqen7(
9693 self,
9694 ) -> crate::common::RegisterField<
9695 7,
9696 0x1,
9697 1,
9698 0,
9699 snzreqcr::Snzreqen7,
9700 snzreqcr::Snzreqen7,
9701 Snzreqcr_SPEC,
9702 crate::common::RW,
9703 > {
9704 crate::common::RegisterField::<
9705 7,
9706 0x1,
9707 1,
9708 0,
9709 snzreqcr::Snzreqen7,
9710 snzreqcr::Snzreqen7,
9711 Snzreqcr_SPEC,
9712 crate::common::RW,
9713 >::from_register(self, 0)
9714 }
9715
9716 #[doc = "Snooze Request Enable 6Enable IRQ6 pin snooze request"]
9717 #[inline(always)]
9718 pub fn snzreqen6(
9719 self,
9720 ) -> crate::common::RegisterField<
9721 6,
9722 0x1,
9723 1,
9724 0,
9725 snzreqcr::Snzreqen6,
9726 snzreqcr::Snzreqen6,
9727 Snzreqcr_SPEC,
9728 crate::common::RW,
9729 > {
9730 crate::common::RegisterField::<
9731 6,
9732 0x1,
9733 1,
9734 0,
9735 snzreqcr::Snzreqen6,
9736 snzreqcr::Snzreqen6,
9737 Snzreqcr_SPEC,
9738 crate::common::RW,
9739 >::from_register(self, 0)
9740 }
9741
9742 #[doc = "Snooze Request Enable 5Enable IRQ5 pin snooze request"]
9743 #[inline(always)]
9744 pub fn snzreqen5(
9745 self,
9746 ) -> crate::common::RegisterField<
9747 5,
9748 0x1,
9749 1,
9750 0,
9751 snzreqcr::Snzreqen5,
9752 snzreqcr::Snzreqen5,
9753 Snzreqcr_SPEC,
9754 crate::common::RW,
9755 > {
9756 crate::common::RegisterField::<
9757 5,
9758 0x1,
9759 1,
9760 0,
9761 snzreqcr::Snzreqen5,
9762 snzreqcr::Snzreqen5,
9763 Snzreqcr_SPEC,
9764 crate::common::RW,
9765 >::from_register(self, 0)
9766 }
9767
9768 #[doc = "Snooze Request Enable 4Enable IRQ4 pin snooze request"]
9769 #[inline(always)]
9770 pub fn snzreqen4(
9771 self,
9772 ) -> crate::common::RegisterField<
9773 4,
9774 0x1,
9775 1,
9776 0,
9777 snzreqcr::Snzreqen4,
9778 snzreqcr::Snzreqen4,
9779 Snzreqcr_SPEC,
9780 crate::common::RW,
9781 > {
9782 crate::common::RegisterField::<
9783 4,
9784 0x1,
9785 1,
9786 0,
9787 snzreqcr::Snzreqen4,
9788 snzreqcr::Snzreqen4,
9789 Snzreqcr_SPEC,
9790 crate::common::RW,
9791 >::from_register(self, 0)
9792 }
9793
9794 #[doc = "Snooze Request Enable 3Enable IRQ3 pin snooze request"]
9795 #[inline(always)]
9796 pub fn snzreqen3(
9797 self,
9798 ) -> crate::common::RegisterField<
9799 3,
9800 0x1,
9801 1,
9802 0,
9803 snzreqcr::Snzreqen3,
9804 snzreqcr::Snzreqen3,
9805 Snzreqcr_SPEC,
9806 crate::common::RW,
9807 > {
9808 crate::common::RegisterField::<
9809 3,
9810 0x1,
9811 1,
9812 0,
9813 snzreqcr::Snzreqen3,
9814 snzreqcr::Snzreqen3,
9815 Snzreqcr_SPEC,
9816 crate::common::RW,
9817 >::from_register(self, 0)
9818 }
9819
9820 #[doc = "Snooze Request Enable 2Enable IRQ2 pin snooze request"]
9821 #[inline(always)]
9822 pub fn snzreqen2(
9823 self,
9824 ) -> crate::common::RegisterField<
9825 2,
9826 0x1,
9827 1,
9828 0,
9829 snzreqcr::Snzreqen2,
9830 snzreqcr::Snzreqen2,
9831 Snzreqcr_SPEC,
9832 crate::common::RW,
9833 > {
9834 crate::common::RegisterField::<
9835 2,
9836 0x1,
9837 1,
9838 0,
9839 snzreqcr::Snzreqen2,
9840 snzreqcr::Snzreqen2,
9841 Snzreqcr_SPEC,
9842 crate::common::RW,
9843 >::from_register(self, 0)
9844 }
9845
9846 #[doc = "Snooze Request Enable 1Enable IRQ1 pin snooze request"]
9847 #[inline(always)]
9848 pub fn snzreqen1(
9849 self,
9850 ) -> crate::common::RegisterField<
9851 1,
9852 0x1,
9853 1,
9854 0,
9855 snzreqcr::Snzreqen1,
9856 snzreqcr::Snzreqen1,
9857 Snzreqcr_SPEC,
9858 crate::common::RW,
9859 > {
9860 crate::common::RegisterField::<
9861 1,
9862 0x1,
9863 1,
9864 0,
9865 snzreqcr::Snzreqen1,
9866 snzreqcr::Snzreqen1,
9867 Snzreqcr_SPEC,
9868 crate::common::RW,
9869 >::from_register(self, 0)
9870 }
9871
9872 #[doc = "Snooze Request Enable 0Enable IRQ0 pin snooze request"]
9873 #[inline(always)]
9874 pub fn snzreqen0(
9875 self,
9876 ) -> crate::common::RegisterField<
9877 0,
9878 0x1,
9879 1,
9880 0,
9881 snzreqcr::Snzreqen0,
9882 snzreqcr::Snzreqen0,
9883 Snzreqcr_SPEC,
9884 crate::common::RW,
9885 > {
9886 crate::common::RegisterField::<
9887 0,
9888 0x1,
9889 1,
9890 0,
9891 snzreqcr::Snzreqen0,
9892 snzreqcr::Snzreqen0,
9893 Snzreqcr_SPEC,
9894 crate::common::RW,
9895 >::from_register(self, 0)
9896 }
9897}
9898impl ::core::default::Default for Snzreqcr {
9899 #[inline(always)]
9900 fn default() -> Snzreqcr {
9901 <crate::RegValueT<Snzreqcr_SPEC> as RegisterValue<_>>::new(0)
9902 }
9903}
9904pub mod snzreqcr {
9905
9906 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9907 pub struct Snzreqen30_SPEC;
9908 pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
9909 impl Snzreqen30 {
9910 #[doc = "Disable snooze request"]
9911 pub const _0: Self = Self::new(0);
9912
9913 #[doc = "Enable snooze request"]
9914 pub const _1: Self = Self::new(1);
9915 }
9916 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9917 pub struct Snzreqen29_SPEC;
9918 pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
9919 impl Snzreqen29 {
9920 #[doc = "Disable snooze request"]
9921 pub const _0: Self = Self::new(0);
9922
9923 #[doc = "Enable snooze request"]
9924 pub const _1: Self = Self::new(1);
9925 }
9926 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9927 pub struct Snzreqen28_SPEC;
9928 pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
9929 impl Snzreqen28 {
9930 #[doc = "Disable snooze request"]
9931 pub const _0: Self = Self::new(0);
9932
9933 #[doc = "Enable snooze request"]
9934 pub const _1: Self = Self::new(1);
9935 }
9936 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9937 pub struct Snzreqen25_SPEC;
9938 pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
9939 impl Snzreqen25 {
9940 #[doc = "Disable snooze request"]
9941 pub const _0: Self = Self::new(0);
9942
9943 #[doc = "Enable snooze request"]
9944 pub const _1: Self = Self::new(1);
9945 }
9946 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9947 pub struct Snzreqen24_SPEC;
9948 pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
9949 impl Snzreqen24 {
9950 #[doc = "Disable snooze request"]
9951 pub const _0: Self = Self::new(0);
9952
9953 #[doc = "Enable snooze request"]
9954 pub const _1: Self = Self::new(1);
9955 }
9956 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9957 pub struct Snzreqen23_SPEC;
9958 pub type Snzreqen23 = crate::EnumBitfieldStruct<u8, Snzreqen23_SPEC>;
9959 impl Snzreqen23 {
9960 #[doc = "Disable snooze request"]
9961 pub const _0: Self = Self::new(0);
9962
9963 #[doc = "Enable snooze request"]
9964 pub const _1: Self = Self::new(1);
9965 }
9966 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9967 pub struct Snzreqen17_SPEC;
9968 pub type Snzreqen17 = crate::EnumBitfieldStruct<u8, Snzreqen17_SPEC>;
9969 impl Snzreqen17 {
9970 #[doc = "Disable snooze request"]
9971 pub const _0: Self = Self::new(0);
9972
9973 #[doc = "Enable snooze request"]
9974 pub const _1: Self = Self::new(1);
9975 }
9976 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9977 pub struct Snzreqen15_SPEC;
9978 pub type Snzreqen15 = crate::EnumBitfieldStruct<u8, Snzreqen15_SPEC>;
9979 impl Snzreqen15 {
9980 #[doc = "Disable snooze request"]
9981 pub const _0: Self = Self::new(0);
9982
9983 #[doc = "Enable snooze request"]
9984 pub const _1: Self = Self::new(1);
9985 }
9986 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9987 pub struct Snzreqen14_SPEC;
9988 pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
9989 impl Snzreqen14 {
9990 #[doc = "Disable snooze request"]
9991 pub const _0: Self = Self::new(0);
9992
9993 #[doc = "Enable snooze request"]
9994 pub const _1: Self = Self::new(1);
9995 }
9996 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9997 pub struct Snzreqen13_SPEC;
9998 pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
9999 impl Snzreqen13 {
10000 #[doc = "Disable snooze request"]
10001 pub const _0: Self = Self::new(0);
10002
10003 #[doc = "Enable snooze request"]
10004 pub const _1: Self = Self::new(1);
10005 }
10006 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10007 pub struct Snzreqen12_SPEC;
10008 pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
10009 impl Snzreqen12 {
10010 #[doc = "Disable snooze request"]
10011 pub const _0: Self = Self::new(0);
10012
10013 #[doc = "Enable snooze request"]
10014 pub const _1: Self = Self::new(1);
10015 }
10016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10017 pub struct Snzreqen11_SPEC;
10018 pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
10019 impl Snzreqen11 {
10020 #[doc = "Disable snooze request"]
10021 pub const _0: Self = Self::new(0);
10022
10023 #[doc = "Enable snooze request"]
10024 pub const _1: Self = Self::new(1);
10025 }
10026 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10027 pub struct Snzreqen10_SPEC;
10028 pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
10029 impl Snzreqen10 {
10030 #[doc = "Disable snooze request"]
10031 pub const _0: Self = Self::new(0);
10032
10033 #[doc = "Enable snooze request"]
10034 pub const _1: Self = Self::new(1);
10035 }
10036 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10037 pub struct Snzreqen9_SPEC;
10038 pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
10039 impl Snzreqen9 {
10040 #[doc = "Disable snooze request"]
10041 pub const _0: Self = Self::new(0);
10042
10043 #[doc = "Enable snooze request"]
10044 pub const _1: Self = Self::new(1);
10045 }
10046 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10047 pub struct Snzreqen8_SPEC;
10048 pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
10049 impl Snzreqen8 {
10050 #[doc = "Disable snooze request"]
10051 pub const _0: Self = Self::new(0);
10052
10053 #[doc = "Enable snooze request"]
10054 pub const _1: Self = Self::new(1);
10055 }
10056 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10057 pub struct Snzreqen7_SPEC;
10058 pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
10059 impl Snzreqen7 {
10060 #[doc = "Disable snooze request"]
10061 pub const _0: Self = Self::new(0);
10062
10063 #[doc = "Enable snooze request"]
10064 pub const _1: Self = Self::new(1);
10065 }
10066 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10067 pub struct Snzreqen6_SPEC;
10068 pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
10069 impl Snzreqen6 {
10070 #[doc = "Disable snooze request"]
10071 pub const _0: Self = Self::new(0);
10072
10073 #[doc = "Enable snooze request"]
10074 pub const _1: Self = Self::new(1);
10075 }
10076 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10077 pub struct Snzreqen5_SPEC;
10078 pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
10079 impl Snzreqen5 {
10080 #[doc = "Disable snooze request"]
10081 pub const _0: Self = Self::new(0);
10082
10083 #[doc = "Enable snooze request"]
10084 pub const _1: Self = Self::new(1);
10085 }
10086 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10087 pub struct Snzreqen4_SPEC;
10088 pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
10089 impl Snzreqen4 {
10090 #[doc = "Disable snooze request"]
10091 pub const _0: Self = Self::new(0);
10092
10093 #[doc = "Enable snooze request"]
10094 pub const _1: Self = Self::new(1);
10095 }
10096 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10097 pub struct Snzreqen3_SPEC;
10098 pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
10099 impl Snzreqen3 {
10100 #[doc = "Disable snooze request"]
10101 pub const _0: Self = Self::new(0);
10102
10103 #[doc = "Enable snooze request"]
10104 pub const _1: Self = Self::new(1);
10105 }
10106 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10107 pub struct Snzreqen2_SPEC;
10108 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
10109 impl Snzreqen2 {
10110 #[doc = "Disable snooze request"]
10111 pub const _0: Self = Self::new(0);
10112
10113 #[doc = "Enable snooze request"]
10114 pub const _1: Self = Self::new(1);
10115 }
10116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10117 pub struct Snzreqen1_SPEC;
10118 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
10119 impl Snzreqen1 {
10120 #[doc = "Disable snooze request"]
10121 pub const _0: Self = Self::new(0);
10122
10123 #[doc = "Enable snooze request"]
10124 pub const _1: Self = Self::new(1);
10125 }
10126 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10127 pub struct Snzreqen0_SPEC;
10128 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
10129 impl Snzreqen0 {
10130 #[doc = "Disable snooze request"]
10131 pub const _0: Self = Self::new(0);
10132
10133 #[doc = "Enable snooze request"]
10134 pub const _1: Self = Self::new(1);
10135 }
10136}
10137#[doc(hidden)]
10138#[derive(Copy, Clone, Eq, PartialEq)]
10139pub struct Psmcr_SPEC;
10140impl crate::sealed::RegSpec for Psmcr_SPEC {
10141 type DataType = u8;
10142}
10143
10144#[doc = "Power Save Memory Control Register"]
10145pub type Psmcr = crate::RegValueT<Psmcr_SPEC>;
10146
10147impl Psmcr {
10148 #[doc = "These bits are read as 000000. The write value should be 000000."]
10149 #[inline(always)]
10150 pub fn reserved(
10151 self,
10152 ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Psmcr_SPEC, crate::common::RW> {
10153 crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Psmcr_SPEC,crate::common::RW>::from_register(self,0)
10154 }
10155
10156 #[doc = "Power save memory control."]
10157 #[inline(always)]
10158 pub fn psmc(
10159 self,
10160 ) -> crate::common::RegisterField<
10161 0,
10162 0x3,
10163 1,
10164 0,
10165 psmcr::Psmc,
10166 psmcr::Psmc,
10167 Psmcr_SPEC,
10168 crate::common::RW,
10169 > {
10170 crate::common::RegisterField::<
10171 0,
10172 0x3,
10173 1,
10174 0,
10175 psmcr::Psmc,
10176 psmcr::Psmc,
10177 Psmcr_SPEC,
10178 crate::common::RW,
10179 >::from_register(self, 0)
10180 }
10181}
10182impl ::core::default::Default for Psmcr {
10183 #[inline(always)]
10184 fn default() -> Psmcr {
10185 <crate::RegValueT<Psmcr_SPEC> as RegisterValue<_>>::new(0)
10186 }
10187}
10188pub mod psmcr {
10189
10190 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10191 pub struct Psmc_SPEC;
10192 pub type Psmc = crate::EnumBitfieldStruct<u8, Psmc_SPEC>;
10193 impl Psmc {
10194 #[doc = "All RAM is on Software Standby mode."]
10195 pub const _00: Self = Self::new(0);
10196
10197 #[doc = "48KB RAM is on in Software Standby mode."]
10198 pub const _01: Self = Self::new(1);
10199
10200 #[doc = "Setting prohibited."]
10201 pub const OTHERS: Self = Self::new(0);
10202 }
10203}
10204#[doc(hidden)]
10205#[derive(Copy, Clone, Eq, PartialEq)]
10206pub struct Flstop_SPEC;
10207impl crate::sealed::RegSpec for Flstop_SPEC {
10208 type DataType = u8;
10209}
10210
10211#[doc = "Flash Operation Control Register"]
10212pub type Flstop = crate::RegValueT<Flstop_SPEC>;
10213
10214impl Flstop {
10215 #[doc = "Flash Memory Operation Status Flag"]
10216 #[inline(always)]
10217 pub fn flstpf(
10218 self,
10219 ) -> crate::common::RegisterField<
10220 4,
10221 0x1,
10222 1,
10223 0,
10224 flstop::Flstpf,
10225 flstop::Flstpf,
10226 Flstop_SPEC,
10227 crate::common::RW,
10228 > {
10229 crate::common::RegisterField::<
10230 4,
10231 0x1,
10232 1,
10233 0,
10234 flstop::Flstpf,
10235 flstop::Flstpf,
10236 Flstop_SPEC,
10237 crate::common::RW,
10238 >::from_register(self, 0)
10239 }
10240
10241 #[doc = "These bits are read as 000. The write value should be 000."]
10242 #[inline(always)]
10243 pub fn reserved(
10244 self,
10245 ) -> crate::common::RegisterField<1, 0x7, 1, 0, u8, u8, Flstop_SPEC, crate::common::RW> {
10246 crate::common::RegisterField::<1,0x7,1,0,u8,u8,Flstop_SPEC,crate::common::RW>::from_register(self,0)
10247 }
10248
10249 #[doc = "Selecting ON/OFF of the Flash Memory Operation"]
10250 #[inline(always)]
10251 pub fn flstop(
10252 self,
10253 ) -> crate::common::RegisterField<
10254 0,
10255 0x1,
10256 1,
10257 0,
10258 flstop::Flstop,
10259 flstop::Flstop,
10260 Flstop_SPEC,
10261 crate::common::RW,
10262 > {
10263 crate::common::RegisterField::<
10264 0,
10265 0x1,
10266 1,
10267 0,
10268 flstop::Flstop,
10269 flstop::Flstop,
10270 Flstop_SPEC,
10271 crate::common::RW,
10272 >::from_register(self, 0)
10273 }
10274}
10275impl ::core::default::Default for Flstop {
10276 #[inline(always)]
10277 fn default() -> Flstop {
10278 <crate::RegValueT<Flstop_SPEC> as RegisterValue<_>>::new(0)
10279 }
10280}
10281pub mod flstop {
10282
10283 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10284 pub struct Flstpf_SPEC;
10285 pub type Flstpf = crate::EnumBitfieldStruct<u8, Flstpf_SPEC>;
10286 impl Flstpf {
10287 #[doc = "Transition completed"]
10288 pub const _0: Self = Self::new(0);
10289
10290 #[doc = "During transition (from the flash-stop-status to flash-operating-status or vice versa)"]
10291 pub const _1: Self = Self::new(1);
10292 }
10293 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10294 pub struct Flstop_SPEC;
10295 pub type Flstop = crate::EnumBitfieldStruct<u8, Flstop_SPEC>;
10296 impl Flstop {
10297 #[doc = "Code flash and data flash memory operates"]
10298 pub const _0: Self = Self::new(0);
10299
10300 #[doc = "Code flash and data flash memory stops."]
10301 pub const _1: Self = Self::new(1);
10302 }
10303}
10304#[doc(hidden)]
10305#[derive(Copy, Clone, Eq, PartialEq)]
10306pub struct Opccr_SPEC;
10307impl crate::sealed::RegSpec for Opccr_SPEC {
10308 type DataType = u8;
10309}
10310
10311#[doc = "Operating Power Control Register"]
10312pub type Opccr = crate::RegValueT<Opccr_SPEC>;
10313
10314impl Opccr {
10315 #[doc = "Operating Power Control Mode Transition Status Flag"]
10316 #[inline(always)]
10317 pub fn opcmtsf(
10318 self,
10319 ) -> crate::common::RegisterField<
10320 4,
10321 0x1,
10322 1,
10323 0,
10324 opccr::Opcmtsf,
10325 opccr::Opcmtsf,
10326 Opccr_SPEC,
10327 crate::common::RW,
10328 > {
10329 crate::common::RegisterField::<
10330 4,
10331 0x1,
10332 1,
10333 0,
10334 opccr::Opcmtsf,
10335 opccr::Opcmtsf,
10336 Opccr_SPEC,
10337 crate::common::RW,
10338 >::from_register(self, 0)
10339 }
10340
10341 #[doc = "These bits are read as 00. The write value should be 00."]
10342 #[inline(always)]
10343 pub fn reserved(
10344 self,
10345 ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, Opccr_SPEC, crate::common::RW> {
10346 crate::common::RegisterField::<2,0x3,1,0,u8,u8,Opccr_SPEC,crate::common::RW>::from_register(self,0)
10347 }
10348
10349 #[doc = "Operating Power Control Mode Select"]
10350 #[inline(always)]
10351 pub fn opcm(
10352 self,
10353 ) -> crate::common::RegisterField<
10354 0,
10355 0x3,
10356 1,
10357 0,
10358 opccr::Opcm,
10359 opccr::Opcm,
10360 Opccr_SPEC,
10361 crate::common::RW,
10362 > {
10363 crate::common::RegisterField::<
10364 0,
10365 0x3,
10366 1,
10367 0,
10368 opccr::Opcm,
10369 opccr::Opcm,
10370 Opccr_SPEC,
10371 crate::common::RW,
10372 >::from_register(self, 0)
10373 }
10374}
10375impl ::core::default::Default for Opccr {
10376 #[inline(always)]
10377 fn default() -> Opccr {
10378 <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(2)
10379 }
10380}
10381pub mod opccr {
10382
10383 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10384 pub struct Opcmtsf_SPEC;
10385 pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
10386 impl Opcmtsf {
10387 #[doc = "Transition completed"]
10388 pub const _0: Self = Self::new(0);
10389
10390 #[doc = "During transition"]
10391 pub const _1: Self = Self::new(1);
10392 }
10393 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10394 pub struct Opcm_SPEC;
10395 pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
10396 impl Opcm {
10397 #[doc = "High-speed mode"]
10398 pub const _00: Self = Self::new(0);
10399
10400 #[doc = "Middle-speed mode"]
10401 pub const _01: Self = Self::new(1);
10402
10403 #[doc = "Low-voltage mode"]
10404 pub const _10: Self = Self::new(2);
10405
10406 #[doc = "Low-speed mode"]
10407 pub const _11: Self = Self::new(3);
10408 }
10409}
10410#[doc(hidden)]
10411#[derive(Copy, Clone, Eq, PartialEq)]
10412pub struct Sopccr_SPEC;
10413impl crate::sealed::RegSpec for Sopccr_SPEC {
10414 type DataType = u8;
10415}
10416
10417#[doc = "Sub Operating Power Control Register"]
10418pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
10419
10420impl Sopccr {
10421 #[doc = "Sub Operating Power Control Mode Transition Status Flag"]
10422 #[inline(always)]
10423 pub fn sopcmtsf(
10424 self,
10425 ) -> crate::common::RegisterField<
10426 4,
10427 0x1,
10428 1,
10429 0,
10430 sopccr::Sopcmtsf,
10431 sopccr::Sopcmtsf,
10432 Sopccr_SPEC,
10433 crate::common::R,
10434 > {
10435 crate::common::RegisterField::<
10436 4,
10437 0x1,
10438 1,
10439 0,
10440 sopccr::Sopcmtsf,
10441 sopccr::Sopcmtsf,
10442 Sopccr_SPEC,
10443 crate::common::R,
10444 >::from_register(self, 0)
10445 }
10446
10447 #[doc = "These bits are read as 000. The write value should be 000."]
10448 #[inline(always)]
10449 pub fn reserved(
10450 self,
10451 ) -> crate::common::RegisterField<1, 0x7, 1, 0, u8, u8, Sopccr_SPEC, crate::common::RW> {
10452 crate::common::RegisterField::<1,0x7,1,0,u8,u8,Sopccr_SPEC,crate::common::RW>::from_register(self,0)
10453 }
10454
10455 #[doc = "Sub Operating Power Control Mode Select"]
10456 #[inline(always)]
10457 pub fn sopcm(
10458 self,
10459 ) -> crate::common::RegisterField<
10460 0,
10461 0x1,
10462 1,
10463 0,
10464 sopccr::Sopcm,
10465 sopccr::Sopcm,
10466 Sopccr_SPEC,
10467 crate::common::RW,
10468 > {
10469 crate::common::RegisterField::<
10470 0,
10471 0x1,
10472 1,
10473 0,
10474 sopccr::Sopcm,
10475 sopccr::Sopcm,
10476 Sopccr_SPEC,
10477 crate::common::RW,
10478 >::from_register(self, 0)
10479 }
10480}
10481impl ::core::default::Default for Sopccr {
10482 #[inline(always)]
10483 fn default() -> Sopccr {
10484 <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
10485 }
10486}
10487pub mod sopccr {
10488
10489 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10490 pub struct Sopcmtsf_SPEC;
10491 pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
10492 impl Sopcmtsf {
10493 #[doc = "Transition completed"]
10494 pub const _0: Self = Self::new(0);
10495
10496 #[doc = "During transition"]
10497 pub const _1: Self = Self::new(1);
10498 }
10499 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10500 pub struct Sopcm_SPEC;
10501 pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
10502 impl Sopcm {
10503 #[doc = "Other than Subosc-speed mode"]
10504 pub const _0: Self = Self::new(0);
10505
10506 #[doc = "Subosc-speed mode"]
10507 pub const _1: Self = Self::new(1);
10508 }
10509}
10510#[doc(hidden)]
10511#[derive(Copy, Clone, Eq, PartialEq)]
10512pub struct Syocdcr_SPEC;
10513impl crate::sealed::RegSpec for Syocdcr_SPEC {
10514 type DataType = u8;
10515}
10516
10517#[doc = "System Control OCD Control Register"]
10518pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
10519
10520impl Syocdcr {
10521 #[doc = "Debugger Enable bit"]
10522 #[inline(always)]
10523 pub fn dbgen(
10524 self,
10525 ) -> crate::common::RegisterField<
10526 7,
10527 0x1,
10528 1,
10529 0,
10530 syocdcr::Dbgen,
10531 syocdcr::Dbgen,
10532 Syocdcr_SPEC,
10533 crate::common::RW,
10534 > {
10535 crate::common::RegisterField::<
10536 7,
10537 0x1,
10538 1,
10539 0,
10540 syocdcr::Dbgen,
10541 syocdcr::Dbgen,
10542 Syocdcr_SPEC,
10543 crate::common::RW,
10544 >::from_register(self, 0)
10545 }
10546
10547 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
10548 #[inline(always)]
10549 pub fn reserved(
10550 self,
10551 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Syocdcr_SPEC, crate::common::RW> {
10552 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Syocdcr_SPEC,crate::common::RW>::from_register(self,0)
10553 }
10554}
10555impl ::core::default::Default for Syocdcr {
10556 #[inline(always)]
10557 fn default() -> Syocdcr {
10558 <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
10559 }
10560}
10561pub mod syocdcr {
10562
10563 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10564 pub struct Dbgen_SPEC;
10565 pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
10566 impl Dbgen {
10567 #[doc = "On-chip debugger is disabled"]
10568 pub const _0: Self = Self::new(0);
10569
10570 #[doc = "On-chip debugger is enabled"]
10571 pub const _1: Self = Self::new(1);
10572 }
10573}
10574#[doc(hidden)]
10575#[derive(Copy, Clone, Eq, PartialEq)]
10576pub struct Sckdivcr_SPEC;
10577impl crate::sealed::RegSpec for Sckdivcr_SPEC {
10578 type DataType = u32;
10579}
10580
10581#[doc = "System Clock Division Control Register"]
10582pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
10583
10584impl Sckdivcr {
10585 #[doc = "Flash IF Clock (FCLK) Select"]
10586 #[inline(always)]
10587 pub fn fck(
10588 self,
10589 ) -> crate::common::RegisterField<
10590 28,
10591 0x7,
10592 1,
10593 0,
10594 sckdivcr::Fck,
10595 sckdivcr::Fck,
10596 Sckdivcr_SPEC,
10597 crate::common::RW,
10598 > {
10599 crate::common::RegisterField::<
10600 28,
10601 0x7,
10602 1,
10603 0,
10604 sckdivcr::Fck,
10605 sckdivcr::Fck,
10606 Sckdivcr_SPEC,
10607 crate::common::RW,
10608 >::from_register(self, 0)
10609 }
10610
10611 #[doc = "System Clock (ICLK) Select"]
10612 #[inline(always)]
10613 pub fn ick(
10614 self,
10615 ) -> crate::common::RegisterField<
10616 24,
10617 0x7,
10618 1,
10619 0,
10620 sckdivcr::Ick,
10621 sckdivcr::Ick,
10622 Sckdivcr_SPEC,
10623 crate::common::RW,
10624 > {
10625 crate::common::RegisterField::<
10626 24,
10627 0x7,
10628 1,
10629 0,
10630 sckdivcr::Ick,
10631 sckdivcr::Ick,
10632 Sckdivcr_SPEC,
10633 crate::common::RW,
10634 >::from_register(self, 0)
10635 }
10636
10637 #[doc = "External Bus Clock (BCLK) Select"]
10638 #[inline(always)]
10639 pub fn bck(
10640 self,
10641 ) -> crate::common::RegisterField<
10642 16,
10643 0x7,
10644 1,
10645 0,
10646 sckdivcr::Bck,
10647 sckdivcr::Bck,
10648 Sckdivcr_SPEC,
10649 crate::common::RW,
10650 > {
10651 crate::common::RegisterField::<
10652 16,
10653 0x7,
10654 1,
10655 0,
10656 sckdivcr::Bck,
10657 sckdivcr::Bck,
10658 Sckdivcr_SPEC,
10659 crate::common::RW,
10660 >::from_register(self, 0)
10661 }
10662
10663 #[doc = "Peripheral Module Clock A (PCLKA) Select"]
10664 #[inline(always)]
10665 pub fn pcka(
10666 self,
10667 ) -> crate::common::RegisterField<
10668 12,
10669 0x7,
10670 1,
10671 0,
10672 sckdivcr::Pcka,
10673 sckdivcr::Pcka,
10674 Sckdivcr_SPEC,
10675 crate::common::RW,
10676 > {
10677 crate::common::RegisterField::<
10678 12,
10679 0x7,
10680 1,
10681 0,
10682 sckdivcr::Pcka,
10683 sckdivcr::Pcka,
10684 Sckdivcr_SPEC,
10685 crate::common::RW,
10686 >::from_register(self, 0)
10687 }
10688
10689 #[doc = "Peripheral Module Clock B (PCLKB) Select"]
10690 #[inline(always)]
10691 pub fn pckb(
10692 self,
10693 ) -> crate::common::RegisterField<
10694 8,
10695 0x7,
10696 1,
10697 0,
10698 sckdivcr::Pckb,
10699 sckdivcr::Pckb,
10700 Sckdivcr_SPEC,
10701 crate::common::RW,
10702 > {
10703 crate::common::RegisterField::<
10704 8,
10705 0x7,
10706 1,
10707 0,
10708 sckdivcr::Pckb,
10709 sckdivcr::Pckb,
10710 Sckdivcr_SPEC,
10711 crate::common::RW,
10712 >::from_register(self, 0)
10713 }
10714
10715 #[doc = "Peripheral Module Clock C (PCLKC) Select"]
10716 #[inline(always)]
10717 pub fn pckc(
10718 self,
10719 ) -> crate::common::RegisterField<
10720 4,
10721 0x7,
10722 1,
10723 0,
10724 sckdivcr::Pckc,
10725 sckdivcr::Pckc,
10726 Sckdivcr_SPEC,
10727 crate::common::RW,
10728 > {
10729 crate::common::RegisterField::<
10730 4,
10731 0x7,
10732 1,
10733 0,
10734 sckdivcr::Pckc,
10735 sckdivcr::Pckc,
10736 Sckdivcr_SPEC,
10737 crate::common::RW,
10738 >::from_register(self, 0)
10739 }
10740
10741 #[doc = "This bit is read as 0. The write value should be 0."]
10742 #[inline(always)]
10743 pub fn reserved(
10744 self,
10745 ) -> crate::common::RegisterFieldBool<3, 1, 0, Sckdivcr_SPEC, crate::common::RW> {
10746 crate::common::RegisterFieldBool::<3, 1, 0, Sckdivcr_SPEC, crate::common::RW>::from_register(
10747 self, 0,
10748 )
10749 }
10750
10751 #[doc = "Peripheral Module Clock D (PCLKD) Select"]
10752 #[inline(always)]
10753 pub fn pckd(
10754 self,
10755 ) -> crate::common::RegisterField<
10756 0,
10757 0x7,
10758 1,
10759 0,
10760 sckdivcr::Pckd,
10761 sckdivcr::Pckd,
10762 Sckdivcr_SPEC,
10763 crate::common::RW,
10764 > {
10765 crate::common::RegisterField::<
10766 0,
10767 0x7,
10768 1,
10769 0,
10770 sckdivcr::Pckd,
10771 sckdivcr::Pckd,
10772 Sckdivcr_SPEC,
10773 crate::common::RW,
10774 >::from_register(self, 0)
10775 }
10776}
10777impl ::core::default::Default for Sckdivcr {
10778 #[inline(always)]
10779 fn default() -> Sckdivcr {
10780 <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(1141130308)
10781 }
10782}
10783pub mod sckdivcr {
10784
10785 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10786 pub struct Fck_SPEC;
10787 pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
10788 impl Fck {
10789 #[doc = "/1"]
10790 pub const _000: Self = Self::new(0);
10791
10792 #[doc = "/2"]
10793 pub const _001: Self = Self::new(1);
10794
10795 #[doc = "/4"]
10796 pub const _010: Self = Self::new(2);
10797
10798 #[doc = "/8"]
10799 pub const _011: Self = Self::new(3);
10800
10801 #[doc = "/16"]
10802 pub const _100: Self = Self::new(4);
10803
10804 #[doc = "/32"]
10805 pub const _101: Self = Self::new(5);
10806
10807 #[doc = "/64"]
10808 pub const _110: Self = Self::new(6);
10809
10810 #[doc = "Setting prohibited"]
10811 pub const OTHERS: Self = Self::new(0);
10812 }
10813 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10814 pub struct Ick_SPEC;
10815 pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
10816 impl Ick {
10817 #[doc = "/1"]
10818 pub const _000: Self = Self::new(0);
10819
10820 #[doc = "/2"]
10821 pub const _001: Self = Self::new(1);
10822
10823 #[doc = "/4"]
10824 pub const _010: Self = Self::new(2);
10825
10826 #[doc = "/8"]
10827 pub const _011: Self = Self::new(3);
10828
10829 #[doc = "/16"]
10830 pub const _100: Self = Self::new(4);
10831
10832 #[doc = "/32"]
10833 pub const _101: Self = Self::new(5);
10834
10835 #[doc = "/64"]
10836 pub const _110: Self = Self::new(6);
10837
10838 #[doc = "Setting prohibited"]
10839 pub const OTHERS: Self = Self::new(0);
10840 }
10841 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10842 pub struct Bck_SPEC;
10843 pub type Bck = crate::EnumBitfieldStruct<u8, Bck_SPEC>;
10844 impl Bck {
10845 #[doc = "/1"]
10846 pub const _000: Self = Self::new(0);
10847
10848 #[doc = "/2"]
10849 pub const _001: Self = Self::new(1);
10850
10851 #[doc = "/4"]
10852 pub const _010: Self = Self::new(2);
10853
10854 #[doc = "/8"]
10855 pub const _011: Self = Self::new(3);
10856
10857 #[doc = "/16"]
10858 pub const _100: Self = Self::new(4);
10859
10860 #[doc = "/32"]
10861 pub const _101: Self = Self::new(5);
10862
10863 #[doc = "/64"]
10864 pub const _110: Self = Self::new(6);
10865
10866 #[doc = "Setting prohibited"]
10867 pub const OTHERS: Self = Self::new(0);
10868 }
10869 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10870 pub struct Pcka_SPEC;
10871 pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
10872 impl Pcka {
10873 #[doc = "/1"]
10874 pub const _000: Self = Self::new(0);
10875
10876 #[doc = "/2"]
10877 pub const _001: Self = Self::new(1);
10878
10879 #[doc = "/4"]
10880 pub const _010: Self = Self::new(2);
10881
10882 #[doc = "/8"]
10883 pub const _011: Self = Self::new(3);
10884
10885 #[doc = "/16"]
10886 pub const _100: Self = Self::new(4);
10887
10888 #[doc = "/32"]
10889 pub const _101: Self = Self::new(5);
10890
10891 #[doc = "/64"]
10892 pub const _110: Self = Self::new(6);
10893
10894 #[doc = "Setting prohibited"]
10895 pub const OTHERS: Self = Self::new(0);
10896 }
10897 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10898 pub struct Pckb_SPEC;
10899 pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
10900 impl Pckb {
10901 #[doc = "/1"]
10902 pub const _000: Self = Self::new(0);
10903
10904 #[doc = "/2"]
10905 pub const _001: Self = Self::new(1);
10906
10907 #[doc = "/4"]
10908 pub const _010: Self = Self::new(2);
10909
10910 #[doc = "/8"]
10911 pub const _011: Self = Self::new(3);
10912
10913 #[doc = "/16"]
10914 pub const _100: Self = Self::new(4);
10915
10916 #[doc = "/32"]
10917 pub const _101: Self = Self::new(5);
10918
10919 #[doc = "/64"]
10920 pub const _110: Self = Self::new(6);
10921
10922 #[doc = "Setting prohibited"]
10923 pub const OTHERS: Self = Self::new(0);
10924 }
10925 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10926 pub struct Pckc_SPEC;
10927 pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
10928 impl Pckc {
10929 #[doc = "/1"]
10930 pub const _000: Self = Self::new(0);
10931
10932 #[doc = "/2"]
10933 pub const _001: Self = Self::new(1);
10934
10935 #[doc = "/4"]
10936 pub const _010: Self = Self::new(2);
10937
10938 #[doc = "/8"]
10939 pub const _011: Self = Self::new(3);
10940
10941 #[doc = "/16"]
10942 pub const _100: Self = Self::new(4);
10943
10944 #[doc = "/32"]
10945 pub const _101: Self = Self::new(5);
10946
10947 #[doc = "/64"]
10948 pub const _110: Self = Self::new(6);
10949
10950 #[doc = "Setting prohibited"]
10951 pub const OTHERS: Self = Self::new(0);
10952 }
10953 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10954 pub struct Pckd_SPEC;
10955 pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
10956 impl Pckd {
10957 #[doc = "/1"]
10958 pub const _000: Self = Self::new(0);
10959
10960 #[doc = "/2"]
10961 pub const _001: Self = Self::new(1);
10962
10963 #[doc = "/4"]
10964 pub const _010: Self = Self::new(2);
10965
10966 #[doc = "/8"]
10967 pub const _011: Self = Self::new(3);
10968
10969 #[doc = "/16"]
10970 pub const _100: Self = Self::new(4);
10971
10972 #[doc = "/32"]
10973 pub const _101: Self = Self::new(5);
10974
10975 #[doc = "/64"]
10976 pub const _110: Self = Self::new(6);
10977
10978 #[doc = "Setting prohibited"]
10979 pub const OTHERS: Self = Self::new(0);
10980 }
10981}
10982#[doc(hidden)]
10983#[derive(Copy, Clone, Eq, PartialEq)]
10984pub struct Sckscr_SPEC;
10985impl crate::sealed::RegSpec for Sckscr_SPEC {
10986 type DataType = u8;
10987}
10988
10989#[doc = "System Clock Source Control Register"]
10990pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
10991
10992impl Sckscr {
10993 #[doc = "These bits are read as 00000. The write value should be 00000."]
10994 #[inline(always)]
10995 pub fn reserved(
10996 self,
10997 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Sckscr_SPEC, crate::common::RW> {
10998 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Sckscr_SPEC,crate::common::RW>::from_register(self,0)
10999 }
11000
11001 #[doc = "Clock Source SelectSelecting the system clock source faster than 32MHz(system clock source > 32MHz ) is prohibit when SCKDIVCR.ICK\\[2:0\\] bits select the division-by-1 and MEMWAIT.MEMWAIT =0."]
11002 #[inline(always)]
11003 pub fn cksel(
11004 self,
11005 ) -> crate::common::RegisterField<
11006 0,
11007 0x7,
11008 1,
11009 0,
11010 sckscr::Cksel,
11011 sckscr::Cksel,
11012 Sckscr_SPEC,
11013 crate::common::RW,
11014 > {
11015 crate::common::RegisterField::<
11016 0,
11017 0x7,
11018 1,
11019 0,
11020 sckscr::Cksel,
11021 sckscr::Cksel,
11022 Sckscr_SPEC,
11023 crate::common::RW,
11024 >::from_register(self, 0)
11025 }
11026}
11027impl ::core::default::Default for Sckscr {
11028 #[inline(always)]
11029 fn default() -> Sckscr {
11030 <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
11031 }
11032}
11033pub mod sckscr {
11034
11035 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11036 pub struct Cksel_SPEC;
11037 pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
11038 impl Cksel {
11039 #[doc = "HOCO"]
11040 pub const _000: Self = Self::new(0);
11041
11042 #[doc = "MOCO"]
11043 pub const _001: Self = Self::new(1);
11044
11045 #[doc = "LOCO"]
11046 pub const _010: Self = Self::new(2);
11047
11048 #[doc = "Main clock oscillator"]
11049 pub const _011: Self = Self::new(3);
11050
11051 #[doc = "Sub-clock oscillator"]
11052 pub const _100: Self = Self::new(4);
11053
11054 #[doc = "PLL"]
11055 pub const _101: Self = Self::new(5);
11056
11057 #[doc = "Setting prohibited"]
11058 pub const OTHERS: Self = Self::new(0);
11059 }
11060}
11061#[doc(hidden)]
11062#[derive(Copy, Clone, Eq, PartialEq)]
11063pub struct Pllcr_SPEC;
11064impl crate::sealed::RegSpec for Pllcr_SPEC {
11065 type DataType = u8;
11066}
11067
11068#[doc = "PLL Control Register"]
11069pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
11070
11071impl Pllcr {
11072 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11073 #[inline(always)]
11074 pub fn reserved(
11075 self,
11076 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Pllcr_SPEC, crate::common::RW> {
11077 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Pllcr_SPEC,crate::common::RW>::from_register(self,0)
11078 }
11079
11080 #[doc = "PLL Stop Control"]
11081 #[inline(always)]
11082 pub fn pllstp(
11083 self,
11084 ) -> crate::common::RegisterField<
11085 0,
11086 0x1,
11087 1,
11088 0,
11089 pllcr::Pllstp,
11090 pllcr::Pllstp,
11091 Pllcr_SPEC,
11092 crate::common::RW,
11093 > {
11094 crate::common::RegisterField::<
11095 0,
11096 0x1,
11097 1,
11098 0,
11099 pllcr::Pllstp,
11100 pllcr::Pllstp,
11101 Pllcr_SPEC,
11102 crate::common::RW,
11103 >::from_register(self, 0)
11104 }
11105}
11106impl ::core::default::Default for Pllcr {
11107 #[inline(always)]
11108 fn default() -> Pllcr {
11109 <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
11110 }
11111}
11112pub mod pllcr {
11113
11114 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11115 pub struct Pllstp_SPEC;
11116 pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
11117 impl Pllstp {
11118 #[doc = "PLL is operating."]
11119 pub const _0: Self = Self::new(0);
11120
11121 #[doc = "PLL is stopped."]
11122 pub const _1: Self = Self::new(1);
11123 }
11124}
11125#[doc(hidden)]
11126#[derive(Copy, Clone, Eq, PartialEq)]
11127pub struct Pllccr2_SPEC;
11128impl crate::sealed::RegSpec for Pllccr2_SPEC {
11129 type DataType = u8;
11130}
11131
11132#[doc = "PLL Clock Control Register2"]
11133pub type Pllccr2 = crate::RegValueT<Pllccr2_SPEC>;
11134
11135impl Pllccr2 {
11136 #[doc = "PLL Output Frequency Division Ratio Select"]
11137 #[inline(always)]
11138 pub fn plodiv(
11139 self,
11140 ) -> crate::common::RegisterField<
11141 6,
11142 0x3,
11143 1,
11144 0,
11145 pllccr2::Plodiv,
11146 pllccr2::Plodiv,
11147 Pllccr2_SPEC,
11148 crate::common::RW,
11149 > {
11150 crate::common::RegisterField::<
11151 6,
11152 0x3,
11153 1,
11154 0,
11155 pllccr2::Plodiv,
11156 pllccr2::Plodiv,
11157 Pllccr2_SPEC,
11158 crate::common::RW,
11159 >::from_register(self, 0)
11160 }
11161
11162 #[doc = "This bit is read as 0. The write value should be 0."]
11163 #[inline(always)]
11164 pub fn reserved(
11165 self,
11166 ) -> crate::common::RegisterFieldBool<5, 1, 0, Pllccr2_SPEC, crate::common::RW> {
11167 crate::common::RegisterFieldBool::<5, 1, 0, Pllccr2_SPEC, crate::common::RW>::from_register(
11168 self, 0,
11169 )
11170 }
11171
11172 #[doc = "PLL Frequency Multiplication Factor Select"]
11173 #[inline(always)]
11174 pub fn pllmul(
11175 self,
11176 ) -> crate::common::RegisterField<
11177 0,
11178 0x1f,
11179 1,
11180 0,
11181 pllccr2::Pllmul,
11182 pllccr2::Pllmul,
11183 Pllccr2_SPEC,
11184 crate::common::RW,
11185 > {
11186 crate::common::RegisterField::<
11187 0,
11188 0x1f,
11189 1,
11190 0,
11191 pllccr2::Pllmul,
11192 pllccr2::Pllmul,
11193 Pllccr2_SPEC,
11194 crate::common::RW,
11195 >::from_register(self, 0)
11196 }
11197}
11198impl ::core::default::Default for Pllccr2 {
11199 #[inline(always)]
11200 fn default() -> Pllccr2 {
11201 <crate::RegValueT<Pllccr2_SPEC> as RegisterValue<_>>::new(7)
11202 }
11203}
11204pub mod pllccr2 {
11205
11206 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11207 pub struct Plodiv_SPEC;
11208 pub type Plodiv = crate::EnumBitfieldStruct<u8, Plodiv_SPEC>;
11209 impl Plodiv {
11210 #[doc = "/1."]
11211 pub const _00: Self = Self::new(0);
11212
11213 #[doc = "/2."]
11214 pub const _01: Self = Self::new(1);
11215
11216 #[doc = "/4."]
11217 pub const _10: Self = Self::new(2);
11218
11219 #[doc = "Setting prohibited."]
11220 pub const _11: Self = Self::new(3);
11221 }
11222 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11223 pub struct Pllmul_SPEC;
11224 pub type Pllmul = crate::EnumBitfieldStruct<u8, Pllmul_SPEC>;
11225 impl Pllmul {
11226 #[doc = "Settings prohibited."]
11227 pub const _1111: Self = Self::new(15);
11228
11229 #[doc = "x PLLMUL\\[4:0\\] +1"]
11230 pub const OTHERS: Self = Self::new(0);
11231 }
11232}
11233#[doc(hidden)]
11234#[derive(Copy, Clone, Eq, PartialEq)]
11235pub struct Bckcr_SPEC;
11236impl crate::sealed::RegSpec for Bckcr_SPEC {
11237 type DataType = u8;
11238}
11239
11240#[doc = "External Bus Clock Control Register"]
11241pub type Bckcr = crate::RegValueT<Bckcr_SPEC>;
11242
11243impl Bckcr {
11244 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11245 #[inline(always)]
11246 pub fn reserved(
11247 self,
11248 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Bckcr_SPEC, crate::common::RW> {
11249 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Bckcr_SPEC,crate::common::RW>::from_register(self,0)
11250 }
11251
11252 #[doc = "EBCLK Pin Output Select"]
11253 #[inline(always)]
11254 pub fn bclkdiv(
11255 self,
11256 ) -> crate::common::RegisterField<
11257 0,
11258 0x1,
11259 1,
11260 0,
11261 bckcr::Bclkdiv,
11262 bckcr::Bclkdiv,
11263 Bckcr_SPEC,
11264 crate::common::RW,
11265 > {
11266 crate::common::RegisterField::<
11267 0,
11268 0x1,
11269 1,
11270 0,
11271 bckcr::Bclkdiv,
11272 bckcr::Bclkdiv,
11273 Bckcr_SPEC,
11274 crate::common::RW,
11275 >::from_register(self, 0)
11276 }
11277}
11278impl ::core::default::Default for Bckcr {
11279 #[inline(always)]
11280 fn default() -> Bckcr {
11281 <crate::RegValueT<Bckcr_SPEC> as RegisterValue<_>>::new(0)
11282 }
11283}
11284pub mod bckcr {
11285
11286 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11287 pub struct Bclkdiv_SPEC;
11288 pub type Bclkdiv = crate::EnumBitfieldStruct<u8, Bclkdiv_SPEC>;
11289 impl Bclkdiv {
11290 #[doc = "BCLK"]
11291 pub const _0: Self = Self::new(0);
11292
11293 #[doc = "BCLK/2"]
11294 pub const _1: Self = Self::new(1);
11295 }
11296}
11297#[doc(hidden)]
11298#[derive(Copy, Clone, Eq, PartialEq)]
11299pub struct Memwait_SPEC;
11300impl crate::sealed::RegSpec for Memwait_SPEC {
11301 type DataType = u8;
11302}
11303
11304#[doc = "Memory Wait Cycle Control Register"]
11305pub type Memwait = crate::RegValueT<Memwait_SPEC>;
11306
11307impl Memwait {
11308 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11309 #[inline(always)]
11310 pub fn reserved(
11311 self,
11312 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Memwait_SPEC, crate::common::RW> {
11313 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Memwait_SPEC,crate::common::RW>::from_register(self,0)
11314 }
11315
11316 #[doc = "Memory Wait Cycle SelectNote: Writing 0 to the MEMWAIT is prohibited when SCKDIVCR.ICK selects division by 1 and SCKSCR.CKSEL\\[2:0\\] bits select thesystem clock source that is faster than 32 MHz (ICLK > 32 MHz)."]
11317 #[inline(always)]
11318 pub fn memwait(
11319 self,
11320 ) -> crate::common::RegisterField<
11321 0,
11322 0x1,
11323 1,
11324 0,
11325 memwait::Memwait,
11326 memwait::Memwait,
11327 Memwait_SPEC,
11328 crate::common::RW,
11329 > {
11330 crate::common::RegisterField::<
11331 0,
11332 0x1,
11333 1,
11334 0,
11335 memwait::Memwait,
11336 memwait::Memwait,
11337 Memwait_SPEC,
11338 crate::common::RW,
11339 >::from_register(self, 0)
11340 }
11341}
11342impl ::core::default::Default for Memwait {
11343 #[inline(always)]
11344 fn default() -> Memwait {
11345 <crate::RegValueT<Memwait_SPEC> as RegisterValue<_>>::new(0)
11346 }
11347}
11348pub mod memwait {
11349
11350 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11351 pub struct Memwait_SPEC;
11352 pub type Memwait = crate::EnumBitfieldStruct<u8, Memwait_SPEC>;
11353 impl Memwait {
11354 #[doc = "no wait"]
11355 pub const _0: Self = Self::new(0);
11356
11357 #[doc = "wait"]
11358 pub const _1: Self = Self::new(1);
11359 }
11360}
11361#[doc(hidden)]
11362#[derive(Copy, Clone, Eq, PartialEq)]
11363pub struct Mosccr_SPEC;
11364impl crate::sealed::RegSpec for Mosccr_SPEC {
11365 type DataType = u8;
11366}
11367
11368#[doc = "Main Clock Oscillator Control Register"]
11369pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
11370
11371impl Mosccr {
11372 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11373 #[inline(always)]
11374 pub fn reserved(
11375 self,
11376 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Mosccr_SPEC, crate::common::RW> {
11377 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Mosccr_SPEC,crate::common::RW>::from_register(self,0)
11378 }
11379
11380 #[doc = "Main Clock Oscillator StopNote: MOMCR register must be set before setting MOSTP to 0."]
11381 #[inline(always)]
11382 pub fn mostp(
11383 self,
11384 ) -> crate::common::RegisterField<
11385 0,
11386 0x1,
11387 1,
11388 0,
11389 mosccr::Mostp,
11390 mosccr::Mostp,
11391 Mosccr_SPEC,
11392 crate::common::RW,
11393 > {
11394 crate::common::RegisterField::<
11395 0,
11396 0x1,
11397 1,
11398 0,
11399 mosccr::Mostp,
11400 mosccr::Mostp,
11401 Mosccr_SPEC,
11402 crate::common::RW,
11403 >::from_register(self, 0)
11404 }
11405}
11406impl ::core::default::Default for Mosccr {
11407 #[inline(always)]
11408 fn default() -> Mosccr {
11409 <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
11410 }
11411}
11412pub mod mosccr {
11413
11414 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11415 pub struct Mostp_SPEC;
11416 pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
11417 impl Mostp {
11418 #[doc = "Main clock oscillator is operating."]
11419 pub const _0: Self = Self::new(0);
11420
11421 #[doc = "Main clock oscillator is stopped."]
11422 pub const _1: Self = Self::new(1);
11423 }
11424}
11425#[doc(hidden)]
11426#[derive(Copy, Clone, Eq, PartialEq)]
11427pub struct Hococr_SPEC;
11428impl crate::sealed::RegSpec for Hococr_SPEC {
11429 type DataType = u8;
11430}
11431
11432#[doc = "High-Speed On-Chip Oscillator Control Register"]
11433pub type Hococr = crate::RegValueT<Hococr_SPEC>;
11434
11435impl Hococr {
11436 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11437 #[inline(always)]
11438 pub fn reserved(
11439 self,
11440 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Hococr_SPEC, crate::common::RW> {
11441 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Hococr_SPEC,crate::common::RW>::from_register(self,0)
11442 }
11443
11444 #[doc = "HOCO Stop"]
11445 #[inline(always)]
11446 pub fn hcstp(
11447 self,
11448 ) -> crate::common::RegisterField<
11449 0,
11450 0x1,
11451 1,
11452 0,
11453 hococr::Hcstp,
11454 hococr::Hcstp,
11455 Hococr_SPEC,
11456 crate::common::RW,
11457 > {
11458 crate::common::RegisterField::<
11459 0,
11460 0x1,
11461 1,
11462 0,
11463 hococr::Hcstp,
11464 hococr::Hcstp,
11465 Hococr_SPEC,
11466 crate::common::RW,
11467 >::from_register(self, 0)
11468 }
11469}
11470impl ::core::default::Default for Hococr {
11471 #[inline(always)]
11472 fn default() -> Hococr {
11473 <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
11474 }
11475}
11476pub mod hococr {
11477
11478 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11479 pub struct Hcstp_SPEC;
11480 pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
11481 impl Hcstp {
11482 #[doc = "HOCO is operating."]
11483 pub const _0: Self = Self::new(0);
11484
11485 #[doc = "HOCO is stopped."]
11486 pub const _1: Self = Self::new(1);
11487 }
11488}
11489#[doc(hidden)]
11490#[derive(Copy, Clone, Eq, PartialEq)]
11491pub struct Mococr_SPEC;
11492impl crate::sealed::RegSpec for Mococr_SPEC {
11493 type DataType = u8;
11494}
11495
11496#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
11497pub type Mococr = crate::RegValueT<Mococr_SPEC>;
11498
11499impl Mococr {
11500 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
11501 #[inline(always)]
11502 pub fn reserved(
11503 self,
11504 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Mococr_SPEC, crate::common::RW> {
11505 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Mococr_SPEC,crate::common::RW>::from_register(self,0)
11506 }
11507
11508 #[doc = "MOCO Stop"]
11509 #[inline(always)]
11510 pub fn mcstp(
11511 self,
11512 ) -> crate::common::RegisterField<
11513 0,
11514 0x1,
11515 1,
11516 0,
11517 mococr::Mcstp,
11518 mococr::Mcstp,
11519 Mococr_SPEC,
11520 crate::common::RW,
11521 > {
11522 crate::common::RegisterField::<
11523 0,
11524 0x1,
11525 1,
11526 0,
11527 mococr::Mcstp,
11528 mococr::Mcstp,
11529 Mococr_SPEC,
11530 crate::common::RW,
11531 >::from_register(self, 0)
11532 }
11533}
11534impl ::core::default::Default for Mococr {
11535 #[inline(always)]
11536 fn default() -> Mococr {
11537 <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
11538 }
11539}
11540pub mod mococr {
11541
11542 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11543 pub struct Mcstp_SPEC;
11544 pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
11545 impl Mcstp {
11546 #[doc = "MOCO is operating."]
11547 pub const _0: Self = Self::new(0);
11548
11549 #[doc = "MOCO is stopped."]
11550 pub const _1: Self = Self::new(1);
11551 }
11552}
11553#[doc(hidden)]
11554#[derive(Copy, Clone, Eq, PartialEq)]
11555pub struct Oscsf_SPEC;
11556impl crate::sealed::RegSpec for Oscsf_SPEC {
11557 type DataType = u8;
11558}
11559
11560#[doc = "Oscillation Stabilization Flag Register"]
11561pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
11562
11563impl Oscsf {
11564 #[doc = "PLL Clock Oscillation Stabilization Flag"]
11565 #[inline(always)]
11566 pub fn pllsf(
11567 self,
11568 ) -> crate::common::RegisterField<
11569 5,
11570 0x1,
11571 1,
11572 0,
11573 oscsf::Pllsf,
11574 oscsf::Pllsf,
11575 Oscsf_SPEC,
11576 crate::common::R,
11577 > {
11578 crate::common::RegisterField::<
11579 5,
11580 0x1,
11581 1,
11582 0,
11583 oscsf::Pllsf,
11584 oscsf::Pllsf,
11585 Oscsf_SPEC,
11586 crate::common::R,
11587 >::from_register(self, 0)
11588 }
11589
11590 #[doc = "Main Clock Oscillation Stabilization Flag"]
11591 #[inline(always)]
11592 pub fn moscsf(
11593 self,
11594 ) -> crate::common::RegisterField<
11595 3,
11596 0x1,
11597 1,
11598 0,
11599 oscsf::Moscsf,
11600 oscsf::Moscsf,
11601 Oscsf_SPEC,
11602 crate::common::R,
11603 > {
11604 crate::common::RegisterField::<
11605 3,
11606 0x1,
11607 1,
11608 0,
11609 oscsf::Moscsf,
11610 oscsf::Moscsf,
11611 Oscsf_SPEC,
11612 crate::common::R,
11613 >::from_register(self, 0)
11614 }
11615
11616 #[doc = "These bits are read as 00."]
11617 #[inline(always)]
11618 pub fn reserved(
11619 self,
11620 ) -> crate::common::RegisterField<1, 0x3, 1, 0, u8, u8, Oscsf_SPEC, crate::common::R> {
11621 crate::common::RegisterField::<1,0x3,1,0,u8,u8,Oscsf_SPEC,crate::common::R>::from_register(self,0)
11622 }
11623
11624 #[doc = "HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0. It is 0 when the OFS1.HOCOEN bit is 1."]
11625 #[inline(always)]
11626 pub fn hocosf(
11627 self,
11628 ) -> crate::common::RegisterField<
11629 0,
11630 0x1,
11631 1,
11632 0,
11633 oscsf::Hocosf,
11634 oscsf::Hocosf,
11635 Oscsf_SPEC,
11636 crate::common::R,
11637 > {
11638 crate::common::RegisterField::<
11639 0,
11640 0x1,
11641 1,
11642 0,
11643 oscsf::Hocosf,
11644 oscsf::Hocosf,
11645 Oscsf_SPEC,
11646 crate::common::R,
11647 >::from_register(self, 0)
11648 }
11649}
11650impl ::core::default::Default for Oscsf {
11651 #[inline(always)]
11652 fn default() -> Oscsf {
11653 <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
11654 }
11655}
11656pub mod oscsf {
11657
11658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11659 pub struct Pllsf_SPEC;
11660 pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
11661 impl Pllsf {
11662 #[doc = "The PLL clock is stopped or oscillation of the PLL clock has not yet become stable."]
11663 pub const _0: Self = Self::new(0);
11664
11665 #[doc = "Oscillation of the PLL clock is stable so the clock is available for use as the system clock."]
11666 pub const _1: Self = Self::new(1);
11667 }
11668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11669 pub struct Moscsf_SPEC;
11670 pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
11671 impl Moscsf {
11672 #[doc = "MOSTP = 1 (stopping the main clock oscillator) or oscillation of the main clock has not yet become stable."]
11673 pub const _0: Self = Self::new(0);
11674
11675 #[doc = "Oscillation of the main clock is stable so the clock is available for use as the system clock."]
11676 pub const _1: Self = Self::new(1);
11677 }
11678 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11679 pub struct Hocosf_SPEC;
11680 pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
11681 impl Hocosf {
11682 #[doc = "The HOCO clock is stopped or oscillation of the HOCO clock has not yet become stable."]
11683 pub const _0: Self = Self::new(0);
11684
11685 #[doc = "Oscillation of the HOCO clock is stable so the clock is available for use as the system clock."]
11686 pub const _1: Self = Self::new(1);
11687 }
11688}
11689#[doc(hidden)]
11690#[derive(Copy, Clone, Eq, PartialEq)]
11691pub struct Ckocr_SPEC;
11692impl crate::sealed::RegSpec for Ckocr_SPEC {
11693 type DataType = u8;
11694}
11695
11696#[doc = "Clock Out Control Register"]
11697pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
11698
11699impl Ckocr {
11700 #[doc = "Clock out enable"]
11701 #[inline(always)]
11702 pub fn ckoen(
11703 self,
11704 ) -> crate::common::RegisterField<
11705 7,
11706 0x1,
11707 1,
11708 0,
11709 ckocr::Ckoen,
11710 ckocr::Ckoen,
11711 Ckocr_SPEC,
11712 crate::common::RW,
11713 > {
11714 crate::common::RegisterField::<
11715 7,
11716 0x1,
11717 1,
11718 0,
11719 ckocr::Ckoen,
11720 ckocr::Ckoen,
11721 Ckocr_SPEC,
11722 crate::common::RW,
11723 >::from_register(self, 0)
11724 }
11725
11726 #[doc = "Clock out input frequency Division Select"]
11727 #[inline(always)]
11728 pub fn ckodiv(
11729 self,
11730 ) -> crate::common::RegisterField<
11731 4,
11732 0x7,
11733 1,
11734 0,
11735 ckocr::Ckodiv,
11736 ckocr::Ckodiv,
11737 Ckocr_SPEC,
11738 crate::common::RW,
11739 > {
11740 crate::common::RegisterField::<
11741 4,
11742 0x7,
11743 1,
11744 0,
11745 ckocr::Ckodiv,
11746 ckocr::Ckodiv,
11747 Ckocr_SPEC,
11748 crate::common::RW,
11749 >::from_register(self, 0)
11750 }
11751
11752 #[doc = "This bit is read as 0. The write value should be 0."]
11753 #[inline(always)]
11754 pub fn reserved(
11755 self,
11756 ) -> crate::common::RegisterFieldBool<3, 1, 0, Ckocr_SPEC, crate::common::RW> {
11757 crate::common::RegisterFieldBool::<3, 1, 0, Ckocr_SPEC, crate::common::RW>::from_register(
11758 self, 0,
11759 )
11760 }
11761
11762 #[doc = "Clock out source select"]
11763 #[inline(always)]
11764 pub fn ckosel(
11765 self,
11766 ) -> crate::common::RegisterField<
11767 0,
11768 0x7,
11769 1,
11770 0,
11771 ckocr::Ckosel,
11772 ckocr::Ckosel,
11773 Ckocr_SPEC,
11774 crate::common::RW,
11775 > {
11776 crate::common::RegisterField::<
11777 0,
11778 0x7,
11779 1,
11780 0,
11781 ckocr::Ckosel,
11782 ckocr::Ckosel,
11783 Ckocr_SPEC,
11784 crate::common::RW,
11785 >::from_register(self, 0)
11786 }
11787}
11788impl ::core::default::Default for Ckocr {
11789 #[inline(always)]
11790 fn default() -> Ckocr {
11791 <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
11792 }
11793}
11794pub mod ckocr {
11795
11796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11797 pub struct Ckoen_SPEC;
11798 pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
11799 impl Ckoen {
11800 #[doc = "Clock Out disable"]
11801 pub const _0: Self = Self::new(0);
11802
11803 #[doc = "Clock Out enable"]
11804 pub const _1: Self = Self::new(1);
11805 }
11806 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11807 pub struct Ckodiv_SPEC;
11808 pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
11809 impl Ckodiv {
11810 #[doc = "/1"]
11811 pub const _000: Self = Self::new(0);
11812
11813 #[doc = "/2"]
11814 pub const _001: Self = Self::new(1);
11815
11816 #[doc = "/4"]
11817 pub const _010: Self = Self::new(2);
11818
11819 #[doc = "/8"]
11820 pub const _011: Self = Self::new(3);
11821
11822 #[doc = "/16"]
11823 pub const _100: Self = Self::new(4);
11824
11825 #[doc = "/32"]
11826 pub const _101: Self = Self::new(5);
11827
11828 #[doc = "/64"]
11829 pub const _110: Self = Self::new(6);
11830
11831 #[doc = "/128"]
11832 pub const _111: Self = Self::new(7);
11833 }
11834 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11835 pub struct Ckosel_SPEC;
11836 pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
11837 impl Ckosel {
11838 #[doc = "HOCO"]
11839 pub const _000: Self = Self::new(0);
11840
11841 #[doc = "MOCO"]
11842 pub const _001: Self = Self::new(1);
11843
11844 #[doc = "LOCO"]
11845 pub const _010: Self = Self::new(2);
11846
11847 #[doc = "MOSC"]
11848 pub const _011: Self = Self::new(3);
11849
11850 #[doc = "SOSC"]
11851 pub const _100: Self = Self::new(4);
11852
11853 #[doc = "Setting prohibited"]
11854 pub const OTHERS: Self = Self::new(0);
11855 }
11856}
11857#[doc(hidden)]
11858#[derive(Copy, Clone, Eq, PartialEq)]
11859pub struct Trckcr_SPEC;
11860impl crate::sealed::RegSpec for Trckcr_SPEC {
11861 type DataType = u8;
11862}
11863
11864#[doc = "Trace Clock Control Register"]
11865pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
11866
11867impl Trckcr {
11868 #[doc = "Trace Clock operating enable"]
11869 #[inline(always)]
11870 pub fn trcken(
11871 self,
11872 ) -> crate::common::RegisterField<
11873 7,
11874 0x1,
11875 1,
11876 0,
11877 trckcr::Trcken,
11878 trckcr::Trcken,
11879 Trckcr_SPEC,
11880 crate::common::RW,
11881 > {
11882 crate::common::RegisterField::<
11883 7,
11884 0x1,
11885 1,
11886 0,
11887 trckcr::Trcken,
11888 trckcr::Trcken,
11889 Trckcr_SPEC,
11890 crate::common::RW,
11891 >::from_register(self, 0)
11892 }
11893
11894 #[doc = "These bits are read as 000. The write value should be 000."]
11895 #[inline(always)]
11896 pub fn reserved(
11897 self,
11898 ) -> crate::common::RegisterField<4, 0x7, 1, 0, u8, u8, Trckcr_SPEC, crate::common::RW> {
11899 crate::common::RegisterField::<4,0x7,1,0,u8,u8,Trckcr_SPEC,crate::common::RW>::from_register(self,0)
11900 }
11901
11902 #[doc = "Trace Clock operating frequency select"]
11903 #[inline(always)]
11904 pub fn trck(
11905 self,
11906 ) -> crate::common::RegisterField<
11907 0,
11908 0xf,
11909 1,
11910 0,
11911 trckcr::Trck,
11912 trckcr::Trck,
11913 Trckcr_SPEC,
11914 crate::common::RW,
11915 > {
11916 crate::common::RegisterField::<
11917 0,
11918 0xf,
11919 1,
11920 0,
11921 trckcr::Trck,
11922 trckcr::Trck,
11923 Trckcr_SPEC,
11924 crate::common::RW,
11925 >::from_register(self, 0)
11926 }
11927}
11928impl ::core::default::Default for Trckcr {
11929 #[inline(always)]
11930 fn default() -> Trckcr {
11931 <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(1)
11932 }
11933}
11934pub mod trckcr {
11935
11936 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11937 pub struct Trcken_SPEC;
11938 pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
11939 impl Trcken {
11940 #[doc = "Operation disabled"]
11941 pub const _0: Self = Self::new(0);
11942
11943 #[doc = "Operation enabled."]
11944 pub const _1: Self = Self::new(1);
11945 }
11946 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11947 pub struct Trck_SPEC;
11948 pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
11949 impl Trck {
11950 #[doc = "/1"]
11951 pub const _0000: Self = Self::new(0);
11952
11953 #[doc = "/2(value after reset)"]
11954 pub const _0001: Self = Self::new(1);
11955
11956 #[doc = "/4"]
11957 pub const _0010: Self = Self::new(2);
11958
11959 #[doc = "Setting prohibited"]
11960 pub const OTHERS: Self = Self::new(0);
11961 }
11962}
11963#[doc(hidden)]
11964#[derive(Copy, Clone, Eq, PartialEq)]
11965pub struct Ostdcr_SPEC;
11966impl crate::sealed::RegSpec for Ostdcr_SPEC {
11967 type DataType = u8;
11968}
11969
11970#[doc = "Oscillation Stop Detection Control Register"]
11971pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
11972
11973impl Ostdcr {
11974 #[doc = "Oscillation Stop Detection Function Enable"]
11975 #[inline(always)]
11976 pub fn ostde(
11977 self,
11978 ) -> crate::common::RegisterField<
11979 7,
11980 0x1,
11981 1,
11982 0,
11983 ostdcr::Ostde,
11984 ostdcr::Ostde,
11985 Ostdcr_SPEC,
11986 crate::common::RW,
11987 > {
11988 crate::common::RegisterField::<
11989 7,
11990 0x1,
11991 1,
11992 0,
11993 ostdcr::Ostde,
11994 ostdcr::Ostde,
11995 Ostdcr_SPEC,
11996 crate::common::RW,
11997 >::from_register(self, 0)
11998 }
11999
12000 #[doc = "These bits are read as 000000. The write value should be 000000."]
12001 #[inline(always)]
12002 pub fn reserved(
12003 self,
12004 ) -> crate::common::RegisterField<1, 0x3f, 1, 0, u8, u8, Ostdcr_SPEC, crate::common::RW> {
12005 crate::common::RegisterField::<1,0x3f,1,0,u8,u8,Ostdcr_SPEC,crate::common::RW>::from_register(self,0)
12006 }
12007
12008 #[doc = "Oscillation Stop Detection Interrupt Enable"]
12009 #[inline(always)]
12010 pub fn ostdie(
12011 self,
12012 ) -> crate::common::RegisterField<
12013 0,
12014 0x1,
12015 1,
12016 0,
12017 ostdcr::Ostdie,
12018 ostdcr::Ostdie,
12019 Ostdcr_SPEC,
12020 crate::common::RW,
12021 > {
12022 crate::common::RegisterField::<
12023 0,
12024 0x1,
12025 1,
12026 0,
12027 ostdcr::Ostdie,
12028 ostdcr::Ostdie,
12029 Ostdcr_SPEC,
12030 crate::common::RW,
12031 >::from_register(self, 0)
12032 }
12033}
12034impl ::core::default::Default for Ostdcr {
12035 #[inline(always)]
12036 fn default() -> Ostdcr {
12037 <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
12038 }
12039}
12040pub mod ostdcr {
12041
12042 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12043 pub struct Ostde_SPEC;
12044 pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
12045 impl Ostde {
12046 #[doc = "Oscillation stop detection function is disabled."]
12047 pub const _0: Self = Self::new(0);
12048
12049 #[doc = "Oscillation stop detection function is enabled."]
12050 pub const _1: Self = Self::new(1);
12051 }
12052 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12053 pub struct Ostdie_SPEC;
12054 pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
12055 impl Ostdie {
12056 #[doc = "The oscillation stop detection interrupt is disabled. Oscillation stop detection is not notified to the POEG."]
12057 pub const _0: Self = Self::new(0);
12058
12059 #[doc = "The oscillation stop detection interrupt is enabled. Oscillation stop detection is notified to the POEG."]
12060 pub const _1: Self = Self::new(1);
12061 }
12062}
12063#[doc(hidden)]
12064#[derive(Copy, Clone, Eq, PartialEq)]
12065pub struct Ostdsr_SPEC;
12066impl crate::sealed::RegSpec for Ostdsr_SPEC {
12067 type DataType = u8;
12068}
12069
12070#[doc = "Oscillation Stop Detection Status Register"]
12071pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
12072
12073impl Ostdsr {
12074 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
12075 #[inline(always)]
12076 pub fn reserved(
12077 self,
12078 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Ostdsr_SPEC, crate::common::RW> {
12079 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Ostdsr_SPEC,crate::common::RW>::from_register(self,0)
12080 }
12081
12082 #[doc = "Oscillation Stop Detection Flag"]
12083 #[inline(always)]
12084 pub fn ostdf(
12085 self,
12086 ) -> crate::common::RegisterField<
12087 0,
12088 0x1,
12089 1,
12090 0,
12091 ostdsr::Ostdf,
12092 ostdsr::Ostdf,
12093 Ostdsr_SPEC,
12094 crate::common::RW,
12095 > {
12096 crate::common::RegisterField::<
12097 0,
12098 0x1,
12099 1,
12100 0,
12101 ostdsr::Ostdf,
12102 ostdsr::Ostdf,
12103 Ostdsr_SPEC,
12104 crate::common::RW,
12105 >::from_register(self, 0)
12106 }
12107}
12108impl ::core::default::Default for Ostdsr {
12109 #[inline(always)]
12110 fn default() -> Ostdsr {
12111 <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
12112 }
12113}
12114pub mod ostdsr {
12115
12116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12117 pub struct Ostdf_SPEC;
12118 pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
12119 impl Ostdf {
12120 #[doc = "The main clock oscillation stop has not been detected."]
12121 pub const _0: Self = Self::new(0);
12122
12123 #[doc = "The main clock oscillation stop has been detected."]
12124 pub const _1: Self = Self::new(1);
12125 }
12126}
12127#[doc(hidden)]
12128#[derive(Copy, Clone, Eq, PartialEq)]
12129pub struct Slcdsckcr_SPEC;
12130impl crate::sealed::RegSpec for Slcdsckcr_SPEC {
12131 type DataType = u8;
12132}
12133
12134#[doc = "Segment LCD Source Clock Control Register"]
12135pub type Slcdsckcr = crate::RegValueT<Slcdsckcr_SPEC>;
12136
12137impl Slcdsckcr {
12138 #[doc = "LCD Source Clock Out Enable"]
12139 #[inline(always)]
12140 pub fn lcdscken(
12141 self,
12142 ) -> crate::common::RegisterField<
12143 7,
12144 0x1,
12145 1,
12146 0,
12147 slcdsckcr::Lcdscken,
12148 slcdsckcr::Lcdscken,
12149 Slcdsckcr_SPEC,
12150 crate::common::RW,
12151 > {
12152 crate::common::RegisterField::<
12153 7,
12154 0x1,
12155 1,
12156 0,
12157 slcdsckcr::Lcdscken,
12158 slcdsckcr::Lcdscken,
12159 Slcdsckcr_SPEC,
12160 crate::common::RW,
12161 >::from_register(self, 0)
12162 }
12163
12164 #[doc = "These bits are read as 0000. The write value should be 0000."]
12165 #[inline(always)]
12166 pub fn reserved(
12167 self,
12168 ) -> crate::common::RegisterField<3, 0xf, 1, 0, u8, u8, Slcdsckcr_SPEC, crate::common::RW> {
12169 crate::common::RegisterField::<3,0xf,1,0,u8,u8,Slcdsckcr_SPEC,crate::common::RW>::from_register(self,0)
12170 }
12171
12172 #[doc = "LCD Source Clock (LCDSRCCLK) Select"]
12173 #[inline(always)]
12174 pub fn lcdscksel(
12175 self,
12176 ) -> crate::common::RegisterField<
12177 0,
12178 0x7,
12179 1,
12180 0,
12181 slcdsckcr::Lcdscksel,
12182 slcdsckcr::Lcdscksel,
12183 Slcdsckcr_SPEC,
12184 crate::common::RW,
12185 > {
12186 crate::common::RegisterField::<
12187 0,
12188 0x7,
12189 1,
12190 0,
12191 slcdsckcr::Lcdscksel,
12192 slcdsckcr::Lcdscksel,
12193 Slcdsckcr_SPEC,
12194 crate::common::RW,
12195 >::from_register(self, 0)
12196 }
12197}
12198impl ::core::default::Default for Slcdsckcr {
12199 #[inline(always)]
12200 fn default() -> Slcdsckcr {
12201 <crate::RegValueT<Slcdsckcr_SPEC> as RegisterValue<_>>::new(0)
12202 }
12203}
12204pub mod slcdsckcr {
12205
12206 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12207 pub struct Lcdscken_SPEC;
12208 pub type Lcdscken = crate::EnumBitfieldStruct<u8, Lcdscken_SPEC>;
12209 impl Lcdscken {
12210 #[doc = "LCD source clock out disabled"]
12211 pub const _0: Self = Self::new(0);
12212
12213 #[doc = "LCD source clock out enabled."]
12214 pub const _1: Self = Self::new(1);
12215 }
12216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12217 pub struct Lcdscksel_SPEC;
12218 pub type Lcdscksel = crate::EnumBitfieldStruct<u8, Lcdscksel_SPEC>;
12219 impl Lcdscksel {
12220 #[doc = "LOCO"]
12221 pub const _000: Self = Self::new(0);
12222
12223 #[doc = "SOSC"]
12224 pub const _001: Self = Self::new(1);
12225
12226 #[doc = "MOSC"]
12227 pub const _010: Self = Self::new(2);
12228
12229 #[doc = "HOCO"]
12230 pub const _100: Self = Self::new(4);
12231
12232 #[doc = "Settings other than above are prohibited."]
12233 pub const OTHERS: Self = Self::new(0);
12234 }
12235}
12236#[doc(hidden)]
12237#[derive(Copy, Clone, Eq, PartialEq)]
12238pub struct Ebckocr_SPEC;
12239impl crate::sealed::RegSpec for Ebckocr_SPEC {
12240 type DataType = u8;
12241}
12242
12243#[doc = "External Bus Clock Output Control Register"]
12244pub type Ebckocr = crate::RegValueT<Ebckocr_SPEC>;
12245
12246impl Ebckocr {
12247 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
12248 #[inline(always)]
12249 pub fn reserved(
12250 self,
12251 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Ebckocr_SPEC, crate::common::RW> {
12252 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Ebckocr_SPEC,crate::common::RW>::from_register(self,0)
12253 }
12254
12255 #[doc = "EBCLK Pin Output Control"]
12256 #[inline(always)]
12257 pub fn ebckoen(
12258 self,
12259 ) -> crate::common::RegisterField<
12260 0,
12261 0x1,
12262 1,
12263 0,
12264 ebckocr::Ebckoen,
12265 ebckocr::Ebckoen,
12266 Ebckocr_SPEC,
12267 crate::common::RW,
12268 > {
12269 crate::common::RegisterField::<
12270 0,
12271 0x1,
12272 1,
12273 0,
12274 ebckocr::Ebckoen,
12275 ebckocr::Ebckoen,
12276 Ebckocr_SPEC,
12277 crate::common::RW,
12278 >::from_register(self, 0)
12279 }
12280}
12281impl ::core::default::Default for Ebckocr {
12282 #[inline(always)]
12283 fn default() -> Ebckocr {
12284 <crate::RegValueT<Ebckocr_SPEC> as RegisterValue<_>>::new(0)
12285 }
12286}
12287pub mod ebckocr {
12288
12289 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12290 pub struct Ebckoen_SPEC;
12291 pub type Ebckoen = crate::EnumBitfieldStruct<u8, Ebckoen_SPEC>;
12292 impl Ebckoen {
12293 #[doc = "BCLK pin output is disabled. (Fixed high)"]
12294 pub const _0: Self = Self::new(0);
12295
12296 #[doc = "BCLK pin output is enabled"]
12297 pub const _1: Self = Self::new(1);
12298 }
12299}
12300#[doc(hidden)]
12301#[derive(Copy, Clone, Eq, PartialEq)]
12302pub struct Mocoutcr_SPEC;
12303impl crate::sealed::RegSpec for Mocoutcr_SPEC {
12304 type DataType = u8;
12305}
12306
12307#[doc = "MOCO User Trimming Control Register"]
12308pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
12309
12310impl Mocoutcr {
12311 #[doc = "MOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original MOCO trimming bits"]
12312 #[inline(always)]
12313 pub fn mocoutrm(
12314 self,
12315 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
12316 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
12317 }
12318}
12319impl ::core::default::Default for Mocoutcr {
12320 #[inline(always)]
12321 fn default() -> Mocoutcr {
12322 <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
12323 }
12324}
12325
12326#[doc(hidden)]
12327#[derive(Copy, Clone, Eq, PartialEq)]
12328pub struct Hocoutcr_SPEC;
12329impl crate::sealed::RegSpec for Hocoutcr_SPEC {
12330 type DataType = u8;
12331}
12332
12333#[doc = "HOCO User Trimming Control Register"]
12334pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
12335
12336impl Hocoutcr {
12337 #[doc = "HOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original HOCO trimming bits"]
12338 #[inline(always)]
12339 pub fn hocoutrm(
12340 self,
12341 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
12342 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
12343 }
12344}
12345impl ::core::default::Default for Hocoutcr {
12346 #[inline(always)]
12347 fn default() -> Hocoutcr {
12348 <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
12349 }
12350}
12351
12352#[doc(hidden)]
12353#[derive(Copy, Clone, Eq, PartialEq)]
12354pub struct Moscwtcr_SPEC;
12355impl crate::sealed::RegSpec for Moscwtcr_SPEC {
12356 type DataType = u8;
12357}
12358
12359#[doc = "Main Clock Oscillator Wait Control Register"]
12360pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
12361
12362impl Moscwtcr {
12363 #[doc = "These bits are read as 0000. The write value should be 0000."]
12364 #[inline(always)]
12365 pub fn reserved(
12366 self,
12367 ) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, Moscwtcr_SPEC, crate::common::RW> {
12368 crate::common::RegisterField::<4,0xf,1,0,u8,u8,Moscwtcr_SPEC,crate::common::RW>::from_register(self,0)
12369 }
12370
12371 #[doc = "Main clock oscillator wait time setting"]
12372 #[inline(always)]
12373 pub fn msts(
12374 self,
12375 ) -> crate::common::RegisterField<
12376 0,
12377 0xf,
12378 1,
12379 0,
12380 moscwtcr::Msts,
12381 moscwtcr::Msts,
12382 Moscwtcr_SPEC,
12383 crate::common::RW,
12384 > {
12385 crate::common::RegisterField::<
12386 0,
12387 0xf,
12388 1,
12389 0,
12390 moscwtcr::Msts,
12391 moscwtcr::Msts,
12392 Moscwtcr_SPEC,
12393 crate::common::RW,
12394 >::from_register(self, 0)
12395 }
12396}
12397impl ::core::default::Default for Moscwtcr {
12398 #[inline(always)]
12399 fn default() -> Moscwtcr {
12400 <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
12401 }
12402}
12403pub mod moscwtcr {
12404
12405 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12406 pub struct Msts_SPEC;
12407 pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
12408 impl Msts {
12409 #[doc = "Wait time = 2 cycles (0.25 us)"]
12410 pub const _0000: Self = Self::new(0);
12411
12412 #[doc = "Wait time = 1024 cycles (128 us)"]
12413 pub const _0001: Self = Self::new(1);
12414
12415 #[doc = "Wait time = 2048 cycles (256 us)"]
12416 pub const _0010: Self = Self::new(2);
12417
12418 #[doc = "Wait time = 4096 cycles (512 us)"]
12419 pub const _0011: Self = Self::new(3);
12420
12421 #[doc = "Wait time = 8192 cycles (1024 us)"]
12422 pub const _0100: Self = Self::new(4);
12423
12424 #[doc = "Wait time = 16384 cycles (2048 us) (value after reset)"]
12425 pub const _0101: Self = Self::new(5);
12426
12427 #[doc = "Wait time = 32768 cycles (4096 us)"]
12428 pub const _0110: Self = Self::new(6);
12429
12430 #[doc = "Wait time = 65536 cycles (8192 us)"]
12431 pub const _0111: Self = Self::new(7);
12432
12433 #[doc = "Wait time = 131072 cycles (16384 us)"]
12434 pub const _1000: Self = Self::new(8);
12435
12436 #[doc = "Wait time = 262144 cycles (32768 us)."]
12437 pub const _1001: Self = Self::new(9);
12438
12439 #[doc = "Setting prohibited"]
12440 pub const OTHERS: Self = Self::new(0);
12441 }
12442}
12443#[doc(hidden)]
12444#[derive(Copy, Clone, Eq, PartialEq)]
12445pub struct Hocowtcr_SPEC;
12446impl crate::sealed::RegSpec for Hocowtcr_SPEC {
12447 type DataType = u8;
12448}
12449
12450#[doc = "High-Speed On-Chip Oscillator Wait Control Register"]
12451pub type Hocowtcr = crate::RegValueT<Hocowtcr_SPEC>;
12452
12453impl Hocowtcr {
12454 #[doc = "These bits are read as 00000. The write value should be 00000."]
12455 #[inline(always)]
12456 pub fn reserved(
12457 self,
12458 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Hocowtcr_SPEC, crate::common::RW> {
12459 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Hocowtcr_SPEC,crate::common::RW>::from_register(self,0)
12460 }
12461
12462 #[doc = "HOCO wait time setting"]
12463 #[inline(always)]
12464 pub fn hsts(
12465 self,
12466 ) -> crate::common::RegisterField<
12467 0,
12468 0x7,
12469 1,
12470 0,
12471 hocowtcr::Hsts,
12472 hocowtcr::Hsts,
12473 Hocowtcr_SPEC,
12474 crate::common::RW,
12475 > {
12476 crate::common::RegisterField::<
12477 0,
12478 0x7,
12479 1,
12480 0,
12481 hocowtcr::Hsts,
12482 hocowtcr::Hsts,
12483 Hocowtcr_SPEC,
12484 crate::common::RW,
12485 >::from_register(self, 0)
12486 }
12487}
12488impl ::core::default::Default for Hocowtcr {
12489 #[inline(always)]
12490 fn default() -> Hocowtcr {
12491 <crate::RegValueT<Hocowtcr_SPEC> as RegisterValue<_>>::new(5)
12492 }
12493}
12494pub mod hocowtcr {
12495
12496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12497 pub struct Hsts_SPEC;
12498 pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
12499 impl Hsts {
12500 #[doc = "If HOCO frequency is other than 64MHz, should set the value to 101b."]
12501 pub const _101: Self = Self::new(5);
12502
12503 #[doc = "If HOCO frequency = 64MHz, should set the value to 110b."]
12504 pub const _110: Self = Self::new(6);
12505
12506 #[doc = "Setting prohibited"]
12507 pub const OTHERS: Self = Self::new(0);
12508 }
12509}
12510#[doc(hidden)]
12511#[derive(Copy, Clone, Eq, PartialEq)]
12512pub struct Usbckcr_SPEC;
12513impl crate::sealed::RegSpec for Usbckcr_SPEC {
12514 type DataType = u8;
12515}
12516
12517#[doc = "USB Clock Control register"]
12518pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
12519
12520impl Usbckcr {
12521 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
12522 #[inline(always)]
12523 pub fn reserved(
12524 self,
12525 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Usbckcr_SPEC, crate::common::RW> {
12526 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Usbckcr_SPEC,crate::common::RW>::from_register(self,0)
12527 }
12528
12529 #[doc = "USB Clock Source Select"]
12530 #[inline(always)]
12531 pub fn hsts(
12532 self,
12533 ) -> crate::common::RegisterField<
12534 0,
12535 0x1,
12536 1,
12537 0,
12538 usbckcr::Hsts,
12539 usbckcr::Hsts,
12540 Usbckcr_SPEC,
12541 crate::common::RW,
12542 > {
12543 crate::common::RegisterField::<
12544 0,
12545 0x1,
12546 1,
12547 0,
12548 usbckcr::Hsts,
12549 usbckcr::Hsts,
12550 Usbckcr_SPEC,
12551 crate::common::RW,
12552 >::from_register(self, 0)
12553 }
12554}
12555impl ::core::default::Default for Usbckcr {
12556 #[inline(always)]
12557 fn default() -> Usbckcr {
12558 <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(0)
12559 }
12560}
12561pub mod usbckcr {
12562
12563 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12564 pub struct Hsts_SPEC;
12565 pub type Hsts = crate::EnumBitfieldStruct<u8, Hsts_SPEC>;
12566 impl Hsts {
12567 #[doc = "PLL(Value after reset)"]
12568 pub const _0: Self = Self::new(0);
12569
12570 #[doc = "HOCO"]
12571 pub const _1: Self = Self::new(1);
12572 }
12573}
12574#[doc(hidden)]
12575#[derive(Copy, Clone, Eq, PartialEq)]
12576pub struct Momcr_SPEC;
12577impl crate::sealed::RegSpec for Momcr_SPEC {
12578 type DataType = u8;
12579}
12580
12581#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
12582pub type Momcr = crate::RegValueT<Momcr_SPEC>;
12583
12584impl Momcr {
12585 #[doc = "Main Clock Oscillator Switching"]
12586 #[inline(always)]
12587 pub fn mosel(
12588 self,
12589 ) -> crate::common::RegisterField<
12590 6,
12591 0x1,
12592 1,
12593 0,
12594 momcr::Mosel,
12595 momcr::Mosel,
12596 Momcr_SPEC,
12597 crate::common::RW,
12598 > {
12599 crate::common::RegisterField::<
12600 6,
12601 0x1,
12602 1,
12603 0,
12604 momcr::Mosel,
12605 momcr::Mosel,
12606 Momcr_SPEC,
12607 crate::common::RW,
12608 >::from_register(self, 0)
12609 }
12610
12611 #[doc = "Main Clock Oscillator Drive Capability 1 Switching"]
12612 #[inline(always)]
12613 pub fn modrv1(
12614 self,
12615 ) -> crate::common::RegisterField<
12616 3,
12617 0x1,
12618 1,
12619 0,
12620 momcr::Modrv1,
12621 momcr::Modrv1,
12622 Momcr_SPEC,
12623 crate::common::RW,
12624 > {
12625 crate::common::RegisterField::<
12626 3,
12627 0x1,
12628 1,
12629 0,
12630 momcr::Modrv1,
12631 momcr::Modrv1,
12632 Momcr_SPEC,
12633 crate::common::RW,
12634 >::from_register(self, 0)
12635 }
12636
12637 #[doc = "These bits are read as 000. The write value should be 000."]
12638 #[inline(always)]
12639 pub fn reserved(
12640 self,
12641 ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Momcr_SPEC, crate::common::RW> {
12642 crate::common::RegisterField::<0,0x7,1,0,u8,u8,Momcr_SPEC,crate::common::RW>::from_register(self,0)
12643 }
12644}
12645impl ::core::default::Default for Momcr {
12646 #[inline(always)]
12647 fn default() -> Momcr {
12648 <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
12649 }
12650}
12651pub mod momcr {
12652
12653 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12654 pub struct Mosel_SPEC;
12655 pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
12656 impl Mosel {
12657 #[doc = "Resonator"]
12658 pub const _0: Self = Self::new(0);
12659
12660 #[doc = "External clock input"]
12661 pub const _1: Self = Self::new(1);
12662 }
12663 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12664 pub struct Modrv1_SPEC;
12665 pub type Modrv1 = crate::EnumBitfieldStruct<u8, Modrv1_SPEC>;
12666 impl Modrv1 {
12667 #[doc = "10 MHz to 20 MHz"]
12668 pub const _0: Self = Self::new(0);
12669
12670 #[doc = "1 MHz to 10 MHz."]
12671 pub const _1: Self = Self::new(1);
12672 }
12673}
12674#[doc(hidden)]
12675#[derive(Copy, Clone, Eq, PartialEq)]
12676pub struct Sosccr_SPEC;
12677impl crate::sealed::RegSpec for Sosccr_SPEC {
12678 type DataType = u8;
12679}
12680
12681#[doc = "Sub-Clock Oscillator Control Register"]
12682pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
12683
12684impl Sosccr {
12685 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
12686 #[inline(always)]
12687 pub fn reserved(
12688 self,
12689 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Sosccr_SPEC, crate::common::RW> {
12690 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Sosccr_SPEC,crate::common::RW>::from_register(self,0)
12691 }
12692
12693 #[doc = "Sub-Clock Oscillator Stop"]
12694 #[inline(always)]
12695 pub fn sostp(
12696 self,
12697 ) -> crate::common::RegisterField<
12698 0,
12699 0x1,
12700 1,
12701 0,
12702 sosccr::Sostp,
12703 sosccr::Sostp,
12704 Sosccr_SPEC,
12705 crate::common::RW,
12706 > {
12707 crate::common::RegisterField::<
12708 0,
12709 0x1,
12710 1,
12711 0,
12712 sosccr::Sostp,
12713 sosccr::Sostp,
12714 Sosccr_SPEC,
12715 crate::common::RW,
12716 >::from_register(self, 0)
12717 }
12718}
12719impl ::core::default::Default for Sosccr {
12720 #[inline(always)]
12721 fn default() -> Sosccr {
12722 <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(1)
12723 }
12724}
12725pub mod sosccr {
12726
12727 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12728 pub struct Sostp_SPEC;
12729 pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
12730 impl Sostp {
12731 #[doc = "Sub-clock oscillator is operating."]
12732 pub const _0: Self = Self::new(0);
12733
12734 #[doc = "Sub-clock oscillator is stopped."]
12735 pub const _1: Self = Self::new(1);
12736 }
12737}
12738#[doc(hidden)]
12739#[derive(Copy, Clone, Eq, PartialEq)]
12740pub struct Somcr_SPEC;
12741impl crate::sealed::RegSpec for Somcr_SPEC {
12742 type DataType = u8;
12743}
12744
12745#[doc = "Sub Clock Oscillator Mode Control Register"]
12746pub type Somcr = crate::RegValueT<Somcr_SPEC>;
12747
12748impl Somcr {
12749 #[doc = "These bits are read as 000000. The write value should be 000000."]
12750 #[inline(always)]
12751 pub fn reserved(
12752 self,
12753 ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Somcr_SPEC, crate::common::RW> {
12754 crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Somcr_SPEC,crate::common::RW>::from_register(self,0)
12755 }
12756
12757 #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
12758 #[inline(always)]
12759 pub fn sodrv(
12760 self,
12761 ) -> crate::common::RegisterField<
12762 0,
12763 0x3,
12764 1,
12765 0,
12766 somcr::Sodrv,
12767 somcr::Sodrv,
12768 Somcr_SPEC,
12769 crate::common::RW,
12770 > {
12771 crate::common::RegisterField::<
12772 0,
12773 0x3,
12774 1,
12775 0,
12776 somcr::Sodrv,
12777 somcr::Sodrv,
12778 Somcr_SPEC,
12779 crate::common::RW,
12780 >::from_register(self, 0)
12781 }
12782}
12783impl ::core::default::Default for Somcr {
12784 #[inline(always)]
12785 fn default() -> Somcr {
12786 <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
12787 }
12788}
12789pub mod somcr {
12790
12791 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12792 pub struct Sodrv_SPEC;
12793 pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
12794 impl Sodrv {
12795 #[doc = "Normal mode"]
12796 pub const _00: Self = Self::new(0);
12797
12798 #[doc = "Low power mode 1"]
12799 pub const _01: Self = Self::new(1);
12800
12801 #[doc = "Low power mode 2"]
12802 pub const _10: Self = Self::new(2);
12803
12804 #[doc = "Low power mode 3."]
12805 pub const _11: Self = Self::new(3);
12806 }
12807}
12808#[doc(hidden)]
12809#[derive(Copy, Clone, Eq, PartialEq)]
12810pub struct Lococr_SPEC;
12811impl crate::sealed::RegSpec for Lococr_SPEC {
12812 type DataType = u8;
12813}
12814
12815#[doc = "Low-Speed On-Chip Oscillator Control Register"]
12816pub type Lococr = crate::RegValueT<Lococr_SPEC>;
12817
12818impl Lococr {
12819 #[doc = "These bits are read as 0000000. The write value should be 0000000."]
12820 #[inline(always)]
12821 pub fn reserved(
12822 self,
12823 ) -> crate::common::RegisterField<1, 0x7f, 1, 0, u8, u8, Lococr_SPEC, crate::common::RW> {
12824 crate::common::RegisterField::<1,0x7f,1,0,u8,u8,Lococr_SPEC,crate::common::RW>::from_register(self,0)
12825 }
12826
12827 #[doc = "LOCO Stop"]
12828 #[inline(always)]
12829 pub fn lcstp(
12830 self,
12831 ) -> crate::common::RegisterField<
12832 0,
12833 0x1,
12834 1,
12835 0,
12836 lococr::Lcstp,
12837 lococr::Lcstp,
12838 Lococr_SPEC,
12839 crate::common::RW,
12840 > {
12841 crate::common::RegisterField::<
12842 0,
12843 0x1,
12844 1,
12845 0,
12846 lococr::Lcstp,
12847 lococr::Lcstp,
12848 Lococr_SPEC,
12849 crate::common::RW,
12850 >::from_register(self, 0)
12851 }
12852}
12853impl ::core::default::Default for Lococr {
12854 #[inline(always)]
12855 fn default() -> Lococr {
12856 <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
12857 }
12858}
12859pub mod lococr {
12860
12861 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12862 pub struct Lcstp_SPEC;
12863 pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
12864 impl Lcstp {
12865 #[doc = "LOCO is operating."]
12866 pub const _0: Self = Self::new(0);
12867
12868 #[doc = "LOCO is stopped."]
12869 pub const _1: Self = Self::new(1);
12870 }
12871}
12872#[doc(hidden)]
12873#[derive(Copy, Clone, Eq, PartialEq)]
12874pub struct Locoutcr_SPEC;
12875impl crate::sealed::RegSpec for Locoutcr_SPEC {
12876 type DataType = u8;
12877}
12878
12879#[doc = "LOCO User Trimming Control Register"]
12880pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
12881
12882impl Locoutcr {
12883 #[doc = "LOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original LOCO trimming bits"]
12884 #[inline(always)]
12885 pub fn locoutrm(
12886 self,
12887 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
12888 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
12889 }
12890}
12891impl ::core::default::Default for Locoutcr {
12892 #[inline(always)]
12893 fn default() -> Locoutcr {
12894 <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
12895 }
12896}
12897
12898#[doc(hidden)]
12899#[derive(Copy, Clone, Eq, PartialEq)]
12900pub struct Bkracr_SPEC;
12901impl crate::sealed::RegSpec for Bkracr_SPEC {
12902 type DataType = u8;
12903}
12904
12905#[doc = "Backup Register Access Control Register"]
12906pub type Bkracr = crate::RegValueT<Bkracr_SPEC>;
12907
12908impl Bkracr {
12909 #[doc = "These bits are read as 00000. The write value should be 00000."]
12910 #[inline(always)]
12911 pub fn reserved(
12912 self,
12913 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Bkracr_SPEC, crate::common::RW> {
12914 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Bkracr_SPEC,crate::common::RW>::from_register(self,0)
12915 }
12916
12917 #[doc = "Backup Register Access Control Register"]
12918 #[inline(always)]
12919 pub fn bkracs(
12920 self,
12921 ) -> crate::common::RegisterField<
12922 0,
12923 0x7,
12924 1,
12925 0,
12926 bkracr::Bkracs,
12927 bkracr::Bkracs,
12928 Bkracr_SPEC,
12929 crate::common::RW,
12930 > {
12931 crate::common::RegisterField::<
12932 0,
12933 0x7,
12934 1,
12935 0,
12936 bkracr::Bkracs,
12937 bkracr::Bkracs,
12938 Bkracr_SPEC,
12939 crate::common::RW,
12940 >::from_register(self, 0)
12941 }
12942}
12943impl ::core::default::Default for Bkracr {
12944 #[inline(always)]
12945 fn default() -> Bkracr {
12946 <crate::RegValueT<Bkracr_SPEC> as RegisterValue<_>>::new(6)
12947 }
12948}
12949pub mod bkracr {
12950
12951 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12952 pub struct Bkracs_SPEC;
12953 pub type Bkracs = crate::EnumBitfieldStruct<u8, Bkracs_SPEC>;
12954 impl Bkracs {
12955 #[doc = "Access control disable. When System clock source is SOSC or LOCO."]
12956 pub const _000: Self = Self::new(0);
12957
12958 #[doc = "Access control enable. System clock source is other than SOSC or LOCO."]
12959 pub const _110: Self = Self::new(6);
12960
12961 #[doc = "Setting prohibited"]
12962 pub const OTHERS: Self = Self::new(0);
12963 }
12964}
12965#[doc(hidden)]
12966#[derive(Copy, Clone, Eq, PartialEq)]
12967pub struct Lvcmpcr_SPEC;
12968impl crate::sealed::RegSpec for Lvcmpcr_SPEC {
12969 type DataType = u8;
12970}
12971
12972#[doc = "Voltage Monitor Circuit Control Register"]
12973pub type Lvcmpcr = crate::RegValueT<Lvcmpcr_SPEC>;
12974
12975impl Lvcmpcr {
12976 #[doc = "Voltage Detection 2 Enable"]
12977 #[inline(always)]
12978 pub fn lvd2e(
12979 self,
12980 ) -> crate::common::RegisterField<
12981 6,
12982 0x1,
12983 1,
12984 0,
12985 lvcmpcr::Lvd2E,
12986 lvcmpcr::Lvd2E,
12987 Lvcmpcr_SPEC,
12988 crate::common::RW,
12989 > {
12990 crate::common::RegisterField::<
12991 6,
12992 0x1,
12993 1,
12994 0,
12995 lvcmpcr::Lvd2E,
12996 lvcmpcr::Lvd2E,
12997 Lvcmpcr_SPEC,
12998 crate::common::RW,
12999 >::from_register(self, 0)
13000 }
13001
13002 #[doc = "Voltage Detection 1 Enable"]
13003 #[inline(always)]
13004 pub fn lvd1e(
13005 self,
13006 ) -> crate::common::RegisterField<
13007 5,
13008 0x1,
13009 1,
13010 0,
13011 lvcmpcr::Lvd1E,
13012 lvcmpcr::Lvd1E,
13013 Lvcmpcr_SPEC,
13014 crate::common::RW,
13015 > {
13016 crate::common::RegisterField::<
13017 5,
13018 0x1,
13019 1,
13020 0,
13021 lvcmpcr::Lvd1E,
13022 lvcmpcr::Lvd1E,
13023 Lvcmpcr_SPEC,
13024 crate::common::RW,
13025 >::from_register(self, 0)
13026 }
13027
13028 #[doc = "These bits are read as 00. The write value should be 00."]
13029 #[inline(always)]
13030 pub fn reserved(
13031 self,
13032 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Lvcmpcr_SPEC, crate::common::RW> {
13033 crate::common::RegisterField::<0,0x3,1,0,u8,u8,Lvcmpcr_SPEC,crate::common::RW>::from_register(self,0)
13034 }
13035}
13036impl ::core::default::Default for Lvcmpcr {
13037 #[inline(always)]
13038 fn default() -> Lvcmpcr {
13039 <crate::RegValueT<Lvcmpcr_SPEC> as RegisterValue<_>>::new(0)
13040 }
13041}
13042pub mod lvcmpcr {
13043
13044 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13045 pub struct Lvd2E_SPEC;
13046 pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
13047 impl Lvd2E {
13048 #[doc = "Voltage detection 2 circuit disabled"]
13049 pub const _0: Self = Self::new(0);
13050
13051 #[doc = "Voltage detection 2 circuit enabled"]
13052 pub const _1: Self = Self::new(1);
13053 }
13054 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13055 pub struct Lvd1E_SPEC;
13056 pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
13057 impl Lvd1E {
13058 #[doc = "Voltage detection 1 circuit disabled"]
13059 pub const _0: Self = Self::new(0);
13060
13061 #[doc = "Voltage detection 1 circuit enabled"]
13062 pub const _1: Self = Self::new(1);
13063 }
13064}
13065#[doc(hidden)]
13066#[derive(Copy, Clone, Eq, PartialEq)]
13067pub struct Lvdlvlr_SPEC;
13068impl crate::sealed::RegSpec for Lvdlvlr_SPEC {
13069 type DataType = u8;
13070}
13071
13072#[doc = "Voltage Detection Level Select Register"]
13073pub type Lvdlvlr = crate::RegValueT<Lvdlvlr_SPEC>;
13074
13075impl Lvdlvlr {
13076 #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
13077 #[inline(always)]
13078 pub fn lvd2lvl(
13079 self,
13080 ) -> crate::common::RegisterField<
13081 5,
13082 0x7,
13083 1,
13084 0,
13085 lvdlvlr::Lvd2Lvl,
13086 lvdlvlr::Lvd2Lvl,
13087 Lvdlvlr_SPEC,
13088 crate::common::RW,
13089 > {
13090 crate::common::RegisterField::<
13091 5,
13092 0x7,
13093 1,
13094 0,
13095 lvdlvlr::Lvd2Lvl,
13096 lvdlvlr::Lvd2Lvl,
13097 Lvdlvlr_SPEC,
13098 crate::common::RW,
13099 >::from_register(self, 0)
13100 }
13101
13102 #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
13103 #[inline(always)]
13104 pub fn lvd1lvl(
13105 self,
13106 ) -> crate::common::RegisterField<
13107 0,
13108 0x1f,
13109 1,
13110 0,
13111 lvdlvlr::Lvd1Lvl,
13112 lvdlvlr::Lvd1Lvl,
13113 Lvdlvlr_SPEC,
13114 crate::common::RW,
13115 > {
13116 crate::common::RegisterField::<
13117 0,
13118 0x1f,
13119 1,
13120 0,
13121 lvdlvlr::Lvd1Lvl,
13122 lvdlvlr::Lvd1Lvl,
13123 Lvdlvlr_SPEC,
13124 crate::common::RW,
13125 >::from_register(self, 0)
13126 }
13127}
13128impl ::core::default::Default for Lvdlvlr {
13129 #[inline(always)]
13130 fn default() -> Lvdlvlr {
13131 <crate::RegValueT<Lvdlvlr_SPEC> as RegisterValue<_>>::new(7)
13132 }
13133}
13134pub mod lvdlvlr {
13135
13136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13137 pub struct Lvd2Lvl_SPEC;
13138 pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
13139 impl Lvd2Lvl {
13140 #[doc = "4.29V (Vdet2_0)"]
13141 pub const _000: Self = Self::new(0);
13142
13143 #[doc = "4.14V (Vdet2_1)"]
13144 pub const _001: Self = Self::new(1);
13145
13146 #[doc = "4.02V (Vdet2_2)"]
13147 pub const _010: Self = Self::new(2);
13148
13149 #[doc = "3.84V (Vdet2_3)"]
13150 pub const _011: Self = Self::new(3);
13151
13152 #[doc = "Setting prohibited."]
13153 pub const OTHERS: Self = Self::new(0);
13154 }
13155 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13156 pub struct Lvd1Lvl_SPEC;
13157 pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
13158 impl Lvd1Lvl {
13159 #[doc = "4.29V (Vdet1_0)"]
13160 pub const _00000: Self = Self::new(0);
13161
13162 #[doc = "4.14V (Vdet1_1)"]
13163 pub const _00001: Self = Self::new(1);
13164
13165 #[doc = "4.02V (Vdet1_2)"]
13166 pub const _00010: Self = Self::new(2);
13167
13168 #[doc = "3.84V (Vdet1_3)"]
13169 pub const _00011: Self = Self::new(3);
13170
13171 #[doc = "3.10V (Vdet1_4)"]
13172 pub const _00100: Self = Self::new(4);
13173
13174 #[doc = "3.00V (Vdet1_5)"]
13175 pub const _00101: Self = Self::new(5);
13176
13177 #[doc = "2.90V (Vdet1_6)"]
13178 pub const _00110: Self = Self::new(6);
13179
13180 #[doc = "2.79V (Vdet1_7)"]
13181 pub const _00111: Self = Self::new(7);
13182
13183 #[doc = "2.68V (Vdet1_8)"]
13184 pub const _01000: Self = Self::new(8);
13185
13186 #[doc = "2.58V (Vdet1_9)"]
13187 pub const _01001: Self = Self::new(9);
13188
13189 #[doc = "2.48V (Vdet1_A)"]
13190 pub const _01010: Self = Self::new(10);
13191
13192 #[doc = "2.20V (Vdet1_B)"]
13193 pub const _01011: Self = Self::new(11);
13194
13195 #[doc = "1.96V (Vdet1_C)"]
13196 pub const _01100: Self = Self::new(12);
13197
13198 #[doc = "1.86V (Vdet1_D)"]
13199 pub const _01101: Self = Self::new(13);
13200
13201 #[doc = "1.75V (Vdet1_E)"]
13202 pub const _01110: Self = Self::new(14);
13203
13204 #[doc = "1.65V (Vdet1_F)"]
13205 pub const _01111: Self = Self::new(15);
13206
13207 #[doc = "Setting prohibited"]
13208 pub const OTHERS: Self = Self::new(0);
13209 }
13210}
13211#[doc(hidden)]
13212#[derive(Copy, Clone, Eq, PartialEq)]
13213pub struct Lvdcr0_SPEC;
13214impl crate::sealed::RegSpec for Lvdcr0_SPEC {
13215 type DataType = u8;
13216}
13217
13218#[doc = "Voltage Monitor %s Circuit Control Register 0"]
13219pub type Lvdcr0 = crate::RegValueT<Lvdcr0_SPEC>;
13220
13221impl Lvdcr0 {
13222 #[doc = "Voltage Monitor Reset Negate Select"]
13223 #[inline(always)]
13224 pub fn rn(
13225 self,
13226 ) -> crate::common::RegisterField<
13227 7,
13228 0x1,
13229 1,
13230 0,
13231 lvdcr0::Rn,
13232 lvdcr0::Rn,
13233 Lvdcr0_SPEC,
13234 crate::common::RW,
13235 > {
13236 crate::common::RegisterField::<
13237 7,
13238 0x1,
13239 1,
13240 0,
13241 lvdcr0::Rn,
13242 lvdcr0::Rn,
13243 Lvdcr0_SPEC,
13244 crate::common::RW,
13245 >::from_register(self, 0)
13246 }
13247
13248 #[doc = "Voltage Monitor Circuit Mode Select"]
13249 #[inline(always)]
13250 pub fn ri(
13251 self,
13252 ) -> crate::common::RegisterField<
13253 6,
13254 0x1,
13255 1,
13256 0,
13257 lvdcr0::Ri,
13258 lvdcr0::Ri,
13259 Lvdcr0_SPEC,
13260 crate::common::RW,
13261 > {
13262 crate::common::RegisterField::<
13263 6,
13264 0x1,
13265 1,
13266 0,
13267 lvdcr0::Ri,
13268 lvdcr0::Ri,
13269 Lvdcr0_SPEC,
13270 crate::common::RW,
13271 >::from_register(self, 0)
13272 }
13273
13274 #[doc = "Voltage Monitor Circuit Comparison Result Output Enable"]
13275 #[inline(always)]
13276 pub fn cmpe(
13277 self,
13278 ) -> crate::common::RegisterField<
13279 2,
13280 0x1,
13281 1,
13282 0,
13283 lvdcr0::Cmpe,
13284 lvdcr0::Cmpe,
13285 Lvdcr0_SPEC,
13286 crate::common::RW,
13287 > {
13288 crate::common::RegisterField::<
13289 2,
13290 0x1,
13291 1,
13292 0,
13293 lvdcr0::Cmpe,
13294 lvdcr0::Cmpe,
13295 Lvdcr0_SPEC,
13296 crate::common::RW,
13297 >::from_register(self, 0)
13298 }
13299
13300 #[doc = "This bit is read as 0. The write value should be 0."]
13301 #[inline(always)]
13302 pub fn reserved(
13303 self,
13304 ) -> crate::common::RegisterFieldBool<1, 1, 0, Lvdcr0_SPEC, crate::common::RW> {
13305 crate::common::RegisterFieldBool::<1, 1, 0, Lvdcr0_SPEC, crate::common::RW>::from_register(
13306 self, 0,
13307 )
13308 }
13309
13310 #[doc = "Voltage Monitor Interrupt/Reset Enable"]
13311 #[inline(always)]
13312 pub fn rie(
13313 self,
13314 ) -> crate::common::RegisterField<
13315 0,
13316 0x1,
13317 1,
13318 0,
13319 lvdcr0::Rie,
13320 lvdcr0::Rie,
13321 Lvdcr0_SPEC,
13322 crate::common::RW,
13323 > {
13324 crate::common::RegisterField::<
13325 0,
13326 0x1,
13327 1,
13328 0,
13329 lvdcr0::Rie,
13330 lvdcr0::Rie,
13331 Lvdcr0_SPEC,
13332 crate::common::RW,
13333 >::from_register(self, 0)
13334 }
13335}
13336impl ::core::default::Default for Lvdcr0 {
13337 #[inline(always)]
13338 fn default() -> Lvdcr0 {
13339 <crate::RegValueT<Lvdcr0_SPEC> as RegisterValue<_>>::new(128)
13340 }
13341}
13342pub mod lvdcr0 {
13343
13344 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13345 pub struct Rn_SPEC;
13346 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
13347 impl Rn {
13348 #[doc = "Negation follows a stabilization time (tLVD) after VCC > Vdet1 is detected."]
13349 pub const _0: Self = Self::new(0);
13350
13351 #[doc = "Negation follows a stabilization time (tLVD) after assertion of the LVD reset."]
13352 pub const _1: Self = Self::new(1);
13353 }
13354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13355 pub struct Ri_SPEC;
13356 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
13357 impl Ri {
13358 #[doc = "Voltage Monitor interrupt during Vdet1 passage"]
13359 pub const _0: Self = Self::new(0);
13360
13361 #[doc = "Voltage Monitor reset enabled when the voltage falls to and below Vdet1"]
13362 pub const _1: Self = Self::new(1);
13363 }
13364 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13365 pub struct Cmpe_SPEC;
13366 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
13367 impl Cmpe {
13368 #[doc = "Voltage Monitor circuit comparison result output disabled."]
13369 pub const _0: Self = Self::new(0);
13370
13371 #[doc = "Voltage Monitor circuit comparison result output enabled."]
13372 pub const _1: Self = Self::new(1);
13373 }
13374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13375 pub struct Rie_SPEC;
13376 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
13377 impl Rie {
13378 #[doc = "Disabled"]
13379 pub const _0: Self = Self::new(0);
13380
13381 #[doc = "Enabled"]
13382 pub const _1: Self = Self::new(1);
13383 }
13384}
13385#[doc(hidden)]
13386#[derive(Copy, Clone, Eq, PartialEq)]
13387pub struct Lvdcr1_SPEC;
13388impl crate::sealed::RegSpec for Lvdcr1_SPEC {
13389 type DataType = u8;
13390}
13391
13392#[doc = "Voltage Monitor %s Circuit Control Register 1"]
13393pub type Lvdcr1 = crate::RegValueT<Lvdcr1_SPEC>;
13394
13395impl Lvdcr1 {
13396 #[doc = "These bits are read as 00000. The write value should be 00000."]
13397 #[inline(always)]
13398 pub fn reserved(
13399 self,
13400 ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Lvdcr1_SPEC, crate::common::RW> {
13401 crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Lvdcr1_SPEC,crate::common::RW>::from_register(self,0)
13402 }
13403
13404 #[doc = "Voltage Monitor Interrupt Type Select"]
13405 #[inline(always)]
13406 pub fn irqsel(
13407 self,
13408 ) -> crate::common::RegisterField<
13409 2,
13410 0x1,
13411 1,
13412 0,
13413 lvdcr1::Irqsel,
13414 lvdcr1::Irqsel,
13415 Lvdcr1_SPEC,
13416 crate::common::RW,
13417 > {
13418 crate::common::RegisterField::<
13419 2,
13420 0x1,
13421 1,
13422 0,
13423 lvdcr1::Irqsel,
13424 lvdcr1::Irqsel,
13425 Lvdcr1_SPEC,
13426 crate::common::RW,
13427 >::from_register(self, 0)
13428 }
13429
13430 #[doc = "Voltage Monitor Interrupt Generation Condition Select"]
13431 #[inline(always)]
13432 pub fn idtsel(
13433 self,
13434 ) -> crate::common::RegisterField<
13435 0,
13436 0x3,
13437 1,
13438 0,
13439 lvdcr1::Idtsel,
13440 lvdcr1::Idtsel,
13441 Lvdcr1_SPEC,
13442 crate::common::RW,
13443 > {
13444 crate::common::RegisterField::<
13445 0,
13446 0x3,
13447 1,
13448 0,
13449 lvdcr1::Idtsel,
13450 lvdcr1::Idtsel,
13451 Lvdcr1_SPEC,
13452 crate::common::RW,
13453 >::from_register(self, 0)
13454 }
13455}
13456impl ::core::default::Default for Lvdcr1 {
13457 #[inline(always)]
13458 fn default() -> Lvdcr1 {
13459 <crate::RegValueT<Lvdcr1_SPEC> as RegisterValue<_>>::new(1)
13460 }
13461}
13462pub mod lvdcr1 {
13463
13464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13465 pub struct Irqsel_SPEC;
13466 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
13467 impl Irqsel {
13468 #[doc = "Non-maskable interrupt"]
13469 pub const _0: Self = Self::new(0);
13470
13471 #[doc = "Maskable interrupt"]
13472 pub const _1: Self = Self::new(1);
13473 }
13474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13475 pub struct Idtsel_SPEC;
13476 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
13477 impl Idtsel {
13478 #[doc = "When VCC>=Vdet (rise) is detected"]
13479 pub const _00: Self = Self::new(0);
13480
13481 #[doc = "When VCC<Vdet (drop) is detected"]
13482 pub const _01: Self = Self::new(1);
13483
13484 #[doc = "When drop and rise are detected"]
13485 pub const _10: Self = Self::new(2);
13486
13487 #[doc = "Settings prohibited"]
13488 pub const _11: Self = Self::new(3);
13489 }
13490}
13491#[doc(hidden)]
13492#[derive(Copy, Clone, Eq, PartialEq)]
13493pub struct Lvdsr_SPEC;
13494impl crate::sealed::RegSpec for Lvdsr_SPEC {
13495 type DataType = u8;
13496}
13497
13498#[doc = "Voltage Monitor %s Circuit Status Register"]
13499pub type Lvdsr = crate::RegValueT<Lvdsr_SPEC>;
13500
13501impl Lvdsr {
13502 #[doc = "These bits are read as 000000. The write value should be 000000."]
13503 #[inline(always)]
13504 pub fn reserved(
13505 self,
13506 ) -> crate::common::RegisterField<2, 0x3f, 1, 0, u8, u8, Lvdsr_SPEC, crate::common::RW> {
13507 crate::common::RegisterField::<2,0x3f,1,0,u8,u8,Lvdsr_SPEC,crate::common::RW>::from_register(self,0)
13508 }
13509
13510 #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
13511 #[inline(always)]
13512 pub fn mon(
13513 self,
13514 ) -> crate::common::RegisterField<
13515 1,
13516 0x1,
13517 1,
13518 0,
13519 lvdsr::Mon,
13520 lvdsr::Mon,
13521 Lvdsr_SPEC,
13522 crate::common::R,
13523 > {
13524 crate::common::RegisterField::<
13525 1,
13526 0x1,
13527 1,
13528 0,
13529 lvdsr::Mon,
13530 lvdsr::Mon,
13531 Lvdsr_SPEC,
13532 crate::common::R,
13533 >::from_register(self, 0)
13534 }
13535
13536 #[doc = "Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit. After writing 0 to this bit, it takes 2 system clock cycles for the bit to be read as 0."]
13537 #[inline(always)]
13538 pub fn det(
13539 self,
13540 ) -> crate::common::RegisterField<
13541 0,
13542 0x1,
13543 1,
13544 0,
13545 lvdsr::Det,
13546 lvdsr::Det,
13547 Lvdsr_SPEC,
13548 crate::common::RW,
13549 > {
13550 crate::common::RegisterField::<
13551 0,
13552 0x1,
13553 1,
13554 0,
13555 lvdsr::Det,
13556 lvdsr::Det,
13557 Lvdsr_SPEC,
13558 crate::common::RW,
13559 >::from_register(self, 0)
13560 }
13561}
13562impl ::core::default::Default for Lvdsr {
13563 #[inline(always)]
13564 fn default() -> Lvdsr {
13565 <crate::RegValueT<Lvdsr_SPEC> as RegisterValue<_>>::new(2)
13566 }
13567}
13568pub mod lvdsr {
13569
13570 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13571 pub struct Mon_SPEC;
13572 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
13573 impl Mon {
13574 #[doc = "VCC < Vdet"]
13575 pub const _0: Self = Self::new(0);
13576
13577 #[doc = "VCC >= Vdet or MON bit is disabled"]
13578 pub const _1: Self = Self::new(1);
13579 }
13580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13581 pub struct Det_SPEC;
13582 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
13583 impl Det {
13584 #[doc = "Not detected"]
13585 pub const _0: Self = Self::new(0);
13586
13587 #[doc = "Vdet1 passage detection"]
13588 pub const _1: Self = Self::new(1);
13589 }
13590}