1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SYSTEM/FLASH"]
28unsafe impl ::core::marker::Send for super::Fcache {}
29unsafe impl ::core::marker::Sync for super::Fcache {}
30impl super::Fcache {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Flash Cache Enable Register"]
38 #[inline(always)]
39 pub const fn fcachee(
40 &self,
41 ) -> &'static crate::common::Reg<self::Fcachee_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::Fcachee_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(0usize),
45 )
46 }
47 }
48
49 #[doc = "Flash Cache Invalidate Register"]
50 #[inline(always)]
51 pub const fn fcacheiv(
52 &self,
53 ) -> &'static crate::common::Reg<self::Fcacheiv_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::Fcacheiv_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(4usize),
57 )
58 }
59 }
60
61 #[doc = "Flash Wait Cycle Register"]
62 #[inline(always)]
63 pub const fn flwt(&self) -> &'static crate::common::Reg<self::Flwt_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Flwt_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(28usize),
67 )
68 }
69 }
70
71 #[doc = "Flash Security Attribution Register"]
72 #[inline(always)]
73 pub const fn fsar(&self) -> &'static crate::common::Reg<self::Fsar_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::Fsar_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(64usize),
77 )
78 }
79 }
80}
81#[doc(hidden)]
82#[derive(Copy, Clone, Eq, PartialEq)]
83pub struct Fcachee_SPEC;
84impl crate::sealed::RegSpec for Fcachee_SPEC {
85 type DataType = u16;
86}
87
88#[doc = "Flash Cache Enable Register"]
89pub type Fcachee = crate::RegValueT<Fcachee_SPEC>;
90
91impl Fcachee {
92 #[doc = "Flash Cache Enable"]
93 #[inline(always)]
94 pub fn fcacheen(
95 self,
96 ) -> crate::common::RegisterField<
97 0,
98 0x1,
99 1,
100 0,
101 fcachee::Fcacheen,
102 fcachee::Fcacheen,
103 Fcachee_SPEC,
104 crate::common::RW,
105 > {
106 crate::common::RegisterField::<
107 0,
108 0x1,
109 1,
110 0,
111 fcachee::Fcacheen,
112 fcachee::Fcacheen,
113 Fcachee_SPEC,
114 crate::common::RW,
115 >::from_register(self, 0)
116 }
117}
118impl ::core::default::Default for Fcachee {
119 #[inline(always)]
120 fn default() -> Fcachee {
121 <crate::RegValueT<Fcachee_SPEC> as RegisterValue<_>>::new(0)
122 }
123}
124pub mod fcachee {
125
126 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
127 pub struct Fcacheen_SPEC;
128 pub type Fcacheen = crate::EnumBitfieldStruct<u8, Fcacheen_SPEC>;
129 impl Fcacheen {
130 #[doc = "FCACHE is disabled"]
131 pub const _0: Self = Self::new(0);
132
133 #[doc = "FCACHE is enabled"]
134 pub const _1: Self = Self::new(1);
135 }
136}
137#[doc(hidden)]
138#[derive(Copy, Clone, Eq, PartialEq)]
139pub struct Fcacheiv_SPEC;
140impl crate::sealed::RegSpec for Fcacheiv_SPEC {
141 type DataType = u16;
142}
143
144#[doc = "Flash Cache Invalidate Register"]
145pub type Fcacheiv = crate::RegValueT<Fcacheiv_SPEC>;
146
147impl Fcacheiv {
148 #[doc = "Flash Cache Invalidate"]
149 #[inline(always)]
150 pub fn fcacheiv(
151 self,
152 ) -> crate::common::RegisterField<
153 0,
154 0x1,
155 1,
156 0,
157 fcacheiv::Fcacheiv,
158 fcacheiv::Fcacheiv,
159 Fcacheiv_SPEC,
160 crate::common::RW,
161 > {
162 crate::common::RegisterField::<
163 0,
164 0x1,
165 1,
166 0,
167 fcacheiv::Fcacheiv,
168 fcacheiv::Fcacheiv,
169 Fcacheiv_SPEC,
170 crate::common::RW,
171 >::from_register(self, 0)
172 }
173}
174impl ::core::default::Default for Fcacheiv {
175 #[inline(always)]
176 fn default() -> Fcacheiv {
177 <crate::RegValueT<Fcacheiv_SPEC> as RegisterValue<_>>::new(0)
178 }
179}
180pub mod fcacheiv {
181
182 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
183 pub struct Fcacheiv_SPEC;
184 pub type Fcacheiv = crate::EnumBitfieldStruct<u8, Fcacheiv_SPEC>;
185 impl Fcacheiv {
186 #[doc = "Read: Do not invalidate. Write: The setting is ignored."]
187 pub const _0: Self = Self::new(0);
188
189 #[doc = "Invalidate FCACHE is invalidated."]
190 pub const _1: Self = Self::new(1);
191 }
192}
193#[doc(hidden)]
194#[derive(Copy, Clone, Eq, PartialEq)]
195pub struct Flwt_SPEC;
196impl crate::sealed::RegSpec for Flwt_SPEC {
197 type DataType = u8;
198}
199
200#[doc = "Flash Wait Cycle Register"]
201pub type Flwt = crate::RegValueT<Flwt_SPEC>;
202
203impl Flwt {
204 #[doc = "Flash Wait Cycle"]
205 #[inline(always)]
206 pub fn flwt(
207 self,
208 ) -> crate::common::RegisterField<
209 0,
210 0x7,
211 1,
212 0,
213 flwt::Flwt,
214 flwt::Flwt,
215 Flwt_SPEC,
216 crate::common::RW,
217 > {
218 crate::common::RegisterField::<
219 0,
220 0x7,
221 1,
222 0,
223 flwt::Flwt,
224 flwt::Flwt,
225 Flwt_SPEC,
226 crate::common::RW,
227 >::from_register(self, 0)
228 }
229}
230impl ::core::default::Default for Flwt {
231 #[inline(always)]
232 fn default() -> Flwt {
233 <crate::RegValueT<Flwt_SPEC> as RegisterValue<_>>::new(0)
234 }
235}
236pub mod flwt {
237
238 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
239 pub struct Flwt_SPEC;
240 pub type Flwt = crate::EnumBitfieldStruct<u8, Flwt_SPEC>;
241 impl Flwt {
242 #[doc = "0 wait (ICLK ≤ 50 MHz)"]
243 pub const _000: Self = Self::new(0);
244
245 #[doc = "1 wait (ICLK > 50 MHz)"]
246 pub const _001: Self = Self::new(1);
247
248 #[doc = "2 wait Not specified"]
249 pub const _010: Self = Self::new(2);
250
251 #[doc = "3 wait Not specified"]
252 pub const _011: Self = Self::new(3);
253 }
254}
255#[doc(hidden)]
256#[derive(Copy, Clone, Eq, PartialEq)]
257pub struct Fsar_SPEC;
258impl crate::sealed::RegSpec for Fsar_SPEC {
259 type DataType = u16;
260}
261
262#[doc = "Flash Security Attribution Register"]
263pub type Fsar = crate::RegValueT<Fsar_SPEC>;
264
265impl Fsar {
266 #[doc = "FLWT Security Attribution"]
267 #[inline(always)]
268 pub fn flwtsa(
269 self,
270 ) -> crate::common::RegisterField<
271 0,
272 0x1,
273 1,
274 0,
275 fsar::Flwtsa,
276 fsar::Flwtsa,
277 Fsar_SPEC,
278 crate::common::RW,
279 > {
280 crate::common::RegisterField::<
281 0,
282 0x1,
283 1,
284 0,
285 fsar::Flwtsa,
286 fsar::Flwtsa,
287 Fsar_SPEC,
288 crate::common::RW,
289 >::from_register(self, 0)
290 }
291
292 #[doc = "FCKMHZ Security Attribution"]
293 #[inline(always)]
294 pub fn fckmhzsa(
295 self,
296 ) -> crate::common::RegisterField<
297 8,
298 0x1,
299 1,
300 0,
301 fsar::Fckmhzsa,
302 fsar::Fckmhzsa,
303 Fsar_SPEC,
304 crate::common::RW,
305 > {
306 crate::common::RegisterField::<
307 8,
308 0x1,
309 1,
310 0,
311 fsar::Fckmhzsa,
312 fsar::Fckmhzsa,
313 Fsar_SPEC,
314 crate::common::RW,
315 >::from_register(self, 0)
316 }
317}
318impl ::core::default::Default for Fsar {
319 #[inline(always)]
320 fn default() -> Fsar {
321 <crate::RegValueT<Fsar_SPEC> as RegisterValue<_>>::new(65535)
322 }
323}
324pub mod fsar {
325
326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
327 pub struct Flwtsa_SPEC;
328 pub type Flwtsa = crate::EnumBitfieldStruct<u8, Flwtsa_SPEC>;
329 impl Flwtsa {
330 #[doc = "Secure"]
331 pub const _0: Self = Self::new(0);
332
333 #[doc = "Non-Secure"]
334 pub const _1: Self = Self::new(1);
335 }
336 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
337 pub struct Fckmhzsa_SPEC;
338 pub type Fckmhzsa = crate::EnumBitfieldStruct<u8, Fckmhzsa_SPEC>;
339 impl Fckmhzsa {
340 #[doc = "Secure"]
341 pub const _0: Self = Self::new(0);
342
343 #[doc = "Non-Secure"]
344 pub const _1: Self = Self::new(1);
345 }
346}