ra4m3/spi0/
spcmd.rs

1#[doc = "Register `SPCMD%s` reader"]
2pub struct R(crate::R<SPCMD_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPCMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPCMD_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPCMD_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SPCMD%s` writer"]
17pub struct W(crate::W<SPCMD_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SPCMD_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SPCMD_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SPCMD_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CPHA` reader - RSPCK Phase Setting"]
38pub type CPHA_R = crate::BitReader<CPHA_A>;
39#[doc = "RSPCK Phase Setting\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum CPHA_A {
42    #[doc = "0: Select data sampling on leading edge, data change on trailing edge"]
43    _0 = 0,
44    #[doc = "1: Select data change on leading edge, data sampling on trailing edge"]
45    _1 = 1,
46}
47impl From<CPHA_A> for bool {
48    #[inline(always)]
49    fn from(variant: CPHA_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl CPHA_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> CPHA_A {
57        match self.bits {
58            false => CPHA_A::_0,
59            true => CPHA_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == CPHA_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == CPHA_A::_1
71    }
72}
73#[doc = "Field `CPHA` writer - RSPCK Phase Setting"]
74pub type CPHA_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, CPHA_A, O>;
75impl<'a, const O: u8> CPHA_W<'a, O> {
76    #[doc = "Select data sampling on leading edge, data change on trailing edge"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(CPHA_A::_0)
80    }
81    #[doc = "Select data change on leading edge, data sampling on trailing edge"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(CPHA_A::_1)
85    }
86}
87#[doc = "Field `CPOL` reader - RSPCK Polarity Setting"]
88pub type CPOL_R = crate::BitReader<CPOL_A>;
89#[doc = "RSPCK Polarity Setting\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum CPOL_A {
92    #[doc = "0: Set RSPCK low during idle"]
93    _0 = 0,
94    #[doc = "1: Set RSPCK high during idle"]
95    _1 = 1,
96}
97impl From<CPOL_A> for bool {
98    #[inline(always)]
99    fn from(variant: CPOL_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl CPOL_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> CPOL_A {
107        match self.bits {
108            false => CPOL_A::_0,
109            true => CPOL_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == CPOL_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == CPOL_A::_1
121    }
122}
123#[doc = "Field `CPOL` writer - RSPCK Polarity Setting"]
124pub type CPOL_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, CPOL_A, O>;
125impl<'a, const O: u8> CPOL_W<'a, O> {
126    #[doc = "Set RSPCK low during idle"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(CPOL_A::_0)
130    }
131    #[doc = "Set RSPCK high during idle"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(CPOL_A::_1)
135    }
136}
137#[doc = "Field `BRDV` reader - Bit Rate Division Setting"]
138pub type BRDV_R = crate::FieldReader<u8, BRDV_A>;
139#[doc = "Bit Rate Division Setting\n\nValue on reset: 3"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141#[repr(u8)]
142pub enum BRDV_A {
143    #[doc = "0: Base bit rate"]
144    _00 = 0,
145    #[doc = "1: Base bit rate divided by 2"]
146    _01 = 1,
147    #[doc = "2: Base bit rate divided by 4"]
148    _10 = 2,
149    #[doc = "3: Base bit rate divided by 8"]
150    _11 = 3,
151}
152impl From<BRDV_A> for u8 {
153    #[inline(always)]
154    fn from(variant: BRDV_A) -> Self {
155        variant as _
156    }
157}
158impl BRDV_R {
159    #[doc = "Get enumerated values variant"]
160    #[inline(always)]
161    pub fn variant(&self) -> BRDV_A {
162        match self.bits {
163            0 => BRDV_A::_00,
164            1 => BRDV_A::_01,
165            2 => BRDV_A::_10,
166            3 => BRDV_A::_11,
167            _ => unreachable!(),
168        }
169    }
170    #[doc = "Checks if the value of the field is `_00`"]
171    #[inline(always)]
172    pub fn is_00(&self) -> bool {
173        *self == BRDV_A::_00
174    }
175    #[doc = "Checks if the value of the field is `_01`"]
176    #[inline(always)]
177    pub fn is_01(&self) -> bool {
178        *self == BRDV_A::_01
179    }
180    #[doc = "Checks if the value of the field is `_10`"]
181    #[inline(always)]
182    pub fn is_10(&self) -> bool {
183        *self == BRDV_A::_10
184    }
185    #[doc = "Checks if the value of the field is `_11`"]
186    #[inline(always)]
187    pub fn is_11(&self) -> bool {
188        *self == BRDV_A::_11
189    }
190}
191#[doc = "Field `BRDV` writer - Bit Rate Division Setting"]
192pub type BRDV_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u16, SPCMD_SPEC, u8, BRDV_A, 2, O>;
193impl<'a, const O: u8> BRDV_W<'a, O> {
194    #[doc = "Base bit rate"]
195    #[inline(always)]
196    pub fn _00(self) -> &'a mut W {
197        self.variant(BRDV_A::_00)
198    }
199    #[doc = "Base bit rate divided by 2"]
200    #[inline(always)]
201    pub fn _01(self) -> &'a mut W {
202        self.variant(BRDV_A::_01)
203    }
204    #[doc = "Base bit rate divided by 4"]
205    #[inline(always)]
206    pub fn _10(self) -> &'a mut W {
207        self.variant(BRDV_A::_10)
208    }
209    #[doc = "Base bit rate divided by 8"]
210    #[inline(always)]
211    pub fn _11(self) -> &'a mut W {
212        self.variant(BRDV_A::_11)
213    }
214}
215#[doc = "Field `SSLA` reader - SSL Signal Assertion Setting"]
216pub type SSLA_R = crate::FieldReader<u8, SSLA_A>;
217#[doc = "SSL Signal Assertion Setting\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219#[repr(u8)]
220pub enum SSLA_A {
221    #[doc = "0: SSL0"]
222    _000 = 0,
223    #[doc = "1: SSL1"]
224    _001 = 1,
225    #[doc = "2: SSL2"]
226    _010 = 2,
227    #[doc = "3: SSL3"]
228    _011 = 3,
229}
230impl From<SSLA_A> for u8 {
231    #[inline(always)]
232    fn from(variant: SSLA_A) -> Self {
233        variant as _
234    }
235}
236impl SSLA_R {
237    #[doc = "Get enumerated values variant"]
238    #[inline(always)]
239    pub fn variant(&self) -> Option<SSLA_A> {
240        match self.bits {
241            0 => Some(SSLA_A::_000),
242            1 => Some(SSLA_A::_001),
243            2 => Some(SSLA_A::_010),
244            3 => Some(SSLA_A::_011),
245            _ => None,
246        }
247    }
248    #[doc = "Checks if the value of the field is `_000`"]
249    #[inline(always)]
250    pub fn is_000(&self) -> bool {
251        *self == SSLA_A::_000
252    }
253    #[doc = "Checks if the value of the field is `_001`"]
254    #[inline(always)]
255    pub fn is_001(&self) -> bool {
256        *self == SSLA_A::_001
257    }
258    #[doc = "Checks if the value of the field is `_010`"]
259    #[inline(always)]
260    pub fn is_010(&self) -> bool {
261        *self == SSLA_A::_010
262    }
263    #[doc = "Checks if the value of the field is `_011`"]
264    #[inline(always)]
265    pub fn is_011(&self) -> bool {
266        *self == SSLA_A::_011
267    }
268}
269#[doc = "Field `SSLA` writer - SSL Signal Assertion Setting"]
270pub type SSLA_W<'a, const O: u8> = crate::FieldWriter<'a, u16, SPCMD_SPEC, u8, SSLA_A, 3, O>;
271impl<'a, const O: u8> SSLA_W<'a, O> {
272    #[doc = "SSL0"]
273    #[inline(always)]
274    pub fn _000(self) -> &'a mut W {
275        self.variant(SSLA_A::_000)
276    }
277    #[doc = "SSL1"]
278    #[inline(always)]
279    pub fn _001(self) -> &'a mut W {
280        self.variant(SSLA_A::_001)
281    }
282    #[doc = "SSL2"]
283    #[inline(always)]
284    pub fn _010(self) -> &'a mut W {
285        self.variant(SSLA_A::_010)
286    }
287    #[doc = "SSL3"]
288    #[inline(always)]
289    pub fn _011(self) -> &'a mut W {
290        self.variant(SSLA_A::_011)
291    }
292}
293#[doc = "Field `SSLKP` reader - SSL Signal Level Keeping"]
294pub type SSLKP_R = crate::BitReader<SSLKP_A>;
295#[doc = "SSL Signal Level Keeping\n\nValue on reset: 0"]
296#[derive(Clone, Copy, Debug, PartialEq, Eq)]
297pub enum SSLKP_A {
298    #[doc = "0: Negate all SSL signals on completion of transfer"]
299    _0 = 0,
300    #[doc = "1: Keep SSL signal level from the end of transfer until the beginning of the next access"]
301    _1 = 1,
302}
303impl From<SSLKP_A> for bool {
304    #[inline(always)]
305    fn from(variant: SSLKP_A) -> Self {
306        variant as u8 != 0
307    }
308}
309impl SSLKP_R {
310    #[doc = "Get enumerated values variant"]
311    #[inline(always)]
312    pub fn variant(&self) -> SSLKP_A {
313        match self.bits {
314            false => SSLKP_A::_0,
315            true => SSLKP_A::_1,
316        }
317    }
318    #[doc = "Checks if the value of the field is `_0`"]
319    #[inline(always)]
320    pub fn is_0(&self) -> bool {
321        *self == SSLKP_A::_0
322    }
323    #[doc = "Checks if the value of the field is `_1`"]
324    #[inline(always)]
325    pub fn is_1(&self) -> bool {
326        *self == SSLKP_A::_1
327    }
328}
329#[doc = "Field `SSLKP` writer - SSL Signal Level Keeping"]
330pub type SSLKP_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, SSLKP_A, O>;
331impl<'a, const O: u8> SSLKP_W<'a, O> {
332    #[doc = "Negate all SSL signals on completion of transfer"]
333    #[inline(always)]
334    pub fn _0(self) -> &'a mut W {
335        self.variant(SSLKP_A::_0)
336    }
337    #[doc = "Keep SSL signal level from the end of transfer until the beginning of the next access"]
338    #[inline(always)]
339    pub fn _1(self) -> &'a mut W {
340        self.variant(SSLKP_A::_1)
341    }
342}
343#[doc = "Field `SPB` reader - SPI Data Length Setting"]
344pub type SPB_R = crate::FieldReader<u8, SPB_A>;
345#[doc = "SPI Data Length Setting\n\nValue on reset: 7"]
346#[derive(Clone, Copy, Debug, PartialEq, Eq)]
347#[repr(u8)]
348pub enum SPB_A {
349    #[doc = "0: 20 bits"]
350    _0X0 = 0,
351    #[doc = "1: 24 bits"]
352    _0X1 = 1,
353    #[doc = "2: 32 bits"]
354    _0X2 = 2,
355    #[doc = "3: 32 bits"]
356    _0X3 = 3,
357    #[doc = "8: 9 bits"]
358    _0X8 = 8,
359    #[doc = "9: 10 bits"]
360    _0X9 = 9,
361    #[doc = "10: 11 bits"]
362    _0X_A = 10,
363    #[doc = "11: 12 bits"]
364    _0X_B = 11,
365    #[doc = "12: 13 bits"]
366    _0X_C = 12,
367    #[doc = "13: 14 bits"]
368    _0X_D = 13,
369    #[doc = "14: 15 bits"]
370    _0X_E = 14,
371    #[doc = "15: 16 bits"]
372    _0X_F = 15,
373}
374impl From<SPB_A> for u8 {
375    #[inline(always)]
376    fn from(variant: SPB_A) -> Self {
377        variant as _
378    }
379}
380impl SPB_R {
381    #[doc = "Get enumerated values variant"]
382    #[inline(always)]
383    pub fn variant(&self) -> Option<SPB_A> {
384        match self.bits {
385            0 => Some(SPB_A::_0X0),
386            1 => Some(SPB_A::_0X1),
387            2 => Some(SPB_A::_0X2),
388            3 => Some(SPB_A::_0X3),
389            8 => Some(SPB_A::_0X8),
390            9 => Some(SPB_A::_0X9),
391            10 => Some(SPB_A::_0X_A),
392            11 => Some(SPB_A::_0X_B),
393            12 => Some(SPB_A::_0X_C),
394            13 => Some(SPB_A::_0X_D),
395            14 => Some(SPB_A::_0X_E),
396            15 => Some(SPB_A::_0X_F),
397            _ => None,
398        }
399    }
400    #[doc = "Checks if the value of the field is `_0X0`"]
401    #[inline(always)]
402    pub fn is_0x0(&self) -> bool {
403        *self == SPB_A::_0X0
404    }
405    #[doc = "Checks if the value of the field is `_0X1`"]
406    #[inline(always)]
407    pub fn is_0x1(&self) -> bool {
408        *self == SPB_A::_0X1
409    }
410    #[doc = "Checks if the value of the field is `_0X2`"]
411    #[inline(always)]
412    pub fn is_0x2(&self) -> bool {
413        *self == SPB_A::_0X2
414    }
415    #[doc = "Checks if the value of the field is `_0X3`"]
416    #[inline(always)]
417    pub fn is_0x3(&self) -> bool {
418        *self == SPB_A::_0X3
419    }
420    #[doc = "Checks if the value of the field is `_0X8`"]
421    #[inline(always)]
422    pub fn is_0x8(&self) -> bool {
423        *self == SPB_A::_0X8
424    }
425    #[doc = "Checks if the value of the field is `_0X9`"]
426    #[inline(always)]
427    pub fn is_0x9(&self) -> bool {
428        *self == SPB_A::_0X9
429    }
430    #[doc = "Checks if the value of the field is `_0X_A`"]
431    #[inline(always)]
432    pub fn is_0x_a(&self) -> bool {
433        *self == SPB_A::_0X_A
434    }
435    #[doc = "Checks if the value of the field is `_0X_B`"]
436    #[inline(always)]
437    pub fn is_0x_b(&self) -> bool {
438        *self == SPB_A::_0X_B
439    }
440    #[doc = "Checks if the value of the field is `_0X_C`"]
441    #[inline(always)]
442    pub fn is_0x_c(&self) -> bool {
443        *self == SPB_A::_0X_C
444    }
445    #[doc = "Checks if the value of the field is `_0X_D`"]
446    #[inline(always)]
447    pub fn is_0x_d(&self) -> bool {
448        *self == SPB_A::_0X_D
449    }
450    #[doc = "Checks if the value of the field is `_0X_E`"]
451    #[inline(always)]
452    pub fn is_0x_e(&self) -> bool {
453        *self == SPB_A::_0X_E
454    }
455    #[doc = "Checks if the value of the field is `_0X_F`"]
456    #[inline(always)]
457    pub fn is_0x_f(&self) -> bool {
458        *self == SPB_A::_0X_F
459    }
460}
461#[doc = "Field `SPB` writer - SPI Data Length Setting"]
462pub type SPB_W<'a, const O: u8> = crate::FieldWriter<'a, u16, SPCMD_SPEC, u8, SPB_A, 4, O>;
463impl<'a, const O: u8> SPB_W<'a, O> {
464    #[doc = "20 bits"]
465    #[inline(always)]
466    pub fn _0x0(self) -> &'a mut W {
467        self.variant(SPB_A::_0X0)
468    }
469    #[doc = "24 bits"]
470    #[inline(always)]
471    pub fn _0x1(self) -> &'a mut W {
472        self.variant(SPB_A::_0X1)
473    }
474    #[doc = "32 bits"]
475    #[inline(always)]
476    pub fn _0x2(self) -> &'a mut W {
477        self.variant(SPB_A::_0X2)
478    }
479    #[doc = "32 bits"]
480    #[inline(always)]
481    pub fn _0x3(self) -> &'a mut W {
482        self.variant(SPB_A::_0X3)
483    }
484    #[doc = "9 bits"]
485    #[inline(always)]
486    pub fn _0x8(self) -> &'a mut W {
487        self.variant(SPB_A::_0X8)
488    }
489    #[doc = "10 bits"]
490    #[inline(always)]
491    pub fn _0x9(self) -> &'a mut W {
492        self.variant(SPB_A::_0X9)
493    }
494    #[doc = "11 bits"]
495    #[inline(always)]
496    pub fn _0x_a(self) -> &'a mut W {
497        self.variant(SPB_A::_0X_A)
498    }
499    #[doc = "12 bits"]
500    #[inline(always)]
501    pub fn _0x_b(self) -> &'a mut W {
502        self.variant(SPB_A::_0X_B)
503    }
504    #[doc = "13 bits"]
505    #[inline(always)]
506    pub fn _0x_c(self) -> &'a mut W {
507        self.variant(SPB_A::_0X_C)
508    }
509    #[doc = "14 bits"]
510    #[inline(always)]
511    pub fn _0x_d(self) -> &'a mut W {
512        self.variant(SPB_A::_0X_D)
513    }
514    #[doc = "15 bits"]
515    #[inline(always)]
516    pub fn _0x_e(self) -> &'a mut W {
517        self.variant(SPB_A::_0X_E)
518    }
519    #[doc = "16 bits"]
520    #[inline(always)]
521    pub fn _0x_f(self) -> &'a mut W {
522        self.variant(SPB_A::_0X_F)
523    }
524}
525#[doc = "Field `LSBF` reader - SPI LSB First"]
526pub type LSBF_R = crate::BitReader<LSBF_A>;
527#[doc = "SPI LSB First\n\nValue on reset: 0"]
528#[derive(Clone, Copy, Debug, PartialEq, Eq)]
529pub enum LSBF_A {
530    #[doc = "0: MSB-first"]
531    _0 = 0,
532    #[doc = "1: LSB-first"]
533    _1 = 1,
534}
535impl From<LSBF_A> for bool {
536    #[inline(always)]
537    fn from(variant: LSBF_A) -> Self {
538        variant as u8 != 0
539    }
540}
541impl LSBF_R {
542    #[doc = "Get enumerated values variant"]
543    #[inline(always)]
544    pub fn variant(&self) -> LSBF_A {
545        match self.bits {
546            false => LSBF_A::_0,
547            true => LSBF_A::_1,
548        }
549    }
550    #[doc = "Checks if the value of the field is `_0`"]
551    #[inline(always)]
552    pub fn is_0(&self) -> bool {
553        *self == LSBF_A::_0
554    }
555    #[doc = "Checks if the value of the field is `_1`"]
556    #[inline(always)]
557    pub fn is_1(&self) -> bool {
558        *self == LSBF_A::_1
559    }
560}
561#[doc = "Field `LSBF` writer - SPI LSB First"]
562pub type LSBF_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, LSBF_A, O>;
563impl<'a, const O: u8> LSBF_W<'a, O> {
564    #[doc = "MSB-first"]
565    #[inline(always)]
566    pub fn _0(self) -> &'a mut W {
567        self.variant(LSBF_A::_0)
568    }
569    #[doc = "LSB-first"]
570    #[inline(always)]
571    pub fn _1(self) -> &'a mut W {
572        self.variant(LSBF_A::_1)
573    }
574}
575#[doc = "Field `SPNDEN` reader - SPI Next-Access Delay Enable"]
576pub type SPNDEN_R = crate::BitReader<SPNDEN_A>;
577#[doc = "SPI Next-Access Delay Enable\n\nValue on reset: 0"]
578#[derive(Clone, Copy, Debug, PartialEq, Eq)]
579pub enum SPNDEN_A {
580    #[doc = "0: Select next-access delay of 1 RSPCK + 2 PCLKA"]
581    _0 = 0,
582    #[doc = "1: Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
583    _1 = 1,
584}
585impl From<SPNDEN_A> for bool {
586    #[inline(always)]
587    fn from(variant: SPNDEN_A) -> Self {
588        variant as u8 != 0
589    }
590}
591impl SPNDEN_R {
592    #[doc = "Get enumerated values variant"]
593    #[inline(always)]
594    pub fn variant(&self) -> SPNDEN_A {
595        match self.bits {
596            false => SPNDEN_A::_0,
597            true => SPNDEN_A::_1,
598        }
599    }
600    #[doc = "Checks if the value of the field is `_0`"]
601    #[inline(always)]
602    pub fn is_0(&self) -> bool {
603        *self == SPNDEN_A::_0
604    }
605    #[doc = "Checks if the value of the field is `_1`"]
606    #[inline(always)]
607    pub fn is_1(&self) -> bool {
608        *self == SPNDEN_A::_1
609    }
610}
611#[doc = "Field `SPNDEN` writer - SPI Next-Access Delay Enable"]
612pub type SPNDEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, SPNDEN_A, O>;
613impl<'a, const O: u8> SPNDEN_W<'a, O> {
614    #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKA"]
615    #[inline(always)]
616    pub fn _0(self) -> &'a mut W {
617        self.variant(SPNDEN_A::_0)
618    }
619    #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
620    #[inline(always)]
621    pub fn _1(self) -> &'a mut W {
622        self.variant(SPNDEN_A::_1)
623    }
624}
625#[doc = "Field `SLNDEN` reader - SSL Negation Delay Setting Enable"]
626pub type SLNDEN_R = crate::BitReader<SLNDEN_A>;
627#[doc = "SSL Negation Delay Setting Enable\n\nValue on reset: 0"]
628#[derive(Clone, Copy, Debug, PartialEq, Eq)]
629pub enum SLNDEN_A {
630    #[doc = "0: Select SSL negation delay of 1 RSPCK"]
631    _0 = 0,
632    #[doc = "1: Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
633    _1 = 1,
634}
635impl From<SLNDEN_A> for bool {
636    #[inline(always)]
637    fn from(variant: SLNDEN_A) -> Self {
638        variant as u8 != 0
639    }
640}
641impl SLNDEN_R {
642    #[doc = "Get enumerated values variant"]
643    #[inline(always)]
644    pub fn variant(&self) -> SLNDEN_A {
645        match self.bits {
646            false => SLNDEN_A::_0,
647            true => SLNDEN_A::_1,
648        }
649    }
650    #[doc = "Checks if the value of the field is `_0`"]
651    #[inline(always)]
652    pub fn is_0(&self) -> bool {
653        *self == SLNDEN_A::_0
654    }
655    #[doc = "Checks if the value of the field is `_1`"]
656    #[inline(always)]
657    pub fn is_1(&self) -> bool {
658        *self == SLNDEN_A::_1
659    }
660}
661#[doc = "Field `SLNDEN` writer - SSL Negation Delay Setting Enable"]
662pub type SLNDEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, SLNDEN_A, O>;
663impl<'a, const O: u8> SLNDEN_W<'a, O> {
664    #[doc = "Select SSL negation delay of 1 RSPCK"]
665    #[inline(always)]
666    pub fn _0(self) -> &'a mut W {
667        self.variant(SLNDEN_A::_0)
668    }
669    #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
670    #[inline(always)]
671    pub fn _1(self) -> &'a mut W {
672        self.variant(SLNDEN_A::_1)
673    }
674}
675#[doc = "Field `SCKDEN` reader - RSPCK Delay Setting Enable"]
676pub type SCKDEN_R = crate::BitReader<SCKDEN_A>;
677#[doc = "RSPCK Delay Setting Enable\n\nValue on reset: 0"]
678#[derive(Clone, Copy, Debug, PartialEq, Eq)]
679pub enum SCKDEN_A {
680    #[doc = "0: Select RSPCK delay of 1 RSPCK"]
681    _0 = 0,
682    #[doc = "1: Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
683    _1 = 1,
684}
685impl From<SCKDEN_A> for bool {
686    #[inline(always)]
687    fn from(variant: SCKDEN_A) -> Self {
688        variant as u8 != 0
689    }
690}
691impl SCKDEN_R {
692    #[doc = "Get enumerated values variant"]
693    #[inline(always)]
694    pub fn variant(&self) -> SCKDEN_A {
695        match self.bits {
696            false => SCKDEN_A::_0,
697            true => SCKDEN_A::_1,
698        }
699    }
700    #[doc = "Checks if the value of the field is `_0`"]
701    #[inline(always)]
702    pub fn is_0(&self) -> bool {
703        *self == SCKDEN_A::_0
704    }
705    #[doc = "Checks if the value of the field is `_1`"]
706    #[inline(always)]
707    pub fn is_1(&self) -> bool {
708        *self == SCKDEN_A::_1
709    }
710}
711#[doc = "Field `SCKDEN` writer - RSPCK Delay Setting Enable"]
712pub type SCKDEN_W<'a, const O: u8> = crate::BitWriter<'a, u16, SPCMD_SPEC, SCKDEN_A, O>;
713impl<'a, const O: u8> SCKDEN_W<'a, O> {
714    #[doc = "Select RSPCK delay of 1 RSPCK"]
715    #[inline(always)]
716    pub fn _0(self) -> &'a mut W {
717        self.variant(SCKDEN_A::_0)
718    }
719    #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
720    #[inline(always)]
721    pub fn _1(self) -> &'a mut W {
722        self.variant(SCKDEN_A::_1)
723    }
724}
725impl R {
726    #[doc = "Bit 0 - RSPCK Phase Setting"]
727    #[inline(always)]
728    pub fn cpha(&self) -> CPHA_R {
729        CPHA_R::new((self.bits & 1) != 0)
730    }
731    #[doc = "Bit 1 - RSPCK Polarity Setting"]
732    #[inline(always)]
733    pub fn cpol(&self) -> CPOL_R {
734        CPOL_R::new(((self.bits >> 1) & 1) != 0)
735    }
736    #[doc = "Bits 2:3 - Bit Rate Division Setting"]
737    #[inline(always)]
738    pub fn brdv(&self) -> BRDV_R {
739        BRDV_R::new(((self.bits >> 2) & 3) as u8)
740    }
741    #[doc = "Bits 4:6 - SSL Signal Assertion Setting"]
742    #[inline(always)]
743    pub fn ssla(&self) -> SSLA_R {
744        SSLA_R::new(((self.bits >> 4) & 7) as u8)
745    }
746    #[doc = "Bit 7 - SSL Signal Level Keeping"]
747    #[inline(always)]
748    pub fn sslkp(&self) -> SSLKP_R {
749        SSLKP_R::new(((self.bits >> 7) & 1) != 0)
750    }
751    #[doc = "Bits 8:11 - SPI Data Length Setting"]
752    #[inline(always)]
753    pub fn spb(&self) -> SPB_R {
754        SPB_R::new(((self.bits >> 8) & 0x0f) as u8)
755    }
756    #[doc = "Bit 12 - SPI LSB First"]
757    #[inline(always)]
758    pub fn lsbf(&self) -> LSBF_R {
759        LSBF_R::new(((self.bits >> 12) & 1) != 0)
760    }
761    #[doc = "Bit 13 - SPI Next-Access Delay Enable"]
762    #[inline(always)]
763    pub fn spnden(&self) -> SPNDEN_R {
764        SPNDEN_R::new(((self.bits >> 13) & 1) != 0)
765    }
766    #[doc = "Bit 14 - SSL Negation Delay Setting Enable"]
767    #[inline(always)]
768    pub fn slnden(&self) -> SLNDEN_R {
769        SLNDEN_R::new(((self.bits >> 14) & 1) != 0)
770    }
771    #[doc = "Bit 15 - RSPCK Delay Setting Enable"]
772    #[inline(always)]
773    pub fn sckden(&self) -> SCKDEN_R {
774        SCKDEN_R::new(((self.bits >> 15) & 1) != 0)
775    }
776}
777impl W {
778    #[doc = "Bit 0 - RSPCK Phase Setting"]
779    #[inline(always)]
780    #[must_use]
781    pub fn cpha(&mut self) -> CPHA_W<0> {
782        CPHA_W::new(self)
783    }
784    #[doc = "Bit 1 - RSPCK Polarity Setting"]
785    #[inline(always)]
786    #[must_use]
787    pub fn cpol(&mut self) -> CPOL_W<1> {
788        CPOL_W::new(self)
789    }
790    #[doc = "Bits 2:3 - Bit Rate Division Setting"]
791    #[inline(always)]
792    #[must_use]
793    pub fn brdv(&mut self) -> BRDV_W<2> {
794        BRDV_W::new(self)
795    }
796    #[doc = "Bits 4:6 - SSL Signal Assertion Setting"]
797    #[inline(always)]
798    #[must_use]
799    pub fn ssla(&mut self) -> SSLA_W<4> {
800        SSLA_W::new(self)
801    }
802    #[doc = "Bit 7 - SSL Signal Level Keeping"]
803    #[inline(always)]
804    #[must_use]
805    pub fn sslkp(&mut self) -> SSLKP_W<7> {
806        SSLKP_W::new(self)
807    }
808    #[doc = "Bits 8:11 - SPI Data Length Setting"]
809    #[inline(always)]
810    #[must_use]
811    pub fn spb(&mut self) -> SPB_W<8> {
812        SPB_W::new(self)
813    }
814    #[doc = "Bit 12 - SPI LSB First"]
815    #[inline(always)]
816    #[must_use]
817    pub fn lsbf(&mut self) -> LSBF_W<12> {
818        LSBF_W::new(self)
819    }
820    #[doc = "Bit 13 - SPI Next-Access Delay Enable"]
821    #[inline(always)]
822    #[must_use]
823    pub fn spnden(&mut self) -> SPNDEN_W<13> {
824        SPNDEN_W::new(self)
825    }
826    #[doc = "Bit 14 - SSL Negation Delay Setting Enable"]
827    #[inline(always)]
828    #[must_use]
829    pub fn slnden(&mut self) -> SLNDEN_W<14> {
830        SLNDEN_W::new(self)
831    }
832    #[doc = "Bit 15 - RSPCK Delay Setting Enable"]
833    #[inline(always)]
834    #[must_use]
835    pub fn sckden(&mut self) -> SCKDEN_W<15> {
836        SCKDEN_W::new(self)
837    }
838    #[doc = "Writes raw bits to the register."]
839    #[inline(always)]
840    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
841        self.0.bits(bits);
842        self
843    }
844}
845#[doc = "SPI Command Register %s\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spcmd](index.html) module"]
846pub struct SPCMD_SPEC;
847impl crate::RegisterSpec for SPCMD_SPEC {
848    type Ux = u16;
849}
850#[doc = "`read()` method returns [spcmd::R](R) reader structure"]
851impl crate::Readable for SPCMD_SPEC {
852    type Reader = R;
853}
854#[doc = "`write(|w| ..)` method takes [spcmd::W](W) writer structure"]
855impl crate::Writable for SPCMD_SPEC {
856    type Writer = W;
857    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
858    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
859}
860#[doc = "`reset()` method sets SPCMD%s to value 0x070d"]
861impl crate::Resettable for SPCMD_SPEC {
862    const RESET_VALUE: Self::Ux = 0x070d;
863}
ra4m3/spi0/spcmd.rs

ra4m3/spi0/
spcmd.rs
