ra4m3/pfs/
p00pfs.rs

1#[doc = "Register `P00%sPFS` reader"]
2pub struct R(crate::R<P00PFS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<P00PFS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<P00PFS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<P00PFS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `P00%sPFS` writer"]
17pub struct W(crate::W<P00PFS_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<P00PFS_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<P00PFS_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<P00PFS_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PODR` reader - Port Output Data"]
38pub type PODR_R = crate::BitReader<PODR_A>;
39#[doc = "Port Output Data\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum PODR_A {
42    #[doc = "0: Output low"]
43    _0 = 0,
44    #[doc = "1: Output high"]
45    _1 = 1,
46}
47impl From<PODR_A> for bool {
48    #[inline(always)]
49    fn from(variant: PODR_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl PODR_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> PODR_A {
57        match self.bits {
58            false => PODR_A::_0,
59            true => PODR_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == PODR_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == PODR_A::_1
71    }
72}
73#[doc = "Field `PODR` writer - Port Output Data"]
74pub type PODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, PODR_A, O>;
75impl<'a, const O: u8> PODR_W<'a, O> {
76    #[doc = "Output low"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(PODR_A::_0)
80    }
81    #[doc = "Output high"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(PODR_A::_1)
85    }
86}
87#[doc = "Field `PIDR` reader - Port State"]
88pub type PIDR_R = crate::BitReader<PIDR_A>;
89#[doc = "Port State\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum PIDR_A {
92    #[doc = "0: Low level"]
93    _0 = 0,
94    #[doc = "1: High level"]
95    _1 = 1,
96}
97impl From<PIDR_A> for bool {
98    #[inline(always)]
99    fn from(variant: PIDR_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl PIDR_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> PIDR_A {
107        match self.bits {
108            false => PIDR_A::_0,
109            true => PIDR_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == PIDR_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == PIDR_A::_1
121    }
122}
123#[doc = "Field `PDR` reader - Port Direction"]
124pub type PDR_R = crate::BitReader<PDR_A>;
125#[doc = "Port Direction\n\nValue on reset: 0"]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum PDR_A {
128    #[doc = "0: Input (functions as an input pin)"]
129    _0 = 0,
130    #[doc = "1: Output (functions as an output pin)"]
131    _1 = 1,
132}
133impl From<PDR_A> for bool {
134    #[inline(always)]
135    fn from(variant: PDR_A) -> Self {
136        variant as u8 != 0
137    }
138}
139impl PDR_R {
140    #[doc = "Get enumerated values variant"]
141    #[inline(always)]
142    pub fn variant(&self) -> PDR_A {
143        match self.bits {
144            false => PDR_A::_0,
145            true => PDR_A::_1,
146        }
147    }
148    #[doc = "Checks if the value of the field is `_0`"]
149    #[inline(always)]
150    pub fn is_0(&self) -> bool {
151        *self == PDR_A::_0
152    }
153    #[doc = "Checks if the value of the field is `_1`"]
154    #[inline(always)]
155    pub fn is_1(&self) -> bool {
156        *self == PDR_A::_1
157    }
158}
159#[doc = "Field `PDR` writer - Port Direction"]
160pub type PDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, PDR_A, O>;
161impl<'a, const O: u8> PDR_W<'a, O> {
162    #[doc = "Input (functions as an input pin)"]
163    #[inline(always)]
164    pub fn _0(self) -> &'a mut W {
165        self.variant(PDR_A::_0)
166    }
167    #[doc = "Output (functions as an output pin)"]
168    #[inline(always)]
169    pub fn _1(self) -> &'a mut W {
170        self.variant(PDR_A::_1)
171    }
172}
173#[doc = "Field `PCR` reader - Pull-up Control"]
174pub type PCR_R = crate::BitReader<PCR_A>;
175#[doc = "Pull-up Control\n\nValue on reset: 0"]
176#[derive(Clone, Copy, Debug, PartialEq, Eq)]
177pub enum PCR_A {
178    #[doc = "0: Disable input pull-up"]
179    _0 = 0,
180    #[doc = "1: Enable input pull-up"]
181    _1 = 1,
182}
183impl From<PCR_A> for bool {
184    #[inline(always)]
185    fn from(variant: PCR_A) -> Self {
186        variant as u8 != 0
187    }
188}
189impl PCR_R {
190    #[doc = "Get enumerated values variant"]
191    #[inline(always)]
192    pub fn variant(&self) -> PCR_A {
193        match self.bits {
194            false => PCR_A::_0,
195            true => PCR_A::_1,
196        }
197    }
198    #[doc = "Checks if the value of the field is `_0`"]
199    #[inline(always)]
200    pub fn is_0(&self) -> bool {
201        *self == PCR_A::_0
202    }
203    #[doc = "Checks if the value of the field is `_1`"]
204    #[inline(always)]
205    pub fn is_1(&self) -> bool {
206        *self == PCR_A::_1
207    }
208}
209#[doc = "Field `PCR` writer - Pull-up Control"]
210pub type PCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, PCR_A, O>;
211impl<'a, const O: u8> PCR_W<'a, O> {
212    #[doc = "Disable input pull-up"]
213    #[inline(always)]
214    pub fn _0(self) -> &'a mut W {
215        self.variant(PCR_A::_0)
216    }
217    #[doc = "Enable input pull-up"]
218    #[inline(always)]
219    pub fn _1(self) -> &'a mut W {
220        self.variant(PCR_A::_1)
221    }
222}
223#[doc = "Field `NCODR` reader - N-Channel Open-Drain Control"]
224pub type NCODR_R = crate::BitReader<NCODR_A>;
225#[doc = "N-Channel Open-Drain Control\n\nValue on reset: 0"]
226#[derive(Clone, Copy, Debug, PartialEq, Eq)]
227pub enum NCODR_A {
228    #[doc = "0: Output CMOS"]
229    _0 = 0,
230    #[doc = "1: Output NMOS open-drain"]
231    _1 = 1,
232}
233impl From<NCODR_A> for bool {
234    #[inline(always)]
235    fn from(variant: NCODR_A) -> Self {
236        variant as u8 != 0
237    }
238}
239impl NCODR_R {
240    #[doc = "Get enumerated values variant"]
241    #[inline(always)]
242    pub fn variant(&self) -> NCODR_A {
243        match self.bits {
244            false => NCODR_A::_0,
245            true => NCODR_A::_1,
246        }
247    }
248    #[doc = "Checks if the value of the field is `_0`"]
249    #[inline(always)]
250    pub fn is_0(&self) -> bool {
251        *self == NCODR_A::_0
252    }
253    #[doc = "Checks if the value of the field is `_1`"]
254    #[inline(always)]
255    pub fn is_1(&self) -> bool {
256        *self == NCODR_A::_1
257    }
258}
259#[doc = "Field `NCODR` writer - N-Channel Open-Drain Control"]
260pub type NCODR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, NCODR_A, O>;
261impl<'a, const O: u8> NCODR_W<'a, O> {
262    #[doc = "Output CMOS"]
263    #[inline(always)]
264    pub fn _0(self) -> &'a mut W {
265        self.variant(NCODR_A::_0)
266    }
267    #[doc = "Output NMOS open-drain"]
268    #[inline(always)]
269    pub fn _1(self) -> &'a mut W {
270        self.variant(NCODR_A::_1)
271    }
272}
273#[doc = "Field `ISEL` reader - IRQ Input Enable"]
274pub type ISEL_R = crate::BitReader<ISEL_A>;
275#[doc = "IRQ Input Enable\n\nValue on reset: 0"]
276#[derive(Clone, Copy, Debug, PartialEq, Eq)]
277pub enum ISEL_A {
278    #[doc = "0: Do not use as IRQn input pin"]
279    _0 = 0,
280    #[doc = "1: Use as IRQn input pin"]
281    _1 = 1,
282}
283impl From<ISEL_A> for bool {
284    #[inline(always)]
285    fn from(variant: ISEL_A) -> Self {
286        variant as u8 != 0
287    }
288}
289impl ISEL_R {
290    #[doc = "Get enumerated values variant"]
291    #[inline(always)]
292    pub fn variant(&self) -> ISEL_A {
293        match self.bits {
294            false => ISEL_A::_0,
295            true => ISEL_A::_1,
296        }
297    }
298    #[doc = "Checks if the value of the field is `_0`"]
299    #[inline(always)]
300    pub fn is_0(&self) -> bool {
301        *self == ISEL_A::_0
302    }
303    #[doc = "Checks if the value of the field is `_1`"]
304    #[inline(always)]
305    pub fn is_1(&self) -> bool {
306        *self == ISEL_A::_1
307    }
308}
309#[doc = "Field `ISEL` writer - IRQ Input Enable"]
310pub type ISEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, ISEL_A, O>;
311impl<'a, const O: u8> ISEL_W<'a, O> {
312    #[doc = "Do not use as IRQn input pin"]
313    #[inline(always)]
314    pub fn _0(self) -> &'a mut W {
315        self.variant(ISEL_A::_0)
316    }
317    #[doc = "Use as IRQn input pin"]
318    #[inline(always)]
319    pub fn _1(self) -> &'a mut W {
320        self.variant(ISEL_A::_1)
321    }
322}
323#[doc = "Field `ASEL` reader - Analog Input Enable"]
324pub type ASEL_R = crate::BitReader<ASEL_A>;
325#[doc = "Analog Input Enable\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum ASEL_A {
328    #[doc = "0: Do not use as analog pin"]
329    _0 = 0,
330    #[doc = "1: Use as analog pin"]
331    _1 = 1,
332}
333impl From<ASEL_A> for bool {
334    #[inline(always)]
335    fn from(variant: ASEL_A) -> Self {
336        variant as u8 != 0
337    }
338}
339impl ASEL_R {
340    #[doc = "Get enumerated values variant"]
341    #[inline(always)]
342    pub fn variant(&self) -> ASEL_A {
343        match self.bits {
344            false => ASEL_A::_0,
345            true => ASEL_A::_1,
346        }
347    }
348    #[doc = "Checks if the value of the field is `_0`"]
349    #[inline(always)]
350    pub fn is_0(&self) -> bool {
351        *self == ASEL_A::_0
352    }
353    #[doc = "Checks if the value of the field is `_1`"]
354    #[inline(always)]
355    pub fn is_1(&self) -> bool {
356        *self == ASEL_A::_1
357    }
358}
359#[doc = "Field `ASEL` writer - Analog Input Enable"]
360pub type ASEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, ASEL_A, O>;
361impl<'a, const O: u8> ASEL_W<'a, O> {
362    #[doc = "Do not use as analog pin"]
363    #[inline(always)]
364    pub fn _0(self) -> &'a mut W {
365        self.variant(ASEL_A::_0)
366    }
367    #[doc = "Use as analog pin"]
368    #[inline(always)]
369    pub fn _1(self) -> &'a mut W {
370        self.variant(ASEL_A::_1)
371    }
372}
373#[doc = "Field `PMR` reader - Port Mode Control"]
374pub type PMR_R = crate::BitReader<PMR_A>;
375#[doc = "Port Mode Control\n\nValue on reset: 0"]
376#[derive(Clone, Copy, Debug, PartialEq, Eq)]
377pub enum PMR_A {
378    #[doc = "0: Use as general I/O pin"]
379    _0 = 0,
380    #[doc = "1: Use as I/O port for peripheral functions"]
381    _1 = 1,
382}
383impl From<PMR_A> for bool {
384    #[inline(always)]
385    fn from(variant: PMR_A) -> Self {
386        variant as u8 != 0
387    }
388}
389impl PMR_R {
390    #[doc = "Get enumerated values variant"]
391    #[inline(always)]
392    pub fn variant(&self) -> PMR_A {
393        match self.bits {
394            false => PMR_A::_0,
395            true => PMR_A::_1,
396        }
397    }
398    #[doc = "Checks if the value of the field is `_0`"]
399    #[inline(always)]
400    pub fn is_0(&self) -> bool {
401        *self == PMR_A::_0
402    }
403    #[doc = "Checks if the value of the field is `_1`"]
404    #[inline(always)]
405    pub fn is_1(&self) -> bool {
406        *self == PMR_A::_1
407    }
408}
409#[doc = "Field `PMR` writer - Port Mode Control"]
410pub type PMR_W<'a, const O: u8> = crate::BitWriter<'a, u32, P00PFS_SPEC, PMR_A, O>;
411impl<'a, const O: u8> PMR_W<'a, O> {
412    #[doc = "Use as general I/O pin"]
413    #[inline(always)]
414    pub fn _0(self) -> &'a mut W {
415        self.variant(PMR_A::_0)
416    }
417    #[doc = "Use as I/O port for peripheral functions"]
418    #[inline(always)]
419    pub fn _1(self) -> &'a mut W {
420        self.variant(PMR_A::_1)
421    }
422}
423#[doc = "Field `PSEL` reader - Peripheral Select"]
424pub type PSEL_R = crate::FieldReader<u8, u8>;
425#[doc = "Field `PSEL` writer - Peripheral Select"]
426pub type PSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, P00PFS_SPEC, u8, u8, 5, O>;
427impl R {
428    #[doc = "Bit 0 - Port Output Data"]
429    #[inline(always)]
430    pub fn podr(&self) -> PODR_R {
431        PODR_R::new((self.bits & 1) != 0)
432    }
433    #[doc = "Bit 1 - Port State"]
434    #[inline(always)]
435    pub fn pidr(&self) -> PIDR_R {
436        PIDR_R::new(((self.bits >> 1) & 1) != 0)
437    }
438    #[doc = "Bit 2 - Port Direction"]
439    #[inline(always)]
440    pub fn pdr(&self) -> PDR_R {
441        PDR_R::new(((self.bits >> 2) & 1) != 0)
442    }
443    #[doc = "Bit 4 - Pull-up Control"]
444    #[inline(always)]
445    pub fn pcr(&self) -> PCR_R {
446        PCR_R::new(((self.bits >> 4) & 1) != 0)
447    }
448    #[doc = "Bit 6 - N-Channel Open-Drain Control"]
449    #[inline(always)]
450    pub fn ncodr(&self) -> NCODR_R {
451        NCODR_R::new(((self.bits >> 6) & 1) != 0)
452    }
453    #[doc = "Bit 14 - IRQ Input Enable"]
454    #[inline(always)]
455    pub fn isel(&self) -> ISEL_R {
456        ISEL_R::new(((self.bits >> 14) & 1) != 0)
457    }
458    #[doc = "Bit 15 - Analog Input Enable"]
459    #[inline(always)]
460    pub fn asel(&self) -> ASEL_R {
461        ASEL_R::new(((self.bits >> 15) & 1) != 0)
462    }
463    #[doc = "Bit 16 - Port Mode Control"]
464    #[inline(always)]
465    pub fn pmr(&self) -> PMR_R {
466        PMR_R::new(((self.bits >> 16) & 1) != 0)
467    }
468    #[doc = "Bits 24:28 - Peripheral Select"]
469    #[inline(always)]
470    pub fn psel(&self) -> PSEL_R {
471        PSEL_R::new(((self.bits >> 24) & 0x1f) as u8)
472    }
473}
474impl W {
475    #[doc = "Bit 0 - Port Output Data"]
476    #[inline(always)]
477    #[must_use]
478    pub fn podr(&mut self) -> PODR_W<0> {
479        PODR_W::new(self)
480    }
481    #[doc = "Bit 2 - Port Direction"]
482    #[inline(always)]
483    #[must_use]
484    pub fn pdr(&mut self) -> PDR_W<2> {
485        PDR_W::new(self)
486    }
487    #[doc = "Bit 4 - Pull-up Control"]
488    #[inline(always)]
489    #[must_use]
490    pub fn pcr(&mut self) -> PCR_W<4> {
491        PCR_W::new(self)
492    }
493    #[doc = "Bit 6 - N-Channel Open-Drain Control"]
494    #[inline(always)]
495    #[must_use]
496    pub fn ncodr(&mut self) -> NCODR_W<6> {
497        NCODR_W::new(self)
498    }
499    #[doc = "Bit 14 - IRQ Input Enable"]
500    #[inline(always)]
501    #[must_use]
502    pub fn isel(&mut self) -> ISEL_W<14> {
503        ISEL_W::new(self)
504    }
505    #[doc = "Bit 15 - Analog Input Enable"]
506    #[inline(always)]
507    #[must_use]
508    pub fn asel(&mut self) -> ASEL_W<15> {
509        ASEL_W::new(self)
510    }
511    #[doc = "Bit 16 - Port Mode Control"]
512    #[inline(always)]
513    #[must_use]
514    pub fn pmr(&mut self) -> PMR_W<16> {
515        PMR_W::new(self)
516    }
517    #[doc = "Bits 24:28 - Peripheral Select"]
518    #[inline(always)]
519    #[must_use]
520    pub fn psel(&mut self) -> PSEL_W<24> {
521        PSEL_W::new(self)
522    }
523    #[doc = "Writes raw bits to the register."]
524    #[inline(always)]
525    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
526        self.0.bits(bits);
527        self
528    }
529}
530#[doc = "Port 00%s Pin Function Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [p00pfs](index.html) module"]
531pub struct P00PFS_SPEC;
532impl crate::RegisterSpec for P00PFS_SPEC {
533    type Ux = u32;
534}
535#[doc = "`read()` method returns [p00pfs::R](R) reader structure"]
536impl crate::Readable for P00PFS_SPEC {
537    type Reader = R;
538}
539#[doc = "`write(|w| ..)` method takes [p00pfs::W](W) writer structure"]
540impl crate::Writable for P00PFS_SPEC {
541    type Writer = W;
542    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
543    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
544}
545#[doc = "`reset()` method sets P00%sPFS to value 0"]
546impl crate::Resettable for P00PFS_SPEC {
547    const RESET_VALUE: Self::Ux = 0;
548}
ra4m3/pfs/p00pfs.rs

ra4m3/pfs/
p00pfs.rs
