1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Standby Control Register"]
38 #[inline(always)]
39 pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(12usize),
43 )
44 }
45 }
46
47 #[doc = "System Clock Division Control Register"]
48 #[inline(always)]
49 pub const fn sckdivcr(
50 &self,
51 ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52 unsafe {
53 crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54 self._svd2pac_as_ptr().add(32usize),
55 )
56 }
57 }
58
59 #[doc = "System Clock Source Control Register"]
60 #[inline(always)]
61 pub const fn sckscr(
62 &self,
63 ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
64 unsafe {
65 crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
66 self._svd2pac_as_ptr().add(38usize),
67 )
68 }
69 }
70
71 #[doc = "PLL Clock Control Register"]
72 #[inline(always)]
73 pub const fn pllccr(
74 &self,
75 ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
76 unsafe {
77 crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
78 self._svd2pac_as_ptr().add(40usize),
79 )
80 }
81 }
82
83 #[doc = "PLL Control Register"]
84 #[inline(always)]
85 pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
86 unsafe {
87 crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
88 self._svd2pac_as_ptr().add(42usize),
89 )
90 }
91 }
92
93 #[doc = "Main Clock Oscillator Control Register"]
94 #[inline(always)]
95 pub const fn mosccr(
96 &self,
97 ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
98 unsafe {
99 crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
100 self._svd2pac_as_ptr().add(50usize),
101 )
102 }
103 }
104
105 #[doc = "High-Speed On-Chip Oscillator Control Register"]
106 #[inline(always)]
107 pub const fn hococr(
108 &self,
109 ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
110 unsafe {
111 crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
112 self._svd2pac_as_ptr().add(54usize),
113 )
114 }
115 }
116
117 #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
118 #[inline(always)]
119 pub const fn mococr(
120 &self,
121 ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
122 unsafe {
123 crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
124 self._svd2pac_as_ptr().add(56usize),
125 )
126 }
127 }
128
129 #[doc = "FLL Control Register1"]
130 #[inline(always)]
131 pub const fn fllcr1(
132 &self,
133 ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
134 unsafe {
135 crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
136 self._svd2pac_as_ptr().add(57usize),
137 )
138 }
139 }
140
141 #[doc = "FLL Control Register2"]
142 #[inline(always)]
143 pub const fn fllcr2(
144 &self,
145 ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
146 unsafe {
147 crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
148 self._svd2pac_as_ptr().add(58usize),
149 )
150 }
151 }
152
153 #[doc = "Oscillation Stabilization Flag Register"]
154 #[inline(always)]
155 pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
156 unsafe {
157 crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
158 self._svd2pac_as_ptr().add(60usize),
159 )
160 }
161 }
162
163 #[doc = "Clock Out Control Register"]
164 #[inline(always)]
165 pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(62usize),
169 )
170 }
171 }
172
173 #[doc = "Trace Clock Control Register"]
174 #[inline(always)]
175 pub const fn trckcr(
176 &self,
177 ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
178 unsafe {
179 crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
180 self._svd2pac_as_ptr().add(63usize),
181 )
182 }
183 }
184
185 #[doc = "Oscillation Stop Detection Control Register"]
186 #[inline(always)]
187 pub const fn ostdcr(
188 &self,
189 ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
190 unsafe {
191 crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
192 self._svd2pac_as_ptr().add(64usize),
193 )
194 }
195 }
196
197 #[doc = "Oscillation Stop Detection Status Register"]
198 #[inline(always)]
199 pub const fn ostdsr(
200 &self,
201 ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
202 unsafe {
203 crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
204 self._svd2pac_as_ptr().add(65usize),
205 )
206 }
207 }
208
209 #[doc = "PLL2 Clock Control Register"]
210 #[inline(always)]
211 pub const fn pll2ccr(
212 &self,
213 ) -> &'static crate::common::Reg<self::Pll2Ccr_SPEC, crate::common::RW> {
214 unsafe {
215 crate::common::Reg::<self::Pll2Ccr_SPEC, crate::common::RW>::from_ptr(
216 self._svd2pac_as_ptr().add(72usize),
217 )
218 }
219 }
220
221 #[doc = "PLL2 Control Register"]
222 #[inline(always)]
223 pub const fn pll2cr(
224 &self,
225 ) -> &'static crate::common::Reg<self::Pll2Cr_SPEC, crate::common::RW> {
226 unsafe {
227 crate::common::Reg::<self::Pll2Cr_SPEC, crate::common::RW>::from_ptr(
228 self._svd2pac_as_ptr().add(74usize),
229 )
230 }
231 }
232
233 #[doc = "MOCO User Trimming Control Register"]
234 #[inline(always)]
235 pub const fn mocoutcr(
236 &self,
237 ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
238 unsafe {
239 crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
240 self._svd2pac_as_ptr().add(97usize),
241 )
242 }
243 }
244
245 #[doc = "HOCO User Trimming Control Register"]
246 #[inline(always)]
247 pub const fn hocoutcr(
248 &self,
249 ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
250 unsafe {
251 crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
252 self._svd2pac_as_ptr().add(98usize),
253 )
254 }
255 }
256
257 #[doc = "USB Clock Division Control Register"]
258 #[inline(always)]
259 pub const fn usbckdivcr(
260 &self,
261 ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
262 unsafe {
263 crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
264 self._svd2pac_as_ptr().add(108usize),
265 )
266 }
267 }
268
269 #[doc = "USB Clock Control Register"]
270 #[inline(always)]
271 pub const fn usbckcr(
272 &self,
273 ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
274 unsafe {
275 crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
276 self._svd2pac_as_ptr().add(116usize),
277 )
278 }
279 }
280
281 #[doc = "Snooze Request Control Register 1"]
282 #[inline(always)]
283 pub const fn snzreqcr1(
284 &self,
285 ) -> &'static crate::common::Reg<self::Snzreqcr1_SPEC, crate::common::RW> {
286 unsafe {
287 crate::common::Reg::<self::Snzreqcr1_SPEC, crate::common::RW>::from_ptr(
288 self._svd2pac_as_ptr().add(136usize),
289 )
290 }
291 }
292
293 #[doc = "Snooze Control Register"]
294 #[inline(always)]
295 pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
296 unsafe {
297 crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
298 self._svd2pac_as_ptr().add(146usize),
299 )
300 }
301 }
302
303 #[doc = "Snooze End Control Register 0"]
304 #[inline(always)]
305 pub const fn snzedcr0(
306 &self,
307 ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
308 unsafe {
309 crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
310 self._svd2pac_as_ptr().add(148usize),
311 )
312 }
313 }
314
315 #[doc = "Snooze End Control Register 1"]
316 #[inline(always)]
317 pub const fn snzedcr1(
318 &self,
319 ) -> &'static crate::common::Reg<self::Snzedcr1_SPEC, crate::common::RW> {
320 unsafe {
321 crate::common::Reg::<self::Snzedcr1_SPEC, crate::common::RW>::from_ptr(
322 self._svd2pac_as_ptr().add(149usize),
323 )
324 }
325 }
326
327 #[doc = "Snooze Request Control Register 0"]
328 #[inline(always)]
329 pub const fn snzreqcr0(
330 &self,
331 ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
332 unsafe {
333 crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
334 self._svd2pac_as_ptr().add(152usize),
335 )
336 }
337 }
338
339 #[doc = "Operating Power Control Register"]
340 #[inline(always)]
341 pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
342 unsafe {
343 crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
344 self._svd2pac_as_ptr().add(160usize),
345 )
346 }
347 }
348
349 #[doc = "Main Clock Oscillator Wait Control Register"]
350 #[inline(always)]
351 pub const fn moscwtcr(
352 &self,
353 ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
354 unsafe {
355 crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
356 self._svd2pac_as_ptr().add(162usize),
357 )
358 }
359 }
360
361 #[doc = "Sub Operating Power Control Register"]
362 #[inline(always)]
363 pub const fn sopccr(
364 &self,
365 ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(170usize),
369 )
370 }
371 }
372
373 #[doc = "Reset Status Register 1"]
374 #[inline(always)]
375 pub const fn rstsr1(
376 &self,
377 ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(192usize),
381 )
382 }
383 }
384
385 #[doc = "Voltage Monitor 1 Circuit Control Register"]
386 #[inline(always)]
387 pub const fn lvd1cr1(
388 &self,
389 ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(224usize),
393 )
394 }
395 }
396
397 #[doc = "Voltage Monitor 1 Circuit Status Register"]
398 #[inline(always)]
399 pub const fn lvd1sr(
400 &self,
401 ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
402 unsafe {
403 crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
404 self._svd2pac_as_ptr().add(225usize),
405 )
406 }
407 }
408
409 #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
410 #[inline(always)]
411 pub const fn lvd2cr1(
412 &self,
413 ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
414 unsafe {
415 crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
416 self._svd2pac_as_ptr().add(226usize),
417 )
418 }
419 }
420
421 #[doc = "Voltage Monitor 2 Circuit Status Register"]
422 #[inline(always)]
423 pub const fn lvd2sr(
424 &self,
425 ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
426 unsafe {
427 crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
428 self._svd2pac_as_ptr().add(227usize),
429 )
430 }
431 }
432
433 #[doc = "Clock Generation Function Security Attribute Register"]
434 #[inline(always)]
435 pub const fn cgfsar(
436 &self,
437 ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
438 unsafe {
439 crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
440 self._svd2pac_as_ptr().add(960usize),
441 )
442 }
443 }
444
445 #[doc = "Reset Security Attribution Register"]
446 #[inline(always)]
447 pub const fn rstsar(
448 &self,
449 ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
450 unsafe {
451 crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
452 self._svd2pac_as_ptr().add(964usize),
453 )
454 }
455 }
456
457 #[doc = "Low Power Mode Security Attribution Register"]
458 #[inline(always)]
459 pub const fn lpmsar(
460 &self,
461 ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
462 unsafe {
463 crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
464 self._svd2pac_as_ptr().add(968usize),
465 )
466 }
467 }
468
469 #[doc = "Low Voltage Detection Security Attribution Register"]
470 #[inline(always)]
471 pub const fn lvdsar(
472 &self,
473 ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
474 unsafe {
475 crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
476 self._svd2pac_as_ptr().add(972usize),
477 )
478 }
479 }
480
481 #[doc = "Battery Backup Function Security Attribute Register"]
482 #[inline(always)]
483 pub const fn bbfsar(
484 &self,
485 ) -> &'static crate::common::Reg<self::Bbfsar_SPEC, crate::common::RW> {
486 unsafe {
487 crate::common::Reg::<self::Bbfsar_SPEC, crate::common::RW>::from_ptr(
488 self._svd2pac_as_ptr().add(976usize),
489 )
490 }
491 }
492
493 #[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
494 #[inline(always)]
495 pub const fn dpfsar(
496 &self,
497 ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
498 unsafe {
499 crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
500 self._svd2pac_as_ptr().add(992usize),
501 )
502 }
503 }
504
505 #[doc = "Protect Register"]
506 #[inline(always)]
507 pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
508 unsafe {
509 crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
510 self._svd2pac_as_ptr().add(1022usize),
511 )
512 }
513 }
514
515 #[doc = "Deep Software Standby Control Register"]
516 #[inline(always)]
517 pub const fn dpsbycr(
518 &self,
519 ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
520 unsafe {
521 crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
522 self._svd2pac_as_ptr().add(1024usize),
523 )
524 }
525 }
526
527 #[doc = "Deep Software Standby Wait Control Register"]
528 #[inline(always)]
529 pub const fn dpswcr(
530 &self,
531 ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
532 unsafe {
533 crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
534 self._svd2pac_as_ptr().add(1025usize),
535 )
536 }
537 }
538
539 #[doc = "Deep Software Standby Interrupt Enable Register 0"]
540 #[inline(always)]
541 pub const fn dpsier0(
542 &self,
543 ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
544 unsafe {
545 crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
546 self._svd2pac_as_ptr().add(1026usize),
547 )
548 }
549 }
550
551 #[doc = "Deep Software Standby Interrupt Enable Register 1"]
552 #[inline(always)]
553 pub const fn dpsier1(
554 &self,
555 ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
556 unsafe {
557 crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
558 self._svd2pac_as_ptr().add(1027usize),
559 )
560 }
561 }
562
563 #[doc = "Deep Software Standby Interrupt Enable Register 2"]
564 #[inline(always)]
565 pub const fn dpsier2(
566 &self,
567 ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
568 unsafe {
569 crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
570 self._svd2pac_as_ptr().add(1028usize),
571 )
572 }
573 }
574
575 #[doc = "Deep Software Standby Interrupt Enable Register 3"]
576 #[inline(always)]
577 pub const fn dpsier3(
578 &self,
579 ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
580 unsafe {
581 crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
582 self._svd2pac_as_ptr().add(1029usize),
583 )
584 }
585 }
586
587 #[doc = "Deep Software Standby Interrupt Flag Register 0"]
588 #[inline(always)]
589 pub const fn dpsifr0(
590 &self,
591 ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
592 unsafe {
593 crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
594 self._svd2pac_as_ptr().add(1030usize),
595 )
596 }
597 }
598
599 #[doc = "Deep Software Standby Interrupt Flag Register 1"]
600 #[inline(always)]
601 pub const fn dpsifr1(
602 &self,
603 ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
604 unsafe {
605 crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
606 self._svd2pac_as_ptr().add(1031usize),
607 )
608 }
609 }
610
611 #[doc = "Deep Software Standby Interrupt Flag Register 2"]
612 #[inline(always)]
613 pub const fn dpsifr2(
614 &self,
615 ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
616 unsafe {
617 crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
618 self._svd2pac_as_ptr().add(1032usize),
619 )
620 }
621 }
622
623 #[doc = "Deep Software Standby Interrupt Flag Register 3"]
624 #[inline(always)]
625 pub const fn dpsifr3(
626 &self,
627 ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
628 unsafe {
629 crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
630 self._svd2pac_as_ptr().add(1033usize),
631 )
632 }
633 }
634
635 #[doc = "Deep Software Standby Interrupt Edge Register 0"]
636 #[inline(always)]
637 pub const fn dpsiegr0(
638 &self,
639 ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(1034usize),
643 )
644 }
645 }
646
647 #[doc = "Deep Software Standby Interrupt Edge Register 1"]
648 #[inline(always)]
649 pub const fn dpsiegr1(
650 &self,
651 ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
652 unsafe {
653 crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
654 self._svd2pac_as_ptr().add(1035usize),
655 )
656 }
657 }
658
659 #[doc = "Deep Software Standby Interrupt Edge Register 2"]
660 #[inline(always)]
661 pub const fn dpsiegr2(
662 &self,
663 ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
664 unsafe {
665 crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
666 self._svd2pac_as_ptr().add(1036usize),
667 )
668 }
669 }
670
671 #[doc = "System Control OCD Control Register"]
672 #[inline(always)]
673 pub const fn syocdcr(
674 &self,
675 ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
676 unsafe {
677 crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
678 self._svd2pac_as_ptr().add(1038usize),
679 )
680 }
681 }
682
683 #[doc = "Reset Status Register 0"]
684 #[inline(always)]
685 pub const fn rstsr0(
686 &self,
687 ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
688 unsafe {
689 crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
690 self._svd2pac_as_ptr().add(1040usize),
691 )
692 }
693 }
694
695 #[doc = "Reset Status Register 2"]
696 #[inline(always)]
697 pub const fn rstsr2(
698 &self,
699 ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
700 unsafe {
701 crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
702 self._svd2pac_as_ptr().add(1041usize),
703 )
704 }
705 }
706
707 #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
708 #[inline(always)]
709 pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
710 unsafe {
711 crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
712 self._svd2pac_as_ptr().add(1043usize),
713 )
714 }
715 }
716
717 #[doc = "Flash P/E Protect Register"]
718 #[inline(always)]
719 pub const fn fwepror(
720 &self,
721 ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
722 unsafe {
723 crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
724 self._svd2pac_as_ptr().add(1046usize),
725 )
726 }
727 }
728
729 #[doc = "Voltage Monitoring 1 Comparator Control Register"]
730 #[inline(always)]
731 pub const fn lvd1cmpcr(
732 &self,
733 ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
734 unsafe {
735 crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
736 self._svd2pac_as_ptr().add(1047usize),
737 )
738 }
739 }
740
741 #[doc = "Voltage Monitoring 2 Comparator Control Register"]
742 #[inline(always)]
743 pub const fn lvd2cmpcr(
744 &self,
745 ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
746 unsafe {
747 crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
748 self._svd2pac_as_ptr().add(1048usize),
749 )
750 }
751 }
752
753 #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
754 #[inline(always)]
755 pub const fn lvd1cr0(
756 &self,
757 ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
758 unsafe {
759 crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
760 self._svd2pac_as_ptr().add(1050usize),
761 )
762 }
763 }
764
765 #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
766 #[inline(always)]
767 pub const fn lvd2cr0(
768 &self,
769 ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
770 unsafe {
771 crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
772 self._svd2pac_as_ptr().add(1051usize),
773 )
774 }
775 }
776
777 #[doc = "Battery Backup Voltage Monitor Function Select Register"]
778 #[inline(always)]
779 pub const fn vbattmnselr(
780 &self,
781 ) -> &'static crate::common::Reg<self::Vbattmnselr_SPEC, crate::common::RW> {
782 unsafe {
783 crate::common::Reg::<self::Vbattmnselr_SPEC, crate::common::RW>::from_ptr(
784 self._svd2pac_as_ptr().add(1053usize),
785 )
786 }
787 }
788
789 #[doc = "Battery Backup Voltage Monitor Register"]
790 #[inline(always)]
791 pub const fn vbattmonr(
792 &self,
793 ) -> &'static crate::common::Reg<self::Vbattmonr_SPEC, crate::common::R> {
794 unsafe {
795 crate::common::Reg::<self::Vbattmonr_SPEC, crate::common::R>::from_ptr(
796 self._svd2pac_as_ptr().add(1054usize),
797 )
798 }
799 }
800
801 #[doc = "Sub-Clock Oscillator Control Register"]
802 #[inline(always)]
803 pub const fn sosccr(
804 &self,
805 ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
806 unsafe {
807 crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
808 self._svd2pac_as_ptr().add(1152usize),
809 )
810 }
811 }
812
813 #[doc = "Sub-Clock Oscillator Mode Control Register"]
814 #[inline(always)]
815 pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
816 unsafe {
817 crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
818 self._svd2pac_as_ptr().add(1153usize),
819 )
820 }
821 }
822
823 #[doc = "Low-Speed On-Chip Oscillator Control Register"]
824 #[inline(always)]
825 pub const fn lococr(
826 &self,
827 ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
828 unsafe {
829 crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
830 self._svd2pac_as_ptr().add(1168usize),
831 )
832 }
833 }
834
835 #[doc = "LOCO User Trimming Control Register"]
836 #[inline(always)]
837 pub const fn locoutcr(
838 &self,
839 ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
840 unsafe {
841 crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
842 self._svd2pac_as_ptr().add(1170usize),
843 )
844 }
845 }
846
847 #[doc = "VBATT Input Control Register"]
848 #[inline(always)]
849 pub const fn vbtictlr(
850 &self,
851 ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
852 unsafe {
853 crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
854 self._svd2pac_as_ptr().add(1211usize),
855 )
856 }
857 }
858
859 #[doc = "VBATT Backup Enable Register"]
860 #[inline(always)]
861 pub const fn vbtber(
862 &self,
863 ) -> &'static crate::common::Reg<self::Vbtber_SPEC, crate::common::RW> {
864 unsafe {
865 crate::common::Reg::<self::Vbtber_SPEC, crate::common::RW>::from_ptr(
866 self._svd2pac_as_ptr().add(1216usize),
867 )
868 }
869 }
870
871 #[doc = "VBATT Backup Register"]
872 #[inline(always)]
873 pub const fn vbtbkr(
874 &self,
875 ) -> &'static crate::common::ClusterRegisterArray<
876 crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
877 128,
878 0x1,
879 > {
880 unsafe {
881 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x500usize))
882 }
883 }
884}
885#[doc(hidden)]
886#[derive(Copy, Clone, Eq, PartialEq)]
887pub struct Sbycr_SPEC;
888impl crate::sealed::RegSpec for Sbycr_SPEC {
889 type DataType = u16;
890}
891
892#[doc = "Standby Control Register"]
893pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
894
895impl Sbycr {
896 #[doc = "Software Standby Mode Select"]
897 #[inline(always)]
898 pub fn ssby(
899 self,
900 ) -> crate::common::RegisterField<
901 15,
902 0x1,
903 1,
904 0,
905 sbycr::Ssby,
906 sbycr::Ssby,
907 Sbycr_SPEC,
908 crate::common::RW,
909 > {
910 crate::common::RegisterField::<
911 15,
912 0x1,
913 1,
914 0,
915 sbycr::Ssby,
916 sbycr::Ssby,
917 Sbycr_SPEC,
918 crate::common::RW,
919 >::from_register(self, 0)
920 }
921}
922impl ::core::default::Default for Sbycr {
923 #[inline(always)]
924 fn default() -> Sbycr {
925 <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
926 }
927}
928pub mod sbycr {
929
930 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
931 pub struct Ssby_SPEC;
932 pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
933 impl Ssby {
934 #[doc = "Sleep mode"]
935 pub const _0: Self = Self::new(0);
936
937 #[doc = "Software Standby mode."]
938 pub const _1: Self = Self::new(1);
939 }
940}
941#[doc(hidden)]
942#[derive(Copy, Clone, Eq, PartialEq)]
943pub struct Sckdivcr_SPEC;
944impl crate::sealed::RegSpec for Sckdivcr_SPEC {
945 type DataType = u32;
946}
947
948#[doc = "System Clock Division Control Register"]
949pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
950
951impl Sckdivcr {
952 #[doc = "Peripheral Module Clock D (PCLKD) Select"]
953 #[inline(always)]
954 pub fn pckd(
955 self,
956 ) -> crate::common::RegisterField<
957 0,
958 0x7,
959 1,
960 0,
961 sckdivcr::Pckd,
962 sckdivcr::Pckd,
963 Sckdivcr_SPEC,
964 crate::common::RW,
965 > {
966 crate::common::RegisterField::<
967 0,
968 0x7,
969 1,
970 0,
971 sckdivcr::Pckd,
972 sckdivcr::Pckd,
973 Sckdivcr_SPEC,
974 crate::common::RW,
975 >::from_register(self, 0)
976 }
977
978 #[doc = "Peripheral Module Clock C (PCLKC) Select"]
979 #[inline(always)]
980 pub fn pckc(
981 self,
982 ) -> crate::common::RegisterField<
983 4,
984 0x7,
985 1,
986 0,
987 sckdivcr::Pckc,
988 sckdivcr::Pckc,
989 Sckdivcr_SPEC,
990 crate::common::RW,
991 > {
992 crate::common::RegisterField::<
993 4,
994 0x7,
995 1,
996 0,
997 sckdivcr::Pckc,
998 sckdivcr::Pckc,
999 Sckdivcr_SPEC,
1000 crate::common::RW,
1001 >::from_register(self, 0)
1002 }
1003
1004 #[doc = "Peripheral Module Clock B (PCLKB) Select"]
1005 #[inline(always)]
1006 pub fn pckb(
1007 self,
1008 ) -> crate::common::RegisterField<
1009 8,
1010 0x7,
1011 1,
1012 0,
1013 sckdivcr::Pckb,
1014 sckdivcr::Pckb,
1015 Sckdivcr_SPEC,
1016 crate::common::RW,
1017 > {
1018 crate::common::RegisterField::<
1019 8,
1020 0x7,
1021 1,
1022 0,
1023 sckdivcr::Pckb,
1024 sckdivcr::Pckb,
1025 Sckdivcr_SPEC,
1026 crate::common::RW,
1027 >::from_register(self, 0)
1028 }
1029
1030 #[doc = "Peripheral Module Clock A (PCLKA) Select"]
1031 #[inline(always)]
1032 pub fn pcka(
1033 self,
1034 ) -> crate::common::RegisterField<
1035 12,
1036 0x7,
1037 1,
1038 0,
1039 sckdivcr::Pcka,
1040 sckdivcr::Pcka,
1041 Sckdivcr_SPEC,
1042 crate::common::RW,
1043 > {
1044 crate::common::RegisterField::<
1045 12,
1046 0x7,
1047 1,
1048 0,
1049 sckdivcr::Pcka,
1050 sckdivcr::Pcka,
1051 Sckdivcr_SPEC,
1052 crate::common::RW,
1053 >::from_register(self, 0)
1054 }
1055
1056 #[doc = "Reserved. Set these bits to the same value as PCKB\\[2:0\\]."]
1057 #[inline(always)]
1058 pub fn rsv(
1059 self,
1060 ) -> crate::common::RegisterField<
1061 16,
1062 0x7,
1063 1,
1064 0,
1065 sckdivcr::Rsv,
1066 sckdivcr::Rsv,
1067 Sckdivcr_SPEC,
1068 crate::common::RW,
1069 > {
1070 crate::common::RegisterField::<
1071 16,
1072 0x7,
1073 1,
1074 0,
1075 sckdivcr::Rsv,
1076 sckdivcr::Rsv,
1077 Sckdivcr_SPEC,
1078 crate::common::RW,
1079 >::from_register(self, 0)
1080 }
1081
1082 #[doc = "System Clock (ICLK) Select"]
1083 #[inline(always)]
1084 pub fn ick(
1085 self,
1086 ) -> crate::common::RegisterField<
1087 24,
1088 0x7,
1089 1,
1090 0,
1091 sckdivcr::Ick,
1092 sckdivcr::Ick,
1093 Sckdivcr_SPEC,
1094 crate::common::RW,
1095 > {
1096 crate::common::RegisterField::<
1097 24,
1098 0x7,
1099 1,
1100 0,
1101 sckdivcr::Ick,
1102 sckdivcr::Ick,
1103 Sckdivcr_SPEC,
1104 crate::common::RW,
1105 >::from_register(self, 0)
1106 }
1107
1108 #[doc = "FlashIF Clock (FCLK) Select"]
1109 #[inline(always)]
1110 pub fn fck(
1111 self,
1112 ) -> crate::common::RegisterField<
1113 28,
1114 0x7,
1115 1,
1116 0,
1117 sckdivcr::Fck,
1118 sckdivcr::Fck,
1119 Sckdivcr_SPEC,
1120 crate::common::RW,
1121 > {
1122 crate::common::RegisterField::<
1123 28,
1124 0x7,
1125 1,
1126 0,
1127 sckdivcr::Fck,
1128 sckdivcr::Fck,
1129 Sckdivcr_SPEC,
1130 crate::common::RW,
1131 >::from_register(self, 0)
1132 }
1133}
1134impl ::core::default::Default for Sckdivcr {
1135 #[inline(always)]
1136 fn default() -> Sckdivcr {
1137 <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570565154)
1138 }
1139}
1140pub mod sckdivcr {
1141
1142 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1143 pub struct Pckd_SPEC;
1144 pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1145 impl Pckd {
1146 #[doc = "x 1/1"]
1147 pub const _000: Self = Self::new(0);
1148
1149 #[doc = "x 1/2"]
1150 pub const _001: Self = Self::new(1);
1151
1152 #[doc = "x 1/4"]
1153 pub const _010: Self = Self::new(2);
1154
1155 #[doc = "x 1/8"]
1156 pub const _011: Self = Self::new(3);
1157
1158 #[doc = "x 1/16"]
1159 pub const _100: Self = Self::new(4);
1160
1161 #[doc = "x 1/32"]
1162 pub const _101: Self = Self::new(5);
1163
1164 #[doc = "x 1/64"]
1165 pub const _110: Self = Self::new(6);
1166 }
1167 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1168 pub struct Pckc_SPEC;
1169 pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1170 impl Pckc {
1171 #[doc = "x 1/1"]
1172 pub const _000: Self = Self::new(0);
1173
1174 #[doc = "x 1/2"]
1175 pub const _001: Self = Self::new(1);
1176
1177 #[doc = "x 1/4"]
1178 pub const _010: Self = Self::new(2);
1179
1180 #[doc = "x 1/8"]
1181 pub const _011: Self = Self::new(3);
1182
1183 #[doc = "x 1/16"]
1184 pub const _100: Self = Self::new(4);
1185
1186 #[doc = "x 1/32"]
1187 pub const _101: Self = Self::new(5);
1188
1189 #[doc = "x 1/64"]
1190 pub const _110: Self = Self::new(6);
1191 }
1192 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1193 pub struct Pckb_SPEC;
1194 pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1195 impl Pckb {
1196 #[doc = "x 1/1"]
1197 pub const _000: Self = Self::new(0);
1198
1199 #[doc = "x 1/2"]
1200 pub const _001: Self = Self::new(1);
1201
1202 #[doc = "x 1/4"]
1203 pub const _010: Self = Self::new(2);
1204
1205 #[doc = "x 1/8"]
1206 pub const _011: Self = Self::new(3);
1207
1208 #[doc = "x 1/16"]
1209 pub const _100: Self = Self::new(4);
1210
1211 #[doc = "x 1/32"]
1212 pub const _101: Self = Self::new(5);
1213
1214 #[doc = "x 1/64"]
1215 pub const _110: Self = Self::new(6);
1216 }
1217 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1218 pub struct Pcka_SPEC;
1219 pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1220 impl Pcka {
1221 #[doc = "x 1/1"]
1222 pub const _000: Self = Self::new(0);
1223
1224 #[doc = "x 1/2"]
1225 pub const _001: Self = Self::new(1);
1226
1227 #[doc = "x 1/4"]
1228 pub const _010: Self = Self::new(2);
1229
1230 #[doc = "x 1/8"]
1231 pub const _011: Self = Self::new(3);
1232
1233 #[doc = "x 1/16"]
1234 pub const _100: Self = Self::new(4);
1235
1236 #[doc = "x 1/32"]
1237 pub const _101: Self = Self::new(5);
1238
1239 #[doc = "x 1/64"]
1240 pub const _110: Self = Self::new(6);
1241 }
1242 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1243 pub struct Rsv_SPEC;
1244 pub type Rsv = crate::EnumBitfieldStruct<u8, Rsv_SPEC>;
1245 impl Rsv {
1246 #[doc = "x 1/1"]
1247 pub const _000: Self = Self::new(0);
1248
1249 #[doc = "x 1/2"]
1250 pub const _001: Self = Self::new(1);
1251
1252 #[doc = "x 1/4"]
1253 pub const _010: Self = Self::new(2);
1254
1255 #[doc = "x 1/8"]
1256 pub const _011: Self = Self::new(3);
1257
1258 #[doc = "x 1/16"]
1259 pub const _100: Self = Self::new(4);
1260
1261 #[doc = "x 1/32"]
1262 pub const _101: Self = Self::new(5);
1263
1264 #[doc = "x 1/64"]
1265 pub const _110: Self = Self::new(6);
1266 }
1267 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1268 pub struct Ick_SPEC;
1269 pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1270 impl Ick {
1271 #[doc = "x 1/1"]
1272 pub const _000: Self = Self::new(0);
1273
1274 #[doc = "x 1/2"]
1275 pub const _001: Self = Self::new(1);
1276
1277 #[doc = "x 1/4"]
1278 pub const _010: Self = Self::new(2);
1279
1280 #[doc = "x 1/8"]
1281 pub const _011: Self = Self::new(3);
1282
1283 #[doc = "x 1/16"]
1284 pub const _100: Self = Self::new(4);
1285
1286 #[doc = "x 1/32"]
1287 pub const _101: Self = Self::new(5);
1288
1289 #[doc = "x 1/64"]
1290 pub const _110: Self = Self::new(6);
1291 }
1292 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1293 pub struct Fck_SPEC;
1294 pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1295 impl Fck {
1296 #[doc = "x 1/1"]
1297 pub const _000: Self = Self::new(0);
1298
1299 #[doc = "x 1/2"]
1300 pub const _001: Self = Self::new(1);
1301
1302 #[doc = "x 1/4"]
1303 pub const _010: Self = Self::new(2);
1304
1305 #[doc = "x 1/8"]
1306 pub const _011: Self = Self::new(3);
1307
1308 #[doc = "x 1/16"]
1309 pub const _100: Self = Self::new(4);
1310
1311 #[doc = "x 1/32"]
1312 pub const _101: Self = Self::new(5);
1313
1314 #[doc = "x 1/64"]
1315 pub const _110: Self = Self::new(6);
1316 }
1317}
1318#[doc(hidden)]
1319#[derive(Copy, Clone, Eq, PartialEq)]
1320pub struct Sckscr_SPEC;
1321impl crate::sealed::RegSpec for Sckscr_SPEC {
1322 type DataType = u8;
1323}
1324
1325#[doc = "System Clock Source Control Register"]
1326pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1327
1328impl Sckscr {
1329 #[doc = "Clock Source Select"]
1330 #[inline(always)]
1331 pub fn cksel(
1332 self,
1333 ) -> crate::common::RegisterField<
1334 0,
1335 0x7,
1336 1,
1337 0,
1338 sckscr::Cksel,
1339 sckscr::Cksel,
1340 Sckscr_SPEC,
1341 crate::common::RW,
1342 > {
1343 crate::common::RegisterField::<
1344 0,
1345 0x7,
1346 1,
1347 0,
1348 sckscr::Cksel,
1349 sckscr::Cksel,
1350 Sckscr_SPEC,
1351 crate::common::RW,
1352 >::from_register(self, 0)
1353 }
1354}
1355impl ::core::default::Default for Sckscr {
1356 #[inline(always)]
1357 fn default() -> Sckscr {
1358 <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1359 }
1360}
1361pub mod sckscr {
1362
1363 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1364 pub struct Cksel_SPEC;
1365 pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1366 impl Cksel {
1367 #[doc = "HOCO"]
1368 pub const _000: Self = Self::new(0);
1369
1370 #[doc = "MOCO"]
1371 pub const _001: Self = Self::new(1);
1372
1373 #[doc = "LOCO"]
1374 pub const _010: Self = Self::new(2);
1375
1376 #[doc = "Main clock oscillator (MOSC)"]
1377 pub const _011: Self = Self::new(3);
1378
1379 #[doc = "Sub-clock oscillator (SOSC)"]
1380 pub const _100: Self = Self::new(4);
1381
1382 #[doc = "PLL"]
1383 pub const _101: Self = Self::new(5);
1384
1385 #[doc = "Setting prohibited"]
1386 pub const _110: Self = Self::new(6);
1387
1388 #[doc = "Setting prohibited"]
1389 pub const _111: Self = Self::new(7);
1390 }
1391}
1392#[doc(hidden)]
1393#[derive(Copy, Clone, Eq, PartialEq)]
1394pub struct Pllccr_SPEC;
1395impl crate::sealed::RegSpec for Pllccr_SPEC {
1396 type DataType = u16;
1397}
1398
1399#[doc = "PLL Clock Control Register"]
1400pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1401
1402impl Pllccr {
1403 #[doc = "PLL Input Frequency Division Ratio Select"]
1404 #[inline(always)]
1405 pub fn plidiv(
1406 self,
1407 ) -> crate::common::RegisterField<
1408 0,
1409 0x3,
1410 1,
1411 0,
1412 pllccr::Plidiv,
1413 pllccr::Plidiv,
1414 Pllccr_SPEC,
1415 crate::common::RW,
1416 > {
1417 crate::common::RegisterField::<
1418 0,
1419 0x3,
1420 1,
1421 0,
1422 pllccr::Plidiv,
1423 pllccr::Plidiv,
1424 Pllccr_SPEC,
1425 crate::common::RW,
1426 >::from_register(self, 0)
1427 }
1428
1429 #[doc = "PLL Clock Source Select"]
1430 #[inline(always)]
1431 pub fn plsrcsel(
1432 self,
1433 ) -> crate::common::RegisterField<
1434 4,
1435 0x1,
1436 1,
1437 0,
1438 pllccr::Plsrcsel,
1439 pllccr::Plsrcsel,
1440 Pllccr_SPEC,
1441 crate::common::RW,
1442 > {
1443 crate::common::RegisterField::<
1444 4,
1445 0x1,
1446 1,
1447 0,
1448 pllccr::Plsrcsel,
1449 pllccr::Plsrcsel,
1450 Pllccr_SPEC,
1451 crate::common::RW,
1452 >::from_register(self, 0)
1453 }
1454
1455 #[doc = "PLL Frequency Multiplication Factor Select"]
1456 #[inline(always)]
1457 pub fn pllmul(
1458 self,
1459 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
1460 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1461 }
1462}
1463impl ::core::default::Default for Pllccr {
1464 #[inline(always)]
1465 fn default() -> Pllccr {
1466 <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1467 }
1468}
1469pub mod pllccr {
1470
1471 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1472 pub struct Plidiv_SPEC;
1473 pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1474 impl Plidiv {
1475 #[doc = "/1"]
1476 pub const _00: Self = Self::new(0);
1477
1478 #[doc = "/2"]
1479 pub const _01: Self = Self::new(1);
1480
1481 #[doc = "/3"]
1482 pub const _10: Self = Self::new(2);
1483 }
1484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1485 pub struct Plsrcsel_SPEC;
1486 pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1487 impl Plsrcsel {
1488 #[doc = "Main clock oscillator"]
1489 pub const _0: Self = Self::new(0);
1490
1491 #[doc = "HOCO"]
1492 pub const _1: Self = Self::new(1);
1493 }
1494}
1495#[doc(hidden)]
1496#[derive(Copy, Clone, Eq, PartialEq)]
1497pub struct Pllcr_SPEC;
1498impl crate::sealed::RegSpec for Pllcr_SPEC {
1499 type DataType = u8;
1500}
1501
1502#[doc = "PLL Control Register"]
1503pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1504
1505impl Pllcr {
1506 #[doc = "PLL Stop Control"]
1507 #[inline(always)]
1508 pub fn pllstp(
1509 self,
1510 ) -> crate::common::RegisterField<
1511 0,
1512 0x1,
1513 1,
1514 0,
1515 pllcr::Pllstp,
1516 pllcr::Pllstp,
1517 Pllcr_SPEC,
1518 crate::common::RW,
1519 > {
1520 crate::common::RegisterField::<
1521 0,
1522 0x1,
1523 1,
1524 0,
1525 pllcr::Pllstp,
1526 pllcr::Pllstp,
1527 Pllcr_SPEC,
1528 crate::common::RW,
1529 >::from_register(self, 0)
1530 }
1531}
1532impl ::core::default::Default for Pllcr {
1533 #[inline(always)]
1534 fn default() -> Pllcr {
1535 <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1536 }
1537}
1538pub mod pllcr {
1539
1540 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1541 pub struct Pllstp_SPEC;
1542 pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1543 impl Pllstp {
1544 #[doc = "PLL is operating"]
1545 pub const _0: Self = Self::new(0);
1546
1547 #[doc = "PLL is stopped."]
1548 pub const _1: Self = Self::new(1);
1549 }
1550}
1551#[doc(hidden)]
1552#[derive(Copy, Clone, Eq, PartialEq)]
1553pub struct Mosccr_SPEC;
1554impl crate::sealed::RegSpec for Mosccr_SPEC {
1555 type DataType = u8;
1556}
1557
1558#[doc = "Main Clock Oscillator Control Register"]
1559pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1560
1561impl Mosccr {
1562 #[doc = "Main Clock Oscillator Stop"]
1563 #[inline(always)]
1564 pub fn mostp(
1565 self,
1566 ) -> crate::common::RegisterField<
1567 0,
1568 0x1,
1569 1,
1570 0,
1571 mosccr::Mostp,
1572 mosccr::Mostp,
1573 Mosccr_SPEC,
1574 crate::common::RW,
1575 > {
1576 crate::common::RegisterField::<
1577 0,
1578 0x1,
1579 1,
1580 0,
1581 mosccr::Mostp,
1582 mosccr::Mostp,
1583 Mosccr_SPEC,
1584 crate::common::RW,
1585 >::from_register(self, 0)
1586 }
1587}
1588impl ::core::default::Default for Mosccr {
1589 #[inline(always)]
1590 fn default() -> Mosccr {
1591 <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1592 }
1593}
1594pub mod mosccr {
1595
1596 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1597 pub struct Mostp_SPEC;
1598 pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1599 impl Mostp {
1600 #[doc = "Operate the main clock oscillator"]
1601 pub const _0: Self = Self::new(0);
1602
1603 #[doc = "Stop the main clock oscillator"]
1604 pub const _1: Self = Self::new(1);
1605 }
1606}
1607#[doc(hidden)]
1608#[derive(Copy, Clone, Eq, PartialEq)]
1609pub struct Hococr_SPEC;
1610impl crate::sealed::RegSpec for Hococr_SPEC {
1611 type DataType = u8;
1612}
1613
1614#[doc = "High-Speed On-Chip Oscillator Control Register"]
1615pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1616
1617impl Hococr {
1618 #[doc = "HOCO Stop"]
1619 #[inline(always)]
1620 pub fn hcstp(
1621 self,
1622 ) -> crate::common::RegisterField<
1623 0,
1624 0x1,
1625 1,
1626 0,
1627 hococr::Hcstp,
1628 hococr::Hcstp,
1629 Hococr_SPEC,
1630 crate::common::RW,
1631 > {
1632 crate::common::RegisterField::<
1633 0,
1634 0x1,
1635 1,
1636 0,
1637 hococr::Hcstp,
1638 hococr::Hcstp,
1639 Hococr_SPEC,
1640 crate::common::RW,
1641 >::from_register(self, 0)
1642 }
1643}
1644impl ::core::default::Default for Hococr {
1645 #[inline(always)]
1646 fn default() -> Hococr {
1647 <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1648 }
1649}
1650pub mod hococr {
1651
1652 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1653 pub struct Hcstp_SPEC;
1654 pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1655 impl Hcstp {
1656 #[doc = "Operate the HOCO clock ,"]
1657 pub const _0: Self = Self::new(0);
1658
1659 #[doc = "Stop the HOCO clock"]
1660 pub const _1: Self = Self::new(1);
1661 }
1662}
1663#[doc(hidden)]
1664#[derive(Copy, Clone, Eq, PartialEq)]
1665pub struct Mococr_SPEC;
1666impl crate::sealed::RegSpec for Mococr_SPEC {
1667 type DataType = u8;
1668}
1669
1670#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1671pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1672
1673impl Mococr {
1674 #[doc = "MOCO Stop"]
1675 #[inline(always)]
1676 pub fn mcstp(
1677 self,
1678 ) -> crate::common::RegisterField<
1679 0,
1680 0x1,
1681 1,
1682 0,
1683 mococr::Mcstp,
1684 mococr::Mcstp,
1685 Mococr_SPEC,
1686 crate::common::RW,
1687 > {
1688 crate::common::RegisterField::<
1689 0,
1690 0x1,
1691 1,
1692 0,
1693 mococr::Mcstp,
1694 mococr::Mcstp,
1695 Mococr_SPEC,
1696 crate::common::RW,
1697 >::from_register(self, 0)
1698 }
1699}
1700impl ::core::default::Default for Mococr {
1701 #[inline(always)]
1702 fn default() -> Mococr {
1703 <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1704 }
1705}
1706pub mod mococr {
1707
1708 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1709 pub struct Mcstp_SPEC;
1710 pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1711 impl Mcstp {
1712 #[doc = "MOCO clock is operating"]
1713 pub const _0: Self = Self::new(0);
1714
1715 #[doc = "MOCO clock is stopped"]
1716 pub const _1: Self = Self::new(1);
1717 }
1718}
1719#[doc(hidden)]
1720#[derive(Copy, Clone, Eq, PartialEq)]
1721pub struct Fllcr1_SPEC;
1722impl crate::sealed::RegSpec for Fllcr1_SPEC {
1723 type DataType = u8;
1724}
1725
1726#[doc = "FLL Control Register1"]
1727pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1728
1729impl Fllcr1 {
1730 #[doc = "FLL Enable"]
1731 #[inline(always)]
1732 pub fn fllen(
1733 self,
1734 ) -> crate::common::RegisterField<
1735 0,
1736 0x1,
1737 1,
1738 0,
1739 fllcr1::Fllen,
1740 fllcr1::Fllen,
1741 Fllcr1_SPEC,
1742 crate::common::RW,
1743 > {
1744 crate::common::RegisterField::<
1745 0,
1746 0x1,
1747 1,
1748 0,
1749 fllcr1::Fllen,
1750 fllcr1::Fllen,
1751 Fllcr1_SPEC,
1752 crate::common::RW,
1753 >::from_register(self, 0)
1754 }
1755}
1756impl ::core::default::Default for Fllcr1 {
1757 #[inline(always)]
1758 fn default() -> Fllcr1 {
1759 <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1760 }
1761}
1762pub mod fllcr1 {
1763
1764 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1765 pub struct Fllen_SPEC;
1766 pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1767 impl Fllen {
1768 #[doc = "FLL function is disabled"]
1769 pub const _0: Self = Self::new(0);
1770
1771 #[doc = "FLL function is enabled."]
1772 pub const _1: Self = Self::new(1);
1773 }
1774}
1775#[doc(hidden)]
1776#[derive(Copy, Clone, Eq, PartialEq)]
1777pub struct Fllcr2_SPEC;
1778impl crate::sealed::RegSpec for Fllcr2_SPEC {
1779 type DataType = u16;
1780}
1781
1782#[doc = "FLL Control Register2"]
1783pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1784
1785impl Fllcr2 {
1786 #[doc = "FLL Multiplication Control"]
1787 #[inline(always)]
1788 pub fn fllcntl(
1789 self,
1790 ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
1791 {
1792 crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1793 }
1794}
1795impl ::core::default::Default for Fllcr2 {
1796 #[inline(always)]
1797 fn default() -> Fllcr2 {
1798 <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1799 }
1800}
1801
1802#[doc(hidden)]
1803#[derive(Copy, Clone, Eq, PartialEq)]
1804pub struct Oscsf_SPEC;
1805impl crate::sealed::RegSpec for Oscsf_SPEC {
1806 type DataType = u8;
1807}
1808
1809#[doc = "Oscillation Stabilization Flag Register"]
1810pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1811
1812impl Oscsf {
1813 #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1814 #[inline(always)]
1815 pub fn hocosf(
1816 self,
1817 ) -> crate::common::RegisterField<
1818 0,
1819 0x1,
1820 1,
1821 0,
1822 oscsf::Hocosf,
1823 oscsf::Hocosf,
1824 Oscsf_SPEC,
1825 crate::common::R,
1826 > {
1827 crate::common::RegisterField::<
1828 0,
1829 0x1,
1830 1,
1831 0,
1832 oscsf::Hocosf,
1833 oscsf::Hocosf,
1834 Oscsf_SPEC,
1835 crate::common::R,
1836 >::from_register(self, 0)
1837 }
1838
1839 #[doc = "Main Clock Oscillation Stabilization Flag"]
1840 #[inline(always)]
1841 pub fn moscsf(
1842 self,
1843 ) -> crate::common::RegisterField<
1844 3,
1845 0x1,
1846 1,
1847 0,
1848 oscsf::Moscsf,
1849 oscsf::Moscsf,
1850 Oscsf_SPEC,
1851 crate::common::R,
1852 > {
1853 crate::common::RegisterField::<
1854 3,
1855 0x1,
1856 1,
1857 0,
1858 oscsf::Moscsf,
1859 oscsf::Moscsf,
1860 Oscsf_SPEC,
1861 crate::common::R,
1862 >::from_register(self, 0)
1863 }
1864
1865 #[doc = "PLL Clock Oscillation Stabilization Flag"]
1866 #[inline(always)]
1867 pub fn pllsf(
1868 self,
1869 ) -> crate::common::RegisterField<
1870 5,
1871 0x1,
1872 1,
1873 0,
1874 oscsf::Pllsf,
1875 oscsf::Pllsf,
1876 Oscsf_SPEC,
1877 crate::common::R,
1878 > {
1879 crate::common::RegisterField::<
1880 5,
1881 0x1,
1882 1,
1883 0,
1884 oscsf::Pllsf,
1885 oscsf::Pllsf,
1886 Oscsf_SPEC,
1887 crate::common::R,
1888 >::from_register(self, 0)
1889 }
1890
1891 #[doc = "PLL2 Clock Oscillation Stabilization Flag"]
1892 #[inline(always)]
1893 pub fn pll2sf(
1894 self,
1895 ) -> crate::common::RegisterField<
1896 6,
1897 0x1,
1898 1,
1899 0,
1900 oscsf::Pll2Sf,
1901 oscsf::Pll2Sf,
1902 Oscsf_SPEC,
1903 crate::common::R,
1904 > {
1905 crate::common::RegisterField::<
1906 6,
1907 0x1,
1908 1,
1909 0,
1910 oscsf::Pll2Sf,
1911 oscsf::Pll2Sf,
1912 Oscsf_SPEC,
1913 crate::common::R,
1914 >::from_register(self, 0)
1915 }
1916}
1917impl ::core::default::Default for Oscsf {
1918 #[inline(always)]
1919 fn default() -> Oscsf {
1920 <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1921 }
1922}
1923pub mod oscsf {
1924
1925 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1926 pub struct Hocosf_SPEC;
1927 pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1928 impl Hocosf {
1929 #[doc = "The HOCO clock is stopped or is not yet stable"]
1930 pub const _0: Self = Self::new(0);
1931
1932 #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1933 pub const _1: Self = Self::new(1);
1934 }
1935 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1936 pub struct Moscsf_SPEC;
1937 pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1938 impl Moscsf {
1939 #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1940 pub const _0: Self = Self::new(0);
1941
1942 #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1943 pub const _1: Self = Self::new(1);
1944 }
1945 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1946 pub struct Pllsf_SPEC;
1947 pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
1948 impl Pllsf {
1949 #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
1950 pub const _0: Self = Self::new(0);
1951
1952 #[doc = "The PLL clock is stable, so is available for use as the system clock"]
1953 pub const _1: Self = Self::new(1);
1954 }
1955 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1956 pub struct Pll2Sf_SPEC;
1957 pub type Pll2Sf = crate::EnumBitfieldStruct<u8, Pll2Sf_SPEC>;
1958 impl Pll2Sf {
1959 #[doc = "The PLL2 clock is stopped, or oscillation of the PLL2 clock is not stable yet"]
1960 pub const _0: Self = Self::new(0);
1961
1962 #[doc = "The PLL2 clock is stable"]
1963 pub const _1: Self = Self::new(1);
1964 }
1965}
1966#[doc(hidden)]
1967#[derive(Copy, Clone, Eq, PartialEq)]
1968pub struct Ckocr_SPEC;
1969impl crate::sealed::RegSpec for Ckocr_SPEC {
1970 type DataType = u8;
1971}
1972
1973#[doc = "Clock Out Control Register"]
1974pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1975
1976impl Ckocr {
1977 #[doc = "Clock Out Source Select"]
1978 #[inline(always)]
1979 pub fn ckosel(
1980 self,
1981 ) -> crate::common::RegisterField<
1982 0,
1983 0x7,
1984 1,
1985 0,
1986 ckocr::Ckosel,
1987 ckocr::Ckosel,
1988 Ckocr_SPEC,
1989 crate::common::RW,
1990 > {
1991 crate::common::RegisterField::<
1992 0,
1993 0x7,
1994 1,
1995 0,
1996 ckocr::Ckosel,
1997 ckocr::Ckosel,
1998 Ckocr_SPEC,
1999 crate::common::RW,
2000 >::from_register(self, 0)
2001 }
2002
2003 #[doc = "Clock Output Frequency Division Ratio"]
2004 #[inline(always)]
2005 pub fn ckodiv(
2006 self,
2007 ) -> crate::common::RegisterField<
2008 4,
2009 0x7,
2010 1,
2011 0,
2012 ckocr::Ckodiv,
2013 ckocr::Ckodiv,
2014 Ckocr_SPEC,
2015 crate::common::RW,
2016 > {
2017 crate::common::RegisterField::<
2018 4,
2019 0x7,
2020 1,
2021 0,
2022 ckocr::Ckodiv,
2023 ckocr::Ckodiv,
2024 Ckocr_SPEC,
2025 crate::common::RW,
2026 >::from_register(self, 0)
2027 }
2028
2029 #[doc = "Clock Out Enable"]
2030 #[inline(always)]
2031 pub fn ckoen(
2032 self,
2033 ) -> crate::common::RegisterField<
2034 7,
2035 0x1,
2036 1,
2037 0,
2038 ckocr::Ckoen,
2039 ckocr::Ckoen,
2040 Ckocr_SPEC,
2041 crate::common::RW,
2042 > {
2043 crate::common::RegisterField::<
2044 7,
2045 0x1,
2046 1,
2047 0,
2048 ckocr::Ckoen,
2049 ckocr::Ckoen,
2050 Ckocr_SPEC,
2051 crate::common::RW,
2052 >::from_register(self, 0)
2053 }
2054}
2055impl ::core::default::Default for Ckocr {
2056 #[inline(always)]
2057 fn default() -> Ckocr {
2058 <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
2059 }
2060}
2061pub mod ckocr {
2062
2063 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2064 pub struct Ckosel_SPEC;
2065 pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2066 impl Ckosel {
2067 #[doc = "HOCO (value after reset)"]
2068 pub const _000: Self = Self::new(0);
2069
2070 #[doc = "MOCO"]
2071 pub const _001: Self = Self::new(1);
2072
2073 #[doc = "LOCO"]
2074 pub const _010: Self = Self::new(2);
2075
2076 #[doc = "MOSC"]
2077 pub const _011: Self = Self::new(3);
2078
2079 #[doc = "SOSC"]
2080 pub const _100: Self = Self::new(4);
2081
2082 #[doc = "Setting prohibited"]
2083 pub const _101: Self = Self::new(5);
2084 }
2085 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2086 pub struct Ckodiv_SPEC;
2087 pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2088 impl Ckodiv {
2089 #[doc = "x 1/1"]
2090 pub const _000: Self = Self::new(0);
2091
2092 #[doc = "x 1/2"]
2093 pub const _001: Self = Self::new(1);
2094
2095 #[doc = "x 1/4"]
2096 pub const _010: Self = Self::new(2);
2097
2098 #[doc = "x 1/8"]
2099 pub const _011: Self = Self::new(3);
2100
2101 #[doc = "x 1/16"]
2102 pub const _100: Self = Self::new(4);
2103
2104 #[doc = "x 1/32"]
2105 pub const _101: Self = Self::new(5);
2106
2107 #[doc = "x 1/64"]
2108 pub const _110: Self = Self::new(6);
2109
2110 #[doc = "x 1/128"]
2111 pub const _111: Self = Self::new(7);
2112 }
2113 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2114 pub struct Ckoen_SPEC;
2115 pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2116 impl Ckoen {
2117 #[doc = "Disable clock out"]
2118 pub const _0: Self = Self::new(0);
2119
2120 #[doc = "Enable clock out"]
2121 pub const _1: Self = Self::new(1);
2122 }
2123}
2124#[doc(hidden)]
2125#[derive(Copy, Clone, Eq, PartialEq)]
2126pub struct Trckcr_SPEC;
2127impl crate::sealed::RegSpec for Trckcr_SPEC {
2128 type DataType = u8;
2129}
2130
2131#[doc = "Trace Clock Control Register"]
2132pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
2133
2134impl Trckcr {
2135 #[doc = "Trace Clock operating frequency select"]
2136 #[inline(always)]
2137 pub fn trck(
2138 self,
2139 ) -> crate::common::RegisterField<
2140 0,
2141 0xf,
2142 1,
2143 0,
2144 trckcr::Trck,
2145 trckcr::Trck,
2146 Trckcr_SPEC,
2147 crate::common::RW,
2148 > {
2149 crate::common::RegisterField::<
2150 0,
2151 0xf,
2152 1,
2153 0,
2154 trckcr::Trck,
2155 trckcr::Trck,
2156 Trckcr_SPEC,
2157 crate::common::RW,
2158 >::from_register(self, 0)
2159 }
2160
2161 #[doc = "Trace Clock operating Enable"]
2162 #[inline(always)]
2163 pub fn trcken(
2164 self,
2165 ) -> crate::common::RegisterField<
2166 7,
2167 0x1,
2168 1,
2169 0,
2170 trckcr::Trcken,
2171 trckcr::Trcken,
2172 Trckcr_SPEC,
2173 crate::common::RW,
2174 > {
2175 crate::common::RegisterField::<
2176 7,
2177 0x1,
2178 1,
2179 0,
2180 trckcr::Trcken,
2181 trckcr::Trcken,
2182 Trckcr_SPEC,
2183 crate::common::RW,
2184 >::from_register(self, 0)
2185 }
2186}
2187impl ::core::default::Default for Trckcr {
2188 #[inline(always)]
2189 fn default() -> Trckcr {
2190 <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(1)
2191 }
2192}
2193pub mod trckcr {
2194
2195 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2196 pub struct Trck_SPEC;
2197 pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
2198 impl Trck {
2199 #[doc = "/1"]
2200 pub const _0_X_0: Self = Self::new(0);
2201
2202 #[doc = "/2 (value after reset)"]
2203 pub const _0_X_1: Self = Self::new(1);
2204
2205 #[doc = "/4"]
2206 pub const _0_X_2: Self = Self::new(2);
2207 }
2208 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2209 pub struct Trcken_SPEC;
2210 pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
2211 impl Trcken {
2212 #[doc = "Stop"]
2213 pub const _0: Self = Self::new(0);
2214
2215 #[doc = "Operation enable"]
2216 pub const _1: Self = Self::new(1);
2217 }
2218}
2219#[doc(hidden)]
2220#[derive(Copy, Clone, Eq, PartialEq)]
2221pub struct Ostdcr_SPEC;
2222impl crate::sealed::RegSpec for Ostdcr_SPEC {
2223 type DataType = u8;
2224}
2225
2226#[doc = "Oscillation Stop Detection Control Register"]
2227pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
2228
2229impl Ostdcr {
2230 #[doc = "Oscillation Stop Detection Interrupt Enable"]
2231 #[inline(always)]
2232 pub fn ostdie(
2233 self,
2234 ) -> crate::common::RegisterField<
2235 0,
2236 0x1,
2237 1,
2238 0,
2239 ostdcr::Ostdie,
2240 ostdcr::Ostdie,
2241 Ostdcr_SPEC,
2242 crate::common::RW,
2243 > {
2244 crate::common::RegisterField::<
2245 0,
2246 0x1,
2247 1,
2248 0,
2249 ostdcr::Ostdie,
2250 ostdcr::Ostdie,
2251 Ostdcr_SPEC,
2252 crate::common::RW,
2253 >::from_register(self, 0)
2254 }
2255
2256 #[doc = "Oscillation Stop Detection Function Enable"]
2257 #[inline(always)]
2258 pub fn ostde(
2259 self,
2260 ) -> crate::common::RegisterField<
2261 7,
2262 0x1,
2263 1,
2264 0,
2265 ostdcr::Ostde,
2266 ostdcr::Ostde,
2267 Ostdcr_SPEC,
2268 crate::common::RW,
2269 > {
2270 crate::common::RegisterField::<
2271 7,
2272 0x1,
2273 1,
2274 0,
2275 ostdcr::Ostde,
2276 ostdcr::Ostde,
2277 Ostdcr_SPEC,
2278 crate::common::RW,
2279 >::from_register(self, 0)
2280 }
2281}
2282impl ::core::default::Default for Ostdcr {
2283 #[inline(always)]
2284 fn default() -> Ostdcr {
2285 <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
2286 }
2287}
2288pub mod ostdcr {
2289
2290 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2291 pub struct Ostdie_SPEC;
2292 pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
2293 impl Ostdie {
2294 #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
2295 pub const _0: Self = Self::new(0);
2296
2297 #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
2298 pub const _1: Self = Self::new(1);
2299 }
2300 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2301 pub struct Ostde_SPEC;
2302 pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
2303 impl Ostde {
2304 #[doc = "Disable oscillation stop detection function"]
2305 pub const _0: Self = Self::new(0);
2306
2307 #[doc = "Enable oscillation stop detection function"]
2308 pub const _1: Self = Self::new(1);
2309 }
2310}
2311#[doc(hidden)]
2312#[derive(Copy, Clone, Eq, PartialEq)]
2313pub struct Ostdsr_SPEC;
2314impl crate::sealed::RegSpec for Ostdsr_SPEC {
2315 type DataType = u8;
2316}
2317
2318#[doc = "Oscillation Stop Detection Status Register"]
2319pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
2320
2321impl Ostdsr {
2322 #[doc = "Oscillation Stop Detection Flag"]
2323 #[inline(always)]
2324 pub fn ostdf(
2325 self,
2326 ) -> crate::common::RegisterField<
2327 0,
2328 0x1,
2329 1,
2330 0,
2331 ostdsr::Ostdf,
2332 ostdsr::Ostdf,
2333 Ostdsr_SPEC,
2334 crate::common::RW,
2335 > {
2336 crate::common::RegisterField::<
2337 0,
2338 0x1,
2339 1,
2340 0,
2341 ostdsr::Ostdf,
2342 ostdsr::Ostdf,
2343 Ostdsr_SPEC,
2344 crate::common::RW,
2345 >::from_register(self, 0)
2346 }
2347}
2348impl ::core::default::Default for Ostdsr {
2349 #[inline(always)]
2350 fn default() -> Ostdsr {
2351 <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
2352 }
2353}
2354pub mod ostdsr {
2355
2356 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2357 pub struct Ostdf_SPEC;
2358 pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
2359 impl Ostdf {
2360 #[doc = "Main clock oscillation stop not detected"]
2361 pub const _0: Self = Self::new(0);
2362
2363 #[doc = "Main clock oscillation stop detected"]
2364 pub const _1: Self = Self::new(1);
2365 }
2366}
2367#[doc(hidden)]
2368#[derive(Copy, Clone, Eq, PartialEq)]
2369pub struct Pll2Ccr_SPEC;
2370impl crate::sealed::RegSpec for Pll2Ccr_SPEC {
2371 type DataType = u16;
2372}
2373
2374#[doc = "PLL2 Clock Control Register"]
2375pub type Pll2Ccr = crate::RegValueT<Pll2Ccr_SPEC>;
2376
2377impl Pll2Ccr {
2378 #[doc = "PLL2 Input Frequency Division Ratio Select"]
2379 #[inline(always)]
2380 pub fn pl2idiv(
2381 self,
2382 ) -> crate::common::RegisterField<
2383 0,
2384 0x3,
2385 1,
2386 0,
2387 pll2ccr::Pl2Idiv,
2388 pll2ccr::Pl2Idiv,
2389 Pll2Ccr_SPEC,
2390 crate::common::RW,
2391 > {
2392 crate::common::RegisterField::<
2393 0,
2394 0x3,
2395 1,
2396 0,
2397 pll2ccr::Pl2Idiv,
2398 pll2ccr::Pl2Idiv,
2399 Pll2Ccr_SPEC,
2400 crate::common::RW,
2401 >::from_register(self, 0)
2402 }
2403
2404 #[doc = "PLL2 Clock Source Select"]
2405 #[inline(always)]
2406 pub fn pl2srcsel(
2407 self,
2408 ) -> crate::common::RegisterField<
2409 4,
2410 0x1,
2411 1,
2412 0,
2413 pll2ccr::Pl2Srcsel,
2414 pll2ccr::Pl2Srcsel,
2415 Pll2Ccr_SPEC,
2416 crate::common::RW,
2417 > {
2418 crate::common::RegisterField::<
2419 4,
2420 0x1,
2421 1,
2422 0,
2423 pll2ccr::Pl2Srcsel,
2424 pll2ccr::Pl2Srcsel,
2425 Pll2Ccr_SPEC,
2426 crate::common::RW,
2427 >::from_register(self, 0)
2428 }
2429
2430 #[doc = "PLL2 Frequency Multiplication Factor Select"]
2431 #[inline(always)]
2432 pub fn pll2mul(
2433 self,
2434 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pll2Ccr_SPEC, crate::common::RW> {
2435 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pll2Ccr_SPEC,crate::common::RW>::from_register(self,0)
2436 }
2437}
2438impl ::core::default::Default for Pll2Ccr {
2439 #[inline(always)]
2440 fn default() -> Pll2Ccr {
2441 <crate::RegValueT<Pll2Ccr_SPEC> as RegisterValue<_>>::new(4864)
2442 }
2443}
2444pub mod pll2ccr {
2445
2446 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2447 pub struct Pl2Idiv_SPEC;
2448 pub type Pl2Idiv = crate::EnumBitfieldStruct<u8, Pl2Idiv_SPEC>;
2449 impl Pl2Idiv {
2450 #[doc = "∕ 1 (value after reset)"]
2451 pub const _00: Self = Self::new(0);
2452
2453 #[doc = "∕ 2"]
2454 pub const _01: Self = Self::new(1);
2455
2456 #[doc = "∕ 3"]
2457 pub const _10: Self = Self::new(2);
2458 }
2459 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2460 pub struct Pl2Srcsel_SPEC;
2461 pub type Pl2Srcsel = crate::EnumBitfieldStruct<u8, Pl2Srcsel_SPEC>;
2462 impl Pl2Srcsel {
2463 #[doc = "Main clock oscillator"]
2464 pub const _0: Self = Self::new(0);
2465
2466 #[doc = "HOCO"]
2467 pub const _1: Self = Self::new(1);
2468 }
2469}
2470#[doc(hidden)]
2471#[derive(Copy, Clone, Eq, PartialEq)]
2472pub struct Pll2Cr_SPEC;
2473impl crate::sealed::RegSpec for Pll2Cr_SPEC {
2474 type DataType = u8;
2475}
2476
2477#[doc = "PLL2 Control Register"]
2478pub type Pll2Cr = crate::RegValueT<Pll2Cr_SPEC>;
2479
2480impl Pll2Cr {
2481 #[doc = "PLL2 Stop Control"]
2482 #[inline(always)]
2483 pub fn pll2stp(
2484 self,
2485 ) -> crate::common::RegisterField<
2486 0,
2487 0x1,
2488 1,
2489 0,
2490 pll2cr::Pll2Stp,
2491 pll2cr::Pll2Stp,
2492 Pll2Cr_SPEC,
2493 crate::common::RW,
2494 > {
2495 crate::common::RegisterField::<
2496 0,
2497 0x1,
2498 1,
2499 0,
2500 pll2cr::Pll2Stp,
2501 pll2cr::Pll2Stp,
2502 Pll2Cr_SPEC,
2503 crate::common::RW,
2504 >::from_register(self, 0)
2505 }
2506}
2507impl ::core::default::Default for Pll2Cr {
2508 #[inline(always)]
2509 fn default() -> Pll2Cr {
2510 <crate::RegValueT<Pll2Cr_SPEC> as RegisterValue<_>>::new(1)
2511 }
2512}
2513pub mod pll2cr {
2514
2515 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2516 pub struct Pll2Stp_SPEC;
2517 pub type Pll2Stp = crate::EnumBitfieldStruct<u8, Pll2Stp_SPEC>;
2518 impl Pll2Stp {
2519 #[doc = "PLL2 is operating"]
2520 pub const _0: Self = Self::new(0);
2521
2522 #[doc = "PLL2 is stopped."]
2523 pub const _1: Self = Self::new(1);
2524 }
2525}
2526#[doc(hidden)]
2527#[derive(Copy, Clone, Eq, PartialEq)]
2528pub struct Mocoutcr_SPEC;
2529impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2530 type DataType = u8;
2531}
2532
2533#[doc = "MOCO User Trimming Control Register"]
2534pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2535
2536impl Mocoutcr {
2537 #[doc = "MOCO User Trimming"]
2538 #[inline(always)]
2539 pub fn mocoutrm(
2540 self,
2541 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2542 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2543 }
2544}
2545impl ::core::default::Default for Mocoutcr {
2546 #[inline(always)]
2547 fn default() -> Mocoutcr {
2548 <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2549 }
2550}
2551
2552#[doc(hidden)]
2553#[derive(Copy, Clone, Eq, PartialEq)]
2554pub struct Hocoutcr_SPEC;
2555impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2556 type DataType = u8;
2557}
2558
2559#[doc = "HOCO User Trimming Control Register"]
2560pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2561
2562impl Hocoutcr {
2563 #[doc = "HOCO User Trimming"]
2564 #[inline(always)]
2565 pub fn hocoutrm(
2566 self,
2567 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2568 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2569 }
2570}
2571impl ::core::default::Default for Hocoutcr {
2572 #[inline(always)]
2573 fn default() -> Hocoutcr {
2574 <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2575 }
2576}
2577
2578#[doc(hidden)]
2579#[derive(Copy, Clone, Eq, PartialEq)]
2580pub struct Usbckdivcr_SPEC;
2581impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
2582 type DataType = u8;
2583}
2584
2585#[doc = "USB Clock Division Control Register"]
2586pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
2587
2588impl Usbckdivcr {
2589 #[doc = "USB Clock (USBCLK) Division Select"]
2590 #[inline(always)]
2591 pub fn usbckdiv(
2592 self,
2593 ) -> crate::common::RegisterField<
2594 0,
2595 0x7,
2596 1,
2597 0,
2598 usbckdivcr::Usbckdiv,
2599 usbckdivcr::Usbckdiv,
2600 Usbckdivcr_SPEC,
2601 crate::common::RW,
2602 > {
2603 crate::common::RegisterField::<
2604 0,
2605 0x7,
2606 1,
2607 0,
2608 usbckdivcr::Usbckdiv,
2609 usbckdivcr::Usbckdiv,
2610 Usbckdivcr_SPEC,
2611 crate::common::RW,
2612 >::from_register(self, 0)
2613 }
2614}
2615impl ::core::default::Default for Usbckdivcr {
2616 #[inline(always)]
2617 fn default() -> Usbckdivcr {
2618 <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
2619 }
2620}
2621pub mod usbckdivcr {
2622
2623 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2624 pub struct Usbckdiv_SPEC;
2625 pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
2626 impl Usbckdiv {
2627 #[doc = "∕ 4"]
2628 pub const _010: Self = Self::new(2);
2629
2630 #[doc = "∕ 3"]
2631 pub const _101: Self = Self::new(5);
2632
2633 #[doc = "∕ 5"]
2634 pub const _110: Self = Self::new(6);
2635 }
2636}
2637#[doc(hidden)]
2638#[derive(Copy, Clone, Eq, PartialEq)]
2639pub struct Usbckcr_SPEC;
2640impl crate::sealed::RegSpec for Usbckcr_SPEC {
2641 type DataType = u8;
2642}
2643
2644#[doc = "USB Clock Control Register"]
2645pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
2646
2647impl Usbckcr {
2648 #[doc = "USB Clock (USBCLK) Source Select"]
2649 #[inline(always)]
2650 pub fn usbcksel(
2651 self,
2652 ) -> crate::common::RegisterField<
2653 0,
2654 0x7,
2655 1,
2656 0,
2657 usbckcr::Usbcksel,
2658 usbckcr::Usbcksel,
2659 Usbckcr_SPEC,
2660 crate::common::RW,
2661 > {
2662 crate::common::RegisterField::<
2663 0,
2664 0x7,
2665 1,
2666 0,
2667 usbckcr::Usbcksel,
2668 usbckcr::Usbcksel,
2669 Usbckcr_SPEC,
2670 crate::common::RW,
2671 >::from_register(self, 0)
2672 }
2673
2674 #[doc = "USB Clock (USBCLK) Switching Request"]
2675 #[inline(always)]
2676 pub fn usbcksreq(
2677 self,
2678 ) -> crate::common::RegisterField<
2679 6,
2680 0x1,
2681 1,
2682 0,
2683 usbckcr::Usbcksreq,
2684 usbckcr::Usbcksreq,
2685 Usbckcr_SPEC,
2686 crate::common::RW,
2687 > {
2688 crate::common::RegisterField::<
2689 6,
2690 0x1,
2691 1,
2692 0,
2693 usbckcr::Usbcksreq,
2694 usbckcr::Usbcksreq,
2695 Usbckcr_SPEC,
2696 crate::common::RW,
2697 >::from_register(self, 0)
2698 }
2699
2700 #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2701 #[inline(always)]
2702 pub fn usbcksrdy(
2703 self,
2704 ) -> crate::common::RegisterField<
2705 7,
2706 0x1,
2707 1,
2708 0,
2709 usbckcr::Usbcksrdy,
2710 usbckcr::Usbcksrdy,
2711 Usbckcr_SPEC,
2712 crate::common::R,
2713 > {
2714 crate::common::RegisterField::<
2715 7,
2716 0x1,
2717 1,
2718 0,
2719 usbckcr::Usbcksrdy,
2720 usbckcr::Usbcksrdy,
2721 Usbckcr_SPEC,
2722 crate::common::R,
2723 >::from_register(self, 0)
2724 }
2725}
2726impl ::core::default::Default for Usbckcr {
2727 #[inline(always)]
2728 fn default() -> Usbckcr {
2729 <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2730 }
2731}
2732pub mod usbckcr {
2733
2734 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2735 pub struct Usbcksel_SPEC;
2736 pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2737 impl Usbcksel {
2738 #[doc = "PLL"]
2739 pub const _101: Self = Self::new(5);
2740
2741 #[doc = "PLL2"]
2742 pub const _110: Self = Self::new(6);
2743 }
2744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2745 pub struct Usbcksreq_SPEC;
2746 pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2747 impl Usbcksreq {
2748 #[doc = "No request"]
2749 pub const _0: Self = Self::new(0);
2750
2751 #[doc = "Request switching."]
2752 pub const _1: Self = Self::new(1);
2753 }
2754 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2755 pub struct Usbcksrdy_SPEC;
2756 pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2757 impl Usbcksrdy {
2758 #[doc = "Impossible to Switch"]
2759 pub const _0: Self = Self::new(0);
2760
2761 #[doc = "Possible to Switch"]
2762 pub const _1: Self = Self::new(1);
2763 }
2764}
2765#[doc(hidden)]
2766#[derive(Copy, Clone, Eq, PartialEq)]
2767pub struct Snzreqcr1_SPEC;
2768impl crate::sealed::RegSpec for Snzreqcr1_SPEC {
2769 type DataType = u32;
2770}
2771
2772#[doc = "Snooze Request Control Register 1"]
2773pub type Snzreqcr1 = crate::RegValueT<Snzreqcr1_SPEC>;
2774
2775impl Snzreqcr1 {
2776 #[doc = "Enable AGT3 underflow snooze request"]
2777 #[inline(always)]
2778 pub fn snzreqen0(
2779 self,
2780 ) -> crate::common::RegisterField<
2781 0,
2782 0x1,
2783 1,
2784 0,
2785 snzreqcr1::Snzreqen0,
2786 snzreqcr1::Snzreqen0,
2787 Snzreqcr1_SPEC,
2788 crate::common::RW,
2789 > {
2790 crate::common::RegisterField::<
2791 0,
2792 0x1,
2793 1,
2794 0,
2795 snzreqcr1::Snzreqen0,
2796 snzreqcr1::Snzreqen0,
2797 Snzreqcr1_SPEC,
2798 crate::common::RW,
2799 >::from_register(self, 0)
2800 }
2801
2802 #[doc = "Enable AGT3 compare match A snooze request"]
2803 #[inline(always)]
2804 pub fn snzreqen1(
2805 self,
2806 ) -> crate::common::RegisterField<
2807 1,
2808 0x1,
2809 1,
2810 0,
2811 snzreqcr1::Snzreqen1,
2812 snzreqcr1::Snzreqen1,
2813 Snzreqcr1_SPEC,
2814 crate::common::RW,
2815 > {
2816 crate::common::RegisterField::<
2817 1,
2818 0x1,
2819 1,
2820 0,
2821 snzreqcr1::Snzreqen1,
2822 snzreqcr1::Snzreqen1,
2823 Snzreqcr1_SPEC,
2824 crate::common::RW,
2825 >::from_register(self, 0)
2826 }
2827
2828 #[doc = "Enable AGT3 compare match B snooze request"]
2829 #[inline(always)]
2830 pub fn snzreqen2(
2831 self,
2832 ) -> crate::common::RegisterField<
2833 2,
2834 0x1,
2835 1,
2836 0,
2837 snzreqcr1::Snzreqen2,
2838 snzreqcr1::Snzreqen2,
2839 Snzreqcr1_SPEC,
2840 crate::common::RW,
2841 > {
2842 crate::common::RegisterField::<
2843 2,
2844 0x1,
2845 1,
2846 0,
2847 snzreqcr1::Snzreqen2,
2848 snzreqcr1::Snzreqen2,
2849 Snzreqcr1_SPEC,
2850 crate::common::RW,
2851 >::from_register(self, 0)
2852 }
2853}
2854impl ::core::default::Default for Snzreqcr1 {
2855 #[inline(always)]
2856 fn default() -> Snzreqcr1 {
2857 <crate::RegValueT<Snzreqcr1_SPEC> as RegisterValue<_>>::new(0)
2858 }
2859}
2860pub mod snzreqcr1 {
2861
2862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2863 pub struct Snzreqen0_SPEC;
2864 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2865 impl Snzreqen0 {
2866 #[doc = "Disable the snooze request"]
2867 pub const _0: Self = Self::new(0);
2868
2869 #[doc = "Enable the snooze request"]
2870 pub const _1: Self = Self::new(1);
2871 }
2872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2873 pub struct Snzreqen1_SPEC;
2874 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2875 impl Snzreqen1 {
2876 #[doc = "Disable the snooze request"]
2877 pub const _0: Self = Self::new(0);
2878
2879 #[doc = "Enable the snooze request"]
2880 pub const _1: Self = Self::new(1);
2881 }
2882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2883 pub struct Snzreqen2_SPEC;
2884 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2885 impl Snzreqen2 {
2886 #[doc = "Disable the snooze request"]
2887 pub const _0: Self = Self::new(0);
2888
2889 #[doc = "Enable the snooze request"]
2890 pub const _1: Self = Self::new(1);
2891 }
2892}
2893#[doc(hidden)]
2894#[derive(Copy, Clone, Eq, PartialEq)]
2895pub struct Snzcr_SPEC;
2896impl crate::sealed::RegSpec for Snzcr_SPEC {
2897 type DataType = u8;
2898}
2899
2900#[doc = "Snooze Control Register"]
2901pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
2902
2903impl Snzcr {
2904 #[doc = "RXD0 Snooze Request Enable"]
2905 #[inline(always)]
2906 pub fn rxdreqen(
2907 self,
2908 ) -> crate::common::RegisterField<
2909 0,
2910 0x1,
2911 1,
2912 0,
2913 snzcr::Rxdreqen,
2914 snzcr::Rxdreqen,
2915 Snzcr_SPEC,
2916 crate::common::RW,
2917 > {
2918 crate::common::RegisterField::<
2919 0,
2920 0x1,
2921 1,
2922 0,
2923 snzcr::Rxdreqen,
2924 snzcr::Rxdreqen,
2925 Snzcr_SPEC,
2926 crate::common::RW,
2927 >::from_register(self, 0)
2928 }
2929
2930 #[doc = "DTC Enable in Snooze mode"]
2931 #[inline(always)]
2932 pub fn snzdtcen(
2933 self,
2934 ) -> crate::common::RegisterField<
2935 1,
2936 0x1,
2937 1,
2938 0,
2939 snzcr::Snzdtcen,
2940 snzcr::Snzdtcen,
2941 Snzcr_SPEC,
2942 crate::common::RW,
2943 > {
2944 crate::common::RegisterField::<
2945 1,
2946 0x1,
2947 1,
2948 0,
2949 snzcr::Snzdtcen,
2950 snzcr::Snzdtcen,
2951 Snzcr_SPEC,
2952 crate::common::RW,
2953 >::from_register(self, 0)
2954 }
2955
2956 #[doc = "Snooze mode Enable"]
2957 #[inline(always)]
2958 pub fn snze(
2959 self,
2960 ) -> crate::common::RegisterField<
2961 7,
2962 0x1,
2963 1,
2964 0,
2965 snzcr::Snze,
2966 snzcr::Snze,
2967 Snzcr_SPEC,
2968 crate::common::RW,
2969 > {
2970 crate::common::RegisterField::<
2971 7,
2972 0x1,
2973 1,
2974 0,
2975 snzcr::Snze,
2976 snzcr::Snze,
2977 Snzcr_SPEC,
2978 crate::common::RW,
2979 >::from_register(self, 0)
2980 }
2981}
2982impl ::core::default::Default for Snzcr {
2983 #[inline(always)]
2984 fn default() -> Snzcr {
2985 <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
2986 }
2987}
2988pub mod snzcr {
2989
2990 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2991 pub struct Rxdreqen_SPEC;
2992 pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
2993 impl Rxdreqen {
2994 #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
2995 pub const _0: Self = Self::new(0);
2996
2997 #[doc = "Detect RXD0 falling edge in Software Standby mode"]
2998 pub const _1: Self = Self::new(1);
2999 }
3000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3001 pub struct Snzdtcen_SPEC;
3002 pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
3003 impl Snzdtcen {
3004 #[doc = "Disable DTC operation"]
3005 pub const _0: Self = Self::new(0);
3006
3007 #[doc = "Enable DTC operation"]
3008 pub const _1: Self = Self::new(1);
3009 }
3010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3011 pub struct Snze_SPEC;
3012 pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
3013 impl Snze {
3014 #[doc = "Disable Snooze mode"]
3015 pub const _0: Self = Self::new(0);
3016
3017 #[doc = "Enable Snooze mode"]
3018 pub const _1: Self = Self::new(1);
3019 }
3020}
3021#[doc(hidden)]
3022#[derive(Copy, Clone, Eq, PartialEq)]
3023pub struct Snzedcr0_SPEC;
3024impl crate::sealed::RegSpec for Snzedcr0_SPEC {
3025 type DataType = u8;
3026}
3027
3028#[doc = "Snooze End Control Register 0"]
3029pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
3030
3031impl Snzedcr0 {
3032 #[doc = "AGT1 Underflow Snooze End Enable"]
3033 #[inline(always)]
3034 pub fn agtunfed(
3035 self,
3036 ) -> crate::common::RegisterField<
3037 0,
3038 0x1,
3039 1,
3040 0,
3041 snzedcr0::Agtunfed,
3042 snzedcr0::Agtunfed,
3043 Snzedcr0_SPEC,
3044 crate::common::RW,
3045 > {
3046 crate::common::RegisterField::<
3047 0,
3048 0x1,
3049 1,
3050 0,
3051 snzedcr0::Agtunfed,
3052 snzedcr0::Agtunfed,
3053 Snzedcr0_SPEC,
3054 crate::common::RW,
3055 >::from_register(self, 0)
3056 }
3057
3058 #[doc = "Last DTC Transmission Completion Snooze End Enable"]
3059 #[inline(always)]
3060 pub fn dtczred(
3061 self,
3062 ) -> crate::common::RegisterField<
3063 1,
3064 0x1,
3065 1,
3066 0,
3067 snzedcr0::Dtczred,
3068 snzedcr0::Dtczred,
3069 Snzedcr0_SPEC,
3070 crate::common::RW,
3071 > {
3072 crate::common::RegisterField::<
3073 1,
3074 0x1,
3075 1,
3076 0,
3077 snzedcr0::Dtczred,
3078 snzedcr0::Dtczred,
3079 Snzedcr0_SPEC,
3080 crate::common::RW,
3081 >::from_register(self, 0)
3082 }
3083
3084 #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
3085 #[inline(always)]
3086 pub fn dtcnzred(
3087 self,
3088 ) -> crate::common::RegisterField<
3089 2,
3090 0x1,
3091 1,
3092 0,
3093 snzedcr0::Dtcnzred,
3094 snzedcr0::Dtcnzred,
3095 Snzedcr0_SPEC,
3096 crate::common::RW,
3097 > {
3098 crate::common::RegisterField::<
3099 2,
3100 0x1,
3101 1,
3102 0,
3103 snzedcr0::Dtcnzred,
3104 snzedcr0::Dtcnzred,
3105 Snzedcr0_SPEC,
3106 crate::common::RW,
3107 >::from_register(self, 0)
3108 }
3109
3110 #[doc = "ADC120 Compare Match Snooze End Enable"]
3111 #[inline(always)]
3112 pub fn ad0mated(
3113 self,
3114 ) -> crate::common::RegisterField<
3115 3,
3116 0x1,
3117 1,
3118 0,
3119 snzedcr0::Ad0Mated,
3120 snzedcr0::Ad0Mated,
3121 Snzedcr0_SPEC,
3122 crate::common::RW,
3123 > {
3124 crate::common::RegisterField::<
3125 3,
3126 0x1,
3127 1,
3128 0,
3129 snzedcr0::Ad0Mated,
3130 snzedcr0::Ad0Mated,
3131 Snzedcr0_SPEC,
3132 crate::common::RW,
3133 >::from_register(self, 0)
3134 }
3135
3136 #[doc = "ADC120 Compare Mismatch Snooze End Enable"]
3137 #[inline(always)]
3138 pub fn ad0umted(
3139 self,
3140 ) -> crate::common::RegisterField<
3141 4,
3142 0x1,
3143 1,
3144 0,
3145 snzedcr0::Ad0Umted,
3146 snzedcr0::Ad0Umted,
3147 Snzedcr0_SPEC,
3148 crate::common::RW,
3149 > {
3150 crate::common::RegisterField::<
3151 4,
3152 0x1,
3153 1,
3154 0,
3155 snzedcr0::Ad0Umted,
3156 snzedcr0::Ad0Umted,
3157 Snzedcr0_SPEC,
3158 crate::common::RW,
3159 >::from_register(self, 0)
3160 }
3161
3162 #[doc = "ADC121 Compare Match Snooze End Enable"]
3163 #[inline(always)]
3164 pub fn ad1mated(
3165 self,
3166 ) -> crate::common::RegisterField<
3167 5,
3168 0x1,
3169 1,
3170 0,
3171 snzedcr0::Ad1Mated,
3172 snzedcr0::Ad1Mated,
3173 Snzedcr0_SPEC,
3174 crate::common::RW,
3175 > {
3176 crate::common::RegisterField::<
3177 5,
3178 0x1,
3179 1,
3180 0,
3181 snzedcr0::Ad1Mated,
3182 snzedcr0::Ad1Mated,
3183 Snzedcr0_SPEC,
3184 crate::common::RW,
3185 >::from_register(self, 0)
3186 }
3187
3188 #[doc = "ADC121 Compare Mismatch Snooze End Enable"]
3189 #[inline(always)]
3190 pub fn ad1umted(
3191 self,
3192 ) -> crate::common::RegisterField<
3193 6,
3194 0x1,
3195 1,
3196 0,
3197 snzedcr0::Ad1Umted,
3198 snzedcr0::Ad1Umted,
3199 Snzedcr0_SPEC,
3200 crate::common::RW,
3201 > {
3202 crate::common::RegisterField::<
3203 6,
3204 0x1,
3205 1,
3206 0,
3207 snzedcr0::Ad1Umted,
3208 snzedcr0::Ad1Umted,
3209 Snzedcr0_SPEC,
3210 crate::common::RW,
3211 >::from_register(self, 0)
3212 }
3213
3214 #[doc = "SCI0 Address Mismatch Snooze End Enable"]
3215 #[inline(always)]
3216 pub fn sci0umted(
3217 self,
3218 ) -> crate::common::RegisterField<
3219 7,
3220 0x1,
3221 1,
3222 0,
3223 snzedcr0::Sci0Umted,
3224 snzedcr0::Sci0Umted,
3225 Snzedcr0_SPEC,
3226 crate::common::RW,
3227 > {
3228 crate::common::RegisterField::<
3229 7,
3230 0x1,
3231 1,
3232 0,
3233 snzedcr0::Sci0Umted,
3234 snzedcr0::Sci0Umted,
3235 Snzedcr0_SPEC,
3236 crate::common::RW,
3237 >::from_register(self, 0)
3238 }
3239}
3240impl ::core::default::Default for Snzedcr0 {
3241 #[inline(always)]
3242 fn default() -> Snzedcr0 {
3243 <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
3244 }
3245}
3246pub mod snzedcr0 {
3247
3248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3249 pub struct Agtunfed_SPEC;
3250 pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
3251 impl Agtunfed {
3252 #[doc = "Disable the snooze end request"]
3253 pub const _0: Self = Self::new(0);
3254
3255 #[doc = "Enable the snooze end request"]
3256 pub const _1: Self = Self::new(1);
3257 }
3258 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3259 pub struct Dtczred_SPEC;
3260 pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
3261 impl Dtczred {
3262 #[doc = "Disable the snooze end request"]
3263 pub const _0: Self = Self::new(0);
3264
3265 #[doc = "Enable the snooze end request"]
3266 pub const _1: Self = Self::new(1);
3267 }
3268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3269 pub struct Dtcnzred_SPEC;
3270 pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
3271 impl Dtcnzred {
3272 #[doc = "Disable the snooze end request"]
3273 pub const _0: Self = Self::new(0);
3274
3275 #[doc = "Enable the snooze end request"]
3276 pub const _1: Self = Self::new(1);
3277 }
3278 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3279 pub struct Ad0Mated_SPEC;
3280 pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
3281 impl Ad0Mated {
3282 #[doc = "Disable the snooze end request"]
3283 pub const _0: Self = Self::new(0);
3284
3285 #[doc = "Enable the snooze end request"]
3286 pub const _1: Self = Self::new(1);
3287 }
3288 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3289 pub struct Ad0Umted_SPEC;
3290 pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
3291 impl Ad0Umted {
3292 #[doc = "Disable the snooze end request"]
3293 pub const _0: Self = Self::new(0);
3294
3295 #[doc = "Enable the snooze end request"]
3296 pub const _1: Self = Self::new(1);
3297 }
3298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3299 pub struct Ad1Mated_SPEC;
3300 pub type Ad1Mated = crate::EnumBitfieldStruct<u8, Ad1Mated_SPEC>;
3301 impl Ad1Mated {
3302 #[doc = "Disable the snooze end request"]
3303 pub const _0: Self = Self::new(0);
3304
3305 #[doc = "Enable the snooze end request"]
3306 pub const _1: Self = Self::new(1);
3307 }
3308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3309 pub struct Ad1Umted_SPEC;
3310 pub type Ad1Umted = crate::EnumBitfieldStruct<u8, Ad1Umted_SPEC>;
3311 impl Ad1Umted {
3312 #[doc = "Disable the snooze end request"]
3313 pub const _0: Self = Self::new(0);
3314
3315 #[doc = "Enable the snooze end request"]
3316 pub const _1: Self = Self::new(1);
3317 }
3318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3319 pub struct Sci0Umted_SPEC;
3320 pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
3321 impl Sci0Umted {
3322 #[doc = "Disable the snooze end request"]
3323 pub const _0: Self = Self::new(0);
3324
3325 #[doc = "Enable the snooze end request"]
3326 pub const _1: Self = Self::new(1);
3327 }
3328}
3329#[doc(hidden)]
3330#[derive(Copy, Clone, Eq, PartialEq)]
3331pub struct Snzedcr1_SPEC;
3332impl crate::sealed::RegSpec for Snzedcr1_SPEC {
3333 type DataType = u8;
3334}
3335
3336#[doc = "Snooze End Control Register 1"]
3337pub type Snzedcr1 = crate::RegValueT<Snzedcr1_SPEC>;
3338
3339impl Snzedcr1 {
3340 #[doc = "AGT3 underflow Snooze End Enable"]
3341 #[inline(always)]
3342 pub fn agt3unfed(
3343 self,
3344 ) -> crate::common::RegisterField<
3345 0,
3346 0x1,
3347 1,
3348 0,
3349 snzedcr1::Agt3Unfed,
3350 snzedcr1::Agt3Unfed,
3351 Snzedcr1_SPEC,
3352 crate::common::RW,
3353 > {
3354 crate::common::RegisterField::<
3355 0,
3356 0x1,
3357 1,
3358 0,
3359 snzedcr1::Agt3Unfed,
3360 snzedcr1::Agt3Unfed,
3361 Snzedcr1_SPEC,
3362 crate::common::RW,
3363 >::from_register(self, 0)
3364 }
3365}
3366impl ::core::default::Default for Snzedcr1 {
3367 #[inline(always)]
3368 fn default() -> Snzedcr1 {
3369 <crate::RegValueT<Snzedcr1_SPEC> as RegisterValue<_>>::new(0)
3370 }
3371}
3372pub mod snzedcr1 {
3373
3374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3375 pub struct Agt3Unfed_SPEC;
3376 pub type Agt3Unfed = crate::EnumBitfieldStruct<u8, Agt3Unfed_SPEC>;
3377 impl Agt3Unfed {
3378 #[doc = "Disable the Snooze End request"]
3379 pub const _0: Self = Self::new(0);
3380
3381 #[doc = "Enable the Snooze End request"]
3382 pub const _1: Self = Self::new(1);
3383 }
3384}
3385#[doc(hidden)]
3386#[derive(Copy, Clone, Eq, PartialEq)]
3387pub struct Snzreqcr0_SPEC;
3388impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
3389 type DataType = u32;
3390}
3391
3392#[doc = "Snooze Request Control Register 0"]
3393pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
3394
3395impl Snzreqcr0 {
3396 #[doc = "Enable IRQ0 pin snooze request"]
3397 #[inline(always)]
3398 pub fn snzreqen0(
3399 self,
3400 ) -> crate::common::RegisterField<
3401 0,
3402 0x1,
3403 1,
3404 0,
3405 snzreqcr0::Snzreqen0,
3406 snzreqcr0::Snzreqen0,
3407 Snzreqcr0_SPEC,
3408 crate::common::RW,
3409 > {
3410 crate::common::RegisterField::<
3411 0,
3412 0x1,
3413 1,
3414 0,
3415 snzreqcr0::Snzreqen0,
3416 snzreqcr0::Snzreqen0,
3417 Snzreqcr0_SPEC,
3418 crate::common::RW,
3419 >::from_register(self, 0)
3420 }
3421
3422 #[doc = "Enable IRQ1 pin snooze request"]
3423 #[inline(always)]
3424 pub fn snzreqen1(
3425 self,
3426 ) -> crate::common::RegisterField<
3427 1,
3428 0x1,
3429 1,
3430 0,
3431 snzreqcr0::Snzreqen1,
3432 snzreqcr0::Snzreqen1,
3433 Snzreqcr0_SPEC,
3434 crate::common::RW,
3435 > {
3436 crate::common::RegisterField::<
3437 1,
3438 0x1,
3439 1,
3440 0,
3441 snzreqcr0::Snzreqen1,
3442 snzreqcr0::Snzreqen1,
3443 Snzreqcr0_SPEC,
3444 crate::common::RW,
3445 >::from_register(self, 0)
3446 }
3447
3448 #[doc = "Enable IRQ2 pin snooze request"]
3449 #[inline(always)]
3450 pub fn snzreqen2(
3451 self,
3452 ) -> crate::common::RegisterField<
3453 2,
3454 0x1,
3455 1,
3456 0,
3457 snzreqcr0::Snzreqen2,
3458 snzreqcr0::Snzreqen2,
3459 Snzreqcr0_SPEC,
3460 crate::common::RW,
3461 > {
3462 crate::common::RegisterField::<
3463 2,
3464 0x1,
3465 1,
3466 0,
3467 snzreqcr0::Snzreqen2,
3468 snzreqcr0::Snzreqen2,
3469 Snzreqcr0_SPEC,
3470 crate::common::RW,
3471 >::from_register(self, 0)
3472 }
3473
3474 #[doc = "Enable IRQ3 pin snooze request"]
3475 #[inline(always)]
3476 pub fn snzreqen3(
3477 self,
3478 ) -> crate::common::RegisterField<
3479 3,
3480 0x1,
3481 1,
3482 0,
3483 snzreqcr0::Snzreqen3,
3484 snzreqcr0::Snzreqen3,
3485 Snzreqcr0_SPEC,
3486 crate::common::RW,
3487 > {
3488 crate::common::RegisterField::<
3489 3,
3490 0x1,
3491 1,
3492 0,
3493 snzreqcr0::Snzreqen3,
3494 snzreqcr0::Snzreqen3,
3495 Snzreqcr0_SPEC,
3496 crate::common::RW,
3497 >::from_register(self, 0)
3498 }
3499
3500 #[doc = "Enable IRQ4 pin snooze request"]
3501 #[inline(always)]
3502 pub fn snzreqen4(
3503 self,
3504 ) -> crate::common::RegisterField<
3505 4,
3506 0x1,
3507 1,
3508 0,
3509 snzreqcr0::Snzreqen4,
3510 snzreqcr0::Snzreqen4,
3511 Snzreqcr0_SPEC,
3512 crate::common::RW,
3513 > {
3514 crate::common::RegisterField::<
3515 4,
3516 0x1,
3517 1,
3518 0,
3519 snzreqcr0::Snzreqen4,
3520 snzreqcr0::Snzreqen4,
3521 Snzreqcr0_SPEC,
3522 crate::common::RW,
3523 >::from_register(self, 0)
3524 }
3525
3526 #[doc = "Enable IRQ5 pin snooze request"]
3527 #[inline(always)]
3528 pub fn snzreqen5(
3529 self,
3530 ) -> crate::common::RegisterField<
3531 5,
3532 0x1,
3533 1,
3534 0,
3535 snzreqcr0::Snzreqen5,
3536 snzreqcr0::Snzreqen5,
3537 Snzreqcr0_SPEC,
3538 crate::common::RW,
3539 > {
3540 crate::common::RegisterField::<
3541 5,
3542 0x1,
3543 1,
3544 0,
3545 snzreqcr0::Snzreqen5,
3546 snzreqcr0::Snzreqen5,
3547 Snzreqcr0_SPEC,
3548 crate::common::RW,
3549 >::from_register(self, 0)
3550 }
3551
3552 #[doc = "Enable IRQ6 pin snooze request"]
3553 #[inline(always)]
3554 pub fn snzreqen6(
3555 self,
3556 ) -> crate::common::RegisterField<
3557 6,
3558 0x1,
3559 1,
3560 0,
3561 snzreqcr0::Snzreqen6,
3562 snzreqcr0::Snzreqen6,
3563 Snzreqcr0_SPEC,
3564 crate::common::RW,
3565 > {
3566 crate::common::RegisterField::<
3567 6,
3568 0x1,
3569 1,
3570 0,
3571 snzreqcr0::Snzreqen6,
3572 snzreqcr0::Snzreqen6,
3573 Snzreqcr0_SPEC,
3574 crate::common::RW,
3575 >::from_register(self, 0)
3576 }
3577
3578 #[doc = "Enable IRQ7 pin snooze request"]
3579 #[inline(always)]
3580 pub fn snzreqen7(
3581 self,
3582 ) -> crate::common::RegisterField<
3583 7,
3584 0x1,
3585 1,
3586 0,
3587 snzreqcr0::Snzreqen7,
3588 snzreqcr0::Snzreqen7,
3589 Snzreqcr0_SPEC,
3590 crate::common::RW,
3591 > {
3592 crate::common::RegisterField::<
3593 7,
3594 0x1,
3595 1,
3596 0,
3597 snzreqcr0::Snzreqen7,
3598 snzreqcr0::Snzreqen7,
3599 Snzreqcr0_SPEC,
3600 crate::common::RW,
3601 >::from_register(self, 0)
3602 }
3603
3604 #[doc = "Enable IRQ8 pin snooze request"]
3605 #[inline(always)]
3606 pub fn snzreqen8(
3607 self,
3608 ) -> crate::common::RegisterField<
3609 8,
3610 0x1,
3611 1,
3612 0,
3613 snzreqcr0::Snzreqen8,
3614 snzreqcr0::Snzreqen8,
3615 Snzreqcr0_SPEC,
3616 crate::common::RW,
3617 > {
3618 crate::common::RegisterField::<
3619 8,
3620 0x1,
3621 1,
3622 0,
3623 snzreqcr0::Snzreqen8,
3624 snzreqcr0::Snzreqen8,
3625 Snzreqcr0_SPEC,
3626 crate::common::RW,
3627 >::from_register(self, 0)
3628 }
3629
3630 #[doc = "Enable IRQ9 pin snooze request"]
3631 #[inline(always)]
3632 pub fn snzreqen9(
3633 self,
3634 ) -> crate::common::RegisterField<
3635 9,
3636 0x1,
3637 1,
3638 0,
3639 snzreqcr0::Snzreqen9,
3640 snzreqcr0::Snzreqen9,
3641 Snzreqcr0_SPEC,
3642 crate::common::RW,
3643 > {
3644 crate::common::RegisterField::<
3645 9,
3646 0x1,
3647 1,
3648 0,
3649 snzreqcr0::Snzreqen9,
3650 snzreqcr0::Snzreqen9,
3651 Snzreqcr0_SPEC,
3652 crate::common::RW,
3653 >::from_register(self, 0)
3654 }
3655
3656 #[doc = "Enable IRQ10 pin snooze request"]
3657 #[inline(always)]
3658 pub fn snzreqen10(
3659 self,
3660 ) -> crate::common::RegisterField<
3661 10,
3662 0x1,
3663 1,
3664 0,
3665 snzreqcr0::Snzreqen10,
3666 snzreqcr0::Snzreqen10,
3667 Snzreqcr0_SPEC,
3668 crate::common::RW,
3669 > {
3670 crate::common::RegisterField::<
3671 10,
3672 0x1,
3673 1,
3674 0,
3675 snzreqcr0::Snzreqen10,
3676 snzreqcr0::Snzreqen10,
3677 Snzreqcr0_SPEC,
3678 crate::common::RW,
3679 >::from_register(self, 0)
3680 }
3681
3682 #[doc = "Enable IRQ11 pin snooze request"]
3683 #[inline(always)]
3684 pub fn snzreqen11(
3685 self,
3686 ) -> crate::common::RegisterField<
3687 11,
3688 0x1,
3689 1,
3690 0,
3691 snzreqcr0::Snzreqen11,
3692 snzreqcr0::Snzreqen11,
3693 Snzreqcr0_SPEC,
3694 crate::common::RW,
3695 > {
3696 crate::common::RegisterField::<
3697 11,
3698 0x1,
3699 1,
3700 0,
3701 snzreqcr0::Snzreqen11,
3702 snzreqcr0::Snzreqen11,
3703 Snzreqcr0_SPEC,
3704 crate::common::RW,
3705 >::from_register(self, 0)
3706 }
3707
3708 #[doc = "Enable IRQ12 pin snooze request"]
3709 #[inline(always)]
3710 pub fn snzreqen12(
3711 self,
3712 ) -> crate::common::RegisterField<
3713 12,
3714 0x1,
3715 1,
3716 0,
3717 snzreqcr0::Snzreqen12,
3718 snzreqcr0::Snzreqen12,
3719 Snzreqcr0_SPEC,
3720 crate::common::RW,
3721 > {
3722 crate::common::RegisterField::<
3723 12,
3724 0x1,
3725 1,
3726 0,
3727 snzreqcr0::Snzreqen12,
3728 snzreqcr0::Snzreqen12,
3729 Snzreqcr0_SPEC,
3730 crate::common::RW,
3731 >::from_register(self, 0)
3732 }
3733
3734 #[doc = "Enable IRQ13 pin snooze request"]
3735 #[inline(always)]
3736 pub fn snzreqen13(
3737 self,
3738 ) -> crate::common::RegisterField<
3739 13,
3740 0x1,
3741 1,
3742 0,
3743 snzreqcr0::Snzreqen13,
3744 snzreqcr0::Snzreqen13,
3745 Snzreqcr0_SPEC,
3746 crate::common::RW,
3747 > {
3748 crate::common::RegisterField::<
3749 13,
3750 0x1,
3751 1,
3752 0,
3753 snzreqcr0::Snzreqen13,
3754 snzreqcr0::Snzreqen13,
3755 Snzreqcr0_SPEC,
3756 crate::common::RW,
3757 >::from_register(self, 0)
3758 }
3759
3760 #[doc = "Enable IRQ14 pin snooze request"]
3761 #[inline(always)]
3762 pub fn snzreqen14(
3763 self,
3764 ) -> crate::common::RegisterField<
3765 14,
3766 0x1,
3767 1,
3768 0,
3769 snzreqcr0::Snzreqen14,
3770 snzreqcr0::Snzreqen14,
3771 Snzreqcr0_SPEC,
3772 crate::common::RW,
3773 > {
3774 crate::common::RegisterField::<
3775 14,
3776 0x1,
3777 1,
3778 0,
3779 snzreqcr0::Snzreqen14,
3780 snzreqcr0::Snzreqen14,
3781 Snzreqcr0_SPEC,
3782 crate::common::RW,
3783 >::from_register(self, 0)
3784 }
3785
3786 #[doc = "Enable IRQ15 pin snooze request"]
3787 #[inline(always)]
3788 pub fn snzreqen15(
3789 self,
3790 ) -> crate::common::RegisterField<
3791 15,
3792 0x1,
3793 1,
3794 0,
3795 snzreqcr0::Snzreqen15,
3796 snzreqcr0::Snzreqen15,
3797 Snzreqcr0_SPEC,
3798 crate::common::RW,
3799 > {
3800 crate::common::RegisterField::<
3801 15,
3802 0x1,
3803 1,
3804 0,
3805 snzreqcr0::Snzreqen15,
3806 snzreqcr0::Snzreqen15,
3807 Snzreqcr0_SPEC,
3808 crate::common::RW,
3809 >::from_register(self, 0)
3810 }
3811
3812 #[doc = "Enable RTC alarm snooze request"]
3813 #[inline(always)]
3814 pub fn snzreqen24(
3815 self,
3816 ) -> crate::common::RegisterField<
3817 24,
3818 0x1,
3819 1,
3820 0,
3821 snzreqcr0::Snzreqen24,
3822 snzreqcr0::Snzreqen24,
3823 Snzreqcr0_SPEC,
3824 crate::common::RW,
3825 > {
3826 crate::common::RegisterField::<
3827 24,
3828 0x1,
3829 1,
3830 0,
3831 snzreqcr0::Snzreqen24,
3832 snzreqcr0::Snzreqen24,
3833 Snzreqcr0_SPEC,
3834 crate::common::RW,
3835 >::from_register(self, 0)
3836 }
3837
3838 #[doc = "Enable RTC period snooze request"]
3839 #[inline(always)]
3840 pub fn snzreqen25(
3841 self,
3842 ) -> crate::common::RegisterField<
3843 25,
3844 0x1,
3845 1,
3846 0,
3847 snzreqcr0::Snzreqen25,
3848 snzreqcr0::Snzreqen25,
3849 Snzreqcr0_SPEC,
3850 crate::common::RW,
3851 > {
3852 crate::common::RegisterField::<
3853 25,
3854 0x1,
3855 1,
3856 0,
3857 snzreqcr0::Snzreqen25,
3858 snzreqcr0::Snzreqen25,
3859 Snzreqcr0_SPEC,
3860 crate::common::RW,
3861 >::from_register(self, 0)
3862 }
3863
3864 #[doc = "Enable AGT1 underflow snooze request"]
3865 #[inline(always)]
3866 pub fn snzreqen28(
3867 self,
3868 ) -> crate::common::RegisterField<
3869 28,
3870 0x1,
3871 1,
3872 0,
3873 snzreqcr0::Snzreqen28,
3874 snzreqcr0::Snzreqen28,
3875 Snzreqcr0_SPEC,
3876 crate::common::RW,
3877 > {
3878 crate::common::RegisterField::<
3879 28,
3880 0x1,
3881 1,
3882 0,
3883 snzreqcr0::Snzreqen28,
3884 snzreqcr0::Snzreqen28,
3885 Snzreqcr0_SPEC,
3886 crate::common::RW,
3887 >::from_register(self, 0)
3888 }
3889
3890 #[doc = "Enable AGT1 compare match A snooze request"]
3891 #[inline(always)]
3892 pub fn snzreqen29(
3893 self,
3894 ) -> crate::common::RegisterField<
3895 29,
3896 0x1,
3897 1,
3898 0,
3899 snzreqcr0::Snzreqen29,
3900 snzreqcr0::Snzreqen29,
3901 Snzreqcr0_SPEC,
3902 crate::common::RW,
3903 > {
3904 crate::common::RegisterField::<
3905 29,
3906 0x1,
3907 1,
3908 0,
3909 snzreqcr0::Snzreqen29,
3910 snzreqcr0::Snzreqen29,
3911 Snzreqcr0_SPEC,
3912 crate::common::RW,
3913 >::from_register(self, 0)
3914 }
3915
3916 #[doc = "Enable AGT1 compare match B snooze request"]
3917 #[inline(always)]
3918 pub fn snzreqen30(
3919 self,
3920 ) -> crate::common::RegisterField<
3921 30,
3922 0x1,
3923 1,
3924 0,
3925 snzreqcr0::Snzreqen30,
3926 snzreqcr0::Snzreqen30,
3927 Snzreqcr0_SPEC,
3928 crate::common::RW,
3929 > {
3930 crate::common::RegisterField::<
3931 30,
3932 0x1,
3933 1,
3934 0,
3935 snzreqcr0::Snzreqen30,
3936 snzreqcr0::Snzreqen30,
3937 Snzreqcr0_SPEC,
3938 crate::common::RW,
3939 >::from_register(self, 0)
3940 }
3941}
3942impl ::core::default::Default for Snzreqcr0 {
3943 #[inline(always)]
3944 fn default() -> Snzreqcr0 {
3945 <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3946 }
3947}
3948pub mod snzreqcr0 {
3949
3950 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3951 pub struct Snzreqen0_SPEC;
3952 pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3953 impl Snzreqen0 {
3954 #[doc = "Disable the snooze request"]
3955 pub const _0: Self = Self::new(0);
3956
3957 #[doc = "Enable the snooze request"]
3958 pub const _1: Self = Self::new(1);
3959 }
3960 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3961 pub struct Snzreqen1_SPEC;
3962 pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3963 impl Snzreqen1 {
3964 #[doc = "Disable the snooze request"]
3965 pub const _0: Self = Self::new(0);
3966
3967 #[doc = "Enable the snooze request"]
3968 pub const _1: Self = Self::new(1);
3969 }
3970 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3971 pub struct Snzreqen2_SPEC;
3972 pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3973 impl Snzreqen2 {
3974 #[doc = "Disable the snooze request"]
3975 pub const _0: Self = Self::new(0);
3976
3977 #[doc = "Enable the snooze request"]
3978 pub const _1: Self = Self::new(1);
3979 }
3980 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3981 pub struct Snzreqen3_SPEC;
3982 pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3983 impl Snzreqen3 {
3984 #[doc = "Disable the snooze request"]
3985 pub const _0: Self = Self::new(0);
3986
3987 #[doc = "Enable the snooze request"]
3988 pub const _1: Self = Self::new(1);
3989 }
3990 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3991 pub struct Snzreqen4_SPEC;
3992 pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3993 impl Snzreqen4 {
3994 #[doc = "Disable the snooze request"]
3995 pub const _0: Self = Self::new(0);
3996
3997 #[doc = "Enable the snooze request"]
3998 pub const _1: Self = Self::new(1);
3999 }
4000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4001 pub struct Snzreqen5_SPEC;
4002 pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
4003 impl Snzreqen5 {
4004 #[doc = "Disable the snooze request"]
4005 pub const _0: Self = Self::new(0);
4006
4007 #[doc = "Enable the snooze request"]
4008 pub const _1: Self = Self::new(1);
4009 }
4010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4011 pub struct Snzreqen6_SPEC;
4012 pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
4013 impl Snzreqen6 {
4014 #[doc = "Disable the snooze request"]
4015 pub const _0: Self = Self::new(0);
4016
4017 #[doc = "Enable the snooze request"]
4018 pub const _1: Self = Self::new(1);
4019 }
4020 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4021 pub struct Snzreqen7_SPEC;
4022 pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
4023 impl Snzreqen7 {
4024 #[doc = "Disable the snooze request"]
4025 pub const _0: Self = Self::new(0);
4026
4027 #[doc = "Enable the snooze request"]
4028 pub const _1: Self = Self::new(1);
4029 }
4030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4031 pub struct Snzreqen8_SPEC;
4032 pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
4033 impl Snzreqen8 {
4034 #[doc = "Disable the snooze request"]
4035 pub const _0: Self = Self::new(0);
4036
4037 #[doc = "Enable the snooze request"]
4038 pub const _1: Self = Self::new(1);
4039 }
4040 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4041 pub struct Snzreqen9_SPEC;
4042 pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
4043 impl Snzreqen9 {
4044 #[doc = "Disable the snooze request"]
4045 pub const _0: Self = Self::new(0);
4046
4047 #[doc = "Enable the snooze request"]
4048 pub const _1: Self = Self::new(1);
4049 }
4050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4051 pub struct Snzreqen10_SPEC;
4052 pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
4053 impl Snzreqen10 {
4054 #[doc = "Disable the snooze request"]
4055 pub const _0: Self = Self::new(0);
4056
4057 #[doc = "Enable the snooze request"]
4058 pub const _1: Self = Self::new(1);
4059 }
4060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4061 pub struct Snzreqen11_SPEC;
4062 pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
4063 impl Snzreqen11 {
4064 #[doc = "Disable the snooze request"]
4065 pub const _0: Self = Self::new(0);
4066
4067 #[doc = "Enable the snooze request"]
4068 pub const _1: Self = Self::new(1);
4069 }
4070 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4071 pub struct Snzreqen12_SPEC;
4072 pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
4073 impl Snzreqen12 {
4074 #[doc = "Disable the snooze request"]
4075 pub const _0: Self = Self::new(0);
4076
4077 #[doc = "Enable the snooze request"]
4078 pub const _1: Self = Self::new(1);
4079 }
4080 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4081 pub struct Snzreqen13_SPEC;
4082 pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
4083 impl Snzreqen13 {
4084 #[doc = "Disable the snooze request"]
4085 pub const _0: Self = Self::new(0);
4086
4087 #[doc = "Enable the snooze request"]
4088 pub const _1: Self = Self::new(1);
4089 }
4090 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4091 pub struct Snzreqen14_SPEC;
4092 pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
4093 impl Snzreqen14 {
4094 #[doc = "Disable the snooze request"]
4095 pub const _0: Self = Self::new(0);
4096
4097 #[doc = "Enable the snooze request"]
4098 pub const _1: Self = Self::new(1);
4099 }
4100 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4101 pub struct Snzreqen15_SPEC;
4102 pub type Snzreqen15 = crate::EnumBitfieldStruct<u8, Snzreqen15_SPEC>;
4103 impl Snzreqen15 {
4104 #[doc = "Disable the snooze request"]
4105 pub const _0: Self = Self::new(0);
4106
4107 #[doc = "Enable the snooze request"]
4108 pub const _1: Self = Self::new(1);
4109 }
4110 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4111 pub struct Snzreqen24_SPEC;
4112 pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
4113 impl Snzreqen24 {
4114 #[doc = "Disable the snooze request"]
4115 pub const _0: Self = Self::new(0);
4116
4117 #[doc = "Enable the snooze request"]
4118 pub const _1: Self = Self::new(1);
4119 }
4120 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4121 pub struct Snzreqen25_SPEC;
4122 pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
4123 impl Snzreqen25 {
4124 #[doc = "Disable the snooze request"]
4125 pub const _0: Self = Self::new(0);
4126
4127 #[doc = "Enable the snooze request"]
4128 pub const _1: Self = Self::new(1);
4129 }
4130 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4131 pub struct Snzreqen28_SPEC;
4132 pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
4133 impl Snzreqen28 {
4134 #[doc = "Disable the snooze request"]
4135 pub const _0: Self = Self::new(0);
4136
4137 #[doc = "Enable the snooze request"]
4138 pub const _1: Self = Self::new(1);
4139 }
4140 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4141 pub struct Snzreqen29_SPEC;
4142 pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
4143 impl Snzreqen29 {
4144 #[doc = "Disable the snooze request"]
4145 pub const _0: Self = Self::new(0);
4146
4147 #[doc = "Enable the snooze request"]
4148 pub const _1: Self = Self::new(1);
4149 }
4150 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4151 pub struct Snzreqen30_SPEC;
4152 pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
4153 impl Snzreqen30 {
4154 #[doc = "Disable the snooze request"]
4155 pub const _0: Self = Self::new(0);
4156
4157 #[doc = "Enable the snooze request"]
4158 pub const _1: Self = Self::new(1);
4159 }
4160}
4161#[doc(hidden)]
4162#[derive(Copy, Clone, Eq, PartialEq)]
4163pub struct Opccr_SPEC;
4164impl crate::sealed::RegSpec for Opccr_SPEC {
4165 type DataType = u8;
4166}
4167
4168#[doc = "Operating Power Control Register"]
4169pub type Opccr = crate::RegValueT<Opccr_SPEC>;
4170
4171impl Opccr {
4172 #[doc = "Operating Power Control Mode Select"]
4173 #[inline(always)]
4174 pub fn opcm(
4175 self,
4176 ) -> crate::common::RegisterField<
4177 0,
4178 0x3,
4179 1,
4180 0,
4181 opccr::Opcm,
4182 opccr::Opcm,
4183 Opccr_SPEC,
4184 crate::common::RW,
4185 > {
4186 crate::common::RegisterField::<
4187 0,
4188 0x3,
4189 1,
4190 0,
4191 opccr::Opcm,
4192 opccr::Opcm,
4193 Opccr_SPEC,
4194 crate::common::RW,
4195 >::from_register(self, 0)
4196 }
4197
4198 #[doc = "Operating Power Control Mode Transition Status Flag"]
4199 #[inline(always)]
4200 pub fn opcmtsf(
4201 self,
4202 ) -> crate::common::RegisterField<
4203 4,
4204 0x1,
4205 1,
4206 0,
4207 opccr::Opcmtsf,
4208 opccr::Opcmtsf,
4209 Opccr_SPEC,
4210 crate::common::R,
4211 > {
4212 crate::common::RegisterField::<
4213 4,
4214 0x1,
4215 1,
4216 0,
4217 opccr::Opcmtsf,
4218 opccr::Opcmtsf,
4219 Opccr_SPEC,
4220 crate::common::R,
4221 >::from_register(self, 0)
4222 }
4223}
4224impl ::core::default::Default for Opccr {
4225 #[inline(always)]
4226 fn default() -> Opccr {
4227 <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
4228 }
4229}
4230pub mod opccr {
4231
4232 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4233 pub struct Opcm_SPEC;
4234 pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
4235 impl Opcm {
4236 #[doc = "High-speed mode"]
4237 pub const _00: Self = Self::new(0);
4238
4239 #[doc = "Setting prohibited"]
4240 pub const _01: Self = Self::new(1);
4241
4242 #[doc = "Setting prohibited"]
4243 pub const _10: Self = Self::new(2);
4244
4245 #[doc = "Low-speed mode"]
4246 pub const _11: Self = Self::new(3);
4247 }
4248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4249 pub struct Opcmtsf_SPEC;
4250 pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
4251 impl Opcmtsf {
4252 #[doc = "Transition completed"]
4253 pub const _0: Self = Self::new(0);
4254
4255 #[doc = "During transition"]
4256 pub const _1: Self = Self::new(1);
4257 }
4258}
4259#[doc(hidden)]
4260#[derive(Copy, Clone, Eq, PartialEq)]
4261pub struct Moscwtcr_SPEC;
4262impl crate::sealed::RegSpec for Moscwtcr_SPEC {
4263 type DataType = u8;
4264}
4265
4266#[doc = "Main Clock Oscillator Wait Control Register"]
4267pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
4268
4269impl Moscwtcr {
4270 #[doc = "Main Clock Oscillator Wait Time Setting"]
4271 #[inline(always)]
4272 pub fn msts(
4273 self,
4274 ) -> crate::common::RegisterField<
4275 0,
4276 0xf,
4277 1,
4278 0,
4279 moscwtcr::Msts,
4280 moscwtcr::Msts,
4281 Moscwtcr_SPEC,
4282 crate::common::RW,
4283 > {
4284 crate::common::RegisterField::<
4285 0,
4286 0xf,
4287 1,
4288 0,
4289 moscwtcr::Msts,
4290 moscwtcr::Msts,
4291 Moscwtcr_SPEC,
4292 crate::common::RW,
4293 >::from_register(self, 0)
4294 }
4295}
4296impl ::core::default::Default for Moscwtcr {
4297 #[inline(always)]
4298 fn default() -> Moscwtcr {
4299 <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
4300 }
4301}
4302pub mod moscwtcr {
4303
4304 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4305 pub struct Msts_SPEC;
4306 pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
4307 impl Msts {
4308 #[doc = "Wait time = 3 cycles (11.4 us)"]
4309 pub const _0_X_0: Self = Self::new(0);
4310
4311 #[doc = "Wait time = 35 cycles (133.5 us)"]
4312 pub const _0_X_1: Self = Self::new(1);
4313
4314 #[doc = "Wait time = 67 cycles (255.6 us)"]
4315 pub const _0_X_2: Self = Self::new(2);
4316
4317 #[doc = "Wait time = 131 cycles (499.7 us)"]
4318 pub const _0_X_3: Self = Self::new(3);
4319
4320 #[doc = "Wait time = 259 cycles (988.0 us)"]
4321 pub const _0_X_4: Self = Self::new(4);
4322
4323 #[doc = "Wait time = 547 cycles (2086.6 us)"]
4324 pub const _0_X_5: Self = Self::new(5);
4325
4326 #[doc = "Wait time = 1059 cycles (4039.8 us)"]
4327 pub const _0_X_6: Self = Self::new(6);
4328
4329 #[doc = "Wait time = 2147 cycles (8190.2 us)"]
4330 pub const _0_X_7: Self = Self::new(7);
4331
4332 #[doc = "Wait time = 4291 cycles (16368.9 us)"]
4333 pub const _0_X_8: Self = Self::new(8);
4334
4335 #[doc = "Wait time = 8163 cycles (31139.4 us)"]
4336 pub const _0_X_9: Self = Self::new(9);
4337 }
4338}
4339#[doc(hidden)]
4340#[derive(Copy, Clone, Eq, PartialEq)]
4341pub struct Sopccr_SPEC;
4342impl crate::sealed::RegSpec for Sopccr_SPEC {
4343 type DataType = u8;
4344}
4345
4346#[doc = "Sub Operating Power Control Register"]
4347pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
4348
4349impl Sopccr {
4350 #[doc = "Sub Operating Power Control Mode Select"]
4351 #[inline(always)]
4352 pub fn sopcm(
4353 self,
4354 ) -> crate::common::RegisterField<
4355 0,
4356 0x1,
4357 1,
4358 0,
4359 sopccr::Sopcm,
4360 sopccr::Sopcm,
4361 Sopccr_SPEC,
4362 crate::common::RW,
4363 > {
4364 crate::common::RegisterField::<
4365 0,
4366 0x1,
4367 1,
4368 0,
4369 sopccr::Sopcm,
4370 sopccr::Sopcm,
4371 Sopccr_SPEC,
4372 crate::common::RW,
4373 >::from_register(self, 0)
4374 }
4375
4376 #[doc = "Operating Power Control Mode Transition Status Flag"]
4377 #[inline(always)]
4378 pub fn sopcmtsf(
4379 self,
4380 ) -> crate::common::RegisterField<
4381 4,
4382 0x1,
4383 1,
4384 0,
4385 sopccr::Sopcmtsf,
4386 sopccr::Sopcmtsf,
4387 Sopccr_SPEC,
4388 crate::common::R,
4389 > {
4390 crate::common::RegisterField::<
4391 4,
4392 0x1,
4393 1,
4394 0,
4395 sopccr::Sopcmtsf,
4396 sopccr::Sopcmtsf,
4397 Sopccr_SPEC,
4398 crate::common::R,
4399 >::from_register(self, 0)
4400 }
4401}
4402impl ::core::default::Default for Sopccr {
4403 #[inline(always)]
4404 fn default() -> Sopccr {
4405 <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
4406 }
4407}
4408pub mod sopccr {
4409
4410 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4411 pub struct Sopcm_SPEC;
4412 pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
4413 impl Sopcm {
4414 #[doc = "Other than Subosc-speed mode"]
4415 pub const _0: Self = Self::new(0);
4416
4417 #[doc = "Subosc-speed mode"]
4418 pub const _1: Self = Self::new(1);
4419 }
4420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4421 pub struct Sopcmtsf_SPEC;
4422 pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
4423 impl Sopcmtsf {
4424 #[doc = "Transition completed"]
4425 pub const _0: Self = Self::new(0);
4426
4427 #[doc = "During transition"]
4428 pub const _1: Self = Self::new(1);
4429 }
4430}
4431#[doc(hidden)]
4432#[derive(Copy, Clone, Eq, PartialEq)]
4433pub struct Rstsr1_SPEC;
4434impl crate::sealed::RegSpec for Rstsr1_SPEC {
4435 type DataType = u16;
4436}
4437
4438#[doc = "Reset Status Register 1"]
4439pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
4440
4441impl Rstsr1 {
4442 #[doc = "Independent Watchdog Timer Reset Detect Flag"]
4443 #[inline(always)]
4444 pub fn iwdtrf(
4445 self,
4446 ) -> crate::common::RegisterField<
4447 0,
4448 0x1,
4449 1,
4450 0,
4451 rstsr1::Iwdtrf,
4452 rstsr1::Iwdtrf,
4453 Rstsr1_SPEC,
4454 crate::common::RW,
4455 > {
4456 crate::common::RegisterField::<
4457 0,
4458 0x1,
4459 1,
4460 0,
4461 rstsr1::Iwdtrf,
4462 rstsr1::Iwdtrf,
4463 Rstsr1_SPEC,
4464 crate::common::RW,
4465 >::from_register(self, 0)
4466 }
4467
4468 #[doc = "Watchdog Timer Reset Detect Flag"]
4469 #[inline(always)]
4470 pub fn wdtrf(
4471 self,
4472 ) -> crate::common::RegisterField<
4473 1,
4474 0x1,
4475 1,
4476 0,
4477 rstsr1::Wdtrf,
4478 rstsr1::Wdtrf,
4479 Rstsr1_SPEC,
4480 crate::common::RW,
4481 > {
4482 crate::common::RegisterField::<
4483 1,
4484 0x1,
4485 1,
4486 0,
4487 rstsr1::Wdtrf,
4488 rstsr1::Wdtrf,
4489 Rstsr1_SPEC,
4490 crate::common::RW,
4491 >::from_register(self, 0)
4492 }
4493
4494 #[doc = "Software Reset Detect Flag"]
4495 #[inline(always)]
4496 pub fn swrf(
4497 self,
4498 ) -> crate::common::RegisterField<
4499 2,
4500 0x1,
4501 1,
4502 0,
4503 rstsr1::Swrf,
4504 rstsr1::Swrf,
4505 Rstsr1_SPEC,
4506 crate::common::RW,
4507 > {
4508 crate::common::RegisterField::<
4509 2,
4510 0x1,
4511 1,
4512 0,
4513 rstsr1::Swrf,
4514 rstsr1::Swrf,
4515 Rstsr1_SPEC,
4516 crate::common::RW,
4517 >::from_register(self, 0)
4518 }
4519
4520 #[doc = "SRAM Parity Error Reset Detect Flag"]
4521 #[inline(always)]
4522 pub fn rperf(
4523 self,
4524 ) -> crate::common::RegisterField<
4525 8,
4526 0x1,
4527 1,
4528 0,
4529 rstsr1::Rperf,
4530 rstsr1::Rperf,
4531 Rstsr1_SPEC,
4532 crate::common::RW,
4533 > {
4534 crate::common::RegisterField::<
4535 8,
4536 0x1,
4537 1,
4538 0,
4539 rstsr1::Rperf,
4540 rstsr1::Rperf,
4541 Rstsr1_SPEC,
4542 crate::common::RW,
4543 >::from_register(self, 0)
4544 }
4545
4546 #[doc = "SRAM ECC Error Reset Detect Flag"]
4547 #[inline(always)]
4548 pub fn reerf(
4549 self,
4550 ) -> crate::common::RegisterField<
4551 9,
4552 0x1,
4553 1,
4554 0,
4555 rstsr1::Reerf,
4556 rstsr1::Reerf,
4557 Rstsr1_SPEC,
4558 crate::common::RW,
4559 > {
4560 crate::common::RegisterField::<
4561 9,
4562 0x1,
4563 1,
4564 0,
4565 rstsr1::Reerf,
4566 rstsr1::Reerf,
4567 Rstsr1_SPEC,
4568 crate::common::RW,
4569 >::from_register(self, 0)
4570 }
4571
4572 #[doc = "Bus Master MPU Error Reset Detect Flag"]
4573 #[inline(always)]
4574 pub fn busmrf(
4575 self,
4576 ) -> crate::common::RegisterField<
4577 11,
4578 0x1,
4579 1,
4580 0,
4581 rstsr1::Busmrf,
4582 rstsr1::Busmrf,
4583 Rstsr1_SPEC,
4584 crate::common::RW,
4585 > {
4586 crate::common::RegisterField::<
4587 11,
4588 0x1,
4589 1,
4590 0,
4591 rstsr1::Busmrf,
4592 rstsr1::Busmrf,
4593 Rstsr1_SPEC,
4594 crate::common::RW,
4595 >::from_register(self, 0)
4596 }
4597
4598 #[doc = "TrustZone Error Reset Detect Flag"]
4599 #[inline(always)]
4600 pub fn tzerf(
4601 self,
4602 ) -> crate::common::RegisterField<
4603 13,
4604 0x1,
4605 1,
4606 0,
4607 rstsr1::Tzerf,
4608 rstsr1::Tzerf,
4609 Rstsr1_SPEC,
4610 crate::common::RW,
4611 > {
4612 crate::common::RegisterField::<
4613 13,
4614 0x1,
4615 1,
4616 0,
4617 rstsr1::Tzerf,
4618 rstsr1::Tzerf,
4619 Rstsr1_SPEC,
4620 crate::common::RW,
4621 >::from_register(self, 0)
4622 }
4623
4624 #[doc = "Cache Parity Error Reset Detect Flag"]
4625 #[inline(always)]
4626 pub fn cperf(
4627 self,
4628 ) -> crate::common::RegisterField<
4629 15,
4630 0x1,
4631 1,
4632 0,
4633 rstsr1::Cperf,
4634 rstsr1::Cperf,
4635 Rstsr1_SPEC,
4636 crate::common::RW,
4637 > {
4638 crate::common::RegisterField::<
4639 15,
4640 0x1,
4641 1,
4642 0,
4643 rstsr1::Cperf,
4644 rstsr1::Cperf,
4645 Rstsr1_SPEC,
4646 crate::common::RW,
4647 >::from_register(self, 0)
4648 }
4649}
4650impl ::core::default::Default for Rstsr1 {
4651 #[inline(always)]
4652 fn default() -> Rstsr1 {
4653 <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
4654 }
4655}
4656pub mod rstsr1 {
4657
4658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4659 pub struct Iwdtrf_SPEC;
4660 pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
4661 impl Iwdtrf {
4662 #[doc = "Independent watchdog timer reset not detected"]
4663 pub const _0: Self = Self::new(0);
4664
4665 #[doc = "Independent watchdog timer reset detected"]
4666 pub const _1: Self = Self::new(1);
4667 }
4668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4669 pub struct Wdtrf_SPEC;
4670 pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
4671 impl Wdtrf {
4672 #[doc = "Watchdog timer reset not detected"]
4673 pub const _0: Self = Self::new(0);
4674
4675 #[doc = "Watchdog timer reset detected"]
4676 pub const _1: Self = Self::new(1);
4677 }
4678 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4679 pub struct Swrf_SPEC;
4680 pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
4681 impl Swrf {
4682 #[doc = "Software reset not detected"]
4683 pub const _0: Self = Self::new(0);
4684
4685 #[doc = "Software reset detected"]
4686 pub const _1: Self = Self::new(1);
4687 }
4688 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4689 pub struct Rperf_SPEC;
4690 pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
4691 impl Rperf {
4692 #[doc = "SRAM parity error reset not detected"]
4693 pub const _0: Self = Self::new(0);
4694
4695 #[doc = "SRAM parity error reset detected"]
4696 pub const _1: Self = Self::new(1);
4697 }
4698 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4699 pub struct Reerf_SPEC;
4700 pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
4701 impl Reerf {
4702 #[doc = "SRAM ECC error reset not detected"]
4703 pub const _0: Self = Self::new(0);
4704
4705 #[doc = "SRAM ECC error reset detected"]
4706 pub const _1: Self = Self::new(1);
4707 }
4708 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4709 pub struct Busmrf_SPEC;
4710 pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
4711 impl Busmrf {
4712 #[doc = "Bus master MPU error reset not detected"]
4713 pub const _0: Self = Self::new(0);
4714
4715 #[doc = "Bus master MPU error reset detected"]
4716 pub const _1: Self = Self::new(1);
4717 }
4718 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4719 pub struct Tzerf_SPEC;
4720 pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
4721 impl Tzerf {
4722 #[doc = "TrustZone error reset not detected."]
4723 pub const _0: Self = Self::new(0);
4724
4725 #[doc = "TrustZone error reset detected."]
4726 pub const _1: Self = Self::new(1);
4727 }
4728 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4729 pub struct Cperf_SPEC;
4730 pub type Cperf = crate::EnumBitfieldStruct<u8, Cperf_SPEC>;
4731 impl Cperf {
4732 #[doc = "Cache Parity error reset not detected."]
4733 pub const _0: Self = Self::new(0);
4734
4735 #[doc = "Cache Parity error reset detected."]
4736 pub const _1: Self = Self::new(1);
4737 }
4738}
4739#[doc(hidden)]
4740#[derive(Copy, Clone, Eq, PartialEq)]
4741pub struct Lvd1Cr1_SPEC;
4742impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4743 type DataType = u8;
4744}
4745
4746#[doc = "Voltage Monitor 1 Circuit Control Register"]
4747pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4748
4749impl Lvd1Cr1 {
4750 #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4751 #[inline(always)]
4752 pub fn idtsel(
4753 self,
4754 ) -> crate::common::RegisterField<
4755 0,
4756 0x3,
4757 1,
4758 0,
4759 lvd1cr1::Idtsel,
4760 lvd1cr1::Idtsel,
4761 Lvd1Cr1_SPEC,
4762 crate::common::RW,
4763 > {
4764 crate::common::RegisterField::<
4765 0,
4766 0x3,
4767 1,
4768 0,
4769 lvd1cr1::Idtsel,
4770 lvd1cr1::Idtsel,
4771 Lvd1Cr1_SPEC,
4772 crate::common::RW,
4773 >::from_register(self, 0)
4774 }
4775
4776 #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4777 #[inline(always)]
4778 pub fn irqsel(
4779 self,
4780 ) -> crate::common::RegisterField<
4781 2,
4782 0x1,
4783 1,
4784 0,
4785 lvd1cr1::Irqsel,
4786 lvd1cr1::Irqsel,
4787 Lvd1Cr1_SPEC,
4788 crate::common::RW,
4789 > {
4790 crate::common::RegisterField::<
4791 2,
4792 0x1,
4793 1,
4794 0,
4795 lvd1cr1::Irqsel,
4796 lvd1cr1::Irqsel,
4797 Lvd1Cr1_SPEC,
4798 crate::common::RW,
4799 >::from_register(self, 0)
4800 }
4801}
4802impl ::core::default::Default for Lvd1Cr1 {
4803 #[inline(always)]
4804 fn default() -> Lvd1Cr1 {
4805 <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4806 }
4807}
4808pub mod lvd1cr1 {
4809
4810 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4811 pub struct Idtsel_SPEC;
4812 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4813 impl Idtsel {
4814 #[doc = "When VCC >= Vdet1 (rise) is detected"]
4815 pub const _00: Self = Self::new(0);
4816
4817 #[doc = "When VCC < Vdet1 (fall) is detected"]
4818 pub const _01: Self = Self::new(1);
4819
4820 #[doc = "When fall and rise are detected"]
4821 pub const _10: Self = Self::new(2);
4822
4823 #[doc = "Settings prohibited"]
4824 pub const _11: Self = Self::new(3);
4825 }
4826 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4827 pub struct Irqsel_SPEC;
4828 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4829 impl Irqsel {
4830 #[doc = "Non-maskable interrupt"]
4831 pub const _0: Self = Self::new(0);
4832
4833 #[doc = "Maskable interrupt"]
4834 pub const _1: Self = Self::new(1);
4835 }
4836}
4837#[doc(hidden)]
4838#[derive(Copy, Clone, Eq, PartialEq)]
4839pub struct Lvd1Sr_SPEC;
4840impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4841 type DataType = u8;
4842}
4843
4844#[doc = "Voltage Monitor 1 Circuit Status Register"]
4845pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4846
4847impl Lvd1Sr {
4848 #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4849 #[inline(always)]
4850 pub fn det(
4851 self,
4852 ) -> crate::common::RegisterField<
4853 0,
4854 0x1,
4855 1,
4856 0,
4857 lvd1sr::Det,
4858 lvd1sr::Det,
4859 Lvd1Sr_SPEC,
4860 crate::common::RW,
4861 > {
4862 crate::common::RegisterField::<
4863 0,
4864 0x1,
4865 1,
4866 0,
4867 lvd1sr::Det,
4868 lvd1sr::Det,
4869 Lvd1Sr_SPEC,
4870 crate::common::RW,
4871 >::from_register(self, 0)
4872 }
4873
4874 #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4875 #[inline(always)]
4876 pub fn mon(
4877 self,
4878 ) -> crate::common::RegisterField<
4879 1,
4880 0x1,
4881 1,
4882 0,
4883 lvd1sr::Mon,
4884 lvd1sr::Mon,
4885 Lvd1Sr_SPEC,
4886 crate::common::R,
4887 > {
4888 crate::common::RegisterField::<
4889 1,
4890 0x1,
4891 1,
4892 0,
4893 lvd1sr::Mon,
4894 lvd1sr::Mon,
4895 Lvd1Sr_SPEC,
4896 crate::common::R,
4897 >::from_register(self, 0)
4898 }
4899}
4900impl ::core::default::Default for Lvd1Sr {
4901 #[inline(always)]
4902 fn default() -> Lvd1Sr {
4903 <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4904 }
4905}
4906pub mod lvd1sr {
4907
4908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4909 pub struct Det_SPEC;
4910 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4911 impl Det {
4912 #[doc = "Not detected"]
4913 pub const _0: Self = Self::new(0);
4914
4915 #[doc = "Vdet1 crossing is detected"]
4916 pub const _1: Self = Self::new(1);
4917 }
4918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4919 pub struct Mon_SPEC;
4920 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4921 impl Mon {
4922 #[doc = "VCC < Vdet1"]
4923 pub const _0: Self = Self::new(0);
4924
4925 #[doc = "VCC >= Vdet1 or MON is disabled"]
4926 pub const _1: Self = Self::new(1);
4927 }
4928}
4929#[doc(hidden)]
4930#[derive(Copy, Clone, Eq, PartialEq)]
4931pub struct Lvd2Cr1_SPEC;
4932impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4933 type DataType = u8;
4934}
4935
4936#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4937pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4938
4939impl Lvd2Cr1 {
4940 #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4941 #[inline(always)]
4942 pub fn idtsel(
4943 self,
4944 ) -> crate::common::RegisterField<
4945 0,
4946 0x3,
4947 1,
4948 0,
4949 lvd2cr1::Idtsel,
4950 lvd2cr1::Idtsel,
4951 Lvd2Cr1_SPEC,
4952 crate::common::RW,
4953 > {
4954 crate::common::RegisterField::<
4955 0,
4956 0x3,
4957 1,
4958 0,
4959 lvd2cr1::Idtsel,
4960 lvd2cr1::Idtsel,
4961 Lvd2Cr1_SPEC,
4962 crate::common::RW,
4963 >::from_register(self, 0)
4964 }
4965
4966 #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4967 #[inline(always)]
4968 pub fn irqsel(
4969 self,
4970 ) -> crate::common::RegisterField<
4971 2,
4972 0x1,
4973 1,
4974 0,
4975 lvd2cr1::Irqsel,
4976 lvd2cr1::Irqsel,
4977 Lvd2Cr1_SPEC,
4978 crate::common::RW,
4979 > {
4980 crate::common::RegisterField::<
4981 2,
4982 0x1,
4983 1,
4984 0,
4985 lvd2cr1::Irqsel,
4986 lvd2cr1::Irqsel,
4987 Lvd2Cr1_SPEC,
4988 crate::common::RW,
4989 >::from_register(self, 0)
4990 }
4991}
4992impl ::core::default::Default for Lvd2Cr1 {
4993 #[inline(always)]
4994 fn default() -> Lvd2Cr1 {
4995 <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
4996 }
4997}
4998pub mod lvd2cr1 {
4999
5000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5001 pub struct Idtsel_SPEC;
5002 pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
5003 impl Idtsel {
5004 #[doc = "When VCC>= Vdet2 (rise) is detected"]
5005 pub const _00: Self = Self::new(0);
5006
5007 #[doc = "When VCC < Vdet2 (fall) is detected"]
5008 pub const _01: Self = Self::new(1);
5009
5010 #[doc = "When fall and rise are detected"]
5011 pub const _10: Self = Self::new(2);
5012
5013 #[doc = "Settings prohibited"]
5014 pub const _11: Self = Self::new(3);
5015 }
5016 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5017 pub struct Irqsel_SPEC;
5018 pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
5019 impl Irqsel {
5020 #[doc = "Non-maskable interrupt"]
5021 pub const _0: Self = Self::new(0);
5022
5023 #[doc = "Maskable interrupt"]
5024 pub const _1: Self = Self::new(1);
5025 }
5026}
5027#[doc(hidden)]
5028#[derive(Copy, Clone, Eq, PartialEq)]
5029pub struct Lvd2Sr_SPEC;
5030impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
5031 type DataType = u8;
5032}
5033
5034#[doc = "Voltage Monitor 2 Circuit Status Register"]
5035pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
5036
5037impl Lvd2Sr {
5038 #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
5039 #[inline(always)]
5040 pub fn det(
5041 self,
5042 ) -> crate::common::RegisterField<
5043 0,
5044 0x1,
5045 1,
5046 0,
5047 lvd2sr::Det,
5048 lvd2sr::Det,
5049 Lvd2Sr_SPEC,
5050 crate::common::RW,
5051 > {
5052 crate::common::RegisterField::<
5053 0,
5054 0x1,
5055 1,
5056 0,
5057 lvd2sr::Det,
5058 lvd2sr::Det,
5059 Lvd2Sr_SPEC,
5060 crate::common::RW,
5061 >::from_register(self, 0)
5062 }
5063
5064 #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
5065 #[inline(always)]
5066 pub fn mon(
5067 self,
5068 ) -> crate::common::RegisterField<
5069 1,
5070 0x1,
5071 1,
5072 0,
5073 lvd2sr::Mon,
5074 lvd2sr::Mon,
5075 Lvd2Sr_SPEC,
5076 crate::common::R,
5077 > {
5078 crate::common::RegisterField::<
5079 1,
5080 0x1,
5081 1,
5082 0,
5083 lvd2sr::Mon,
5084 lvd2sr::Mon,
5085 Lvd2Sr_SPEC,
5086 crate::common::R,
5087 >::from_register(self, 0)
5088 }
5089}
5090impl ::core::default::Default for Lvd2Sr {
5091 #[inline(always)]
5092 fn default() -> Lvd2Sr {
5093 <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
5094 }
5095}
5096pub mod lvd2sr {
5097
5098 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5099 pub struct Det_SPEC;
5100 pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
5101 impl Det {
5102 #[doc = "Not detected"]
5103 pub const _0: Self = Self::new(0);
5104
5105 #[doc = "Vdet2 crossing is detected"]
5106 pub const _1: Self = Self::new(1);
5107 }
5108 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5109 pub struct Mon_SPEC;
5110 pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
5111 impl Mon {
5112 #[doc = "VCC < Vdet2"]
5113 pub const _0: Self = Self::new(0);
5114
5115 #[doc = "VCC>= Vdet2 or MON is disabled"]
5116 pub const _1: Self = Self::new(1);
5117 }
5118}
5119#[doc(hidden)]
5120#[derive(Copy, Clone, Eq, PartialEq)]
5121pub struct Cgfsar_SPEC;
5122impl crate::sealed::RegSpec for Cgfsar_SPEC {
5123 type DataType = u32;
5124}
5125
5126#[doc = "Clock Generation Function Security Attribute Register"]
5127pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
5128
5129impl Cgfsar {
5130 #[doc = "Non Secure Attribute bit 00"]
5131 #[inline(always)]
5132 pub fn nonsec00(
5133 self,
5134 ) -> crate::common::RegisterField<
5135 0,
5136 0x1,
5137 1,
5138 0,
5139 cgfsar::Nonsec00,
5140 cgfsar::Nonsec00,
5141 Cgfsar_SPEC,
5142 crate::common::RW,
5143 > {
5144 crate::common::RegisterField::<
5145 0,
5146 0x1,
5147 1,
5148 0,
5149 cgfsar::Nonsec00,
5150 cgfsar::Nonsec00,
5151 Cgfsar_SPEC,
5152 crate::common::RW,
5153 >::from_register(self, 0)
5154 }
5155
5156 #[doc = "Non Secure Attribute bit 02"]
5157 #[inline(always)]
5158 pub fn nonsec02(
5159 self,
5160 ) -> crate::common::RegisterField<
5161 2,
5162 0x1,
5163 1,
5164 0,
5165 cgfsar::Nonsec02,
5166 cgfsar::Nonsec02,
5167 Cgfsar_SPEC,
5168 crate::common::RW,
5169 > {
5170 crate::common::RegisterField::<
5171 2,
5172 0x1,
5173 1,
5174 0,
5175 cgfsar::Nonsec02,
5176 cgfsar::Nonsec02,
5177 Cgfsar_SPEC,
5178 crate::common::RW,
5179 >::from_register(self, 0)
5180 }
5181
5182 #[doc = "Non Secure Attribute bit 03"]
5183 #[inline(always)]
5184 pub fn nonsec03(
5185 self,
5186 ) -> crate::common::RegisterField<
5187 3,
5188 0x1,
5189 1,
5190 0,
5191 cgfsar::Nonsec03,
5192 cgfsar::Nonsec03,
5193 Cgfsar_SPEC,
5194 crate::common::RW,
5195 > {
5196 crate::common::RegisterField::<
5197 3,
5198 0x1,
5199 1,
5200 0,
5201 cgfsar::Nonsec03,
5202 cgfsar::Nonsec03,
5203 Cgfsar_SPEC,
5204 crate::common::RW,
5205 >::from_register(self, 0)
5206 }
5207
5208 #[doc = "Non Secure Attribute bit 04"]
5209 #[inline(always)]
5210 pub fn nonsec04(
5211 self,
5212 ) -> crate::common::RegisterField<
5213 4,
5214 0x1,
5215 1,
5216 0,
5217 cgfsar::Nonsec04,
5218 cgfsar::Nonsec04,
5219 Cgfsar_SPEC,
5220 crate::common::RW,
5221 > {
5222 crate::common::RegisterField::<
5223 4,
5224 0x1,
5225 1,
5226 0,
5227 cgfsar::Nonsec04,
5228 cgfsar::Nonsec04,
5229 Cgfsar_SPEC,
5230 crate::common::RW,
5231 >::from_register(self, 0)
5232 }
5233
5234 #[doc = "Non Secure Attribute bit 05"]
5235 #[inline(always)]
5236 pub fn nonsec05(
5237 self,
5238 ) -> crate::common::RegisterField<
5239 5,
5240 0x1,
5241 1,
5242 0,
5243 cgfsar::Nonsec05,
5244 cgfsar::Nonsec05,
5245 Cgfsar_SPEC,
5246 crate::common::RW,
5247 > {
5248 crate::common::RegisterField::<
5249 5,
5250 0x1,
5251 1,
5252 0,
5253 cgfsar::Nonsec05,
5254 cgfsar::Nonsec05,
5255 Cgfsar_SPEC,
5256 crate::common::RW,
5257 >::from_register(self, 0)
5258 }
5259
5260 #[doc = "Non Secure Attribute bit 06"]
5261 #[inline(always)]
5262 pub fn nonsec06(
5263 self,
5264 ) -> crate::common::RegisterField<
5265 6,
5266 0x1,
5267 1,
5268 0,
5269 cgfsar::Nonsec06,
5270 cgfsar::Nonsec06,
5271 Cgfsar_SPEC,
5272 crate::common::RW,
5273 > {
5274 crate::common::RegisterField::<
5275 6,
5276 0x1,
5277 1,
5278 0,
5279 cgfsar::Nonsec06,
5280 cgfsar::Nonsec06,
5281 Cgfsar_SPEC,
5282 crate::common::RW,
5283 >::from_register(self, 0)
5284 }
5285
5286 #[doc = "Non Secure Attribute bit 07"]
5287 #[inline(always)]
5288 pub fn nonsec07(
5289 self,
5290 ) -> crate::common::RegisterField<
5291 7,
5292 0x1,
5293 1,
5294 0,
5295 cgfsar::Nonsec07,
5296 cgfsar::Nonsec07,
5297 Cgfsar_SPEC,
5298 crate::common::RW,
5299 > {
5300 crate::common::RegisterField::<
5301 7,
5302 0x1,
5303 1,
5304 0,
5305 cgfsar::Nonsec07,
5306 cgfsar::Nonsec07,
5307 Cgfsar_SPEC,
5308 crate::common::RW,
5309 >::from_register(self, 0)
5310 }
5311
5312 #[doc = "Non Secure Attribute bit 08"]
5313 #[inline(always)]
5314 pub fn nonsec08(
5315 self,
5316 ) -> crate::common::RegisterField<
5317 8,
5318 0x1,
5319 1,
5320 0,
5321 cgfsar::Nonsec08,
5322 cgfsar::Nonsec08,
5323 Cgfsar_SPEC,
5324 crate::common::RW,
5325 > {
5326 crate::common::RegisterField::<
5327 8,
5328 0x1,
5329 1,
5330 0,
5331 cgfsar::Nonsec08,
5332 cgfsar::Nonsec08,
5333 Cgfsar_SPEC,
5334 crate::common::RW,
5335 >::from_register(self, 0)
5336 }
5337
5338 #[doc = "Non Secure Attribute bit 09"]
5339 #[inline(always)]
5340 pub fn nonsec09(
5341 self,
5342 ) -> crate::common::RegisterField<
5343 9,
5344 0x1,
5345 1,
5346 0,
5347 cgfsar::Nonsec09,
5348 cgfsar::Nonsec09,
5349 Cgfsar_SPEC,
5350 crate::common::RW,
5351 > {
5352 crate::common::RegisterField::<
5353 9,
5354 0x1,
5355 1,
5356 0,
5357 cgfsar::Nonsec09,
5358 cgfsar::Nonsec09,
5359 Cgfsar_SPEC,
5360 crate::common::RW,
5361 >::from_register(self, 0)
5362 }
5363
5364 #[doc = "Non Secure Attribute bit 11"]
5365 #[inline(always)]
5366 pub fn nonsec11(
5367 self,
5368 ) -> crate::common::RegisterField<
5369 11,
5370 0x1,
5371 1,
5372 0,
5373 cgfsar::Nonsec11,
5374 cgfsar::Nonsec11,
5375 Cgfsar_SPEC,
5376 crate::common::RW,
5377 > {
5378 crate::common::RegisterField::<
5379 11,
5380 0x1,
5381 1,
5382 0,
5383 cgfsar::Nonsec11,
5384 cgfsar::Nonsec11,
5385 Cgfsar_SPEC,
5386 crate::common::RW,
5387 >::from_register(self, 0)
5388 }
5389
5390 #[doc = "Non Secure Attribute bit 16"]
5391 #[inline(always)]
5392 pub fn nonsec16(
5393 self,
5394 ) -> crate::common::RegisterField<
5395 16,
5396 0x1,
5397 1,
5398 0,
5399 cgfsar::Nonsec16,
5400 cgfsar::Nonsec16,
5401 Cgfsar_SPEC,
5402 crate::common::RW,
5403 > {
5404 crate::common::RegisterField::<
5405 16,
5406 0x1,
5407 1,
5408 0,
5409 cgfsar::Nonsec16,
5410 cgfsar::Nonsec16,
5411 Cgfsar_SPEC,
5412 crate::common::RW,
5413 >::from_register(self, 0)
5414 }
5415}
5416impl ::core::default::Default for Cgfsar {
5417 #[inline(always)]
5418 fn default() -> Cgfsar {
5419 <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
5420 }
5421}
5422pub mod cgfsar {
5423
5424 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5425 pub struct Nonsec00_SPEC;
5426 pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
5427 impl Nonsec00 {
5428 #[doc = "Secure"]
5429 pub const _0: Self = Self::new(0);
5430
5431 #[doc = "Non Secure"]
5432 pub const _1: Self = Self::new(1);
5433 }
5434 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5435 pub struct Nonsec02_SPEC;
5436 pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
5437 impl Nonsec02 {
5438 #[doc = "Secure"]
5439 pub const _0: Self = Self::new(0);
5440
5441 #[doc = "Non Secure"]
5442 pub const _1: Self = Self::new(1);
5443 }
5444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5445 pub struct Nonsec03_SPEC;
5446 pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
5447 impl Nonsec03 {
5448 #[doc = "Secure"]
5449 pub const _0: Self = Self::new(0);
5450
5451 #[doc = "Non Secure"]
5452 pub const _1: Self = Self::new(1);
5453 }
5454 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5455 pub struct Nonsec04_SPEC;
5456 pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
5457 impl Nonsec04 {
5458 #[doc = "Secure"]
5459 pub const _0: Self = Self::new(0);
5460
5461 #[doc = "Non Secure"]
5462 pub const _1: Self = Self::new(1);
5463 }
5464 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5465 pub struct Nonsec05_SPEC;
5466 pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
5467 impl Nonsec05 {
5468 #[doc = "Secure"]
5469 pub const _0: Self = Self::new(0);
5470
5471 #[doc = "Non Secure"]
5472 pub const _1: Self = Self::new(1);
5473 }
5474 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5475 pub struct Nonsec06_SPEC;
5476 pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
5477 impl Nonsec06 {
5478 #[doc = "Secure"]
5479 pub const _0: Self = Self::new(0);
5480
5481 #[doc = "Non Secure"]
5482 pub const _1: Self = Self::new(1);
5483 }
5484 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5485 pub struct Nonsec07_SPEC;
5486 pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
5487 impl Nonsec07 {
5488 #[doc = "Secure"]
5489 pub const _0: Self = Self::new(0);
5490
5491 #[doc = "Non Secure"]
5492 pub const _1: Self = Self::new(1);
5493 }
5494 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5495 pub struct Nonsec08_SPEC;
5496 pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
5497 impl Nonsec08 {
5498 #[doc = "Secure"]
5499 pub const _0: Self = Self::new(0);
5500
5501 #[doc = "Non Secure"]
5502 pub const _1: Self = Self::new(1);
5503 }
5504 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5505 pub struct Nonsec09_SPEC;
5506 pub type Nonsec09 = crate::EnumBitfieldStruct<u8, Nonsec09_SPEC>;
5507 impl Nonsec09 {
5508 #[doc = "Secure"]
5509 pub const _0: Self = Self::new(0);
5510
5511 #[doc = "Non Secure"]
5512 pub const _1: Self = Self::new(1);
5513 }
5514 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5515 pub struct Nonsec11_SPEC;
5516 pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
5517 impl Nonsec11 {
5518 #[doc = "Secure"]
5519 pub const _0: Self = Self::new(0);
5520
5521 #[doc = "Non Secure"]
5522 pub const _1: Self = Self::new(1);
5523 }
5524 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5525 pub struct Nonsec16_SPEC;
5526 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
5527 impl Nonsec16 {
5528 #[doc = "Secure"]
5529 pub const _0: Self = Self::new(0);
5530
5531 #[doc = "Non Secure"]
5532 pub const _1: Self = Self::new(1);
5533 }
5534}
5535#[doc(hidden)]
5536#[derive(Copy, Clone, Eq, PartialEq)]
5537pub struct Rstsar_SPEC;
5538impl crate::sealed::RegSpec for Rstsar_SPEC {
5539 type DataType = u32;
5540}
5541
5542#[doc = "Reset Security Attribution Register"]
5543pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
5544
5545impl Rstsar {
5546 #[doc = "Non Secure Attribute bit 0"]
5547 #[inline(always)]
5548 pub fn nonsec0(
5549 self,
5550 ) -> crate::common::RegisterField<
5551 0,
5552 0x1,
5553 1,
5554 0,
5555 rstsar::Nonsec0,
5556 rstsar::Nonsec0,
5557 Rstsar_SPEC,
5558 crate::common::RW,
5559 > {
5560 crate::common::RegisterField::<
5561 0,
5562 0x1,
5563 1,
5564 0,
5565 rstsar::Nonsec0,
5566 rstsar::Nonsec0,
5567 Rstsar_SPEC,
5568 crate::common::RW,
5569 >::from_register(self, 0)
5570 }
5571
5572 #[doc = "Non Secure Attribute bit 1"]
5573 #[inline(always)]
5574 pub fn nonsec1(
5575 self,
5576 ) -> crate::common::RegisterField<
5577 1,
5578 0x1,
5579 1,
5580 0,
5581 rstsar::Nonsec1,
5582 rstsar::Nonsec1,
5583 Rstsar_SPEC,
5584 crate::common::RW,
5585 > {
5586 crate::common::RegisterField::<
5587 1,
5588 0x1,
5589 1,
5590 0,
5591 rstsar::Nonsec1,
5592 rstsar::Nonsec1,
5593 Rstsar_SPEC,
5594 crate::common::RW,
5595 >::from_register(self, 0)
5596 }
5597
5598 #[doc = "Non Secure Attribute bit 2"]
5599 #[inline(always)]
5600 pub fn nonsec2(
5601 self,
5602 ) -> crate::common::RegisterField<
5603 2,
5604 0x1,
5605 1,
5606 0,
5607 rstsar::Nonsec2,
5608 rstsar::Nonsec2,
5609 Rstsar_SPEC,
5610 crate::common::RW,
5611 > {
5612 crate::common::RegisterField::<
5613 2,
5614 0x1,
5615 1,
5616 0,
5617 rstsar::Nonsec2,
5618 rstsar::Nonsec2,
5619 Rstsar_SPEC,
5620 crate::common::RW,
5621 >::from_register(self, 0)
5622 }
5623}
5624impl ::core::default::Default for Rstsar {
5625 #[inline(always)]
5626 fn default() -> Rstsar {
5627 <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
5628 }
5629}
5630pub mod rstsar {
5631
5632 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5633 pub struct Nonsec0_SPEC;
5634 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5635 impl Nonsec0 {
5636 #[doc = "Secure"]
5637 pub const _0: Self = Self::new(0);
5638
5639 #[doc = "Non Secure"]
5640 pub const _1: Self = Self::new(1);
5641 }
5642 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5643 pub struct Nonsec1_SPEC;
5644 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5645 impl Nonsec1 {
5646 #[doc = "Secure"]
5647 pub const _0: Self = Self::new(0);
5648
5649 #[doc = "Non Secure"]
5650 pub const _1: Self = Self::new(1);
5651 }
5652 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5653 pub struct Nonsec2_SPEC;
5654 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5655 impl Nonsec2 {
5656 #[doc = "Secure"]
5657 pub const _0: Self = Self::new(0);
5658
5659 #[doc = "Non Secure"]
5660 pub const _1: Self = Self::new(1);
5661 }
5662}
5663#[doc(hidden)]
5664#[derive(Copy, Clone, Eq, PartialEq)]
5665pub struct Lpmsar_SPEC;
5666impl crate::sealed::RegSpec for Lpmsar_SPEC {
5667 type DataType = u32;
5668}
5669
5670#[doc = "Low Power Mode Security Attribution Register"]
5671pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
5672
5673impl Lpmsar {
5674 #[doc = "Non Secure Attribute bit 0"]
5675 #[inline(always)]
5676 pub fn nonsec0(
5677 self,
5678 ) -> crate::common::RegisterField<
5679 0,
5680 0x1,
5681 1,
5682 0,
5683 lpmsar::Nonsec0,
5684 lpmsar::Nonsec0,
5685 Lpmsar_SPEC,
5686 crate::common::RW,
5687 > {
5688 crate::common::RegisterField::<
5689 0,
5690 0x1,
5691 1,
5692 0,
5693 lpmsar::Nonsec0,
5694 lpmsar::Nonsec0,
5695 Lpmsar_SPEC,
5696 crate::common::RW,
5697 >::from_register(self, 0)
5698 }
5699
5700 #[doc = "Non Secure Attribute bit 2"]
5701 #[inline(always)]
5702 pub fn nonsec2(
5703 self,
5704 ) -> crate::common::RegisterField<
5705 2,
5706 0x1,
5707 1,
5708 0,
5709 lpmsar::Nonsec2,
5710 lpmsar::Nonsec2,
5711 Lpmsar_SPEC,
5712 crate::common::RW,
5713 > {
5714 crate::common::RegisterField::<
5715 2,
5716 0x1,
5717 1,
5718 0,
5719 lpmsar::Nonsec2,
5720 lpmsar::Nonsec2,
5721 Lpmsar_SPEC,
5722 crate::common::RW,
5723 >::from_register(self, 0)
5724 }
5725
5726 #[doc = "Non Secure Attribute bit 4"]
5727 #[inline(always)]
5728 pub fn nonsec4(
5729 self,
5730 ) -> crate::common::RegisterField<
5731 4,
5732 0x1,
5733 1,
5734 0,
5735 lpmsar::Nonsec4,
5736 lpmsar::Nonsec4,
5737 Lpmsar_SPEC,
5738 crate::common::RW,
5739 > {
5740 crate::common::RegisterField::<
5741 4,
5742 0x1,
5743 1,
5744 0,
5745 lpmsar::Nonsec4,
5746 lpmsar::Nonsec4,
5747 Lpmsar_SPEC,
5748 crate::common::RW,
5749 >::from_register(self, 0)
5750 }
5751
5752 #[doc = "Non Secure Attribute bit 8"]
5753 #[inline(always)]
5754 pub fn nonsec8(
5755 self,
5756 ) -> crate::common::RegisterField<
5757 8,
5758 0x1,
5759 1,
5760 0,
5761 lpmsar::Nonsec8,
5762 lpmsar::Nonsec8,
5763 Lpmsar_SPEC,
5764 crate::common::RW,
5765 > {
5766 crate::common::RegisterField::<
5767 8,
5768 0x1,
5769 1,
5770 0,
5771 lpmsar::Nonsec8,
5772 lpmsar::Nonsec8,
5773 Lpmsar_SPEC,
5774 crate::common::RW,
5775 >::from_register(self, 0)
5776 }
5777
5778 #[doc = "Non Secure Attribute bit 9"]
5779 #[inline(always)]
5780 pub fn nonsec9(
5781 self,
5782 ) -> crate::common::RegisterField<
5783 9,
5784 0x1,
5785 1,
5786 0,
5787 lpmsar::Nonsec9,
5788 lpmsar::Nonsec9,
5789 Lpmsar_SPEC,
5790 crate::common::RW,
5791 > {
5792 crate::common::RegisterField::<
5793 9,
5794 0x1,
5795 1,
5796 0,
5797 lpmsar::Nonsec9,
5798 lpmsar::Nonsec9,
5799 Lpmsar_SPEC,
5800 crate::common::RW,
5801 >::from_register(self, 0)
5802 }
5803}
5804impl ::core::default::Default for Lpmsar {
5805 #[inline(always)]
5806 fn default() -> Lpmsar {
5807 <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
5808 }
5809}
5810pub mod lpmsar {
5811
5812 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5813 pub struct Nonsec0_SPEC;
5814 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5815 impl Nonsec0 {
5816 #[doc = "Secure"]
5817 pub const _0: Self = Self::new(0);
5818
5819 #[doc = "Non Secure"]
5820 pub const _1: Self = Self::new(1);
5821 }
5822 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5823 pub struct Nonsec2_SPEC;
5824 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5825 impl Nonsec2 {
5826 #[doc = "Secure"]
5827 pub const _0: Self = Self::new(0);
5828
5829 #[doc = "Non Secure"]
5830 pub const _1: Self = Self::new(1);
5831 }
5832 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5833 pub struct Nonsec4_SPEC;
5834 pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
5835 impl Nonsec4 {
5836 #[doc = "Secure"]
5837 pub const _0: Self = Self::new(0);
5838
5839 #[doc = "Non Secure"]
5840 pub const _1: Self = Self::new(1);
5841 }
5842 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5843 pub struct Nonsec8_SPEC;
5844 pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
5845 impl Nonsec8 {
5846 #[doc = "Secure"]
5847 pub const _0: Self = Self::new(0);
5848
5849 #[doc = "Non Secure"]
5850 pub const _1: Self = Self::new(1);
5851 }
5852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5853 pub struct Nonsec9_SPEC;
5854 pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
5855 impl Nonsec9 {
5856 #[doc = "Secure"]
5857 pub const _0: Self = Self::new(0);
5858
5859 #[doc = "Non Secure"]
5860 pub const _1: Self = Self::new(1);
5861 }
5862}
5863#[doc(hidden)]
5864#[derive(Copy, Clone, Eq, PartialEq)]
5865pub struct Lvdsar_SPEC;
5866impl crate::sealed::RegSpec for Lvdsar_SPEC {
5867 type DataType = u32;
5868}
5869
5870#[doc = "Low Voltage Detection Security Attribution Register"]
5871pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
5872
5873impl Lvdsar {
5874 #[doc = "Non Secure Attribute bit 0"]
5875 #[inline(always)]
5876 pub fn nonsec0(
5877 self,
5878 ) -> crate::common::RegisterField<
5879 0,
5880 0x1,
5881 1,
5882 0,
5883 lvdsar::Nonsec0,
5884 lvdsar::Nonsec0,
5885 Lvdsar_SPEC,
5886 crate::common::RW,
5887 > {
5888 crate::common::RegisterField::<
5889 0,
5890 0x1,
5891 1,
5892 0,
5893 lvdsar::Nonsec0,
5894 lvdsar::Nonsec0,
5895 Lvdsar_SPEC,
5896 crate::common::RW,
5897 >::from_register(self, 0)
5898 }
5899
5900 #[doc = "Non Secure Attribute bit 1"]
5901 #[inline(always)]
5902 pub fn nonsec1(
5903 self,
5904 ) -> crate::common::RegisterField<
5905 1,
5906 0x1,
5907 1,
5908 0,
5909 lvdsar::Nonsec1,
5910 lvdsar::Nonsec1,
5911 Lvdsar_SPEC,
5912 crate::common::RW,
5913 > {
5914 crate::common::RegisterField::<
5915 1,
5916 0x1,
5917 1,
5918 0,
5919 lvdsar::Nonsec1,
5920 lvdsar::Nonsec1,
5921 Lvdsar_SPEC,
5922 crate::common::RW,
5923 >::from_register(self, 0)
5924 }
5925}
5926impl ::core::default::Default for Lvdsar {
5927 #[inline(always)]
5928 fn default() -> Lvdsar {
5929 <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
5930 }
5931}
5932pub mod lvdsar {
5933
5934 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5935 pub struct Nonsec0_SPEC;
5936 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5937 impl Nonsec0 {
5938 #[doc = "Secure"]
5939 pub const _0: Self = Self::new(0);
5940
5941 #[doc = "Non Secure"]
5942 pub const _1: Self = Self::new(1);
5943 }
5944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5945 pub struct Nonsec1_SPEC;
5946 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5947 impl Nonsec1 {
5948 #[doc = "Secure"]
5949 pub const _0: Self = Self::new(0);
5950
5951 #[doc = "Non Secure"]
5952 pub const _1: Self = Self::new(1);
5953 }
5954}
5955#[doc(hidden)]
5956#[derive(Copy, Clone, Eq, PartialEq)]
5957pub struct Bbfsar_SPEC;
5958impl crate::sealed::RegSpec for Bbfsar_SPEC {
5959 type DataType = u32;
5960}
5961
5962#[doc = "Battery Backup Function Security Attribute Register"]
5963pub type Bbfsar = crate::RegValueT<Bbfsar_SPEC>;
5964
5965impl Bbfsar {
5966 #[doc = "Non Secure Attribute bit 0"]
5967 #[inline(always)]
5968 pub fn nonsec0(
5969 self,
5970 ) -> crate::common::RegisterField<
5971 0,
5972 0x1,
5973 1,
5974 0,
5975 bbfsar::Nonsec0,
5976 bbfsar::Nonsec0,
5977 Bbfsar_SPEC,
5978 crate::common::RW,
5979 > {
5980 crate::common::RegisterField::<
5981 0,
5982 0x1,
5983 1,
5984 0,
5985 bbfsar::Nonsec0,
5986 bbfsar::Nonsec0,
5987 Bbfsar_SPEC,
5988 crate::common::RW,
5989 >::from_register(self, 0)
5990 }
5991
5992 #[doc = "Non Secure Attribute bit 1"]
5993 #[inline(always)]
5994 pub fn nonsec1(
5995 self,
5996 ) -> crate::common::RegisterField<
5997 1,
5998 0x1,
5999 1,
6000 0,
6001 bbfsar::Nonsec1,
6002 bbfsar::Nonsec1,
6003 Bbfsar_SPEC,
6004 crate::common::RW,
6005 > {
6006 crate::common::RegisterField::<
6007 1,
6008 0x1,
6009 1,
6010 0,
6011 bbfsar::Nonsec1,
6012 bbfsar::Nonsec1,
6013 Bbfsar_SPEC,
6014 crate::common::RW,
6015 >::from_register(self, 0)
6016 }
6017
6018 #[doc = "Non Secure Attribute bit 2"]
6019 #[inline(always)]
6020 pub fn nonsec2(
6021 self,
6022 ) -> crate::common::RegisterField<
6023 2,
6024 0x1,
6025 1,
6026 0,
6027 bbfsar::Nonsec2,
6028 bbfsar::Nonsec2,
6029 Bbfsar_SPEC,
6030 crate::common::RW,
6031 > {
6032 crate::common::RegisterField::<
6033 2,
6034 0x1,
6035 1,
6036 0,
6037 bbfsar::Nonsec2,
6038 bbfsar::Nonsec2,
6039 Bbfsar_SPEC,
6040 crate::common::RW,
6041 >::from_register(self, 0)
6042 }
6043
6044 #[doc = "Non Secure Attribute bit 16"]
6045 #[inline(always)]
6046 pub fn nonsec16(
6047 self,
6048 ) -> crate::common::RegisterField<
6049 16,
6050 0x1,
6051 1,
6052 0,
6053 bbfsar::Nonsec16,
6054 bbfsar::Nonsec16,
6055 Bbfsar_SPEC,
6056 crate::common::RW,
6057 > {
6058 crate::common::RegisterField::<
6059 16,
6060 0x1,
6061 1,
6062 0,
6063 bbfsar::Nonsec16,
6064 bbfsar::Nonsec16,
6065 Bbfsar_SPEC,
6066 crate::common::RW,
6067 >::from_register(self, 0)
6068 }
6069
6070 #[doc = "Non Secure Attribute bit 17"]
6071 #[inline(always)]
6072 pub fn nonsec17(
6073 self,
6074 ) -> crate::common::RegisterField<
6075 17,
6076 0x1,
6077 1,
6078 0,
6079 bbfsar::Nonsec17,
6080 bbfsar::Nonsec17,
6081 Bbfsar_SPEC,
6082 crate::common::RW,
6083 > {
6084 crate::common::RegisterField::<
6085 17,
6086 0x1,
6087 1,
6088 0,
6089 bbfsar::Nonsec17,
6090 bbfsar::Nonsec17,
6091 Bbfsar_SPEC,
6092 crate::common::RW,
6093 >::from_register(self, 0)
6094 }
6095
6096 #[doc = "Non Secure Attribute bit 18"]
6097 #[inline(always)]
6098 pub fn nonsec18(
6099 self,
6100 ) -> crate::common::RegisterField<
6101 18,
6102 0x1,
6103 1,
6104 0,
6105 bbfsar::Nonsec18,
6106 bbfsar::Nonsec18,
6107 Bbfsar_SPEC,
6108 crate::common::RW,
6109 > {
6110 crate::common::RegisterField::<
6111 18,
6112 0x1,
6113 1,
6114 0,
6115 bbfsar::Nonsec18,
6116 bbfsar::Nonsec18,
6117 Bbfsar_SPEC,
6118 crate::common::RW,
6119 >::from_register(self, 0)
6120 }
6121
6122 #[doc = "Non Secure Attribute bit 19"]
6123 #[inline(always)]
6124 pub fn nonsec19(
6125 self,
6126 ) -> crate::common::RegisterField<
6127 19,
6128 0x1,
6129 1,
6130 0,
6131 bbfsar::Nonsec19,
6132 bbfsar::Nonsec19,
6133 Bbfsar_SPEC,
6134 crate::common::RW,
6135 > {
6136 crate::common::RegisterField::<
6137 19,
6138 0x1,
6139 1,
6140 0,
6141 bbfsar::Nonsec19,
6142 bbfsar::Nonsec19,
6143 Bbfsar_SPEC,
6144 crate::common::RW,
6145 >::from_register(self, 0)
6146 }
6147
6148 #[doc = "Non Secure Attribute bit 20"]
6149 #[inline(always)]
6150 pub fn nonsec20(
6151 self,
6152 ) -> crate::common::RegisterField<
6153 20,
6154 0x1,
6155 1,
6156 0,
6157 bbfsar::Nonsec20,
6158 bbfsar::Nonsec20,
6159 Bbfsar_SPEC,
6160 crate::common::RW,
6161 > {
6162 crate::common::RegisterField::<
6163 20,
6164 0x1,
6165 1,
6166 0,
6167 bbfsar::Nonsec20,
6168 bbfsar::Nonsec20,
6169 Bbfsar_SPEC,
6170 crate::common::RW,
6171 >::from_register(self, 0)
6172 }
6173
6174 #[doc = "Non Secure Attribute bit 21"]
6175 #[inline(always)]
6176 pub fn nonsec21(
6177 self,
6178 ) -> crate::common::RegisterField<
6179 21,
6180 0x1,
6181 1,
6182 0,
6183 bbfsar::Nonsec21,
6184 bbfsar::Nonsec21,
6185 Bbfsar_SPEC,
6186 crate::common::RW,
6187 > {
6188 crate::common::RegisterField::<
6189 21,
6190 0x1,
6191 1,
6192 0,
6193 bbfsar::Nonsec21,
6194 bbfsar::Nonsec21,
6195 Bbfsar_SPEC,
6196 crate::common::RW,
6197 >::from_register(self, 0)
6198 }
6199
6200 #[doc = "Non Secure Attribute bit 22"]
6201 #[inline(always)]
6202 pub fn nonsec22(
6203 self,
6204 ) -> crate::common::RegisterField<
6205 22,
6206 0x1,
6207 1,
6208 0,
6209 bbfsar::Nonsec22,
6210 bbfsar::Nonsec22,
6211 Bbfsar_SPEC,
6212 crate::common::RW,
6213 > {
6214 crate::common::RegisterField::<
6215 22,
6216 0x1,
6217 1,
6218 0,
6219 bbfsar::Nonsec22,
6220 bbfsar::Nonsec22,
6221 Bbfsar_SPEC,
6222 crate::common::RW,
6223 >::from_register(self, 0)
6224 }
6225
6226 #[doc = "Non Secure Attribute bit 23"]
6227 #[inline(always)]
6228 pub fn nonsec23(
6229 self,
6230 ) -> crate::common::RegisterField<
6231 23,
6232 0x1,
6233 1,
6234 0,
6235 bbfsar::Nonsec23,
6236 bbfsar::Nonsec23,
6237 Bbfsar_SPEC,
6238 crate::common::RW,
6239 > {
6240 crate::common::RegisterField::<
6241 23,
6242 0x1,
6243 1,
6244 0,
6245 bbfsar::Nonsec23,
6246 bbfsar::Nonsec23,
6247 Bbfsar_SPEC,
6248 crate::common::RW,
6249 >::from_register(self, 0)
6250 }
6251}
6252impl ::core::default::Default for Bbfsar {
6253 #[inline(always)]
6254 fn default() -> Bbfsar {
6255 <crate::RegValueT<Bbfsar_SPEC> as RegisterValue<_>>::new(65535)
6256 }
6257}
6258pub mod bbfsar {
6259
6260 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6261 pub struct Nonsec0_SPEC;
6262 pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
6263 impl Nonsec0 {
6264 #[doc = "Secure"]
6265 pub const _0: Self = Self::new(0);
6266
6267 #[doc = "Non Secure"]
6268 pub const _1: Self = Self::new(1);
6269 }
6270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6271 pub struct Nonsec1_SPEC;
6272 pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
6273 impl Nonsec1 {
6274 #[doc = "Secure"]
6275 pub const _0: Self = Self::new(0);
6276
6277 #[doc = "Non Secure"]
6278 pub const _1: Self = Self::new(1);
6279 }
6280 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6281 pub struct Nonsec2_SPEC;
6282 pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
6283 impl Nonsec2 {
6284 #[doc = "Secure"]
6285 pub const _0: Self = Self::new(0);
6286
6287 #[doc = "Non Secure"]
6288 pub const _1: Self = Self::new(1);
6289 }
6290 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6291 pub struct Nonsec16_SPEC;
6292 pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
6293 impl Nonsec16 {
6294 #[doc = "Secure"]
6295 pub const _0: Self = Self::new(0);
6296
6297 #[doc = "Non Secure"]
6298 pub const _1: Self = Self::new(1);
6299 }
6300 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6301 pub struct Nonsec17_SPEC;
6302 pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
6303 impl Nonsec17 {
6304 #[doc = "Secure"]
6305 pub const _0: Self = Self::new(0);
6306
6307 #[doc = "Non Secure"]
6308 pub const _1: Self = Self::new(1);
6309 }
6310 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6311 pub struct Nonsec18_SPEC;
6312 pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
6313 impl Nonsec18 {
6314 #[doc = "Secure"]
6315 pub const _0: Self = Self::new(0);
6316
6317 #[doc = "Non Secure"]
6318 pub const _1: Self = Self::new(1);
6319 }
6320 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6321 pub struct Nonsec19_SPEC;
6322 pub type Nonsec19 = crate::EnumBitfieldStruct<u8, Nonsec19_SPEC>;
6323 impl Nonsec19 {
6324 #[doc = "Secure"]
6325 pub const _0: Self = Self::new(0);
6326
6327 #[doc = "Non Secure"]
6328 pub const _1: Self = Self::new(1);
6329 }
6330 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6331 pub struct Nonsec20_SPEC;
6332 pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
6333 impl Nonsec20 {
6334 #[doc = "Secure"]
6335 pub const _0: Self = Self::new(0);
6336
6337 #[doc = "Non Secure"]
6338 pub const _1: Self = Self::new(1);
6339 }
6340 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6341 pub struct Nonsec21_SPEC;
6342 pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
6343 impl Nonsec21 {
6344 #[doc = "Secure"]
6345 pub const _0: Self = Self::new(0);
6346
6347 #[doc = "Non Secure"]
6348 pub const _1: Self = Self::new(1);
6349 }
6350 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6351 pub struct Nonsec22_SPEC;
6352 pub type Nonsec22 = crate::EnumBitfieldStruct<u8, Nonsec22_SPEC>;
6353 impl Nonsec22 {
6354 #[doc = "Secure"]
6355 pub const _0: Self = Self::new(0);
6356
6357 #[doc = "Non Secure"]
6358 pub const _1: Self = Self::new(1);
6359 }
6360 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6361 pub struct Nonsec23_SPEC;
6362 pub type Nonsec23 = crate::EnumBitfieldStruct<u8, Nonsec23_SPEC>;
6363 impl Nonsec23 {
6364 #[doc = "Secure"]
6365 pub const _0: Self = Self::new(0);
6366
6367 #[doc = "Non Secure"]
6368 pub const _1: Self = Self::new(1);
6369 }
6370}
6371#[doc(hidden)]
6372#[derive(Copy, Clone, Eq, PartialEq)]
6373pub struct Dpfsar_SPEC;
6374impl crate::sealed::RegSpec for Dpfsar_SPEC {
6375 type DataType = u32;
6376}
6377
6378#[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
6379pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
6380
6381impl Dpfsar {
6382 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6383 #[inline(always)]
6384 pub fn dpfsa0(
6385 self,
6386 ) -> crate::common::RegisterField<
6387 0,
6388 0x1,
6389 1,
6390 0,
6391 dpfsar::Dpfsa0,
6392 dpfsar::Dpfsa0,
6393 Dpfsar_SPEC,
6394 crate::common::RW,
6395 > {
6396 crate::common::RegisterField::<
6397 0,
6398 0x1,
6399 1,
6400 0,
6401 dpfsar::Dpfsa0,
6402 dpfsar::Dpfsa0,
6403 Dpfsar_SPEC,
6404 crate::common::RW,
6405 >::from_register(self, 0)
6406 }
6407
6408 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6409 #[inline(always)]
6410 pub fn dpfsa1(
6411 self,
6412 ) -> crate::common::RegisterField<
6413 1,
6414 0x1,
6415 1,
6416 0,
6417 dpfsar::Dpfsa1,
6418 dpfsar::Dpfsa1,
6419 Dpfsar_SPEC,
6420 crate::common::RW,
6421 > {
6422 crate::common::RegisterField::<
6423 1,
6424 0x1,
6425 1,
6426 0,
6427 dpfsar::Dpfsa1,
6428 dpfsar::Dpfsa1,
6429 Dpfsar_SPEC,
6430 crate::common::RW,
6431 >::from_register(self, 0)
6432 }
6433
6434 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6435 #[inline(always)]
6436 pub fn dpfsa2(
6437 self,
6438 ) -> crate::common::RegisterField<
6439 2,
6440 0x1,
6441 1,
6442 0,
6443 dpfsar::Dpfsa2,
6444 dpfsar::Dpfsa2,
6445 Dpfsar_SPEC,
6446 crate::common::RW,
6447 > {
6448 crate::common::RegisterField::<
6449 2,
6450 0x1,
6451 1,
6452 0,
6453 dpfsar::Dpfsa2,
6454 dpfsar::Dpfsa2,
6455 Dpfsar_SPEC,
6456 crate::common::RW,
6457 >::from_register(self, 0)
6458 }
6459
6460 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6461 #[inline(always)]
6462 pub fn dpfsa3(
6463 self,
6464 ) -> crate::common::RegisterField<
6465 3,
6466 0x1,
6467 1,
6468 0,
6469 dpfsar::Dpfsa3,
6470 dpfsar::Dpfsa3,
6471 Dpfsar_SPEC,
6472 crate::common::RW,
6473 > {
6474 crate::common::RegisterField::<
6475 3,
6476 0x1,
6477 1,
6478 0,
6479 dpfsar::Dpfsa3,
6480 dpfsar::Dpfsa3,
6481 Dpfsar_SPEC,
6482 crate::common::RW,
6483 >::from_register(self, 0)
6484 }
6485
6486 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6487 #[inline(always)]
6488 pub fn dpfsa4(
6489 self,
6490 ) -> crate::common::RegisterField<
6491 4,
6492 0x1,
6493 1,
6494 0,
6495 dpfsar::Dpfsa4,
6496 dpfsar::Dpfsa4,
6497 Dpfsar_SPEC,
6498 crate::common::RW,
6499 > {
6500 crate::common::RegisterField::<
6501 4,
6502 0x1,
6503 1,
6504 0,
6505 dpfsar::Dpfsa4,
6506 dpfsar::Dpfsa4,
6507 Dpfsar_SPEC,
6508 crate::common::RW,
6509 >::from_register(self, 0)
6510 }
6511
6512 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6513 #[inline(always)]
6514 pub fn dpfsa5(
6515 self,
6516 ) -> crate::common::RegisterField<
6517 5,
6518 0x1,
6519 1,
6520 0,
6521 dpfsar::Dpfsa5,
6522 dpfsar::Dpfsa5,
6523 Dpfsar_SPEC,
6524 crate::common::RW,
6525 > {
6526 crate::common::RegisterField::<
6527 5,
6528 0x1,
6529 1,
6530 0,
6531 dpfsar::Dpfsa5,
6532 dpfsar::Dpfsa5,
6533 Dpfsar_SPEC,
6534 crate::common::RW,
6535 >::from_register(self, 0)
6536 }
6537
6538 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6539 #[inline(always)]
6540 pub fn dpfsa6(
6541 self,
6542 ) -> crate::common::RegisterField<
6543 6,
6544 0x1,
6545 1,
6546 0,
6547 dpfsar::Dpfsa6,
6548 dpfsar::Dpfsa6,
6549 Dpfsar_SPEC,
6550 crate::common::RW,
6551 > {
6552 crate::common::RegisterField::<
6553 6,
6554 0x1,
6555 1,
6556 0,
6557 dpfsar::Dpfsa6,
6558 dpfsar::Dpfsa6,
6559 Dpfsar_SPEC,
6560 crate::common::RW,
6561 >::from_register(self, 0)
6562 }
6563
6564 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
6565 #[inline(always)]
6566 pub fn dpfsa7(
6567 self,
6568 ) -> crate::common::RegisterField<
6569 7,
6570 0x1,
6571 1,
6572 0,
6573 dpfsar::Dpfsa7,
6574 dpfsar::Dpfsa7,
6575 Dpfsar_SPEC,
6576 crate::common::RW,
6577 > {
6578 crate::common::RegisterField::<
6579 7,
6580 0x1,
6581 1,
6582 0,
6583 dpfsar::Dpfsa7,
6584 dpfsar::Dpfsa7,
6585 Dpfsar_SPEC,
6586 crate::common::RW,
6587 >::from_register(self, 0)
6588 }
6589
6590 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6591 #[inline(always)]
6592 pub fn dpfsa08(
6593 self,
6594 ) -> crate::common::RegisterField<
6595 8,
6596 0x1,
6597 1,
6598 0,
6599 dpfsar::Dpfsa08,
6600 dpfsar::Dpfsa08,
6601 Dpfsar_SPEC,
6602 crate::common::RW,
6603 > {
6604 crate::common::RegisterField::<
6605 8,
6606 0x1,
6607 1,
6608 0,
6609 dpfsar::Dpfsa08,
6610 dpfsar::Dpfsa08,
6611 Dpfsar_SPEC,
6612 crate::common::RW,
6613 >::from_register(self, 0)
6614 }
6615
6616 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6617 #[inline(always)]
6618 pub fn dpfsa09(
6619 self,
6620 ) -> crate::common::RegisterField<
6621 9,
6622 0x1,
6623 1,
6624 0,
6625 dpfsar::Dpfsa09,
6626 dpfsar::Dpfsa09,
6627 Dpfsar_SPEC,
6628 crate::common::RW,
6629 > {
6630 crate::common::RegisterField::<
6631 9,
6632 0x1,
6633 1,
6634 0,
6635 dpfsar::Dpfsa09,
6636 dpfsar::Dpfsa09,
6637 Dpfsar_SPEC,
6638 crate::common::RW,
6639 >::from_register(self, 0)
6640 }
6641
6642 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6643 #[inline(always)]
6644 pub fn dpfsa10(
6645 self,
6646 ) -> crate::common::RegisterField<
6647 10,
6648 0x1,
6649 1,
6650 0,
6651 dpfsar::Dpfsa10,
6652 dpfsar::Dpfsa10,
6653 Dpfsar_SPEC,
6654 crate::common::RW,
6655 > {
6656 crate::common::RegisterField::<
6657 10,
6658 0x1,
6659 1,
6660 0,
6661 dpfsar::Dpfsa10,
6662 dpfsar::Dpfsa10,
6663 Dpfsar_SPEC,
6664 crate::common::RW,
6665 >::from_register(self, 0)
6666 }
6667
6668 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6669 #[inline(always)]
6670 pub fn dpfsa11(
6671 self,
6672 ) -> crate::common::RegisterField<
6673 11,
6674 0x1,
6675 1,
6676 0,
6677 dpfsar::Dpfsa11,
6678 dpfsar::Dpfsa11,
6679 Dpfsar_SPEC,
6680 crate::common::RW,
6681 > {
6682 crate::common::RegisterField::<
6683 11,
6684 0x1,
6685 1,
6686 0,
6687 dpfsar::Dpfsa11,
6688 dpfsar::Dpfsa11,
6689 Dpfsar_SPEC,
6690 crate::common::RW,
6691 >::from_register(self, 0)
6692 }
6693
6694 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6695 #[inline(always)]
6696 pub fn dpfsa12(
6697 self,
6698 ) -> crate::common::RegisterField<
6699 12,
6700 0x1,
6701 1,
6702 0,
6703 dpfsar::Dpfsa12,
6704 dpfsar::Dpfsa12,
6705 Dpfsar_SPEC,
6706 crate::common::RW,
6707 > {
6708 crate::common::RegisterField::<
6709 12,
6710 0x1,
6711 1,
6712 0,
6713 dpfsar::Dpfsa12,
6714 dpfsar::Dpfsa12,
6715 Dpfsar_SPEC,
6716 crate::common::RW,
6717 >::from_register(self, 0)
6718 }
6719
6720 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6721 #[inline(always)]
6722 pub fn dpfsa13(
6723 self,
6724 ) -> crate::common::RegisterField<
6725 13,
6726 0x1,
6727 1,
6728 0,
6729 dpfsar::Dpfsa13,
6730 dpfsar::Dpfsa13,
6731 Dpfsar_SPEC,
6732 crate::common::RW,
6733 > {
6734 crate::common::RegisterField::<
6735 13,
6736 0x1,
6737 1,
6738 0,
6739 dpfsar::Dpfsa13,
6740 dpfsar::Dpfsa13,
6741 Dpfsar_SPEC,
6742 crate::common::RW,
6743 >::from_register(self, 0)
6744 }
6745
6746 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6747 #[inline(always)]
6748 pub fn dpfsa14(
6749 self,
6750 ) -> crate::common::RegisterField<
6751 14,
6752 0x1,
6753 1,
6754 0,
6755 dpfsar::Dpfsa14,
6756 dpfsar::Dpfsa14,
6757 Dpfsar_SPEC,
6758 crate::common::RW,
6759 > {
6760 crate::common::RegisterField::<
6761 14,
6762 0x1,
6763 1,
6764 0,
6765 dpfsar::Dpfsa14,
6766 dpfsar::Dpfsa14,
6767 Dpfsar_SPEC,
6768 crate::common::RW,
6769 >::from_register(self, 0)
6770 }
6771
6772 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
6773 #[inline(always)]
6774 pub fn dpfsa15(
6775 self,
6776 ) -> crate::common::RegisterField<
6777 15,
6778 0x1,
6779 1,
6780 0,
6781 dpfsar::Dpfsa15,
6782 dpfsar::Dpfsa15,
6783 Dpfsar_SPEC,
6784 crate::common::RW,
6785 > {
6786 crate::common::RegisterField::<
6787 15,
6788 0x1,
6789 1,
6790 0,
6791 dpfsar::Dpfsa15,
6792 dpfsar::Dpfsa15,
6793 Dpfsar_SPEC,
6794 crate::common::RW,
6795 >::from_register(self, 0)
6796 }
6797
6798 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 16"]
6799 #[inline(always)]
6800 pub fn dpfsa16(
6801 self,
6802 ) -> crate::common::RegisterField<
6803 16,
6804 0x1,
6805 1,
6806 0,
6807 dpfsar::Dpfsa16,
6808 dpfsar::Dpfsa16,
6809 Dpfsar_SPEC,
6810 crate::common::RW,
6811 > {
6812 crate::common::RegisterField::<
6813 16,
6814 0x1,
6815 1,
6816 0,
6817 dpfsar::Dpfsa16,
6818 dpfsar::Dpfsa16,
6819 Dpfsar_SPEC,
6820 crate::common::RW,
6821 >::from_register(self, 0)
6822 }
6823
6824 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 17"]
6825 #[inline(always)]
6826 pub fn dpfsa17(
6827 self,
6828 ) -> crate::common::RegisterField<
6829 17,
6830 0x1,
6831 1,
6832 0,
6833 dpfsar::Dpfsa17,
6834 dpfsar::Dpfsa17,
6835 Dpfsar_SPEC,
6836 crate::common::RW,
6837 > {
6838 crate::common::RegisterField::<
6839 17,
6840 0x1,
6841 1,
6842 0,
6843 dpfsar::Dpfsa17,
6844 dpfsar::Dpfsa17,
6845 Dpfsar_SPEC,
6846 crate::common::RW,
6847 >::from_register(self, 0)
6848 }
6849
6850 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 18"]
6851 #[inline(always)]
6852 pub fn dpfsa18(
6853 self,
6854 ) -> crate::common::RegisterField<
6855 18,
6856 0x1,
6857 1,
6858 0,
6859 dpfsar::Dpfsa18,
6860 dpfsar::Dpfsa18,
6861 Dpfsar_SPEC,
6862 crate::common::RW,
6863 > {
6864 crate::common::RegisterField::<
6865 18,
6866 0x1,
6867 1,
6868 0,
6869 dpfsar::Dpfsa18,
6870 dpfsar::Dpfsa18,
6871 Dpfsar_SPEC,
6872 crate::common::RW,
6873 >::from_register(self, 0)
6874 }
6875
6876 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 19"]
6877 #[inline(always)]
6878 pub fn dpfsa19(
6879 self,
6880 ) -> crate::common::RegisterField<
6881 19,
6882 0x1,
6883 1,
6884 0,
6885 dpfsar::Dpfsa19,
6886 dpfsar::Dpfsa19,
6887 Dpfsar_SPEC,
6888 crate::common::RW,
6889 > {
6890 crate::common::RegisterField::<
6891 19,
6892 0x1,
6893 1,
6894 0,
6895 dpfsar::Dpfsa19,
6896 dpfsar::Dpfsa19,
6897 Dpfsar_SPEC,
6898 crate::common::RW,
6899 >::from_register(self, 0)
6900 }
6901
6902 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 20"]
6903 #[inline(always)]
6904 pub fn dpfsa20(
6905 self,
6906 ) -> crate::common::RegisterField<
6907 20,
6908 0x1,
6909 1,
6910 0,
6911 dpfsar::Dpfsa20,
6912 dpfsar::Dpfsa20,
6913 Dpfsar_SPEC,
6914 crate::common::RW,
6915 > {
6916 crate::common::RegisterField::<
6917 20,
6918 0x1,
6919 1,
6920 0,
6921 dpfsar::Dpfsa20,
6922 dpfsar::Dpfsa20,
6923 Dpfsar_SPEC,
6924 crate::common::RW,
6925 >::from_register(self, 0)
6926 }
6927
6928 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 24"]
6929 #[inline(always)]
6930 pub fn dpfsa24(
6931 self,
6932 ) -> crate::common::RegisterField<
6933 24,
6934 0x1,
6935 1,
6936 0,
6937 dpfsar::Dpfsa24,
6938 dpfsar::Dpfsa24,
6939 Dpfsar_SPEC,
6940 crate::common::RW,
6941 > {
6942 crate::common::RegisterField::<
6943 24,
6944 0x1,
6945 1,
6946 0,
6947 dpfsar::Dpfsa24,
6948 dpfsar::Dpfsa24,
6949 Dpfsar_SPEC,
6950 crate::common::RW,
6951 >::from_register(self, 0)
6952 }
6953
6954 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 26"]
6955 #[inline(always)]
6956 pub fn dpfsa26(
6957 self,
6958 ) -> crate::common::RegisterField<
6959 26,
6960 0x1,
6961 1,
6962 0,
6963 dpfsar::Dpfsa26,
6964 dpfsar::Dpfsa26,
6965 Dpfsar_SPEC,
6966 crate::common::RW,
6967 > {
6968 crate::common::RegisterField::<
6969 26,
6970 0x1,
6971 1,
6972 0,
6973 dpfsar::Dpfsa26,
6974 dpfsar::Dpfsa26,
6975 Dpfsar_SPEC,
6976 crate::common::RW,
6977 >::from_register(self, 0)
6978 }
6979
6980 #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 27"]
6981 #[inline(always)]
6982 pub fn dpfsa27(
6983 self,
6984 ) -> crate::common::RegisterField<
6985 27,
6986 0x1,
6987 1,
6988 0,
6989 dpfsar::Dpfsa27,
6990 dpfsar::Dpfsa27,
6991 Dpfsar_SPEC,
6992 crate::common::RW,
6993 > {
6994 crate::common::RegisterField::<
6995 27,
6996 0x1,
6997 1,
6998 0,
6999 dpfsar::Dpfsa27,
7000 dpfsar::Dpfsa27,
7001 Dpfsar_SPEC,
7002 crate::common::RW,
7003 >::from_register(self, 0)
7004 }
7005}
7006impl ::core::default::Default for Dpfsar {
7007 #[inline(always)]
7008 fn default() -> Dpfsar {
7009 <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
7010 }
7011}
7012pub mod dpfsar {
7013
7014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7015 pub struct Dpfsa0_SPEC;
7016 pub type Dpfsa0 = crate::EnumBitfieldStruct<u8, Dpfsa0_SPEC>;
7017 impl Dpfsa0 {
7018 #[doc = "Secure"]
7019 pub const _0: Self = Self::new(0);
7020
7021 #[doc = "Non Secure"]
7022 pub const _1: Self = Self::new(1);
7023 }
7024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7025 pub struct Dpfsa1_SPEC;
7026 pub type Dpfsa1 = crate::EnumBitfieldStruct<u8, Dpfsa1_SPEC>;
7027 impl Dpfsa1 {
7028 #[doc = "Secure"]
7029 pub const _0: Self = Self::new(0);
7030
7031 #[doc = "Non Secure"]
7032 pub const _1: Self = Self::new(1);
7033 }
7034 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7035 pub struct Dpfsa2_SPEC;
7036 pub type Dpfsa2 = crate::EnumBitfieldStruct<u8, Dpfsa2_SPEC>;
7037 impl Dpfsa2 {
7038 #[doc = "Secure"]
7039 pub const _0: Self = Self::new(0);
7040
7041 #[doc = "Non Secure"]
7042 pub const _1: Self = Self::new(1);
7043 }
7044 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7045 pub struct Dpfsa3_SPEC;
7046 pub type Dpfsa3 = crate::EnumBitfieldStruct<u8, Dpfsa3_SPEC>;
7047 impl Dpfsa3 {
7048 #[doc = "Secure"]
7049 pub const _0: Self = Self::new(0);
7050
7051 #[doc = "Non Secure"]
7052 pub const _1: Self = Self::new(1);
7053 }
7054 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7055 pub struct Dpfsa4_SPEC;
7056 pub type Dpfsa4 = crate::EnumBitfieldStruct<u8, Dpfsa4_SPEC>;
7057 impl Dpfsa4 {
7058 #[doc = "Secure"]
7059 pub const _0: Self = Self::new(0);
7060
7061 #[doc = "Non Secure"]
7062 pub const _1: Self = Self::new(1);
7063 }
7064 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7065 pub struct Dpfsa5_SPEC;
7066 pub type Dpfsa5 = crate::EnumBitfieldStruct<u8, Dpfsa5_SPEC>;
7067 impl Dpfsa5 {
7068 #[doc = "Secure"]
7069 pub const _0: Self = Self::new(0);
7070
7071 #[doc = "Non Secure"]
7072 pub const _1: Self = Self::new(1);
7073 }
7074 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7075 pub struct Dpfsa6_SPEC;
7076 pub type Dpfsa6 = crate::EnumBitfieldStruct<u8, Dpfsa6_SPEC>;
7077 impl Dpfsa6 {
7078 #[doc = "Secure"]
7079 pub const _0: Self = Self::new(0);
7080
7081 #[doc = "Non Secure"]
7082 pub const _1: Self = Self::new(1);
7083 }
7084 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7085 pub struct Dpfsa7_SPEC;
7086 pub type Dpfsa7 = crate::EnumBitfieldStruct<u8, Dpfsa7_SPEC>;
7087 impl Dpfsa7 {
7088 #[doc = "Secure"]
7089 pub const _0: Self = Self::new(0);
7090
7091 #[doc = "Non Secure"]
7092 pub const _1: Self = Self::new(1);
7093 }
7094 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7095 pub struct Dpfsa08_SPEC;
7096 pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
7097 impl Dpfsa08 {
7098 #[doc = "Secure"]
7099 pub const _0: Self = Self::new(0);
7100
7101 #[doc = "Non Secure"]
7102 pub const _1: Self = Self::new(1);
7103 }
7104 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7105 pub struct Dpfsa09_SPEC;
7106 pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
7107 impl Dpfsa09 {
7108 #[doc = "Secure"]
7109 pub const _0: Self = Self::new(0);
7110
7111 #[doc = "Non Secure"]
7112 pub const _1: Self = Self::new(1);
7113 }
7114 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7115 pub struct Dpfsa10_SPEC;
7116 pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
7117 impl Dpfsa10 {
7118 #[doc = "Secure"]
7119 pub const _0: Self = Self::new(0);
7120
7121 #[doc = "Non Secure"]
7122 pub const _1: Self = Self::new(1);
7123 }
7124 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7125 pub struct Dpfsa11_SPEC;
7126 pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
7127 impl Dpfsa11 {
7128 #[doc = "Secure"]
7129 pub const _0: Self = Self::new(0);
7130
7131 #[doc = "Non Secure"]
7132 pub const _1: Self = Self::new(1);
7133 }
7134 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7135 pub struct Dpfsa12_SPEC;
7136 pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
7137 impl Dpfsa12 {
7138 #[doc = "Secure"]
7139 pub const _0: Self = Self::new(0);
7140
7141 #[doc = "Non Secure"]
7142 pub const _1: Self = Self::new(1);
7143 }
7144 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7145 pub struct Dpfsa13_SPEC;
7146 pub type Dpfsa13 = crate::EnumBitfieldStruct<u8, Dpfsa13_SPEC>;
7147 impl Dpfsa13 {
7148 #[doc = "Secure"]
7149 pub const _0: Self = Self::new(0);
7150
7151 #[doc = "Non Secure"]
7152 pub const _1: Self = Self::new(1);
7153 }
7154 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7155 pub struct Dpfsa14_SPEC;
7156 pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
7157 impl Dpfsa14 {
7158 #[doc = "Secure"]
7159 pub const _0: Self = Self::new(0);
7160
7161 #[doc = "Non Secure"]
7162 pub const _1: Self = Self::new(1);
7163 }
7164 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7165 pub struct Dpfsa15_SPEC;
7166 pub type Dpfsa15 = crate::EnumBitfieldStruct<u8, Dpfsa15_SPEC>;
7167 impl Dpfsa15 {
7168 #[doc = "Secure"]
7169 pub const _0: Self = Self::new(0);
7170
7171 #[doc = "Non Secure"]
7172 pub const _1: Self = Self::new(1);
7173 }
7174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7175 pub struct Dpfsa16_SPEC;
7176 pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
7177 impl Dpfsa16 {
7178 #[doc = "Secure"]
7179 pub const _0: Self = Self::new(0);
7180
7181 #[doc = "Non Secure"]
7182 pub const _1: Self = Self::new(1);
7183 }
7184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7185 pub struct Dpfsa17_SPEC;
7186 pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
7187 impl Dpfsa17 {
7188 #[doc = "Secure"]
7189 pub const _0: Self = Self::new(0);
7190
7191 #[doc = "Non Secure"]
7192 pub const _1: Self = Self::new(1);
7193 }
7194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7195 pub struct Dpfsa18_SPEC;
7196 pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
7197 impl Dpfsa18 {
7198 #[doc = "Secure"]
7199 pub const _0: Self = Self::new(0);
7200
7201 #[doc = "Non Secure"]
7202 pub const _1: Self = Self::new(1);
7203 }
7204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7205 pub struct Dpfsa19_SPEC;
7206 pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
7207 impl Dpfsa19 {
7208 #[doc = "Secure"]
7209 pub const _0: Self = Self::new(0);
7210
7211 #[doc = "Non Secure"]
7212 pub const _1: Self = Self::new(1);
7213 }
7214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7215 pub struct Dpfsa20_SPEC;
7216 pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
7217 impl Dpfsa20 {
7218 #[doc = "Secure"]
7219 pub const _0: Self = Self::new(0);
7220
7221 #[doc = "Non Secure"]
7222 pub const _1: Self = Self::new(1);
7223 }
7224 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7225 pub struct Dpfsa24_SPEC;
7226 pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
7227 impl Dpfsa24 {
7228 #[doc = "Secure"]
7229 pub const _0: Self = Self::new(0);
7230
7231 #[doc = "Non Secure"]
7232 pub const _1: Self = Self::new(1);
7233 }
7234 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7235 pub struct Dpfsa26_SPEC;
7236 pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
7237 impl Dpfsa26 {
7238 #[doc = "Secure"]
7239 pub const _0: Self = Self::new(0);
7240
7241 #[doc = "Non Secure"]
7242 pub const _1: Self = Self::new(1);
7243 }
7244 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7245 pub struct Dpfsa27_SPEC;
7246 pub type Dpfsa27 = crate::EnumBitfieldStruct<u8, Dpfsa27_SPEC>;
7247 impl Dpfsa27 {
7248 #[doc = "Secure"]
7249 pub const _0: Self = Self::new(0);
7250
7251 #[doc = "Non Secure"]
7252 pub const _1: Self = Self::new(1);
7253 }
7254}
7255#[doc(hidden)]
7256#[derive(Copy, Clone, Eq, PartialEq)]
7257pub struct Prcr_SPEC;
7258impl crate::sealed::RegSpec for Prcr_SPEC {
7259 type DataType = u16;
7260}
7261
7262#[doc = "Protect Register"]
7263pub type Prcr = crate::RegValueT<Prcr_SPEC>;
7264
7265impl Prcr {
7266 #[doc = "Enable writing to the registers related to the clock generation circuit"]
7267 #[inline(always)]
7268 pub fn prc0(
7269 self,
7270 ) -> crate::common::RegisterField<
7271 0,
7272 0x1,
7273 1,
7274 0,
7275 prcr::Prc0,
7276 prcr::Prc0,
7277 Prcr_SPEC,
7278 crate::common::RW,
7279 > {
7280 crate::common::RegisterField::<
7281 0,
7282 0x1,
7283 1,
7284 0,
7285 prcr::Prc0,
7286 prcr::Prc0,
7287 Prcr_SPEC,
7288 crate::common::RW,
7289 >::from_register(self, 0)
7290 }
7291
7292 #[doc = "Enable writing to the registers related to the low power modes, and the battery backup function"]
7293 #[inline(always)]
7294 pub fn prc1(
7295 self,
7296 ) -> crate::common::RegisterField<
7297 1,
7298 0x1,
7299 1,
7300 0,
7301 prcr::Prc1,
7302 prcr::Prc1,
7303 Prcr_SPEC,
7304 crate::common::RW,
7305 > {
7306 crate::common::RegisterField::<
7307 1,
7308 0x1,
7309 1,
7310 0,
7311 prcr::Prc1,
7312 prcr::Prc1,
7313 Prcr_SPEC,
7314 crate::common::RW,
7315 >::from_register(self, 0)
7316 }
7317
7318 #[doc = "Enable writing to the registers related to the LVD"]
7319 #[inline(always)]
7320 pub fn prc3(
7321 self,
7322 ) -> crate::common::RegisterField<
7323 3,
7324 0x1,
7325 1,
7326 0,
7327 prcr::Prc3,
7328 prcr::Prc3,
7329 Prcr_SPEC,
7330 crate::common::RW,
7331 > {
7332 crate::common::RegisterField::<
7333 3,
7334 0x1,
7335 1,
7336 0,
7337 prcr::Prc3,
7338 prcr::Prc3,
7339 Prcr_SPEC,
7340 crate::common::RW,
7341 >::from_register(self, 0)
7342 }
7343
7344 #[inline(always)]
7345 pub fn prc4(
7346 self,
7347 ) -> crate::common::RegisterField<
7348 4,
7349 0x1,
7350 1,
7351 0,
7352 prcr::Prc4,
7353 prcr::Prc4,
7354 Prcr_SPEC,
7355 crate::common::RW,
7356 > {
7357 crate::common::RegisterField::<
7358 4,
7359 0x1,
7360 1,
7361 0,
7362 prcr::Prc4,
7363 prcr::Prc4,
7364 Prcr_SPEC,
7365 crate::common::RW,
7366 >::from_register(self, 0)
7367 }
7368
7369 #[doc = "PRC Key Code"]
7370 #[inline(always)]
7371 pub fn prkey(
7372 self,
7373 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
7374 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
7375 }
7376}
7377impl ::core::default::Default for Prcr {
7378 #[inline(always)]
7379 fn default() -> Prcr {
7380 <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
7381 }
7382}
7383pub mod prcr {
7384
7385 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7386 pub struct Prc0_SPEC;
7387 pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
7388 impl Prc0 {
7389 #[doc = "Disable writes"]
7390 pub const _0: Self = Self::new(0);
7391
7392 #[doc = "Enable writes"]
7393 pub const _1: Self = Self::new(1);
7394 }
7395 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7396 pub struct Prc1_SPEC;
7397 pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
7398 impl Prc1 {
7399 #[doc = "Disable writes"]
7400 pub const _0: Self = Self::new(0);
7401
7402 #[doc = "Enable writes"]
7403 pub const _1: Self = Self::new(1);
7404 }
7405 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7406 pub struct Prc3_SPEC;
7407 pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
7408 impl Prc3 {
7409 #[doc = "Disable writes"]
7410 pub const _0: Self = Self::new(0);
7411
7412 #[doc = "Enable writes"]
7413 pub const _1: Self = Self::new(1);
7414 }
7415 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7416 pub struct Prc4_SPEC;
7417 pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
7418 impl Prc4 {
7419 #[doc = "Disable writes"]
7420 pub const _0: Self = Self::new(0);
7421
7422 #[doc = "Enable writes"]
7423 pub const _1: Self = Self::new(1);
7424 }
7425}
7426#[doc(hidden)]
7427#[derive(Copy, Clone, Eq, PartialEq)]
7428pub struct Dpsbycr_SPEC;
7429impl crate::sealed::RegSpec for Dpsbycr_SPEC {
7430 type DataType = u8;
7431}
7432
7433#[doc = "Deep Software Standby Control Register"]
7434pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
7435
7436impl Dpsbycr {
7437 #[doc = "Power-Supply Control"]
7438 #[inline(always)]
7439 pub fn deepcut(
7440 self,
7441 ) -> crate::common::RegisterField<
7442 0,
7443 0x3,
7444 1,
7445 0,
7446 dpsbycr::Deepcut,
7447 dpsbycr::Deepcut,
7448 Dpsbycr_SPEC,
7449 crate::common::RW,
7450 > {
7451 crate::common::RegisterField::<
7452 0,
7453 0x3,
7454 1,
7455 0,
7456 dpsbycr::Deepcut,
7457 dpsbycr::Deepcut,
7458 Dpsbycr_SPEC,
7459 crate::common::RW,
7460 >::from_register(self, 0)
7461 }
7462
7463 #[doc = "I/O Port Retention"]
7464 #[inline(always)]
7465 pub fn iokeep(
7466 self,
7467 ) -> crate::common::RegisterField<
7468 6,
7469 0x1,
7470 1,
7471 0,
7472 dpsbycr::Iokeep,
7473 dpsbycr::Iokeep,
7474 Dpsbycr_SPEC,
7475 crate::common::RW,
7476 > {
7477 crate::common::RegisterField::<
7478 6,
7479 0x1,
7480 1,
7481 0,
7482 dpsbycr::Iokeep,
7483 dpsbycr::Iokeep,
7484 Dpsbycr_SPEC,
7485 crate::common::RW,
7486 >::from_register(self, 0)
7487 }
7488
7489 #[doc = "Deep Software Standby"]
7490 #[inline(always)]
7491 pub fn dpsby(
7492 self,
7493 ) -> crate::common::RegisterField<
7494 7,
7495 0x1,
7496 1,
7497 0,
7498 dpsbycr::Dpsby,
7499 dpsbycr::Dpsby,
7500 Dpsbycr_SPEC,
7501 crate::common::RW,
7502 > {
7503 crate::common::RegisterField::<
7504 7,
7505 0x1,
7506 1,
7507 0,
7508 dpsbycr::Dpsby,
7509 dpsbycr::Dpsby,
7510 Dpsbycr_SPEC,
7511 crate::common::RW,
7512 >::from_register(self, 0)
7513 }
7514}
7515impl ::core::default::Default for Dpsbycr {
7516 #[inline(always)]
7517 fn default() -> Dpsbycr {
7518 <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
7519 }
7520}
7521pub mod dpsbycr {
7522
7523 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7524 pub struct Deepcut_SPEC;
7525 pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
7526 impl Deepcut {
7527 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0 to 3), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
7528 pub const _00: Self = Self::new(0);
7529
7530 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
7531 pub const _01: Self = Self::new(1);
7532
7533 #[doc = "Setting prohibited"]
7534 pub const _10: Self = Self::new(2);
7535
7536 #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
7537 pub const _11: Self = Self::new(3);
7538 }
7539 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7540 pub struct Iokeep_SPEC;
7541 pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
7542 impl Iokeep {
7543 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
7544 pub const _0: Self = Self::new(0);
7545
7546 #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
7547 pub const _1: Self = Self::new(1);
7548 }
7549 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7550 pub struct Dpsby_SPEC;
7551 pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
7552 impl Dpsby {
7553 #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
7554 pub const _0: Self = Self::new(0);
7555
7556 #[doc = "Sleep mode (SBYCR.SSBY=0) / Deep Software Standby mode (SBYCR.SSBY=1)"]
7557 pub const _1: Self = Self::new(1);
7558 }
7559}
7560#[doc(hidden)]
7561#[derive(Copy, Clone, Eq, PartialEq)]
7562pub struct Dpswcr_SPEC;
7563impl crate::sealed::RegSpec for Dpswcr_SPEC {
7564 type DataType = u8;
7565}
7566
7567#[doc = "Deep Software Standby Wait Control Register"]
7568pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
7569
7570impl Dpswcr {
7571 #[doc = "Deep Software Wait Standby Time Setting Bit"]
7572 #[inline(always)]
7573 pub fn wtsts(
7574 self,
7575 ) -> crate::common::RegisterField<
7576 0,
7577 0x3f,
7578 1,
7579 0,
7580 dpswcr::Wtsts,
7581 dpswcr::Wtsts,
7582 Dpswcr_SPEC,
7583 crate::common::RW,
7584 > {
7585 crate::common::RegisterField::<
7586 0,
7587 0x3f,
7588 1,
7589 0,
7590 dpswcr::Wtsts,
7591 dpswcr::Wtsts,
7592 Dpswcr_SPEC,
7593 crate::common::RW,
7594 >::from_register(self, 0)
7595 }
7596}
7597impl ::core::default::Default for Dpswcr {
7598 #[inline(always)]
7599 fn default() -> Dpswcr {
7600 <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
7601 }
7602}
7603pub mod dpswcr {
7604
7605 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7606 pub struct Wtsts_SPEC;
7607 pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
7608 impl Wtsts {
7609 #[doc = "Wait cycle for fast recovery"]
7610 pub const _0_X_0_E: Self = Self::new(14);
7611
7612 #[doc = "Wait cycle for slow recovery"]
7613 pub const _0_X_19: Self = Self::new(25);
7614 }
7615}
7616#[doc(hidden)]
7617#[derive(Copy, Clone, Eq, PartialEq)]
7618pub struct Dpsier0_SPEC;
7619impl crate::sealed::RegSpec for Dpsier0_SPEC {
7620 type DataType = u8;
7621}
7622
7623#[doc = "Deep Software Standby Interrupt Enable Register 0"]
7624pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
7625
7626impl Dpsier0 {
7627 #[doc = "IRQ0-DS Pin Enable"]
7628 #[inline(always)]
7629 pub fn dirq0e(
7630 self,
7631 ) -> crate::common::RegisterField<
7632 0,
7633 0x1,
7634 1,
7635 0,
7636 dpsier0::Dirq0E,
7637 dpsier0::Dirq0E,
7638 Dpsier0_SPEC,
7639 crate::common::RW,
7640 > {
7641 crate::common::RegisterField::<
7642 0,
7643 0x1,
7644 1,
7645 0,
7646 dpsier0::Dirq0E,
7647 dpsier0::Dirq0E,
7648 Dpsier0_SPEC,
7649 crate::common::RW,
7650 >::from_register(self, 0)
7651 }
7652
7653 #[doc = "IRQ1-DS Pin Enable"]
7654 #[inline(always)]
7655 pub fn dirq1e(
7656 self,
7657 ) -> crate::common::RegisterField<
7658 1,
7659 0x1,
7660 1,
7661 0,
7662 dpsier0::Dirq1E,
7663 dpsier0::Dirq1E,
7664 Dpsier0_SPEC,
7665 crate::common::RW,
7666 > {
7667 crate::common::RegisterField::<
7668 1,
7669 0x1,
7670 1,
7671 0,
7672 dpsier0::Dirq1E,
7673 dpsier0::Dirq1E,
7674 Dpsier0_SPEC,
7675 crate::common::RW,
7676 >::from_register(self, 0)
7677 }
7678
7679 #[doc = "IRQ2-DS Pin Enable"]
7680 #[inline(always)]
7681 pub fn dirq2e(
7682 self,
7683 ) -> crate::common::RegisterField<
7684 2,
7685 0x1,
7686 1,
7687 0,
7688 dpsier0::Dirq2E,
7689 dpsier0::Dirq2E,
7690 Dpsier0_SPEC,
7691 crate::common::RW,
7692 > {
7693 crate::common::RegisterField::<
7694 2,
7695 0x1,
7696 1,
7697 0,
7698 dpsier0::Dirq2E,
7699 dpsier0::Dirq2E,
7700 Dpsier0_SPEC,
7701 crate::common::RW,
7702 >::from_register(self, 0)
7703 }
7704
7705 #[doc = "IRQ3-DS Pin Enable"]
7706 #[inline(always)]
7707 pub fn dirq3e(
7708 self,
7709 ) -> crate::common::RegisterField<
7710 3,
7711 0x1,
7712 1,
7713 0,
7714 dpsier0::Dirq3E,
7715 dpsier0::Dirq3E,
7716 Dpsier0_SPEC,
7717 crate::common::RW,
7718 > {
7719 crate::common::RegisterField::<
7720 3,
7721 0x1,
7722 1,
7723 0,
7724 dpsier0::Dirq3E,
7725 dpsier0::Dirq3E,
7726 Dpsier0_SPEC,
7727 crate::common::RW,
7728 >::from_register(self, 0)
7729 }
7730
7731 #[doc = "IRQ4-DS Pin Enable"]
7732 #[inline(always)]
7733 pub fn dirq4e(
7734 self,
7735 ) -> crate::common::RegisterField<
7736 4,
7737 0x1,
7738 1,
7739 0,
7740 dpsier0::Dirq4E,
7741 dpsier0::Dirq4E,
7742 Dpsier0_SPEC,
7743 crate::common::RW,
7744 > {
7745 crate::common::RegisterField::<
7746 4,
7747 0x1,
7748 1,
7749 0,
7750 dpsier0::Dirq4E,
7751 dpsier0::Dirq4E,
7752 Dpsier0_SPEC,
7753 crate::common::RW,
7754 >::from_register(self, 0)
7755 }
7756
7757 #[doc = "IRQ5-DS Pin Enable"]
7758 #[inline(always)]
7759 pub fn dirq5e(
7760 self,
7761 ) -> crate::common::RegisterField<
7762 5,
7763 0x1,
7764 1,
7765 0,
7766 dpsier0::Dirq5E,
7767 dpsier0::Dirq5E,
7768 Dpsier0_SPEC,
7769 crate::common::RW,
7770 > {
7771 crate::common::RegisterField::<
7772 5,
7773 0x1,
7774 1,
7775 0,
7776 dpsier0::Dirq5E,
7777 dpsier0::Dirq5E,
7778 Dpsier0_SPEC,
7779 crate::common::RW,
7780 >::from_register(self, 0)
7781 }
7782
7783 #[doc = "IRQ6-DS Pin Enable"]
7784 #[inline(always)]
7785 pub fn dirq6e(
7786 self,
7787 ) -> crate::common::RegisterField<
7788 6,
7789 0x1,
7790 1,
7791 0,
7792 dpsier0::Dirq6E,
7793 dpsier0::Dirq6E,
7794 Dpsier0_SPEC,
7795 crate::common::RW,
7796 > {
7797 crate::common::RegisterField::<
7798 6,
7799 0x1,
7800 1,
7801 0,
7802 dpsier0::Dirq6E,
7803 dpsier0::Dirq6E,
7804 Dpsier0_SPEC,
7805 crate::common::RW,
7806 >::from_register(self, 0)
7807 }
7808
7809 #[doc = "IRQ7-DS Pin Enable"]
7810 #[inline(always)]
7811 pub fn dirq7e(
7812 self,
7813 ) -> crate::common::RegisterField<
7814 7,
7815 0x1,
7816 1,
7817 0,
7818 dpsier0::Dirq7E,
7819 dpsier0::Dirq7E,
7820 Dpsier0_SPEC,
7821 crate::common::RW,
7822 > {
7823 crate::common::RegisterField::<
7824 7,
7825 0x1,
7826 1,
7827 0,
7828 dpsier0::Dirq7E,
7829 dpsier0::Dirq7E,
7830 Dpsier0_SPEC,
7831 crate::common::RW,
7832 >::from_register(self, 0)
7833 }
7834}
7835impl ::core::default::Default for Dpsier0 {
7836 #[inline(always)]
7837 fn default() -> Dpsier0 {
7838 <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
7839 }
7840}
7841pub mod dpsier0 {
7842
7843 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7844 pub struct Dirq0E_SPEC;
7845 pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
7846 impl Dirq0E {
7847 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7848 pub const _0: Self = Self::new(0);
7849
7850 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7851 pub const _1: Self = Self::new(1);
7852 }
7853 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7854 pub struct Dirq1E_SPEC;
7855 pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
7856 impl Dirq1E {
7857 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7858 pub const _0: Self = Self::new(0);
7859
7860 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7861 pub const _1: Self = Self::new(1);
7862 }
7863 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7864 pub struct Dirq2E_SPEC;
7865 pub type Dirq2E = crate::EnumBitfieldStruct<u8, Dirq2E_SPEC>;
7866 impl Dirq2E {
7867 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7868 pub const _0: Self = Self::new(0);
7869
7870 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7871 pub const _1: Self = Self::new(1);
7872 }
7873 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7874 pub struct Dirq3E_SPEC;
7875 pub type Dirq3E = crate::EnumBitfieldStruct<u8, Dirq3E_SPEC>;
7876 impl Dirq3E {
7877 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7878 pub const _0: Self = Self::new(0);
7879
7880 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7881 pub const _1: Self = Self::new(1);
7882 }
7883 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7884 pub struct Dirq4E_SPEC;
7885 pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
7886 impl Dirq4E {
7887 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7888 pub const _0: Self = Self::new(0);
7889
7890 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7891 pub const _1: Self = Self::new(1);
7892 }
7893 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7894 pub struct Dirq5E_SPEC;
7895 pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
7896 impl Dirq5E {
7897 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7898 pub const _0: Self = Self::new(0);
7899
7900 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7901 pub const _1: Self = Self::new(1);
7902 }
7903 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7904 pub struct Dirq6E_SPEC;
7905 pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
7906 impl Dirq6E {
7907 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7908 pub const _0: Self = Self::new(0);
7909
7910 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7911 pub const _1: Self = Self::new(1);
7912 }
7913 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7914 pub struct Dirq7E_SPEC;
7915 pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
7916 impl Dirq7E {
7917 #[doc = "Cancelling Deep Software Standby mode is disabled"]
7918 pub const _0: Self = Self::new(0);
7919
7920 #[doc = "Cancelling Deep Software Standby mode is enabled"]
7921 pub const _1: Self = Self::new(1);
7922 }
7923}
7924#[doc(hidden)]
7925#[derive(Copy, Clone, Eq, PartialEq)]
7926pub struct Dpsier1_SPEC;
7927impl crate::sealed::RegSpec for Dpsier1_SPEC {
7928 type DataType = u8;
7929}
7930
7931#[doc = "Deep Software Standby Interrupt Enable Register 1"]
7932pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
7933
7934impl Dpsier1 {
7935 #[doc = "IRQ8-DS Pin Enable"]
7936 #[inline(always)]
7937 pub fn dirq8e(
7938 self,
7939 ) -> crate::common::RegisterField<
7940 0,
7941 0x1,
7942 1,
7943 0,
7944 dpsier1::Dirq8E,
7945 dpsier1::Dirq8E,
7946 Dpsier1_SPEC,
7947 crate::common::RW,
7948 > {
7949 crate::common::RegisterField::<
7950 0,
7951 0x1,
7952 1,
7953 0,
7954 dpsier1::Dirq8E,
7955 dpsier1::Dirq8E,
7956 Dpsier1_SPEC,
7957 crate::common::RW,
7958 >::from_register(self, 0)
7959 }
7960
7961 #[doc = "IRQ9-DS Pin Enable"]
7962 #[inline(always)]
7963 pub fn dirq9e(
7964 self,
7965 ) -> crate::common::RegisterField<
7966 1,
7967 0x1,
7968 1,
7969 0,
7970 dpsier1::Dirq9E,
7971 dpsier1::Dirq9E,
7972 Dpsier1_SPEC,
7973 crate::common::RW,
7974 > {
7975 crate::common::RegisterField::<
7976 1,
7977 0x1,
7978 1,
7979 0,
7980 dpsier1::Dirq9E,
7981 dpsier1::Dirq9E,
7982 Dpsier1_SPEC,
7983 crate::common::RW,
7984 >::from_register(self, 0)
7985 }
7986
7987 #[doc = "IRQ10-DS Pin Enable"]
7988 #[inline(always)]
7989 pub fn dirq10e(
7990 self,
7991 ) -> crate::common::RegisterField<
7992 2,
7993 0x1,
7994 1,
7995 0,
7996 dpsier1::Dirq10E,
7997 dpsier1::Dirq10E,
7998 Dpsier1_SPEC,
7999 crate::common::RW,
8000 > {
8001 crate::common::RegisterField::<
8002 2,
8003 0x1,
8004 1,
8005 0,
8006 dpsier1::Dirq10E,
8007 dpsier1::Dirq10E,
8008 Dpsier1_SPEC,
8009 crate::common::RW,
8010 >::from_register(self, 0)
8011 }
8012
8013 #[doc = "IRQ11-DS Pin Enable"]
8014 #[inline(always)]
8015 pub fn dirq11e(
8016 self,
8017 ) -> crate::common::RegisterField<
8018 3,
8019 0x1,
8020 1,
8021 0,
8022 dpsier1::Dirq11E,
8023 dpsier1::Dirq11E,
8024 Dpsier1_SPEC,
8025 crate::common::RW,
8026 > {
8027 crate::common::RegisterField::<
8028 3,
8029 0x1,
8030 1,
8031 0,
8032 dpsier1::Dirq11E,
8033 dpsier1::Dirq11E,
8034 Dpsier1_SPEC,
8035 crate::common::RW,
8036 >::from_register(self, 0)
8037 }
8038
8039 #[doc = "IRQ12-DS Pin Enable"]
8040 #[inline(always)]
8041 pub fn dirq12e(
8042 self,
8043 ) -> crate::common::RegisterField<
8044 4,
8045 0x1,
8046 1,
8047 0,
8048 dpsier1::Dirq12E,
8049 dpsier1::Dirq12E,
8050 Dpsier1_SPEC,
8051 crate::common::RW,
8052 > {
8053 crate::common::RegisterField::<
8054 4,
8055 0x1,
8056 1,
8057 0,
8058 dpsier1::Dirq12E,
8059 dpsier1::Dirq12E,
8060 Dpsier1_SPEC,
8061 crate::common::RW,
8062 >::from_register(self, 0)
8063 }
8064
8065 #[doc = "IRQ13-DS Pin Enable"]
8066 #[inline(always)]
8067 pub fn dirq13e(
8068 self,
8069 ) -> crate::common::RegisterField<
8070 5,
8071 0x1,
8072 1,
8073 0,
8074 dpsier1::Dirq13E,
8075 dpsier1::Dirq13E,
8076 Dpsier1_SPEC,
8077 crate::common::RW,
8078 > {
8079 crate::common::RegisterField::<
8080 5,
8081 0x1,
8082 1,
8083 0,
8084 dpsier1::Dirq13E,
8085 dpsier1::Dirq13E,
8086 Dpsier1_SPEC,
8087 crate::common::RW,
8088 >::from_register(self, 0)
8089 }
8090
8091 #[doc = "IRQ14-DS Pin Enable"]
8092 #[inline(always)]
8093 pub fn dirq14e(
8094 self,
8095 ) -> crate::common::RegisterField<
8096 6,
8097 0x1,
8098 1,
8099 0,
8100 dpsier1::Dirq14E,
8101 dpsier1::Dirq14E,
8102 Dpsier1_SPEC,
8103 crate::common::RW,
8104 > {
8105 crate::common::RegisterField::<
8106 6,
8107 0x1,
8108 1,
8109 0,
8110 dpsier1::Dirq14E,
8111 dpsier1::Dirq14E,
8112 Dpsier1_SPEC,
8113 crate::common::RW,
8114 >::from_register(self, 0)
8115 }
8116
8117 #[doc = "IRQ15-DS Pin Enable"]
8118 #[inline(always)]
8119 pub fn dirq15e(
8120 self,
8121 ) -> crate::common::RegisterField<
8122 7,
8123 0x1,
8124 1,
8125 0,
8126 dpsier1::Dirq15E,
8127 dpsier1::Dirq15E,
8128 Dpsier1_SPEC,
8129 crate::common::RW,
8130 > {
8131 crate::common::RegisterField::<
8132 7,
8133 0x1,
8134 1,
8135 0,
8136 dpsier1::Dirq15E,
8137 dpsier1::Dirq15E,
8138 Dpsier1_SPEC,
8139 crate::common::RW,
8140 >::from_register(self, 0)
8141 }
8142}
8143impl ::core::default::Default for Dpsier1 {
8144 #[inline(always)]
8145 fn default() -> Dpsier1 {
8146 <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
8147 }
8148}
8149pub mod dpsier1 {
8150
8151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8152 pub struct Dirq8E_SPEC;
8153 pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
8154 impl Dirq8E {
8155 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8156 pub const _0: Self = Self::new(0);
8157
8158 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8159 pub const _1: Self = Self::new(1);
8160 }
8161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8162 pub struct Dirq9E_SPEC;
8163 pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
8164 impl Dirq9E {
8165 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8166 pub const _0: Self = Self::new(0);
8167
8168 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8169 pub const _1: Self = Self::new(1);
8170 }
8171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8172 pub struct Dirq10E_SPEC;
8173 pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
8174 impl Dirq10E {
8175 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8176 pub const _0: Self = Self::new(0);
8177
8178 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8179 pub const _1: Self = Self::new(1);
8180 }
8181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8182 pub struct Dirq11E_SPEC;
8183 pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
8184 impl Dirq11E {
8185 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8186 pub const _0: Self = Self::new(0);
8187
8188 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8189 pub const _1: Self = Self::new(1);
8190 }
8191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8192 pub struct Dirq12E_SPEC;
8193 pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
8194 impl Dirq12E {
8195 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8196 pub const _0: Self = Self::new(0);
8197
8198 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8199 pub const _1: Self = Self::new(1);
8200 }
8201 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8202 pub struct Dirq13E_SPEC;
8203 pub type Dirq13E = crate::EnumBitfieldStruct<u8, Dirq13E_SPEC>;
8204 impl Dirq13E {
8205 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8206 pub const _0: Self = Self::new(0);
8207
8208 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8209 pub const _1: Self = Self::new(1);
8210 }
8211 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8212 pub struct Dirq14E_SPEC;
8213 pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
8214 impl Dirq14E {
8215 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8216 pub const _0: Self = Self::new(0);
8217
8218 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8219 pub const _1: Self = Self::new(1);
8220 }
8221 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8222 pub struct Dirq15E_SPEC;
8223 pub type Dirq15E = crate::EnumBitfieldStruct<u8, Dirq15E_SPEC>;
8224 impl Dirq15E {
8225 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8226 pub const _0: Self = Self::new(0);
8227
8228 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8229 pub const _1: Self = Self::new(1);
8230 }
8231}
8232#[doc(hidden)]
8233#[derive(Copy, Clone, Eq, PartialEq)]
8234pub struct Dpsier2_SPEC;
8235impl crate::sealed::RegSpec for Dpsier2_SPEC {
8236 type DataType = u8;
8237}
8238
8239#[doc = "Deep Software Standby Interrupt Enable Register 2"]
8240pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
8241
8242impl Dpsier2 {
8243 #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
8244 #[inline(always)]
8245 pub fn dlvd1ie(
8246 self,
8247 ) -> crate::common::RegisterField<
8248 0,
8249 0x1,
8250 1,
8251 0,
8252 dpsier2::Dlvd1Ie,
8253 dpsier2::Dlvd1Ie,
8254 Dpsier2_SPEC,
8255 crate::common::RW,
8256 > {
8257 crate::common::RegisterField::<
8258 0,
8259 0x1,
8260 1,
8261 0,
8262 dpsier2::Dlvd1Ie,
8263 dpsier2::Dlvd1Ie,
8264 Dpsier2_SPEC,
8265 crate::common::RW,
8266 >::from_register(self, 0)
8267 }
8268
8269 #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
8270 #[inline(always)]
8271 pub fn dlvd2ie(
8272 self,
8273 ) -> crate::common::RegisterField<
8274 1,
8275 0x1,
8276 1,
8277 0,
8278 dpsier2::Dlvd2Ie,
8279 dpsier2::Dlvd2Ie,
8280 Dpsier2_SPEC,
8281 crate::common::RW,
8282 > {
8283 crate::common::RegisterField::<
8284 1,
8285 0x1,
8286 1,
8287 0,
8288 dpsier2::Dlvd2Ie,
8289 dpsier2::Dlvd2Ie,
8290 Dpsier2_SPEC,
8291 crate::common::RW,
8292 >::from_register(self, 0)
8293 }
8294
8295 #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
8296 #[inline(always)]
8297 pub fn drtciie(
8298 self,
8299 ) -> crate::common::RegisterField<
8300 2,
8301 0x1,
8302 1,
8303 0,
8304 dpsier2::Drtciie,
8305 dpsier2::Drtciie,
8306 Dpsier2_SPEC,
8307 crate::common::RW,
8308 > {
8309 crate::common::RegisterField::<
8310 2,
8311 0x1,
8312 1,
8313 0,
8314 dpsier2::Drtciie,
8315 dpsier2::Drtciie,
8316 Dpsier2_SPEC,
8317 crate::common::RW,
8318 >::from_register(self, 0)
8319 }
8320
8321 #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
8322 #[inline(always)]
8323 pub fn drtcaie(
8324 self,
8325 ) -> crate::common::RegisterField<
8326 3,
8327 0x1,
8328 1,
8329 0,
8330 dpsier2::Drtcaie,
8331 dpsier2::Drtcaie,
8332 Dpsier2_SPEC,
8333 crate::common::RW,
8334 > {
8335 crate::common::RegisterField::<
8336 3,
8337 0x1,
8338 1,
8339 0,
8340 dpsier2::Drtcaie,
8341 dpsier2::Drtcaie,
8342 Dpsier2_SPEC,
8343 crate::common::RW,
8344 >::from_register(self, 0)
8345 }
8346
8347 #[doc = "NMI Pin Enable"]
8348 #[inline(always)]
8349 pub fn dnmie(
8350 self,
8351 ) -> crate::common::RegisterField<
8352 4,
8353 0x1,
8354 1,
8355 0,
8356 dpsier2::Dnmie,
8357 dpsier2::Dnmie,
8358 Dpsier2_SPEC,
8359 crate::common::RW,
8360 > {
8361 crate::common::RegisterField::<
8362 4,
8363 0x1,
8364 1,
8365 0,
8366 dpsier2::Dnmie,
8367 dpsier2::Dnmie,
8368 Dpsier2_SPEC,
8369 crate::common::RW,
8370 >::from_register(self, 0)
8371 }
8372}
8373impl ::core::default::Default for Dpsier2 {
8374 #[inline(always)]
8375 fn default() -> Dpsier2 {
8376 <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
8377 }
8378}
8379pub mod dpsier2 {
8380
8381 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8382 pub struct Dlvd1Ie_SPEC;
8383 pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
8384 impl Dlvd1Ie {
8385 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8386 pub const _0: Self = Self::new(0);
8387
8388 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8389 pub const _1: Self = Self::new(1);
8390 }
8391 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8392 pub struct Dlvd2Ie_SPEC;
8393 pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
8394 impl Dlvd2Ie {
8395 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8396 pub const _0: Self = Self::new(0);
8397
8398 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8399 pub const _1: Self = Self::new(1);
8400 }
8401 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8402 pub struct Drtciie_SPEC;
8403 pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
8404 impl Drtciie {
8405 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8406 pub const _0: Self = Self::new(0);
8407
8408 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8409 pub const _1: Self = Self::new(1);
8410 }
8411 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8412 pub struct Drtcaie_SPEC;
8413 pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
8414 impl Drtcaie {
8415 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8416 pub const _0: Self = Self::new(0);
8417
8418 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8419 pub const _1: Self = Self::new(1);
8420 }
8421 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8422 pub struct Dnmie_SPEC;
8423 pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
8424 impl Dnmie {
8425 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8426 pub const _0: Self = Self::new(0);
8427
8428 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8429 pub const _1: Self = Self::new(1);
8430 }
8431}
8432#[doc(hidden)]
8433#[derive(Copy, Clone, Eq, PartialEq)]
8434pub struct Dpsier3_SPEC;
8435impl crate::sealed::RegSpec for Dpsier3_SPEC {
8436 type DataType = u8;
8437}
8438
8439#[doc = "Deep Software Standby Interrupt Enable Register 3"]
8440pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
8441
8442impl Dpsier3 {
8443 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Signal Enable"]
8444 #[inline(always)]
8445 pub fn dusbfs0ie(
8446 self,
8447 ) -> crate::common::RegisterField<
8448 0,
8449 0x1,
8450 1,
8451 0,
8452 dpsier3::Dusbfs0Ie,
8453 dpsier3::Dusbfs0Ie,
8454 Dpsier3_SPEC,
8455 crate::common::RW,
8456 > {
8457 crate::common::RegisterField::<
8458 0,
8459 0x1,
8460 1,
8461 0,
8462 dpsier3::Dusbfs0Ie,
8463 dpsier3::Dusbfs0Ie,
8464 Dpsier3_SPEC,
8465 crate::common::RW,
8466 >::from_register(self, 0)
8467 }
8468
8469 #[doc = "AGT1 Underflow Deep Software Standby Cancel Signal Enable"]
8470 #[inline(always)]
8471 pub fn dagt1ie(
8472 self,
8473 ) -> crate::common::RegisterField<
8474 2,
8475 0x1,
8476 1,
8477 0,
8478 dpsier3::Dagt1Ie,
8479 dpsier3::Dagt1Ie,
8480 Dpsier3_SPEC,
8481 crate::common::RW,
8482 > {
8483 crate::common::RegisterField::<
8484 2,
8485 0x1,
8486 1,
8487 0,
8488 dpsier3::Dagt1Ie,
8489 dpsier3::Dagt1Ie,
8490 Dpsier3_SPEC,
8491 crate::common::RW,
8492 >::from_register(self, 0)
8493 }
8494
8495 #[doc = "AGT3 Underflow Deep Software Standby Cancel Signal Enable"]
8496 #[inline(always)]
8497 pub fn dagt3ie(
8498 self,
8499 ) -> crate::common::RegisterField<
8500 3,
8501 0x1,
8502 1,
8503 0,
8504 dpsier3::Dagt3Ie,
8505 dpsier3::Dagt3Ie,
8506 Dpsier3_SPEC,
8507 crate::common::RW,
8508 > {
8509 crate::common::RegisterField::<
8510 3,
8511 0x1,
8512 1,
8513 0,
8514 dpsier3::Dagt3Ie,
8515 dpsier3::Dagt3Ie,
8516 Dpsier3_SPEC,
8517 crate::common::RW,
8518 >::from_register(self, 0)
8519 }
8520}
8521impl ::core::default::Default for Dpsier3 {
8522 #[inline(always)]
8523 fn default() -> Dpsier3 {
8524 <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
8525 }
8526}
8527pub mod dpsier3 {
8528
8529 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8530 pub struct Dusbfs0Ie_SPEC;
8531 pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
8532 impl Dusbfs0Ie {
8533 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8534 pub const _0: Self = Self::new(0);
8535
8536 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8537 pub const _1: Self = Self::new(1);
8538 }
8539 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8540 pub struct Dagt1Ie_SPEC;
8541 pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
8542 impl Dagt1Ie {
8543 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8544 pub const _0: Self = Self::new(0);
8545
8546 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8547 pub const _1: Self = Self::new(1);
8548 }
8549 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8550 pub struct Dagt3Ie_SPEC;
8551 pub type Dagt3Ie = crate::EnumBitfieldStruct<u8, Dagt3Ie_SPEC>;
8552 impl Dagt3Ie {
8553 #[doc = "Cancelling Deep Software Standby mode is disabled"]
8554 pub const _0: Self = Self::new(0);
8555
8556 #[doc = "Cancelling Deep Software Standby mode is enabled"]
8557 pub const _1: Self = Self::new(1);
8558 }
8559}
8560#[doc(hidden)]
8561#[derive(Copy, Clone, Eq, PartialEq)]
8562pub struct Dpsifr0_SPEC;
8563impl crate::sealed::RegSpec for Dpsifr0_SPEC {
8564 type DataType = u8;
8565}
8566
8567#[doc = "Deep Software Standby Interrupt Flag Register 0"]
8568pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
8569
8570impl Dpsifr0 {
8571 #[doc = "IRQ0-DS Pin Deep Software Standby Cancel Flag"]
8572 #[inline(always)]
8573 pub fn dirq0f(
8574 self,
8575 ) -> crate::common::RegisterField<
8576 0,
8577 0x1,
8578 1,
8579 0,
8580 dpsifr0::Dirq0F,
8581 dpsifr0::Dirq0F,
8582 Dpsifr0_SPEC,
8583 crate::common::RW,
8584 > {
8585 crate::common::RegisterField::<
8586 0,
8587 0x1,
8588 1,
8589 0,
8590 dpsifr0::Dirq0F,
8591 dpsifr0::Dirq0F,
8592 Dpsifr0_SPEC,
8593 crate::common::RW,
8594 >::from_register(self, 0)
8595 }
8596
8597 #[doc = "IRQ1-DS Pin Deep Software Standby Cancel Flag"]
8598 #[inline(always)]
8599 pub fn dirq1f(
8600 self,
8601 ) -> crate::common::RegisterField<
8602 1,
8603 0x1,
8604 1,
8605 0,
8606 dpsifr0::Dirq1F,
8607 dpsifr0::Dirq1F,
8608 Dpsifr0_SPEC,
8609 crate::common::RW,
8610 > {
8611 crate::common::RegisterField::<
8612 1,
8613 0x1,
8614 1,
8615 0,
8616 dpsifr0::Dirq1F,
8617 dpsifr0::Dirq1F,
8618 Dpsifr0_SPEC,
8619 crate::common::RW,
8620 >::from_register(self, 0)
8621 }
8622
8623 #[doc = "IRQ2-DS Pin Deep Software Standby Cancel Flag"]
8624 #[inline(always)]
8625 pub fn dirq2f(
8626 self,
8627 ) -> crate::common::RegisterField<
8628 2,
8629 0x1,
8630 1,
8631 0,
8632 dpsifr0::Dirq2F,
8633 dpsifr0::Dirq2F,
8634 Dpsifr0_SPEC,
8635 crate::common::RW,
8636 > {
8637 crate::common::RegisterField::<
8638 2,
8639 0x1,
8640 1,
8641 0,
8642 dpsifr0::Dirq2F,
8643 dpsifr0::Dirq2F,
8644 Dpsifr0_SPEC,
8645 crate::common::RW,
8646 >::from_register(self, 0)
8647 }
8648
8649 #[doc = "IRQ3-DS Pin Deep Software Standby Cancel Flag"]
8650 #[inline(always)]
8651 pub fn dirq3f(
8652 self,
8653 ) -> crate::common::RegisterField<
8654 3,
8655 0x1,
8656 1,
8657 0,
8658 dpsifr0::Dirq3F,
8659 dpsifr0::Dirq3F,
8660 Dpsifr0_SPEC,
8661 crate::common::RW,
8662 > {
8663 crate::common::RegisterField::<
8664 3,
8665 0x1,
8666 1,
8667 0,
8668 dpsifr0::Dirq3F,
8669 dpsifr0::Dirq3F,
8670 Dpsifr0_SPEC,
8671 crate::common::RW,
8672 >::from_register(self, 0)
8673 }
8674
8675 #[doc = "IRQ4-DS Pin Deep Software Standby Cancel Flag"]
8676 #[inline(always)]
8677 pub fn dirq4f(
8678 self,
8679 ) -> crate::common::RegisterField<
8680 4,
8681 0x1,
8682 1,
8683 0,
8684 dpsifr0::Dirq4F,
8685 dpsifr0::Dirq4F,
8686 Dpsifr0_SPEC,
8687 crate::common::RW,
8688 > {
8689 crate::common::RegisterField::<
8690 4,
8691 0x1,
8692 1,
8693 0,
8694 dpsifr0::Dirq4F,
8695 dpsifr0::Dirq4F,
8696 Dpsifr0_SPEC,
8697 crate::common::RW,
8698 >::from_register(self, 0)
8699 }
8700
8701 #[doc = "IRQ5-DS Pin Deep Software Standby Cancel Flag"]
8702 #[inline(always)]
8703 pub fn dirq5f(
8704 self,
8705 ) -> crate::common::RegisterField<
8706 5,
8707 0x1,
8708 1,
8709 0,
8710 dpsifr0::Dirq5F,
8711 dpsifr0::Dirq5F,
8712 Dpsifr0_SPEC,
8713 crate::common::RW,
8714 > {
8715 crate::common::RegisterField::<
8716 5,
8717 0x1,
8718 1,
8719 0,
8720 dpsifr0::Dirq5F,
8721 dpsifr0::Dirq5F,
8722 Dpsifr0_SPEC,
8723 crate::common::RW,
8724 >::from_register(self, 0)
8725 }
8726
8727 #[doc = "IRQ6-DS Pin Deep Software Standby Cancel Flag"]
8728 #[inline(always)]
8729 pub fn dirq6f(
8730 self,
8731 ) -> crate::common::RegisterField<
8732 6,
8733 0x1,
8734 1,
8735 0,
8736 dpsifr0::Dirq6F,
8737 dpsifr0::Dirq6F,
8738 Dpsifr0_SPEC,
8739 crate::common::RW,
8740 > {
8741 crate::common::RegisterField::<
8742 6,
8743 0x1,
8744 1,
8745 0,
8746 dpsifr0::Dirq6F,
8747 dpsifr0::Dirq6F,
8748 Dpsifr0_SPEC,
8749 crate::common::RW,
8750 >::from_register(self, 0)
8751 }
8752
8753 #[doc = "IRQ7-DS Pin Deep Software Standby Cancel Flag"]
8754 #[inline(always)]
8755 pub fn dirq7f(
8756 self,
8757 ) -> crate::common::RegisterField<
8758 7,
8759 0x1,
8760 1,
8761 0,
8762 dpsifr0::Dirq7F,
8763 dpsifr0::Dirq7F,
8764 Dpsifr0_SPEC,
8765 crate::common::RW,
8766 > {
8767 crate::common::RegisterField::<
8768 7,
8769 0x1,
8770 1,
8771 0,
8772 dpsifr0::Dirq7F,
8773 dpsifr0::Dirq7F,
8774 Dpsifr0_SPEC,
8775 crate::common::RW,
8776 >::from_register(self, 0)
8777 }
8778}
8779impl ::core::default::Default for Dpsifr0 {
8780 #[inline(always)]
8781 fn default() -> Dpsifr0 {
8782 <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
8783 }
8784}
8785pub mod dpsifr0 {
8786
8787 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8788 pub struct Dirq0F_SPEC;
8789 pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
8790 impl Dirq0F {
8791 #[doc = "The cancel request is not generated"]
8792 pub const _0: Self = Self::new(0);
8793
8794 #[doc = "The cancel request is generated"]
8795 pub const _1: Self = Self::new(1);
8796 }
8797 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8798 pub struct Dirq1F_SPEC;
8799 pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
8800 impl Dirq1F {
8801 #[doc = "The cancel request is not generated"]
8802 pub const _0: Self = Self::new(0);
8803
8804 #[doc = "The cancel request is generated"]
8805 pub const _1: Self = Self::new(1);
8806 }
8807 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8808 pub struct Dirq2F_SPEC;
8809 pub type Dirq2F = crate::EnumBitfieldStruct<u8, Dirq2F_SPEC>;
8810 impl Dirq2F {
8811 #[doc = "The cancel request is not generated"]
8812 pub const _0: Self = Self::new(0);
8813
8814 #[doc = "The cancel request is generated"]
8815 pub const _1: Self = Self::new(1);
8816 }
8817 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8818 pub struct Dirq3F_SPEC;
8819 pub type Dirq3F = crate::EnumBitfieldStruct<u8, Dirq3F_SPEC>;
8820 impl Dirq3F {
8821 #[doc = "The cancel request is not generated"]
8822 pub const _0: Self = Self::new(0);
8823
8824 #[doc = "The cancel request is generated"]
8825 pub const _1: Self = Self::new(1);
8826 }
8827 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8828 pub struct Dirq4F_SPEC;
8829 pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
8830 impl Dirq4F {
8831 #[doc = "The cancel request is not generated"]
8832 pub const _0: Self = Self::new(0);
8833
8834 #[doc = "The cancel request is generated"]
8835 pub const _1: Self = Self::new(1);
8836 }
8837 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8838 pub struct Dirq5F_SPEC;
8839 pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
8840 impl Dirq5F {
8841 #[doc = "The cancel request is not generated"]
8842 pub const _0: Self = Self::new(0);
8843
8844 #[doc = "The cancel request is generated"]
8845 pub const _1: Self = Self::new(1);
8846 }
8847 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8848 pub struct Dirq6F_SPEC;
8849 pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
8850 impl Dirq6F {
8851 #[doc = "The cancel request is not generated"]
8852 pub const _0: Self = Self::new(0);
8853
8854 #[doc = "The cancel request is generated"]
8855 pub const _1: Self = Self::new(1);
8856 }
8857 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8858 pub struct Dirq7F_SPEC;
8859 pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
8860 impl Dirq7F {
8861 #[doc = "The cancel request is not generated"]
8862 pub const _0: Self = Self::new(0);
8863
8864 #[doc = "The cancel request is generated"]
8865 pub const _1: Self = Self::new(1);
8866 }
8867}
8868#[doc(hidden)]
8869#[derive(Copy, Clone, Eq, PartialEq)]
8870pub struct Dpsifr1_SPEC;
8871impl crate::sealed::RegSpec for Dpsifr1_SPEC {
8872 type DataType = u8;
8873}
8874
8875#[doc = "Deep Software Standby Interrupt Flag Register 1"]
8876pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
8877
8878impl Dpsifr1 {
8879 #[doc = "IRQ8-DS Pin Deep Software Standby Cancel Flag"]
8880 #[inline(always)]
8881 pub fn dirq8f(
8882 self,
8883 ) -> crate::common::RegisterField<
8884 0,
8885 0x1,
8886 1,
8887 0,
8888 dpsifr1::Dirq8F,
8889 dpsifr1::Dirq8F,
8890 Dpsifr1_SPEC,
8891 crate::common::RW,
8892 > {
8893 crate::common::RegisterField::<
8894 0,
8895 0x1,
8896 1,
8897 0,
8898 dpsifr1::Dirq8F,
8899 dpsifr1::Dirq8F,
8900 Dpsifr1_SPEC,
8901 crate::common::RW,
8902 >::from_register(self, 0)
8903 }
8904
8905 #[doc = "IRQ9-DS Pin Deep Software Standby Cancel Flag"]
8906 #[inline(always)]
8907 pub fn dirq9f(
8908 self,
8909 ) -> crate::common::RegisterField<
8910 1,
8911 0x1,
8912 1,
8913 0,
8914 dpsifr1::Dirq9F,
8915 dpsifr1::Dirq9F,
8916 Dpsifr1_SPEC,
8917 crate::common::RW,
8918 > {
8919 crate::common::RegisterField::<
8920 1,
8921 0x1,
8922 1,
8923 0,
8924 dpsifr1::Dirq9F,
8925 dpsifr1::Dirq9F,
8926 Dpsifr1_SPEC,
8927 crate::common::RW,
8928 >::from_register(self, 0)
8929 }
8930
8931 #[doc = "IRQ10-DS Pin Deep Software Standby Cancel Flag"]
8932 #[inline(always)]
8933 pub fn dirq10f(
8934 self,
8935 ) -> crate::common::RegisterField<
8936 2,
8937 0x1,
8938 1,
8939 0,
8940 dpsifr1::Dirq10F,
8941 dpsifr1::Dirq10F,
8942 Dpsifr1_SPEC,
8943 crate::common::RW,
8944 > {
8945 crate::common::RegisterField::<
8946 2,
8947 0x1,
8948 1,
8949 0,
8950 dpsifr1::Dirq10F,
8951 dpsifr1::Dirq10F,
8952 Dpsifr1_SPEC,
8953 crate::common::RW,
8954 >::from_register(self, 0)
8955 }
8956
8957 #[doc = "IRQ11-DS Pin Deep Software Standby Cancel Flag"]
8958 #[inline(always)]
8959 pub fn dirq11f(
8960 self,
8961 ) -> crate::common::RegisterField<
8962 3,
8963 0x1,
8964 1,
8965 0,
8966 dpsifr1::Dirq11F,
8967 dpsifr1::Dirq11F,
8968 Dpsifr1_SPEC,
8969 crate::common::RW,
8970 > {
8971 crate::common::RegisterField::<
8972 3,
8973 0x1,
8974 1,
8975 0,
8976 dpsifr1::Dirq11F,
8977 dpsifr1::Dirq11F,
8978 Dpsifr1_SPEC,
8979 crate::common::RW,
8980 >::from_register(self, 0)
8981 }
8982
8983 #[doc = "IRQ12-DS Pin Deep Software Standby Cancel Flag"]
8984 #[inline(always)]
8985 pub fn dirq12f(
8986 self,
8987 ) -> crate::common::RegisterField<
8988 4,
8989 0x1,
8990 1,
8991 0,
8992 dpsifr1::Dirq12F,
8993 dpsifr1::Dirq12F,
8994 Dpsifr1_SPEC,
8995 crate::common::RW,
8996 > {
8997 crate::common::RegisterField::<
8998 4,
8999 0x1,
9000 1,
9001 0,
9002 dpsifr1::Dirq12F,
9003 dpsifr1::Dirq12F,
9004 Dpsifr1_SPEC,
9005 crate::common::RW,
9006 >::from_register(self, 0)
9007 }
9008
9009 #[doc = "IRQ13-DS Pin Deep Software Standby Cancel Flag"]
9010 #[inline(always)]
9011 pub fn dirq13f(
9012 self,
9013 ) -> crate::common::RegisterField<
9014 5,
9015 0x1,
9016 1,
9017 0,
9018 dpsifr1::Dirq13F,
9019 dpsifr1::Dirq13F,
9020 Dpsifr1_SPEC,
9021 crate::common::RW,
9022 > {
9023 crate::common::RegisterField::<
9024 5,
9025 0x1,
9026 1,
9027 0,
9028 dpsifr1::Dirq13F,
9029 dpsifr1::Dirq13F,
9030 Dpsifr1_SPEC,
9031 crate::common::RW,
9032 >::from_register(self, 0)
9033 }
9034
9035 #[doc = "IRQ14-DS Pin Deep Software Standby Cancel Flag"]
9036 #[inline(always)]
9037 pub fn dirq14f(
9038 self,
9039 ) -> crate::common::RegisterField<
9040 6,
9041 0x1,
9042 1,
9043 0,
9044 dpsifr1::Dirq14F,
9045 dpsifr1::Dirq14F,
9046 Dpsifr1_SPEC,
9047 crate::common::RW,
9048 > {
9049 crate::common::RegisterField::<
9050 6,
9051 0x1,
9052 1,
9053 0,
9054 dpsifr1::Dirq14F,
9055 dpsifr1::Dirq14F,
9056 Dpsifr1_SPEC,
9057 crate::common::RW,
9058 >::from_register(self, 0)
9059 }
9060
9061 #[doc = "IRQ15-DS Pin Deep Software Standby Cancel Flag"]
9062 #[inline(always)]
9063 pub fn dirq15f(
9064 self,
9065 ) -> crate::common::RegisterField<
9066 7,
9067 0x1,
9068 1,
9069 0,
9070 dpsifr1::Dirq15F,
9071 dpsifr1::Dirq15F,
9072 Dpsifr1_SPEC,
9073 crate::common::RW,
9074 > {
9075 crate::common::RegisterField::<
9076 7,
9077 0x1,
9078 1,
9079 0,
9080 dpsifr1::Dirq15F,
9081 dpsifr1::Dirq15F,
9082 Dpsifr1_SPEC,
9083 crate::common::RW,
9084 >::from_register(self, 0)
9085 }
9086}
9087impl ::core::default::Default for Dpsifr1 {
9088 #[inline(always)]
9089 fn default() -> Dpsifr1 {
9090 <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
9091 }
9092}
9093pub mod dpsifr1 {
9094
9095 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9096 pub struct Dirq8F_SPEC;
9097 pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
9098 impl Dirq8F {
9099 #[doc = "The cancel request is not generated"]
9100 pub const _0: Self = Self::new(0);
9101
9102 #[doc = "The cancel request is generated"]
9103 pub const _1: Self = Self::new(1);
9104 }
9105 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9106 pub struct Dirq9F_SPEC;
9107 pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
9108 impl Dirq9F {
9109 #[doc = "The cancel request is not generated"]
9110 pub const _0: Self = Self::new(0);
9111
9112 #[doc = "The cancel request is generated"]
9113 pub const _1: Self = Self::new(1);
9114 }
9115 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9116 pub struct Dirq10F_SPEC;
9117 pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
9118 impl Dirq10F {
9119 #[doc = "The cancel request is not generated"]
9120 pub const _0: Self = Self::new(0);
9121
9122 #[doc = "The cancel request is generated"]
9123 pub const _1: Self = Self::new(1);
9124 }
9125 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9126 pub struct Dirq11F_SPEC;
9127 pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
9128 impl Dirq11F {
9129 #[doc = "The cancel request is not generated"]
9130 pub const _0: Self = Self::new(0);
9131
9132 #[doc = "The cancel request is generated"]
9133 pub const _1: Self = Self::new(1);
9134 }
9135 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9136 pub struct Dirq12F_SPEC;
9137 pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
9138 impl Dirq12F {
9139 #[doc = "The cancel request is not generated"]
9140 pub const _0: Self = Self::new(0);
9141
9142 #[doc = "The cancel request is generated"]
9143 pub const _1: Self = Self::new(1);
9144 }
9145 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9146 pub struct Dirq13F_SPEC;
9147 pub type Dirq13F = crate::EnumBitfieldStruct<u8, Dirq13F_SPEC>;
9148 impl Dirq13F {
9149 #[doc = "The cancel request is not generated"]
9150 pub const _0: Self = Self::new(0);
9151
9152 #[doc = "The cancel request is generated"]
9153 pub const _1: Self = Self::new(1);
9154 }
9155 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9156 pub struct Dirq14F_SPEC;
9157 pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
9158 impl Dirq14F {
9159 #[doc = "The cancel request is not generated"]
9160 pub const _0: Self = Self::new(0);
9161
9162 #[doc = "The cancel request is generated"]
9163 pub const _1: Self = Self::new(1);
9164 }
9165 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9166 pub struct Dirq15F_SPEC;
9167 pub type Dirq15F = crate::EnumBitfieldStruct<u8, Dirq15F_SPEC>;
9168 impl Dirq15F {
9169 #[doc = "The cancel request is not generated"]
9170 pub const _0: Self = Self::new(0);
9171
9172 #[doc = "The cancel request is generated"]
9173 pub const _1: Self = Self::new(1);
9174 }
9175}
9176#[doc(hidden)]
9177#[derive(Copy, Clone, Eq, PartialEq)]
9178pub struct Dpsifr2_SPEC;
9179impl crate::sealed::RegSpec for Dpsifr2_SPEC {
9180 type DataType = u8;
9181}
9182
9183#[doc = "Deep Software Standby Interrupt Flag Register 2"]
9184pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
9185
9186impl Dpsifr2 {
9187 #[doc = "LVD1 Deep Software Standby Cancel Flag"]
9188 #[inline(always)]
9189 pub fn dlvd1if(
9190 self,
9191 ) -> crate::common::RegisterField<
9192 0,
9193 0x1,
9194 1,
9195 0,
9196 dpsifr2::Dlvd1If,
9197 dpsifr2::Dlvd1If,
9198 Dpsifr2_SPEC,
9199 crate::common::RW,
9200 > {
9201 crate::common::RegisterField::<
9202 0,
9203 0x1,
9204 1,
9205 0,
9206 dpsifr2::Dlvd1If,
9207 dpsifr2::Dlvd1If,
9208 Dpsifr2_SPEC,
9209 crate::common::RW,
9210 >::from_register(self, 0)
9211 }
9212
9213 #[doc = "LVD2 Deep Software Standby Cancel Flag"]
9214 #[inline(always)]
9215 pub fn dlvd2if(
9216 self,
9217 ) -> crate::common::RegisterField<
9218 1,
9219 0x1,
9220 1,
9221 0,
9222 dpsifr2::Dlvd2If,
9223 dpsifr2::Dlvd2If,
9224 Dpsifr2_SPEC,
9225 crate::common::RW,
9226 > {
9227 crate::common::RegisterField::<
9228 1,
9229 0x1,
9230 1,
9231 0,
9232 dpsifr2::Dlvd2If,
9233 dpsifr2::Dlvd2If,
9234 Dpsifr2_SPEC,
9235 crate::common::RW,
9236 >::from_register(self, 0)
9237 }
9238
9239 #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
9240 #[inline(always)]
9241 pub fn drtciif(
9242 self,
9243 ) -> crate::common::RegisterField<
9244 2,
9245 0x1,
9246 1,
9247 0,
9248 dpsifr2::Drtciif,
9249 dpsifr2::Drtciif,
9250 Dpsifr2_SPEC,
9251 crate::common::RW,
9252 > {
9253 crate::common::RegisterField::<
9254 2,
9255 0x1,
9256 1,
9257 0,
9258 dpsifr2::Drtciif,
9259 dpsifr2::Drtciif,
9260 Dpsifr2_SPEC,
9261 crate::common::RW,
9262 >::from_register(self, 0)
9263 }
9264
9265 #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
9266 #[inline(always)]
9267 pub fn drtcaif(
9268 self,
9269 ) -> crate::common::RegisterField<
9270 3,
9271 0x1,
9272 1,
9273 0,
9274 dpsifr2::Drtcaif,
9275 dpsifr2::Drtcaif,
9276 Dpsifr2_SPEC,
9277 crate::common::RW,
9278 > {
9279 crate::common::RegisterField::<
9280 3,
9281 0x1,
9282 1,
9283 0,
9284 dpsifr2::Drtcaif,
9285 dpsifr2::Drtcaif,
9286 Dpsifr2_SPEC,
9287 crate::common::RW,
9288 >::from_register(self, 0)
9289 }
9290
9291 #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
9292 #[inline(always)]
9293 pub fn dnmif(
9294 self,
9295 ) -> crate::common::RegisterField<
9296 4,
9297 0x1,
9298 1,
9299 0,
9300 dpsifr2::Dnmif,
9301 dpsifr2::Dnmif,
9302 Dpsifr2_SPEC,
9303 crate::common::RW,
9304 > {
9305 crate::common::RegisterField::<
9306 4,
9307 0x1,
9308 1,
9309 0,
9310 dpsifr2::Dnmif,
9311 dpsifr2::Dnmif,
9312 Dpsifr2_SPEC,
9313 crate::common::RW,
9314 >::from_register(self, 0)
9315 }
9316}
9317impl ::core::default::Default for Dpsifr2 {
9318 #[inline(always)]
9319 fn default() -> Dpsifr2 {
9320 <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
9321 }
9322}
9323pub mod dpsifr2 {
9324
9325 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9326 pub struct Dlvd1If_SPEC;
9327 pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
9328 impl Dlvd1If {
9329 #[doc = "The cancel request is not generated"]
9330 pub const _0: Self = Self::new(0);
9331
9332 #[doc = "The cancel request is generated"]
9333 pub const _1: Self = Self::new(1);
9334 }
9335 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9336 pub struct Dlvd2If_SPEC;
9337 pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
9338 impl Dlvd2If {
9339 #[doc = "The cancel request is not generated"]
9340 pub const _0: Self = Self::new(0);
9341
9342 #[doc = "The cancel request is generated"]
9343 pub const _1: Self = Self::new(1);
9344 }
9345 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9346 pub struct Drtciif_SPEC;
9347 pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
9348 impl Drtciif {
9349 #[doc = "The cancel request is not generated"]
9350 pub const _0: Self = Self::new(0);
9351
9352 #[doc = "The cancel request is generated"]
9353 pub const _1: Self = Self::new(1);
9354 }
9355 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9356 pub struct Drtcaif_SPEC;
9357 pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
9358 impl Drtcaif {
9359 #[doc = "The cancel request is not generated"]
9360 pub const _0: Self = Self::new(0);
9361
9362 #[doc = "The cancel request is generated"]
9363 pub const _1: Self = Self::new(1);
9364 }
9365 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9366 pub struct Dnmif_SPEC;
9367 pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
9368 impl Dnmif {
9369 #[doc = "The cancel request is not generated"]
9370 pub const _0: Self = Self::new(0);
9371
9372 #[doc = "The cancel request is generated"]
9373 pub const _1: Self = Self::new(1);
9374 }
9375}
9376#[doc(hidden)]
9377#[derive(Copy, Clone, Eq, PartialEq)]
9378pub struct Dpsifr3_SPEC;
9379impl crate::sealed::RegSpec for Dpsifr3_SPEC {
9380 type DataType = u8;
9381}
9382
9383#[doc = "Deep Software Standby Interrupt Flag Register 3"]
9384pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
9385
9386impl Dpsifr3 {
9387 #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Flag"]
9388 #[inline(always)]
9389 pub fn dusbfs0if(
9390 self,
9391 ) -> crate::common::RegisterField<
9392 0,
9393 0x1,
9394 1,
9395 0,
9396 dpsifr3::Dusbfs0If,
9397 dpsifr3::Dusbfs0If,
9398 Dpsifr3_SPEC,
9399 crate::common::RW,
9400 > {
9401 crate::common::RegisterField::<
9402 0,
9403 0x1,
9404 1,
9405 0,
9406 dpsifr3::Dusbfs0If,
9407 dpsifr3::Dusbfs0If,
9408 Dpsifr3_SPEC,
9409 crate::common::RW,
9410 >::from_register(self, 0)
9411 }
9412
9413 #[doc = "AGT1 Underflow Deep Software Standby Cancel Flag"]
9414 #[inline(always)]
9415 pub fn dagt1if(
9416 self,
9417 ) -> crate::common::RegisterField<
9418 2,
9419 0x1,
9420 1,
9421 0,
9422 dpsifr3::Dagt1If,
9423 dpsifr3::Dagt1If,
9424 Dpsifr3_SPEC,
9425 crate::common::RW,
9426 > {
9427 crate::common::RegisterField::<
9428 2,
9429 0x1,
9430 1,
9431 0,
9432 dpsifr3::Dagt1If,
9433 dpsifr3::Dagt1If,
9434 Dpsifr3_SPEC,
9435 crate::common::RW,
9436 >::from_register(self, 0)
9437 }
9438
9439 #[doc = "AGT3 Underflow Deep Software Standby Cancel Flag"]
9440 #[inline(always)]
9441 pub fn dagt3if(
9442 self,
9443 ) -> crate::common::RegisterField<
9444 3,
9445 0x1,
9446 1,
9447 0,
9448 dpsifr3::Dagt3If,
9449 dpsifr3::Dagt3If,
9450 Dpsifr3_SPEC,
9451 crate::common::RW,
9452 > {
9453 crate::common::RegisterField::<
9454 3,
9455 0x1,
9456 1,
9457 0,
9458 dpsifr3::Dagt3If,
9459 dpsifr3::Dagt3If,
9460 Dpsifr3_SPEC,
9461 crate::common::RW,
9462 >::from_register(self, 0)
9463 }
9464}
9465impl ::core::default::Default for Dpsifr3 {
9466 #[inline(always)]
9467 fn default() -> Dpsifr3 {
9468 <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
9469 }
9470}
9471pub mod dpsifr3 {
9472
9473 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9474 pub struct Dusbfs0If_SPEC;
9475 pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
9476 impl Dusbfs0If {
9477 #[doc = "The cancel request is not generated."]
9478 pub const _0: Self = Self::new(0);
9479
9480 #[doc = "The cancel request is generated."]
9481 pub const _1: Self = Self::new(1);
9482 }
9483 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9484 pub struct Dagt1If_SPEC;
9485 pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
9486 impl Dagt1If {
9487 #[doc = "The cancel request is not generated."]
9488 pub const _0: Self = Self::new(0);
9489
9490 #[doc = "The cancel request is generated."]
9491 pub const _1: Self = Self::new(1);
9492 }
9493 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9494 pub struct Dagt3If_SPEC;
9495 pub type Dagt3If = crate::EnumBitfieldStruct<u8, Dagt3If_SPEC>;
9496 impl Dagt3If {
9497 #[doc = "The cancel request is not generated."]
9498 pub const _0: Self = Self::new(0);
9499
9500 #[doc = "The cancel request is generated."]
9501 pub const _1: Self = Self::new(1);
9502 }
9503}
9504#[doc(hidden)]
9505#[derive(Copy, Clone, Eq, PartialEq)]
9506pub struct Dpsiegr0_SPEC;
9507impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
9508 type DataType = u8;
9509}
9510
9511#[doc = "Deep Software Standby Interrupt Edge Register 0"]
9512pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
9513
9514impl Dpsiegr0 {
9515 #[doc = "IRQ0-DS Pin Edge Select"]
9516 #[inline(always)]
9517 pub fn dirq0eg(
9518 self,
9519 ) -> crate::common::RegisterField<
9520 0,
9521 0x1,
9522 1,
9523 0,
9524 dpsiegr0::Dirq0Eg,
9525 dpsiegr0::Dirq0Eg,
9526 Dpsiegr0_SPEC,
9527 crate::common::RW,
9528 > {
9529 crate::common::RegisterField::<
9530 0,
9531 0x1,
9532 1,
9533 0,
9534 dpsiegr0::Dirq0Eg,
9535 dpsiegr0::Dirq0Eg,
9536 Dpsiegr0_SPEC,
9537 crate::common::RW,
9538 >::from_register(self, 0)
9539 }
9540
9541 #[doc = "IRQ1-DS Pin Edge Select"]
9542 #[inline(always)]
9543 pub fn dirq1eg(
9544 self,
9545 ) -> crate::common::RegisterField<
9546 1,
9547 0x1,
9548 1,
9549 0,
9550 dpsiegr0::Dirq1Eg,
9551 dpsiegr0::Dirq1Eg,
9552 Dpsiegr0_SPEC,
9553 crate::common::RW,
9554 > {
9555 crate::common::RegisterField::<
9556 1,
9557 0x1,
9558 1,
9559 0,
9560 dpsiegr0::Dirq1Eg,
9561 dpsiegr0::Dirq1Eg,
9562 Dpsiegr0_SPEC,
9563 crate::common::RW,
9564 >::from_register(self, 0)
9565 }
9566
9567 #[doc = "IRQ2-DS Pin Edge Select"]
9568 #[inline(always)]
9569 pub fn dirq2eg(
9570 self,
9571 ) -> crate::common::RegisterField<
9572 2,
9573 0x1,
9574 1,
9575 0,
9576 dpsiegr0::Dirq2Eg,
9577 dpsiegr0::Dirq2Eg,
9578 Dpsiegr0_SPEC,
9579 crate::common::RW,
9580 > {
9581 crate::common::RegisterField::<
9582 2,
9583 0x1,
9584 1,
9585 0,
9586 dpsiegr0::Dirq2Eg,
9587 dpsiegr0::Dirq2Eg,
9588 Dpsiegr0_SPEC,
9589 crate::common::RW,
9590 >::from_register(self, 0)
9591 }
9592
9593 #[doc = "IRQ3-DS Pin Edge Select"]
9594 #[inline(always)]
9595 pub fn dirq3eg(
9596 self,
9597 ) -> crate::common::RegisterField<
9598 3,
9599 0x1,
9600 1,
9601 0,
9602 dpsiegr0::Dirq3Eg,
9603 dpsiegr0::Dirq3Eg,
9604 Dpsiegr0_SPEC,
9605 crate::common::RW,
9606 > {
9607 crate::common::RegisterField::<
9608 3,
9609 0x1,
9610 1,
9611 0,
9612 dpsiegr0::Dirq3Eg,
9613 dpsiegr0::Dirq3Eg,
9614 Dpsiegr0_SPEC,
9615 crate::common::RW,
9616 >::from_register(self, 0)
9617 }
9618
9619 #[doc = "IRQ4-DS Pin Edge Select"]
9620 #[inline(always)]
9621 pub fn dirq4eg(
9622 self,
9623 ) -> crate::common::RegisterField<
9624 4,
9625 0x1,
9626 1,
9627 0,
9628 dpsiegr0::Dirq4Eg,
9629 dpsiegr0::Dirq4Eg,
9630 Dpsiegr0_SPEC,
9631 crate::common::RW,
9632 > {
9633 crate::common::RegisterField::<
9634 4,
9635 0x1,
9636 1,
9637 0,
9638 dpsiegr0::Dirq4Eg,
9639 dpsiegr0::Dirq4Eg,
9640 Dpsiegr0_SPEC,
9641 crate::common::RW,
9642 >::from_register(self, 0)
9643 }
9644
9645 #[doc = "IRQ5-DS Pin Edge Select"]
9646 #[inline(always)]
9647 pub fn dirq5eg(
9648 self,
9649 ) -> crate::common::RegisterField<
9650 5,
9651 0x1,
9652 1,
9653 0,
9654 dpsiegr0::Dirq5Eg,
9655 dpsiegr0::Dirq5Eg,
9656 Dpsiegr0_SPEC,
9657 crate::common::RW,
9658 > {
9659 crate::common::RegisterField::<
9660 5,
9661 0x1,
9662 1,
9663 0,
9664 dpsiegr0::Dirq5Eg,
9665 dpsiegr0::Dirq5Eg,
9666 Dpsiegr0_SPEC,
9667 crate::common::RW,
9668 >::from_register(self, 0)
9669 }
9670
9671 #[doc = "IRQ6-DS Pin Edge Select"]
9672 #[inline(always)]
9673 pub fn dirq6eg(
9674 self,
9675 ) -> crate::common::RegisterField<
9676 6,
9677 0x1,
9678 1,
9679 0,
9680 dpsiegr0::Dirq6Eg,
9681 dpsiegr0::Dirq6Eg,
9682 Dpsiegr0_SPEC,
9683 crate::common::RW,
9684 > {
9685 crate::common::RegisterField::<
9686 6,
9687 0x1,
9688 1,
9689 0,
9690 dpsiegr0::Dirq6Eg,
9691 dpsiegr0::Dirq6Eg,
9692 Dpsiegr0_SPEC,
9693 crate::common::RW,
9694 >::from_register(self, 0)
9695 }
9696
9697 #[doc = "IRQ7-DS Pin Edge Select"]
9698 #[inline(always)]
9699 pub fn dirq7eg(
9700 self,
9701 ) -> crate::common::RegisterField<
9702 7,
9703 0x1,
9704 1,
9705 0,
9706 dpsiegr0::Dirq7Eg,
9707 dpsiegr0::Dirq7Eg,
9708 Dpsiegr0_SPEC,
9709 crate::common::RW,
9710 > {
9711 crate::common::RegisterField::<
9712 7,
9713 0x1,
9714 1,
9715 0,
9716 dpsiegr0::Dirq7Eg,
9717 dpsiegr0::Dirq7Eg,
9718 Dpsiegr0_SPEC,
9719 crate::common::RW,
9720 >::from_register(self, 0)
9721 }
9722}
9723impl ::core::default::Default for Dpsiegr0 {
9724 #[inline(always)]
9725 fn default() -> Dpsiegr0 {
9726 <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
9727 }
9728}
9729pub mod dpsiegr0 {
9730
9731 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9732 pub struct Dirq0Eg_SPEC;
9733 pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
9734 impl Dirq0Eg {
9735 #[doc = "A cancel request is generated at a falling edge"]
9736 pub const _0: Self = Self::new(0);
9737
9738 #[doc = "A cancel request is generated at a rising edge"]
9739 pub const _1: Self = Self::new(1);
9740 }
9741 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9742 pub struct Dirq1Eg_SPEC;
9743 pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
9744 impl Dirq1Eg {
9745 #[doc = "A cancel request is generated at a falling edge"]
9746 pub const _0: Self = Self::new(0);
9747
9748 #[doc = "A cancel request is generated at a rising edge"]
9749 pub const _1: Self = Self::new(1);
9750 }
9751 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9752 pub struct Dirq2Eg_SPEC;
9753 pub type Dirq2Eg = crate::EnumBitfieldStruct<u8, Dirq2Eg_SPEC>;
9754 impl Dirq2Eg {
9755 #[doc = "A cancel request is generated at a falling edge"]
9756 pub const _0: Self = Self::new(0);
9757
9758 #[doc = "A cancel request is generated at a rising edge"]
9759 pub const _1: Self = Self::new(1);
9760 }
9761 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9762 pub struct Dirq3Eg_SPEC;
9763 pub type Dirq3Eg = crate::EnumBitfieldStruct<u8, Dirq3Eg_SPEC>;
9764 impl Dirq3Eg {
9765 #[doc = "A cancel request is generated at a falling edge"]
9766 pub const _0: Self = Self::new(0);
9767
9768 #[doc = "A cancel request is generated at a rising edge"]
9769 pub const _1: Self = Self::new(1);
9770 }
9771 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9772 pub struct Dirq4Eg_SPEC;
9773 pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
9774 impl Dirq4Eg {
9775 #[doc = "A cancel request is generated at a falling edge"]
9776 pub const _0: Self = Self::new(0);
9777
9778 #[doc = "A cancel request is generated at a rising edge"]
9779 pub const _1: Self = Self::new(1);
9780 }
9781 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9782 pub struct Dirq5Eg_SPEC;
9783 pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
9784 impl Dirq5Eg {
9785 #[doc = "A cancel request is generated at a falling edge"]
9786 pub const _0: Self = Self::new(0);
9787
9788 #[doc = "A cancel request is generated at a rising edge"]
9789 pub const _1: Self = Self::new(1);
9790 }
9791 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9792 pub struct Dirq6Eg_SPEC;
9793 pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
9794 impl Dirq6Eg {
9795 #[doc = "A cancel request is generated at a falling edge"]
9796 pub const _0: Self = Self::new(0);
9797
9798 #[doc = "A cancel request is generated at a rising edge"]
9799 pub const _1: Self = Self::new(1);
9800 }
9801 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9802 pub struct Dirq7Eg_SPEC;
9803 pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
9804 impl Dirq7Eg {
9805 #[doc = "A cancel request is generated at a falling edge"]
9806 pub const _0: Self = Self::new(0);
9807
9808 #[doc = "A cancel request is generated at a rising edge"]
9809 pub const _1: Self = Self::new(1);
9810 }
9811}
9812#[doc(hidden)]
9813#[derive(Copy, Clone, Eq, PartialEq)]
9814pub struct Dpsiegr1_SPEC;
9815impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
9816 type DataType = u8;
9817}
9818
9819#[doc = "Deep Software Standby Interrupt Edge Register 1"]
9820pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
9821
9822impl Dpsiegr1 {
9823 #[doc = "IRQ8-DS Pin Edge Select"]
9824 #[inline(always)]
9825 pub fn dirq8eg(
9826 self,
9827 ) -> crate::common::RegisterField<
9828 0,
9829 0x1,
9830 1,
9831 0,
9832 dpsiegr1::Dirq8Eg,
9833 dpsiegr1::Dirq8Eg,
9834 Dpsiegr1_SPEC,
9835 crate::common::RW,
9836 > {
9837 crate::common::RegisterField::<
9838 0,
9839 0x1,
9840 1,
9841 0,
9842 dpsiegr1::Dirq8Eg,
9843 dpsiegr1::Dirq8Eg,
9844 Dpsiegr1_SPEC,
9845 crate::common::RW,
9846 >::from_register(self, 0)
9847 }
9848
9849 #[doc = "IRQ9-DS Pin Edge Select"]
9850 #[inline(always)]
9851 pub fn dirq9eg(
9852 self,
9853 ) -> crate::common::RegisterField<
9854 1,
9855 0x1,
9856 1,
9857 0,
9858 dpsiegr1::Dirq9Eg,
9859 dpsiegr1::Dirq9Eg,
9860 Dpsiegr1_SPEC,
9861 crate::common::RW,
9862 > {
9863 crate::common::RegisterField::<
9864 1,
9865 0x1,
9866 1,
9867 0,
9868 dpsiegr1::Dirq9Eg,
9869 dpsiegr1::Dirq9Eg,
9870 Dpsiegr1_SPEC,
9871 crate::common::RW,
9872 >::from_register(self, 0)
9873 }
9874
9875 #[doc = "IRQ10-DS Pin Edge Select"]
9876 #[inline(always)]
9877 pub fn dirq10eg(
9878 self,
9879 ) -> crate::common::RegisterField<
9880 2,
9881 0x1,
9882 1,
9883 0,
9884 dpsiegr1::Dirq10Eg,
9885 dpsiegr1::Dirq10Eg,
9886 Dpsiegr1_SPEC,
9887 crate::common::RW,
9888 > {
9889 crate::common::RegisterField::<
9890 2,
9891 0x1,
9892 1,
9893 0,
9894 dpsiegr1::Dirq10Eg,
9895 dpsiegr1::Dirq10Eg,
9896 Dpsiegr1_SPEC,
9897 crate::common::RW,
9898 >::from_register(self, 0)
9899 }
9900
9901 #[doc = "IRQ11-DS Pin Edge Select"]
9902 #[inline(always)]
9903 pub fn dirq11eg(
9904 self,
9905 ) -> crate::common::RegisterField<
9906 3,
9907 0x1,
9908 1,
9909 0,
9910 dpsiegr1::Dirq11Eg,
9911 dpsiegr1::Dirq11Eg,
9912 Dpsiegr1_SPEC,
9913 crate::common::RW,
9914 > {
9915 crate::common::RegisterField::<
9916 3,
9917 0x1,
9918 1,
9919 0,
9920 dpsiegr1::Dirq11Eg,
9921 dpsiegr1::Dirq11Eg,
9922 Dpsiegr1_SPEC,
9923 crate::common::RW,
9924 >::from_register(self, 0)
9925 }
9926
9927 #[doc = "IRQ12-DS Pin Edge Select"]
9928 #[inline(always)]
9929 pub fn dirq12eg(
9930 self,
9931 ) -> crate::common::RegisterField<
9932 4,
9933 0x1,
9934 1,
9935 0,
9936 dpsiegr1::Dirq12Eg,
9937 dpsiegr1::Dirq12Eg,
9938 Dpsiegr1_SPEC,
9939 crate::common::RW,
9940 > {
9941 crate::common::RegisterField::<
9942 4,
9943 0x1,
9944 1,
9945 0,
9946 dpsiegr1::Dirq12Eg,
9947 dpsiegr1::Dirq12Eg,
9948 Dpsiegr1_SPEC,
9949 crate::common::RW,
9950 >::from_register(self, 0)
9951 }
9952
9953 #[doc = "IRQ13-DS Pin Edge Select"]
9954 #[inline(always)]
9955 pub fn dirq13eg(
9956 self,
9957 ) -> crate::common::RegisterField<
9958 5,
9959 0x1,
9960 1,
9961 0,
9962 dpsiegr1::Dirq13Eg,
9963 dpsiegr1::Dirq13Eg,
9964 Dpsiegr1_SPEC,
9965 crate::common::RW,
9966 > {
9967 crate::common::RegisterField::<
9968 5,
9969 0x1,
9970 1,
9971 0,
9972 dpsiegr1::Dirq13Eg,
9973 dpsiegr1::Dirq13Eg,
9974 Dpsiegr1_SPEC,
9975 crate::common::RW,
9976 >::from_register(self, 0)
9977 }
9978
9979 #[doc = "IRQ14-DS Pin Edge Select"]
9980 #[inline(always)]
9981 pub fn dirq14eg(
9982 self,
9983 ) -> crate::common::RegisterField<
9984 6,
9985 0x1,
9986 1,
9987 0,
9988 dpsiegr1::Dirq14Eg,
9989 dpsiegr1::Dirq14Eg,
9990 Dpsiegr1_SPEC,
9991 crate::common::RW,
9992 > {
9993 crate::common::RegisterField::<
9994 6,
9995 0x1,
9996 1,
9997 0,
9998 dpsiegr1::Dirq14Eg,
9999 dpsiegr1::Dirq14Eg,
10000 Dpsiegr1_SPEC,
10001 crate::common::RW,
10002 >::from_register(self, 0)
10003 }
10004
10005 #[doc = "IRQ15-DS Pin Edge Select"]
10006 #[inline(always)]
10007 pub fn dirq15eg(
10008 self,
10009 ) -> crate::common::RegisterField<
10010 7,
10011 0x1,
10012 1,
10013 0,
10014 dpsiegr1::Dirq15Eg,
10015 dpsiegr1::Dirq15Eg,
10016 Dpsiegr1_SPEC,
10017 crate::common::RW,
10018 > {
10019 crate::common::RegisterField::<
10020 7,
10021 0x1,
10022 1,
10023 0,
10024 dpsiegr1::Dirq15Eg,
10025 dpsiegr1::Dirq15Eg,
10026 Dpsiegr1_SPEC,
10027 crate::common::RW,
10028 >::from_register(self, 0)
10029 }
10030}
10031impl ::core::default::Default for Dpsiegr1 {
10032 #[inline(always)]
10033 fn default() -> Dpsiegr1 {
10034 <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
10035 }
10036}
10037pub mod dpsiegr1 {
10038
10039 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10040 pub struct Dirq8Eg_SPEC;
10041 pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
10042 impl Dirq8Eg {
10043 #[doc = "A cancel request is generated at a falling edge."]
10044 pub const _0: Self = Self::new(0);
10045
10046 #[doc = "A cancel request is generated at a rising edge."]
10047 pub const _1: Self = Self::new(1);
10048 }
10049 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10050 pub struct Dirq9Eg_SPEC;
10051 pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
10052 impl Dirq9Eg {
10053 #[doc = "A cancel request is generated at a falling edge."]
10054 pub const _0: Self = Self::new(0);
10055
10056 #[doc = "A cancel request is generated at a rising edge."]
10057 pub const _1: Self = Self::new(1);
10058 }
10059 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10060 pub struct Dirq10Eg_SPEC;
10061 pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
10062 impl Dirq10Eg {
10063 #[doc = "A cancel request is generated at a falling edge."]
10064 pub const _0: Self = Self::new(0);
10065
10066 #[doc = "A cancel request is generated at a rising edge"]
10067 pub const _1: Self = Self::new(1);
10068 }
10069 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10070 pub struct Dirq11Eg_SPEC;
10071 pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
10072 impl Dirq11Eg {
10073 #[doc = "A cancel request is generated at a falling edge."]
10074 pub const _0: Self = Self::new(0);
10075
10076 #[doc = "A cancel request is generated at a rising edge."]
10077 pub const _1: Self = Self::new(1);
10078 }
10079 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10080 pub struct Dirq12Eg_SPEC;
10081 pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
10082 impl Dirq12Eg {
10083 #[doc = "A cancel request is generated at a falling edge."]
10084 pub const _0: Self = Self::new(0);
10085
10086 #[doc = "A cancel request is generated at a rising edge."]
10087 pub const _1: Self = Self::new(1);
10088 }
10089 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10090 pub struct Dirq13Eg_SPEC;
10091 pub type Dirq13Eg = crate::EnumBitfieldStruct<u8, Dirq13Eg_SPEC>;
10092 impl Dirq13Eg {
10093 #[doc = "A cancel request is generated at a falling edge."]
10094 pub const _0: Self = Self::new(0);
10095
10096 #[doc = "A cancel request is generated at a rising edge."]
10097 pub const _1: Self = Self::new(1);
10098 }
10099 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10100 pub struct Dirq14Eg_SPEC;
10101 pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
10102 impl Dirq14Eg {
10103 #[doc = "A cancel request is generated at a falling edge."]
10104 pub const _0: Self = Self::new(0);
10105
10106 #[doc = "A cancel request is generated at a rising edge."]
10107 pub const _1: Self = Self::new(1);
10108 }
10109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10110 pub struct Dirq15Eg_SPEC;
10111 pub type Dirq15Eg = crate::EnumBitfieldStruct<u8, Dirq15Eg_SPEC>;
10112 impl Dirq15Eg {
10113 #[doc = "A cancel request is generated at a falling edge."]
10114 pub const _0: Self = Self::new(0);
10115
10116 #[doc = "A cancel request is generated at a rising edge."]
10117 pub const _1: Self = Self::new(1);
10118 }
10119}
10120#[doc(hidden)]
10121#[derive(Copy, Clone, Eq, PartialEq)]
10122pub struct Dpsiegr2_SPEC;
10123impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
10124 type DataType = u8;
10125}
10126
10127#[doc = "Deep Software Standby Interrupt Edge Register 2"]
10128pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
10129
10130impl Dpsiegr2 {
10131 #[doc = "LVD1 Edge Select"]
10132 #[inline(always)]
10133 pub fn dlvd1eg(
10134 self,
10135 ) -> crate::common::RegisterField<
10136 0,
10137 0x1,
10138 1,
10139 0,
10140 dpsiegr2::Dlvd1Eg,
10141 dpsiegr2::Dlvd1Eg,
10142 Dpsiegr2_SPEC,
10143 crate::common::RW,
10144 > {
10145 crate::common::RegisterField::<
10146 0,
10147 0x1,
10148 1,
10149 0,
10150 dpsiegr2::Dlvd1Eg,
10151 dpsiegr2::Dlvd1Eg,
10152 Dpsiegr2_SPEC,
10153 crate::common::RW,
10154 >::from_register(self, 0)
10155 }
10156
10157 #[doc = "LVD2 Edge Select"]
10158 #[inline(always)]
10159 pub fn dlvd2eg(
10160 self,
10161 ) -> crate::common::RegisterField<
10162 1,
10163 0x1,
10164 1,
10165 0,
10166 dpsiegr2::Dlvd2Eg,
10167 dpsiegr2::Dlvd2Eg,
10168 Dpsiegr2_SPEC,
10169 crate::common::RW,
10170 > {
10171 crate::common::RegisterField::<
10172 1,
10173 0x1,
10174 1,
10175 0,
10176 dpsiegr2::Dlvd2Eg,
10177 dpsiegr2::Dlvd2Eg,
10178 Dpsiegr2_SPEC,
10179 crate::common::RW,
10180 >::from_register(self, 0)
10181 }
10182
10183 #[doc = "NMI Pin Edge Select"]
10184 #[inline(always)]
10185 pub fn dnmieg(
10186 self,
10187 ) -> crate::common::RegisterField<
10188 4,
10189 0x1,
10190 1,
10191 0,
10192 dpsiegr2::Dnmieg,
10193 dpsiegr2::Dnmieg,
10194 Dpsiegr2_SPEC,
10195 crate::common::RW,
10196 > {
10197 crate::common::RegisterField::<
10198 4,
10199 0x1,
10200 1,
10201 0,
10202 dpsiegr2::Dnmieg,
10203 dpsiegr2::Dnmieg,
10204 Dpsiegr2_SPEC,
10205 crate::common::RW,
10206 >::from_register(self, 0)
10207 }
10208}
10209impl ::core::default::Default for Dpsiegr2 {
10210 #[inline(always)]
10211 fn default() -> Dpsiegr2 {
10212 <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
10213 }
10214}
10215pub mod dpsiegr2 {
10216
10217 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10218 pub struct Dlvd1Eg_SPEC;
10219 pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
10220 impl Dlvd1Eg {
10221 #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
10222 pub const _0: Self = Self::new(0);
10223
10224 #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
10225 pub const _1: Self = Self::new(1);
10226 }
10227 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10228 pub struct Dlvd2Eg_SPEC;
10229 pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
10230 impl Dlvd2Eg {
10231 #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
10232 pub const _0: Self = Self::new(0);
10233
10234 #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
10235 pub const _1: Self = Self::new(1);
10236 }
10237 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10238 pub struct Dnmieg_SPEC;
10239 pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
10240 impl Dnmieg {
10241 #[doc = "A cancel request is generated at a falling edge"]
10242 pub const _0: Self = Self::new(0);
10243
10244 #[doc = "A cancel request is generated at a rising edge"]
10245 pub const _1: Self = Self::new(1);
10246 }
10247}
10248#[doc(hidden)]
10249#[derive(Copy, Clone, Eq, PartialEq)]
10250pub struct Syocdcr_SPEC;
10251impl crate::sealed::RegSpec for Syocdcr_SPEC {
10252 type DataType = u8;
10253}
10254
10255#[doc = "System Control OCD Control Register"]
10256pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
10257
10258impl Syocdcr {
10259 #[doc = "Deep Software Standby OCD flag"]
10260 #[inline(always)]
10261 pub fn docdf(
10262 self,
10263 ) -> crate::common::RegisterField<
10264 0,
10265 0x1,
10266 1,
10267 0,
10268 syocdcr::Docdf,
10269 syocdcr::Docdf,
10270 Syocdcr_SPEC,
10271 crate::common::RW,
10272 > {
10273 crate::common::RegisterField::<
10274 0,
10275 0x1,
10276 1,
10277 0,
10278 syocdcr::Docdf,
10279 syocdcr::Docdf,
10280 Syocdcr_SPEC,
10281 crate::common::RW,
10282 >::from_register(self, 0)
10283 }
10284
10285 #[doc = "Debugger Enable bit"]
10286 #[inline(always)]
10287 pub fn dbgen(
10288 self,
10289 ) -> crate::common::RegisterField<
10290 7,
10291 0x1,
10292 1,
10293 0,
10294 syocdcr::Dbgen,
10295 syocdcr::Dbgen,
10296 Syocdcr_SPEC,
10297 crate::common::RW,
10298 > {
10299 crate::common::RegisterField::<
10300 7,
10301 0x1,
10302 1,
10303 0,
10304 syocdcr::Dbgen,
10305 syocdcr::Dbgen,
10306 Syocdcr_SPEC,
10307 crate::common::RW,
10308 >::from_register(self, 0)
10309 }
10310}
10311impl ::core::default::Default for Syocdcr {
10312 #[inline(always)]
10313 fn default() -> Syocdcr {
10314 <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
10315 }
10316}
10317pub mod syocdcr {
10318
10319 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10320 pub struct Docdf_SPEC;
10321 pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
10322 impl Docdf {
10323 #[doc = "DBIRQ is not generated"]
10324 pub const _0: Self = Self::new(0);
10325
10326 #[doc = "DBIRQ is generated"]
10327 pub const _1: Self = Self::new(1);
10328 }
10329 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10330 pub struct Dbgen_SPEC;
10331 pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
10332 impl Dbgen {
10333 #[doc = "On-chip debugger is disabled"]
10334 pub const _0: Self = Self::new(0);
10335
10336 #[doc = "On-chip debugger is enabled"]
10337 pub const _1: Self = Self::new(1);
10338 }
10339}
10340#[doc(hidden)]
10341#[derive(Copy, Clone, Eq, PartialEq)]
10342pub struct Rstsr0_SPEC;
10343impl crate::sealed::RegSpec for Rstsr0_SPEC {
10344 type DataType = u8;
10345}
10346
10347#[doc = "Reset Status Register 0"]
10348pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
10349
10350impl Rstsr0 {
10351 #[doc = "Power-On Reset Detect Flag"]
10352 #[inline(always)]
10353 pub fn porf(
10354 self,
10355 ) -> crate::common::RegisterField<
10356 0,
10357 0x1,
10358 1,
10359 0,
10360 rstsr0::Porf,
10361 rstsr0::Porf,
10362 Rstsr0_SPEC,
10363 crate::common::RW,
10364 > {
10365 crate::common::RegisterField::<
10366 0,
10367 0x1,
10368 1,
10369 0,
10370 rstsr0::Porf,
10371 rstsr0::Porf,
10372 Rstsr0_SPEC,
10373 crate::common::RW,
10374 >::from_register(self, 0)
10375 }
10376
10377 #[doc = "Voltage Monitor 0 Reset Detect Flag"]
10378 #[inline(always)]
10379 pub fn lvd0rf(
10380 self,
10381 ) -> crate::common::RegisterField<
10382 1,
10383 0x1,
10384 1,
10385 0,
10386 rstsr0::Lvd0Rf,
10387 rstsr0::Lvd0Rf,
10388 Rstsr0_SPEC,
10389 crate::common::RW,
10390 > {
10391 crate::common::RegisterField::<
10392 1,
10393 0x1,
10394 1,
10395 0,
10396 rstsr0::Lvd0Rf,
10397 rstsr0::Lvd0Rf,
10398 Rstsr0_SPEC,
10399 crate::common::RW,
10400 >::from_register(self, 0)
10401 }
10402
10403 #[doc = "Voltage Monitor 1 Reset Detect Flag"]
10404 #[inline(always)]
10405 pub fn lvd1rf(
10406 self,
10407 ) -> crate::common::RegisterField<
10408 2,
10409 0x1,
10410 1,
10411 0,
10412 rstsr0::Lvd1Rf,
10413 rstsr0::Lvd1Rf,
10414 Rstsr0_SPEC,
10415 crate::common::RW,
10416 > {
10417 crate::common::RegisterField::<
10418 2,
10419 0x1,
10420 1,
10421 0,
10422 rstsr0::Lvd1Rf,
10423 rstsr0::Lvd1Rf,
10424 Rstsr0_SPEC,
10425 crate::common::RW,
10426 >::from_register(self, 0)
10427 }
10428
10429 #[doc = "Voltage Monitor 2 Reset Detect Flag"]
10430 #[inline(always)]
10431 pub fn lvd2rf(
10432 self,
10433 ) -> crate::common::RegisterField<
10434 3,
10435 0x1,
10436 1,
10437 0,
10438 rstsr0::Lvd2Rf,
10439 rstsr0::Lvd2Rf,
10440 Rstsr0_SPEC,
10441 crate::common::RW,
10442 > {
10443 crate::common::RegisterField::<
10444 3,
10445 0x1,
10446 1,
10447 0,
10448 rstsr0::Lvd2Rf,
10449 rstsr0::Lvd2Rf,
10450 Rstsr0_SPEC,
10451 crate::common::RW,
10452 >::from_register(self, 0)
10453 }
10454
10455 #[doc = "Deep Software Standby Reset Detect Flag"]
10456 #[inline(always)]
10457 pub fn dpsrstf(
10458 self,
10459 ) -> crate::common::RegisterField<
10460 7,
10461 0x1,
10462 1,
10463 0,
10464 rstsr0::Dpsrstf,
10465 rstsr0::Dpsrstf,
10466 Rstsr0_SPEC,
10467 crate::common::RW,
10468 > {
10469 crate::common::RegisterField::<
10470 7,
10471 0x1,
10472 1,
10473 0,
10474 rstsr0::Dpsrstf,
10475 rstsr0::Dpsrstf,
10476 Rstsr0_SPEC,
10477 crate::common::RW,
10478 >::from_register(self, 0)
10479 }
10480}
10481impl ::core::default::Default for Rstsr0 {
10482 #[inline(always)]
10483 fn default() -> Rstsr0 {
10484 <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
10485 }
10486}
10487pub mod rstsr0 {
10488
10489 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10490 pub struct Porf_SPEC;
10491 pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
10492 impl Porf {
10493 #[doc = "Power-on reset not detected"]
10494 pub const _0: Self = Self::new(0);
10495
10496 #[doc = "Power-on reset detected"]
10497 pub const _1: Self = Self::new(1);
10498 }
10499 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10500 pub struct Lvd0Rf_SPEC;
10501 pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
10502 impl Lvd0Rf {
10503 #[doc = "Voltage monitor 0 reset not detected"]
10504 pub const _0: Self = Self::new(0);
10505
10506 #[doc = "Voltage monitor 0 reset detected"]
10507 pub const _1: Self = Self::new(1);
10508 }
10509 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10510 pub struct Lvd1Rf_SPEC;
10511 pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
10512 impl Lvd1Rf {
10513 #[doc = "Voltage monitor 1 reset not detected"]
10514 pub const _0: Self = Self::new(0);
10515
10516 #[doc = "Voltage monitor 1 reset detected"]
10517 pub const _1: Self = Self::new(1);
10518 }
10519 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10520 pub struct Lvd2Rf_SPEC;
10521 pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
10522 impl Lvd2Rf {
10523 #[doc = "Voltage monitor 2 reset not detected"]
10524 pub const _0: Self = Self::new(0);
10525
10526 #[doc = "Voltage monitor 2 reset detected"]
10527 pub const _1: Self = Self::new(1);
10528 }
10529 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10530 pub struct Dpsrstf_SPEC;
10531 pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
10532 impl Dpsrstf {
10533 #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
10534 pub const _0: Self = Self::new(0);
10535
10536 #[doc = "Deep software standby mode cancellation requested by an interrupt."]
10537 pub const _1: Self = Self::new(1);
10538 }
10539}
10540#[doc(hidden)]
10541#[derive(Copy, Clone, Eq, PartialEq)]
10542pub struct Rstsr2_SPEC;
10543impl crate::sealed::RegSpec for Rstsr2_SPEC {
10544 type DataType = u8;
10545}
10546
10547#[doc = "Reset Status Register 2"]
10548pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
10549
10550impl Rstsr2 {
10551 #[doc = "Cold/Warm Start Determination Flag"]
10552 #[inline(always)]
10553 pub fn cwsf(
10554 self,
10555 ) -> crate::common::RegisterField<
10556 0,
10557 0x1,
10558 1,
10559 0,
10560 rstsr2::Cwsf,
10561 rstsr2::Cwsf,
10562 Rstsr2_SPEC,
10563 crate::common::RW,
10564 > {
10565 crate::common::RegisterField::<
10566 0,
10567 0x1,
10568 1,
10569 0,
10570 rstsr2::Cwsf,
10571 rstsr2::Cwsf,
10572 Rstsr2_SPEC,
10573 crate::common::RW,
10574 >::from_register(self, 0)
10575 }
10576}
10577impl ::core::default::Default for Rstsr2 {
10578 #[inline(always)]
10579 fn default() -> Rstsr2 {
10580 <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
10581 }
10582}
10583pub mod rstsr2 {
10584
10585 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10586 pub struct Cwsf_SPEC;
10587 pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
10588 impl Cwsf {
10589 #[doc = "Cold start"]
10590 pub const _0: Self = Self::new(0);
10591
10592 #[doc = "Warm start"]
10593 pub const _1: Self = Self::new(1);
10594 }
10595}
10596#[doc(hidden)]
10597#[derive(Copy, Clone, Eq, PartialEq)]
10598pub struct Momcr_SPEC;
10599impl crate::sealed::RegSpec for Momcr_SPEC {
10600 type DataType = u8;
10601}
10602
10603#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
10604pub type Momcr = crate::RegValueT<Momcr_SPEC>;
10605
10606impl Momcr {
10607 #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
10608 #[inline(always)]
10609 pub fn modrv(
10610 self,
10611 ) -> crate::common::RegisterField<
10612 4,
10613 0x3,
10614 1,
10615 0,
10616 momcr::Modrv,
10617 momcr::Modrv,
10618 Momcr_SPEC,
10619 crate::common::RW,
10620 > {
10621 crate::common::RegisterField::<
10622 4,
10623 0x3,
10624 1,
10625 0,
10626 momcr::Modrv,
10627 momcr::Modrv,
10628 Momcr_SPEC,
10629 crate::common::RW,
10630 >::from_register(self, 0)
10631 }
10632
10633 #[doc = "Main Clock Oscillator Switching"]
10634 #[inline(always)]
10635 pub fn mosel(
10636 self,
10637 ) -> crate::common::RegisterField<
10638 6,
10639 0x1,
10640 1,
10641 0,
10642 momcr::Mosel,
10643 momcr::Mosel,
10644 Momcr_SPEC,
10645 crate::common::RW,
10646 > {
10647 crate::common::RegisterField::<
10648 6,
10649 0x1,
10650 1,
10651 0,
10652 momcr::Mosel,
10653 momcr::Mosel,
10654 Momcr_SPEC,
10655 crate::common::RW,
10656 >::from_register(self, 0)
10657 }
10658}
10659impl ::core::default::Default for Momcr {
10660 #[inline(always)]
10661 fn default() -> Momcr {
10662 <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
10663 }
10664}
10665pub mod momcr {
10666
10667 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10668 pub struct Modrv_SPEC;
10669 pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
10670 impl Modrv {
10671 #[doc = "20 MHz to 24 MHz"]
10672 pub const _00: Self = Self::new(0);
10673
10674 #[doc = "16 MHz to 20 MHz"]
10675 pub const _01: Self = Self::new(1);
10676
10677 #[doc = "8 MHz to 16 MHz"]
10678 pub const _10: Self = Self::new(2);
10679
10680 #[doc = "8 MHz"]
10681 pub const _11: Self = Self::new(3);
10682 }
10683 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10684 pub struct Mosel_SPEC;
10685 pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
10686 impl Mosel {
10687 #[doc = "Resonator"]
10688 pub const _0: Self = Self::new(0);
10689
10690 #[doc = "External clock input"]
10691 pub const _1: Self = Self::new(1);
10692 }
10693}
10694#[doc(hidden)]
10695#[derive(Copy, Clone, Eq, PartialEq)]
10696pub struct Fwepror_SPEC;
10697impl crate::sealed::RegSpec for Fwepror_SPEC {
10698 type DataType = u8;
10699}
10700
10701#[doc = "Flash P/E Protect Register"]
10702pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
10703
10704impl Fwepror {
10705 #[doc = "Flash Programming and Erasure"]
10706 #[inline(always)]
10707 pub fn flwe(
10708 self,
10709 ) -> crate::common::RegisterField<
10710 0,
10711 0x3,
10712 1,
10713 0,
10714 fwepror::Flwe,
10715 fwepror::Flwe,
10716 Fwepror_SPEC,
10717 crate::common::RW,
10718 > {
10719 crate::common::RegisterField::<
10720 0,
10721 0x3,
10722 1,
10723 0,
10724 fwepror::Flwe,
10725 fwepror::Flwe,
10726 Fwepror_SPEC,
10727 crate::common::RW,
10728 >::from_register(self, 0)
10729 }
10730}
10731impl ::core::default::Default for Fwepror {
10732 #[inline(always)]
10733 fn default() -> Fwepror {
10734 <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
10735 }
10736}
10737pub mod fwepror {
10738
10739 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10740 pub struct Flwe_SPEC;
10741 pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
10742 impl Flwe {
10743 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10744 pub const _00: Self = Self::new(0);
10745
10746 #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10747 pub const _01: Self = Self::new(1);
10748
10749 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10750 pub const _10: Self = Self::new(2);
10751
10752 #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
10753 pub const _11: Self = Self::new(3);
10754 }
10755}
10756#[doc(hidden)]
10757#[derive(Copy, Clone, Eq, PartialEq)]
10758pub struct Lvd1Cmpcr_SPEC;
10759impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
10760 type DataType = u8;
10761}
10762
10763#[doc = "Voltage Monitoring 1 Comparator Control Register"]
10764pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
10765
10766impl Lvd1Cmpcr {
10767 #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
10768 #[inline(always)]
10769 pub fn lvd1lvl(
10770 self,
10771 ) -> crate::common::RegisterField<
10772 0,
10773 0x1f,
10774 1,
10775 0,
10776 lvd1cmpcr::Lvd1Lvl,
10777 lvd1cmpcr::Lvd1Lvl,
10778 Lvd1Cmpcr_SPEC,
10779 crate::common::RW,
10780 > {
10781 crate::common::RegisterField::<
10782 0,
10783 0x1f,
10784 1,
10785 0,
10786 lvd1cmpcr::Lvd1Lvl,
10787 lvd1cmpcr::Lvd1Lvl,
10788 Lvd1Cmpcr_SPEC,
10789 crate::common::RW,
10790 >::from_register(self, 0)
10791 }
10792
10793 #[doc = "Voltage Detection 1 Enable"]
10794 #[inline(always)]
10795 pub fn lvd1e(
10796 self,
10797 ) -> crate::common::RegisterField<
10798 7,
10799 0x1,
10800 1,
10801 0,
10802 lvd1cmpcr::Lvd1E,
10803 lvd1cmpcr::Lvd1E,
10804 Lvd1Cmpcr_SPEC,
10805 crate::common::RW,
10806 > {
10807 crate::common::RegisterField::<
10808 7,
10809 0x1,
10810 1,
10811 0,
10812 lvd1cmpcr::Lvd1E,
10813 lvd1cmpcr::Lvd1E,
10814 Lvd1Cmpcr_SPEC,
10815 crate::common::RW,
10816 >::from_register(self, 0)
10817 }
10818}
10819impl ::core::default::Default for Lvd1Cmpcr {
10820 #[inline(always)]
10821 fn default() -> Lvd1Cmpcr {
10822 <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
10823 }
10824}
10825pub mod lvd1cmpcr {
10826
10827 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10828 pub struct Lvd1Lvl_SPEC;
10829 pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
10830 impl Lvd1Lvl {
10831 #[doc = "2.99 V (Vdet1_1)"]
10832 pub const _0_X_11: Self = Self::new(17);
10833
10834 #[doc = "2.92 V (Vdet1_2)"]
10835 pub const _0_X_12: Self = Self::new(18);
10836
10837 #[doc = "2.85 V (Vdet1_3)"]
10838 pub const _0_X_13: Self = Self::new(19);
10839 }
10840 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10841 pub struct Lvd1E_SPEC;
10842 pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
10843 impl Lvd1E {
10844 #[doc = "Voltage detection 1 circuit disabled"]
10845 pub const _0: Self = Self::new(0);
10846
10847 #[doc = "Voltage detection 1 circuit enabled"]
10848 pub const _1: Self = Self::new(1);
10849 }
10850}
10851#[doc(hidden)]
10852#[derive(Copy, Clone, Eq, PartialEq)]
10853pub struct Lvd2Cmpcr_SPEC;
10854impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
10855 type DataType = u8;
10856}
10857
10858#[doc = "Voltage Monitoring 2 Comparator Control Register"]
10859pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
10860
10861impl Lvd2Cmpcr {
10862 #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
10863 #[inline(always)]
10864 pub fn lvd2lvl(
10865 self,
10866 ) -> crate::common::RegisterField<
10867 0,
10868 0x7,
10869 1,
10870 0,
10871 lvd2cmpcr::Lvd2Lvl,
10872 lvd2cmpcr::Lvd2Lvl,
10873 Lvd2Cmpcr_SPEC,
10874 crate::common::RW,
10875 > {
10876 crate::common::RegisterField::<
10877 0,
10878 0x7,
10879 1,
10880 0,
10881 lvd2cmpcr::Lvd2Lvl,
10882 lvd2cmpcr::Lvd2Lvl,
10883 Lvd2Cmpcr_SPEC,
10884 crate::common::RW,
10885 >::from_register(self, 0)
10886 }
10887
10888 #[doc = "Voltage Detection 2 Enable"]
10889 #[inline(always)]
10890 pub fn lvd2e(
10891 self,
10892 ) -> crate::common::RegisterField<
10893 7,
10894 0x1,
10895 1,
10896 0,
10897 lvd2cmpcr::Lvd2E,
10898 lvd2cmpcr::Lvd2E,
10899 Lvd2Cmpcr_SPEC,
10900 crate::common::RW,
10901 > {
10902 crate::common::RegisterField::<
10903 7,
10904 0x1,
10905 1,
10906 0,
10907 lvd2cmpcr::Lvd2E,
10908 lvd2cmpcr::Lvd2E,
10909 Lvd2Cmpcr_SPEC,
10910 crate::common::RW,
10911 >::from_register(self, 0)
10912 }
10913}
10914impl ::core::default::Default for Lvd2Cmpcr {
10915 #[inline(always)]
10916 fn default() -> Lvd2Cmpcr {
10917 <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
10918 }
10919}
10920pub mod lvd2cmpcr {
10921
10922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10923 pub struct Lvd2Lvl_SPEC;
10924 pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
10925 impl Lvd2Lvl {
10926 #[doc = "2.99 V (Vdet2_1)"]
10927 pub const _101: Self = Self::new(5);
10928
10929 #[doc = "2.92 V (Vdet2_2)"]
10930 pub const _110: Self = Self::new(6);
10931
10932 #[doc = "2.85 V (Vdet2_3)"]
10933 pub const _111: Self = Self::new(7);
10934 }
10935 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10936 pub struct Lvd2E_SPEC;
10937 pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
10938 impl Lvd2E {
10939 #[doc = "Voltage detection 2 circuit disabled"]
10940 pub const _0: Self = Self::new(0);
10941
10942 #[doc = "Voltage detection 2 circuit enabled"]
10943 pub const _1: Self = Self::new(1);
10944 }
10945}
10946#[doc(hidden)]
10947#[derive(Copy, Clone, Eq, PartialEq)]
10948pub struct Lvd1Cr0_SPEC;
10949impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
10950 type DataType = u8;
10951}
10952
10953#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
10954pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
10955
10956impl Lvd1Cr0 {
10957 #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
10958 #[inline(always)]
10959 pub fn rie(
10960 self,
10961 ) -> crate::common::RegisterField<
10962 0,
10963 0x1,
10964 1,
10965 0,
10966 lvd1cr0::Rie,
10967 lvd1cr0::Rie,
10968 Lvd1Cr0_SPEC,
10969 crate::common::RW,
10970 > {
10971 crate::common::RegisterField::<
10972 0,
10973 0x1,
10974 1,
10975 0,
10976 lvd1cr0::Rie,
10977 lvd1cr0::Rie,
10978 Lvd1Cr0_SPEC,
10979 crate::common::RW,
10980 >::from_register(self, 0)
10981 }
10982
10983 #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
10984 #[inline(always)]
10985 pub fn dfdis(
10986 self,
10987 ) -> crate::common::RegisterField<
10988 1,
10989 0x1,
10990 1,
10991 0,
10992 lvd1cr0::Dfdis,
10993 lvd1cr0::Dfdis,
10994 Lvd1Cr0_SPEC,
10995 crate::common::RW,
10996 > {
10997 crate::common::RegisterField::<
10998 1,
10999 0x1,
11000 1,
11001 0,
11002 lvd1cr0::Dfdis,
11003 lvd1cr0::Dfdis,
11004 Lvd1Cr0_SPEC,
11005 crate::common::RW,
11006 >::from_register(self, 0)
11007 }
11008
11009 #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
11010 #[inline(always)]
11011 pub fn cmpe(
11012 self,
11013 ) -> crate::common::RegisterField<
11014 2,
11015 0x1,
11016 1,
11017 0,
11018 lvd1cr0::Cmpe,
11019 lvd1cr0::Cmpe,
11020 Lvd1Cr0_SPEC,
11021 crate::common::RW,
11022 > {
11023 crate::common::RegisterField::<
11024 2,
11025 0x1,
11026 1,
11027 0,
11028 lvd1cr0::Cmpe,
11029 lvd1cr0::Cmpe,
11030 Lvd1Cr0_SPEC,
11031 crate::common::RW,
11032 >::from_register(self, 0)
11033 }
11034
11035 #[doc = "Sampling Clock Select"]
11036 #[inline(always)]
11037 pub fn fsamp(
11038 self,
11039 ) -> crate::common::RegisterField<
11040 4,
11041 0x3,
11042 1,
11043 0,
11044 lvd1cr0::Fsamp,
11045 lvd1cr0::Fsamp,
11046 Lvd1Cr0_SPEC,
11047 crate::common::RW,
11048 > {
11049 crate::common::RegisterField::<
11050 4,
11051 0x3,
11052 1,
11053 0,
11054 lvd1cr0::Fsamp,
11055 lvd1cr0::Fsamp,
11056 Lvd1Cr0_SPEC,
11057 crate::common::RW,
11058 >::from_register(self, 0)
11059 }
11060
11061 #[doc = "Voltage Monitor 1 Circuit Mode Select"]
11062 #[inline(always)]
11063 pub fn ri(
11064 self,
11065 ) -> crate::common::RegisterField<
11066 6,
11067 0x1,
11068 1,
11069 0,
11070 lvd1cr0::Ri,
11071 lvd1cr0::Ri,
11072 Lvd1Cr0_SPEC,
11073 crate::common::RW,
11074 > {
11075 crate::common::RegisterField::<
11076 6,
11077 0x1,
11078 1,
11079 0,
11080 lvd1cr0::Ri,
11081 lvd1cr0::Ri,
11082 Lvd1Cr0_SPEC,
11083 crate::common::RW,
11084 >::from_register(self, 0)
11085 }
11086
11087 #[doc = "Voltage Monitor 1 Reset Negate Select"]
11088 #[inline(always)]
11089 pub fn rn(
11090 self,
11091 ) -> crate::common::RegisterField<
11092 7,
11093 0x1,
11094 1,
11095 0,
11096 lvd1cr0::Rn,
11097 lvd1cr0::Rn,
11098 Lvd1Cr0_SPEC,
11099 crate::common::RW,
11100 > {
11101 crate::common::RegisterField::<
11102 7,
11103 0x1,
11104 1,
11105 0,
11106 lvd1cr0::Rn,
11107 lvd1cr0::Rn,
11108 Lvd1Cr0_SPEC,
11109 crate::common::RW,
11110 >::from_register(self, 0)
11111 }
11112}
11113impl ::core::default::Default for Lvd1Cr0 {
11114 #[inline(always)]
11115 fn default() -> Lvd1Cr0 {
11116 <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
11117 }
11118}
11119pub mod lvd1cr0 {
11120
11121 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11122 pub struct Rie_SPEC;
11123 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
11124 impl Rie {
11125 #[doc = "Disable"]
11126 pub const _0: Self = Self::new(0);
11127
11128 #[doc = "Enable"]
11129 pub const _1: Self = Self::new(1);
11130 }
11131 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11132 pub struct Dfdis_SPEC;
11133 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
11134 impl Dfdis {
11135 #[doc = "Enable the digital filter"]
11136 pub const _0: Self = Self::new(0);
11137
11138 #[doc = "Disable the digital filter"]
11139 pub const _1: Self = Self::new(1);
11140 }
11141 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11142 pub struct Cmpe_SPEC;
11143 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
11144 impl Cmpe {
11145 #[doc = "Disable voltage monitor 1 circuit comparison result output"]
11146 pub const _0: Self = Self::new(0);
11147
11148 #[doc = "Enable voltage monitor 1 circuit comparison result output"]
11149 pub const _1: Self = Self::new(1);
11150 }
11151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11152 pub struct Fsamp_SPEC;
11153 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
11154 impl Fsamp {
11155 #[doc = "1/2 LOCO frequency"]
11156 pub const _00: Self = Self::new(0);
11157
11158 #[doc = "1/4 LOCO frequency"]
11159 pub const _01: Self = Self::new(1);
11160
11161 #[doc = "1/8 LOCO frequency"]
11162 pub const _10: Self = Self::new(2);
11163
11164 #[doc = "1/16 LOCO frequency"]
11165 pub const _11: Self = Self::new(3);
11166 }
11167 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11168 pub struct Ri_SPEC;
11169 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
11170 impl Ri {
11171 #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
11172 pub const _0: Self = Self::new(0);
11173
11174 #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
11175 pub const _1: Self = Self::new(1);
11176 }
11177 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11178 pub struct Rn_SPEC;
11179 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
11180 impl Rn {
11181 #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
11182 pub const _0: Self = Self::new(0);
11183
11184 #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
11185 pub const _1: Self = Self::new(1);
11186 }
11187}
11188#[doc(hidden)]
11189#[derive(Copy, Clone, Eq, PartialEq)]
11190pub struct Lvd2Cr0_SPEC;
11191impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
11192 type DataType = u8;
11193}
11194
11195#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
11196pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
11197
11198impl Lvd2Cr0 {
11199 #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
11200 #[inline(always)]
11201 pub fn rie(
11202 self,
11203 ) -> crate::common::RegisterField<
11204 0,
11205 0x1,
11206 1,
11207 0,
11208 lvd2cr0::Rie,
11209 lvd2cr0::Rie,
11210 Lvd2Cr0_SPEC,
11211 crate::common::RW,
11212 > {
11213 crate::common::RegisterField::<
11214 0,
11215 0x1,
11216 1,
11217 0,
11218 lvd2cr0::Rie,
11219 lvd2cr0::Rie,
11220 Lvd2Cr0_SPEC,
11221 crate::common::RW,
11222 >::from_register(self, 0)
11223 }
11224
11225 #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
11226 #[inline(always)]
11227 pub fn dfdis(
11228 self,
11229 ) -> crate::common::RegisterField<
11230 1,
11231 0x1,
11232 1,
11233 0,
11234 lvd2cr0::Dfdis,
11235 lvd2cr0::Dfdis,
11236 Lvd2Cr0_SPEC,
11237 crate::common::RW,
11238 > {
11239 crate::common::RegisterField::<
11240 1,
11241 0x1,
11242 1,
11243 0,
11244 lvd2cr0::Dfdis,
11245 lvd2cr0::Dfdis,
11246 Lvd2Cr0_SPEC,
11247 crate::common::RW,
11248 >::from_register(self, 0)
11249 }
11250
11251 #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
11252 #[inline(always)]
11253 pub fn cmpe(
11254 self,
11255 ) -> crate::common::RegisterField<
11256 2,
11257 0x1,
11258 1,
11259 0,
11260 lvd2cr0::Cmpe,
11261 lvd2cr0::Cmpe,
11262 Lvd2Cr0_SPEC,
11263 crate::common::RW,
11264 > {
11265 crate::common::RegisterField::<
11266 2,
11267 0x1,
11268 1,
11269 0,
11270 lvd2cr0::Cmpe,
11271 lvd2cr0::Cmpe,
11272 Lvd2Cr0_SPEC,
11273 crate::common::RW,
11274 >::from_register(self, 0)
11275 }
11276
11277 #[doc = "Sampling Clock Select"]
11278 #[inline(always)]
11279 pub fn fsamp(
11280 self,
11281 ) -> crate::common::RegisterField<
11282 4,
11283 0x3,
11284 1,
11285 0,
11286 lvd2cr0::Fsamp,
11287 lvd2cr0::Fsamp,
11288 Lvd2Cr0_SPEC,
11289 crate::common::RW,
11290 > {
11291 crate::common::RegisterField::<
11292 4,
11293 0x3,
11294 1,
11295 0,
11296 lvd2cr0::Fsamp,
11297 lvd2cr0::Fsamp,
11298 Lvd2Cr0_SPEC,
11299 crate::common::RW,
11300 >::from_register(self, 0)
11301 }
11302
11303 #[doc = "Voltage Monitor 2 Circuit Mode Select"]
11304 #[inline(always)]
11305 pub fn ri(
11306 self,
11307 ) -> crate::common::RegisterField<
11308 6,
11309 0x1,
11310 1,
11311 0,
11312 lvd2cr0::Ri,
11313 lvd2cr0::Ri,
11314 Lvd2Cr0_SPEC,
11315 crate::common::RW,
11316 > {
11317 crate::common::RegisterField::<
11318 6,
11319 0x1,
11320 1,
11321 0,
11322 lvd2cr0::Ri,
11323 lvd2cr0::Ri,
11324 Lvd2Cr0_SPEC,
11325 crate::common::RW,
11326 >::from_register(self, 0)
11327 }
11328
11329 #[doc = "Voltage Monitor 2 Reset Negate Select"]
11330 #[inline(always)]
11331 pub fn rn(
11332 self,
11333 ) -> crate::common::RegisterField<
11334 7,
11335 0x1,
11336 1,
11337 0,
11338 lvd2cr0::Rn,
11339 lvd2cr0::Rn,
11340 Lvd2Cr0_SPEC,
11341 crate::common::RW,
11342 > {
11343 crate::common::RegisterField::<
11344 7,
11345 0x1,
11346 1,
11347 0,
11348 lvd2cr0::Rn,
11349 lvd2cr0::Rn,
11350 Lvd2Cr0_SPEC,
11351 crate::common::RW,
11352 >::from_register(self, 0)
11353 }
11354}
11355impl ::core::default::Default for Lvd2Cr0 {
11356 #[inline(always)]
11357 fn default() -> Lvd2Cr0 {
11358 <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
11359 }
11360}
11361pub mod lvd2cr0 {
11362
11363 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11364 pub struct Rie_SPEC;
11365 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
11366 impl Rie {
11367 #[doc = "Disable"]
11368 pub const _0: Self = Self::new(0);
11369
11370 #[doc = "Enable"]
11371 pub const _1: Self = Self::new(1);
11372 }
11373 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11374 pub struct Dfdis_SPEC;
11375 pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
11376 impl Dfdis {
11377 #[doc = "Enable the digital filter"]
11378 pub const _0: Self = Self::new(0);
11379
11380 #[doc = "Disable the digital filter"]
11381 pub const _1: Self = Self::new(1);
11382 }
11383 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11384 pub struct Cmpe_SPEC;
11385 pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
11386 impl Cmpe {
11387 #[doc = "Disable voltage monitor 2 circuit comparison result output"]
11388 pub const _0: Self = Self::new(0);
11389
11390 #[doc = "Enable voltage monitor 2 circuit comparison result output"]
11391 pub const _1: Self = Self::new(1);
11392 }
11393 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11394 pub struct Fsamp_SPEC;
11395 pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
11396 impl Fsamp {
11397 #[doc = "1/2 LOCO frequency"]
11398 pub const _00: Self = Self::new(0);
11399
11400 #[doc = "1/4 LOCO frequency"]
11401 pub const _01: Self = Self::new(1);
11402
11403 #[doc = "1/8 LOCO frequency"]
11404 pub const _10: Self = Self::new(2);
11405
11406 #[doc = "1/16 LOCO frequency"]
11407 pub const _11: Self = Self::new(3);
11408 }
11409 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11410 pub struct Ri_SPEC;
11411 pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
11412 impl Ri {
11413 #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
11414 pub const _0: Self = Self::new(0);
11415
11416 #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
11417 pub const _1: Self = Self::new(1);
11418 }
11419 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11420 pub struct Rn_SPEC;
11421 pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
11422 impl Rn {
11423 #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
11424 pub const _0: Self = Self::new(0);
11425
11426 #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
11427 pub const _1: Self = Self::new(1);
11428 }
11429}
11430#[doc(hidden)]
11431#[derive(Copy, Clone, Eq, PartialEq)]
11432pub struct Vbattmnselr_SPEC;
11433impl crate::sealed::RegSpec for Vbattmnselr_SPEC {
11434 type DataType = u8;
11435}
11436
11437#[doc = "Battery Backup Voltage Monitor Function Select Register"]
11438pub type Vbattmnselr = crate::RegValueT<Vbattmnselr_SPEC>;
11439
11440impl Vbattmnselr {
11441 #[doc = "VBATT Low Voltage Detect Function Select Bit"]
11442 #[inline(always)]
11443 pub fn vbattmnsel(
11444 self,
11445 ) -> crate::common::RegisterField<
11446 0,
11447 0x1,
11448 1,
11449 0,
11450 vbattmnselr::Vbattmnsel,
11451 vbattmnselr::Vbattmnsel,
11452 Vbattmnselr_SPEC,
11453 crate::common::RW,
11454 > {
11455 crate::common::RegisterField::<
11456 0,
11457 0x1,
11458 1,
11459 0,
11460 vbattmnselr::Vbattmnsel,
11461 vbattmnselr::Vbattmnsel,
11462 Vbattmnselr_SPEC,
11463 crate::common::RW,
11464 >::from_register(self, 0)
11465 }
11466}
11467impl ::core::default::Default for Vbattmnselr {
11468 #[inline(always)]
11469 fn default() -> Vbattmnselr {
11470 <crate::RegValueT<Vbattmnselr_SPEC> as RegisterValue<_>>::new(0)
11471 }
11472}
11473pub mod vbattmnselr {
11474
11475 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11476 pub struct Vbattmnsel_SPEC;
11477 pub type Vbattmnsel = crate::EnumBitfieldStruct<u8, Vbattmnsel_SPEC>;
11478 impl Vbattmnsel {
11479 #[doc = "Disables VBATT low voltage detect function"]
11480 pub const _0: Self = Self::new(0);
11481
11482 #[doc = "Enables VBATT low voltage detect function"]
11483 pub const _1: Self = Self::new(1);
11484 }
11485}
11486#[doc(hidden)]
11487#[derive(Copy, Clone, Eq, PartialEq)]
11488pub struct Vbattmonr_SPEC;
11489impl crate::sealed::RegSpec for Vbattmonr_SPEC {
11490 type DataType = u8;
11491}
11492
11493#[doc = "Battery Backup Voltage Monitor Register"]
11494pub type Vbattmonr = crate::RegValueT<Vbattmonr_SPEC>;
11495
11496impl Vbattmonr {
11497 #[doc = "VBATT Voltage Monitor Bit"]
11498 #[inline(always)]
11499 pub fn vbattmon(
11500 self,
11501 ) -> crate::common::RegisterField<
11502 0,
11503 0x1,
11504 1,
11505 0,
11506 vbattmonr::Vbattmon,
11507 vbattmonr::Vbattmon,
11508 Vbattmonr_SPEC,
11509 crate::common::R,
11510 > {
11511 crate::common::RegisterField::<
11512 0,
11513 0x1,
11514 1,
11515 0,
11516 vbattmonr::Vbattmon,
11517 vbattmonr::Vbattmon,
11518 Vbattmonr_SPEC,
11519 crate::common::R,
11520 >::from_register(self, 0)
11521 }
11522}
11523impl ::core::default::Default for Vbattmonr {
11524 #[inline(always)]
11525 fn default() -> Vbattmonr {
11526 <crate::RegValueT<Vbattmonr_SPEC> as RegisterValue<_>>::new(0)
11527 }
11528}
11529pub mod vbattmonr {
11530
11531 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11532 pub struct Vbattmon_SPEC;
11533 pub type Vbattmon = crate::EnumBitfieldStruct<u8, Vbattmon_SPEC>;
11534 impl Vbattmon {
11535 #[doc = "VBATT ≥ Vbattldet"]
11536 pub const _0: Self = Self::new(0);
11537
11538 #[doc = "VBATT < Vbattldet"]
11539 pub const _1: Self = Self::new(1);
11540 }
11541}
11542#[doc(hidden)]
11543#[derive(Copy, Clone, Eq, PartialEq)]
11544pub struct Sosccr_SPEC;
11545impl crate::sealed::RegSpec for Sosccr_SPEC {
11546 type DataType = u8;
11547}
11548
11549#[doc = "Sub-Clock Oscillator Control Register"]
11550pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
11551
11552impl Sosccr {
11553 #[doc = "Sub Clock Oscillator Stop"]
11554 #[inline(always)]
11555 pub fn sostp(
11556 self,
11557 ) -> crate::common::RegisterField<
11558 0,
11559 0x1,
11560 1,
11561 0,
11562 sosccr::Sostp,
11563 sosccr::Sostp,
11564 Sosccr_SPEC,
11565 crate::common::RW,
11566 > {
11567 crate::common::RegisterField::<
11568 0,
11569 0x1,
11570 1,
11571 0,
11572 sosccr::Sostp,
11573 sosccr::Sostp,
11574 Sosccr_SPEC,
11575 crate::common::RW,
11576 >::from_register(self, 0)
11577 }
11578}
11579impl ::core::default::Default for Sosccr {
11580 #[inline(always)]
11581 fn default() -> Sosccr {
11582 <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
11583 }
11584}
11585pub mod sosccr {
11586
11587 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11588 pub struct Sostp_SPEC;
11589 pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
11590 impl Sostp {
11591 #[doc = "Operate the sub-clock oscillator"]
11592 pub const _0: Self = Self::new(0);
11593
11594 #[doc = "Stop the sub-clock oscillator"]
11595 pub const _1: Self = Self::new(1);
11596 }
11597}
11598#[doc(hidden)]
11599#[derive(Copy, Clone, Eq, PartialEq)]
11600pub struct Somcr_SPEC;
11601impl crate::sealed::RegSpec for Somcr_SPEC {
11602 type DataType = u8;
11603}
11604
11605#[doc = "Sub-Clock Oscillator Mode Control Register"]
11606pub type Somcr = crate::RegValueT<Somcr_SPEC>;
11607
11608impl Somcr {
11609 #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
11610 #[inline(always)]
11611 pub fn sodrv(
11612 self,
11613 ) -> crate::common::RegisterField<
11614 1,
11615 0x1,
11616 1,
11617 0,
11618 somcr::Sodrv,
11619 somcr::Sodrv,
11620 Somcr_SPEC,
11621 crate::common::RW,
11622 > {
11623 crate::common::RegisterField::<
11624 1,
11625 0x1,
11626 1,
11627 0,
11628 somcr::Sodrv,
11629 somcr::Sodrv,
11630 Somcr_SPEC,
11631 crate::common::RW,
11632 >::from_register(self, 0)
11633 }
11634}
11635impl ::core::default::Default for Somcr {
11636 #[inline(always)]
11637 fn default() -> Somcr {
11638 <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
11639 }
11640}
11641pub mod somcr {
11642
11643 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11644 pub struct Sodrv_SPEC;
11645 pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
11646 impl Sodrv {
11647 #[doc = "Standard"]
11648 pub const _0: Self = Self::new(0);
11649
11650 #[doc = "Low"]
11651 pub const _1: Self = Self::new(1);
11652 }
11653}
11654#[doc(hidden)]
11655#[derive(Copy, Clone, Eq, PartialEq)]
11656pub struct Lococr_SPEC;
11657impl crate::sealed::RegSpec for Lococr_SPEC {
11658 type DataType = u8;
11659}
11660
11661#[doc = "Low-Speed On-Chip Oscillator Control Register"]
11662pub type Lococr = crate::RegValueT<Lococr_SPEC>;
11663
11664impl Lococr {
11665 #[doc = "LOCO Stop"]
11666 #[inline(always)]
11667 pub fn lcstp(
11668 self,
11669 ) -> crate::common::RegisterField<
11670 0,
11671 0x1,
11672 1,
11673 0,
11674 lococr::Lcstp,
11675 lococr::Lcstp,
11676 Lococr_SPEC,
11677 crate::common::RW,
11678 > {
11679 crate::common::RegisterField::<
11680 0,
11681 0x1,
11682 1,
11683 0,
11684 lococr::Lcstp,
11685 lococr::Lcstp,
11686 Lococr_SPEC,
11687 crate::common::RW,
11688 >::from_register(self, 0)
11689 }
11690}
11691impl ::core::default::Default for Lococr {
11692 #[inline(always)]
11693 fn default() -> Lococr {
11694 <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
11695 }
11696}
11697pub mod lococr {
11698
11699 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11700 pub struct Lcstp_SPEC;
11701 pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
11702 impl Lcstp {
11703 #[doc = "Operate the LOCO clock"]
11704 pub const _0: Self = Self::new(0);
11705
11706 #[doc = "Stop the LOCO clock"]
11707 pub const _1: Self = Self::new(1);
11708 }
11709}
11710#[doc(hidden)]
11711#[derive(Copy, Clone, Eq, PartialEq)]
11712pub struct Locoutcr_SPEC;
11713impl crate::sealed::RegSpec for Locoutcr_SPEC {
11714 type DataType = u8;
11715}
11716
11717#[doc = "LOCO User Trimming Control Register"]
11718pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
11719
11720impl Locoutcr {
11721 #[doc = "LOCO User Trimming"]
11722 #[inline(always)]
11723 pub fn locoutrm(
11724 self,
11725 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
11726 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
11727 }
11728}
11729impl ::core::default::Default for Locoutcr {
11730 #[inline(always)]
11731 fn default() -> Locoutcr {
11732 <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
11733 }
11734}
11735
11736#[doc(hidden)]
11737#[derive(Copy, Clone, Eq, PartialEq)]
11738pub struct Vbtictlr_SPEC;
11739impl crate::sealed::RegSpec for Vbtictlr_SPEC {
11740 type DataType = u8;
11741}
11742
11743#[doc = "VBATT Input Control Register"]
11744pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
11745
11746impl Vbtictlr {
11747 #[doc = "VBATT CH0 Input Enable"]
11748 #[inline(always)]
11749 pub fn vch0inen(
11750 self,
11751 ) -> crate::common::RegisterField<
11752 0,
11753 0x1,
11754 1,
11755 0,
11756 vbtictlr::Vch0Inen,
11757 vbtictlr::Vch0Inen,
11758 Vbtictlr_SPEC,
11759 crate::common::RW,
11760 > {
11761 crate::common::RegisterField::<
11762 0,
11763 0x1,
11764 1,
11765 0,
11766 vbtictlr::Vch0Inen,
11767 vbtictlr::Vch0Inen,
11768 Vbtictlr_SPEC,
11769 crate::common::RW,
11770 >::from_register(self, 0)
11771 }
11772
11773 #[doc = "VBATT CH1 Input Enable"]
11774 #[inline(always)]
11775 pub fn vch1inen(
11776 self,
11777 ) -> crate::common::RegisterField<
11778 1,
11779 0x1,
11780 1,
11781 0,
11782 vbtictlr::Vch1Inen,
11783 vbtictlr::Vch1Inen,
11784 Vbtictlr_SPEC,
11785 crate::common::RW,
11786 > {
11787 crate::common::RegisterField::<
11788 1,
11789 0x1,
11790 1,
11791 0,
11792 vbtictlr::Vch1Inen,
11793 vbtictlr::Vch1Inen,
11794 Vbtictlr_SPEC,
11795 crate::common::RW,
11796 >::from_register(self, 0)
11797 }
11798
11799 #[doc = "VBATT CH2 Input Enable"]
11800 #[inline(always)]
11801 pub fn vch2inen(
11802 self,
11803 ) -> crate::common::RegisterField<
11804 2,
11805 0x1,
11806 1,
11807 0,
11808 vbtictlr::Vch2Inen,
11809 vbtictlr::Vch2Inen,
11810 Vbtictlr_SPEC,
11811 crate::common::RW,
11812 > {
11813 crate::common::RegisterField::<
11814 2,
11815 0x1,
11816 1,
11817 0,
11818 vbtictlr::Vch2Inen,
11819 vbtictlr::Vch2Inen,
11820 Vbtictlr_SPEC,
11821 crate::common::RW,
11822 >::from_register(self, 0)
11823 }
11824}
11825impl ::core::default::Default for Vbtictlr {
11826 #[inline(always)]
11827 fn default() -> Vbtictlr {
11828 <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
11829 }
11830}
11831pub mod vbtictlr {
11832
11833 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11834 pub struct Vch0Inen_SPEC;
11835 pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
11836 impl Vch0Inen {
11837 #[doc = "RTCIC0 input disable"]
11838 pub const _0: Self = Self::new(0);
11839
11840 #[doc = "RTCIC0 input enable"]
11841 pub const _1: Self = Self::new(1);
11842 }
11843 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11844 pub struct Vch1Inen_SPEC;
11845 pub type Vch1Inen = crate::EnumBitfieldStruct<u8, Vch1Inen_SPEC>;
11846 impl Vch1Inen {
11847 #[doc = "RTCIC1 input disable"]
11848 pub const _0: Self = Self::new(0);
11849
11850 #[doc = "RTCIC1 input enable"]
11851 pub const _1: Self = Self::new(1);
11852 }
11853 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11854 pub struct Vch2Inen_SPEC;
11855 pub type Vch2Inen = crate::EnumBitfieldStruct<u8, Vch2Inen_SPEC>;
11856 impl Vch2Inen {
11857 #[doc = "RTCIC2 input disable"]
11858 pub const _0: Self = Self::new(0);
11859
11860 #[doc = "RTCIC2 input enable"]
11861 pub const _1: Self = Self::new(1);
11862 }
11863}
11864#[doc(hidden)]
11865#[derive(Copy, Clone, Eq, PartialEq)]
11866pub struct Vbtber_SPEC;
11867impl crate::sealed::RegSpec for Vbtber_SPEC {
11868 type DataType = u8;
11869}
11870
11871#[doc = "VBATT Backup Enable Register"]
11872pub type Vbtber = crate::RegValueT<Vbtber_SPEC>;
11873
11874impl Vbtber {
11875 #[doc = "VBATT backup register access enable bit"]
11876 #[inline(always)]
11877 pub fn vbae(
11878 self,
11879 ) -> crate::common::RegisterField<
11880 3,
11881 0x1,
11882 1,
11883 0,
11884 vbtber::Vbae,
11885 vbtber::Vbae,
11886 Vbtber_SPEC,
11887 crate::common::RW,
11888 > {
11889 crate::common::RegisterField::<
11890 3,
11891 0x1,
11892 1,
11893 0,
11894 vbtber::Vbae,
11895 vbtber::Vbae,
11896 Vbtber_SPEC,
11897 crate::common::RW,
11898 >::from_register(self, 0)
11899 }
11900}
11901impl ::core::default::Default for Vbtber {
11902 #[inline(always)]
11903 fn default() -> Vbtber {
11904 <crate::RegValueT<Vbtber_SPEC> as RegisterValue<_>>::new(8)
11905 }
11906}
11907pub mod vbtber {
11908
11909 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11910 pub struct Vbae_SPEC;
11911 pub type Vbae = crate::EnumBitfieldStruct<u8, Vbae_SPEC>;
11912 impl Vbae {
11913 #[doc = "Disable to access VBTBKR"]
11914 pub const _0: Self = Self::new(0);
11915
11916 #[doc = "Enable to access VBTBKR"]
11917 pub const _1: Self = Self::new(1);
11918 }
11919}
11920#[doc(hidden)]
11921#[derive(Copy, Clone, Eq, PartialEq)]
11922pub struct Vbtbkr_SPEC;
11923impl crate::sealed::RegSpec for Vbtbkr_SPEC {
11924 type DataType = u8;
11925}
11926
11927#[doc = "VBATT Backup Register"]
11928pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
11929
11930impl Vbtbkr {
11931 #[doc = "VBATT Backup Register"]
11932 #[inline(always)]
11933 pub fn vbtbkr(
11934 self,
11935 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Vbtbkr_SPEC, crate::common::RW> {
11936 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Vbtbkr_SPEC,crate::common::RW>::from_register(self,0)
11937 }
11938}
11939impl ::core::default::Default for Vbtbkr {
11940 #[inline(always)]
11941 fn default() -> Vbtbkr {
11942 <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
11943 }
11944}