ra4m3_pac/
icu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.40.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:07:45 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Interrupt Controller"]
28unsafe impl ::core::marker::Send for super::Icu {}
29unsafe impl ::core::marker::Sync for super::Icu {}
30impl super::Icu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "IRQ Control Register %s"]
38    #[inline(always)]
39    pub const fn irqcr(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::Irqcr_SPEC, crate::common::RW>,
43        16,
44        0x1,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn irqcr0(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(0x0usize),
55            )
56        }
57    }
58    #[inline(always)]
59    pub const fn irqcr1(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(0x1usize),
63            )
64        }
65    }
66    #[inline(always)]
67    pub const fn irqcr2(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
68        unsafe {
69            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
70                self._svd2pac_as_ptr().add(0x2usize),
71            )
72        }
73    }
74    #[inline(always)]
75    pub const fn irqcr3(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(0x3usize),
79            )
80        }
81    }
82    #[inline(always)]
83    pub const fn irqcr4(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
84        unsafe {
85            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
86                self._svd2pac_as_ptr().add(0x4usize),
87            )
88        }
89    }
90    #[inline(always)]
91    pub const fn irqcr5(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(0x5usize),
95            )
96        }
97    }
98    #[inline(always)]
99    pub const fn irqcr6(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(0x6usize),
103            )
104        }
105    }
106    #[inline(always)]
107    pub const fn irqcr7(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x7usize),
111            )
112        }
113    }
114    #[inline(always)]
115    pub const fn irqcr8(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
116        unsafe {
117            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
118                self._svd2pac_as_ptr().add(0x8usize),
119            )
120        }
121    }
122    #[inline(always)]
123    pub const fn irqcr9(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(0x9usize),
127            )
128        }
129    }
130    #[inline(always)]
131    pub const fn irqcr10(
132        &self,
133    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(0xausize),
137            )
138        }
139    }
140    #[inline(always)]
141    pub const fn irqcr11(
142        &self,
143    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
144        unsafe {
145            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
146                self._svd2pac_as_ptr().add(0xbusize),
147            )
148        }
149    }
150    #[inline(always)]
151    pub const fn irqcr12(
152        &self,
153    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(0xcusize),
157            )
158        }
159    }
160    #[inline(always)]
161    pub const fn irqcr13(
162        &self,
163    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(0xdusize),
167            )
168        }
169    }
170    #[inline(always)]
171    pub const fn irqcr14(
172        &self,
173    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(0xeusize),
177            )
178        }
179    }
180    #[inline(always)]
181    pub const fn irqcr15(
182        &self,
183    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
184        unsafe {
185            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
186                self._svd2pac_as_ptr().add(0xfusize),
187            )
188        }
189    }
190
191    #[doc = "NMI Pin Interrupt Control Register"]
192    #[inline(always)]
193    pub const fn nmicr(&self) -> &'static crate::common::Reg<self::Nmicr_SPEC, crate::common::RW> {
194        unsafe {
195            crate::common::Reg::<self::Nmicr_SPEC, crate::common::RW>::from_ptr(
196                self._svd2pac_as_ptr().add(256usize),
197            )
198        }
199    }
200
201    #[doc = "Non-Maskable Interrupt Enable Register"]
202    #[inline(always)]
203    pub const fn nmier(&self) -> &'static crate::common::Reg<self::Nmier_SPEC, crate::common::RW> {
204        unsafe {
205            crate::common::Reg::<self::Nmier_SPEC, crate::common::RW>::from_ptr(
206                self._svd2pac_as_ptr().add(288usize),
207            )
208        }
209    }
210
211    #[doc = "Non-Maskable Interrupt Status Clear Register"]
212    #[inline(always)]
213    pub const fn nmiclr(
214        &self,
215    ) -> &'static crate::common::Reg<self::Nmiclr_SPEC, crate::common::RW> {
216        unsafe {
217            crate::common::Reg::<self::Nmiclr_SPEC, crate::common::RW>::from_ptr(
218                self._svd2pac_as_ptr().add(304usize),
219            )
220        }
221    }
222
223    #[doc = "Non-Maskable Interrupt Status Register"]
224    #[inline(always)]
225    pub const fn nmisr(&self) -> &'static crate::common::Reg<self::Nmisr_SPEC, crate::common::R> {
226        unsafe {
227            crate::common::Reg::<self::Nmisr_SPEC, crate::common::R>::from_ptr(
228                self._svd2pac_as_ptr().add(320usize),
229            )
230        }
231    }
232
233    #[doc = "Wake Up Interrupt Enable Register 0"]
234    #[inline(always)]
235    pub const fn wupen0(
236        &self,
237    ) -> &'static crate::common::Reg<self::Wupen0_SPEC, crate::common::RW> {
238        unsafe {
239            crate::common::Reg::<self::Wupen0_SPEC, crate::common::RW>::from_ptr(
240                self._svd2pac_as_ptr().add(416usize),
241            )
242        }
243    }
244
245    #[doc = "Wake Up interrupt enable register 1"]
246    #[inline(always)]
247    pub const fn wupen1(
248        &self,
249    ) -> &'static crate::common::Reg<self::Wupen1_SPEC, crate::common::RW> {
250        unsafe {
251            crate::common::Reg::<self::Wupen1_SPEC, crate::common::RW>::from_ptr(
252                self._svd2pac_as_ptr().add(420usize),
253            )
254        }
255    }
256
257    #[doc = "SYS Event Link Setting Register"]
258    #[inline(always)]
259    pub const fn selsr0(
260        &self,
261    ) -> &'static crate::common::Reg<self::Selsr0_SPEC, crate::common::RW> {
262        unsafe {
263            crate::common::Reg::<self::Selsr0_SPEC, crate::common::RW>::from_ptr(
264                self._svd2pac_as_ptr().add(512usize),
265            )
266        }
267    }
268
269    #[doc = "DMAC Event Link Setting Register %s"]
270    #[inline(always)]
271    pub const fn delsr(
272        &self,
273    ) -> &'static crate::common::ClusterRegisterArray<
274        crate::common::Reg<self::Delsr_SPEC, crate::common::RW>,
275        8,
276        0x4,
277    > {
278        unsafe {
279            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x280usize))
280        }
281    }
282    #[inline(always)]
283    pub const fn delsr0(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
284        unsafe {
285            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
286                self._svd2pac_as_ptr().add(0x280usize),
287            )
288        }
289    }
290    #[inline(always)]
291    pub const fn delsr1(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(0x284usize),
295            )
296        }
297    }
298    #[inline(always)]
299    pub const fn delsr2(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
300        unsafe {
301            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
302                self._svd2pac_as_ptr().add(0x288usize),
303            )
304        }
305    }
306    #[inline(always)]
307    pub const fn delsr3(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
308        unsafe {
309            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
310                self._svd2pac_as_ptr().add(0x28cusize),
311            )
312        }
313    }
314    #[inline(always)]
315    pub const fn delsr4(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
316        unsafe {
317            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
318                self._svd2pac_as_ptr().add(0x290usize),
319            )
320        }
321    }
322    #[inline(always)]
323    pub const fn delsr5(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(0x294usize),
327            )
328        }
329    }
330    #[inline(always)]
331    pub const fn delsr6(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
332        unsafe {
333            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
334                self._svd2pac_as_ptr().add(0x298usize),
335            )
336        }
337    }
338    #[inline(always)]
339    pub const fn delsr7(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
340        unsafe {
341            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
342                self._svd2pac_as_ptr().add(0x29cusize),
343            )
344        }
345    }
346
347    #[doc = "ICU Event Link Setting Register %s"]
348    #[inline(always)]
349    pub const fn ielsr(
350        &self,
351    ) -> &'static crate::common::ClusterRegisterArray<
352        crate::common::Reg<self::Ielsr_SPEC, crate::common::RW>,
353        96,
354        0x4,
355    > {
356        unsafe {
357            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x300usize))
358        }
359    }
360    #[inline(always)]
361    pub const fn ielsr0(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
362        unsafe {
363            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
364                self._svd2pac_as_ptr().add(0x300usize),
365            )
366        }
367    }
368    #[inline(always)]
369    pub const fn ielsr1(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
370        unsafe {
371            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
372                self._svd2pac_as_ptr().add(0x304usize),
373            )
374        }
375    }
376    #[inline(always)]
377    pub const fn ielsr2(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(0x308usize),
381            )
382        }
383    }
384    #[inline(always)]
385    pub const fn ielsr3(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
386        unsafe {
387            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
388                self._svd2pac_as_ptr().add(0x30cusize),
389            )
390        }
391    }
392    #[inline(always)]
393    pub const fn ielsr4(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
394        unsafe {
395            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
396                self._svd2pac_as_ptr().add(0x310usize),
397            )
398        }
399    }
400    #[inline(always)]
401    pub const fn ielsr5(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(0x314usize),
405            )
406        }
407    }
408    #[inline(always)]
409    pub const fn ielsr6(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
410        unsafe {
411            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
412                self._svd2pac_as_ptr().add(0x318usize),
413            )
414        }
415    }
416    #[inline(always)]
417    pub const fn ielsr7(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
418        unsafe {
419            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
420                self._svd2pac_as_ptr().add(0x31cusize),
421            )
422        }
423    }
424    #[inline(always)]
425    pub const fn ielsr8(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
426        unsafe {
427            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
428                self._svd2pac_as_ptr().add(0x320usize),
429            )
430        }
431    }
432    #[inline(always)]
433    pub const fn ielsr9(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
434        unsafe {
435            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
436                self._svd2pac_as_ptr().add(0x324usize),
437            )
438        }
439    }
440    #[inline(always)]
441    pub const fn ielsr10(
442        &self,
443    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
444        unsafe {
445            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
446                self._svd2pac_as_ptr().add(0x328usize),
447            )
448        }
449    }
450    #[inline(always)]
451    pub const fn ielsr11(
452        &self,
453    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
454        unsafe {
455            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
456                self._svd2pac_as_ptr().add(0x32cusize),
457            )
458        }
459    }
460    #[inline(always)]
461    pub const fn ielsr12(
462        &self,
463    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
464        unsafe {
465            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
466                self._svd2pac_as_ptr().add(0x330usize),
467            )
468        }
469    }
470    #[inline(always)]
471    pub const fn ielsr13(
472        &self,
473    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(0x334usize),
477            )
478        }
479    }
480    #[inline(always)]
481    pub const fn ielsr14(
482        &self,
483    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
484        unsafe {
485            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
486                self._svd2pac_as_ptr().add(0x338usize),
487            )
488        }
489    }
490    #[inline(always)]
491    pub const fn ielsr15(
492        &self,
493    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
494        unsafe {
495            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
496                self._svd2pac_as_ptr().add(0x33cusize),
497            )
498        }
499    }
500    #[inline(always)]
501    pub const fn ielsr16(
502        &self,
503    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
504        unsafe {
505            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
506                self._svd2pac_as_ptr().add(0x340usize),
507            )
508        }
509    }
510    #[inline(always)]
511    pub const fn ielsr17(
512        &self,
513    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
514        unsafe {
515            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
516                self._svd2pac_as_ptr().add(0x344usize),
517            )
518        }
519    }
520    #[inline(always)]
521    pub const fn ielsr18(
522        &self,
523    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
524        unsafe {
525            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
526                self._svd2pac_as_ptr().add(0x348usize),
527            )
528        }
529    }
530    #[inline(always)]
531    pub const fn ielsr19(
532        &self,
533    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(0x34cusize),
537            )
538        }
539    }
540    #[inline(always)]
541    pub const fn ielsr20(
542        &self,
543    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(0x350usize),
547            )
548        }
549    }
550    #[inline(always)]
551    pub const fn ielsr21(
552        &self,
553    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
554        unsafe {
555            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
556                self._svd2pac_as_ptr().add(0x354usize),
557            )
558        }
559    }
560    #[inline(always)]
561    pub const fn ielsr22(
562        &self,
563    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
564        unsafe {
565            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
566                self._svd2pac_as_ptr().add(0x358usize),
567            )
568        }
569    }
570    #[inline(always)]
571    pub const fn ielsr23(
572        &self,
573    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
574        unsafe {
575            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
576                self._svd2pac_as_ptr().add(0x35cusize),
577            )
578        }
579    }
580    #[inline(always)]
581    pub const fn ielsr24(
582        &self,
583    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
584        unsafe {
585            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
586                self._svd2pac_as_ptr().add(0x360usize),
587            )
588        }
589    }
590    #[inline(always)]
591    pub const fn ielsr25(
592        &self,
593    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
594        unsafe {
595            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
596                self._svd2pac_as_ptr().add(0x364usize),
597            )
598        }
599    }
600    #[inline(always)]
601    pub const fn ielsr26(
602        &self,
603    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
604        unsafe {
605            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
606                self._svd2pac_as_ptr().add(0x368usize),
607            )
608        }
609    }
610    #[inline(always)]
611    pub const fn ielsr27(
612        &self,
613    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
614        unsafe {
615            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
616                self._svd2pac_as_ptr().add(0x36cusize),
617            )
618        }
619    }
620    #[inline(always)]
621    pub const fn ielsr28(
622        &self,
623    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
624        unsafe {
625            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
626                self._svd2pac_as_ptr().add(0x370usize),
627            )
628        }
629    }
630    #[inline(always)]
631    pub const fn ielsr29(
632        &self,
633    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
634        unsafe {
635            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
636                self._svd2pac_as_ptr().add(0x374usize),
637            )
638        }
639    }
640    #[inline(always)]
641    pub const fn ielsr30(
642        &self,
643    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
644        unsafe {
645            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
646                self._svd2pac_as_ptr().add(0x378usize),
647            )
648        }
649    }
650    #[inline(always)]
651    pub const fn ielsr31(
652        &self,
653    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
654        unsafe {
655            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
656                self._svd2pac_as_ptr().add(0x37cusize),
657            )
658        }
659    }
660    #[inline(always)]
661    pub const fn ielsr32(
662        &self,
663    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(0x380usize),
667            )
668        }
669    }
670    #[inline(always)]
671    pub const fn ielsr33(
672        &self,
673    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
674        unsafe {
675            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
676                self._svd2pac_as_ptr().add(0x384usize),
677            )
678        }
679    }
680    #[inline(always)]
681    pub const fn ielsr34(
682        &self,
683    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
684        unsafe {
685            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
686                self._svd2pac_as_ptr().add(0x388usize),
687            )
688        }
689    }
690    #[inline(always)]
691    pub const fn ielsr35(
692        &self,
693    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
694        unsafe {
695            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
696                self._svd2pac_as_ptr().add(0x38cusize),
697            )
698        }
699    }
700    #[inline(always)]
701    pub const fn ielsr36(
702        &self,
703    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
704        unsafe {
705            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
706                self._svd2pac_as_ptr().add(0x390usize),
707            )
708        }
709    }
710    #[inline(always)]
711    pub const fn ielsr37(
712        &self,
713    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
714        unsafe {
715            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
716                self._svd2pac_as_ptr().add(0x394usize),
717            )
718        }
719    }
720    #[inline(always)]
721    pub const fn ielsr38(
722        &self,
723    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
724        unsafe {
725            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
726                self._svd2pac_as_ptr().add(0x398usize),
727            )
728        }
729    }
730    #[inline(always)]
731    pub const fn ielsr39(
732        &self,
733    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
734        unsafe {
735            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
736                self._svd2pac_as_ptr().add(0x39cusize),
737            )
738        }
739    }
740    #[inline(always)]
741    pub const fn ielsr40(
742        &self,
743    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
744        unsafe {
745            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
746                self._svd2pac_as_ptr().add(0x3a0usize),
747            )
748        }
749    }
750    #[inline(always)]
751    pub const fn ielsr41(
752        &self,
753    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
754        unsafe {
755            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
756                self._svd2pac_as_ptr().add(0x3a4usize),
757            )
758        }
759    }
760    #[inline(always)]
761    pub const fn ielsr42(
762        &self,
763    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
764        unsafe {
765            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
766                self._svd2pac_as_ptr().add(0x3a8usize),
767            )
768        }
769    }
770    #[inline(always)]
771    pub const fn ielsr43(
772        &self,
773    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
774        unsafe {
775            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
776                self._svd2pac_as_ptr().add(0x3acusize),
777            )
778        }
779    }
780    #[inline(always)]
781    pub const fn ielsr44(
782        &self,
783    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
784        unsafe {
785            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
786                self._svd2pac_as_ptr().add(0x3b0usize),
787            )
788        }
789    }
790    #[inline(always)]
791    pub const fn ielsr45(
792        &self,
793    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(0x3b4usize),
797            )
798        }
799    }
800    #[inline(always)]
801    pub const fn ielsr46(
802        &self,
803    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
804        unsafe {
805            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
806                self._svd2pac_as_ptr().add(0x3b8usize),
807            )
808        }
809    }
810    #[inline(always)]
811    pub const fn ielsr47(
812        &self,
813    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
814        unsafe {
815            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
816                self._svd2pac_as_ptr().add(0x3bcusize),
817            )
818        }
819    }
820    #[inline(always)]
821    pub const fn ielsr48(
822        &self,
823    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
824        unsafe {
825            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
826                self._svd2pac_as_ptr().add(0x3c0usize),
827            )
828        }
829    }
830    #[inline(always)]
831    pub const fn ielsr49(
832        &self,
833    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
834        unsafe {
835            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
836                self._svd2pac_as_ptr().add(0x3c4usize),
837            )
838        }
839    }
840    #[inline(always)]
841    pub const fn ielsr50(
842        &self,
843    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
844        unsafe {
845            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
846                self._svd2pac_as_ptr().add(0x3c8usize),
847            )
848        }
849    }
850    #[inline(always)]
851    pub const fn ielsr51(
852        &self,
853    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
854        unsafe {
855            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
856                self._svd2pac_as_ptr().add(0x3ccusize),
857            )
858        }
859    }
860    #[inline(always)]
861    pub const fn ielsr52(
862        &self,
863    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
864        unsafe {
865            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
866                self._svd2pac_as_ptr().add(0x3d0usize),
867            )
868        }
869    }
870    #[inline(always)]
871    pub const fn ielsr53(
872        &self,
873    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
874        unsafe {
875            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
876                self._svd2pac_as_ptr().add(0x3d4usize),
877            )
878        }
879    }
880    #[inline(always)]
881    pub const fn ielsr54(
882        &self,
883    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
884        unsafe {
885            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
886                self._svd2pac_as_ptr().add(0x3d8usize),
887            )
888        }
889    }
890    #[inline(always)]
891    pub const fn ielsr55(
892        &self,
893    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
894        unsafe {
895            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
896                self._svd2pac_as_ptr().add(0x3dcusize),
897            )
898        }
899    }
900    #[inline(always)]
901    pub const fn ielsr56(
902        &self,
903    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
904        unsafe {
905            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
906                self._svd2pac_as_ptr().add(0x3e0usize),
907            )
908        }
909    }
910    #[inline(always)]
911    pub const fn ielsr57(
912        &self,
913    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
914        unsafe {
915            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
916                self._svd2pac_as_ptr().add(0x3e4usize),
917            )
918        }
919    }
920    #[inline(always)]
921    pub const fn ielsr58(
922        &self,
923    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
924        unsafe {
925            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
926                self._svd2pac_as_ptr().add(0x3e8usize),
927            )
928        }
929    }
930    #[inline(always)]
931    pub const fn ielsr59(
932        &self,
933    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
934        unsafe {
935            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
936                self._svd2pac_as_ptr().add(0x3ecusize),
937            )
938        }
939    }
940    #[inline(always)]
941    pub const fn ielsr60(
942        &self,
943    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
944        unsafe {
945            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
946                self._svd2pac_as_ptr().add(0x3f0usize),
947            )
948        }
949    }
950    #[inline(always)]
951    pub const fn ielsr61(
952        &self,
953    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
954        unsafe {
955            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
956                self._svd2pac_as_ptr().add(0x3f4usize),
957            )
958        }
959    }
960    #[inline(always)]
961    pub const fn ielsr62(
962        &self,
963    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
964        unsafe {
965            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
966                self._svd2pac_as_ptr().add(0x3f8usize),
967            )
968        }
969    }
970    #[inline(always)]
971    pub const fn ielsr63(
972        &self,
973    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
974        unsafe {
975            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
976                self._svd2pac_as_ptr().add(0x3fcusize),
977            )
978        }
979    }
980    #[inline(always)]
981    pub const fn ielsr64(
982        &self,
983    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
984        unsafe {
985            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
986                self._svd2pac_as_ptr().add(0x400usize),
987            )
988        }
989    }
990    #[inline(always)]
991    pub const fn ielsr65(
992        &self,
993    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
994        unsafe {
995            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
996                self._svd2pac_as_ptr().add(0x404usize),
997            )
998        }
999    }
1000    #[inline(always)]
1001    pub const fn ielsr66(
1002        &self,
1003    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1004        unsafe {
1005            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1006                self._svd2pac_as_ptr().add(0x408usize),
1007            )
1008        }
1009    }
1010    #[inline(always)]
1011    pub const fn ielsr67(
1012        &self,
1013    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1014        unsafe {
1015            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1016                self._svd2pac_as_ptr().add(0x40cusize),
1017            )
1018        }
1019    }
1020    #[inline(always)]
1021    pub const fn ielsr68(
1022        &self,
1023    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1024        unsafe {
1025            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1026                self._svd2pac_as_ptr().add(0x410usize),
1027            )
1028        }
1029    }
1030    #[inline(always)]
1031    pub const fn ielsr69(
1032        &self,
1033    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1034        unsafe {
1035            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1036                self._svd2pac_as_ptr().add(0x414usize),
1037            )
1038        }
1039    }
1040    #[inline(always)]
1041    pub const fn ielsr70(
1042        &self,
1043    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1044        unsafe {
1045            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1046                self._svd2pac_as_ptr().add(0x418usize),
1047            )
1048        }
1049    }
1050    #[inline(always)]
1051    pub const fn ielsr71(
1052        &self,
1053    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1054        unsafe {
1055            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1056                self._svd2pac_as_ptr().add(0x41cusize),
1057            )
1058        }
1059    }
1060    #[inline(always)]
1061    pub const fn ielsr72(
1062        &self,
1063    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1064        unsafe {
1065            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1066                self._svd2pac_as_ptr().add(0x420usize),
1067            )
1068        }
1069    }
1070    #[inline(always)]
1071    pub const fn ielsr73(
1072        &self,
1073    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1074        unsafe {
1075            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1076                self._svd2pac_as_ptr().add(0x424usize),
1077            )
1078        }
1079    }
1080    #[inline(always)]
1081    pub const fn ielsr74(
1082        &self,
1083    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1084        unsafe {
1085            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1086                self._svd2pac_as_ptr().add(0x428usize),
1087            )
1088        }
1089    }
1090    #[inline(always)]
1091    pub const fn ielsr75(
1092        &self,
1093    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1094        unsafe {
1095            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1096                self._svd2pac_as_ptr().add(0x42cusize),
1097            )
1098        }
1099    }
1100    #[inline(always)]
1101    pub const fn ielsr76(
1102        &self,
1103    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1104        unsafe {
1105            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1106                self._svd2pac_as_ptr().add(0x430usize),
1107            )
1108        }
1109    }
1110    #[inline(always)]
1111    pub const fn ielsr77(
1112        &self,
1113    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1114        unsafe {
1115            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1116                self._svd2pac_as_ptr().add(0x434usize),
1117            )
1118        }
1119    }
1120    #[inline(always)]
1121    pub const fn ielsr78(
1122        &self,
1123    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1124        unsafe {
1125            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1126                self._svd2pac_as_ptr().add(0x438usize),
1127            )
1128        }
1129    }
1130    #[inline(always)]
1131    pub const fn ielsr79(
1132        &self,
1133    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1134        unsafe {
1135            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1136                self._svd2pac_as_ptr().add(0x43cusize),
1137            )
1138        }
1139    }
1140    #[inline(always)]
1141    pub const fn ielsr80(
1142        &self,
1143    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1144        unsafe {
1145            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1146                self._svd2pac_as_ptr().add(0x440usize),
1147            )
1148        }
1149    }
1150    #[inline(always)]
1151    pub const fn ielsr81(
1152        &self,
1153    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1154        unsafe {
1155            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1156                self._svd2pac_as_ptr().add(0x444usize),
1157            )
1158        }
1159    }
1160    #[inline(always)]
1161    pub const fn ielsr82(
1162        &self,
1163    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1164        unsafe {
1165            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1166                self._svd2pac_as_ptr().add(0x448usize),
1167            )
1168        }
1169    }
1170    #[inline(always)]
1171    pub const fn ielsr83(
1172        &self,
1173    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1174        unsafe {
1175            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1176                self._svd2pac_as_ptr().add(0x44cusize),
1177            )
1178        }
1179    }
1180    #[inline(always)]
1181    pub const fn ielsr84(
1182        &self,
1183    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1184        unsafe {
1185            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1186                self._svd2pac_as_ptr().add(0x450usize),
1187            )
1188        }
1189    }
1190    #[inline(always)]
1191    pub const fn ielsr85(
1192        &self,
1193    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1194        unsafe {
1195            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1196                self._svd2pac_as_ptr().add(0x454usize),
1197            )
1198        }
1199    }
1200    #[inline(always)]
1201    pub const fn ielsr86(
1202        &self,
1203    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1204        unsafe {
1205            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1206                self._svd2pac_as_ptr().add(0x458usize),
1207            )
1208        }
1209    }
1210    #[inline(always)]
1211    pub const fn ielsr87(
1212        &self,
1213    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1214        unsafe {
1215            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1216                self._svd2pac_as_ptr().add(0x45cusize),
1217            )
1218        }
1219    }
1220    #[inline(always)]
1221    pub const fn ielsr88(
1222        &self,
1223    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1224        unsafe {
1225            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1226                self._svd2pac_as_ptr().add(0x460usize),
1227            )
1228        }
1229    }
1230    #[inline(always)]
1231    pub const fn ielsr89(
1232        &self,
1233    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1234        unsafe {
1235            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1236                self._svd2pac_as_ptr().add(0x464usize),
1237            )
1238        }
1239    }
1240    #[inline(always)]
1241    pub const fn ielsr90(
1242        &self,
1243    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1244        unsafe {
1245            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1246                self._svd2pac_as_ptr().add(0x468usize),
1247            )
1248        }
1249    }
1250    #[inline(always)]
1251    pub const fn ielsr91(
1252        &self,
1253    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1254        unsafe {
1255            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1256                self._svd2pac_as_ptr().add(0x46cusize),
1257            )
1258        }
1259    }
1260    #[inline(always)]
1261    pub const fn ielsr92(
1262        &self,
1263    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1264        unsafe {
1265            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1266                self._svd2pac_as_ptr().add(0x470usize),
1267            )
1268        }
1269    }
1270    #[inline(always)]
1271    pub const fn ielsr93(
1272        &self,
1273    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1274        unsafe {
1275            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1276                self._svd2pac_as_ptr().add(0x474usize),
1277            )
1278        }
1279    }
1280    #[inline(always)]
1281    pub const fn ielsr94(
1282        &self,
1283    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1284        unsafe {
1285            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1286                self._svd2pac_as_ptr().add(0x478usize),
1287            )
1288        }
1289    }
1290    #[inline(always)]
1291    pub const fn ielsr95(
1292        &self,
1293    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1294        unsafe {
1295            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1296                self._svd2pac_as_ptr().add(0x47cusize),
1297            )
1298        }
1299    }
1300}
1301#[doc(hidden)]
1302#[derive(Copy, Clone, Eq, PartialEq)]
1303pub struct Irqcr_SPEC;
1304impl crate::sealed::RegSpec for Irqcr_SPEC {
1305    type DataType = u8;
1306}
1307
1308#[doc = "IRQ Control Register %s"]
1309pub type Irqcr = crate::RegValueT<Irqcr_SPEC>;
1310
1311impl Irqcr {
1312    #[doc = "IRQi Detection Sense Select"]
1313    #[inline(always)]
1314    pub fn irqmd(
1315        self,
1316    ) -> crate::common::RegisterField<
1317        0,
1318        0x3,
1319        1,
1320        0,
1321        irqcr::Irqmd,
1322        irqcr::Irqmd,
1323        Irqcr_SPEC,
1324        crate::common::RW,
1325    > {
1326        crate::common::RegisterField::<
1327            0,
1328            0x3,
1329            1,
1330            0,
1331            irqcr::Irqmd,
1332            irqcr::Irqmd,
1333            Irqcr_SPEC,
1334            crate::common::RW,
1335        >::from_register(self, 0)
1336    }
1337
1338    #[doc = "IRQi Digital Filter Sampling Clock Select"]
1339    #[inline(always)]
1340    pub fn fclksel(
1341        self,
1342    ) -> crate::common::RegisterField<
1343        4,
1344        0x3,
1345        1,
1346        0,
1347        irqcr::Fclksel,
1348        irqcr::Fclksel,
1349        Irqcr_SPEC,
1350        crate::common::RW,
1351    > {
1352        crate::common::RegisterField::<
1353            4,
1354            0x3,
1355            1,
1356            0,
1357            irqcr::Fclksel,
1358            irqcr::Fclksel,
1359            Irqcr_SPEC,
1360            crate::common::RW,
1361        >::from_register(self, 0)
1362    }
1363
1364    #[doc = "IRQi Digital Filter Enable"]
1365    #[inline(always)]
1366    pub fn flten(
1367        self,
1368    ) -> crate::common::RegisterField<
1369        7,
1370        0x1,
1371        1,
1372        0,
1373        irqcr::Flten,
1374        irqcr::Flten,
1375        Irqcr_SPEC,
1376        crate::common::RW,
1377    > {
1378        crate::common::RegisterField::<
1379            7,
1380            0x1,
1381            1,
1382            0,
1383            irqcr::Flten,
1384            irqcr::Flten,
1385            Irqcr_SPEC,
1386            crate::common::RW,
1387        >::from_register(self, 0)
1388    }
1389}
1390impl ::core::default::Default for Irqcr {
1391    #[inline(always)]
1392    fn default() -> Irqcr {
1393        <crate::RegValueT<Irqcr_SPEC> as RegisterValue<_>>::new(0)
1394    }
1395}
1396pub mod irqcr {
1397
1398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1399    pub struct Irqmd_SPEC;
1400    pub type Irqmd = crate::EnumBitfieldStruct<u8, Irqmd_SPEC>;
1401    impl Irqmd {
1402        #[doc = "Falling edge"]
1403        pub const _00: Self = Self::new(0);
1404
1405        #[doc = "Rising edge"]
1406        pub const _01: Self = Self::new(1);
1407
1408        #[doc = "Rising and falling edges"]
1409        pub const _10: Self = Self::new(2);
1410
1411        #[doc = "Low level"]
1412        pub const _11: Self = Self::new(3);
1413    }
1414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1415    pub struct Fclksel_SPEC;
1416    pub type Fclksel = crate::EnumBitfieldStruct<u8, Fclksel_SPEC>;
1417    impl Fclksel {
1418        #[doc = "PCLKB"]
1419        pub const _00: Self = Self::new(0);
1420
1421        #[doc = "PCLKB/8"]
1422        pub const _01: Self = Self::new(1);
1423
1424        #[doc = "PCLKB/32"]
1425        pub const _10: Self = Self::new(2);
1426
1427        #[doc = "PCLKB/64"]
1428        pub const _11: Self = Self::new(3);
1429    }
1430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1431    pub struct Flten_SPEC;
1432    pub type Flten = crate::EnumBitfieldStruct<u8, Flten_SPEC>;
1433    impl Flten {
1434        #[doc = "Digital filter is disabled"]
1435        pub const _0: Self = Self::new(0);
1436
1437        #[doc = "Digital filter is enabled."]
1438        pub const _1: Self = Self::new(1);
1439    }
1440}
1441#[doc(hidden)]
1442#[derive(Copy, Clone, Eq, PartialEq)]
1443pub struct Nmicr_SPEC;
1444impl crate::sealed::RegSpec for Nmicr_SPEC {
1445    type DataType = u8;
1446}
1447
1448#[doc = "NMI Pin Interrupt Control Register"]
1449pub type Nmicr = crate::RegValueT<Nmicr_SPEC>;
1450
1451impl Nmicr {
1452    #[doc = "NMI Detection Set"]
1453    #[inline(always)]
1454    pub fn nmimd(
1455        self,
1456    ) -> crate::common::RegisterField<
1457        0,
1458        0x1,
1459        1,
1460        0,
1461        nmicr::Nmimd,
1462        nmicr::Nmimd,
1463        Nmicr_SPEC,
1464        crate::common::RW,
1465    > {
1466        crate::common::RegisterField::<
1467            0,
1468            0x1,
1469            1,
1470            0,
1471            nmicr::Nmimd,
1472            nmicr::Nmimd,
1473            Nmicr_SPEC,
1474            crate::common::RW,
1475        >::from_register(self, 0)
1476    }
1477
1478    #[doc = "NMI Digital Filter Sampling Clock Select"]
1479    #[inline(always)]
1480    pub fn nfclksel(
1481        self,
1482    ) -> crate::common::RegisterField<
1483        4,
1484        0x3,
1485        1,
1486        0,
1487        nmicr::Nfclksel,
1488        nmicr::Nfclksel,
1489        Nmicr_SPEC,
1490        crate::common::RW,
1491    > {
1492        crate::common::RegisterField::<
1493            4,
1494            0x3,
1495            1,
1496            0,
1497            nmicr::Nfclksel,
1498            nmicr::Nfclksel,
1499            Nmicr_SPEC,
1500            crate::common::RW,
1501        >::from_register(self, 0)
1502    }
1503
1504    #[doc = "NMI Digital Filter Enable"]
1505    #[inline(always)]
1506    pub fn nflten(
1507        self,
1508    ) -> crate::common::RegisterField<
1509        7,
1510        0x1,
1511        1,
1512        0,
1513        nmicr::Nflten,
1514        nmicr::Nflten,
1515        Nmicr_SPEC,
1516        crate::common::RW,
1517    > {
1518        crate::common::RegisterField::<
1519            7,
1520            0x1,
1521            1,
1522            0,
1523            nmicr::Nflten,
1524            nmicr::Nflten,
1525            Nmicr_SPEC,
1526            crate::common::RW,
1527        >::from_register(self, 0)
1528    }
1529}
1530impl ::core::default::Default for Nmicr {
1531    #[inline(always)]
1532    fn default() -> Nmicr {
1533        <crate::RegValueT<Nmicr_SPEC> as RegisterValue<_>>::new(0)
1534    }
1535}
1536pub mod nmicr {
1537
1538    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1539    pub struct Nmimd_SPEC;
1540    pub type Nmimd = crate::EnumBitfieldStruct<u8, Nmimd_SPEC>;
1541    impl Nmimd {
1542        #[doc = "Falling edge"]
1543        pub const _0: Self = Self::new(0);
1544
1545        #[doc = "Rising edge"]
1546        pub const _1: Self = Self::new(1);
1547    }
1548    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1549    pub struct Nfclksel_SPEC;
1550    pub type Nfclksel = crate::EnumBitfieldStruct<u8, Nfclksel_SPEC>;
1551    impl Nfclksel {
1552        #[doc = "PCLKB"]
1553        pub const _00: Self = Self::new(0);
1554
1555        #[doc = "PCLKB/8"]
1556        pub const _01: Self = Self::new(1);
1557
1558        #[doc = "PCLKB/32"]
1559        pub const _10: Self = Self::new(2);
1560
1561        #[doc = "PCLKB/64"]
1562        pub const _11: Self = Self::new(3);
1563    }
1564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1565    pub struct Nflten_SPEC;
1566    pub type Nflten = crate::EnumBitfieldStruct<u8, Nflten_SPEC>;
1567    impl Nflten {
1568        #[doc = "Disabled."]
1569        pub const _0: Self = Self::new(0);
1570
1571        #[doc = "Enabled."]
1572        pub const _1: Self = Self::new(1);
1573    }
1574}
1575#[doc(hidden)]
1576#[derive(Copy, Clone, Eq, PartialEq)]
1577pub struct Nmier_SPEC;
1578impl crate::sealed::RegSpec for Nmier_SPEC {
1579    type DataType = u16;
1580}
1581
1582#[doc = "Non-Maskable Interrupt Enable Register"]
1583pub type Nmier = crate::RegValueT<Nmier_SPEC>;
1584
1585impl Nmier {
1586    #[doc = "IWDT Underflow/Refresh Error Interrupt Enable"]
1587    #[inline(always)]
1588    pub fn iwdten(
1589        self,
1590    ) -> crate::common::RegisterField<
1591        0,
1592        0x1,
1593        1,
1594        0,
1595        nmier::Iwdten,
1596        nmier::Iwdten,
1597        Nmier_SPEC,
1598        crate::common::RW,
1599    > {
1600        crate::common::RegisterField::<
1601            0,
1602            0x1,
1603            1,
1604            0,
1605            nmier::Iwdten,
1606            nmier::Iwdten,
1607            Nmier_SPEC,
1608            crate::common::RW,
1609        >::from_register(self, 0)
1610    }
1611
1612    #[doc = "WDT Underflow/Refresh Error Interrupt Enable"]
1613    #[inline(always)]
1614    pub fn wdten(
1615        self,
1616    ) -> crate::common::RegisterField<
1617        1,
1618        0x1,
1619        1,
1620        0,
1621        nmier::Wdten,
1622        nmier::Wdten,
1623        Nmier_SPEC,
1624        crate::common::RW,
1625    > {
1626        crate::common::RegisterField::<
1627            1,
1628            0x1,
1629            1,
1630            0,
1631            nmier::Wdten,
1632            nmier::Wdten,
1633            Nmier_SPEC,
1634            crate::common::RW,
1635        >::from_register(self, 0)
1636    }
1637
1638    #[doc = "Voltage monitor 1 Interrupt Enable"]
1639    #[inline(always)]
1640    pub fn lvd1en(
1641        self,
1642    ) -> crate::common::RegisterField<
1643        2,
1644        0x1,
1645        1,
1646        0,
1647        nmier::Lvd1En,
1648        nmier::Lvd1En,
1649        Nmier_SPEC,
1650        crate::common::RW,
1651    > {
1652        crate::common::RegisterField::<
1653            2,
1654            0x1,
1655            1,
1656            0,
1657            nmier::Lvd1En,
1658            nmier::Lvd1En,
1659            Nmier_SPEC,
1660            crate::common::RW,
1661        >::from_register(self, 0)
1662    }
1663
1664    #[doc = "Voltage monitor 2 Interrupt Enable"]
1665    #[inline(always)]
1666    pub fn lvd2en(
1667        self,
1668    ) -> crate::common::RegisterField<
1669        3,
1670        0x1,
1671        1,
1672        0,
1673        nmier::Lvd2En,
1674        nmier::Lvd2En,
1675        Nmier_SPEC,
1676        crate::common::RW,
1677    > {
1678        crate::common::RegisterField::<
1679            3,
1680            0x1,
1681            1,
1682            0,
1683            nmier::Lvd2En,
1684            nmier::Lvd2En,
1685            Nmier_SPEC,
1686            crate::common::RW,
1687        >::from_register(self, 0)
1688    }
1689
1690    #[doc = "Main Clock Oscillation Stop Detection Interrupt Enable"]
1691    #[inline(always)]
1692    pub fn osten(
1693        self,
1694    ) -> crate::common::RegisterField<
1695        6,
1696        0x1,
1697        1,
1698        0,
1699        nmier::Osten,
1700        nmier::Osten,
1701        Nmier_SPEC,
1702        crate::common::RW,
1703    > {
1704        crate::common::RegisterField::<
1705            6,
1706            0x1,
1707            1,
1708            0,
1709            nmier::Osten,
1710            nmier::Osten,
1711            Nmier_SPEC,
1712            crate::common::RW,
1713        >::from_register(self, 0)
1714    }
1715
1716    #[doc = "NMI Pin Interrupt Enable"]
1717    #[inline(always)]
1718    pub fn nmien(
1719        self,
1720    ) -> crate::common::RegisterField<
1721        7,
1722        0x1,
1723        1,
1724        0,
1725        nmier::Nmien,
1726        nmier::Nmien,
1727        Nmier_SPEC,
1728        crate::common::RW,
1729    > {
1730        crate::common::RegisterField::<
1731            7,
1732            0x1,
1733            1,
1734            0,
1735            nmier::Nmien,
1736            nmier::Nmien,
1737            Nmier_SPEC,
1738            crate::common::RW,
1739        >::from_register(self, 0)
1740    }
1741
1742    #[doc = "SRAM Parity Error Interrupt Enable"]
1743    #[inline(always)]
1744    pub fn rpeen(
1745        self,
1746    ) -> crate::common::RegisterField<
1747        8,
1748        0x1,
1749        1,
1750        0,
1751        nmier::Rpeen,
1752        nmier::Rpeen,
1753        Nmier_SPEC,
1754        crate::common::RW,
1755    > {
1756        crate::common::RegisterField::<
1757            8,
1758            0x1,
1759            1,
1760            0,
1761            nmier::Rpeen,
1762            nmier::Rpeen,
1763            Nmier_SPEC,
1764            crate::common::RW,
1765        >::from_register(self, 0)
1766    }
1767
1768    #[doc = "SRAM ECC Error Interrupt Enable"]
1769    #[inline(always)]
1770    pub fn reccen(
1771        self,
1772    ) -> crate::common::RegisterField<
1773        9,
1774        0x1,
1775        1,
1776        0,
1777        nmier::Reccen,
1778        nmier::Reccen,
1779        Nmier_SPEC,
1780        crate::common::RW,
1781    > {
1782        crate::common::RegisterField::<
1783            9,
1784            0x1,
1785            1,
1786            0,
1787            nmier::Reccen,
1788            nmier::Reccen,
1789            Nmier_SPEC,
1790            crate::common::RW,
1791        >::from_register(self, 0)
1792    }
1793
1794    #[doc = "Bus Master MPU Error Interrupt Enable"]
1795    #[inline(always)]
1796    pub fn busmen(
1797        self,
1798    ) -> crate::common::RegisterField<
1799        11,
1800        0x1,
1801        1,
1802        0,
1803        nmier::Busmen,
1804        nmier::Busmen,
1805        Nmier_SPEC,
1806        crate::common::RW,
1807    > {
1808        crate::common::RegisterField::<
1809            11,
1810            0x1,
1811            1,
1812            0,
1813            nmier::Busmen,
1814            nmier::Busmen,
1815            Nmier_SPEC,
1816            crate::common::RW,
1817        >::from_register(self, 0)
1818    }
1819
1820    #[inline(always)]
1821    pub fn tzfen(
1822        self,
1823    ) -> crate::common::RegisterField<
1824        13,
1825        0x1,
1826        1,
1827        0,
1828        nmier::Tzfen,
1829        nmier::Tzfen,
1830        Nmier_SPEC,
1831        crate::common::RW,
1832    > {
1833        crate::common::RegisterField::<
1834            13,
1835            0x1,
1836            1,
1837            0,
1838            nmier::Tzfen,
1839            nmier::Tzfen,
1840            Nmier_SPEC,
1841            crate::common::RW,
1842        >::from_register(self, 0)
1843    }
1844
1845    #[inline(always)]
1846    pub fn cpeen(
1847        self,
1848    ) -> crate::common::RegisterField<
1849        15,
1850        0x1,
1851        1,
1852        0,
1853        nmier::Cpeen,
1854        nmier::Cpeen,
1855        Nmier_SPEC,
1856        crate::common::RW,
1857    > {
1858        crate::common::RegisterField::<
1859            15,
1860            0x1,
1861            1,
1862            0,
1863            nmier::Cpeen,
1864            nmier::Cpeen,
1865            Nmier_SPEC,
1866            crate::common::RW,
1867        >::from_register(self, 0)
1868    }
1869}
1870impl ::core::default::Default for Nmier {
1871    #[inline(always)]
1872    fn default() -> Nmier {
1873        <crate::RegValueT<Nmier_SPEC> as RegisterValue<_>>::new(0)
1874    }
1875}
1876pub mod nmier {
1877
1878    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1879    pub struct Iwdten_SPEC;
1880    pub type Iwdten = crate::EnumBitfieldStruct<u8, Iwdten_SPEC>;
1881    impl Iwdten {
1882        #[doc = "Disabled"]
1883        pub const _0: Self = Self::new(0);
1884
1885        #[doc = "Enabled."]
1886        pub const _1: Self = Self::new(1);
1887    }
1888    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1889    pub struct Wdten_SPEC;
1890    pub type Wdten = crate::EnumBitfieldStruct<u8, Wdten_SPEC>;
1891    impl Wdten {
1892        #[doc = "Disabled"]
1893        pub const _0: Self = Self::new(0);
1894
1895        #[doc = "Enabled"]
1896        pub const _1: Self = Self::new(1);
1897    }
1898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1899    pub struct Lvd1En_SPEC;
1900    pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
1901    impl Lvd1En {
1902        #[doc = "Disabled"]
1903        pub const _0: Self = Self::new(0);
1904
1905        #[doc = "Enabled"]
1906        pub const _1: Self = Self::new(1);
1907    }
1908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1909    pub struct Lvd2En_SPEC;
1910    pub type Lvd2En = crate::EnumBitfieldStruct<u8, Lvd2En_SPEC>;
1911    impl Lvd2En {
1912        #[doc = "Disabled"]
1913        pub const _0: Self = Self::new(0);
1914
1915        #[doc = "Enabled"]
1916        pub const _1: Self = Self::new(1);
1917    }
1918    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1919    pub struct Osten_SPEC;
1920    pub type Osten = crate::EnumBitfieldStruct<u8, Osten_SPEC>;
1921    impl Osten {
1922        #[doc = "Disabled"]
1923        pub const _0: Self = Self::new(0);
1924
1925        #[doc = "Enabled"]
1926        pub const _1: Self = Self::new(1);
1927    }
1928    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1929    pub struct Nmien_SPEC;
1930    pub type Nmien = crate::EnumBitfieldStruct<u8, Nmien_SPEC>;
1931    impl Nmien {
1932        #[doc = "Disabled"]
1933        pub const _0: Self = Self::new(0);
1934
1935        #[doc = "Enabled"]
1936        pub const _1: Self = Self::new(1);
1937    }
1938    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1939    pub struct Rpeen_SPEC;
1940    pub type Rpeen = crate::EnumBitfieldStruct<u8, Rpeen_SPEC>;
1941    impl Rpeen {
1942        #[doc = "Disabled"]
1943        pub const _0: Self = Self::new(0);
1944
1945        #[doc = "Enabled"]
1946        pub const _1: Self = Self::new(1);
1947    }
1948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1949    pub struct Reccen_SPEC;
1950    pub type Reccen = crate::EnumBitfieldStruct<u8, Reccen_SPEC>;
1951    impl Reccen {
1952        #[doc = "Disabled"]
1953        pub const _0: Self = Self::new(0);
1954
1955        #[doc = "Enabled"]
1956        pub const _1: Self = Self::new(1);
1957    }
1958    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1959    pub struct Busmen_SPEC;
1960    pub type Busmen = crate::EnumBitfieldStruct<u8, Busmen_SPEC>;
1961    impl Busmen {
1962        #[doc = "Disabled"]
1963        pub const _0: Self = Self::new(0);
1964
1965        #[doc = "Enabled"]
1966        pub const _1: Self = Self::new(1);
1967    }
1968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1969    pub struct Tzfen_SPEC;
1970    pub type Tzfen = crate::EnumBitfieldStruct<u8, Tzfen_SPEC>;
1971    impl Tzfen {
1972        #[doc = "Disabled"]
1973        pub const _0: Self = Self::new(0);
1974
1975        #[doc = "Enabled"]
1976        pub const _1: Self = Self::new(1);
1977    }
1978    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1979    pub struct Cpeen_SPEC;
1980    pub type Cpeen = crate::EnumBitfieldStruct<u8, Cpeen_SPEC>;
1981    impl Cpeen {
1982        #[doc = "Disabled"]
1983        pub const _0: Self = Self::new(0);
1984
1985        #[doc = "Enabled"]
1986        pub const _1: Self = Self::new(1);
1987    }
1988}
1989#[doc(hidden)]
1990#[derive(Copy, Clone, Eq, PartialEq)]
1991pub struct Nmiclr_SPEC;
1992impl crate::sealed::RegSpec for Nmiclr_SPEC {
1993    type DataType = u16;
1994}
1995
1996#[doc = "Non-Maskable Interrupt Status Clear Register"]
1997pub type Nmiclr = crate::RegValueT<Nmiclr_SPEC>;
1998
1999impl Nmiclr {
2000    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag Clear"]
2001    #[inline(always)]
2002    pub fn iwdtclr(
2003        self,
2004    ) -> crate::common::RegisterField<
2005        0,
2006        0x1,
2007        1,
2008        0,
2009        nmiclr::Iwdtclr,
2010        nmiclr::Iwdtclr,
2011        Nmiclr_SPEC,
2012        crate::common::RW,
2013    > {
2014        crate::common::RegisterField::<
2015            0,
2016            0x1,
2017            1,
2018            0,
2019            nmiclr::Iwdtclr,
2020            nmiclr::Iwdtclr,
2021            Nmiclr_SPEC,
2022            crate::common::RW,
2023        >::from_register(self, 0)
2024    }
2025
2026    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag Clear"]
2027    #[inline(always)]
2028    pub fn wdtclr(
2029        self,
2030    ) -> crate::common::RegisterField<
2031        1,
2032        0x1,
2033        1,
2034        0,
2035        nmiclr::Wdtclr,
2036        nmiclr::Wdtclr,
2037        Nmiclr_SPEC,
2038        crate::common::RW,
2039    > {
2040        crate::common::RegisterField::<
2041            1,
2042            0x1,
2043            1,
2044            0,
2045            nmiclr::Wdtclr,
2046            nmiclr::Wdtclr,
2047            Nmiclr_SPEC,
2048            crate::common::RW,
2049        >::from_register(self, 0)
2050    }
2051
2052    #[doc = "Voltage Monitor 1 Interrupt Status Flag Clear"]
2053    #[inline(always)]
2054    pub fn lvd1clr(
2055        self,
2056    ) -> crate::common::RegisterField<
2057        2,
2058        0x1,
2059        1,
2060        0,
2061        nmiclr::Lvd1Clr,
2062        nmiclr::Lvd1Clr,
2063        Nmiclr_SPEC,
2064        crate::common::RW,
2065    > {
2066        crate::common::RegisterField::<
2067            2,
2068            0x1,
2069            1,
2070            0,
2071            nmiclr::Lvd1Clr,
2072            nmiclr::Lvd1Clr,
2073            Nmiclr_SPEC,
2074            crate::common::RW,
2075        >::from_register(self, 0)
2076    }
2077
2078    #[doc = "Voltage Monitor 2 Interrupt Status Flag Clear"]
2079    #[inline(always)]
2080    pub fn lvd2clr(
2081        self,
2082    ) -> crate::common::RegisterField<
2083        3,
2084        0x1,
2085        1,
2086        0,
2087        nmiclr::Lvd2Clr,
2088        nmiclr::Lvd2Clr,
2089        Nmiclr_SPEC,
2090        crate::common::RW,
2091    > {
2092        crate::common::RegisterField::<
2093            3,
2094            0x1,
2095            1,
2096            0,
2097            nmiclr::Lvd2Clr,
2098            nmiclr::Lvd2Clr,
2099            Nmiclr_SPEC,
2100            crate::common::RW,
2101        >::from_register(self, 0)
2102    }
2103
2104    #[doc = "Oscillation Stop Detection Interrupt Status Flag Clear"]
2105    #[inline(always)]
2106    pub fn ostclr(
2107        self,
2108    ) -> crate::common::RegisterField<
2109        6,
2110        0x1,
2111        1,
2112        0,
2113        nmiclr::Ostclr,
2114        nmiclr::Ostclr,
2115        Nmiclr_SPEC,
2116        crate::common::RW,
2117    > {
2118        crate::common::RegisterField::<
2119            6,
2120            0x1,
2121            1,
2122            0,
2123            nmiclr::Ostclr,
2124            nmiclr::Ostclr,
2125            Nmiclr_SPEC,
2126            crate::common::RW,
2127        >::from_register(self, 0)
2128    }
2129
2130    #[doc = "NMI Pin Interrupt Status Flag Clear"]
2131    #[inline(always)]
2132    pub fn nmiclr(
2133        self,
2134    ) -> crate::common::RegisterField<
2135        7,
2136        0x1,
2137        1,
2138        0,
2139        nmiclr::Nmiclr,
2140        nmiclr::Nmiclr,
2141        Nmiclr_SPEC,
2142        crate::common::RW,
2143    > {
2144        crate::common::RegisterField::<
2145            7,
2146            0x1,
2147            1,
2148            0,
2149            nmiclr::Nmiclr,
2150            nmiclr::Nmiclr,
2151            Nmiclr_SPEC,
2152            crate::common::RW,
2153        >::from_register(self, 0)
2154    }
2155
2156    #[doc = "SRAM Parity Error Interrupt Status Flag Clear"]
2157    #[inline(always)]
2158    pub fn rpeclr(
2159        self,
2160    ) -> crate::common::RegisterField<
2161        8,
2162        0x1,
2163        1,
2164        0,
2165        nmiclr::Rpeclr,
2166        nmiclr::Rpeclr,
2167        Nmiclr_SPEC,
2168        crate::common::RW,
2169    > {
2170        crate::common::RegisterField::<
2171            8,
2172            0x1,
2173            1,
2174            0,
2175            nmiclr::Rpeclr,
2176            nmiclr::Rpeclr,
2177            Nmiclr_SPEC,
2178            crate::common::RW,
2179        >::from_register(self, 0)
2180    }
2181
2182    #[doc = "SRAM ECC Error Interrupt Status Flag Clear"]
2183    #[inline(always)]
2184    pub fn reccclr(
2185        self,
2186    ) -> crate::common::RegisterField<
2187        9,
2188        0x1,
2189        1,
2190        0,
2191        nmiclr::Reccclr,
2192        nmiclr::Reccclr,
2193        Nmiclr_SPEC,
2194        crate::common::RW,
2195    > {
2196        crate::common::RegisterField::<
2197            9,
2198            0x1,
2199            1,
2200            0,
2201            nmiclr::Reccclr,
2202            nmiclr::Reccclr,
2203            Nmiclr_SPEC,
2204            crate::common::RW,
2205        >::from_register(self, 0)
2206    }
2207
2208    #[doc = "Bus Master MPU Error Interrupt Status Flag Clear"]
2209    #[inline(always)]
2210    pub fn busmclr(
2211        self,
2212    ) -> crate::common::RegisterField<
2213        11,
2214        0x1,
2215        1,
2216        0,
2217        nmiclr::Busmclr,
2218        nmiclr::Busmclr,
2219        Nmiclr_SPEC,
2220        crate::common::RW,
2221    > {
2222        crate::common::RegisterField::<
2223            11,
2224            0x1,
2225            1,
2226            0,
2227            nmiclr::Busmclr,
2228            nmiclr::Busmclr,
2229            Nmiclr_SPEC,
2230            crate::common::RW,
2231        >::from_register(self, 0)
2232    }
2233
2234    #[inline(always)]
2235    pub fn tzfclr(
2236        self,
2237    ) -> crate::common::RegisterField<
2238        13,
2239        0x1,
2240        1,
2241        0,
2242        nmiclr::Tzfclr,
2243        nmiclr::Tzfclr,
2244        Nmiclr_SPEC,
2245        crate::common::RW,
2246    > {
2247        crate::common::RegisterField::<
2248            13,
2249            0x1,
2250            1,
2251            0,
2252            nmiclr::Tzfclr,
2253            nmiclr::Tzfclr,
2254            Nmiclr_SPEC,
2255            crate::common::RW,
2256        >::from_register(self, 0)
2257    }
2258
2259    #[inline(always)]
2260    pub fn cpeclr(
2261        self,
2262    ) -> crate::common::RegisterField<
2263        15,
2264        0x1,
2265        1,
2266        0,
2267        nmiclr::Cpeclr,
2268        nmiclr::Cpeclr,
2269        Nmiclr_SPEC,
2270        crate::common::RW,
2271    > {
2272        crate::common::RegisterField::<
2273            15,
2274            0x1,
2275            1,
2276            0,
2277            nmiclr::Cpeclr,
2278            nmiclr::Cpeclr,
2279            Nmiclr_SPEC,
2280            crate::common::RW,
2281        >::from_register(self, 0)
2282    }
2283}
2284impl ::core::default::Default for Nmiclr {
2285    #[inline(always)]
2286    fn default() -> Nmiclr {
2287        <crate::RegValueT<Nmiclr_SPEC> as RegisterValue<_>>::new(0)
2288    }
2289}
2290pub mod nmiclr {
2291
2292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2293    pub struct Iwdtclr_SPEC;
2294    pub type Iwdtclr = crate::EnumBitfieldStruct<u8, Iwdtclr_SPEC>;
2295    impl Iwdtclr {
2296        #[doc = "No effect"]
2297        pub const _0: Self = Self::new(0);
2298
2299        #[doc = "Clear the NMISR.IWDTST flag"]
2300        pub const _1: Self = Self::new(1);
2301    }
2302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2303    pub struct Wdtclr_SPEC;
2304    pub type Wdtclr = crate::EnumBitfieldStruct<u8, Wdtclr_SPEC>;
2305    impl Wdtclr {
2306        #[doc = "No effect"]
2307        pub const _0: Self = Self::new(0);
2308
2309        #[doc = "Clear the NMISR.WDTST flag"]
2310        pub const _1: Self = Self::new(1);
2311    }
2312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2313    pub struct Lvd1Clr_SPEC;
2314    pub type Lvd1Clr = crate::EnumBitfieldStruct<u8, Lvd1Clr_SPEC>;
2315    impl Lvd1Clr {
2316        #[doc = "No effect"]
2317        pub const _0: Self = Self::new(0);
2318
2319        #[doc = "Clear the NMISR.LVD1ST flag"]
2320        pub const _1: Self = Self::new(1);
2321    }
2322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2323    pub struct Lvd2Clr_SPEC;
2324    pub type Lvd2Clr = crate::EnumBitfieldStruct<u8, Lvd2Clr_SPEC>;
2325    impl Lvd2Clr {
2326        #[doc = "No effect"]
2327        pub const _0: Self = Self::new(0);
2328
2329        #[doc = "Clear the NMISR.LVD2ST flag."]
2330        pub const _1: Self = Self::new(1);
2331    }
2332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2333    pub struct Ostclr_SPEC;
2334    pub type Ostclr = crate::EnumBitfieldStruct<u8, Ostclr_SPEC>;
2335    impl Ostclr {
2336        #[doc = "No effect"]
2337        pub const _0: Self = Self::new(0);
2338
2339        #[doc = "Clear the NMISR.OSTST flag"]
2340        pub const _1: Self = Self::new(1);
2341    }
2342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2343    pub struct Nmiclr_SPEC;
2344    pub type Nmiclr = crate::EnumBitfieldStruct<u8, Nmiclr_SPEC>;
2345    impl Nmiclr {
2346        #[doc = "No effect"]
2347        pub const _0: Self = Self::new(0);
2348
2349        #[doc = "Clear the NMISR.NMIST flag"]
2350        pub const _1: Self = Self::new(1);
2351    }
2352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2353    pub struct Rpeclr_SPEC;
2354    pub type Rpeclr = crate::EnumBitfieldStruct<u8, Rpeclr_SPEC>;
2355    impl Rpeclr {
2356        #[doc = "No effect"]
2357        pub const _0: Self = Self::new(0);
2358
2359        #[doc = "Clear the NMISR.RPEST flag"]
2360        pub const _1: Self = Self::new(1);
2361    }
2362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2363    pub struct Reccclr_SPEC;
2364    pub type Reccclr = crate::EnumBitfieldStruct<u8, Reccclr_SPEC>;
2365    impl Reccclr {
2366        #[doc = "No effect"]
2367        pub const _0: Self = Self::new(0);
2368
2369        #[doc = "Clear the NMISR.RECCST flag"]
2370        pub const _1: Self = Self::new(1);
2371    }
2372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2373    pub struct Busmclr_SPEC;
2374    pub type Busmclr = crate::EnumBitfieldStruct<u8, Busmclr_SPEC>;
2375    impl Busmclr {
2376        #[doc = "No effect"]
2377        pub const _0: Self = Self::new(0);
2378
2379        #[doc = "Clear the NMISR.BUSMST flag"]
2380        pub const _1: Self = Self::new(1);
2381    }
2382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2383    pub struct Tzfclr_SPEC;
2384    pub type Tzfclr = crate::EnumBitfieldStruct<u8, Tzfclr_SPEC>;
2385    impl Tzfclr {
2386        #[doc = "No effect"]
2387        pub const _0: Self = Self::new(0);
2388
2389        #[doc = "Clear the NMISR.TZFCLR flag"]
2390        pub const _1: Self = Self::new(1);
2391    }
2392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2393    pub struct Cpeclr_SPEC;
2394    pub type Cpeclr = crate::EnumBitfieldStruct<u8, Cpeclr_SPEC>;
2395    impl Cpeclr {
2396        #[doc = "No effect"]
2397        pub const _0: Self = Self::new(0);
2398
2399        #[doc = "Clear the NMISR.CPECLR flag"]
2400        pub const _1: Self = Self::new(1);
2401    }
2402}
2403#[doc(hidden)]
2404#[derive(Copy, Clone, Eq, PartialEq)]
2405pub struct Nmisr_SPEC;
2406impl crate::sealed::RegSpec for Nmisr_SPEC {
2407    type DataType = u16;
2408}
2409
2410#[doc = "Non-Maskable Interrupt Status Register"]
2411pub type Nmisr = crate::RegValueT<Nmisr_SPEC>;
2412
2413impl Nmisr {
2414    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag"]
2415    #[inline(always)]
2416    pub fn iwdtst(
2417        self,
2418    ) -> crate::common::RegisterField<
2419        0,
2420        0x1,
2421        1,
2422        0,
2423        nmisr::Iwdtst,
2424        nmisr::Iwdtst,
2425        Nmisr_SPEC,
2426        crate::common::R,
2427    > {
2428        crate::common::RegisterField::<
2429            0,
2430            0x1,
2431            1,
2432            0,
2433            nmisr::Iwdtst,
2434            nmisr::Iwdtst,
2435            Nmisr_SPEC,
2436            crate::common::R,
2437        >::from_register(self, 0)
2438    }
2439
2440    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag"]
2441    #[inline(always)]
2442    pub fn wdtst(
2443        self,
2444    ) -> crate::common::RegisterField<
2445        1,
2446        0x1,
2447        1,
2448        0,
2449        nmisr::Wdtst,
2450        nmisr::Wdtst,
2451        Nmisr_SPEC,
2452        crate::common::R,
2453    > {
2454        crate::common::RegisterField::<
2455            1,
2456            0x1,
2457            1,
2458            0,
2459            nmisr::Wdtst,
2460            nmisr::Wdtst,
2461            Nmisr_SPEC,
2462            crate::common::R,
2463        >::from_register(self, 0)
2464    }
2465
2466    #[doc = "Voltage Monitor 1 Interrupt Status Flag"]
2467    #[inline(always)]
2468    pub fn lvd1st(
2469        self,
2470    ) -> crate::common::RegisterField<
2471        2,
2472        0x1,
2473        1,
2474        0,
2475        nmisr::Lvd1St,
2476        nmisr::Lvd1St,
2477        Nmisr_SPEC,
2478        crate::common::R,
2479    > {
2480        crate::common::RegisterField::<
2481            2,
2482            0x1,
2483            1,
2484            0,
2485            nmisr::Lvd1St,
2486            nmisr::Lvd1St,
2487            Nmisr_SPEC,
2488            crate::common::R,
2489        >::from_register(self, 0)
2490    }
2491
2492    #[doc = "Voltage Monitor 2 Interrupt Status Flag"]
2493    #[inline(always)]
2494    pub fn lvd2st(
2495        self,
2496    ) -> crate::common::RegisterField<
2497        3,
2498        0x1,
2499        1,
2500        0,
2501        nmisr::Lvd2St,
2502        nmisr::Lvd2St,
2503        Nmisr_SPEC,
2504        crate::common::R,
2505    > {
2506        crate::common::RegisterField::<
2507            3,
2508            0x1,
2509            1,
2510            0,
2511            nmisr::Lvd2St,
2512            nmisr::Lvd2St,
2513            Nmisr_SPEC,
2514            crate::common::R,
2515        >::from_register(self, 0)
2516    }
2517
2518    #[doc = "Main Clock Oscillation Stop Detection Interrupt Status Flag"]
2519    #[inline(always)]
2520    pub fn ostst(
2521        self,
2522    ) -> crate::common::RegisterField<
2523        6,
2524        0x1,
2525        1,
2526        0,
2527        nmisr::Ostst,
2528        nmisr::Ostst,
2529        Nmisr_SPEC,
2530        crate::common::R,
2531    > {
2532        crate::common::RegisterField::<
2533            6,
2534            0x1,
2535            1,
2536            0,
2537            nmisr::Ostst,
2538            nmisr::Ostst,
2539            Nmisr_SPEC,
2540            crate::common::R,
2541        >::from_register(self, 0)
2542    }
2543
2544    #[doc = "NMI Pin Interrupt Status Flag"]
2545    #[inline(always)]
2546    pub fn nmist(
2547        self,
2548    ) -> crate::common::RegisterField<
2549        7,
2550        0x1,
2551        1,
2552        0,
2553        nmisr::Nmist,
2554        nmisr::Nmist,
2555        Nmisr_SPEC,
2556        crate::common::R,
2557    > {
2558        crate::common::RegisterField::<
2559            7,
2560            0x1,
2561            1,
2562            0,
2563            nmisr::Nmist,
2564            nmisr::Nmist,
2565            Nmisr_SPEC,
2566            crate::common::R,
2567        >::from_register(self, 0)
2568    }
2569
2570    #[doc = "SRAM Parity Error Interrupt Status Flag"]
2571    #[inline(always)]
2572    pub fn rpest(
2573        self,
2574    ) -> crate::common::RegisterField<
2575        8,
2576        0x1,
2577        1,
2578        0,
2579        nmisr::Rpest,
2580        nmisr::Rpest,
2581        Nmisr_SPEC,
2582        crate::common::R,
2583    > {
2584        crate::common::RegisterField::<
2585            8,
2586            0x1,
2587            1,
2588            0,
2589            nmisr::Rpest,
2590            nmisr::Rpest,
2591            Nmisr_SPEC,
2592            crate::common::R,
2593        >::from_register(self, 0)
2594    }
2595
2596    #[doc = "SRAM ECC Error Interrupt Status Flag"]
2597    #[inline(always)]
2598    pub fn reccst(
2599        self,
2600    ) -> crate::common::RegisterField<
2601        9,
2602        0x1,
2603        1,
2604        0,
2605        nmisr::Reccst,
2606        nmisr::Reccst,
2607        Nmisr_SPEC,
2608        crate::common::R,
2609    > {
2610        crate::common::RegisterField::<
2611            9,
2612            0x1,
2613            1,
2614            0,
2615            nmisr::Reccst,
2616            nmisr::Reccst,
2617            Nmisr_SPEC,
2618            crate::common::R,
2619        >::from_register(self, 0)
2620    }
2621
2622    #[doc = "Bus Master MPU Error Interrupt Status Flag"]
2623    #[inline(always)]
2624    pub fn busmst(
2625        self,
2626    ) -> crate::common::RegisterField<
2627        11,
2628        0x1,
2629        1,
2630        0,
2631        nmisr::Busmst,
2632        nmisr::Busmst,
2633        Nmisr_SPEC,
2634        crate::common::R,
2635    > {
2636        crate::common::RegisterField::<
2637            11,
2638            0x1,
2639            1,
2640            0,
2641            nmisr::Busmst,
2642            nmisr::Busmst,
2643            Nmisr_SPEC,
2644            crate::common::R,
2645        >::from_register(self, 0)
2646    }
2647
2648    #[inline(always)]
2649    pub fn tzfst(
2650        self,
2651    ) -> crate::common::RegisterField<
2652        13,
2653        0x1,
2654        1,
2655        0,
2656        nmisr::Tzfst,
2657        nmisr::Tzfst,
2658        Nmisr_SPEC,
2659        crate::common::R,
2660    > {
2661        crate::common::RegisterField::<
2662            13,
2663            0x1,
2664            1,
2665            0,
2666            nmisr::Tzfst,
2667            nmisr::Tzfst,
2668            Nmisr_SPEC,
2669            crate::common::R,
2670        >::from_register(self, 0)
2671    }
2672
2673    #[inline(always)]
2674    pub fn cpest(
2675        self,
2676    ) -> crate::common::RegisterField<
2677        15,
2678        0x1,
2679        1,
2680        0,
2681        nmisr::Cpest,
2682        nmisr::Cpest,
2683        Nmisr_SPEC,
2684        crate::common::R,
2685    > {
2686        crate::common::RegisterField::<
2687            15,
2688            0x1,
2689            1,
2690            0,
2691            nmisr::Cpest,
2692            nmisr::Cpest,
2693            Nmisr_SPEC,
2694            crate::common::R,
2695        >::from_register(self, 0)
2696    }
2697}
2698impl ::core::default::Default for Nmisr {
2699    #[inline(always)]
2700    fn default() -> Nmisr {
2701        <crate::RegValueT<Nmisr_SPEC> as RegisterValue<_>>::new(0)
2702    }
2703}
2704pub mod nmisr {
2705
2706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2707    pub struct Iwdtst_SPEC;
2708    pub type Iwdtst = crate::EnumBitfieldStruct<u8, Iwdtst_SPEC>;
2709    impl Iwdtst {
2710        #[doc = "Interrupt not requested"]
2711        pub const _0: Self = Self::new(0);
2712
2713        #[doc = "Interrupt requested"]
2714        pub const _1: Self = Self::new(1);
2715    }
2716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2717    pub struct Wdtst_SPEC;
2718    pub type Wdtst = crate::EnumBitfieldStruct<u8, Wdtst_SPEC>;
2719    impl Wdtst {
2720        #[doc = "Interrupt not requested"]
2721        pub const _0: Self = Self::new(0);
2722
2723        #[doc = "Interrupt requested"]
2724        pub const _1: Self = Self::new(1);
2725    }
2726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2727    pub struct Lvd1St_SPEC;
2728    pub type Lvd1St = crate::EnumBitfieldStruct<u8, Lvd1St_SPEC>;
2729    impl Lvd1St {
2730        #[doc = "Interrupt not requested"]
2731        pub const _0: Self = Self::new(0);
2732
2733        #[doc = "Interrupt requested"]
2734        pub const _1: Self = Self::new(1);
2735    }
2736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2737    pub struct Lvd2St_SPEC;
2738    pub type Lvd2St = crate::EnumBitfieldStruct<u8, Lvd2St_SPEC>;
2739    impl Lvd2St {
2740        #[doc = "Interrupt not requested"]
2741        pub const _0: Self = Self::new(0);
2742
2743        #[doc = "Interrupt requested"]
2744        pub const _1: Self = Self::new(1);
2745    }
2746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2747    pub struct Ostst_SPEC;
2748    pub type Ostst = crate::EnumBitfieldStruct<u8, Ostst_SPEC>;
2749    impl Ostst {
2750        #[doc = "Interrupt not requested for main clock oscillation stop"]
2751        pub const _0: Self = Self::new(0);
2752
2753        #[doc = "Interrupt requested for main clock oscillation stop"]
2754        pub const _1: Self = Self::new(1);
2755    }
2756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2757    pub struct Nmist_SPEC;
2758    pub type Nmist = crate::EnumBitfieldStruct<u8, Nmist_SPEC>;
2759    impl Nmist {
2760        #[doc = "Interrupt not requested"]
2761        pub const _0: Self = Self::new(0);
2762
2763        #[doc = "Interrupt requested"]
2764        pub const _1: Self = Self::new(1);
2765    }
2766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2767    pub struct Rpest_SPEC;
2768    pub type Rpest = crate::EnumBitfieldStruct<u8, Rpest_SPEC>;
2769    impl Rpest {
2770        #[doc = "Interrupt not requested"]
2771        pub const _0: Self = Self::new(0);
2772
2773        #[doc = "Interrupt requested"]
2774        pub const _1: Self = Self::new(1);
2775    }
2776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2777    pub struct Reccst_SPEC;
2778    pub type Reccst = crate::EnumBitfieldStruct<u8, Reccst_SPEC>;
2779    impl Reccst {
2780        #[doc = "Interrupt not requested"]
2781        pub const _0: Self = Self::new(0);
2782
2783        #[doc = "Interrupt requested"]
2784        pub const _1: Self = Self::new(1);
2785    }
2786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2787    pub struct Busmst_SPEC;
2788    pub type Busmst = crate::EnumBitfieldStruct<u8, Busmst_SPEC>;
2789    impl Busmst {
2790        #[doc = "Interrupt not requested"]
2791        pub const _0: Self = Self::new(0);
2792
2793        #[doc = "Interrupt requested"]
2794        pub const _1: Self = Self::new(1);
2795    }
2796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797    pub struct Tzfst_SPEC;
2798    pub type Tzfst = crate::EnumBitfieldStruct<u8, Tzfst_SPEC>;
2799    impl Tzfst {
2800        #[doc = "Interrupt not requested"]
2801        pub const _0: Self = Self::new(0);
2802
2803        #[doc = "Interrupt requested"]
2804        pub const _1: Self = Self::new(1);
2805    }
2806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2807    pub struct Cpest_SPEC;
2808    pub type Cpest = crate::EnumBitfieldStruct<u8, Cpest_SPEC>;
2809    impl Cpest {
2810        #[doc = "Interrupt not requested"]
2811        pub const _0: Self = Self::new(0);
2812
2813        #[doc = "Interrupt requested"]
2814        pub const _1: Self = Self::new(1);
2815    }
2816}
2817#[doc(hidden)]
2818#[derive(Copy, Clone, Eq, PartialEq)]
2819pub struct Wupen0_SPEC;
2820impl crate::sealed::RegSpec for Wupen0_SPEC {
2821    type DataType = u32;
2822}
2823
2824#[doc = "Wake Up Interrupt Enable Register 0"]
2825pub type Wupen0 = crate::RegValueT<Wupen0_SPEC>;
2826
2827impl Wupen0 {
2828    #[doc = "IRQn Interrupt Software Standby/Snooze Mode Returns Enable bit (n = 0 to 15)"]
2829    #[inline(always)]
2830    pub fn irqwupen(
2831        self,
2832    ) -> crate::common::RegisterField<
2833        0,
2834        0xffff,
2835        1,
2836        0,
2837        wupen0::Irqwupen,
2838        wupen0::Irqwupen,
2839        Wupen0_SPEC,
2840        crate::common::RW,
2841    > {
2842        crate::common::RegisterField::<
2843            0,
2844            0xffff,
2845            1,
2846            0,
2847            wupen0::Irqwupen,
2848            wupen0::Irqwupen,
2849            Wupen0_SPEC,
2850            crate::common::RW,
2851        >::from_register(self, 0)
2852    }
2853
2854    #[doc = "IWDT Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2855    #[inline(always)]
2856    pub fn iwdtwupen(
2857        self,
2858    ) -> crate::common::RegisterField<
2859        16,
2860        0x1,
2861        1,
2862        0,
2863        wupen0::Iwdtwupen,
2864        wupen0::Iwdtwupen,
2865        Wupen0_SPEC,
2866        crate::common::RW,
2867    > {
2868        crate::common::RegisterField::<
2869            16,
2870            0x1,
2871            1,
2872            0,
2873            wupen0::Iwdtwupen,
2874            wupen0::Iwdtwupen,
2875            Wupen0_SPEC,
2876            crate::common::RW,
2877        >::from_register(self, 0)
2878    }
2879
2880    #[doc = "LVD1 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2881    #[inline(always)]
2882    pub fn lvd1wupen(
2883        self,
2884    ) -> crate::common::RegisterField<
2885        18,
2886        0x1,
2887        1,
2888        0,
2889        wupen0::Lvd1Wupen,
2890        wupen0::Lvd1Wupen,
2891        Wupen0_SPEC,
2892        crate::common::RW,
2893    > {
2894        crate::common::RegisterField::<
2895            18,
2896            0x1,
2897            1,
2898            0,
2899            wupen0::Lvd1Wupen,
2900            wupen0::Lvd1Wupen,
2901            Wupen0_SPEC,
2902            crate::common::RW,
2903        >::from_register(self, 0)
2904    }
2905
2906    #[doc = "LVD2 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2907    #[inline(always)]
2908    pub fn lvd2wupen(
2909        self,
2910    ) -> crate::common::RegisterField<
2911        19,
2912        0x1,
2913        1,
2914        0,
2915        wupen0::Lvd2Wupen,
2916        wupen0::Lvd2Wupen,
2917        Wupen0_SPEC,
2918        crate::common::RW,
2919    > {
2920        crate::common::RegisterField::<
2921            19,
2922            0x1,
2923            1,
2924            0,
2925            wupen0::Lvd2Wupen,
2926            wupen0::Lvd2Wupen,
2927            Wupen0_SPEC,
2928            crate::common::RW,
2929        >::from_register(self, 0)
2930    }
2931
2932    #[doc = "RTC Alarm Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2933    #[inline(always)]
2934    pub fn rtcalmwupen(
2935        self,
2936    ) -> crate::common::RegisterField<
2937        24,
2938        0x1,
2939        1,
2940        0,
2941        wupen0::Rtcalmwupen,
2942        wupen0::Rtcalmwupen,
2943        Wupen0_SPEC,
2944        crate::common::RW,
2945    > {
2946        crate::common::RegisterField::<
2947            24,
2948            0x1,
2949            1,
2950            0,
2951            wupen0::Rtcalmwupen,
2952            wupen0::Rtcalmwupen,
2953            Wupen0_SPEC,
2954            crate::common::RW,
2955        >::from_register(self, 0)
2956    }
2957
2958    #[doc = "RTC Period Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2959    #[inline(always)]
2960    pub fn rtcprdwupen(
2961        self,
2962    ) -> crate::common::RegisterField<
2963        25,
2964        0x1,
2965        1,
2966        0,
2967        wupen0::Rtcprdwupen,
2968        wupen0::Rtcprdwupen,
2969        Wupen0_SPEC,
2970        crate::common::RW,
2971    > {
2972        crate::common::RegisterField::<
2973            25,
2974            0x1,
2975            1,
2976            0,
2977            wupen0::Rtcprdwupen,
2978            wupen0::Rtcprdwupen,
2979            Wupen0_SPEC,
2980            crate::common::RW,
2981        >::from_register(self, 0)
2982    }
2983
2984    #[doc = "USBFS0 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2985    #[inline(always)]
2986    pub fn usbfs0wupen(
2987        self,
2988    ) -> crate::common::RegisterField<
2989        27,
2990        0x1,
2991        1,
2992        0,
2993        wupen0::Usbfs0Wupen,
2994        wupen0::Usbfs0Wupen,
2995        Wupen0_SPEC,
2996        crate::common::RW,
2997    > {
2998        crate::common::RegisterField::<
2999            27,
3000            0x1,
3001            1,
3002            0,
3003            wupen0::Usbfs0Wupen,
3004            wupen0::Usbfs0Wupen,
3005            Wupen0_SPEC,
3006            crate::common::RW,
3007        >::from_register(self, 0)
3008    }
3009
3010    #[doc = "AGT1 Underflow Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3011    #[inline(always)]
3012    pub fn agt1udwupen(
3013        self,
3014    ) -> crate::common::RegisterField<
3015        28,
3016        0x1,
3017        1,
3018        0,
3019        wupen0::Agt1Udwupen,
3020        wupen0::Agt1Udwupen,
3021        Wupen0_SPEC,
3022        crate::common::RW,
3023    > {
3024        crate::common::RegisterField::<
3025            28,
3026            0x1,
3027            1,
3028            0,
3029            wupen0::Agt1Udwupen,
3030            wupen0::Agt1Udwupen,
3031            Wupen0_SPEC,
3032            crate::common::RW,
3033        >::from_register(self, 0)
3034    }
3035
3036    #[doc = "AGT1 Compare Match A Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3037    #[inline(always)]
3038    pub fn agt1cawupen(
3039        self,
3040    ) -> crate::common::RegisterField<
3041        29,
3042        0x1,
3043        1,
3044        0,
3045        wupen0::Agt1Cawupen,
3046        wupen0::Agt1Cawupen,
3047        Wupen0_SPEC,
3048        crate::common::RW,
3049    > {
3050        crate::common::RegisterField::<
3051            29,
3052            0x1,
3053            1,
3054            0,
3055            wupen0::Agt1Cawupen,
3056            wupen0::Agt1Cawupen,
3057            Wupen0_SPEC,
3058            crate::common::RW,
3059        >::from_register(self, 0)
3060    }
3061
3062    #[doc = "AGT1 Compare Match B Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3063    #[inline(always)]
3064    pub fn agt1cbwupen(
3065        self,
3066    ) -> crate::common::RegisterField<
3067        30,
3068        0x1,
3069        1,
3070        0,
3071        wupen0::Agt1Cbwupen,
3072        wupen0::Agt1Cbwupen,
3073        Wupen0_SPEC,
3074        crate::common::RW,
3075    > {
3076        crate::common::RegisterField::<
3077            30,
3078            0x1,
3079            1,
3080            0,
3081            wupen0::Agt1Cbwupen,
3082            wupen0::Agt1Cbwupen,
3083            Wupen0_SPEC,
3084            crate::common::RW,
3085        >::from_register(self, 0)
3086    }
3087
3088    #[doc = "IIC0 Address Match Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3089    #[inline(always)]
3090    pub fn iic0wupen(
3091        self,
3092    ) -> crate::common::RegisterField<
3093        31,
3094        0x1,
3095        1,
3096        0,
3097        wupen0::Iic0Wupen,
3098        wupen0::Iic0Wupen,
3099        Wupen0_SPEC,
3100        crate::common::RW,
3101    > {
3102        crate::common::RegisterField::<
3103            31,
3104            0x1,
3105            1,
3106            0,
3107            wupen0::Iic0Wupen,
3108            wupen0::Iic0Wupen,
3109            Wupen0_SPEC,
3110            crate::common::RW,
3111        >::from_register(self, 0)
3112    }
3113}
3114impl ::core::default::Default for Wupen0 {
3115    #[inline(always)]
3116    fn default() -> Wupen0 {
3117        <crate::RegValueT<Wupen0_SPEC> as RegisterValue<_>>::new(0)
3118    }
3119}
3120pub mod wupen0 {
3121
3122    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3123    pub struct Irqwupen_SPEC;
3124    pub type Irqwupen = crate::EnumBitfieldStruct<u8, Irqwupen_SPEC>;
3125    impl Irqwupen {
3126        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is disabled"]
3127        pub const _0: Self = Self::new(0);
3128
3129        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is enabled"]
3130        pub const _1: Self = Self::new(1);
3131    }
3132    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3133    pub struct Iwdtwupen_SPEC;
3134    pub type Iwdtwupen = crate::EnumBitfieldStruct<u8, Iwdtwupen_SPEC>;
3135    impl Iwdtwupen {
3136        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is disabled"]
3137        pub const _0: Self = Self::new(0);
3138
3139        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is enabled"]
3140        pub const _1: Self = Self::new(1);
3141    }
3142    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3143    pub struct Lvd1Wupen_SPEC;
3144    pub type Lvd1Wupen = crate::EnumBitfieldStruct<u8, Lvd1Wupen_SPEC>;
3145    impl Lvd1Wupen {
3146        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is disabled"]
3147        pub const _0: Self = Self::new(0);
3148
3149        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is enabled"]
3150        pub const _1: Self = Self::new(1);
3151    }
3152    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3153    pub struct Lvd2Wupen_SPEC;
3154    pub type Lvd2Wupen = crate::EnumBitfieldStruct<u8, Lvd2Wupen_SPEC>;
3155    impl Lvd2Wupen {
3156        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is disabled"]
3157        pub const _0: Self = Self::new(0);
3158
3159        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is enabled"]
3160        pub const _1: Self = Self::new(1);
3161    }
3162    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3163    pub struct Rtcalmwupen_SPEC;
3164    pub type Rtcalmwupen = crate::EnumBitfieldStruct<u8, Rtcalmwupen_SPEC>;
3165    impl Rtcalmwupen {
3166        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is disabled"]
3167        pub const _0: Self = Self::new(0);
3168
3169        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is enabled"]
3170        pub const _1: Self = Self::new(1);
3171    }
3172    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3173    pub struct Rtcprdwupen_SPEC;
3174    pub type Rtcprdwupen = crate::EnumBitfieldStruct<u8, Rtcprdwupen_SPEC>;
3175    impl Rtcprdwupen {
3176        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is disabled"]
3177        pub const _0: Self = Self::new(0);
3178
3179        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is enabled"]
3180        pub const _1: Self = Self::new(1);
3181    }
3182    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3183    pub struct Usbfs0Wupen_SPEC;
3184    pub type Usbfs0Wupen = crate::EnumBitfieldStruct<u8, Usbfs0Wupen_SPEC>;
3185    impl Usbfs0Wupen {
3186        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is disabled"]
3187        pub const _0: Self = Self::new(0);
3188
3189        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is enabled"]
3190        pub const _1: Self = Self::new(1);
3191    }
3192    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3193    pub struct Agt1Udwupen_SPEC;
3194    pub type Agt1Udwupen = crate::EnumBitfieldStruct<u8, Agt1Udwupen_SPEC>;
3195    impl Agt1Udwupen {
3196        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is disabled"]
3197        pub const _0: Self = Self::new(0);
3198
3199        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is enabled"]
3200        pub const _1: Self = Self::new(1);
3201    }
3202    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3203    pub struct Agt1Cawupen_SPEC;
3204    pub type Agt1Cawupen = crate::EnumBitfieldStruct<u8, Agt1Cawupen_SPEC>;
3205    impl Agt1Cawupen {
3206        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is disabled"]
3207        pub const _0: Self = Self::new(0);
3208
3209        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is enabled"]
3210        pub const _1: Self = Self::new(1);
3211    }
3212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3213    pub struct Agt1Cbwupen_SPEC;
3214    pub type Agt1Cbwupen = crate::EnumBitfieldStruct<u8, Agt1Cbwupen_SPEC>;
3215    impl Agt1Cbwupen {
3216        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is disabled"]
3217        pub const _0: Self = Self::new(0);
3218
3219        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is enabled"]
3220        pub const _1: Self = Self::new(1);
3221    }
3222    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3223    pub struct Iic0Wupen_SPEC;
3224    pub type Iic0Wupen = crate::EnumBitfieldStruct<u8, Iic0Wupen_SPEC>;
3225    impl Iic0Wupen {
3226        #[doc = "Software Standby/Snooze Mode returns by IIC0 address match interrupt is disabled"]
3227        pub const _0: Self = Self::new(0);
3228
3229        #[doc = "Software Standby/Snooze Mode returns by IIC0 address match interrupt is enabled"]
3230        pub const _1: Self = Self::new(1);
3231    }
3232}
3233#[doc(hidden)]
3234#[derive(Copy, Clone, Eq, PartialEq)]
3235pub struct Wupen1_SPEC;
3236impl crate::sealed::RegSpec for Wupen1_SPEC {
3237    type DataType = u32;
3238}
3239
3240#[doc = "Wake Up interrupt enable register 1"]
3241pub type Wupen1 = crate::RegValueT<Wupen1_SPEC>;
3242
3243impl Wupen1 {
3244    #[doc = "AGT3 Underflow Interrupt Software Standby Return Enable bit"]
3245    #[inline(always)]
3246    pub fn agt3udwupen(
3247        self,
3248    ) -> crate::common::RegisterField<
3249        0,
3250        0x1,
3251        1,
3252        0,
3253        wupen1::Agt3Udwupen,
3254        wupen1::Agt3Udwupen,
3255        Wupen1_SPEC,
3256        crate::common::RW,
3257    > {
3258        crate::common::RegisterField::<
3259            0,
3260            0x1,
3261            1,
3262            0,
3263            wupen1::Agt3Udwupen,
3264            wupen1::Agt3Udwupen,
3265            Wupen1_SPEC,
3266            crate::common::RW,
3267        >::from_register(self, 0)
3268    }
3269
3270    #[doc = "AGT3 Compare Match A Interrupt Software Standby Return Enable bit"]
3271    #[inline(always)]
3272    pub fn agt3cawupen(
3273        self,
3274    ) -> crate::common::RegisterField<
3275        1,
3276        0x1,
3277        1,
3278        0,
3279        wupen1::Agt3Cawupen,
3280        wupen1::Agt3Cawupen,
3281        Wupen1_SPEC,
3282        crate::common::RW,
3283    > {
3284        crate::common::RegisterField::<
3285            1,
3286            0x1,
3287            1,
3288            0,
3289            wupen1::Agt3Cawupen,
3290            wupen1::Agt3Cawupen,
3291            Wupen1_SPEC,
3292            crate::common::RW,
3293        >::from_register(self, 0)
3294    }
3295
3296    #[doc = "AGT3 Compare Match B Interrupt Software Standby Return Enable bit"]
3297    #[inline(always)]
3298    pub fn agt3cbwupen(
3299        self,
3300    ) -> crate::common::RegisterField<
3301        2,
3302        0x1,
3303        1,
3304        0,
3305        wupen1::Agt3Cbwupen,
3306        wupen1::Agt3Cbwupen,
3307        Wupen1_SPEC,
3308        crate::common::RW,
3309    > {
3310        crate::common::RegisterField::<
3311            2,
3312            0x1,
3313            1,
3314            0,
3315            wupen1::Agt3Cbwupen,
3316            wupen1::Agt3Cbwupen,
3317            Wupen1_SPEC,
3318            crate::common::RW,
3319        >::from_register(self, 0)
3320    }
3321}
3322impl ::core::default::Default for Wupen1 {
3323    #[inline(always)]
3324    fn default() -> Wupen1 {
3325        <crate::RegValueT<Wupen1_SPEC> as RegisterValue<_>>::new(0)
3326    }
3327}
3328pub mod wupen1 {
3329
3330    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3331    pub struct Agt3Udwupen_SPEC;
3332    pub type Agt3Udwupen = crate::EnumBitfieldStruct<u8, Agt3Udwupen_SPEC>;
3333    impl Agt3Udwupen {
3334        #[doc = "Software standby returns by AGT3 underflow interrupt is disabled"]
3335        pub const _0: Self = Self::new(0);
3336
3337        #[doc = "Software standby returns by AGT3 underflow interrupt is enabled"]
3338        pub const _1: Self = Self::new(1);
3339    }
3340    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3341    pub struct Agt3Cawupen_SPEC;
3342    pub type Agt3Cawupen = crate::EnumBitfieldStruct<u8, Agt3Cawupen_SPEC>;
3343    impl Agt3Cawupen {
3344        #[doc = "Software standby returns by AGT3 compare match A interrupt is disabled"]
3345        pub const _0: Self = Self::new(0);
3346
3347        #[doc = "Software standby returns by AGT3 compare match A interrupt is enabled"]
3348        pub const _1: Self = Self::new(1);
3349    }
3350    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3351    pub struct Agt3Cbwupen_SPEC;
3352    pub type Agt3Cbwupen = crate::EnumBitfieldStruct<u8, Agt3Cbwupen_SPEC>;
3353    impl Agt3Cbwupen {
3354        #[doc = "Software standby returns by AGT3 compare match B interrupt is disabled"]
3355        pub const _0: Self = Self::new(0);
3356
3357        #[doc = "Software standby returns by AGT3 compare match B interrupt is enabled"]
3358        pub const _1: Self = Self::new(1);
3359    }
3360}
3361#[doc(hidden)]
3362#[derive(Copy, Clone, Eq, PartialEq)]
3363pub struct Selsr0_SPEC;
3364impl crate::sealed::RegSpec for Selsr0_SPEC {
3365    type DataType = u16;
3366}
3367
3368#[doc = "SYS Event Link Setting Register"]
3369pub type Selsr0 = crate::RegValueT<Selsr0_SPEC>;
3370
3371impl NoBitfieldReg<Selsr0_SPEC> for Selsr0 {}
3372impl ::core::default::Default for Selsr0 {
3373    #[inline(always)]
3374    fn default() -> Selsr0 {
3375        <crate::RegValueT<Selsr0_SPEC> as RegisterValue<_>>::new(0)
3376    }
3377}
3378
3379#[doc(hidden)]
3380#[derive(Copy, Clone, Eq, PartialEq)]
3381pub struct Delsr_SPEC;
3382impl crate::sealed::RegSpec for Delsr_SPEC {
3383    type DataType = u32;
3384}
3385
3386#[doc = "DMAC Event Link Setting Register %s"]
3387pub type Delsr = crate::RegValueT<Delsr_SPEC>;
3388
3389impl Delsr {
3390    #[doc = "DMAC Event Link Select"]
3391    #[inline(always)]
3392    pub fn dels(
3393        self,
3394    ) -> crate::common::RegisterField<
3395        0,
3396        0x1ff,
3397        1,
3398        0,
3399        delsr::Dels,
3400        delsr::Dels,
3401        Delsr_SPEC,
3402        crate::common::RW,
3403    > {
3404        crate::common::RegisterField::<
3405            0,
3406            0x1ff,
3407            1,
3408            0,
3409            delsr::Dels,
3410            delsr::Dels,
3411            Delsr_SPEC,
3412            crate::common::RW,
3413        >::from_register(self, 0)
3414    }
3415
3416    #[doc = "DMAC Activation Request Status Flag"]
3417    #[inline(always)]
3418    pub fn ir(
3419        self,
3420    ) -> crate::common::RegisterField<
3421        16,
3422        0x1,
3423        1,
3424        0,
3425        delsr::Ir,
3426        delsr::Ir,
3427        Delsr_SPEC,
3428        crate::common::RW,
3429    > {
3430        crate::common::RegisterField::<
3431            16,
3432            0x1,
3433            1,
3434            0,
3435            delsr::Ir,
3436            delsr::Ir,
3437            Delsr_SPEC,
3438            crate::common::RW,
3439        >::from_register(self, 0)
3440    }
3441}
3442impl ::core::default::Default for Delsr {
3443    #[inline(always)]
3444    fn default() -> Delsr {
3445        <crate::RegValueT<Delsr_SPEC> as RegisterValue<_>>::new(0)
3446    }
3447}
3448pub mod delsr {
3449
3450    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3451    pub struct Dels_SPEC;
3452    pub type Dels = crate::EnumBitfieldStruct<u8, Dels_SPEC>;
3453    impl Dels {
3454        #[doc = "Disable interrupts to the associated DMAC module."]
3455        pub const _0_X_00: Self = Self::new(0);
3456    }
3457    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3458    pub struct Ir_SPEC;
3459    pub type Ir = crate::EnumBitfieldStruct<u8, Ir_SPEC>;
3460    impl Ir {
3461        #[doc = "No DMAC activation request occurred."]
3462        pub const _0: Self = Self::new(0);
3463
3464        #[doc = "DMAC activation request occurred."]
3465        pub const _1: Self = Self::new(1);
3466    }
3467}
3468#[doc(hidden)]
3469#[derive(Copy, Clone, Eq, PartialEq)]
3470pub struct Ielsr_SPEC;
3471impl crate::sealed::RegSpec for Ielsr_SPEC {
3472    type DataType = u32;
3473}
3474
3475#[doc = "ICU Event Link Setting Register %s"]
3476pub type Ielsr = crate::RegValueT<Ielsr_SPEC>;
3477
3478impl NoBitfieldReg<Ielsr_SPEC> for Ielsr {}
3479impl ::core::default::Default for Ielsr {
3480    #[inline(always)]
3481    fn default() -> Ielsr {
3482        <crate::RegValueT<Ielsr_SPEC> as RegisterValue<_>>::new(0)
3483    }
3484}
ra4m3_pac/icu.rs

ra4m3_pac/
icu.rs
