1#[doc = "Register `MSTPCRA` reader"]
2pub struct R(crate::R<MSTPCRA_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MSTPCRA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MSTPCRA_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MSTPCRA_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MSTPCRA` writer"]
17pub struct W(crate::W<MSTPCRA_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MSTPCRA_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MSTPCRA_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MSTPCRA_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MSTPA0` reader - SRAM0 Module Stop"]
38pub type MSTPA0_R = crate::BitReader<MSTPA0_A>;
39#[doc = "SRAM0 Module Stop\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum MSTPA0_A {
42 #[doc = "0: Cancel the module-stop state"]
43 _0 = 0,
44 #[doc = "1: Enter the module-stop state"]
45 _1 = 1,
46}
47impl From<MSTPA0_A> for bool {
48 #[inline(always)]
49 fn from(variant: MSTPA0_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl MSTPA0_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> MSTPA0_A {
57 match self.bits {
58 false => MSTPA0_A::_0,
59 true => MSTPA0_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == MSTPA0_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == MSTPA0_A::_1
71 }
72}
73#[doc = "Field `MSTPA0` writer - SRAM0 Module Stop"]
74pub type MSTPA0_W<'a, const O: u8> = crate::BitWriter<'a, u32, MSTPCRA_SPEC, MSTPA0_A, O>;
75impl<'a, const O: u8> MSTPA0_W<'a, O> {
76 #[doc = "Cancel the module-stop state"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(MSTPA0_A::_0)
80 }
81 #[doc = "Enter the module-stop state"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(MSTPA0_A::_1)
85 }
86}
87#[doc = "Field `MSTPA7` reader - Standby SRAM Module Stop"]
88pub type MSTPA7_R = crate::BitReader<MSTPA7_A>;
89#[doc = "Standby SRAM Module Stop\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum MSTPA7_A {
92 #[doc = "0: Cancel the module-stop state"]
93 _0 = 0,
94 #[doc = "1: Enter the module-stop state"]
95 _1 = 1,
96}
97impl From<MSTPA7_A> for bool {
98 #[inline(always)]
99 fn from(variant: MSTPA7_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl MSTPA7_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> MSTPA7_A {
107 match self.bits {
108 false => MSTPA7_A::_0,
109 true => MSTPA7_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == MSTPA7_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == MSTPA7_A::_1
121 }
122}
123#[doc = "Field `MSTPA7` writer - Standby SRAM Module Stop"]
124pub type MSTPA7_W<'a, const O: u8> = crate::BitWriter<'a, u32, MSTPCRA_SPEC, MSTPA7_A, O>;
125impl<'a, const O: u8> MSTPA7_W<'a, O> {
126 #[doc = "Cancel the module-stop state"]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(MSTPA7_A::_0)
130 }
131 #[doc = "Enter the module-stop state"]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(MSTPA7_A::_1)
135 }
136}
137#[doc = "Field `MSTPA22` reader - DMA Controller/Data Transfer Controller Module Stop"]
138pub type MSTPA22_R = crate::BitReader<MSTPA22_A>;
139#[doc = "DMA Controller/Data Transfer Controller Module Stop\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum MSTPA22_A {
142 #[doc = "0: Cancel the module-stop state"]
143 _0 = 0,
144 #[doc = "1: Enter the module-stop state"]
145 _1 = 1,
146}
147impl From<MSTPA22_A> for bool {
148 #[inline(always)]
149 fn from(variant: MSTPA22_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl MSTPA22_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> MSTPA22_A {
157 match self.bits {
158 false => MSTPA22_A::_0,
159 true => MSTPA22_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == MSTPA22_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == MSTPA22_A::_1
171 }
172}
173#[doc = "Field `MSTPA22` writer - DMA Controller/Data Transfer Controller Module Stop"]
174pub type MSTPA22_W<'a, const O: u8> = crate::BitWriter<'a, u32, MSTPCRA_SPEC, MSTPA22_A, O>;
175impl<'a, const O: u8> MSTPA22_W<'a, O> {
176 #[doc = "Cancel the module-stop state"]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(MSTPA22_A::_0)
180 }
181 #[doc = "Enter the module-stop state"]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(MSTPA22_A::_1)
185 }
186}
187impl R {
188 #[doc = "Bit 0 - SRAM0 Module Stop"]
189 #[inline(always)]
190 pub fn mstpa0(&self) -> MSTPA0_R {
191 MSTPA0_R::new((self.bits & 1) != 0)
192 }
193 #[doc = "Bit 7 - Standby SRAM Module Stop"]
194 #[inline(always)]
195 pub fn mstpa7(&self) -> MSTPA7_R {
196 MSTPA7_R::new(((self.bits >> 7) & 1) != 0)
197 }
198 #[doc = "Bit 22 - DMA Controller/Data Transfer Controller Module Stop"]
199 #[inline(always)]
200 pub fn mstpa22(&self) -> MSTPA22_R {
201 MSTPA22_R::new(((self.bits >> 22) & 1) != 0)
202 }
203}
204impl W {
205 #[doc = "Bit 0 - SRAM0 Module Stop"]
206 #[inline(always)]
207 #[must_use]
208 pub fn mstpa0(&mut self) -> MSTPA0_W<0> {
209 MSTPA0_W::new(self)
210 }
211 #[doc = "Bit 7 - Standby SRAM Module Stop"]
212 #[inline(always)]
213 #[must_use]
214 pub fn mstpa7(&mut self) -> MSTPA7_W<7> {
215 MSTPA7_W::new(self)
216 }
217 #[doc = "Bit 22 - DMA Controller/Data Transfer Controller Module Stop"]
218 #[inline(always)]
219 #[must_use]
220 pub fn mstpa22(&mut self) -> MSTPA22_W<22> {
221 MSTPA22_W::new(self)
222 }
223 #[doc = "Writes raw bits to the register."]
224 #[inline(always)]
225 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
226 self.0.bits(bits);
227 self
228 }
229}
230#[doc = "Module Stop Control Register A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mstpcra](index.html) module"]
231pub struct MSTPCRA_SPEC;
232impl crate::RegisterSpec for MSTPCRA_SPEC {
233 type Ux = u32;
234}
235#[doc = "`read()` method returns [mstpcra::R](R) reader structure"]
236impl crate::Readable for MSTPCRA_SPEC {
237 type Reader = R;
238}
239#[doc = "`write(|w| ..)` method takes [mstpcra::W](W) writer structure"]
240impl crate::Writable for MSTPCRA_SPEC {
241 type Writer = W;
242 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
243 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244}
245#[doc = "`reset()` method sets MSTPCRA to value 0xffbf_ff7e"]
246impl crate::Resettable for MSTPCRA_SPEC {
247 const RESET_VALUE: Self::Ux = 0xffbf_ff7e;
248}