ra4m2/usbfs/
intenb1.rs

1#[doc = "Register `INTENB1` reader"]
2pub struct R(crate::R<INTENB1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTENB1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTENB1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTENB1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `INTENB1` writer"]
17pub struct W(crate::W<INTENB1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<INTENB1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<INTENB1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<INTENB1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PDDETINTE` reader - PDDETINT Detection Interrupt Request Enable"]
38pub type PDDETINTE_R = crate::BitReader<PDDETINTE_A>;
39#[doc = "PDDETINT Detection Interrupt Request Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum PDDETINTE_A {
42    #[doc = "0: Disable interrupt request"]
43    _0 = 0,
44    #[doc = "1: Enable interrupt request"]
45    _1 = 1,
46}
47impl From<PDDETINTE_A> for bool {
48    #[inline(always)]
49    fn from(variant: PDDETINTE_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl PDDETINTE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> PDDETINTE_A {
57        match self.bits {
58            false => PDDETINTE_A::_0,
59            true => PDDETINTE_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == PDDETINTE_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == PDDETINTE_A::_1
71    }
72}
73#[doc = "Field `PDDETINTE` writer - PDDETINT Detection Interrupt Request Enable"]
74pub type PDDETINTE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, PDDETINTE_A, O>;
75impl<'a, const O: u8> PDDETINTE_W<'a, O> {
76    #[doc = "Disable interrupt request"]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(PDDETINTE_A::_0)
80    }
81    #[doc = "Enable interrupt request"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(PDDETINTE_A::_1)
85    }
86}
87#[doc = "Field `SACKE` reader - Setup Transaction Normal Response Interrupt Enable"]
88pub type SACKE_R = crate::BitReader<SACKE_A>;
89#[doc = "Setup Transaction Normal Response Interrupt Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum SACKE_A {
92    #[doc = "0: Disable interrupt request"]
93    _0 = 0,
94    #[doc = "1: Enable interrupt request"]
95    _1 = 1,
96}
97impl From<SACKE_A> for bool {
98    #[inline(always)]
99    fn from(variant: SACKE_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl SACKE_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> SACKE_A {
107        match self.bits {
108            false => SACKE_A::_0,
109            true => SACKE_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == SACKE_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == SACKE_A::_1
121    }
122}
123#[doc = "Field `SACKE` writer - Setup Transaction Normal Response Interrupt Enable"]
124pub type SACKE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, SACKE_A, O>;
125impl<'a, const O: u8> SACKE_W<'a, O> {
126    #[doc = "Disable interrupt request"]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(SACKE_A::_0)
130    }
131    #[doc = "Enable interrupt request"]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(SACKE_A::_1)
135    }
136}
137#[doc = "Field `SIGNE` reader - Setup Transaction Error Interrupt Enable"]
138pub type SIGNE_R = crate::BitReader<SIGNE_A>;
139#[doc = "Setup Transaction Error Interrupt Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum SIGNE_A {
142    #[doc = "0: Disable interrupt request"]
143    _0 = 0,
144    #[doc = "1: Enable interrupt request"]
145    _1 = 1,
146}
147impl From<SIGNE_A> for bool {
148    #[inline(always)]
149    fn from(variant: SIGNE_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl SIGNE_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> SIGNE_A {
157        match self.bits {
158            false => SIGNE_A::_0,
159            true => SIGNE_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == SIGNE_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == SIGNE_A::_1
171    }
172}
173#[doc = "Field `SIGNE` writer - Setup Transaction Error Interrupt Enable"]
174pub type SIGNE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, SIGNE_A, O>;
175impl<'a, const O: u8> SIGNE_W<'a, O> {
176    #[doc = "Disable interrupt request"]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(SIGNE_A::_0)
180    }
181    #[doc = "Enable interrupt request"]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(SIGNE_A::_1)
185    }
186}
187#[doc = "Field `EOFERRE` reader - EOF Error Detection Interrupt Enable"]
188pub type EOFERRE_R = crate::BitReader<EOFERRE_A>;
189#[doc = "EOF Error Detection Interrupt Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum EOFERRE_A {
192    #[doc = "0: Disable interrupt request"]
193    _0 = 0,
194    #[doc = "1: Enable interrupt request"]
195    _1 = 1,
196}
197impl From<EOFERRE_A> for bool {
198    #[inline(always)]
199    fn from(variant: EOFERRE_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl EOFERRE_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> EOFERRE_A {
207        match self.bits {
208            false => EOFERRE_A::_0,
209            true => EOFERRE_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == EOFERRE_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == EOFERRE_A::_1
221    }
222}
223#[doc = "Field `EOFERRE` writer - EOF Error Detection Interrupt Enable"]
224pub type EOFERRE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, EOFERRE_A, O>;
225impl<'a, const O: u8> EOFERRE_W<'a, O> {
226    #[doc = "Disable interrupt request"]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(EOFERRE_A::_0)
230    }
231    #[doc = "Enable interrupt request"]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(EOFERRE_A::_1)
235    }
236}
237#[doc = "Field `ATTCHE` reader - Connection Detection Interrupt Enable"]
238pub type ATTCHE_R = crate::BitReader<ATTCHE_A>;
239#[doc = "Connection Detection Interrupt Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum ATTCHE_A {
242    #[doc = "0: Disable interrupt request"]
243    _0 = 0,
244    #[doc = "1: Enable interrupt request"]
245    _1 = 1,
246}
247impl From<ATTCHE_A> for bool {
248    #[inline(always)]
249    fn from(variant: ATTCHE_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl ATTCHE_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> ATTCHE_A {
257        match self.bits {
258            false => ATTCHE_A::_0,
259            true => ATTCHE_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == ATTCHE_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == ATTCHE_A::_1
271    }
272}
273#[doc = "Field `ATTCHE` writer - Connection Detection Interrupt Enable"]
274pub type ATTCHE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, ATTCHE_A, O>;
275impl<'a, const O: u8> ATTCHE_W<'a, O> {
276    #[doc = "Disable interrupt request"]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(ATTCHE_A::_0)
280    }
281    #[doc = "Enable interrupt request"]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(ATTCHE_A::_1)
285    }
286}
287#[doc = "Field `DTCHE` reader - Disconnection Detection Interrupt Enable"]
288pub type DTCHE_R = crate::BitReader<DTCHE_A>;
289#[doc = "Disconnection Detection Interrupt Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum DTCHE_A {
292    #[doc = "0: Disable interrupt request"]
293    _0 = 0,
294    #[doc = "1: Enable interrupt request"]
295    _1 = 1,
296}
297impl From<DTCHE_A> for bool {
298    #[inline(always)]
299    fn from(variant: DTCHE_A) -> Self {
300        variant as u8 != 0
301    }
302}
303impl DTCHE_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> DTCHE_A {
307        match self.bits {
308            false => DTCHE_A::_0,
309            true => DTCHE_A::_1,
310        }
311    }
312    #[doc = "Checks if the value of the field is `_0`"]
313    #[inline(always)]
314    pub fn is_0(&self) -> bool {
315        *self == DTCHE_A::_0
316    }
317    #[doc = "Checks if the value of the field is `_1`"]
318    #[inline(always)]
319    pub fn is_1(&self) -> bool {
320        *self == DTCHE_A::_1
321    }
322}
323#[doc = "Field `DTCHE` writer - Disconnection Detection Interrupt Enable"]
324pub type DTCHE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, DTCHE_A, O>;
325impl<'a, const O: u8> DTCHE_W<'a, O> {
326    #[doc = "Disable interrupt request"]
327    #[inline(always)]
328    pub fn _0(self) -> &'a mut W {
329        self.variant(DTCHE_A::_0)
330    }
331    #[doc = "Enable interrupt request"]
332    #[inline(always)]
333    pub fn _1(self) -> &'a mut W {
334        self.variant(DTCHE_A::_1)
335    }
336}
337#[doc = "Field `BCHGE` reader - USB Bus Change Interrupt Enable"]
338pub type BCHGE_R = crate::BitReader<BCHGE_A>;
339#[doc = "USB Bus Change Interrupt Enable\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum BCHGE_A {
342    #[doc = "0: Disable interrupt request"]
343    _0 = 0,
344    #[doc = "1: Enable interrupt request"]
345    _1 = 1,
346}
347impl From<BCHGE_A> for bool {
348    #[inline(always)]
349    fn from(variant: BCHGE_A) -> Self {
350        variant as u8 != 0
351    }
352}
353impl BCHGE_R {
354    #[doc = "Get enumerated values variant"]
355    #[inline(always)]
356    pub fn variant(&self) -> BCHGE_A {
357        match self.bits {
358            false => BCHGE_A::_0,
359            true => BCHGE_A::_1,
360        }
361    }
362    #[doc = "Checks if the value of the field is `_0`"]
363    #[inline(always)]
364    pub fn is_0(&self) -> bool {
365        *self == BCHGE_A::_0
366    }
367    #[doc = "Checks if the value of the field is `_1`"]
368    #[inline(always)]
369    pub fn is_1(&self) -> bool {
370        *self == BCHGE_A::_1
371    }
372}
373#[doc = "Field `BCHGE` writer - USB Bus Change Interrupt Enable"]
374pub type BCHGE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, BCHGE_A, O>;
375impl<'a, const O: u8> BCHGE_W<'a, O> {
376    #[doc = "Disable interrupt request"]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(BCHGE_A::_0)
380    }
381    #[doc = "Enable interrupt request"]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(BCHGE_A::_1)
385    }
386}
387#[doc = "Field `OVRCRE` reader - Overcurrent Input Change Interrupt Enable"]
388pub type OVRCRE_R = crate::BitReader<OVRCRE_A>;
389#[doc = "Overcurrent Input Change Interrupt Enable\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum OVRCRE_A {
392    #[doc = "0: Disable interrupt request"]
393    _0 = 0,
394    #[doc = "1: Enable interrupt request"]
395    _1 = 1,
396}
397impl From<OVRCRE_A> for bool {
398    #[inline(always)]
399    fn from(variant: OVRCRE_A) -> Self {
400        variant as u8 != 0
401    }
402}
403impl OVRCRE_R {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub fn variant(&self) -> OVRCRE_A {
407        match self.bits {
408            false => OVRCRE_A::_0,
409            true => OVRCRE_A::_1,
410        }
411    }
412    #[doc = "Checks if the value of the field is `_0`"]
413    #[inline(always)]
414    pub fn is_0(&self) -> bool {
415        *self == OVRCRE_A::_0
416    }
417    #[doc = "Checks if the value of the field is `_1`"]
418    #[inline(always)]
419    pub fn is_1(&self) -> bool {
420        *self == OVRCRE_A::_1
421    }
422}
423#[doc = "Field `OVRCRE` writer - Overcurrent Input Change Interrupt Enable"]
424pub type OVRCRE_W<'a, const O: u8> = crate::BitWriter<'a, u16, INTENB1_SPEC, OVRCRE_A, O>;
425impl<'a, const O: u8> OVRCRE_W<'a, O> {
426    #[doc = "Disable interrupt request"]
427    #[inline(always)]
428    pub fn _0(self) -> &'a mut W {
429        self.variant(OVRCRE_A::_0)
430    }
431    #[doc = "Enable interrupt request"]
432    #[inline(always)]
433    pub fn _1(self) -> &'a mut W {
434        self.variant(OVRCRE_A::_1)
435    }
436}
437impl R {
438    #[doc = "Bit 0 - PDDETINT Detection Interrupt Request Enable"]
439    #[inline(always)]
440    pub fn pddetinte(&self) -> PDDETINTE_R {
441        PDDETINTE_R::new((self.bits & 1) != 0)
442    }
443    #[doc = "Bit 4 - Setup Transaction Normal Response Interrupt Enable"]
444    #[inline(always)]
445    pub fn sacke(&self) -> SACKE_R {
446        SACKE_R::new(((self.bits >> 4) & 1) != 0)
447    }
448    #[doc = "Bit 5 - Setup Transaction Error Interrupt Enable"]
449    #[inline(always)]
450    pub fn signe(&self) -> SIGNE_R {
451        SIGNE_R::new(((self.bits >> 5) & 1) != 0)
452    }
453    #[doc = "Bit 6 - EOF Error Detection Interrupt Enable"]
454    #[inline(always)]
455    pub fn eoferre(&self) -> EOFERRE_R {
456        EOFERRE_R::new(((self.bits >> 6) & 1) != 0)
457    }
458    #[doc = "Bit 11 - Connection Detection Interrupt Enable"]
459    #[inline(always)]
460    pub fn attche(&self) -> ATTCHE_R {
461        ATTCHE_R::new(((self.bits >> 11) & 1) != 0)
462    }
463    #[doc = "Bit 12 - Disconnection Detection Interrupt Enable"]
464    #[inline(always)]
465    pub fn dtche(&self) -> DTCHE_R {
466        DTCHE_R::new(((self.bits >> 12) & 1) != 0)
467    }
468    #[doc = "Bit 14 - USB Bus Change Interrupt Enable"]
469    #[inline(always)]
470    pub fn bchge(&self) -> BCHGE_R {
471        BCHGE_R::new(((self.bits >> 14) & 1) != 0)
472    }
473    #[doc = "Bit 15 - Overcurrent Input Change Interrupt Enable"]
474    #[inline(always)]
475    pub fn ovrcre(&self) -> OVRCRE_R {
476        OVRCRE_R::new(((self.bits >> 15) & 1) != 0)
477    }
478}
479impl W {
480    #[doc = "Bit 0 - PDDETINT Detection Interrupt Request Enable"]
481    #[inline(always)]
482    #[must_use]
483    pub fn pddetinte(&mut self) -> PDDETINTE_W<0> {
484        PDDETINTE_W::new(self)
485    }
486    #[doc = "Bit 4 - Setup Transaction Normal Response Interrupt Enable"]
487    #[inline(always)]
488    #[must_use]
489    pub fn sacke(&mut self) -> SACKE_W<4> {
490        SACKE_W::new(self)
491    }
492    #[doc = "Bit 5 - Setup Transaction Error Interrupt Enable"]
493    #[inline(always)]
494    #[must_use]
495    pub fn signe(&mut self) -> SIGNE_W<5> {
496        SIGNE_W::new(self)
497    }
498    #[doc = "Bit 6 - EOF Error Detection Interrupt Enable"]
499    #[inline(always)]
500    #[must_use]
501    pub fn eoferre(&mut self) -> EOFERRE_W<6> {
502        EOFERRE_W::new(self)
503    }
504    #[doc = "Bit 11 - Connection Detection Interrupt Enable"]
505    #[inline(always)]
506    #[must_use]
507    pub fn attche(&mut self) -> ATTCHE_W<11> {
508        ATTCHE_W::new(self)
509    }
510    #[doc = "Bit 12 - Disconnection Detection Interrupt Enable"]
511    #[inline(always)]
512    #[must_use]
513    pub fn dtche(&mut self) -> DTCHE_W<12> {
514        DTCHE_W::new(self)
515    }
516    #[doc = "Bit 14 - USB Bus Change Interrupt Enable"]
517    #[inline(always)]
518    #[must_use]
519    pub fn bchge(&mut self) -> BCHGE_W<14> {
520        BCHGE_W::new(self)
521    }
522    #[doc = "Bit 15 - Overcurrent Input Change Interrupt Enable"]
523    #[inline(always)]
524    #[must_use]
525    pub fn ovrcre(&mut self) -> OVRCRE_W<15> {
526        OVRCRE_W::new(self)
527    }
528    #[doc = "Writes raw bits to the register."]
529    #[inline(always)]
530    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
531        self.0.bits(bits);
532        self
533    }
534}
535#[doc = "Interrupt Enable Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenb1](index.html) module"]
536pub struct INTENB1_SPEC;
537impl crate::RegisterSpec for INTENB1_SPEC {
538    type Ux = u16;
539}
540#[doc = "`read()` method returns [intenb1::R](R) reader structure"]
541impl crate::Readable for INTENB1_SPEC {
542    type Reader = R;
543}
544#[doc = "`write(|w| ..)` method takes [intenb1::W](W) writer structure"]
545impl crate::Writable for INTENB1_SPEC {
546    type Writer = W;
547    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
548    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
549}
550#[doc = "`reset()` method sets INTENB1 to value 0"]
551impl crate::Resettable for INTENB1_SPEC {
552    const RESET_VALUE: Self::Ux = 0;
553}
ra4m2/usbfs/intenb1.rs

ra4m2/usbfs/
intenb1.rs
