1#[doc = "Register `SNZEDCR` reader"]
2pub struct R(crate::R<SNZEDCR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SNZEDCR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SNZEDCR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SNZEDCR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SNZEDCR` writer"]
17pub struct W(crate::W<SNZEDCR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SNZEDCR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SNZEDCR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SNZEDCR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `AGTUNFED` reader - AGT1 Underflow Snooze End Enable"]
38pub type AGTUNFED_R = crate::BitReader<AGTUNFED_A>;
39#[doc = "AGT1 Underflow Snooze End Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum AGTUNFED_A {
42 #[doc = "0: Disable the Snooze End request"]
43 _0 = 0,
44 #[doc = "1: Enable the Snooze End request"]
45 _1 = 1,
46}
47impl From<AGTUNFED_A> for bool {
48 #[inline(always)]
49 fn from(variant: AGTUNFED_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl AGTUNFED_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> AGTUNFED_A {
57 match self.bits {
58 false => AGTUNFED_A::_0,
59 true => AGTUNFED_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == AGTUNFED_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == AGTUNFED_A::_1
71 }
72}
73#[doc = "Field `AGTUNFED` writer - AGT1 Underflow Snooze End Enable"]
74pub type AGTUNFED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, AGTUNFED_A, O>;
75impl<'a, const O: u8> AGTUNFED_W<'a, O> {
76 #[doc = "Disable the Snooze End request"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(AGTUNFED_A::_0)
80 }
81 #[doc = "Enable the Snooze End request"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(AGTUNFED_A::_1)
85 }
86}
87#[doc = "Field `DTCZRED` reader - Last DTC Transmission Completion Snooze End Enable"]
88pub type DTCZRED_R = crate::BitReader<DTCZRED_A>;
89#[doc = "Last DTC Transmission Completion Snooze End Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum DTCZRED_A {
92 #[doc = "0: Disable the Snooze End request"]
93 _0 = 0,
94 #[doc = "1: Enable the Snooze End request"]
95 _1 = 1,
96}
97impl From<DTCZRED_A> for bool {
98 #[inline(always)]
99 fn from(variant: DTCZRED_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl DTCZRED_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> DTCZRED_A {
107 match self.bits {
108 false => DTCZRED_A::_0,
109 true => DTCZRED_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == DTCZRED_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == DTCZRED_A::_1
121 }
122}
123#[doc = "Field `DTCZRED` writer - Last DTC Transmission Completion Snooze End Enable"]
124pub type DTCZRED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, DTCZRED_A, O>;
125impl<'a, const O: u8> DTCZRED_W<'a, O> {
126 #[doc = "Disable the Snooze End request"]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(DTCZRED_A::_0)
130 }
131 #[doc = "Enable the Snooze End request"]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(DTCZRED_A::_1)
135 }
136}
137#[doc = "Field `DTCNZRED` reader - Not Last DTC Transmission Completion Snooze End Enable"]
138pub type DTCNZRED_R = crate::BitReader<DTCNZRED_A>;
139#[doc = "Not Last DTC Transmission Completion Snooze End Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum DTCNZRED_A {
142 #[doc = "0: Disable the Snooze End request"]
143 _0 = 0,
144 #[doc = "1: Enable the Snooze End request"]
145 _1 = 1,
146}
147impl From<DTCNZRED_A> for bool {
148 #[inline(always)]
149 fn from(variant: DTCNZRED_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl DTCNZRED_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> DTCNZRED_A {
157 match self.bits {
158 false => DTCNZRED_A::_0,
159 true => DTCNZRED_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == DTCNZRED_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == DTCNZRED_A::_1
171 }
172}
173#[doc = "Field `DTCNZRED` writer - Not Last DTC Transmission Completion Snooze End Enable"]
174pub type DTCNZRED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, DTCNZRED_A, O>;
175impl<'a, const O: u8> DTCNZRED_W<'a, O> {
176 #[doc = "Disable the Snooze End request"]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(DTCNZRED_A::_0)
180 }
181 #[doc = "Enable the Snooze End request"]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(DTCNZRED_A::_1)
185 }
186}
187#[doc = "Field `AD0MATED` reader - ADC140 Compare Match Snooze End Enable"]
188pub type AD0MATED_R = crate::BitReader<AD0MATED_A>;
189#[doc = "ADC140 Compare Match Snooze End Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum AD0MATED_A {
192 #[doc = "0: Disable the Snooze End request"]
193 _0 = 0,
194 #[doc = "1: Enable the Snooze End request"]
195 _1 = 1,
196}
197impl From<AD0MATED_A> for bool {
198 #[inline(always)]
199 fn from(variant: AD0MATED_A) -> Self {
200 variant as u8 != 0
201 }
202}
203impl AD0MATED_R {
204 #[doc = "Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> AD0MATED_A {
207 match self.bits {
208 false => AD0MATED_A::_0,
209 true => AD0MATED_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == AD0MATED_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == AD0MATED_A::_1
221 }
222}
223#[doc = "Field `AD0MATED` writer - ADC140 Compare Match Snooze End Enable"]
224pub type AD0MATED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, AD0MATED_A, O>;
225impl<'a, const O: u8> AD0MATED_W<'a, O> {
226 #[doc = "Disable the Snooze End request"]
227 #[inline(always)]
228 pub fn _0(self) -> &'a mut W {
229 self.variant(AD0MATED_A::_0)
230 }
231 #[doc = "Enable the Snooze End request"]
232 #[inline(always)]
233 pub fn _1(self) -> &'a mut W {
234 self.variant(AD0MATED_A::_1)
235 }
236}
237#[doc = "Field `AD0UMTED` reader - ADC140 Compare Mismatch Snooze End Enable"]
238pub type AD0UMTED_R = crate::BitReader<AD0UMTED_A>;
239#[doc = "ADC140 Compare Mismatch Snooze End Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum AD0UMTED_A {
242 #[doc = "0: Disable the Snooze End request"]
243 _0 = 0,
244 #[doc = "1: Enable the Snooze End request"]
245 _1 = 1,
246}
247impl From<AD0UMTED_A> for bool {
248 #[inline(always)]
249 fn from(variant: AD0UMTED_A) -> Self {
250 variant as u8 != 0
251 }
252}
253impl AD0UMTED_R {
254 #[doc = "Get enumerated values variant"]
255 #[inline(always)]
256 pub fn variant(&self) -> AD0UMTED_A {
257 match self.bits {
258 false => AD0UMTED_A::_0,
259 true => AD0UMTED_A::_1,
260 }
261 }
262 #[doc = "Checks if the value of the field is `_0`"]
263 #[inline(always)]
264 pub fn is_0(&self) -> bool {
265 *self == AD0UMTED_A::_0
266 }
267 #[doc = "Checks if the value of the field is `_1`"]
268 #[inline(always)]
269 pub fn is_1(&self) -> bool {
270 *self == AD0UMTED_A::_1
271 }
272}
273#[doc = "Field `AD0UMTED` writer - ADC140 Compare Mismatch Snooze End Enable"]
274pub type AD0UMTED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, AD0UMTED_A, O>;
275impl<'a, const O: u8> AD0UMTED_W<'a, O> {
276 #[doc = "Disable the Snooze End request"]
277 #[inline(always)]
278 pub fn _0(self) -> &'a mut W {
279 self.variant(AD0UMTED_A::_0)
280 }
281 #[doc = "Enable the Snooze End request"]
282 #[inline(always)]
283 pub fn _1(self) -> &'a mut W {
284 self.variant(AD0UMTED_A::_1)
285 }
286}
287#[doc = "Field `SCI0UMTED` reader - SCI0 Address Mismatch Snooze End Enable"]
288pub type SCI0UMTED_R = crate::BitReader<SCI0UMTED_A>;
289#[doc = "SCI0 Address Mismatch Snooze End Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum SCI0UMTED_A {
292 #[doc = "0: Disable the Snooze End request"]
293 _0 = 0,
294 #[doc = "1: Enable the Snooze End request"]
295 _1 = 1,
296}
297impl From<SCI0UMTED_A> for bool {
298 #[inline(always)]
299 fn from(variant: SCI0UMTED_A) -> Self {
300 variant as u8 != 0
301 }
302}
303impl SCI0UMTED_R {
304 #[doc = "Get enumerated values variant"]
305 #[inline(always)]
306 pub fn variant(&self) -> SCI0UMTED_A {
307 match self.bits {
308 false => SCI0UMTED_A::_0,
309 true => SCI0UMTED_A::_1,
310 }
311 }
312 #[doc = "Checks if the value of the field is `_0`"]
313 #[inline(always)]
314 pub fn is_0(&self) -> bool {
315 *self == SCI0UMTED_A::_0
316 }
317 #[doc = "Checks if the value of the field is `_1`"]
318 #[inline(always)]
319 pub fn is_1(&self) -> bool {
320 *self == SCI0UMTED_A::_1
321 }
322}
323#[doc = "Field `SCI0UMTED` writer - SCI0 Address Mismatch Snooze End Enable"]
324pub type SCI0UMTED_W<'a, const O: u8> = crate::BitWriter<'a, u8, SNZEDCR_SPEC, SCI0UMTED_A, O>;
325impl<'a, const O: u8> SCI0UMTED_W<'a, O> {
326 #[doc = "Disable the Snooze End request"]
327 #[inline(always)]
328 pub fn _0(self) -> &'a mut W {
329 self.variant(SCI0UMTED_A::_0)
330 }
331 #[doc = "Enable the Snooze End request"]
332 #[inline(always)]
333 pub fn _1(self) -> &'a mut W {
334 self.variant(SCI0UMTED_A::_1)
335 }
336}
337impl R {
338 #[doc = "Bit 0 - AGT1 Underflow Snooze End Enable"]
339 #[inline(always)]
340 pub fn agtunfed(&self) -> AGTUNFED_R {
341 AGTUNFED_R::new((self.bits & 1) != 0)
342 }
343 #[doc = "Bit 1 - Last DTC Transmission Completion Snooze End Enable"]
344 #[inline(always)]
345 pub fn dtczred(&self) -> DTCZRED_R {
346 DTCZRED_R::new(((self.bits >> 1) & 1) != 0)
347 }
348 #[doc = "Bit 2 - Not Last DTC Transmission Completion Snooze End Enable"]
349 #[inline(always)]
350 pub fn dtcnzred(&self) -> DTCNZRED_R {
351 DTCNZRED_R::new(((self.bits >> 2) & 1) != 0)
352 }
353 #[doc = "Bit 3 - ADC140 Compare Match Snooze End Enable"]
354 #[inline(always)]
355 pub fn ad0mated(&self) -> AD0MATED_R {
356 AD0MATED_R::new(((self.bits >> 3) & 1) != 0)
357 }
358 #[doc = "Bit 4 - ADC140 Compare Mismatch Snooze End Enable"]
359 #[inline(always)]
360 pub fn ad0umted(&self) -> AD0UMTED_R {
361 AD0UMTED_R::new(((self.bits >> 4) & 1) != 0)
362 }
363 #[doc = "Bit 7 - SCI0 Address Mismatch Snooze End Enable"]
364 #[inline(always)]
365 pub fn sci0umted(&self) -> SCI0UMTED_R {
366 SCI0UMTED_R::new(((self.bits >> 7) & 1) != 0)
367 }
368}
369impl W {
370 #[doc = "Bit 0 - AGT1 Underflow Snooze End Enable"]
371 #[inline(always)]
372 #[must_use]
373 pub fn agtunfed(&mut self) -> AGTUNFED_W<0> {
374 AGTUNFED_W::new(self)
375 }
376 #[doc = "Bit 1 - Last DTC Transmission Completion Snooze End Enable"]
377 #[inline(always)]
378 #[must_use]
379 pub fn dtczred(&mut self) -> DTCZRED_W<1> {
380 DTCZRED_W::new(self)
381 }
382 #[doc = "Bit 2 - Not Last DTC Transmission Completion Snooze End Enable"]
383 #[inline(always)]
384 #[must_use]
385 pub fn dtcnzred(&mut self) -> DTCNZRED_W<2> {
386 DTCNZRED_W::new(self)
387 }
388 #[doc = "Bit 3 - ADC140 Compare Match Snooze End Enable"]
389 #[inline(always)]
390 #[must_use]
391 pub fn ad0mated(&mut self) -> AD0MATED_W<3> {
392 AD0MATED_W::new(self)
393 }
394 #[doc = "Bit 4 - ADC140 Compare Mismatch Snooze End Enable"]
395 #[inline(always)]
396 #[must_use]
397 pub fn ad0umted(&mut self) -> AD0UMTED_W<4> {
398 AD0UMTED_W::new(self)
399 }
400 #[doc = "Bit 7 - SCI0 Address Mismatch Snooze End Enable"]
401 #[inline(always)]
402 #[must_use]
403 pub fn sci0umted(&mut self) -> SCI0UMTED_W<7> {
404 SCI0UMTED_W::new(self)
405 }
406 #[doc = "Writes raw bits to the register."]
407 #[inline(always)]
408 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
409 self.0.bits(bits);
410 self
411 }
412}
413#[doc = "Snooze End Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [snzedcr](index.html) module"]
414pub struct SNZEDCR_SPEC;
415impl crate::RegisterSpec for SNZEDCR_SPEC {
416 type Ux = u8;
417}
418#[doc = "`read()` method returns [snzedcr::R](R) reader structure"]
419impl crate::Readable for SNZEDCR_SPEC {
420 type Reader = R;
421}
422#[doc = "`write(|w| ..)` method takes [snzedcr::W](W) writer structure"]
423impl crate::Writable for SNZEDCR_SPEC {
424 type Writer = W;
425 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
426 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
427}
428#[doc = "`reset()` method sets SNZEDCR to value 0"]
429impl crate::Resettable for SNZEDCR_SPEC {
430 const RESET_VALUE: Self::Ux = 0;
431}