ra4m1_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:49:18 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "ARM 32-bit Cortex-M4F Microcontroller based device, CPU clock up to 48MHz, etc."]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "acmplp")]
31pub mod acmplp;
32#[cfg(feature = "adc140")]
33pub mod adc140;
34#[cfg(feature = "agt0")]
35pub mod agt0;
36#[cfg(feature = "bus")]
37pub mod bus;
38#[cfg(feature = "cac")]
39pub mod cac;
40#[cfg(feature = "can0")]
41pub mod can0;
42#[cfg(feature = "crc")]
43pub mod crc;
44#[cfg(feature = "ctsu")]
45pub mod ctsu;
46#[cfg(feature = "dac12")]
47pub mod dac12;
48#[cfg(feature = "dac8")]
49pub mod dac8;
50#[cfg(feature = "dbg")]
51pub mod dbg;
52#[cfg(feature = "dma")]
53pub mod dma;
54#[cfg(feature = "dmac0")]
55pub mod dmac0;
56#[cfg(feature = "doc")]
57pub mod doc;
58#[cfg(feature = "dtc")]
59pub mod dtc;
60#[cfg(feature = "elc")]
61pub mod elc;
62#[cfg(feature = "fcache")]
63pub mod fcache;
64#[cfg(feature = "gpt162")]
65pub mod gpt162;
66#[cfg(feature = "gpt320")]
67pub mod gpt320;
68#[cfg(feature = "gpt_ops")]
69pub mod gpt_ops;
70#[cfg(feature = "icu")]
71pub mod icu;
72#[cfg(feature = "iic0")]
73pub mod iic0;
74#[cfg(feature = "iic1")]
75pub mod iic1;
76#[cfg(feature = "iwdt")]
77pub mod iwdt;
78#[cfg(feature = "kint")]
79pub mod kint;
80#[cfg(feature = "mmpu")]
81pub mod mmpu;
82#[cfg(feature = "mstp")]
83pub mod mstp;
84#[cfg(feature = "opamp")]
85pub mod opamp;
86#[cfg(feature = "pfs")]
87pub mod pfs;
88#[cfg(feature = "pmisc")]
89pub mod pmisc;
90#[cfg(feature = "poeg")]
91pub mod poeg;
92#[cfg(feature = "port0")]
93pub mod port0;
94#[cfg(feature = "port1")]
95pub mod port1;
96#[cfg(feature = "rtc")]
97pub mod rtc;
98#[cfg(feature = "sci0")]
99pub mod sci0;
100#[cfg(feature = "sci2")]
101pub mod sci2;
102#[cfg(feature = "slcdc")]
103pub mod slcdc;
104#[cfg(feature = "smpu")]
105pub mod smpu;
106#[cfg(feature = "spi0")]
107pub mod spi0;
108#[cfg(feature = "spi1")]
109pub mod spi1;
110#[cfg(feature = "spmon")]
111pub mod spmon;
112#[cfg(feature = "sram")]
113pub mod sram;
114#[cfg(feature = "ssie0")]
115pub mod ssie0;
116#[cfg(feature = "system")]
117pub mod system;
118#[cfg(feature = "tsn")]
119pub mod tsn;
120#[cfg(feature = "usbfs")]
121pub mod usbfs;
122#[cfg(feature = "wdt")]
123pub mod wdt;
124
125#[cfg(feature = "system")]
126#[derive(Copy, Clone, Eq, PartialEq)]
127pub struct System {
128    ptr: *mut u8,
129}
130#[cfg(feature = "system")]
131pub const SYSTEM: self::System = self::System {
132    ptr: 0x4001e000u32 as _,
133};
134#[cfg(feature = "bus")]
135#[derive(Copy, Clone, Eq, PartialEq)]
136pub struct Bus {
137    ptr: *mut u8,
138}
139#[cfg(feature = "bus")]
140pub const BUS: self::Bus = self::Bus {
141    ptr: 0x40003000u32 as _,
142};
143#[cfg(feature = "cac")]
144#[derive(Copy, Clone, Eq, PartialEq)]
145pub struct Cac {
146    ptr: *mut u8,
147}
148#[cfg(feature = "cac")]
149pub const CAC: self::Cac = self::Cac {
150    ptr: 0x40044600u32 as _,
151};
152#[cfg(feature = "can0")]
153#[derive(Copy, Clone, Eq, PartialEq)]
154pub struct Can0 {
155    ptr: *mut u8,
156}
157#[cfg(feature = "can0")]
158pub const CAN0: self::Can0 = self::Can0 {
159    ptr: 0x40050000u32 as _,
160};
161#[cfg(feature = "dbg")]
162#[derive(Copy, Clone, Eq, PartialEq)]
163pub struct Dbg {
164    ptr: *mut u8,
165}
166#[cfg(feature = "dbg")]
167pub const DBG: self::Dbg = self::Dbg {
168    ptr: 0x4001b000u32 as _,
169};
170#[cfg(feature = "crc")]
171#[derive(Copy, Clone, Eq, PartialEq)]
172pub struct Crc {
173    ptr: *mut u8,
174}
175#[cfg(feature = "crc")]
176pub const CRC: self::Crc = self::Crc {
177    ptr: 0x40074000u32 as _,
178};
179#[cfg(feature = "ctsu")]
180#[derive(Copy, Clone, Eq, PartialEq)]
181pub struct Ctsu {
182    ptr: *mut u8,
183}
184#[cfg(feature = "ctsu")]
185pub const CTSU: self::Ctsu = self::Ctsu {
186    ptr: 0x40081000u32 as _,
187};
188#[cfg(feature = "dac12")]
189#[derive(Copy, Clone, Eq, PartialEq)]
190pub struct Dac12 {
191    ptr: *mut u8,
192}
193#[cfg(feature = "dac12")]
194pub const DAC12: self::Dac12 = self::Dac12 {
195    ptr: 0x4005e000u32 as _,
196};
197#[cfg(feature = "dac8")]
198#[derive(Copy, Clone, Eq, PartialEq)]
199pub struct Dac8 {
200    ptr: *mut u8,
201}
202#[cfg(feature = "dac8")]
203pub const DAC8: self::Dac8 = self::Dac8 {
204    ptr: 0x4009e000u32 as _,
205};
206#[cfg(feature = "dmac0")]
207#[derive(Copy, Clone, Eq, PartialEq)]
208pub struct Dmac0 {
209    ptr: *mut u8,
210}
211#[cfg(feature = "dmac0")]
212pub const DMAC0: self::Dmac0 = self::Dmac0 {
213    ptr: 0x40005000u32 as _,
214};
215#[cfg(feature = "dmac1")]
216pub const DMAC1: self::Dmac0 = self::Dmac0 {
217    ptr: 0x40005040u32 as _,
218};
219#[cfg(feature = "dmac2")]
220pub const DMAC2: self::Dmac0 = self::Dmac0 {
221    ptr: 0x40005080u32 as _,
222};
223#[cfg(feature = "dmac3")]
224pub const DMAC3: self::Dmac0 = self::Dmac0 {
225    ptr: 0x400050c0u32 as _,
226};
227#[cfg(feature = "dma")]
228#[derive(Copy, Clone, Eq, PartialEq)]
229pub struct Dma {
230    ptr: *mut u8,
231}
232#[cfg(feature = "dma")]
233pub const DMA: self::Dma = self::Dma {
234    ptr: 0x40005200u32 as _,
235};
236#[cfg(feature = "doc")]
237#[derive(Copy, Clone, Eq, PartialEq)]
238pub struct Doc {
239    ptr: *mut u8,
240}
241#[cfg(feature = "doc")]
242pub const DOC: self::Doc = self::Doc {
243    ptr: 0x40054100u32 as _,
244};
245#[cfg(feature = "dtc")]
246#[derive(Copy, Clone, Eq, PartialEq)]
247pub struct Dtc {
248    ptr: *mut u8,
249}
250#[cfg(feature = "dtc")]
251pub const DTC: self::Dtc = self::Dtc {
252    ptr: 0x40005400u32 as _,
253};
254#[cfg(feature = "elc")]
255#[derive(Copy, Clone, Eq, PartialEq)]
256pub struct Elc {
257    ptr: *mut u8,
258}
259#[cfg(feature = "elc")]
260pub const ELC: self::Elc = self::Elc {
261    ptr: 0x40041000u32 as _,
262};
263#[cfg(feature = "fcache")]
264#[derive(Copy, Clone, Eq, PartialEq)]
265pub struct Fcache {
266    ptr: *mut u8,
267}
268#[cfg(feature = "fcache")]
269pub const FCACHE: self::Fcache = self::Fcache {
270    ptr: 0x4001c000u32 as _,
271};
272#[cfg(feature = "port0")]
273#[derive(Copy, Clone, Eq, PartialEq)]
274pub struct Port0 {
275    ptr: *mut u8,
276}
277#[cfg(feature = "port0")]
278pub const PORT0: self::Port0 = self::Port0 {
279    ptr: 0x40040000u32 as _,
280};
281#[cfg(feature = "port1")]
282#[derive(Copy, Clone, Eq, PartialEq)]
283pub struct Port1 {
284    ptr: *mut u8,
285}
286#[cfg(feature = "port1")]
287pub const PORT1: self::Port1 = self::Port1 {
288    ptr: 0x40040020u32 as _,
289};
290#[cfg(feature = "port2")]
291pub const PORT2: self::Port1 = self::Port1 {
292    ptr: 0x40040040u32 as _,
293};
294#[cfg(feature = "port3")]
295pub const PORT3: self::Port1 = self::Port1 {
296    ptr: 0x40040060u32 as _,
297};
298#[cfg(feature = "port4")]
299pub const PORT4: self::Port1 = self::Port1 {
300    ptr: 0x40040080u32 as _,
301};
302#[cfg(feature = "port5")]
303pub const PORT5: self::Port0 = self::Port0 {
304    ptr: 0x400400a0u32 as _,
305};
306#[cfg(feature = "port6")]
307pub const PORT6: self::Port0 = self::Port0 {
308    ptr: 0x400400c0u32 as _,
309};
310#[cfg(feature = "port7")]
311pub const PORT7: self::Port0 = self::Port0 {
312    ptr: 0x400400e0u32 as _,
313};
314#[cfg(feature = "port8")]
315pub const PORT8: self::Port0 = self::Port0 {
316    ptr: 0x40040100u32 as _,
317};
318#[cfg(feature = "port9")]
319pub const PORT9: self::Port0 = self::Port0 {
320    ptr: 0x40040120u32 as _,
321};
322#[cfg(feature = "pfs")]
323#[derive(Copy, Clone, Eq, PartialEq)]
324pub struct Pfs {
325    ptr: *mut u8,
326}
327#[cfg(feature = "pfs")]
328pub const PFS: self::Pfs = self::Pfs {
329    ptr: 0x40040800u32 as _,
330};
331#[cfg(feature = "pmisc")]
332#[derive(Copy, Clone, Eq, PartialEq)]
333pub struct Pmisc {
334    ptr: *mut u8,
335}
336#[cfg(feature = "pmisc")]
337pub const PMISC: self::Pmisc = self::Pmisc {
338    ptr: 0x40040d00u32 as _,
339};
340#[cfg(feature = "icu")]
341#[derive(Copy, Clone, Eq, PartialEq)]
342pub struct Icu {
343    ptr: *mut u8,
344}
345#[cfg(feature = "icu")]
346pub const ICU: self::Icu = self::Icu {
347    ptr: 0x40006000u32 as _,
348};
349#[cfg(feature = "iic0")]
350#[derive(Copy, Clone, Eq, PartialEq)]
351pub struct Iic0 {
352    ptr: *mut u8,
353}
354#[cfg(feature = "iic0")]
355pub const IIC0: self::Iic0 = self::Iic0 {
356    ptr: 0x40053000u32 as _,
357};
358#[cfg(feature = "iic1")]
359#[derive(Copy, Clone, Eq, PartialEq)]
360pub struct Iic1 {
361    ptr: *mut u8,
362}
363#[cfg(feature = "iic1")]
364pub const IIC1: self::Iic1 = self::Iic1 {
365    ptr: 0x40053100u32 as _,
366};
367#[cfg(feature = "iwdt")]
368#[derive(Copy, Clone, Eq, PartialEq)]
369pub struct Iwdt {
370    ptr: *mut u8,
371}
372#[cfg(feature = "iwdt")]
373pub const IWDT: self::Iwdt = self::Iwdt {
374    ptr: 0x40044400u32 as _,
375};
376#[cfg(feature = "kint")]
377#[derive(Copy, Clone, Eq, PartialEq)]
378pub struct Kint {
379    ptr: *mut u8,
380}
381#[cfg(feature = "kint")]
382pub const KINT: self::Kint = self::Kint {
383    ptr: 0x40080000u32 as _,
384};
385#[cfg(feature = "mstp")]
386#[derive(Copy, Clone, Eq, PartialEq)]
387pub struct Mstp {
388    ptr: *mut u8,
389}
390#[cfg(feature = "mstp")]
391pub const MSTP: self::Mstp = self::Mstp {
392    ptr: 0x40047000u32 as _,
393};
394#[cfg(feature = "mmpu")]
395#[derive(Copy, Clone, Eq, PartialEq)]
396pub struct Mmpu {
397    ptr: *mut u8,
398}
399#[cfg(feature = "mmpu")]
400pub const MMPU: self::Mmpu = self::Mmpu {
401    ptr: 0x40000000u32 as _,
402};
403#[cfg(feature = "smpu")]
404#[derive(Copy, Clone, Eq, PartialEq)]
405pub struct Smpu {
406    ptr: *mut u8,
407}
408#[cfg(feature = "smpu")]
409pub const SMPU: self::Smpu = self::Smpu {
410    ptr: 0x40000c00u32 as _,
411};
412#[cfg(feature = "spmon")]
413#[derive(Copy, Clone, Eq, PartialEq)]
414pub struct Spmon {
415    ptr: *mut u8,
416}
417#[cfg(feature = "spmon")]
418pub const SPMON: self::Spmon = self::Spmon {
419    ptr: 0x40000d00u32 as _,
420};
421#[cfg(feature = "opamp")]
422#[derive(Copy, Clone, Eq, PartialEq)]
423pub struct Opamp {
424    ptr: *mut u8,
425}
426#[cfg(feature = "opamp")]
427pub const OPAMP: self::Opamp = self::Opamp {
428    ptr: 0x40086000u32 as _,
429};
430#[cfg(feature = "poeg")]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct Poeg {
433    ptr: *mut u8,
434}
435#[cfg(feature = "poeg")]
436pub const POEG: self::Poeg = self::Poeg {
437    ptr: 0x40042000u32 as _,
438};
439#[cfg(feature = "sram")]
440#[derive(Copy, Clone, Eq, PartialEq)]
441pub struct Sram {
442    ptr: *mut u8,
443}
444#[cfg(feature = "sram")]
445pub const SRAM: self::Sram = self::Sram {
446    ptr: 0x40002000u32 as _,
447};
448#[cfg(feature = "rtc")]
449#[derive(Copy, Clone, Eq, PartialEq)]
450pub struct Rtc {
451    ptr: *mut u8,
452}
453#[cfg(feature = "rtc")]
454pub const RTC: self::Rtc = self::Rtc {
455    ptr: 0x40044000u32 as _,
456};
457#[cfg(feature = "sci0")]
458#[derive(Copy, Clone, Eq, PartialEq)]
459pub struct Sci0 {
460    ptr: *mut u8,
461}
462#[cfg(feature = "sci0")]
463pub const SCI0: self::Sci0 = self::Sci0 {
464    ptr: 0x40070000u32 as _,
465};
466#[cfg(feature = "sci1")]
467pub const SCI1: self::Sci0 = self::Sci0 {
468    ptr: 0x40070020u32 as _,
469};
470#[cfg(feature = "sci2")]
471#[derive(Copy, Clone, Eq, PartialEq)]
472pub struct Sci2 {
473    ptr: *mut u8,
474}
475#[cfg(feature = "sci2")]
476pub const SCI2: self::Sci2 = self::Sci2 {
477    ptr: 0x40070040u32 as _,
478};
479#[cfg(feature = "sci9")]
480pub const SCI9: self::Sci2 = self::Sci2 {
481    ptr: 0x40070120u32 as _,
482};
483#[cfg(feature = "slcdc")]
484#[derive(Copy, Clone, Eq, PartialEq)]
485pub struct Slcdc {
486    ptr: *mut u8,
487}
488#[cfg(feature = "slcdc")]
489pub const SLCDC: self::Slcdc = self::Slcdc {
490    ptr: 0x40082000u32 as _,
491};
492#[cfg(feature = "spi0")]
493#[derive(Copy, Clone, Eq, PartialEq)]
494pub struct Spi0 {
495    ptr: *mut u8,
496}
497#[cfg(feature = "spi0")]
498pub const SPI0: self::Spi0 = self::Spi0 {
499    ptr: 0x40072000u32 as _,
500};
501#[cfg(feature = "spi1")]
502#[derive(Copy, Clone, Eq, PartialEq)]
503pub struct Spi1 {
504    ptr: *mut u8,
505}
506#[cfg(feature = "spi1")]
507pub const SPI1: self::Spi1 = self::Spi1 {
508    ptr: 0x40072100u32 as _,
509};
510#[cfg(feature = "ssie0")]
511#[derive(Copy, Clone, Eq, PartialEq)]
512pub struct Ssie0 {
513    ptr: *mut u8,
514}
515#[cfg(feature = "ssie0")]
516pub const SSIE0: self::Ssie0 = self::Ssie0 {
517    ptr: 0x4004e000u32 as _,
518};
519#[cfg(feature = "tsn")]
520#[derive(Copy, Clone, Eq, PartialEq)]
521pub struct Tsn {
522    ptr: *mut u8,
523}
524#[cfg(feature = "tsn")]
525pub const TSN: self::Tsn = self::Tsn {
526    ptr: 0x407ec000u32 as _,
527};
528#[cfg(feature = "usbfs")]
529#[derive(Copy, Clone, Eq, PartialEq)]
530pub struct Usbfs {
531    ptr: *mut u8,
532}
533#[cfg(feature = "usbfs")]
534pub const USBFS: self::Usbfs = self::Usbfs {
535    ptr: 0x40090000u32 as _,
536};
537#[cfg(feature = "wdt")]
538#[derive(Copy, Clone, Eq, PartialEq)]
539pub struct Wdt {
540    ptr: *mut u8,
541}
542#[cfg(feature = "wdt")]
543pub const WDT: self::Wdt = self::Wdt {
544    ptr: 0x40044200u32 as _,
545};
546#[cfg(feature = "acmplp")]
547#[derive(Copy, Clone, Eq, PartialEq)]
548pub struct Acmplp {
549    ptr: *mut u8,
550}
551#[cfg(feature = "acmplp")]
552pub const ACMPLP: self::Acmplp = self::Acmplp {
553    ptr: 0x40085e00u32 as _,
554};
555#[cfg(feature = "adc140")]
556#[derive(Copy, Clone, Eq, PartialEq)]
557pub struct Adc140 {
558    ptr: *mut u8,
559}
560#[cfg(feature = "adc140")]
561pub const ADC140: self::Adc140 = self::Adc140 {
562    ptr: 0x4005c000u32 as _,
563};
564#[cfg(feature = "agt0")]
565#[derive(Copy, Clone, Eq, PartialEq)]
566pub struct Agt0 {
567    ptr: *mut u8,
568}
569#[cfg(feature = "agt0")]
570pub const AGT0: self::Agt0 = self::Agt0 {
571    ptr: 0x40084000u32 as _,
572};
573#[cfg(feature = "agt1")]
574pub const AGT1: self::Agt0 = self::Agt0 {
575    ptr: 0x40084100u32 as _,
576};
577#[cfg(feature = "gpt320")]
578#[derive(Copy, Clone, Eq, PartialEq)]
579pub struct Gpt320 {
580    ptr: *mut u8,
581}
582#[cfg(feature = "gpt320")]
583pub const GPT320: self::Gpt320 = self::Gpt320 {
584    ptr: 0x40078000u32 as _,
585};
586#[cfg(feature = "gpt321")]
587pub const GPT321: self::Gpt320 = self::Gpt320 {
588    ptr: 0x40078100u32 as _,
589};
590#[cfg(feature = "gpt162")]
591#[derive(Copy, Clone, Eq, PartialEq)]
592pub struct Gpt162 {
593    ptr: *mut u8,
594}
595#[cfg(feature = "gpt162")]
596pub const GPT162: self::Gpt162 = self::Gpt162 {
597    ptr: 0x40078200u32 as _,
598};
599#[cfg(feature = "gpt163")]
600pub const GPT163: self::Gpt162 = self::Gpt162 {
601    ptr: 0x40078300u32 as _,
602};
603#[cfg(feature = "gpt164")]
604pub const GPT164: self::Gpt162 = self::Gpt162 {
605    ptr: 0x40078400u32 as _,
606};
607#[cfg(feature = "gpt165")]
608pub const GPT165: self::Gpt162 = self::Gpt162 {
609    ptr: 0x40078500u32 as _,
610};
611#[cfg(feature = "gpt166")]
612pub const GPT166: self::Gpt162 = self::Gpt162 {
613    ptr: 0x40078600u32 as _,
614};
615#[cfg(feature = "gpt167")]
616pub const GPT167: self::Gpt162 = self::Gpt162 {
617    ptr: 0x40078700u32 as _,
618};
619#[cfg(feature = "gpt_ops")]
620#[derive(Copy, Clone, Eq, PartialEq)]
621pub struct GptOps {
622    ptr: *mut u8,
623}
624#[cfg(feature = "gpt_ops")]
625pub const GPT_OPS: self::GptOps = self::GptOps {
626    ptr: 0x40078ff0u32 as _,
627};
628
629pub use cortex_m::peripheral::Peripherals as CorePeripherals;
630pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
631#[doc = "Number available in the NVIC for configuring priority"]
632pub const NVIC_PRIO_BITS: u8 = 4;
633#[doc(hidden)]
634pub union Vector {
635    _handler: unsafe extern "C" fn(),
636    _reserved: u32,
637}
638#[cfg(feature = "rt")]
639pub use self::Interrupt as interrupt;
640#[cfg(feature = "rt")]
641pub use cortex_m_rt::interrupt;
642#[cfg(feature = "rt")]
643pub mod interrupt_handlers {
644    unsafe extern "C" {
645        pub fn IEL0();
646        pub fn IEL1();
647        pub fn IEL2();
648        pub fn IEL3();
649        pub fn IEL4();
650        pub fn IEL5();
651        pub fn IEL6();
652        pub fn IEL7();
653        pub fn IEL8();
654        pub fn IEL9();
655        pub fn IEL10();
656        pub fn IEL11();
657        pub fn IEL12();
658        pub fn IEL13();
659        pub fn IEL14();
660        pub fn IEL15();
661        pub fn IEL16();
662        pub fn IEL17();
663        pub fn IEL18();
664        pub fn IEL19();
665        pub fn IEL20();
666        pub fn IEL21();
667        pub fn IEL22();
668        pub fn IEL23();
669        pub fn IEL24();
670        pub fn IEL25();
671        pub fn IEL26();
672        pub fn IEL27();
673        pub fn IEL28();
674        pub fn IEL29();
675        pub fn IEL30();
676        pub fn IEL31();
677    }
678}
679#[cfg(feature = "rt")]
680#[doc(hidden)]
681#[unsafe(link_section = ".vector_table.interrupts")]
682#[unsafe(no_mangle)]
683pub static __INTERRUPTS: [Vector; 32] = [
684    Vector {
685        _handler: interrupt_handlers::IEL0,
686    },
687    Vector {
688        _handler: interrupt_handlers::IEL1,
689    },
690    Vector {
691        _handler: interrupt_handlers::IEL2,
692    },
693    Vector {
694        _handler: interrupt_handlers::IEL3,
695    },
696    Vector {
697        _handler: interrupt_handlers::IEL4,
698    },
699    Vector {
700        _handler: interrupt_handlers::IEL5,
701    },
702    Vector {
703        _handler: interrupt_handlers::IEL6,
704    },
705    Vector {
706        _handler: interrupt_handlers::IEL7,
707    },
708    Vector {
709        _handler: interrupt_handlers::IEL8,
710    },
711    Vector {
712        _handler: interrupt_handlers::IEL9,
713    },
714    Vector {
715        _handler: interrupt_handlers::IEL10,
716    },
717    Vector {
718        _handler: interrupt_handlers::IEL11,
719    },
720    Vector {
721        _handler: interrupt_handlers::IEL12,
722    },
723    Vector {
724        _handler: interrupt_handlers::IEL13,
725    },
726    Vector {
727        _handler: interrupt_handlers::IEL14,
728    },
729    Vector {
730        _handler: interrupt_handlers::IEL15,
731    },
732    Vector {
733        _handler: interrupt_handlers::IEL16,
734    },
735    Vector {
736        _handler: interrupt_handlers::IEL17,
737    },
738    Vector {
739        _handler: interrupt_handlers::IEL18,
740    },
741    Vector {
742        _handler: interrupt_handlers::IEL19,
743    },
744    Vector {
745        _handler: interrupt_handlers::IEL20,
746    },
747    Vector {
748        _handler: interrupt_handlers::IEL21,
749    },
750    Vector {
751        _handler: interrupt_handlers::IEL22,
752    },
753    Vector {
754        _handler: interrupt_handlers::IEL23,
755    },
756    Vector {
757        _handler: interrupt_handlers::IEL24,
758    },
759    Vector {
760        _handler: interrupt_handlers::IEL25,
761    },
762    Vector {
763        _handler: interrupt_handlers::IEL26,
764    },
765    Vector {
766        _handler: interrupt_handlers::IEL27,
767    },
768    Vector {
769        _handler: interrupt_handlers::IEL28,
770    },
771    Vector {
772        _handler: interrupt_handlers::IEL29,
773    },
774    Vector {
775        _handler: interrupt_handlers::IEL30,
776    },
777    Vector {
778        _handler: interrupt_handlers::IEL31,
779    },
780];
781#[doc = "Enumeration of all the interrupts."]
782#[derive(Copy, Clone, Debug, PartialEq, Eq)]
783#[repr(u16)]
784pub enum Interrupt {
785    #[doc = "ICU Interrupt 0"]
786    IEL0 = 0,
787
788    #[doc = "ICU Interrupt 1"]
789    IEL1 = 1,
790
791    #[doc = "ICU Interrupt 2"]
792    IEL2 = 2,
793
794    #[doc = "ICU Interrupt 3"]
795    IEL3 = 3,
796
797    #[doc = "ICU Interrupt 4"]
798    IEL4 = 4,
799
800    #[doc = "ICU Interrupt 5"]
801    IEL5 = 5,
802
803    #[doc = "ICU Interrupt 6"]
804    IEL6 = 6,
805
806    #[doc = "ICU Interrupt 7"]
807    IEL7 = 7,
808
809    #[doc = "ICU Interrupt 8"]
810    IEL8 = 8,
811
812    #[doc = "ICU Interrupt 9"]
813    IEL9 = 9,
814
815    #[doc = "ICU Interrupt 10"]
816    IEL10 = 10,
817
818    #[doc = "ICU Interrupt 11"]
819    IEL11 = 11,
820
821    #[doc = "ICU Interrupt 12"]
822    IEL12 = 12,
823
824    #[doc = "ICU Interrupt 13"]
825    IEL13 = 13,
826
827    #[doc = "ICU Interrupt 14"]
828    IEL14 = 14,
829
830    #[doc = "ICU Interrupt 15"]
831    IEL15 = 15,
832
833    #[doc = "ICU Interrupt 16"]
834    IEL16 = 16,
835
836    #[doc = "ICU Interrupt 17"]
837    IEL17 = 17,
838
839    #[doc = "ICU Interrupt 18"]
840    IEL18 = 18,
841
842    #[doc = "ICU Interrupt 19"]
843    IEL19 = 19,
844
845    #[doc = "ICU Interrupt 20"]
846    IEL20 = 20,
847
848    #[doc = "ICU Interrupt 21"]
849    IEL21 = 21,
850
851    #[doc = "ICU Interrupt 22"]
852    IEL22 = 22,
853
854    #[doc = "ICU Interrupt 23"]
855    IEL23 = 23,
856
857    #[doc = "ICU Interrupt 24"]
858    IEL24 = 24,
859
860    #[doc = "ICU Interrupt 25"]
861    IEL25 = 25,
862
863    #[doc = "ICU Interrupt 26"]
864    IEL26 = 26,
865
866    #[doc = "ICU Interrupt 27"]
867    IEL27 = 27,
868
869    #[doc = "ICU Interrupt 28"]
870    IEL28 = 28,
871
872    #[doc = "ICU Interrupt 29"]
873    IEL29 = 29,
874
875    #[doc = "ICU Interrupt 30"]
876    IEL30 = 30,
877
878    #[doc = "ICU Interrupt 31"]
879    IEL31 = 31,
880}
881unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
882    #[inline(always)]
883    fn number(self) -> u16 {
884        self as u16
885    }
886}
887#[allow(non_snake_case)]
888/// Required for compatibility with RTIC and other frameworks
889pub struct Peripherals {
890    #[cfg(feature = "system")]
891    pub SYSTEM: self::System,
892    #[cfg(feature = "bus")]
893    pub BUS: self::Bus,
894    #[cfg(feature = "cac")]
895    pub CAC: self::Cac,
896    #[cfg(feature = "can0")]
897    pub CAN0: self::Can0,
898    #[cfg(feature = "dbg")]
899    pub DBG: self::Dbg,
900    #[cfg(feature = "crc")]
901    pub CRC: self::Crc,
902    #[cfg(feature = "ctsu")]
903    pub CTSU: self::Ctsu,
904    #[cfg(feature = "dac12")]
905    pub DAC12: self::Dac12,
906    #[cfg(feature = "dac8")]
907    pub DAC8: self::Dac8,
908    #[cfg(feature = "dmac0")]
909    pub DMAC0: self::Dmac0,
910    #[cfg(feature = "dmac1")]
911    pub DMAC1: self::Dmac0,
912    #[cfg(feature = "dmac2")]
913    pub DMAC2: self::Dmac0,
914    #[cfg(feature = "dmac3")]
915    pub DMAC3: self::Dmac0,
916    #[cfg(feature = "dma")]
917    pub DMA: self::Dma,
918    #[cfg(feature = "doc")]
919    pub DOC: self::Doc,
920    #[cfg(feature = "dtc")]
921    pub DTC: self::Dtc,
922    #[cfg(feature = "elc")]
923    pub ELC: self::Elc,
924    #[cfg(feature = "fcache")]
925    pub FCACHE: self::Fcache,
926    #[cfg(feature = "port0")]
927    pub PORT0: self::Port0,
928    #[cfg(feature = "port1")]
929    pub PORT1: self::Port1,
930    #[cfg(feature = "port2")]
931    pub PORT2: self::Port1,
932    #[cfg(feature = "port3")]
933    pub PORT3: self::Port1,
934    #[cfg(feature = "port4")]
935    pub PORT4: self::Port1,
936    #[cfg(feature = "port5")]
937    pub PORT5: self::Port0,
938    #[cfg(feature = "port6")]
939    pub PORT6: self::Port0,
940    #[cfg(feature = "port7")]
941    pub PORT7: self::Port0,
942    #[cfg(feature = "port8")]
943    pub PORT8: self::Port0,
944    #[cfg(feature = "port9")]
945    pub PORT9: self::Port0,
946    #[cfg(feature = "pfs")]
947    pub PFS: self::Pfs,
948    #[cfg(feature = "pmisc")]
949    pub PMISC: self::Pmisc,
950    #[cfg(feature = "icu")]
951    pub ICU: self::Icu,
952    #[cfg(feature = "iic0")]
953    pub IIC0: self::Iic0,
954    #[cfg(feature = "iic1")]
955    pub IIC1: self::Iic1,
956    #[cfg(feature = "iwdt")]
957    pub IWDT: self::Iwdt,
958    #[cfg(feature = "kint")]
959    pub KINT: self::Kint,
960    #[cfg(feature = "mstp")]
961    pub MSTP: self::Mstp,
962    #[cfg(feature = "mmpu")]
963    pub MMPU: self::Mmpu,
964    #[cfg(feature = "smpu")]
965    pub SMPU: self::Smpu,
966    #[cfg(feature = "spmon")]
967    pub SPMON: self::Spmon,
968    #[cfg(feature = "opamp")]
969    pub OPAMP: self::Opamp,
970    #[cfg(feature = "poeg")]
971    pub POEG: self::Poeg,
972    #[cfg(feature = "sram")]
973    pub SRAM: self::Sram,
974    #[cfg(feature = "rtc")]
975    pub RTC: self::Rtc,
976    #[cfg(feature = "sci0")]
977    pub SCI0: self::Sci0,
978    #[cfg(feature = "sci1")]
979    pub SCI1: self::Sci0,
980    #[cfg(feature = "sci2")]
981    pub SCI2: self::Sci2,
982    #[cfg(feature = "sci9")]
983    pub SCI9: self::Sci2,
984    #[cfg(feature = "slcdc")]
985    pub SLCDC: self::Slcdc,
986    #[cfg(feature = "spi0")]
987    pub SPI0: self::Spi0,
988    #[cfg(feature = "spi1")]
989    pub SPI1: self::Spi1,
990    #[cfg(feature = "ssie0")]
991    pub SSIE0: self::Ssie0,
992    #[cfg(feature = "tsn")]
993    pub TSN: self::Tsn,
994    #[cfg(feature = "usbfs")]
995    pub USBFS: self::Usbfs,
996    #[cfg(feature = "wdt")]
997    pub WDT: self::Wdt,
998    #[cfg(feature = "acmplp")]
999    pub ACMPLP: self::Acmplp,
1000    #[cfg(feature = "adc140")]
1001    pub ADC140: self::Adc140,
1002    #[cfg(feature = "agt0")]
1003    pub AGT0: self::Agt0,
1004    #[cfg(feature = "agt1")]
1005    pub AGT1: self::Agt0,
1006    #[cfg(feature = "gpt320")]
1007    pub GPT320: self::Gpt320,
1008    #[cfg(feature = "gpt321")]
1009    pub GPT321: self::Gpt320,
1010    #[cfg(feature = "gpt162")]
1011    pub GPT162: self::Gpt162,
1012    #[cfg(feature = "gpt163")]
1013    pub GPT163: self::Gpt162,
1014    #[cfg(feature = "gpt164")]
1015    pub GPT164: self::Gpt162,
1016    #[cfg(feature = "gpt165")]
1017    pub GPT165: self::Gpt162,
1018    #[cfg(feature = "gpt166")]
1019    pub GPT166: self::Gpt162,
1020    #[cfg(feature = "gpt167")]
1021    pub GPT167: self::Gpt162,
1022    #[cfg(feature = "gpt_ops")]
1023    pub GPT_OPS: self::GptOps,
1024}
1025
1026impl Peripherals {
1027    /// Returns Peripheral struct multiple times
1028    /// Required for compatibility with RTIC and other frameworks
1029    #[inline]
1030    pub fn take() -> Option<Self> {
1031        Some(Self::steal())
1032    }
1033
1034    /// Returns Peripheral struct multiple times
1035    /// Required for compatibility with RTIC and other frameworks
1036    #[inline]
1037    pub fn steal() -> Self {
1038        Peripherals {
1039            #[cfg(feature = "system")]
1040            SYSTEM: crate::SYSTEM,
1041            #[cfg(feature = "bus")]
1042            BUS: crate::BUS,
1043            #[cfg(feature = "cac")]
1044            CAC: crate::CAC,
1045            #[cfg(feature = "can0")]
1046            CAN0: crate::CAN0,
1047            #[cfg(feature = "dbg")]
1048            DBG: crate::DBG,
1049            #[cfg(feature = "crc")]
1050            CRC: crate::CRC,
1051            #[cfg(feature = "ctsu")]
1052            CTSU: crate::CTSU,
1053            #[cfg(feature = "dac12")]
1054            DAC12: crate::DAC12,
1055            #[cfg(feature = "dac8")]
1056            DAC8: crate::DAC8,
1057            #[cfg(feature = "dmac0")]
1058            DMAC0: crate::DMAC0,
1059            #[cfg(feature = "dmac1")]
1060            DMAC1: crate::DMAC1,
1061            #[cfg(feature = "dmac2")]
1062            DMAC2: crate::DMAC2,
1063            #[cfg(feature = "dmac3")]
1064            DMAC3: crate::DMAC3,
1065            #[cfg(feature = "dma")]
1066            DMA: crate::DMA,
1067            #[cfg(feature = "doc")]
1068            DOC: crate::DOC,
1069            #[cfg(feature = "dtc")]
1070            DTC: crate::DTC,
1071            #[cfg(feature = "elc")]
1072            ELC: crate::ELC,
1073            #[cfg(feature = "fcache")]
1074            FCACHE: crate::FCACHE,
1075            #[cfg(feature = "port0")]
1076            PORT0: crate::PORT0,
1077            #[cfg(feature = "port1")]
1078            PORT1: crate::PORT1,
1079            #[cfg(feature = "port2")]
1080            PORT2: crate::PORT2,
1081            #[cfg(feature = "port3")]
1082            PORT3: crate::PORT3,
1083            #[cfg(feature = "port4")]
1084            PORT4: crate::PORT4,
1085            #[cfg(feature = "port5")]
1086            PORT5: crate::PORT5,
1087            #[cfg(feature = "port6")]
1088            PORT6: crate::PORT6,
1089            #[cfg(feature = "port7")]
1090            PORT7: crate::PORT7,
1091            #[cfg(feature = "port8")]
1092            PORT8: crate::PORT8,
1093            #[cfg(feature = "port9")]
1094            PORT9: crate::PORT9,
1095            #[cfg(feature = "pfs")]
1096            PFS: crate::PFS,
1097            #[cfg(feature = "pmisc")]
1098            PMISC: crate::PMISC,
1099            #[cfg(feature = "icu")]
1100            ICU: crate::ICU,
1101            #[cfg(feature = "iic0")]
1102            IIC0: crate::IIC0,
1103            #[cfg(feature = "iic1")]
1104            IIC1: crate::IIC1,
1105            #[cfg(feature = "iwdt")]
1106            IWDT: crate::IWDT,
1107            #[cfg(feature = "kint")]
1108            KINT: crate::KINT,
1109            #[cfg(feature = "mstp")]
1110            MSTP: crate::MSTP,
1111            #[cfg(feature = "mmpu")]
1112            MMPU: crate::MMPU,
1113            #[cfg(feature = "smpu")]
1114            SMPU: crate::SMPU,
1115            #[cfg(feature = "spmon")]
1116            SPMON: crate::SPMON,
1117            #[cfg(feature = "opamp")]
1118            OPAMP: crate::OPAMP,
1119            #[cfg(feature = "poeg")]
1120            POEG: crate::POEG,
1121            #[cfg(feature = "sram")]
1122            SRAM: crate::SRAM,
1123            #[cfg(feature = "rtc")]
1124            RTC: crate::RTC,
1125            #[cfg(feature = "sci0")]
1126            SCI0: crate::SCI0,
1127            #[cfg(feature = "sci1")]
1128            SCI1: crate::SCI1,
1129            #[cfg(feature = "sci2")]
1130            SCI2: crate::SCI2,
1131            #[cfg(feature = "sci9")]
1132            SCI9: crate::SCI9,
1133            #[cfg(feature = "slcdc")]
1134            SLCDC: crate::SLCDC,
1135            #[cfg(feature = "spi0")]
1136            SPI0: crate::SPI0,
1137            #[cfg(feature = "spi1")]
1138            SPI1: crate::SPI1,
1139            #[cfg(feature = "ssie0")]
1140            SSIE0: crate::SSIE0,
1141            #[cfg(feature = "tsn")]
1142            TSN: crate::TSN,
1143            #[cfg(feature = "usbfs")]
1144            USBFS: crate::USBFS,
1145            #[cfg(feature = "wdt")]
1146            WDT: crate::WDT,
1147            #[cfg(feature = "acmplp")]
1148            ACMPLP: crate::ACMPLP,
1149            #[cfg(feature = "adc140")]
1150            ADC140: crate::ADC140,
1151            #[cfg(feature = "agt0")]
1152            AGT0: crate::AGT0,
1153            #[cfg(feature = "agt1")]
1154            AGT1: crate::AGT1,
1155            #[cfg(feature = "gpt320")]
1156            GPT320: crate::GPT320,
1157            #[cfg(feature = "gpt321")]
1158            GPT321: crate::GPT321,
1159            #[cfg(feature = "gpt162")]
1160            GPT162: crate::GPT162,
1161            #[cfg(feature = "gpt163")]
1162            GPT163: crate::GPT163,
1163            #[cfg(feature = "gpt164")]
1164            GPT164: crate::GPT164,
1165            #[cfg(feature = "gpt165")]
1166            GPT165: crate::GPT165,
1167            #[cfg(feature = "gpt166")]
1168            GPT166: crate::GPT166,
1169            #[cfg(feature = "gpt167")]
1170            GPT167: crate::GPT167,
1171            #[cfg(feature = "gpt_ops")]
1172            GPT_OPS: crate::GPT_OPS,
1173        }
1174    }
1175}
ra4m1_pac/lib.rs

ra4m1_pac/
lib.rs
