ra4m1_pac/
fcache.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:49:18 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Flash Cache"]
28unsafe impl ::core::marker::Send for super::Fcache {}
29unsafe impl ::core::marker::Sync for super::Fcache {}
30impl super::Fcache {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Flash Cache Enable Register"]
38    #[inline(always)]
39    pub const fn fcachee(
40        &self,
41    ) -> &'static crate::common::Reg<self::Fcachee_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Fcachee_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(256usize),
45            )
46        }
47    }
48
49    #[doc = "Flash Cache Invalidate Register"]
50    #[inline(always)]
51    pub const fn fcacheiv(
52        &self,
53    ) -> &'static crate::common::Reg<self::Fcacheiv_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Fcacheiv_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(260usize),
57            )
58        }
59    }
60
61    #[doc = "Flash Wait Cycle Register"]
62    #[inline(always)]
63    pub const fn flwt(&self) -> &'static crate::common::Reg<self::Flwt_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Flwt_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(284usize),
67            )
68        }
69    }
70}
71#[doc(hidden)]
72#[derive(Copy, Clone, Eq, PartialEq)]
73pub struct Fcachee_SPEC;
74impl crate::sealed::RegSpec for Fcachee_SPEC {
75    type DataType = u16;
76}
77
78#[doc = "Flash Cache Enable Register"]
79pub type Fcachee = crate::RegValueT<Fcachee_SPEC>;
80
81impl Fcachee {
82    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
83    #[inline(always)]
84    pub fn reserved(
85        self,
86    ) -> crate::common::RegisterField<1, 0x7fff, 1, 0, u16, u16, Fcachee_SPEC, crate::common::RW>
87    {
88        crate::common::RegisterField::<1,0x7fff,1,0,u16,u16,Fcachee_SPEC,crate::common::RW>::from_register(self,0)
89    }
90
91    #[doc = "FCACHE Enable"]
92    #[inline(always)]
93    pub fn fcacheen(
94        self,
95    ) -> crate::common::RegisterField<
96        0,
97        0x1,
98        1,
99        0,
100        fcachee::Fcacheen,
101        fcachee::Fcacheen,
102        Fcachee_SPEC,
103        crate::common::RW,
104    > {
105        crate::common::RegisterField::<
106            0,
107            0x1,
108            1,
109            0,
110            fcachee::Fcacheen,
111            fcachee::Fcacheen,
112            Fcachee_SPEC,
113            crate::common::RW,
114        >::from_register(self, 0)
115    }
116}
117impl ::core::default::Default for Fcachee {
118    #[inline(always)]
119    fn default() -> Fcachee {
120        <crate::RegValueT<Fcachee_SPEC> as RegisterValue<_>>::new(0)
121    }
122}
123pub mod fcachee {
124
125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
126    pub struct Fcacheen_SPEC;
127    pub type Fcacheen = crate::EnumBitfieldStruct<u8, Fcacheen_SPEC>;
128    impl Fcacheen {
129        #[doc = "FCACHE is disabled"]
130        pub const _0: Self = Self::new(0);
131
132        #[doc = "FCACHE is enabled"]
133        pub const _1: Self = Self::new(1);
134    }
135}
136#[doc(hidden)]
137#[derive(Copy, Clone, Eq, PartialEq)]
138pub struct Fcacheiv_SPEC;
139impl crate::sealed::RegSpec for Fcacheiv_SPEC {
140    type DataType = u16;
141}
142
143#[doc = "Flash Cache Invalidate Register"]
144pub type Fcacheiv = crate::RegValueT<Fcacheiv_SPEC>;
145
146impl Fcacheiv {
147    #[doc = "These bits are read as 000000000000000. The write value should be 000000000000000."]
148    #[inline(always)]
149    pub fn reserved(
150        self,
151    ) -> crate::common::RegisterField<1, 0x7fff, 1, 0, u16, u16, Fcacheiv_SPEC, crate::common::RW>
152    {
153        crate::common::RegisterField::<1,0x7fff,1,0,u16,u16,Fcacheiv_SPEC,crate::common::RW>::from_register(self,0)
154    }
155
156    #[doc = "FCACHE Invalidation"]
157    #[inline(always)]
158    pub fn fcacheiv(
159        self,
160    ) -> crate::common::RegisterField<
161        0,
162        0x1,
163        1,
164        0,
165        fcacheiv::Fcacheiv,
166        fcacheiv::Fcacheiv,
167        Fcacheiv_SPEC,
168        crate::common::RW,
169    > {
170        crate::common::RegisterField::<
171            0,
172            0x1,
173            1,
174            0,
175            fcacheiv::Fcacheiv,
176            fcacheiv::Fcacheiv,
177            Fcacheiv_SPEC,
178            crate::common::RW,
179        >::from_register(self, 0)
180    }
181}
182impl ::core::default::Default for Fcacheiv {
183    #[inline(always)]
184    fn default() -> Fcacheiv {
185        <crate::RegValueT<Fcacheiv_SPEC> as RegisterValue<_>>::new(0)
186    }
187}
188pub mod fcacheiv {
189
190    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
191    pub struct Fcacheiv_SPEC;
192    pub type Fcacheiv = crate::EnumBitfieldStruct<u8, Fcacheiv_SPEC>;
193    impl Fcacheiv {
194        #[doc = "(Read)not in progress / (Write) no effect."]
195        pub const _0: Self = Self::new(0);
196
197        #[doc = "(Read)in progress /(Write)  Starting Cache Invalidation"]
198        pub const _1: Self = Self::new(1);
199    }
200}
201#[doc(hidden)]
202#[derive(Copy, Clone, Eq, PartialEq)]
203pub struct Flwt_SPEC;
204impl crate::sealed::RegSpec for Flwt_SPEC {
205    type DataType = u8;
206}
207
208#[doc = "Flash Wait Cycle Register"]
209pub type Flwt = crate::RegValueT<Flwt_SPEC>;
210
211impl Flwt {
212    #[doc = "These bits are read as 00000. The write value should be 00000."]
213    #[inline(always)]
214    pub fn reserved(
215        self,
216    ) -> crate::common::RegisterField<3, 0x1f, 1, 0, u8, u8, Flwt_SPEC, crate::common::RW> {
217        crate::common::RegisterField::<3,0x1f,1,0,u8,u8,Flwt_SPEC,crate::common::RW>::from_register(self,0)
218    }
219
220    #[doc = "These bits represent the ratio of the CPU clock period to the Flash memory access time."]
221    #[inline(always)]
222    pub fn flwt(
223        self,
224    ) -> crate::common::RegisterField<
225        0,
226        0x7,
227        1,
228        0,
229        flwt::Flwt,
230        flwt::Flwt,
231        Flwt_SPEC,
232        crate::common::RW,
233    > {
234        crate::common::RegisterField::<
235            0,
236            0x7,
237            1,
238            0,
239            flwt::Flwt,
240            flwt::Flwt,
241            Flwt_SPEC,
242            crate::common::RW,
243        >::from_register(self, 0)
244    }
245}
246impl ::core::default::Default for Flwt {
247    #[inline(always)]
248    fn default() -> Flwt {
249        <crate::RegValueT<Flwt_SPEC> as RegisterValue<_>>::new(0)
250    }
251}
252pub mod flwt {
253
254    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
255    pub struct Flwt_SPEC;
256    pub type Flwt = crate::EnumBitfieldStruct<u8, Flwt_SPEC>;
257    impl Flwt {
258        #[doc = "zero wait"]
259        pub const _000: Self = Self::new(0);
260
261        #[doc = "Setting prohibited"]
262        pub const OTHERS: Self = Self::new(0);
263    }
264}
ra4m1_pac/fcache.rs

ra4m1_pac/
fcache.rs
