ra4e2_pac/
icu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:48:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Interrupt Controller"]
28unsafe impl ::core::marker::Send for super::Icu {}
29unsafe impl ::core::marker::Sync for super::Icu {}
30impl super::Icu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "IRQ Control Register %s"]
38    #[inline(always)]
39    pub const fn irqcr(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::Irqcr_SPEC, crate::common::RW>,
43        15,
44        0x1,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn irqcr0(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(0x0usize),
55            )
56        }
57    }
58    #[inline(always)]
59    pub const fn irqcr1(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(0x1usize),
63            )
64        }
65    }
66    #[inline(always)]
67    pub const fn irqcr2(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
68        unsafe {
69            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
70                self._svd2pac_as_ptr().add(0x2usize),
71            )
72        }
73    }
74    #[inline(always)]
75    pub const fn irqcr3(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(0x3usize),
79            )
80        }
81    }
82    #[inline(always)]
83    pub const fn irqcr4(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
84        unsafe {
85            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
86                self._svd2pac_as_ptr().add(0x4usize),
87            )
88        }
89    }
90    #[inline(always)]
91    pub const fn irqcr5(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(0x5usize),
95            )
96        }
97    }
98    #[inline(always)]
99    pub const fn irqcr6(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(0x6usize),
103            )
104        }
105    }
106    #[inline(always)]
107    pub const fn irqcr7(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x7usize),
111            )
112        }
113    }
114    #[inline(always)]
115    pub const fn irqcr8(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
116        unsafe {
117            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
118                self._svd2pac_as_ptr().add(0x8usize),
119            )
120        }
121    }
122    #[inline(always)]
123    pub const fn irqcr9(&self) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(0x9usize),
127            )
128        }
129    }
130    #[inline(always)]
131    pub const fn irqcr10(
132        &self,
133    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(0xausize),
137            )
138        }
139    }
140    #[inline(always)]
141    pub const fn irqcr11(
142        &self,
143    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
144        unsafe {
145            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
146                self._svd2pac_as_ptr().add(0xbusize),
147            )
148        }
149    }
150    #[inline(always)]
151    pub const fn irqcr12(
152        &self,
153    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
154        unsafe {
155            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
156                self._svd2pac_as_ptr().add(0xcusize),
157            )
158        }
159    }
160    #[inline(always)]
161    pub const fn irqcr13(
162        &self,
163    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(0xdusize),
167            )
168        }
169    }
170    #[inline(always)]
171    pub const fn irqcr14(
172        &self,
173    ) -> &'static crate::common::Reg<self::Irqcr_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::Irqcr_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(0xeusize),
177            )
178        }
179    }
180
181    #[doc = "NMI Pin Interrupt Control Register"]
182    #[inline(always)]
183    pub const fn nmicr(&self) -> &'static crate::common::Reg<self::Nmicr_SPEC, crate::common::RW> {
184        unsafe {
185            crate::common::Reg::<self::Nmicr_SPEC, crate::common::RW>::from_ptr(
186                self._svd2pac_as_ptr().add(256usize),
187            )
188        }
189    }
190
191    #[doc = "Non-Maskable Interrupt Enable Register"]
192    #[inline(always)]
193    pub const fn nmier(&self) -> &'static crate::common::Reg<self::Nmier_SPEC, crate::common::RW> {
194        unsafe {
195            crate::common::Reg::<self::Nmier_SPEC, crate::common::RW>::from_ptr(
196                self._svd2pac_as_ptr().add(288usize),
197            )
198        }
199    }
200
201    #[doc = "Non-Maskable Interrupt Status Clear Register"]
202    #[inline(always)]
203    pub const fn nmiclr(
204        &self,
205    ) -> &'static crate::common::Reg<self::Nmiclr_SPEC, crate::common::RW> {
206        unsafe {
207            crate::common::Reg::<self::Nmiclr_SPEC, crate::common::RW>::from_ptr(
208                self._svd2pac_as_ptr().add(304usize),
209            )
210        }
211    }
212
213    #[doc = "Non-Maskable Interrupt Status Register"]
214    #[inline(always)]
215    pub const fn nmisr(&self) -> &'static crate::common::Reg<self::Nmisr_SPEC, crate::common::R> {
216        unsafe {
217            crate::common::Reg::<self::Nmisr_SPEC, crate::common::R>::from_ptr(
218                self._svd2pac_as_ptr().add(320usize),
219            )
220        }
221    }
222
223    #[doc = "Wake Up Interrupt Enable Register 0"]
224    #[inline(always)]
225    pub const fn wupen0(
226        &self,
227    ) -> &'static crate::common::Reg<self::Wupen0_SPEC, crate::common::RW> {
228        unsafe {
229            crate::common::Reg::<self::Wupen0_SPEC, crate::common::RW>::from_ptr(
230                self._svd2pac_as_ptr().add(416usize),
231            )
232        }
233    }
234
235    #[doc = "Wake Up Interrupt Enable Register 1"]
236    #[inline(always)]
237    pub const fn wupen1(
238        &self,
239    ) -> &'static crate::common::Reg<self::Wupen1_SPEC, crate::common::RW> {
240        unsafe {
241            crate::common::Reg::<self::Wupen1_SPEC, crate::common::RW>::from_ptr(
242                self._svd2pac_as_ptr().add(420usize),
243            )
244        }
245    }
246
247    #[doc = "SYS Event Link Setting Register"]
248    #[inline(always)]
249    pub const fn selsr0(
250        &self,
251    ) -> &'static crate::common::Reg<self::Selsr0_SPEC, crate::common::RW> {
252        unsafe {
253            crate::common::Reg::<self::Selsr0_SPEC, crate::common::RW>::from_ptr(
254                self._svd2pac_as_ptr().add(512usize),
255            )
256        }
257    }
258
259    #[doc = "DMAC Event Link Setting Register %s"]
260    #[inline(always)]
261    pub const fn delsr(
262        &self,
263    ) -> &'static crate::common::ClusterRegisterArray<
264        crate::common::Reg<self::Delsr_SPEC, crate::common::RW>,
265        8,
266        0x4,
267    > {
268        unsafe {
269            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x280usize))
270        }
271    }
272    #[inline(always)]
273    pub const fn delsr0(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
274        unsafe {
275            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
276                self._svd2pac_as_ptr().add(0x280usize),
277            )
278        }
279    }
280    #[inline(always)]
281    pub const fn delsr1(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(0x284usize),
285            )
286        }
287    }
288    #[inline(always)]
289    pub const fn delsr2(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
290        unsafe {
291            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
292                self._svd2pac_as_ptr().add(0x288usize),
293            )
294        }
295    }
296    #[inline(always)]
297    pub const fn delsr3(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
298        unsafe {
299            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
300                self._svd2pac_as_ptr().add(0x28cusize),
301            )
302        }
303    }
304    #[inline(always)]
305    pub const fn delsr4(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(0x290usize),
309            )
310        }
311    }
312    #[inline(always)]
313    pub const fn delsr5(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(0x294usize),
317            )
318        }
319    }
320    #[inline(always)]
321    pub const fn delsr6(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
322        unsafe {
323            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
324                self._svd2pac_as_ptr().add(0x298usize),
325            )
326        }
327    }
328    #[inline(always)]
329    pub const fn delsr7(&self) -> &'static crate::common::Reg<self::Delsr_SPEC, crate::common::RW> {
330        unsafe {
331            crate::common::Reg::<self::Delsr_SPEC, crate::common::RW>::from_ptr(
332                self._svd2pac_as_ptr().add(0x29cusize),
333            )
334        }
335    }
336
337    #[doc = "ICU Event Link Setting Register %s"]
338    #[inline(always)]
339    pub const fn ielsr(
340        &self,
341    ) -> &'static crate::common::ClusterRegisterArray<
342        crate::common::Reg<self::Ielsr_SPEC, crate::common::RW>,
343        96,
344        0x4,
345    > {
346        unsafe {
347            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x300usize))
348        }
349    }
350    #[inline(always)]
351    pub const fn ielsr0(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
352        unsafe {
353            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
354                self._svd2pac_as_ptr().add(0x300usize),
355            )
356        }
357    }
358    #[inline(always)]
359    pub const fn ielsr1(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(0x304usize),
363            )
364        }
365    }
366    #[inline(always)]
367    pub const fn ielsr2(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(0x308usize),
371            )
372        }
373    }
374    #[inline(always)]
375    pub const fn ielsr3(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
376        unsafe {
377            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
378                self._svd2pac_as_ptr().add(0x30cusize),
379            )
380        }
381    }
382    #[inline(always)]
383    pub const fn ielsr4(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(0x310usize),
387            )
388        }
389    }
390    #[inline(always)]
391    pub const fn ielsr5(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
392        unsafe {
393            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
394                self._svd2pac_as_ptr().add(0x314usize),
395            )
396        }
397    }
398    #[inline(always)]
399    pub const fn ielsr6(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
400        unsafe {
401            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
402                self._svd2pac_as_ptr().add(0x318usize),
403            )
404        }
405    }
406    #[inline(always)]
407    pub const fn ielsr7(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(0x31cusize),
411            )
412        }
413    }
414    #[inline(always)]
415    pub const fn ielsr8(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
416        unsafe {
417            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
418                self._svd2pac_as_ptr().add(0x320usize),
419            )
420        }
421    }
422    #[inline(always)]
423    pub const fn ielsr9(&self) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
424        unsafe {
425            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
426                self._svd2pac_as_ptr().add(0x324usize),
427            )
428        }
429    }
430    #[inline(always)]
431    pub const fn ielsr10(
432        &self,
433    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
434        unsafe {
435            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
436                self._svd2pac_as_ptr().add(0x328usize),
437            )
438        }
439    }
440    #[inline(always)]
441    pub const fn ielsr11(
442        &self,
443    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
444        unsafe {
445            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
446                self._svd2pac_as_ptr().add(0x32cusize),
447            )
448        }
449    }
450    #[inline(always)]
451    pub const fn ielsr12(
452        &self,
453    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
454        unsafe {
455            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
456                self._svd2pac_as_ptr().add(0x330usize),
457            )
458        }
459    }
460    #[inline(always)]
461    pub const fn ielsr13(
462        &self,
463    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
464        unsafe {
465            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
466                self._svd2pac_as_ptr().add(0x334usize),
467            )
468        }
469    }
470    #[inline(always)]
471    pub const fn ielsr14(
472        &self,
473    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(0x338usize),
477            )
478        }
479    }
480    #[inline(always)]
481    pub const fn ielsr15(
482        &self,
483    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
484        unsafe {
485            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
486                self._svd2pac_as_ptr().add(0x33cusize),
487            )
488        }
489    }
490    #[inline(always)]
491    pub const fn ielsr16(
492        &self,
493    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
494        unsafe {
495            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
496                self._svd2pac_as_ptr().add(0x340usize),
497            )
498        }
499    }
500    #[inline(always)]
501    pub const fn ielsr17(
502        &self,
503    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
504        unsafe {
505            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
506                self._svd2pac_as_ptr().add(0x344usize),
507            )
508        }
509    }
510    #[inline(always)]
511    pub const fn ielsr18(
512        &self,
513    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
514        unsafe {
515            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
516                self._svd2pac_as_ptr().add(0x348usize),
517            )
518        }
519    }
520    #[inline(always)]
521    pub const fn ielsr19(
522        &self,
523    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
524        unsafe {
525            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
526                self._svd2pac_as_ptr().add(0x34cusize),
527            )
528        }
529    }
530    #[inline(always)]
531    pub const fn ielsr20(
532        &self,
533    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(0x350usize),
537            )
538        }
539    }
540    #[inline(always)]
541    pub const fn ielsr21(
542        &self,
543    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(0x354usize),
547            )
548        }
549    }
550    #[inline(always)]
551    pub const fn ielsr22(
552        &self,
553    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
554        unsafe {
555            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
556                self._svd2pac_as_ptr().add(0x358usize),
557            )
558        }
559    }
560    #[inline(always)]
561    pub const fn ielsr23(
562        &self,
563    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
564        unsafe {
565            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
566                self._svd2pac_as_ptr().add(0x35cusize),
567            )
568        }
569    }
570    #[inline(always)]
571    pub const fn ielsr24(
572        &self,
573    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
574        unsafe {
575            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
576                self._svd2pac_as_ptr().add(0x360usize),
577            )
578        }
579    }
580    #[inline(always)]
581    pub const fn ielsr25(
582        &self,
583    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
584        unsafe {
585            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
586                self._svd2pac_as_ptr().add(0x364usize),
587            )
588        }
589    }
590    #[inline(always)]
591    pub const fn ielsr26(
592        &self,
593    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
594        unsafe {
595            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
596                self._svd2pac_as_ptr().add(0x368usize),
597            )
598        }
599    }
600    #[inline(always)]
601    pub const fn ielsr27(
602        &self,
603    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
604        unsafe {
605            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
606                self._svd2pac_as_ptr().add(0x36cusize),
607            )
608        }
609    }
610    #[inline(always)]
611    pub const fn ielsr28(
612        &self,
613    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
614        unsafe {
615            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
616                self._svd2pac_as_ptr().add(0x370usize),
617            )
618        }
619    }
620    #[inline(always)]
621    pub const fn ielsr29(
622        &self,
623    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
624        unsafe {
625            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
626                self._svd2pac_as_ptr().add(0x374usize),
627            )
628        }
629    }
630    #[inline(always)]
631    pub const fn ielsr30(
632        &self,
633    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
634        unsafe {
635            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
636                self._svd2pac_as_ptr().add(0x378usize),
637            )
638        }
639    }
640    #[inline(always)]
641    pub const fn ielsr31(
642        &self,
643    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
644        unsafe {
645            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
646                self._svd2pac_as_ptr().add(0x37cusize),
647            )
648        }
649    }
650    #[inline(always)]
651    pub const fn ielsr32(
652        &self,
653    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
654        unsafe {
655            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
656                self._svd2pac_as_ptr().add(0x380usize),
657            )
658        }
659    }
660    #[inline(always)]
661    pub const fn ielsr33(
662        &self,
663    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(0x384usize),
667            )
668        }
669    }
670    #[inline(always)]
671    pub const fn ielsr34(
672        &self,
673    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
674        unsafe {
675            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
676                self._svd2pac_as_ptr().add(0x388usize),
677            )
678        }
679    }
680    #[inline(always)]
681    pub const fn ielsr35(
682        &self,
683    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
684        unsafe {
685            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
686                self._svd2pac_as_ptr().add(0x38cusize),
687            )
688        }
689    }
690    #[inline(always)]
691    pub const fn ielsr36(
692        &self,
693    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
694        unsafe {
695            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
696                self._svd2pac_as_ptr().add(0x390usize),
697            )
698        }
699    }
700    #[inline(always)]
701    pub const fn ielsr37(
702        &self,
703    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
704        unsafe {
705            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
706                self._svd2pac_as_ptr().add(0x394usize),
707            )
708        }
709    }
710    #[inline(always)]
711    pub const fn ielsr38(
712        &self,
713    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
714        unsafe {
715            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
716                self._svd2pac_as_ptr().add(0x398usize),
717            )
718        }
719    }
720    #[inline(always)]
721    pub const fn ielsr39(
722        &self,
723    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
724        unsafe {
725            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
726                self._svd2pac_as_ptr().add(0x39cusize),
727            )
728        }
729    }
730    #[inline(always)]
731    pub const fn ielsr40(
732        &self,
733    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
734        unsafe {
735            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
736                self._svd2pac_as_ptr().add(0x3a0usize),
737            )
738        }
739    }
740    #[inline(always)]
741    pub const fn ielsr41(
742        &self,
743    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
744        unsafe {
745            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
746                self._svd2pac_as_ptr().add(0x3a4usize),
747            )
748        }
749    }
750    #[inline(always)]
751    pub const fn ielsr42(
752        &self,
753    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
754        unsafe {
755            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
756                self._svd2pac_as_ptr().add(0x3a8usize),
757            )
758        }
759    }
760    #[inline(always)]
761    pub const fn ielsr43(
762        &self,
763    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
764        unsafe {
765            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
766                self._svd2pac_as_ptr().add(0x3acusize),
767            )
768        }
769    }
770    #[inline(always)]
771    pub const fn ielsr44(
772        &self,
773    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
774        unsafe {
775            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
776                self._svd2pac_as_ptr().add(0x3b0usize),
777            )
778        }
779    }
780    #[inline(always)]
781    pub const fn ielsr45(
782        &self,
783    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
784        unsafe {
785            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
786                self._svd2pac_as_ptr().add(0x3b4usize),
787            )
788        }
789    }
790    #[inline(always)]
791    pub const fn ielsr46(
792        &self,
793    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(0x3b8usize),
797            )
798        }
799    }
800    #[inline(always)]
801    pub const fn ielsr47(
802        &self,
803    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
804        unsafe {
805            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
806                self._svd2pac_as_ptr().add(0x3bcusize),
807            )
808        }
809    }
810    #[inline(always)]
811    pub const fn ielsr48(
812        &self,
813    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
814        unsafe {
815            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
816                self._svd2pac_as_ptr().add(0x3c0usize),
817            )
818        }
819    }
820    #[inline(always)]
821    pub const fn ielsr49(
822        &self,
823    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
824        unsafe {
825            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
826                self._svd2pac_as_ptr().add(0x3c4usize),
827            )
828        }
829    }
830    #[inline(always)]
831    pub const fn ielsr50(
832        &self,
833    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
834        unsafe {
835            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
836                self._svd2pac_as_ptr().add(0x3c8usize),
837            )
838        }
839    }
840    #[inline(always)]
841    pub const fn ielsr51(
842        &self,
843    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
844        unsafe {
845            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
846                self._svd2pac_as_ptr().add(0x3ccusize),
847            )
848        }
849    }
850    #[inline(always)]
851    pub const fn ielsr52(
852        &self,
853    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
854        unsafe {
855            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
856                self._svd2pac_as_ptr().add(0x3d0usize),
857            )
858        }
859    }
860    #[inline(always)]
861    pub const fn ielsr53(
862        &self,
863    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
864        unsafe {
865            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
866                self._svd2pac_as_ptr().add(0x3d4usize),
867            )
868        }
869    }
870    #[inline(always)]
871    pub const fn ielsr54(
872        &self,
873    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
874        unsafe {
875            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
876                self._svd2pac_as_ptr().add(0x3d8usize),
877            )
878        }
879    }
880    #[inline(always)]
881    pub const fn ielsr55(
882        &self,
883    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
884        unsafe {
885            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
886                self._svd2pac_as_ptr().add(0x3dcusize),
887            )
888        }
889    }
890    #[inline(always)]
891    pub const fn ielsr56(
892        &self,
893    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
894        unsafe {
895            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
896                self._svd2pac_as_ptr().add(0x3e0usize),
897            )
898        }
899    }
900    #[inline(always)]
901    pub const fn ielsr57(
902        &self,
903    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
904        unsafe {
905            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
906                self._svd2pac_as_ptr().add(0x3e4usize),
907            )
908        }
909    }
910    #[inline(always)]
911    pub const fn ielsr58(
912        &self,
913    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
914        unsafe {
915            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
916                self._svd2pac_as_ptr().add(0x3e8usize),
917            )
918        }
919    }
920    #[inline(always)]
921    pub const fn ielsr59(
922        &self,
923    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
924        unsafe {
925            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
926                self._svd2pac_as_ptr().add(0x3ecusize),
927            )
928        }
929    }
930    #[inline(always)]
931    pub const fn ielsr60(
932        &self,
933    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
934        unsafe {
935            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
936                self._svd2pac_as_ptr().add(0x3f0usize),
937            )
938        }
939    }
940    #[inline(always)]
941    pub const fn ielsr61(
942        &self,
943    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
944        unsafe {
945            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
946                self._svd2pac_as_ptr().add(0x3f4usize),
947            )
948        }
949    }
950    #[inline(always)]
951    pub const fn ielsr62(
952        &self,
953    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
954        unsafe {
955            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
956                self._svd2pac_as_ptr().add(0x3f8usize),
957            )
958        }
959    }
960    #[inline(always)]
961    pub const fn ielsr63(
962        &self,
963    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
964        unsafe {
965            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
966                self._svd2pac_as_ptr().add(0x3fcusize),
967            )
968        }
969    }
970    #[inline(always)]
971    pub const fn ielsr64(
972        &self,
973    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
974        unsafe {
975            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
976                self._svd2pac_as_ptr().add(0x400usize),
977            )
978        }
979    }
980    #[inline(always)]
981    pub const fn ielsr65(
982        &self,
983    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
984        unsafe {
985            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
986                self._svd2pac_as_ptr().add(0x404usize),
987            )
988        }
989    }
990    #[inline(always)]
991    pub const fn ielsr66(
992        &self,
993    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
994        unsafe {
995            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
996                self._svd2pac_as_ptr().add(0x408usize),
997            )
998        }
999    }
1000    #[inline(always)]
1001    pub const fn ielsr67(
1002        &self,
1003    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1004        unsafe {
1005            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1006                self._svd2pac_as_ptr().add(0x40cusize),
1007            )
1008        }
1009    }
1010    #[inline(always)]
1011    pub const fn ielsr68(
1012        &self,
1013    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1014        unsafe {
1015            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1016                self._svd2pac_as_ptr().add(0x410usize),
1017            )
1018        }
1019    }
1020    #[inline(always)]
1021    pub const fn ielsr69(
1022        &self,
1023    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1024        unsafe {
1025            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1026                self._svd2pac_as_ptr().add(0x414usize),
1027            )
1028        }
1029    }
1030    #[inline(always)]
1031    pub const fn ielsr70(
1032        &self,
1033    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1034        unsafe {
1035            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1036                self._svd2pac_as_ptr().add(0x418usize),
1037            )
1038        }
1039    }
1040    #[inline(always)]
1041    pub const fn ielsr71(
1042        &self,
1043    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1044        unsafe {
1045            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1046                self._svd2pac_as_ptr().add(0x41cusize),
1047            )
1048        }
1049    }
1050    #[inline(always)]
1051    pub const fn ielsr72(
1052        &self,
1053    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1054        unsafe {
1055            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1056                self._svd2pac_as_ptr().add(0x420usize),
1057            )
1058        }
1059    }
1060    #[inline(always)]
1061    pub const fn ielsr73(
1062        &self,
1063    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1064        unsafe {
1065            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1066                self._svd2pac_as_ptr().add(0x424usize),
1067            )
1068        }
1069    }
1070    #[inline(always)]
1071    pub const fn ielsr74(
1072        &self,
1073    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1074        unsafe {
1075            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1076                self._svd2pac_as_ptr().add(0x428usize),
1077            )
1078        }
1079    }
1080    #[inline(always)]
1081    pub const fn ielsr75(
1082        &self,
1083    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1084        unsafe {
1085            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1086                self._svd2pac_as_ptr().add(0x42cusize),
1087            )
1088        }
1089    }
1090    #[inline(always)]
1091    pub const fn ielsr76(
1092        &self,
1093    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1094        unsafe {
1095            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1096                self._svd2pac_as_ptr().add(0x430usize),
1097            )
1098        }
1099    }
1100    #[inline(always)]
1101    pub const fn ielsr77(
1102        &self,
1103    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1104        unsafe {
1105            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1106                self._svd2pac_as_ptr().add(0x434usize),
1107            )
1108        }
1109    }
1110    #[inline(always)]
1111    pub const fn ielsr78(
1112        &self,
1113    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1114        unsafe {
1115            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1116                self._svd2pac_as_ptr().add(0x438usize),
1117            )
1118        }
1119    }
1120    #[inline(always)]
1121    pub const fn ielsr79(
1122        &self,
1123    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1124        unsafe {
1125            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1126                self._svd2pac_as_ptr().add(0x43cusize),
1127            )
1128        }
1129    }
1130    #[inline(always)]
1131    pub const fn ielsr80(
1132        &self,
1133    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1134        unsafe {
1135            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1136                self._svd2pac_as_ptr().add(0x440usize),
1137            )
1138        }
1139    }
1140    #[inline(always)]
1141    pub const fn ielsr81(
1142        &self,
1143    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1144        unsafe {
1145            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1146                self._svd2pac_as_ptr().add(0x444usize),
1147            )
1148        }
1149    }
1150    #[inline(always)]
1151    pub const fn ielsr82(
1152        &self,
1153    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1154        unsafe {
1155            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1156                self._svd2pac_as_ptr().add(0x448usize),
1157            )
1158        }
1159    }
1160    #[inline(always)]
1161    pub const fn ielsr83(
1162        &self,
1163    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1164        unsafe {
1165            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1166                self._svd2pac_as_ptr().add(0x44cusize),
1167            )
1168        }
1169    }
1170    #[inline(always)]
1171    pub const fn ielsr84(
1172        &self,
1173    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1174        unsafe {
1175            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1176                self._svd2pac_as_ptr().add(0x450usize),
1177            )
1178        }
1179    }
1180    #[inline(always)]
1181    pub const fn ielsr85(
1182        &self,
1183    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1184        unsafe {
1185            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1186                self._svd2pac_as_ptr().add(0x454usize),
1187            )
1188        }
1189    }
1190    #[inline(always)]
1191    pub const fn ielsr86(
1192        &self,
1193    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1194        unsafe {
1195            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1196                self._svd2pac_as_ptr().add(0x458usize),
1197            )
1198        }
1199    }
1200    #[inline(always)]
1201    pub const fn ielsr87(
1202        &self,
1203    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1204        unsafe {
1205            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1206                self._svd2pac_as_ptr().add(0x45cusize),
1207            )
1208        }
1209    }
1210    #[inline(always)]
1211    pub const fn ielsr88(
1212        &self,
1213    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1214        unsafe {
1215            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1216                self._svd2pac_as_ptr().add(0x460usize),
1217            )
1218        }
1219    }
1220    #[inline(always)]
1221    pub const fn ielsr89(
1222        &self,
1223    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1224        unsafe {
1225            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1226                self._svd2pac_as_ptr().add(0x464usize),
1227            )
1228        }
1229    }
1230    #[inline(always)]
1231    pub const fn ielsr90(
1232        &self,
1233    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1234        unsafe {
1235            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1236                self._svd2pac_as_ptr().add(0x468usize),
1237            )
1238        }
1239    }
1240    #[inline(always)]
1241    pub const fn ielsr91(
1242        &self,
1243    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1244        unsafe {
1245            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1246                self._svd2pac_as_ptr().add(0x46cusize),
1247            )
1248        }
1249    }
1250    #[inline(always)]
1251    pub const fn ielsr92(
1252        &self,
1253    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1254        unsafe {
1255            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1256                self._svd2pac_as_ptr().add(0x470usize),
1257            )
1258        }
1259    }
1260    #[inline(always)]
1261    pub const fn ielsr93(
1262        &self,
1263    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1264        unsafe {
1265            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1266                self._svd2pac_as_ptr().add(0x474usize),
1267            )
1268        }
1269    }
1270    #[inline(always)]
1271    pub const fn ielsr94(
1272        &self,
1273    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1274        unsafe {
1275            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1276                self._svd2pac_as_ptr().add(0x478usize),
1277            )
1278        }
1279    }
1280    #[inline(always)]
1281    pub const fn ielsr95(
1282        &self,
1283    ) -> &'static crate::common::Reg<self::Ielsr_SPEC, crate::common::RW> {
1284        unsafe {
1285            crate::common::Reg::<self::Ielsr_SPEC, crate::common::RW>::from_ptr(
1286                self._svd2pac_as_ptr().add(0x47cusize),
1287            )
1288        }
1289    }
1290}
1291#[doc(hidden)]
1292#[derive(Copy, Clone, Eq, PartialEq)]
1293pub struct Irqcr_SPEC;
1294impl crate::sealed::RegSpec for Irqcr_SPEC {
1295    type DataType = u8;
1296}
1297
1298#[doc = "IRQ Control Register %s"]
1299pub type Irqcr = crate::RegValueT<Irqcr_SPEC>;
1300
1301impl Irqcr {
1302    #[doc = "IRQi Detection Sense Select"]
1303    #[inline(always)]
1304    pub fn irqmd(
1305        self,
1306    ) -> crate::common::RegisterField<
1307        0,
1308        0x3,
1309        1,
1310        0,
1311        irqcr::Irqmd,
1312        irqcr::Irqmd,
1313        Irqcr_SPEC,
1314        crate::common::RW,
1315    > {
1316        crate::common::RegisterField::<
1317            0,
1318            0x3,
1319            1,
1320            0,
1321            irqcr::Irqmd,
1322            irqcr::Irqmd,
1323            Irqcr_SPEC,
1324            crate::common::RW,
1325        >::from_register(self, 0)
1326    }
1327
1328    #[doc = "IRQi Digital Filter Sampling Clock Select"]
1329    #[inline(always)]
1330    pub fn fclksel(
1331        self,
1332    ) -> crate::common::RegisterField<
1333        4,
1334        0x3,
1335        1,
1336        0,
1337        irqcr::Fclksel,
1338        irqcr::Fclksel,
1339        Irqcr_SPEC,
1340        crate::common::RW,
1341    > {
1342        crate::common::RegisterField::<
1343            4,
1344            0x3,
1345            1,
1346            0,
1347            irqcr::Fclksel,
1348            irqcr::Fclksel,
1349            Irqcr_SPEC,
1350            crate::common::RW,
1351        >::from_register(self, 0)
1352    }
1353
1354    #[doc = "IRQi Digital Filter Enable"]
1355    #[inline(always)]
1356    pub fn flten(
1357        self,
1358    ) -> crate::common::RegisterField<
1359        7,
1360        0x1,
1361        1,
1362        0,
1363        irqcr::Flten,
1364        irqcr::Flten,
1365        Irqcr_SPEC,
1366        crate::common::RW,
1367    > {
1368        crate::common::RegisterField::<
1369            7,
1370            0x1,
1371            1,
1372            0,
1373            irqcr::Flten,
1374            irqcr::Flten,
1375            Irqcr_SPEC,
1376            crate::common::RW,
1377        >::from_register(self, 0)
1378    }
1379}
1380impl ::core::default::Default for Irqcr {
1381    #[inline(always)]
1382    fn default() -> Irqcr {
1383        <crate::RegValueT<Irqcr_SPEC> as RegisterValue<_>>::new(0)
1384    }
1385}
1386pub mod irqcr {
1387
1388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1389    pub struct Irqmd_SPEC;
1390    pub type Irqmd = crate::EnumBitfieldStruct<u8, Irqmd_SPEC>;
1391    impl Irqmd {
1392        #[doc = "Falling edge"]
1393        pub const _00: Self = Self::new(0);
1394
1395        #[doc = "Rising edge"]
1396        pub const _01: Self = Self::new(1);
1397
1398        #[doc = "Rising and falling edges"]
1399        pub const _10: Self = Self::new(2);
1400
1401        #[doc = "Low level"]
1402        pub const _11: Self = Self::new(3);
1403    }
1404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1405    pub struct Fclksel_SPEC;
1406    pub type Fclksel = crate::EnumBitfieldStruct<u8, Fclksel_SPEC>;
1407    impl Fclksel {
1408        #[doc = "PCLKB"]
1409        pub const _00: Self = Self::new(0);
1410
1411        #[doc = "PCLKB/8"]
1412        pub const _01: Self = Self::new(1);
1413
1414        #[doc = "PCLKB/32"]
1415        pub const _10: Self = Self::new(2);
1416
1417        #[doc = "PCLKB/64"]
1418        pub const _11: Self = Self::new(3);
1419    }
1420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1421    pub struct Flten_SPEC;
1422    pub type Flten = crate::EnumBitfieldStruct<u8, Flten_SPEC>;
1423    impl Flten {
1424        #[doc = "Digital filter is disabled"]
1425        pub const _0: Self = Self::new(0);
1426
1427        #[doc = "Digital filter is enabled."]
1428        pub const _1: Self = Self::new(1);
1429    }
1430}
1431#[doc(hidden)]
1432#[derive(Copy, Clone, Eq, PartialEq)]
1433pub struct Nmicr_SPEC;
1434impl crate::sealed::RegSpec for Nmicr_SPEC {
1435    type DataType = u8;
1436}
1437
1438#[doc = "NMI Pin Interrupt Control Register"]
1439pub type Nmicr = crate::RegValueT<Nmicr_SPEC>;
1440
1441impl Nmicr {
1442    #[doc = "NMI Detection Set"]
1443    #[inline(always)]
1444    pub fn nmimd(
1445        self,
1446    ) -> crate::common::RegisterField<
1447        0,
1448        0x1,
1449        1,
1450        0,
1451        nmicr::Nmimd,
1452        nmicr::Nmimd,
1453        Nmicr_SPEC,
1454        crate::common::RW,
1455    > {
1456        crate::common::RegisterField::<
1457            0,
1458            0x1,
1459            1,
1460            0,
1461            nmicr::Nmimd,
1462            nmicr::Nmimd,
1463            Nmicr_SPEC,
1464            crate::common::RW,
1465        >::from_register(self, 0)
1466    }
1467
1468    #[doc = "NMI Digital Filter Sampling Clock Select"]
1469    #[inline(always)]
1470    pub fn nfclksel(
1471        self,
1472    ) -> crate::common::RegisterField<
1473        4,
1474        0x3,
1475        1,
1476        0,
1477        nmicr::Nfclksel,
1478        nmicr::Nfclksel,
1479        Nmicr_SPEC,
1480        crate::common::RW,
1481    > {
1482        crate::common::RegisterField::<
1483            4,
1484            0x3,
1485            1,
1486            0,
1487            nmicr::Nfclksel,
1488            nmicr::Nfclksel,
1489            Nmicr_SPEC,
1490            crate::common::RW,
1491        >::from_register(self, 0)
1492    }
1493
1494    #[doc = "NMI Digital Filter Enable"]
1495    #[inline(always)]
1496    pub fn nflten(
1497        self,
1498    ) -> crate::common::RegisterField<
1499        7,
1500        0x1,
1501        1,
1502        0,
1503        nmicr::Nflten,
1504        nmicr::Nflten,
1505        Nmicr_SPEC,
1506        crate::common::RW,
1507    > {
1508        crate::common::RegisterField::<
1509            7,
1510            0x1,
1511            1,
1512            0,
1513            nmicr::Nflten,
1514            nmicr::Nflten,
1515            Nmicr_SPEC,
1516            crate::common::RW,
1517        >::from_register(self, 0)
1518    }
1519}
1520impl ::core::default::Default for Nmicr {
1521    #[inline(always)]
1522    fn default() -> Nmicr {
1523        <crate::RegValueT<Nmicr_SPEC> as RegisterValue<_>>::new(0)
1524    }
1525}
1526pub mod nmicr {
1527
1528    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1529    pub struct Nmimd_SPEC;
1530    pub type Nmimd = crate::EnumBitfieldStruct<u8, Nmimd_SPEC>;
1531    impl Nmimd {
1532        #[doc = "Falling edge"]
1533        pub const _0: Self = Self::new(0);
1534
1535        #[doc = "Rising edge"]
1536        pub const _1: Self = Self::new(1);
1537    }
1538    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1539    pub struct Nfclksel_SPEC;
1540    pub type Nfclksel = crate::EnumBitfieldStruct<u8, Nfclksel_SPEC>;
1541    impl Nfclksel {
1542        #[doc = "PCLKB"]
1543        pub const _00: Self = Self::new(0);
1544
1545        #[doc = "PCLKB/8"]
1546        pub const _01: Self = Self::new(1);
1547
1548        #[doc = "PCLKB/32"]
1549        pub const _10: Self = Self::new(2);
1550
1551        #[doc = "PCLKB/64"]
1552        pub const _11: Self = Self::new(3);
1553    }
1554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1555    pub struct Nflten_SPEC;
1556    pub type Nflten = crate::EnumBitfieldStruct<u8, Nflten_SPEC>;
1557    impl Nflten {
1558        #[doc = "Disabled."]
1559        pub const _0: Self = Self::new(0);
1560
1561        #[doc = "Enabled."]
1562        pub const _1: Self = Self::new(1);
1563    }
1564}
1565#[doc(hidden)]
1566#[derive(Copy, Clone, Eq, PartialEq)]
1567pub struct Nmier_SPEC;
1568impl crate::sealed::RegSpec for Nmier_SPEC {
1569    type DataType = u16;
1570}
1571
1572#[doc = "Non-Maskable Interrupt Enable Register"]
1573pub type Nmier = crate::RegValueT<Nmier_SPEC>;
1574
1575impl Nmier {
1576    #[doc = "IWDT Underflow/Refresh Error Interrupt Enable"]
1577    #[inline(always)]
1578    pub fn iwdten(
1579        self,
1580    ) -> crate::common::RegisterField<
1581        0,
1582        0x1,
1583        1,
1584        0,
1585        nmier::Iwdten,
1586        nmier::Iwdten,
1587        Nmier_SPEC,
1588        crate::common::RW,
1589    > {
1590        crate::common::RegisterField::<
1591            0,
1592            0x1,
1593            1,
1594            0,
1595            nmier::Iwdten,
1596            nmier::Iwdten,
1597            Nmier_SPEC,
1598            crate::common::RW,
1599        >::from_register(self, 0)
1600    }
1601
1602    #[doc = "WDT Underflow/Refresh Error Interrupt Enable"]
1603    #[inline(always)]
1604    pub fn wdten(
1605        self,
1606    ) -> crate::common::RegisterField<
1607        1,
1608        0x1,
1609        1,
1610        0,
1611        nmier::Wdten,
1612        nmier::Wdten,
1613        Nmier_SPEC,
1614        crate::common::RW,
1615    > {
1616        crate::common::RegisterField::<
1617            1,
1618            0x1,
1619            1,
1620            0,
1621            nmier::Wdten,
1622            nmier::Wdten,
1623            Nmier_SPEC,
1624            crate::common::RW,
1625        >::from_register(self, 0)
1626    }
1627
1628    #[doc = "Voltage monitor 1 Interrupt Enable"]
1629    #[inline(always)]
1630    pub fn lvd1en(
1631        self,
1632    ) -> crate::common::RegisterField<
1633        2,
1634        0x1,
1635        1,
1636        0,
1637        nmier::Lvd1En,
1638        nmier::Lvd1En,
1639        Nmier_SPEC,
1640        crate::common::RW,
1641    > {
1642        crate::common::RegisterField::<
1643            2,
1644            0x1,
1645            1,
1646            0,
1647            nmier::Lvd1En,
1648            nmier::Lvd1En,
1649            Nmier_SPEC,
1650            crate::common::RW,
1651        >::from_register(self, 0)
1652    }
1653
1654    #[doc = "Voltage monitor 2 Interrupt Enable"]
1655    #[inline(always)]
1656    pub fn lvd2en(
1657        self,
1658    ) -> crate::common::RegisterField<
1659        3,
1660        0x1,
1661        1,
1662        0,
1663        nmier::Lvd2En,
1664        nmier::Lvd2En,
1665        Nmier_SPEC,
1666        crate::common::RW,
1667    > {
1668        crate::common::RegisterField::<
1669            3,
1670            0x1,
1671            1,
1672            0,
1673            nmier::Lvd2En,
1674            nmier::Lvd2En,
1675            Nmier_SPEC,
1676            crate::common::RW,
1677        >::from_register(self, 0)
1678    }
1679
1680    #[doc = "Main Clock Oscillation Stop Detection Interrupt Enable"]
1681    #[inline(always)]
1682    pub fn osten(
1683        self,
1684    ) -> crate::common::RegisterField<
1685        6,
1686        0x1,
1687        1,
1688        0,
1689        nmier::Osten,
1690        nmier::Osten,
1691        Nmier_SPEC,
1692        crate::common::RW,
1693    > {
1694        crate::common::RegisterField::<
1695            6,
1696            0x1,
1697            1,
1698            0,
1699            nmier::Osten,
1700            nmier::Osten,
1701            Nmier_SPEC,
1702            crate::common::RW,
1703        >::from_register(self, 0)
1704    }
1705
1706    #[doc = "NMI Pin Interrupt Enable"]
1707    #[inline(always)]
1708    pub fn nmien(
1709        self,
1710    ) -> crate::common::RegisterField<
1711        7,
1712        0x1,
1713        1,
1714        0,
1715        nmier::Nmien,
1716        nmier::Nmien,
1717        Nmier_SPEC,
1718        crate::common::RW,
1719    > {
1720        crate::common::RegisterField::<
1721            7,
1722            0x1,
1723            1,
1724            0,
1725            nmier::Nmien,
1726            nmier::Nmien,
1727            Nmier_SPEC,
1728            crate::common::RW,
1729        >::from_register(self, 0)
1730    }
1731
1732    #[doc = "SRAM Parity Error Interrupt Enable"]
1733    #[inline(always)]
1734    pub fn rpeen(
1735        self,
1736    ) -> crate::common::RegisterField<
1737        8,
1738        0x1,
1739        1,
1740        0,
1741        nmier::Rpeen,
1742        nmier::Rpeen,
1743        Nmier_SPEC,
1744        crate::common::RW,
1745    > {
1746        crate::common::RegisterField::<
1747            8,
1748            0x1,
1749            1,
1750            0,
1751            nmier::Rpeen,
1752            nmier::Rpeen,
1753            Nmier_SPEC,
1754            crate::common::RW,
1755        >::from_register(self, 0)
1756    }
1757
1758    #[doc = "SRAM ECC Error Interrupt Enable"]
1759    #[inline(always)]
1760    pub fn reccen(
1761        self,
1762    ) -> crate::common::RegisterField<
1763        9,
1764        0x1,
1765        1,
1766        0,
1767        nmier::Reccen,
1768        nmier::Reccen,
1769        Nmier_SPEC,
1770        crate::common::RW,
1771    > {
1772        crate::common::RegisterField::<
1773            9,
1774            0x1,
1775            1,
1776            0,
1777            nmier::Reccen,
1778            nmier::Reccen,
1779            Nmier_SPEC,
1780            crate::common::RW,
1781        >::from_register(self, 0)
1782    }
1783
1784    #[doc = "Bus Master MPU Error Interrupt Enable"]
1785    #[inline(always)]
1786    pub fn busmen(
1787        self,
1788    ) -> crate::common::RegisterField<
1789        11,
1790        0x1,
1791        1,
1792        0,
1793        nmier::Busmen,
1794        nmier::Busmen,
1795        Nmier_SPEC,
1796        crate::common::RW,
1797    > {
1798        crate::common::RegisterField::<
1799            11,
1800            0x1,
1801            1,
1802            0,
1803            nmier::Busmen,
1804            nmier::Busmen,
1805            Nmier_SPEC,
1806            crate::common::RW,
1807        >::from_register(self, 0)
1808    }
1809
1810    #[inline(always)]
1811    pub fn tzfen(
1812        self,
1813    ) -> crate::common::RegisterField<
1814        13,
1815        0x1,
1816        1,
1817        0,
1818        nmier::Tzfen,
1819        nmier::Tzfen,
1820        Nmier_SPEC,
1821        crate::common::RW,
1822    > {
1823        crate::common::RegisterField::<
1824            13,
1825            0x1,
1826            1,
1827            0,
1828            nmier::Tzfen,
1829            nmier::Tzfen,
1830            Nmier_SPEC,
1831            crate::common::RW,
1832        >::from_register(self, 0)
1833    }
1834
1835    #[inline(always)]
1836    pub fn cpeen(
1837        self,
1838    ) -> crate::common::RegisterField<
1839        15,
1840        0x1,
1841        1,
1842        0,
1843        nmier::Cpeen,
1844        nmier::Cpeen,
1845        Nmier_SPEC,
1846        crate::common::RW,
1847    > {
1848        crate::common::RegisterField::<
1849            15,
1850            0x1,
1851            1,
1852            0,
1853            nmier::Cpeen,
1854            nmier::Cpeen,
1855            Nmier_SPEC,
1856            crate::common::RW,
1857        >::from_register(self, 0)
1858    }
1859}
1860impl ::core::default::Default for Nmier {
1861    #[inline(always)]
1862    fn default() -> Nmier {
1863        <crate::RegValueT<Nmier_SPEC> as RegisterValue<_>>::new(0)
1864    }
1865}
1866pub mod nmier {
1867
1868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1869    pub struct Iwdten_SPEC;
1870    pub type Iwdten = crate::EnumBitfieldStruct<u8, Iwdten_SPEC>;
1871    impl Iwdten {
1872        #[doc = "Disabled"]
1873        pub const _0: Self = Self::new(0);
1874
1875        #[doc = "Enabled."]
1876        pub const _1: Self = Self::new(1);
1877    }
1878    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1879    pub struct Wdten_SPEC;
1880    pub type Wdten = crate::EnumBitfieldStruct<u8, Wdten_SPEC>;
1881    impl Wdten {
1882        #[doc = "Disabled"]
1883        pub const _0: Self = Self::new(0);
1884
1885        #[doc = "Enabled"]
1886        pub const _1: Self = Self::new(1);
1887    }
1888    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1889    pub struct Lvd1En_SPEC;
1890    pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
1891    impl Lvd1En {
1892        #[doc = "Disabled"]
1893        pub const _0: Self = Self::new(0);
1894
1895        #[doc = "Enabled"]
1896        pub const _1: Self = Self::new(1);
1897    }
1898    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1899    pub struct Lvd2En_SPEC;
1900    pub type Lvd2En = crate::EnumBitfieldStruct<u8, Lvd2En_SPEC>;
1901    impl Lvd2En {
1902        #[doc = "Disabled"]
1903        pub const _0: Self = Self::new(0);
1904
1905        #[doc = "Enabled"]
1906        pub const _1: Self = Self::new(1);
1907    }
1908    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1909    pub struct Osten_SPEC;
1910    pub type Osten = crate::EnumBitfieldStruct<u8, Osten_SPEC>;
1911    impl Osten {
1912        #[doc = "Disabled"]
1913        pub const _0: Self = Self::new(0);
1914
1915        #[doc = "Enabled"]
1916        pub const _1: Self = Self::new(1);
1917    }
1918    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1919    pub struct Nmien_SPEC;
1920    pub type Nmien = crate::EnumBitfieldStruct<u8, Nmien_SPEC>;
1921    impl Nmien {
1922        #[doc = "Disabled"]
1923        pub const _0: Self = Self::new(0);
1924
1925        #[doc = "Enabled"]
1926        pub const _1: Self = Self::new(1);
1927    }
1928    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1929    pub struct Rpeen_SPEC;
1930    pub type Rpeen = crate::EnumBitfieldStruct<u8, Rpeen_SPEC>;
1931    impl Rpeen {
1932        #[doc = "Disabled"]
1933        pub const _0: Self = Self::new(0);
1934
1935        #[doc = "Enabled"]
1936        pub const _1: Self = Self::new(1);
1937    }
1938    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1939    pub struct Reccen_SPEC;
1940    pub type Reccen = crate::EnumBitfieldStruct<u8, Reccen_SPEC>;
1941    impl Reccen {
1942        #[doc = "Disabled"]
1943        pub const _0: Self = Self::new(0);
1944
1945        #[doc = "Enabled"]
1946        pub const _1: Self = Self::new(1);
1947    }
1948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1949    pub struct Busmen_SPEC;
1950    pub type Busmen = crate::EnumBitfieldStruct<u8, Busmen_SPEC>;
1951    impl Busmen {
1952        #[doc = "Disabled"]
1953        pub const _0: Self = Self::new(0);
1954
1955        #[doc = "Enabled"]
1956        pub const _1: Self = Self::new(1);
1957    }
1958    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1959    pub struct Tzfen_SPEC;
1960    pub type Tzfen = crate::EnumBitfieldStruct<u8, Tzfen_SPEC>;
1961    impl Tzfen {
1962        #[doc = "Disabled"]
1963        pub const _0: Self = Self::new(0);
1964
1965        #[doc = "Enabled"]
1966        pub const _1: Self = Self::new(1);
1967    }
1968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1969    pub struct Cpeen_SPEC;
1970    pub type Cpeen = crate::EnumBitfieldStruct<u8, Cpeen_SPEC>;
1971    impl Cpeen {
1972        #[doc = "Disabled"]
1973        pub const _0: Self = Self::new(0);
1974
1975        #[doc = "Enabled"]
1976        pub const _1: Self = Self::new(1);
1977    }
1978}
1979#[doc(hidden)]
1980#[derive(Copy, Clone, Eq, PartialEq)]
1981pub struct Nmiclr_SPEC;
1982impl crate::sealed::RegSpec for Nmiclr_SPEC {
1983    type DataType = u16;
1984}
1985
1986#[doc = "Non-Maskable Interrupt Status Clear Register"]
1987pub type Nmiclr = crate::RegValueT<Nmiclr_SPEC>;
1988
1989impl Nmiclr {
1990    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag Clear"]
1991    #[inline(always)]
1992    pub fn iwdtclr(
1993        self,
1994    ) -> crate::common::RegisterField<
1995        0,
1996        0x1,
1997        1,
1998        0,
1999        nmiclr::Iwdtclr,
2000        nmiclr::Iwdtclr,
2001        Nmiclr_SPEC,
2002        crate::common::RW,
2003    > {
2004        crate::common::RegisterField::<
2005            0,
2006            0x1,
2007            1,
2008            0,
2009            nmiclr::Iwdtclr,
2010            nmiclr::Iwdtclr,
2011            Nmiclr_SPEC,
2012            crate::common::RW,
2013        >::from_register(self, 0)
2014    }
2015
2016    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag Clear"]
2017    #[inline(always)]
2018    pub fn wdtclr(
2019        self,
2020    ) -> crate::common::RegisterField<
2021        1,
2022        0x1,
2023        1,
2024        0,
2025        nmiclr::Wdtclr,
2026        nmiclr::Wdtclr,
2027        Nmiclr_SPEC,
2028        crate::common::RW,
2029    > {
2030        crate::common::RegisterField::<
2031            1,
2032            0x1,
2033            1,
2034            0,
2035            nmiclr::Wdtclr,
2036            nmiclr::Wdtclr,
2037            Nmiclr_SPEC,
2038            crate::common::RW,
2039        >::from_register(self, 0)
2040    }
2041
2042    #[doc = "Voltage Monitor 1 Interrupt Status Flag Clear"]
2043    #[inline(always)]
2044    pub fn lvd1clr(
2045        self,
2046    ) -> crate::common::RegisterField<
2047        2,
2048        0x1,
2049        1,
2050        0,
2051        nmiclr::Lvd1Clr,
2052        nmiclr::Lvd1Clr,
2053        Nmiclr_SPEC,
2054        crate::common::RW,
2055    > {
2056        crate::common::RegisterField::<
2057            2,
2058            0x1,
2059            1,
2060            0,
2061            nmiclr::Lvd1Clr,
2062            nmiclr::Lvd1Clr,
2063            Nmiclr_SPEC,
2064            crate::common::RW,
2065        >::from_register(self, 0)
2066    }
2067
2068    #[doc = "Voltage Monitor 2 Interrupt Status Flag Clear"]
2069    #[inline(always)]
2070    pub fn lvd2clr(
2071        self,
2072    ) -> crate::common::RegisterField<
2073        3,
2074        0x1,
2075        1,
2076        0,
2077        nmiclr::Lvd2Clr,
2078        nmiclr::Lvd2Clr,
2079        Nmiclr_SPEC,
2080        crate::common::RW,
2081    > {
2082        crate::common::RegisterField::<
2083            3,
2084            0x1,
2085            1,
2086            0,
2087            nmiclr::Lvd2Clr,
2088            nmiclr::Lvd2Clr,
2089            Nmiclr_SPEC,
2090            crate::common::RW,
2091        >::from_register(self, 0)
2092    }
2093
2094    #[doc = "Oscillation Stop Detection Interrupt Status Flag Clear"]
2095    #[inline(always)]
2096    pub fn ostclr(
2097        self,
2098    ) -> crate::common::RegisterField<
2099        6,
2100        0x1,
2101        1,
2102        0,
2103        nmiclr::Ostclr,
2104        nmiclr::Ostclr,
2105        Nmiclr_SPEC,
2106        crate::common::RW,
2107    > {
2108        crate::common::RegisterField::<
2109            6,
2110            0x1,
2111            1,
2112            0,
2113            nmiclr::Ostclr,
2114            nmiclr::Ostclr,
2115            Nmiclr_SPEC,
2116            crate::common::RW,
2117        >::from_register(self, 0)
2118    }
2119
2120    #[doc = "NMI Pin Interrupt Status Flag Clear"]
2121    #[inline(always)]
2122    pub fn nmiclr(
2123        self,
2124    ) -> crate::common::RegisterField<
2125        7,
2126        0x1,
2127        1,
2128        0,
2129        nmiclr::Nmiclr,
2130        nmiclr::Nmiclr,
2131        Nmiclr_SPEC,
2132        crate::common::RW,
2133    > {
2134        crate::common::RegisterField::<
2135            7,
2136            0x1,
2137            1,
2138            0,
2139            nmiclr::Nmiclr,
2140            nmiclr::Nmiclr,
2141            Nmiclr_SPEC,
2142            crate::common::RW,
2143        >::from_register(self, 0)
2144    }
2145
2146    #[doc = "SRAM Parity Error Interrupt Status Flag Clear"]
2147    #[inline(always)]
2148    pub fn rpeclr(
2149        self,
2150    ) -> crate::common::RegisterField<
2151        8,
2152        0x1,
2153        1,
2154        0,
2155        nmiclr::Rpeclr,
2156        nmiclr::Rpeclr,
2157        Nmiclr_SPEC,
2158        crate::common::RW,
2159    > {
2160        crate::common::RegisterField::<
2161            8,
2162            0x1,
2163            1,
2164            0,
2165            nmiclr::Rpeclr,
2166            nmiclr::Rpeclr,
2167            Nmiclr_SPEC,
2168            crate::common::RW,
2169        >::from_register(self, 0)
2170    }
2171
2172    #[doc = "SRAM ECC Error Interrupt Status Flag Clear"]
2173    #[inline(always)]
2174    pub fn reccclr(
2175        self,
2176    ) -> crate::common::RegisterField<
2177        9,
2178        0x1,
2179        1,
2180        0,
2181        nmiclr::Reccclr,
2182        nmiclr::Reccclr,
2183        Nmiclr_SPEC,
2184        crate::common::RW,
2185    > {
2186        crate::common::RegisterField::<
2187            9,
2188            0x1,
2189            1,
2190            0,
2191            nmiclr::Reccclr,
2192            nmiclr::Reccclr,
2193            Nmiclr_SPEC,
2194            crate::common::RW,
2195        >::from_register(self, 0)
2196    }
2197
2198    #[doc = "Bus Master MPU Error Interrupt Status Flag Clear"]
2199    #[inline(always)]
2200    pub fn busmclr(
2201        self,
2202    ) -> crate::common::RegisterField<
2203        11,
2204        0x1,
2205        1,
2206        0,
2207        nmiclr::Busmclr,
2208        nmiclr::Busmclr,
2209        Nmiclr_SPEC,
2210        crate::common::RW,
2211    > {
2212        crate::common::RegisterField::<
2213            11,
2214            0x1,
2215            1,
2216            0,
2217            nmiclr::Busmclr,
2218            nmiclr::Busmclr,
2219            Nmiclr_SPEC,
2220            crate::common::RW,
2221        >::from_register(self, 0)
2222    }
2223
2224    #[inline(always)]
2225    pub fn tzfclr(
2226        self,
2227    ) -> crate::common::RegisterField<
2228        13,
2229        0x1,
2230        1,
2231        0,
2232        nmiclr::Tzfclr,
2233        nmiclr::Tzfclr,
2234        Nmiclr_SPEC,
2235        crate::common::RW,
2236    > {
2237        crate::common::RegisterField::<
2238            13,
2239            0x1,
2240            1,
2241            0,
2242            nmiclr::Tzfclr,
2243            nmiclr::Tzfclr,
2244            Nmiclr_SPEC,
2245            crate::common::RW,
2246        >::from_register(self, 0)
2247    }
2248
2249    #[inline(always)]
2250    pub fn cpeclr(
2251        self,
2252    ) -> crate::common::RegisterField<
2253        15,
2254        0x1,
2255        1,
2256        0,
2257        nmiclr::Cpeclr,
2258        nmiclr::Cpeclr,
2259        Nmiclr_SPEC,
2260        crate::common::RW,
2261    > {
2262        crate::common::RegisterField::<
2263            15,
2264            0x1,
2265            1,
2266            0,
2267            nmiclr::Cpeclr,
2268            nmiclr::Cpeclr,
2269            Nmiclr_SPEC,
2270            crate::common::RW,
2271        >::from_register(self, 0)
2272    }
2273}
2274impl ::core::default::Default for Nmiclr {
2275    #[inline(always)]
2276    fn default() -> Nmiclr {
2277        <crate::RegValueT<Nmiclr_SPEC> as RegisterValue<_>>::new(0)
2278    }
2279}
2280pub mod nmiclr {
2281
2282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2283    pub struct Iwdtclr_SPEC;
2284    pub type Iwdtclr = crate::EnumBitfieldStruct<u8, Iwdtclr_SPEC>;
2285    impl Iwdtclr {
2286        #[doc = "No effect"]
2287        pub const _0: Self = Self::new(0);
2288
2289        #[doc = "Clear the NMISR.IWDTST flag"]
2290        pub const _1: Self = Self::new(1);
2291    }
2292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2293    pub struct Wdtclr_SPEC;
2294    pub type Wdtclr = crate::EnumBitfieldStruct<u8, Wdtclr_SPEC>;
2295    impl Wdtclr {
2296        #[doc = "No effect"]
2297        pub const _0: Self = Self::new(0);
2298
2299        #[doc = "Clear the NMISR.WDTST flag"]
2300        pub const _1: Self = Self::new(1);
2301    }
2302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2303    pub struct Lvd1Clr_SPEC;
2304    pub type Lvd1Clr = crate::EnumBitfieldStruct<u8, Lvd1Clr_SPEC>;
2305    impl Lvd1Clr {
2306        #[doc = "No effect"]
2307        pub const _0: Self = Self::new(0);
2308
2309        #[doc = "Clear the NMISR.LVD1ST flag"]
2310        pub const _1: Self = Self::new(1);
2311    }
2312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2313    pub struct Lvd2Clr_SPEC;
2314    pub type Lvd2Clr = crate::EnumBitfieldStruct<u8, Lvd2Clr_SPEC>;
2315    impl Lvd2Clr {
2316        #[doc = "No effect"]
2317        pub const _0: Self = Self::new(0);
2318
2319        #[doc = "Clear the NMISR.LVD2ST flag."]
2320        pub const _1: Self = Self::new(1);
2321    }
2322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2323    pub struct Ostclr_SPEC;
2324    pub type Ostclr = crate::EnumBitfieldStruct<u8, Ostclr_SPEC>;
2325    impl Ostclr {
2326        #[doc = "No effect"]
2327        pub const _0: Self = Self::new(0);
2328
2329        #[doc = "Clear the NMISR.OSTST flag"]
2330        pub const _1: Self = Self::new(1);
2331    }
2332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2333    pub struct Nmiclr_SPEC;
2334    pub type Nmiclr = crate::EnumBitfieldStruct<u8, Nmiclr_SPEC>;
2335    impl Nmiclr {
2336        #[doc = "No effect"]
2337        pub const _0: Self = Self::new(0);
2338
2339        #[doc = "Clear the NMISR.NMIST flag"]
2340        pub const _1: Self = Self::new(1);
2341    }
2342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2343    pub struct Rpeclr_SPEC;
2344    pub type Rpeclr = crate::EnumBitfieldStruct<u8, Rpeclr_SPEC>;
2345    impl Rpeclr {
2346        #[doc = "No effect"]
2347        pub const _0: Self = Self::new(0);
2348
2349        #[doc = "Clear the NMISR.RPEST flag"]
2350        pub const _1: Self = Self::new(1);
2351    }
2352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2353    pub struct Reccclr_SPEC;
2354    pub type Reccclr = crate::EnumBitfieldStruct<u8, Reccclr_SPEC>;
2355    impl Reccclr {
2356        #[doc = "No effect"]
2357        pub const _0: Self = Self::new(0);
2358
2359        #[doc = "Clear the NMISR.RECCST flag"]
2360        pub const _1: Self = Self::new(1);
2361    }
2362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2363    pub struct Busmclr_SPEC;
2364    pub type Busmclr = crate::EnumBitfieldStruct<u8, Busmclr_SPEC>;
2365    impl Busmclr {
2366        #[doc = "No effect"]
2367        pub const _0: Self = Self::new(0);
2368
2369        #[doc = "Clear the NMISR.BUSMST flag"]
2370        pub const _1: Self = Self::new(1);
2371    }
2372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2373    pub struct Tzfclr_SPEC;
2374    pub type Tzfclr = crate::EnumBitfieldStruct<u8, Tzfclr_SPEC>;
2375    impl Tzfclr {
2376        #[doc = "No effect"]
2377        pub const _0: Self = Self::new(0);
2378
2379        #[doc = "Clear the NMISR.TZFCLR flag"]
2380        pub const _1: Self = Self::new(1);
2381    }
2382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2383    pub struct Cpeclr_SPEC;
2384    pub type Cpeclr = crate::EnumBitfieldStruct<u8, Cpeclr_SPEC>;
2385    impl Cpeclr {
2386        #[doc = "No effect"]
2387        pub const _0: Self = Self::new(0);
2388
2389        #[doc = "Clear the NMISR.CPECLR flag"]
2390        pub const _1: Self = Self::new(1);
2391    }
2392}
2393#[doc(hidden)]
2394#[derive(Copy, Clone, Eq, PartialEq)]
2395pub struct Nmisr_SPEC;
2396impl crate::sealed::RegSpec for Nmisr_SPEC {
2397    type DataType = u16;
2398}
2399
2400#[doc = "Non-Maskable Interrupt Status Register"]
2401pub type Nmisr = crate::RegValueT<Nmisr_SPEC>;
2402
2403impl Nmisr {
2404    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag"]
2405    #[inline(always)]
2406    pub fn iwdtst(
2407        self,
2408    ) -> crate::common::RegisterField<
2409        0,
2410        0x1,
2411        1,
2412        0,
2413        nmisr::Iwdtst,
2414        nmisr::Iwdtst,
2415        Nmisr_SPEC,
2416        crate::common::R,
2417    > {
2418        crate::common::RegisterField::<
2419            0,
2420            0x1,
2421            1,
2422            0,
2423            nmisr::Iwdtst,
2424            nmisr::Iwdtst,
2425            Nmisr_SPEC,
2426            crate::common::R,
2427        >::from_register(self, 0)
2428    }
2429
2430    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag"]
2431    #[inline(always)]
2432    pub fn wdtst(
2433        self,
2434    ) -> crate::common::RegisterField<
2435        1,
2436        0x1,
2437        1,
2438        0,
2439        nmisr::Wdtst,
2440        nmisr::Wdtst,
2441        Nmisr_SPEC,
2442        crate::common::R,
2443    > {
2444        crate::common::RegisterField::<
2445            1,
2446            0x1,
2447            1,
2448            0,
2449            nmisr::Wdtst,
2450            nmisr::Wdtst,
2451            Nmisr_SPEC,
2452            crate::common::R,
2453        >::from_register(self, 0)
2454    }
2455
2456    #[doc = "Voltage Monitor 1 Interrupt Status Flag"]
2457    #[inline(always)]
2458    pub fn lvd1st(
2459        self,
2460    ) -> crate::common::RegisterField<
2461        2,
2462        0x1,
2463        1,
2464        0,
2465        nmisr::Lvd1St,
2466        nmisr::Lvd1St,
2467        Nmisr_SPEC,
2468        crate::common::R,
2469    > {
2470        crate::common::RegisterField::<
2471            2,
2472            0x1,
2473            1,
2474            0,
2475            nmisr::Lvd1St,
2476            nmisr::Lvd1St,
2477            Nmisr_SPEC,
2478            crate::common::R,
2479        >::from_register(self, 0)
2480    }
2481
2482    #[doc = "Voltage Monitor 2 Interrupt Status Flag"]
2483    #[inline(always)]
2484    pub fn lvd2st(
2485        self,
2486    ) -> crate::common::RegisterField<
2487        3,
2488        0x1,
2489        1,
2490        0,
2491        nmisr::Lvd2St,
2492        nmisr::Lvd2St,
2493        Nmisr_SPEC,
2494        crate::common::R,
2495    > {
2496        crate::common::RegisterField::<
2497            3,
2498            0x1,
2499            1,
2500            0,
2501            nmisr::Lvd2St,
2502            nmisr::Lvd2St,
2503            Nmisr_SPEC,
2504            crate::common::R,
2505        >::from_register(self, 0)
2506    }
2507
2508    #[doc = "Main Clock Oscillation Stop Detection Interrupt Status Flag"]
2509    #[inline(always)]
2510    pub fn ostst(
2511        self,
2512    ) -> crate::common::RegisterField<
2513        6,
2514        0x1,
2515        1,
2516        0,
2517        nmisr::Ostst,
2518        nmisr::Ostst,
2519        Nmisr_SPEC,
2520        crate::common::R,
2521    > {
2522        crate::common::RegisterField::<
2523            6,
2524            0x1,
2525            1,
2526            0,
2527            nmisr::Ostst,
2528            nmisr::Ostst,
2529            Nmisr_SPEC,
2530            crate::common::R,
2531        >::from_register(self, 0)
2532    }
2533
2534    #[doc = "NMI Pin Interrupt Status Flag"]
2535    #[inline(always)]
2536    pub fn nmist(
2537        self,
2538    ) -> crate::common::RegisterField<
2539        7,
2540        0x1,
2541        1,
2542        0,
2543        nmisr::Nmist,
2544        nmisr::Nmist,
2545        Nmisr_SPEC,
2546        crate::common::R,
2547    > {
2548        crate::common::RegisterField::<
2549            7,
2550            0x1,
2551            1,
2552            0,
2553            nmisr::Nmist,
2554            nmisr::Nmist,
2555            Nmisr_SPEC,
2556            crate::common::R,
2557        >::from_register(self, 0)
2558    }
2559
2560    #[doc = "SRAM Parity Error Interrupt Status Flag"]
2561    #[inline(always)]
2562    pub fn rpest(
2563        self,
2564    ) -> crate::common::RegisterField<
2565        8,
2566        0x1,
2567        1,
2568        0,
2569        nmisr::Rpest,
2570        nmisr::Rpest,
2571        Nmisr_SPEC,
2572        crate::common::R,
2573    > {
2574        crate::common::RegisterField::<
2575            8,
2576            0x1,
2577            1,
2578            0,
2579            nmisr::Rpest,
2580            nmisr::Rpest,
2581            Nmisr_SPEC,
2582            crate::common::R,
2583        >::from_register(self, 0)
2584    }
2585
2586    #[doc = "SRAM ECC Error Interrupt Status Flag"]
2587    #[inline(always)]
2588    pub fn reccst(
2589        self,
2590    ) -> crate::common::RegisterField<
2591        9,
2592        0x1,
2593        1,
2594        0,
2595        nmisr::Reccst,
2596        nmisr::Reccst,
2597        Nmisr_SPEC,
2598        crate::common::R,
2599    > {
2600        crate::common::RegisterField::<
2601            9,
2602            0x1,
2603            1,
2604            0,
2605            nmisr::Reccst,
2606            nmisr::Reccst,
2607            Nmisr_SPEC,
2608            crate::common::R,
2609        >::from_register(self, 0)
2610    }
2611
2612    #[doc = "Bus Master MPU Error Interrupt Status Flag"]
2613    #[inline(always)]
2614    pub fn busmst(
2615        self,
2616    ) -> crate::common::RegisterField<
2617        11,
2618        0x1,
2619        1,
2620        0,
2621        nmisr::Busmst,
2622        nmisr::Busmst,
2623        Nmisr_SPEC,
2624        crate::common::R,
2625    > {
2626        crate::common::RegisterField::<
2627            11,
2628            0x1,
2629            1,
2630            0,
2631            nmisr::Busmst,
2632            nmisr::Busmst,
2633            Nmisr_SPEC,
2634            crate::common::R,
2635        >::from_register(self, 0)
2636    }
2637
2638    #[inline(always)]
2639    pub fn tzfst(
2640        self,
2641    ) -> crate::common::RegisterField<
2642        13,
2643        0x1,
2644        1,
2645        0,
2646        nmisr::Tzfst,
2647        nmisr::Tzfst,
2648        Nmisr_SPEC,
2649        crate::common::R,
2650    > {
2651        crate::common::RegisterField::<
2652            13,
2653            0x1,
2654            1,
2655            0,
2656            nmisr::Tzfst,
2657            nmisr::Tzfst,
2658            Nmisr_SPEC,
2659            crate::common::R,
2660        >::from_register(self, 0)
2661    }
2662
2663    #[inline(always)]
2664    pub fn cpest(
2665        self,
2666    ) -> crate::common::RegisterField<
2667        15,
2668        0x1,
2669        1,
2670        0,
2671        nmisr::Cpest,
2672        nmisr::Cpest,
2673        Nmisr_SPEC,
2674        crate::common::R,
2675    > {
2676        crate::common::RegisterField::<
2677            15,
2678            0x1,
2679            1,
2680            0,
2681            nmisr::Cpest,
2682            nmisr::Cpest,
2683            Nmisr_SPEC,
2684            crate::common::R,
2685        >::from_register(self, 0)
2686    }
2687}
2688impl ::core::default::Default for Nmisr {
2689    #[inline(always)]
2690    fn default() -> Nmisr {
2691        <crate::RegValueT<Nmisr_SPEC> as RegisterValue<_>>::new(0)
2692    }
2693}
2694pub mod nmisr {
2695
2696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2697    pub struct Iwdtst_SPEC;
2698    pub type Iwdtst = crate::EnumBitfieldStruct<u8, Iwdtst_SPEC>;
2699    impl Iwdtst {
2700        #[doc = "Interrupt not requested"]
2701        pub const _0: Self = Self::new(0);
2702
2703        #[doc = "Interrupt requested"]
2704        pub const _1: Self = Self::new(1);
2705    }
2706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2707    pub struct Wdtst_SPEC;
2708    pub type Wdtst = crate::EnumBitfieldStruct<u8, Wdtst_SPEC>;
2709    impl Wdtst {
2710        #[doc = "Interrupt not requested"]
2711        pub const _0: Self = Self::new(0);
2712
2713        #[doc = "Interrupt requested"]
2714        pub const _1: Self = Self::new(1);
2715    }
2716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2717    pub struct Lvd1St_SPEC;
2718    pub type Lvd1St = crate::EnumBitfieldStruct<u8, Lvd1St_SPEC>;
2719    impl Lvd1St {
2720        #[doc = "Interrupt not requested"]
2721        pub const _0: Self = Self::new(0);
2722
2723        #[doc = "Interrupt requested"]
2724        pub const _1: Self = Self::new(1);
2725    }
2726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2727    pub struct Lvd2St_SPEC;
2728    pub type Lvd2St = crate::EnumBitfieldStruct<u8, Lvd2St_SPEC>;
2729    impl Lvd2St {
2730        #[doc = "Interrupt not requested"]
2731        pub const _0: Self = Self::new(0);
2732
2733        #[doc = "Interrupt requested"]
2734        pub const _1: Self = Self::new(1);
2735    }
2736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2737    pub struct Ostst_SPEC;
2738    pub type Ostst = crate::EnumBitfieldStruct<u8, Ostst_SPEC>;
2739    impl Ostst {
2740        #[doc = "Interrupt not requested for main clock oscillation stop"]
2741        pub const _0: Self = Self::new(0);
2742
2743        #[doc = "Interrupt requested for main clock oscillation stop"]
2744        pub const _1: Self = Self::new(1);
2745    }
2746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2747    pub struct Nmist_SPEC;
2748    pub type Nmist = crate::EnumBitfieldStruct<u8, Nmist_SPEC>;
2749    impl Nmist {
2750        #[doc = "Interrupt not requested"]
2751        pub const _0: Self = Self::new(0);
2752
2753        #[doc = "Interrupt requested"]
2754        pub const _1: Self = Self::new(1);
2755    }
2756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2757    pub struct Rpest_SPEC;
2758    pub type Rpest = crate::EnumBitfieldStruct<u8, Rpest_SPEC>;
2759    impl Rpest {
2760        #[doc = "Interrupt not requested"]
2761        pub const _0: Self = Self::new(0);
2762
2763        #[doc = "Interrupt requested"]
2764        pub const _1: Self = Self::new(1);
2765    }
2766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2767    pub struct Reccst_SPEC;
2768    pub type Reccst = crate::EnumBitfieldStruct<u8, Reccst_SPEC>;
2769    impl Reccst {
2770        #[doc = "Interrupt not requested"]
2771        pub const _0: Self = Self::new(0);
2772
2773        #[doc = "Interrupt requested"]
2774        pub const _1: Self = Self::new(1);
2775    }
2776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2777    pub struct Busmst_SPEC;
2778    pub type Busmst = crate::EnumBitfieldStruct<u8, Busmst_SPEC>;
2779    impl Busmst {
2780        #[doc = "Interrupt not requested"]
2781        pub const _0: Self = Self::new(0);
2782
2783        #[doc = "Interrupt requested"]
2784        pub const _1: Self = Self::new(1);
2785    }
2786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2787    pub struct Tzfst_SPEC;
2788    pub type Tzfst = crate::EnumBitfieldStruct<u8, Tzfst_SPEC>;
2789    impl Tzfst {
2790        #[doc = "Interrupt not requested"]
2791        pub const _0: Self = Self::new(0);
2792
2793        #[doc = "Interrupt requested"]
2794        pub const _1: Self = Self::new(1);
2795    }
2796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797    pub struct Cpest_SPEC;
2798    pub type Cpest = crate::EnumBitfieldStruct<u8, Cpest_SPEC>;
2799    impl Cpest {
2800        #[doc = "Interrupt not requested"]
2801        pub const _0: Self = Self::new(0);
2802
2803        #[doc = "Interrupt requested"]
2804        pub const _1: Self = Self::new(1);
2805    }
2806}
2807#[doc(hidden)]
2808#[derive(Copy, Clone, Eq, PartialEq)]
2809pub struct Wupen0_SPEC;
2810impl crate::sealed::RegSpec for Wupen0_SPEC {
2811    type DataType = u32;
2812}
2813
2814#[doc = "Wake Up Interrupt Enable Register 0"]
2815pub type Wupen0 = crate::RegValueT<Wupen0_SPEC>;
2816
2817impl Wupen0 {
2818    #[doc = "IRQn Interrupt Software Standby/Snooze Mode Returns Enable bit (n = 0 to 15)"]
2819    #[inline(always)]
2820    pub fn irqwupen(
2821        self,
2822    ) -> crate::common::RegisterField<
2823        0,
2824        0x7fff,
2825        1,
2826        0,
2827        wupen0::Irqwupen,
2828        wupen0::Irqwupen,
2829        Wupen0_SPEC,
2830        crate::common::RW,
2831    > {
2832        crate::common::RegisterField::<
2833            0,
2834            0x7fff,
2835            1,
2836            0,
2837            wupen0::Irqwupen,
2838            wupen0::Irqwupen,
2839            Wupen0_SPEC,
2840            crate::common::RW,
2841        >::from_register(self, 0)
2842    }
2843
2844    #[doc = "IWDT Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2845    #[inline(always)]
2846    pub fn iwdtwupen(
2847        self,
2848    ) -> crate::common::RegisterField<
2849        16,
2850        0x1,
2851        1,
2852        0,
2853        wupen0::Iwdtwupen,
2854        wupen0::Iwdtwupen,
2855        Wupen0_SPEC,
2856        crate::common::RW,
2857    > {
2858        crate::common::RegisterField::<
2859            16,
2860            0x1,
2861            1,
2862            0,
2863            wupen0::Iwdtwupen,
2864            wupen0::Iwdtwupen,
2865            Wupen0_SPEC,
2866            crate::common::RW,
2867        >::from_register(self, 0)
2868    }
2869
2870    #[doc = "LVD1 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2871    #[inline(always)]
2872    pub fn lvd1wupen(
2873        self,
2874    ) -> crate::common::RegisterField<
2875        18,
2876        0x1,
2877        1,
2878        0,
2879        wupen0::Lvd1Wupen,
2880        wupen0::Lvd1Wupen,
2881        Wupen0_SPEC,
2882        crate::common::RW,
2883    > {
2884        crate::common::RegisterField::<
2885            18,
2886            0x1,
2887            1,
2888            0,
2889            wupen0::Lvd1Wupen,
2890            wupen0::Lvd1Wupen,
2891            Wupen0_SPEC,
2892            crate::common::RW,
2893        >::from_register(self, 0)
2894    }
2895
2896    #[doc = "LVD2 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2897    #[inline(always)]
2898    pub fn lvd2wupen(
2899        self,
2900    ) -> crate::common::RegisterField<
2901        19,
2902        0x1,
2903        1,
2904        0,
2905        wupen0::Lvd2Wupen,
2906        wupen0::Lvd2Wupen,
2907        Wupen0_SPEC,
2908        crate::common::RW,
2909    > {
2910        crate::common::RegisterField::<
2911            19,
2912            0x1,
2913            1,
2914            0,
2915            wupen0::Lvd2Wupen,
2916            wupen0::Lvd2Wupen,
2917            Wupen0_SPEC,
2918            crate::common::RW,
2919        >::from_register(self, 0)
2920    }
2921
2922    #[doc = "RTC Alarm Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2923    #[inline(always)]
2924    pub fn rtcalmwupen(
2925        self,
2926    ) -> crate::common::RegisterField<
2927        24,
2928        0x1,
2929        1,
2930        0,
2931        wupen0::Rtcalmwupen,
2932        wupen0::Rtcalmwupen,
2933        Wupen0_SPEC,
2934        crate::common::RW,
2935    > {
2936        crate::common::RegisterField::<
2937            24,
2938            0x1,
2939            1,
2940            0,
2941            wupen0::Rtcalmwupen,
2942            wupen0::Rtcalmwupen,
2943            Wupen0_SPEC,
2944            crate::common::RW,
2945        >::from_register(self, 0)
2946    }
2947
2948    #[doc = "RTC Period Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2949    #[inline(always)]
2950    pub fn rtcprdwupen(
2951        self,
2952    ) -> crate::common::RegisterField<
2953        25,
2954        0x1,
2955        1,
2956        0,
2957        wupen0::Rtcprdwupen,
2958        wupen0::Rtcprdwupen,
2959        Wupen0_SPEC,
2960        crate::common::RW,
2961    > {
2962        crate::common::RegisterField::<
2963            25,
2964            0x1,
2965            1,
2966            0,
2967            wupen0::Rtcprdwupen,
2968            wupen0::Rtcprdwupen,
2969            Wupen0_SPEC,
2970            crate::common::RW,
2971        >::from_register(self, 0)
2972    }
2973
2974    #[doc = "USBFS0 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
2975    #[inline(always)]
2976    pub fn usbfs0wupen(
2977        self,
2978    ) -> crate::common::RegisterField<
2979        27,
2980        0x1,
2981        1,
2982        0,
2983        wupen0::Usbfs0Wupen,
2984        wupen0::Usbfs0Wupen,
2985        Wupen0_SPEC,
2986        crate::common::RW,
2987    > {
2988        crate::common::RegisterField::<
2989            27,
2990            0x1,
2991            1,
2992            0,
2993            wupen0::Usbfs0Wupen,
2994            wupen0::Usbfs0Wupen,
2995            Wupen0_SPEC,
2996            crate::common::RW,
2997        >::from_register(self, 0)
2998    }
2999
3000    #[doc = "AGT1 Underflow Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3001    #[inline(always)]
3002    pub fn agt1udwupen(
3003        self,
3004    ) -> crate::common::RegisterField<
3005        28,
3006        0x1,
3007        1,
3008        0,
3009        wupen0::Agt1Udwupen,
3010        wupen0::Agt1Udwupen,
3011        Wupen0_SPEC,
3012        crate::common::RW,
3013    > {
3014        crate::common::RegisterField::<
3015            28,
3016            0x1,
3017            1,
3018            0,
3019            wupen0::Agt1Udwupen,
3020            wupen0::Agt1Udwupen,
3021            Wupen0_SPEC,
3022            crate::common::RW,
3023        >::from_register(self, 0)
3024    }
3025
3026    #[doc = "AGT1 Compare Match A Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3027    #[inline(always)]
3028    pub fn agt1cawupen(
3029        self,
3030    ) -> crate::common::RegisterField<
3031        29,
3032        0x1,
3033        1,
3034        0,
3035        wupen0::Agt1Cawupen,
3036        wupen0::Agt1Cawupen,
3037        Wupen0_SPEC,
3038        crate::common::RW,
3039    > {
3040        crate::common::RegisterField::<
3041            29,
3042            0x1,
3043            1,
3044            0,
3045            wupen0::Agt1Cawupen,
3046            wupen0::Agt1Cawupen,
3047            Wupen0_SPEC,
3048            crate::common::RW,
3049        >::from_register(self, 0)
3050    }
3051
3052    #[doc = "AGT1 Compare Match B Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3053    #[inline(always)]
3054    pub fn agt1cbwupen(
3055        self,
3056    ) -> crate::common::RegisterField<
3057        30,
3058        0x1,
3059        1,
3060        0,
3061        wupen0::Agt1Cbwupen,
3062        wupen0::Agt1Cbwupen,
3063        Wupen0_SPEC,
3064        crate::common::RW,
3065    > {
3066        crate::common::RegisterField::<
3067            30,
3068            0x1,
3069            1,
3070            0,
3071            wupen0::Agt1Cbwupen,
3072            wupen0::Agt1Cbwupen,
3073            Wupen0_SPEC,
3074            crate::common::RW,
3075        >::from_register(self, 0)
3076    }
3077}
3078impl ::core::default::Default for Wupen0 {
3079    #[inline(always)]
3080    fn default() -> Wupen0 {
3081        <crate::RegValueT<Wupen0_SPEC> as RegisterValue<_>>::new(0)
3082    }
3083}
3084pub mod wupen0 {
3085
3086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3087    pub struct Irqwupen_SPEC;
3088    pub type Irqwupen = crate::EnumBitfieldStruct<u8, Irqwupen_SPEC>;
3089    impl Irqwupen {
3090        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is disabled"]
3091        pub const _0: Self = Self::new(0);
3092
3093        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is enabled"]
3094        pub const _1: Self = Self::new(1);
3095    }
3096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3097    pub struct Iwdtwupen_SPEC;
3098    pub type Iwdtwupen = crate::EnumBitfieldStruct<u8, Iwdtwupen_SPEC>;
3099    impl Iwdtwupen {
3100        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is disabled"]
3101        pub const _0: Self = Self::new(0);
3102
3103        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is enabled"]
3104        pub const _1: Self = Self::new(1);
3105    }
3106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3107    pub struct Lvd1Wupen_SPEC;
3108    pub type Lvd1Wupen = crate::EnumBitfieldStruct<u8, Lvd1Wupen_SPEC>;
3109    impl Lvd1Wupen {
3110        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is disabled"]
3111        pub const _0: Self = Self::new(0);
3112
3113        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is enabled"]
3114        pub const _1: Self = Self::new(1);
3115    }
3116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3117    pub struct Lvd2Wupen_SPEC;
3118    pub type Lvd2Wupen = crate::EnumBitfieldStruct<u8, Lvd2Wupen_SPEC>;
3119    impl Lvd2Wupen {
3120        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is disabled"]
3121        pub const _0: Self = Self::new(0);
3122
3123        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is enabled"]
3124        pub const _1: Self = Self::new(1);
3125    }
3126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3127    pub struct Rtcalmwupen_SPEC;
3128    pub type Rtcalmwupen = crate::EnumBitfieldStruct<u8, Rtcalmwupen_SPEC>;
3129    impl Rtcalmwupen {
3130        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is disabled"]
3131        pub const _0: Self = Self::new(0);
3132
3133        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is enabled"]
3134        pub const _1: Self = Self::new(1);
3135    }
3136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3137    pub struct Rtcprdwupen_SPEC;
3138    pub type Rtcprdwupen = crate::EnumBitfieldStruct<u8, Rtcprdwupen_SPEC>;
3139    impl Rtcprdwupen {
3140        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is disabled"]
3141        pub const _0: Self = Self::new(0);
3142
3143        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is enabled"]
3144        pub const _1: Self = Self::new(1);
3145    }
3146    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3147    pub struct Usbfs0Wupen_SPEC;
3148    pub type Usbfs0Wupen = crate::EnumBitfieldStruct<u8, Usbfs0Wupen_SPEC>;
3149    impl Usbfs0Wupen {
3150        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is disabled"]
3151        pub const _0: Self = Self::new(0);
3152
3153        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is enabled"]
3154        pub const _1: Self = Self::new(1);
3155    }
3156    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3157    pub struct Agt1Udwupen_SPEC;
3158    pub type Agt1Udwupen = crate::EnumBitfieldStruct<u8, Agt1Udwupen_SPEC>;
3159    impl Agt1Udwupen {
3160        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is disabled"]
3161        pub const _0: Self = Self::new(0);
3162
3163        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is enabled"]
3164        pub const _1: Self = Self::new(1);
3165    }
3166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3167    pub struct Agt1Cawupen_SPEC;
3168    pub type Agt1Cawupen = crate::EnumBitfieldStruct<u8, Agt1Cawupen_SPEC>;
3169    impl Agt1Cawupen {
3170        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is disabled"]
3171        pub const _0: Self = Self::new(0);
3172
3173        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is enabled"]
3174        pub const _1: Self = Self::new(1);
3175    }
3176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3177    pub struct Agt1Cbwupen_SPEC;
3178    pub type Agt1Cbwupen = crate::EnumBitfieldStruct<u8, Agt1Cbwupen_SPEC>;
3179    impl Agt1Cbwupen {
3180        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is disabled"]
3181        pub const _0: Self = Self::new(0);
3182
3183        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is enabled"]
3184        pub const _1: Self = Self::new(1);
3185    }
3186}
3187#[doc(hidden)]
3188#[derive(Copy, Clone, Eq, PartialEq)]
3189pub struct Wupen1_SPEC;
3190impl crate::sealed::RegSpec for Wupen1_SPEC {
3191    type DataType = u32;
3192}
3193
3194#[doc = "Wake Up Interrupt Enable Register 1"]
3195pub type Wupen1 = crate::RegValueT<Wupen1_SPEC>;
3196
3197impl Wupen1 {
3198    #[doc = "I3C Address Match Interrupt Software Standby/Snooze Mode Returns Enable bit"]
3199    #[inline(always)]
3200    pub fn i3cwupen(
3201        self,
3202    ) -> crate::common::RegisterField<
3203        11,
3204        0x1,
3205        1,
3206        0,
3207        wupen1::I3Cwupen,
3208        wupen1::I3Cwupen,
3209        Wupen1_SPEC,
3210        crate::common::RW,
3211    > {
3212        crate::common::RegisterField::<
3213            11,
3214            0x1,
3215            1,
3216            0,
3217            wupen1::I3Cwupen,
3218            wupen1::I3Cwupen,
3219            Wupen1_SPEC,
3220            crate::common::RW,
3221        >::from_register(self, 0)
3222    }
3223}
3224impl ::core::default::Default for Wupen1 {
3225    #[inline(always)]
3226    fn default() -> Wupen1 {
3227        <crate::RegValueT<Wupen1_SPEC> as RegisterValue<_>>::new(0)
3228    }
3229}
3230pub mod wupen1 {
3231
3232    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3233    pub struct I3Cwupen_SPEC;
3234    pub type I3Cwupen = crate::EnumBitfieldStruct<u8, I3Cwupen_SPEC>;
3235    impl I3Cwupen {
3236        #[doc = "Software Standby/Snooze Mode returns by I3C address match interrupt is disabled"]
3237        pub const _0: Self = Self::new(0);
3238
3239        #[doc = "Software Standby/Snooze Mode returns by I3C address match interrupt is enabled"]
3240        pub const _1: Self = Self::new(1);
3241    }
3242}
3243#[doc(hidden)]
3244#[derive(Copy, Clone, Eq, PartialEq)]
3245pub struct Selsr0_SPEC;
3246impl crate::sealed::RegSpec for Selsr0_SPEC {
3247    type DataType = u16;
3248}
3249
3250#[doc = "SYS Event Link Setting Register"]
3251pub type Selsr0 = crate::RegValueT<Selsr0_SPEC>;
3252
3253impl NoBitfieldReg<Selsr0_SPEC> for Selsr0 {}
3254impl ::core::default::Default for Selsr0 {
3255    #[inline(always)]
3256    fn default() -> Selsr0 {
3257        <crate::RegValueT<Selsr0_SPEC> as RegisterValue<_>>::new(0)
3258    }
3259}
3260
3261#[doc(hidden)]
3262#[derive(Copy, Clone, Eq, PartialEq)]
3263pub struct Delsr_SPEC;
3264impl crate::sealed::RegSpec for Delsr_SPEC {
3265    type DataType = u32;
3266}
3267
3268#[doc = "DMAC Event Link Setting Register %s"]
3269pub type Delsr = crate::RegValueT<Delsr_SPEC>;
3270
3271impl Delsr {
3272    #[doc = "DMAC Event Link Select"]
3273    #[inline(always)]
3274    pub fn dels(
3275        self,
3276    ) -> crate::common::RegisterField<
3277        0,
3278        0x1ff,
3279        1,
3280        0,
3281        delsr::Dels,
3282        delsr::Dels,
3283        Delsr_SPEC,
3284        crate::common::RW,
3285    > {
3286        crate::common::RegisterField::<
3287            0,
3288            0x1ff,
3289            1,
3290            0,
3291            delsr::Dels,
3292            delsr::Dels,
3293            Delsr_SPEC,
3294            crate::common::RW,
3295        >::from_register(self, 0)
3296    }
3297
3298    #[doc = "DMAC Activation Request Status Flag"]
3299    #[inline(always)]
3300    pub fn ir(
3301        self,
3302    ) -> crate::common::RegisterField<
3303        16,
3304        0x1,
3305        1,
3306        0,
3307        delsr::Ir,
3308        delsr::Ir,
3309        Delsr_SPEC,
3310        crate::common::RW,
3311    > {
3312        crate::common::RegisterField::<
3313            16,
3314            0x1,
3315            1,
3316            0,
3317            delsr::Ir,
3318            delsr::Ir,
3319            Delsr_SPEC,
3320            crate::common::RW,
3321        >::from_register(self, 0)
3322    }
3323}
3324impl ::core::default::Default for Delsr {
3325    #[inline(always)]
3326    fn default() -> Delsr {
3327        <crate::RegValueT<Delsr_SPEC> as RegisterValue<_>>::new(0)
3328    }
3329}
3330pub mod delsr {
3331
3332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3333    pub struct Dels_SPEC;
3334    pub type Dels = crate::EnumBitfieldStruct<u8, Dels_SPEC>;
3335    impl Dels {
3336        #[doc = "Disable interrupts to the associated DMAC module."]
3337        pub const _0_X_00: Self = Self::new(0);
3338
3339        #[doc = "Event signal number to be linked. For details, see ."]
3340        pub const OTHERS: Self = Self::new(0);
3341    }
3342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3343    pub struct Ir_SPEC;
3344    pub type Ir = crate::EnumBitfieldStruct<u8, Ir_SPEC>;
3345    impl Ir {
3346        #[doc = "No DMAC activation request occurred."]
3347        pub const _0: Self = Self::new(0);
3348
3349        #[doc = "DMAC activation request occurred."]
3350        pub const _1: Self = Self::new(1);
3351    }
3352}
3353#[doc(hidden)]
3354#[derive(Copy, Clone, Eq, PartialEq)]
3355pub struct Ielsr_SPEC;
3356impl crate::sealed::RegSpec for Ielsr_SPEC {
3357    type DataType = u32;
3358}
3359
3360#[doc = "ICU Event Link Setting Register %s"]
3361pub type Ielsr = crate::RegValueT<Ielsr_SPEC>;
3362
3363impl NoBitfieldReg<Ielsr_SPEC> for Ielsr {}
3364impl ::core::default::Default for Ielsr {
3365    #[inline(always)]
3366    fn default() -> Ielsr {
3367        <crate::RegValueT<Ielsr_SPEC> as RegisterValue<_>>::new(0)
3368    }
3369}
ra4e2_pac/icu.rs

ra4e2_pac/
icu.rs
