1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"I3C Bus Interface"]
28unsafe impl ::core::marker::Send for super::I3C {}
29unsafe impl ::core::marker::Sync for super::I3C {}
30impl super::I3C {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Protocol Selection Register"]
38 #[inline(always)]
39 pub const fn prts(&self) -> &'static crate::common::Reg<self::Prts_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Prts_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Clock Enable Control Resisters"]
48 #[inline(always)]
49 pub const fn cectl(&self) -> &'static crate::common::Reg<self::Cectl_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Cectl_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(16usize),
53 )
54 }
55 }
56
57 #[doc = "Bus Control Register"]
58 #[inline(always)]
59 pub const fn bctl(&self) -> &'static crate::common::Reg<self::Bctl_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Bctl_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(20usize),
63 )
64 }
65 }
66
67 #[doc = "Master Device Address Register"]
68 #[inline(always)]
69 pub const fn msdvad(
70 &self,
71 ) -> &'static crate::common::Reg<self::Msdvad_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Msdvad_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(24usize),
75 )
76 }
77 }
78
79 #[doc = "Reset Control Register"]
80 #[inline(always)]
81 pub const fn rstctl(
82 &self,
83 ) -> &'static crate::common::Reg<self::Rstctl_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Rstctl_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(32usize),
87 )
88 }
89 }
90
91 #[doc = "Present State Register"]
92 #[inline(always)]
93 pub const fn prsst(&self) -> &'static crate::common::Reg<self::Prsst_SPEC, crate::common::RW> {
94 unsafe {
95 crate::common::Reg::<self::Prsst_SPEC, crate::common::RW>::from_ptr(
96 self._svd2pac_as_ptr().add(36usize),
97 )
98 }
99 }
100
101 #[doc = "Internal Status Register"]
102 #[inline(always)]
103 pub const fn inst(&self) -> &'static crate::common::Reg<self::Inst_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::Inst_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(48usize),
107 )
108 }
109 }
110
111 #[doc = "Internal Status Enable Register"]
112 #[inline(always)]
113 pub const fn inste(&self) -> &'static crate::common::Reg<self::Inste_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Inste_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(52usize),
117 )
118 }
119 }
120
121 #[doc = "Internal Interrupt Enable Register"]
122 #[inline(always)]
123 pub const fn inie(&self) -> &'static crate::common::Reg<self::Inie_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Inie_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(56usize),
127 )
128 }
129 }
130
131 #[doc = "Internal Status Force Register"]
132 #[inline(always)]
133 pub const fn instfc(&self) -> &'static crate::common::Reg<self::Instfc_SPEC, crate::common::W> {
134 unsafe {
135 crate::common::Reg::<self::Instfc_SPEC, crate::common::W>::from_ptr(
136 self._svd2pac_as_ptr().add(60usize),
137 )
138 }
139 }
140
141 #[doc = "Device Characteristic Table Register"]
142 #[inline(always)]
143 pub const fn dvct(&self) -> &'static crate::common::Reg<self::Dvct_SPEC, crate::common::R> {
144 unsafe {
145 crate::common::Reg::<self::Dvct_SPEC, crate::common::R>::from_ptr(
146 self._svd2pac_as_ptr().add(68usize),
147 )
148 }
149 }
150
151 #[doc = "IBI Notify Control Register"]
152 #[inline(always)]
153 pub const fn ibinctl(
154 &self,
155 ) -> &'static crate::common::Reg<self::Ibinctl_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Ibinctl_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(88usize),
159 )
160 }
161 }
162
163 #[doc = "Bus Function Control Register"]
164 #[inline(always)]
165 pub const fn bfctl(&self) -> &'static crate::common::Reg<self::Bfctl_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Bfctl_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(96usize),
169 )
170 }
171 }
172
173 #[doc = "Slave Control Register"]
174 #[inline(always)]
175 pub const fn svctl(&self) -> &'static crate::common::Reg<self::Svctl_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Svctl_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(100usize),
179 )
180 }
181 }
182
183 #[doc = "Reference Clock Control Register"]
184 #[inline(always)]
185 pub const fn refckctl(
186 &self,
187 ) -> &'static crate::common::Reg<self::Refckctl_SPEC, crate::common::RW> {
188 unsafe {
189 crate::common::Reg::<self::Refckctl_SPEC, crate::common::RW>::from_ptr(
190 self._svd2pac_as_ptr().add(112usize),
191 )
192 }
193 }
194
195 #[doc = "Standard Bit Rate Register"]
196 #[inline(always)]
197 pub const fn stdbr(&self) -> &'static crate::common::Reg<self::Stdbr_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::Stdbr_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(116usize),
201 )
202 }
203 }
204
205 #[doc = "Extended Bit Rate Register"]
206 #[inline(always)]
207 pub const fn extbr(&self) -> &'static crate::common::Reg<self::Extbr_SPEC, crate::common::RW> {
208 unsafe {
209 crate::common::Reg::<self::Extbr_SPEC, crate::common::RW>::from_ptr(
210 self._svd2pac_as_ptr().add(120usize),
211 )
212 }
213 }
214
215 #[doc = "Bus Free Condition Detection Time Register"]
216 #[inline(always)]
217 pub const fn bfrecdt(
218 &self,
219 ) -> &'static crate::common::Reg<self::Bfrecdt_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Bfrecdt_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(124usize),
223 )
224 }
225 }
226
227 #[doc = "Bus Available Condition Detection Time Register"]
228 #[inline(always)]
229 pub const fn bavlcdt(
230 &self,
231 ) -> &'static crate::common::Reg<self::Bavlcdt_SPEC, crate::common::RW> {
232 unsafe {
233 crate::common::Reg::<self::Bavlcdt_SPEC, crate::common::RW>::from_ptr(
234 self._svd2pac_as_ptr().add(128usize),
235 )
236 }
237 }
238
239 #[doc = "Bus Idle Condition Detection Time Register"]
240 #[inline(always)]
241 pub const fn bidlcdt(
242 &self,
243 ) -> &'static crate::common::Reg<self::Bidlcdt_SPEC, crate::common::RW> {
244 unsafe {
245 crate::common::Reg::<self::Bidlcdt_SPEC, crate::common::RW>::from_ptr(
246 self._svd2pac_as_ptr().add(132usize),
247 )
248 }
249 }
250
251 #[doc = "Output Control Register"]
252 #[inline(always)]
253 pub const fn outctl(
254 &self,
255 ) -> &'static crate::common::Reg<self::Outctl_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Outctl_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(136usize),
259 )
260 }
261 }
262
263 #[doc = "Input Control Register"]
264 #[inline(always)]
265 pub const fn inctl(&self) -> &'static crate::common::Reg<self::Inctl_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::Inctl_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(140usize),
269 )
270 }
271 }
272
273 #[doc = "Timeout Control Register"]
274 #[inline(always)]
275 pub const fn tmoctl(
276 &self,
277 ) -> &'static crate::common::Reg<self::Tmoctl_SPEC, crate::common::RW> {
278 unsafe {
279 crate::common::Reg::<self::Tmoctl_SPEC, crate::common::RW>::from_ptr(
280 self._svd2pac_as_ptr().add(144usize),
281 )
282 }
283 }
284
285 #[doc = "Wake Up Unit Control Register"]
286 #[inline(always)]
287 pub const fn wuctl(&self) -> &'static crate::common::Reg<self::Wuctl_SPEC, crate::common::RW> {
288 unsafe {
289 crate::common::Reg::<self::Wuctl_SPEC, crate::common::RW>::from_ptr(
290 self._svd2pac_as_ptr().add(152usize),
291 )
292 }
293 }
294
295 #[doc = "Acknowledge Control Register"]
296 #[inline(always)]
297 pub const fn ackctl(
298 &self,
299 ) -> &'static crate::common::Reg<self::Ackctl_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Ackctl_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(160usize),
303 )
304 }
305 }
306
307 #[doc = "SCL Stretch Control Register"]
308 #[inline(always)]
309 pub const fn scstrctl(
310 &self,
311 ) -> &'static crate::common::Reg<self::Scstrctl_SPEC, crate::common::RW> {
312 unsafe {
313 crate::common::Reg::<self::Scstrctl_SPEC, crate::common::RW>::from_ptr(
314 self._svd2pac_as_ptr().add(164usize),
315 )
316 }
317 }
318
319 #[doc = "SCL Stalling Control Register"]
320 #[inline(always)]
321 pub const fn scstlctl(
322 &self,
323 ) -> &'static crate::common::Reg<self::Scstlctl_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Scstlctl_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(176usize),
327 )
328 }
329 }
330
331 #[doc = "Slave Transfer Data Length Register 0"]
332 #[inline(always)]
333 pub const fn svtdlg0(
334 &self,
335 ) -> &'static crate::common::Reg<self::Svtdlg0_SPEC, crate::common::RW> {
336 unsafe {
337 crate::common::Reg::<self::Svtdlg0_SPEC, crate::common::RW>::from_ptr(
338 self._svd2pac_as_ptr().add(192usize),
339 )
340 }
341 }
342
343 #[doc = "Synchronous Timing Control Register"]
344 #[inline(always)]
345 pub const fn stctl(&self) -> &'static crate::common::Reg<self::Stctl_SPEC, crate::common::RW> {
346 unsafe {
347 crate::common::Reg::<self::Stctl_SPEC, crate::common::RW>::from_ptr(
348 self._svd2pac_as_ptr().add(288usize),
349 )
350 }
351 }
352
353 #[doc = "Asynchronous Timing Control Register"]
354 #[inline(always)]
355 pub const fn atctl(&self) -> &'static crate::common::Reg<self::Atctl_SPEC, crate::common::RW> {
356 unsafe {
357 crate::common::Reg::<self::Atctl_SPEC, crate::common::RW>::from_ptr(
358 self._svd2pac_as_ptr().add(292usize),
359 )
360 }
361 }
362
363 #[doc = "Asynchronous Timing Trigger Register"]
364 #[inline(always)]
365 pub const fn attrg(&self) -> &'static crate::common::Reg<self::Attrg_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Attrg_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(296usize),
369 )
370 }
371 }
372
373 #[doc = "Asynchronous Timing Contorol Counter enable Register"]
374 #[inline(always)]
375 pub const fn atccnte(
376 &self,
377 ) -> &'static crate::common::Reg<self::Atccnte_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::Atccnte_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(300usize),
381 )
382 }
383 }
384
385 #[doc = "Condition Control Register"]
386 #[inline(always)]
387 pub const fn cndctl(
388 &self,
389 ) -> &'static crate::common::Reg<self::Cndctl_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Cndctl_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(320usize),
393 )
394 }
395 }
396
397 #[doc = "Normal Command Queue Port Register"]
398 #[inline(always)]
399 pub const fn ncmdqp(&self) -> &'static crate::common::Reg<self::Ncmdqp_SPEC, crate::common::W> {
400 unsafe {
401 crate::common::Reg::<self::Ncmdqp_SPEC, crate::common::W>::from_ptr(
402 self._svd2pac_as_ptr().add(336usize),
403 )
404 }
405 }
406
407 #[doc = "Normal Response Queue Port Register"]
408 #[inline(always)]
409 pub const fn nrspqp(&self) -> &'static crate::common::Reg<self::Nrspqp_SPEC, crate::common::R> {
410 unsafe {
411 crate::common::Reg::<self::Nrspqp_SPEC, crate::common::R>::from_ptr(
412 self._svd2pac_as_ptr().add(340usize),
413 )
414 }
415 }
416
417 #[doc = "Normal Transfer Data Buffer Port Register 0"]
418 #[inline(always)]
419 pub const fn ntdtbp0(
420 &self,
421 ) -> &'static crate::common::Reg<self::Ntdtbp0_SPEC, crate::common::RW> {
422 unsafe {
423 crate::common::Reg::<self::Ntdtbp0_SPEC, crate::common::RW>::from_ptr(
424 self._svd2pac_as_ptr().add(344usize),
425 )
426 }
427 }
428
429 #[doc = "Normal Transfer Data Buffer Port Register 0"]
430 #[inline(always)]
431 pub const fn ntdtbp0_by(
432 &self,
433 ) -> &'static crate::common::Reg<self::Ntdtbp0By_SPEC, crate::common::RW> {
434 unsafe {
435 crate::common::Reg::<self::Ntdtbp0By_SPEC, crate::common::RW>::from_ptr(
436 self._svd2pac_as_ptr().add(344usize),
437 )
438 }
439 }
440
441 #[doc = "Normal IBI Queue Port Register"]
442 #[inline(always)]
443 pub const fn nibiqp(
444 &self,
445 ) -> &'static crate::common::Reg<self::Nibiqp_SPEC, crate::common::RW> {
446 unsafe {
447 crate::common::Reg::<self::Nibiqp_SPEC, crate::common::RW>::from_ptr(
448 self._svd2pac_as_ptr().add(380usize),
449 )
450 }
451 }
452
453 #[doc = "Normal Receive Status Queue Port Register"]
454 #[inline(always)]
455 pub const fn nrsqp(&self) -> &'static crate::common::Reg<self::Nrsqp_SPEC, crate::common::R> {
456 unsafe {
457 crate::common::Reg::<self::Nrsqp_SPEC, crate::common::R>::from_ptr(
458 self._svd2pac_as_ptr().add(384usize),
459 )
460 }
461 }
462
463 #[doc = "High Priority Command Queue Port Register"]
464 #[inline(always)]
465 pub const fn hcmdqp(&self) -> &'static crate::common::Reg<self::Hcmdqp_SPEC, crate::common::W> {
466 unsafe {
467 crate::common::Reg::<self::Hcmdqp_SPEC, crate::common::W>::from_ptr(
468 self._svd2pac_as_ptr().add(388usize),
469 )
470 }
471 }
472
473 #[doc = "High Priority Response Queue Port Register"]
474 #[inline(always)]
475 pub const fn hrspqp(&self) -> &'static crate::common::Reg<self::Hrspqp_SPEC, crate::common::R> {
476 unsafe {
477 crate::common::Reg::<self::Hrspqp_SPEC, crate::common::R>::from_ptr(
478 self._svd2pac_as_ptr().add(392usize),
479 )
480 }
481 }
482
483 #[doc = "High Priority Transfer Data Buffer Port Register"]
484 #[inline(always)]
485 pub const fn htdtbp(
486 &self,
487 ) -> &'static crate::common::Reg<self::Htdtbp_SPEC, crate::common::RW> {
488 unsafe {
489 crate::common::Reg::<self::Htdtbp_SPEC, crate::common::RW>::from_ptr(
490 self._svd2pac_as_ptr().add(396usize),
491 )
492 }
493 }
494
495 #[doc = "Normal Queue Threshold Control Register"]
496 #[inline(always)]
497 pub const fn nqthctl(
498 &self,
499 ) -> &'static crate::common::Reg<self::Nqthctl_SPEC, crate::common::RW> {
500 unsafe {
501 crate::common::Reg::<self::Nqthctl_SPEC, crate::common::RW>::from_ptr(
502 self._svd2pac_as_ptr().add(400usize),
503 )
504 }
505 }
506
507 #[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
508 #[inline(always)]
509 pub const fn ntbthctl0(
510 &self,
511 ) -> &'static crate::common::Reg<self::Ntbthctl0_SPEC, crate::common::RW> {
512 unsafe {
513 crate::common::Reg::<self::Ntbthctl0_SPEC, crate::common::RW>::from_ptr(
514 self._svd2pac_as_ptr().add(404usize),
515 )
516 }
517 }
518
519 #[doc = "Normal Receive Status Queue Threshold Control Register"]
520 #[inline(always)]
521 pub const fn nrqthctl(
522 &self,
523 ) -> &'static crate::common::Reg<self::Nrqthctl_SPEC, crate::common::RW> {
524 unsafe {
525 crate::common::Reg::<self::Nrqthctl_SPEC, crate::common::RW>::from_ptr(
526 self._svd2pac_as_ptr().add(448usize),
527 )
528 }
529 }
530
531 #[doc = "High Priority Queue Threshold Control Register"]
532 #[inline(always)]
533 pub const fn hqthctl(
534 &self,
535 ) -> &'static crate::common::Reg<self::Hqthctl_SPEC, crate::common::RW> {
536 unsafe {
537 crate::common::Reg::<self::Hqthctl_SPEC, crate::common::RW>::from_ptr(
538 self._svd2pac_as_ptr().add(452usize),
539 )
540 }
541 }
542
543 #[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
544 #[inline(always)]
545 pub const fn htbthctl(
546 &self,
547 ) -> &'static crate::common::Reg<self::Htbthctl_SPEC, crate::common::RW> {
548 unsafe {
549 crate::common::Reg::<self::Htbthctl_SPEC, crate::common::RW>::from_ptr(
550 self._svd2pac_as_ptr().add(456usize),
551 )
552 }
553 }
554
555 #[doc = "Bus Status Register"]
556 #[inline(always)]
557 pub const fn bst(&self) -> &'static crate::common::Reg<self::Bst_SPEC, crate::common::RW> {
558 unsafe {
559 crate::common::Reg::<self::Bst_SPEC, crate::common::RW>::from_ptr(
560 self._svd2pac_as_ptr().add(464usize),
561 )
562 }
563 }
564
565 #[doc = "Bus Status Enable Register"]
566 #[inline(always)]
567 pub const fn bste(&self) -> &'static crate::common::Reg<self::Bste_SPEC, crate::common::RW> {
568 unsafe {
569 crate::common::Reg::<self::Bste_SPEC, crate::common::RW>::from_ptr(
570 self._svd2pac_as_ptr().add(468usize),
571 )
572 }
573 }
574
575 #[doc = "Bus Interrupt Enable Register"]
576 #[inline(always)]
577 pub const fn bie(&self) -> &'static crate::common::Reg<self::Bie_SPEC, crate::common::RW> {
578 unsafe {
579 crate::common::Reg::<self::Bie_SPEC, crate::common::RW>::from_ptr(
580 self._svd2pac_as_ptr().add(472usize),
581 )
582 }
583 }
584
585 #[doc = "Bus Status Force Register"]
586 #[inline(always)]
587 pub const fn bstfc(&self) -> &'static crate::common::Reg<self::Bstfc_SPEC, crate::common::RW> {
588 unsafe {
589 crate::common::Reg::<self::Bstfc_SPEC, crate::common::RW>::from_ptr(
590 self._svd2pac_as_ptr().add(476usize),
591 )
592 }
593 }
594
595 #[doc = "Normal Transfer Status Register"]
596 #[inline(always)]
597 pub const fn ntst(&self) -> &'static crate::common::Reg<self::Ntst_SPEC, crate::common::RW> {
598 unsafe {
599 crate::common::Reg::<self::Ntst_SPEC, crate::common::RW>::from_ptr(
600 self._svd2pac_as_ptr().add(480usize),
601 )
602 }
603 }
604
605 #[doc = "Normal Transfer Status Enable Register"]
606 #[inline(always)]
607 pub const fn ntste(&self) -> &'static crate::common::Reg<self::Ntste_SPEC, crate::common::RW> {
608 unsafe {
609 crate::common::Reg::<self::Ntste_SPEC, crate::common::RW>::from_ptr(
610 self._svd2pac_as_ptr().add(484usize),
611 )
612 }
613 }
614
615 #[doc = "Normal Transfer Interrupt Enable Register"]
616 #[inline(always)]
617 pub const fn ntie(&self) -> &'static crate::common::Reg<self::Ntie_SPEC, crate::common::RW> {
618 unsafe {
619 crate::common::Reg::<self::Ntie_SPEC, crate::common::RW>::from_ptr(
620 self._svd2pac_as_ptr().add(488usize),
621 )
622 }
623 }
624
625 #[doc = "Normal Transfer Status Force Register"]
626 #[inline(always)]
627 pub const fn ntstfc(
628 &self,
629 ) -> &'static crate::common::Reg<self::Ntstfc_SPEC, crate::common::RW> {
630 unsafe {
631 crate::common::Reg::<self::Ntstfc_SPEC, crate::common::RW>::from_ptr(
632 self._svd2pac_as_ptr().add(492usize),
633 )
634 }
635 }
636
637 #[doc = "High Priority Transfer Status Register"]
638 #[inline(always)]
639 pub const fn htst(&self) -> &'static crate::common::Reg<self::Htst_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Htst_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(512usize),
643 )
644 }
645 }
646
647 #[doc = "High Priority Transfer Status Enable Register"]
648 #[inline(always)]
649 pub const fn htste(&self) -> &'static crate::common::Reg<self::Htste_SPEC, crate::common::RW> {
650 unsafe {
651 crate::common::Reg::<self::Htste_SPEC, crate::common::RW>::from_ptr(
652 self._svd2pac_as_ptr().add(516usize),
653 )
654 }
655 }
656
657 #[doc = "High Priority Transfer Interrupt Enable Register"]
658 #[inline(always)]
659 pub const fn htie(&self) -> &'static crate::common::Reg<self::Htie_SPEC, crate::common::RW> {
660 unsafe {
661 crate::common::Reg::<self::Htie_SPEC, crate::common::RW>::from_ptr(
662 self._svd2pac_as_ptr().add(520usize),
663 )
664 }
665 }
666
667 #[doc = "High Priority Transfer Status Force Register"]
668 #[inline(always)]
669 pub const fn htstfc(
670 &self,
671 ) -> &'static crate::common::Reg<self::Htstfc_SPEC, crate::common::RW> {
672 unsafe {
673 crate::common::Reg::<self::Htstfc_SPEC, crate::common::RW>::from_ptr(
674 self._svd2pac_as_ptr().add(524usize),
675 )
676 }
677 }
678
679 #[doc = "Bus Condition Status Register"]
680 #[inline(always)]
681 pub const fn bcst(&self) -> &'static crate::common::Reg<self::Bcst_SPEC, crate::common::R> {
682 unsafe {
683 crate::common::Reg::<self::Bcst_SPEC, crate::common::R>::from_ptr(
684 self._svd2pac_as_ptr().add(528usize),
685 )
686 }
687 }
688
689 #[doc = "Slave Status Register"]
690 #[inline(always)]
691 pub const fn svst(&self) -> &'static crate::common::Reg<self::Svst_SPEC, crate::common::RW> {
692 unsafe {
693 crate::common::Reg::<self::Svst_SPEC, crate::common::RW>::from_ptr(
694 self._svd2pac_as_ptr().add(532usize),
695 )
696 }
697 }
698
699 #[doc = "Wake Up Unit Operating Status Register"]
700 #[inline(always)]
701 pub const fn wust(&self) -> &'static crate::common::Reg<self::Wust_SPEC, crate::common::R> {
702 unsafe {
703 crate::common::Reg::<self::Wust_SPEC, crate::common::R>::from_ptr(
704 self._svd2pac_as_ptr().add(536usize),
705 )
706 }
707 }
708
709 #[doc = "MsyncCNT Counter Capture Register"]
710 #[inline(always)]
711 pub const fn mrccpt(&self) -> &'static crate::common::Reg<self::Mrccpt_SPEC, crate::common::R> {
712 unsafe {
713 crate::common::Reg::<self::Mrccpt_SPEC, crate::common::R>::from_ptr(
714 self._svd2pac_as_ptr().add(540usize),
715 )
716 }
717 }
718
719 #[doc = "Device Address Table Basic Register %s"]
720 #[inline(always)]
721 pub const fn datbas(
722 &self,
723 ) -> &'static crate::common::ClusterRegisterArray<
724 crate::common::Reg<self::Datbas_SPEC, crate::common::RW>,
725 8,
726 0x8,
727 > {
728 unsafe {
729 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x224usize))
730 }
731 }
732 #[inline(always)]
733 pub const fn datbas0(
734 &self,
735 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
736 unsafe {
737 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
738 self._svd2pac_as_ptr().add(0x224usize),
739 )
740 }
741 }
742 #[inline(always)]
743 pub const fn datbas1(
744 &self,
745 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
746 unsafe {
747 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
748 self._svd2pac_as_ptr().add(0x22cusize),
749 )
750 }
751 }
752 #[inline(always)]
753 pub const fn datbas2(
754 &self,
755 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
756 unsafe {
757 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
758 self._svd2pac_as_ptr().add(0x234usize),
759 )
760 }
761 }
762 #[inline(always)]
763 pub const fn datbas3(
764 &self,
765 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
766 unsafe {
767 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
768 self._svd2pac_as_ptr().add(0x23cusize),
769 )
770 }
771 }
772 #[inline(always)]
773 pub const fn datbas4(
774 &self,
775 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
776 unsafe {
777 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
778 self._svd2pac_as_ptr().add(0x244usize),
779 )
780 }
781 }
782 #[inline(always)]
783 pub const fn datbas5(
784 &self,
785 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
786 unsafe {
787 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
788 self._svd2pac_as_ptr().add(0x24cusize),
789 )
790 }
791 }
792 #[inline(always)]
793 pub const fn datbas6(
794 &self,
795 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
796 unsafe {
797 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
798 self._svd2pac_as_ptr().add(0x254usize),
799 )
800 }
801 }
802 #[inline(always)]
803 pub const fn datbas7(
804 &self,
805 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
806 unsafe {
807 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
808 self._svd2pac_as_ptr().add(0x25cusize),
809 )
810 }
811 }
812
813 #[doc = "Extended Device Address Table Basic Register"]
814 #[inline(always)]
815 pub const fn exdatbas(
816 &self,
817 ) -> &'static crate::common::Reg<self::Exdatbas_SPEC, crate::common::RW> {
818 unsafe {
819 crate::common::Reg::<self::Exdatbas_SPEC, crate::common::RW>::from_ptr(
820 self._svd2pac_as_ptr().add(672usize),
821 )
822 }
823 }
824
825 #[doc = "Slave Device Address Table Basic Register 0"]
826 #[inline(always)]
827 pub const fn sdatbas0(
828 &self,
829 ) -> &'static crate::common::Reg<self::Sdatbas0_SPEC, crate::common::RW> {
830 unsafe {
831 crate::common::Reg::<self::Sdatbas0_SPEC, crate::common::RW>::from_ptr(
832 self._svd2pac_as_ptr().add(688usize),
833 )
834 }
835 }
836
837 #[doc = "Slave Device Address Table Basic Register 1"]
838 #[inline(always)]
839 pub const fn sdatbas1(
840 &self,
841 ) -> &'static crate::common::Reg<self::Sdatbas1_SPEC, crate::common::RW> {
842 unsafe {
843 crate::common::Reg::<self::Sdatbas1_SPEC, crate::common::RW>::from_ptr(
844 self._svd2pac_as_ptr().add(688usize),
845 )
846 }
847 }
848
849 #[doc = "Slave Device Address Table Basic Register 2"]
850 #[inline(always)]
851 pub const fn sdatbas2(
852 &self,
853 ) -> &'static crate::common::Reg<self::Sdatbas2_SPEC, crate::common::RW> {
854 unsafe {
855 crate::common::Reg::<self::Sdatbas2_SPEC, crate::common::RW>::from_ptr(
856 self._svd2pac_as_ptr().add(688usize),
857 )
858 }
859 }
860
861 #[doc = "Master Device Characteristic Table Register %s"]
862 #[inline(always)]
863 pub const fn msdct(
864 &self,
865 ) -> &'static crate::common::ClusterRegisterArray<
866 crate::common::Reg<self::Msdct_SPEC, crate::common::RW>,
867 8,
868 0x4,
869 > {
870 unsafe {
871 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2d0usize))
872 }
873 }
874 #[inline(always)]
875 pub const fn msdct0(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
876 unsafe {
877 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
878 self._svd2pac_as_ptr().add(0x2d0usize),
879 )
880 }
881 }
882 #[inline(always)]
883 pub const fn msdct1(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
884 unsafe {
885 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
886 self._svd2pac_as_ptr().add(0x2d4usize),
887 )
888 }
889 }
890 #[inline(always)]
891 pub const fn msdct2(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
892 unsafe {
893 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
894 self._svd2pac_as_ptr().add(0x2d8usize),
895 )
896 }
897 }
898 #[inline(always)]
899 pub const fn msdct3(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
900 unsafe {
901 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
902 self._svd2pac_as_ptr().add(0x2dcusize),
903 )
904 }
905 }
906 #[inline(always)]
907 pub const fn msdct4(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
908 unsafe {
909 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
910 self._svd2pac_as_ptr().add(0x2e0usize),
911 )
912 }
913 }
914 #[inline(always)]
915 pub const fn msdct5(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
916 unsafe {
917 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
918 self._svd2pac_as_ptr().add(0x2e4usize),
919 )
920 }
921 }
922 #[inline(always)]
923 pub const fn msdct6(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
924 unsafe {
925 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
926 self._svd2pac_as_ptr().add(0x2e8usize),
927 )
928 }
929 }
930 #[inline(always)]
931 pub const fn msdct7(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
932 unsafe {
933 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
934 self._svd2pac_as_ptr().add(0x2ecusize),
935 )
936 }
937 }
938
939 #[doc = "Slave Device Characteristic Table Register"]
940 #[inline(always)]
941 pub const fn svdct(&self) -> &'static crate::common::Reg<self::Svdct_SPEC, crate::common::RW> {
942 unsafe {
943 crate::common::Reg::<self::Svdct_SPEC, crate::common::RW>::from_ptr(
944 self._svd2pac_as_ptr().add(800usize),
945 )
946 }
947 }
948
949 #[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
950 #[inline(always)]
951 pub const fn sdctpidl(
952 &self,
953 ) -> &'static crate::common::Reg<self::Sdctpidl_SPEC, crate::common::RW> {
954 unsafe {
955 crate::common::Reg::<self::Sdctpidl_SPEC, crate::common::RW>::from_ptr(
956 self._svd2pac_as_ptr().add(804usize),
957 )
958 }
959 }
960
961 #[doc = "Slave Device Characteristic Table Provisional ID High Register"]
962 #[inline(always)]
963 pub const fn sdctpidh(
964 &self,
965 ) -> &'static crate::common::Reg<self::Sdctpidh_SPEC, crate::common::RW> {
966 unsafe {
967 crate::common::Reg::<self::Sdctpidh_SPEC, crate::common::RW>::from_ptr(
968 self._svd2pac_as_ptr().add(808usize),
969 )
970 }
971 }
972
973 #[doc = "Slave Device Address Register %s"]
974 #[inline(always)]
975 pub const fn svdvad(
976 &self,
977 ) -> &'static crate::common::ClusterRegisterArray<
978 crate::common::Reg<self::Svdvad_SPEC, crate::common::R>,
979 3,
980 0x4,
981 > {
982 unsafe {
983 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x330usize))
984 }
985 }
986 #[inline(always)]
987 pub const fn svdvad0(
988 &self,
989 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
990 unsafe {
991 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
992 self._svd2pac_as_ptr().add(0x330usize),
993 )
994 }
995 }
996 #[inline(always)]
997 pub const fn svdvad1(
998 &self,
999 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
1000 unsafe {
1001 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
1002 self._svd2pac_as_ptr().add(0x334usize),
1003 )
1004 }
1005 }
1006 #[inline(always)]
1007 pub const fn svdvad2(
1008 &self,
1009 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
1010 unsafe {
1011 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
1012 self._svd2pac_as_ptr().add(0x338usize),
1013 )
1014 }
1015 }
1016
1017 #[doc = "CCC Slave Events Command Register"]
1018 #[inline(always)]
1019 pub const fn csecmd(
1020 &self,
1021 ) -> &'static crate::common::Reg<self::Csecmd_SPEC, crate::common::RW> {
1022 unsafe {
1023 crate::common::Reg::<self::Csecmd_SPEC, crate::common::RW>::from_ptr(
1024 self._svd2pac_as_ptr().add(848usize),
1025 )
1026 }
1027 }
1028
1029 #[doc = "CCC Enter Activity State Register"]
1030 #[inline(always)]
1031 pub const fn ceactst(
1032 &self,
1033 ) -> &'static crate::common::Reg<self::Ceactst_SPEC, crate::common::RW> {
1034 unsafe {
1035 crate::common::Reg::<self::Ceactst_SPEC, crate::common::RW>::from_ptr(
1036 self._svd2pac_as_ptr().add(852usize),
1037 )
1038 }
1039 }
1040
1041 #[doc = "CCC Max Write Length Register"]
1042 #[inline(always)]
1043 pub const fn cmwlg(&self) -> &'static crate::common::Reg<self::Cmwlg_SPEC, crate::common::RW> {
1044 unsafe {
1045 crate::common::Reg::<self::Cmwlg_SPEC, crate::common::RW>::from_ptr(
1046 self._svd2pac_as_ptr().add(856usize),
1047 )
1048 }
1049 }
1050
1051 #[doc = "CCC Max Read Length Register"]
1052 #[inline(always)]
1053 pub const fn cmrlg(&self) -> &'static crate::common::Reg<self::Cmrlg_SPEC, crate::common::RW> {
1054 unsafe {
1055 crate::common::Reg::<self::Cmrlg_SPEC, crate::common::RW>::from_ptr(
1056 self._svd2pac_as_ptr().add(860usize),
1057 )
1058 }
1059 }
1060
1061 #[doc = "CCC Enter Test Mode Register"]
1062 #[inline(always)]
1063 pub const fn cetstmd(
1064 &self,
1065 ) -> &'static crate::common::Reg<self::Cetstmd_SPEC, crate::common::R> {
1066 unsafe {
1067 crate::common::Reg::<self::Cetstmd_SPEC, crate::common::R>::from_ptr(
1068 self._svd2pac_as_ptr().add(864usize),
1069 )
1070 }
1071 }
1072
1073 #[doc = "CCC Get Device Status Register"]
1074 #[inline(always)]
1075 pub const fn cgdvst(
1076 &self,
1077 ) -> &'static crate::common::Reg<self::Cgdvst_SPEC, crate::common::RW> {
1078 unsafe {
1079 crate::common::Reg::<self::Cgdvst_SPEC, crate::common::RW>::from_ptr(
1080 self._svd2pac_as_ptr().add(868usize),
1081 )
1082 }
1083 }
1084
1085 #[doc = "CCC Max Data Speed W (Write) Register"]
1086 #[inline(always)]
1087 pub const fn cmdspw(
1088 &self,
1089 ) -> &'static crate::common::Reg<self::Cmdspw_SPEC, crate::common::RW> {
1090 unsafe {
1091 crate::common::Reg::<self::Cmdspw_SPEC, crate::common::RW>::from_ptr(
1092 self._svd2pac_as_ptr().add(872usize),
1093 )
1094 }
1095 }
1096
1097 #[doc = "CCC Max Data Speed R (Read) Register"]
1098 #[inline(always)]
1099 pub const fn cmdspr(
1100 &self,
1101 ) -> &'static crate::common::Reg<self::Cmdspr_SPEC, crate::common::RW> {
1102 unsafe {
1103 crate::common::Reg::<self::Cmdspr_SPEC, crate::common::RW>::from_ptr(
1104 self._svd2pac_as_ptr().add(876usize),
1105 )
1106 }
1107 }
1108
1109 #[doc = "CCC Max Data Speed T (Turnaround) Register"]
1110 #[inline(always)]
1111 pub const fn cmdspt(
1112 &self,
1113 ) -> &'static crate::common::Reg<self::Cmdspt_SPEC, crate::common::RW> {
1114 unsafe {
1115 crate::common::Reg::<self::Cmdspt_SPEC, crate::common::RW>::from_ptr(
1116 self._svd2pac_as_ptr().add(880usize),
1117 )
1118 }
1119 }
1120
1121 #[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
1122 #[inline(always)]
1123 pub const fn cetsm(&self) -> &'static crate::common::Reg<self::Cetsm_SPEC, crate::common::RW> {
1124 unsafe {
1125 crate::common::Reg::<self::Cetsm_SPEC, crate::common::RW>::from_ptr(
1126 self._svd2pac_as_ptr().add(884usize),
1127 )
1128 }
1129 }
1130
1131 #[doc = "CCC Exchange Timing Support Information S (State) Register"]
1132 #[inline(always)]
1133 pub const fn cetss(&self) -> &'static crate::common::Reg<self::Cetss_SPEC, crate::common::RW> {
1134 unsafe {
1135 crate::common::Reg::<self::Cetss_SPEC, crate::common::RW>::from_ptr(
1136 self._svd2pac_as_ptr().add(888usize),
1137 )
1138 }
1139 }
1140
1141 #[doc = "Bit Count Register"]
1142 #[inline(always)]
1143 pub const fn bitcnt(&self) -> &'static crate::common::Reg<self::Bitcnt_SPEC, crate::common::R> {
1144 unsafe {
1145 crate::common::Reg::<self::Bitcnt_SPEC, crate::common::R>::from_ptr(
1146 self._svd2pac_as_ptr().add(896usize),
1147 )
1148 }
1149 }
1150
1151 #[doc = "Normal Queue Status Level Register"]
1152 #[inline(always)]
1153 pub const fn nqstlv(&self) -> &'static crate::common::Reg<self::Nqstlv_SPEC, crate::common::R> {
1154 unsafe {
1155 crate::common::Reg::<self::Nqstlv_SPEC, crate::common::R>::from_ptr(
1156 self._svd2pac_as_ptr().add(916usize),
1157 )
1158 }
1159 }
1160
1161 #[doc = "Normal Data Buffer Status Level Register 0"]
1162 #[inline(always)]
1163 pub const fn ndbstlv0(
1164 &self,
1165 ) -> &'static crate::common::Reg<self::Ndbstlv0_SPEC, crate::common::R> {
1166 unsafe {
1167 crate::common::Reg::<self::Ndbstlv0_SPEC, crate::common::R>::from_ptr(
1168 self._svd2pac_as_ptr().add(920usize),
1169 )
1170 }
1171 }
1172
1173 #[doc = "Normal Receive Status Queue Status Level Register"]
1174 #[inline(always)]
1175 pub const fn nrsqstlv(
1176 &self,
1177 ) -> &'static crate::common::Reg<self::Nrsqstlv_SPEC, crate::common::R> {
1178 unsafe {
1179 crate::common::Reg::<self::Nrsqstlv_SPEC, crate::common::R>::from_ptr(
1180 self._svd2pac_as_ptr().add(960usize),
1181 )
1182 }
1183 }
1184
1185 #[doc = "High Priority Queue Status Level Register"]
1186 #[inline(always)]
1187 pub const fn hqstlv(&self) -> &'static crate::common::Reg<self::Hqstlv_SPEC, crate::common::R> {
1188 unsafe {
1189 crate::common::Reg::<self::Hqstlv_SPEC, crate::common::R>::from_ptr(
1190 self._svd2pac_as_ptr().add(964usize),
1191 )
1192 }
1193 }
1194
1195 #[doc = "High Priority Data Buffer Status Level Register"]
1196 #[inline(always)]
1197 pub const fn hdbstlv(
1198 &self,
1199 ) -> &'static crate::common::Reg<self::Hdbstlv_SPEC, crate::common::R> {
1200 unsafe {
1201 crate::common::Reg::<self::Hdbstlv_SPEC, crate::common::R>::from_ptr(
1202 self._svd2pac_as_ptr().add(968usize),
1203 )
1204 }
1205 }
1206
1207 #[doc = "Present State Debug Register"]
1208 #[inline(always)]
1209 pub const fn prstdbg(
1210 &self,
1211 ) -> &'static crate::common::Reg<self::Prstdbg_SPEC, crate::common::R> {
1212 unsafe {
1213 crate::common::Reg::<self::Prstdbg_SPEC, crate::common::R>::from_ptr(
1214 self._svd2pac_as_ptr().add(972usize),
1215 )
1216 }
1217 }
1218
1219 #[doc = "Master Error Counters Register"]
1220 #[inline(always)]
1221 pub const fn mserrcnt(
1222 &self,
1223 ) -> &'static crate::common::Reg<self::Mserrcnt_SPEC, crate::common::R> {
1224 unsafe {
1225 crate::common::Reg::<self::Mserrcnt_SPEC, crate::common::R>::from_ptr(
1226 self._svd2pac_as_ptr().add(976usize),
1227 )
1228 }
1229 }
1230
1231 #[doc = "SC1 Capture monitor Register"]
1232 #[inline(always)]
1233 pub const fn sc1cpt(&self) -> &'static crate::common::Reg<self::Sc1Cpt_SPEC, crate::common::R> {
1234 unsafe {
1235 crate::common::Reg::<self::Sc1Cpt_SPEC, crate::common::R>::from_ptr(
1236 self._svd2pac_as_ptr().add(992usize),
1237 )
1238 }
1239 }
1240
1241 #[doc = "SC2 Capture monitor Register"]
1242 #[inline(always)]
1243 pub const fn sc2cpt(&self) -> &'static crate::common::Reg<self::Sc2Cpt_SPEC, crate::common::R> {
1244 unsafe {
1245 crate::common::Reg::<self::Sc2Cpt_SPEC, crate::common::R>::from_ptr(
1246 self._svd2pac_as_ptr().add(996usize),
1247 )
1248 }
1249 }
1250}
1251#[doc(hidden)]
1252#[derive(Copy, Clone, Eq, PartialEq)]
1253pub struct Prts_SPEC;
1254impl crate::sealed::RegSpec for Prts_SPEC {
1255 type DataType = u32;
1256}
1257
1258#[doc = "Protocol Selection Register"]
1259pub type Prts = crate::RegValueT<Prts_SPEC>;
1260
1261impl Prts {
1262 #[doc = "Protocol Mode"]
1263 #[inline(always)]
1264 pub fn prtmd(
1265 self,
1266 ) -> crate::common::RegisterField<
1267 0,
1268 0x1,
1269 1,
1270 0,
1271 prts::Prtmd,
1272 prts::Prtmd,
1273 Prts_SPEC,
1274 crate::common::RW,
1275 > {
1276 crate::common::RegisterField::<
1277 0,
1278 0x1,
1279 1,
1280 0,
1281 prts::Prtmd,
1282 prts::Prtmd,
1283 Prts_SPEC,
1284 crate::common::RW,
1285 >::from_register(self, 0)
1286 }
1287}
1288impl ::core::default::Default for Prts {
1289 #[inline(always)]
1290 fn default() -> Prts {
1291 <crate::RegValueT<Prts_SPEC> as RegisterValue<_>>::new(1)
1292 }
1293}
1294pub mod prts {
1295
1296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1297 pub struct Prtmd_SPEC;
1298 pub type Prtmd = crate::EnumBitfieldStruct<u8, Prtmd_SPEC>;
1299 impl Prtmd {
1300 #[doc = "I3C protocol mode"]
1301 pub const _0: Self = Self::new(0);
1302
1303 #[doc = "I2C protocol mode"]
1304 pub const _1: Self = Self::new(1);
1305 }
1306}
1307#[doc(hidden)]
1308#[derive(Copy, Clone, Eq, PartialEq)]
1309pub struct Cectl_SPEC;
1310impl crate::sealed::RegSpec for Cectl_SPEC {
1311 type DataType = u32;
1312}
1313
1314#[doc = "Clock Enable Control Resisters"]
1315pub type Cectl = crate::RegValueT<Cectl_SPEC>;
1316
1317impl Cectl {
1318 #[doc = "Clock Enable"]
1319 #[inline(always)]
1320 pub fn clke(
1321 self,
1322 ) -> crate::common::RegisterField<
1323 0,
1324 0x1,
1325 1,
1326 0,
1327 cectl::Clke,
1328 cectl::Clke,
1329 Cectl_SPEC,
1330 crate::common::RW,
1331 > {
1332 crate::common::RegisterField::<
1333 0,
1334 0x1,
1335 1,
1336 0,
1337 cectl::Clke,
1338 cectl::Clke,
1339 Cectl_SPEC,
1340 crate::common::RW,
1341 >::from_register(self, 0)
1342 }
1343}
1344impl ::core::default::Default for Cectl {
1345 #[inline(always)]
1346 fn default() -> Cectl {
1347 <crate::RegValueT<Cectl_SPEC> as RegisterValue<_>>::new(0)
1348 }
1349}
1350pub mod cectl {
1351
1352 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1353 pub struct Clke_SPEC;
1354 pub type Clke = crate::EnumBitfieldStruct<u8, Clke_SPEC>;
1355 impl Clke {
1356 #[doc = "Clock disable"]
1357 pub const _0: Self = Self::new(0);
1358
1359 #[doc = "Clock enable"]
1360 pub const _1: Self = Self::new(1);
1361 }
1362}
1363#[doc(hidden)]
1364#[derive(Copy, Clone, Eq, PartialEq)]
1365pub struct Bctl_SPEC;
1366impl crate::sealed::RegSpec for Bctl_SPEC {
1367 type DataType = u32;
1368}
1369
1370#[doc = "Bus Control Register"]
1371pub type Bctl = crate::RegValueT<Bctl_SPEC>;
1372
1373impl Bctl {
1374 #[doc = "Include I3C Broadcast Address"]
1375 #[inline(always)]
1376 pub fn incba(
1377 self,
1378 ) -> crate::common::RegisterField<
1379 0,
1380 0x1,
1381 1,
1382 0,
1383 bctl::Incba,
1384 bctl::Incba,
1385 Bctl_SPEC,
1386 crate::common::RW,
1387 > {
1388 crate::common::RegisterField::<
1389 0,
1390 0x1,
1391 1,
1392 0,
1393 bctl::Incba,
1394 bctl::Incba,
1395 Bctl_SPEC,
1396 crate::common::RW,
1397 >::from_register(self, 0)
1398 }
1399
1400 #[doc = "Abort"]
1401 #[inline(always)]
1402 pub fn abt(
1403 self,
1404 ) -> crate::common::RegisterField<
1405 29,
1406 0x1,
1407 1,
1408 0,
1409 bctl::Abt,
1410 bctl::Abt,
1411 Bctl_SPEC,
1412 crate::common::RW,
1413 > {
1414 crate::common::RegisterField::<
1415 29,
1416 0x1,
1417 1,
1418 0,
1419 bctl::Abt,
1420 bctl::Abt,
1421 Bctl_SPEC,
1422 crate::common::RW,
1423 >::from_register(self, 0)
1424 }
1425
1426 #[doc = "Resume"]
1427 #[inline(always)]
1428 pub fn rsm(
1429 self,
1430 ) -> crate::common::RegisterField<
1431 30,
1432 0x1,
1433 1,
1434 0,
1435 bctl::Rsm,
1436 bctl::Rsm,
1437 Bctl_SPEC,
1438 crate::common::RW,
1439 > {
1440 crate::common::RegisterField::<
1441 30,
1442 0x1,
1443 1,
1444 0,
1445 bctl::Rsm,
1446 bctl::Rsm,
1447 Bctl_SPEC,
1448 crate::common::RW,
1449 >::from_register(self, 0)
1450 }
1451
1452 #[doc = "Bus Enable"]
1453 #[inline(always)]
1454 pub fn buse(
1455 self,
1456 ) -> crate::common::RegisterField<
1457 31,
1458 0x1,
1459 1,
1460 0,
1461 bctl::Buse,
1462 bctl::Buse,
1463 Bctl_SPEC,
1464 crate::common::RW,
1465 > {
1466 crate::common::RegisterField::<
1467 31,
1468 0x1,
1469 1,
1470 0,
1471 bctl::Buse,
1472 bctl::Buse,
1473 Bctl_SPEC,
1474 crate::common::RW,
1475 >::from_register(self, 0)
1476 }
1477}
1478impl ::core::default::Default for Bctl {
1479 #[inline(always)]
1480 fn default() -> Bctl {
1481 <crate::RegValueT<Bctl_SPEC> as RegisterValue<_>>::new(0)
1482 }
1483}
1484pub mod bctl {
1485
1486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1487 pub struct Incba_SPEC;
1488 pub type Incba = crate::EnumBitfieldStruct<u8, Incba_SPEC>;
1489 impl Incba {
1490 #[doc = "Do not include I3C broadcast address for private transfers"]
1491 pub const _0: Self = Self::new(0);
1492
1493 #[doc = "Include I3C broadcast address for private transfers"]
1494 pub const _1: Self = Self::new(1);
1495 }
1496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1497 pub struct Abt_SPEC;
1498 pub type Abt = crate::EnumBitfieldStruct<u8, Abt_SPEC>;
1499 impl Abt {
1500 #[doc = "I3C is running."]
1501 pub const _0: Self = Self::new(0);
1502
1503 #[doc = "I3C has aborted a transfer."]
1504 pub const _1: Self = Self::new(1);
1505 }
1506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1507 pub struct Rsm_SPEC;
1508 pub type Rsm = crate::EnumBitfieldStruct<u8, Rsm_SPEC>;
1509 impl Rsm {
1510 #[doc = "I3C is running."]
1511 pub const _0: Self = Self::new(0);
1512
1513 #[doc = "I3C is suspended."]
1514 pub const _1: Self = Self::new(1);
1515 }
1516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1517 pub struct Buse_SPEC;
1518 pub type Buse = crate::EnumBitfieldStruct<u8, Buse_SPEC>;
1519 impl Buse {
1520 #[doc = "I3C bus operation is disabled."]
1521 pub const _0: Self = Self::new(0);
1522
1523 #[doc = "I3C bus operation is enabled."]
1524 pub const _1: Self = Self::new(1);
1525 }
1526}
1527#[doc(hidden)]
1528#[derive(Copy, Clone, Eq, PartialEq)]
1529pub struct Msdvad_SPEC;
1530impl crate::sealed::RegSpec for Msdvad_SPEC {
1531 type DataType = u32;
1532}
1533
1534#[doc = "Master Device Address Register"]
1535pub type Msdvad = crate::RegValueT<Msdvad_SPEC>;
1536
1537impl Msdvad {
1538 #[doc = "Master Dynamic Address"]
1539 #[inline(always)]
1540 pub fn mdyad(
1541 self,
1542 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Msdvad_SPEC, crate::common::RW> {
1543 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Msdvad_SPEC,crate::common::RW>::from_register(self,0)
1544 }
1545
1546 #[doc = "Master Dynamic Address Valid"]
1547 #[inline(always)]
1548 pub fn mdyadv(
1549 self,
1550 ) -> crate::common::RegisterField<
1551 31,
1552 0x1,
1553 1,
1554 0,
1555 msdvad::Mdyadv,
1556 msdvad::Mdyadv,
1557 Msdvad_SPEC,
1558 crate::common::RW,
1559 > {
1560 crate::common::RegisterField::<
1561 31,
1562 0x1,
1563 1,
1564 0,
1565 msdvad::Mdyadv,
1566 msdvad::Mdyadv,
1567 Msdvad_SPEC,
1568 crate::common::RW,
1569 >::from_register(self, 0)
1570 }
1571}
1572impl ::core::default::Default for Msdvad {
1573 #[inline(always)]
1574 fn default() -> Msdvad {
1575 <crate::RegValueT<Msdvad_SPEC> as RegisterValue<_>>::new(0)
1576 }
1577}
1578pub mod msdvad {
1579
1580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1581 pub struct Mdyadv_SPEC;
1582 pub type Mdyadv = crate::EnumBitfieldStruct<u8, Mdyadv_SPEC>;
1583 impl Mdyadv {
1584 #[doc = "The master dynamic address field is not valid."]
1585 pub const _0: Self = Self::new(0);
1586
1587 #[doc = "The master dynamic address field is valid."]
1588 pub const _1: Self = Self::new(1);
1589 }
1590}
1591#[doc(hidden)]
1592#[derive(Copy, Clone, Eq, PartialEq)]
1593pub struct Rstctl_SPEC;
1594impl crate::sealed::RegSpec for Rstctl_SPEC {
1595 type DataType = u32;
1596}
1597
1598#[doc = "Reset Control Register"]
1599pub type Rstctl = crate::RegValueT<Rstctl_SPEC>;
1600
1601impl Rstctl {
1602 #[doc = "I3C Software Reset"]
1603 #[inline(always)]
1604 pub fn ri3crst(
1605 self,
1606 ) -> crate::common::RegisterField<
1607 0,
1608 0x1,
1609 1,
1610 0,
1611 rstctl::Ri3Crst,
1612 rstctl::Ri3Crst,
1613 Rstctl_SPEC,
1614 crate::common::RW,
1615 > {
1616 crate::common::RegisterField::<
1617 0,
1618 0x1,
1619 1,
1620 0,
1621 rstctl::Ri3Crst,
1622 rstctl::Ri3Crst,
1623 Rstctl_SPEC,
1624 crate::common::RW,
1625 >::from_register(self, 0)
1626 }
1627
1628 #[doc = "Command Queue Software Reset"]
1629 #[inline(always)]
1630 pub fn cmdqrst(
1631 self,
1632 ) -> crate::common::RegisterField<
1633 1,
1634 0x1,
1635 1,
1636 0,
1637 rstctl::Cmdqrst,
1638 rstctl::Cmdqrst,
1639 Rstctl_SPEC,
1640 crate::common::RW,
1641 > {
1642 crate::common::RegisterField::<
1643 1,
1644 0x1,
1645 1,
1646 0,
1647 rstctl::Cmdqrst,
1648 rstctl::Cmdqrst,
1649 Rstctl_SPEC,
1650 crate::common::RW,
1651 >::from_register(self, 0)
1652 }
1653
1654 #[doc = "Response Queue Software Reset"]
1655 #[inline(always)]
1656 pub fn rspqrst(
1657 self,
1658 ) -> crate::common::RegisterField<
1659 2,
1660 0x1,
1661 1,
1662 0,
1663 rstctl::Rspqrst,
1664 rstctl::Rspqrst,
1665 Rstctl_SPEC,
1666 crate::common::RW,
1667 > {
1668 crate::common::RegisterField::<
1669 2,
1670 0x1,
1671 1,
1672 0,
1673 rstctl::Rspqrst,
1674 rstctl::Rspqrst,
1675 Rstctl_SPEC,
1676 crate::common::RW,
1677 >::from_register(self, 0)
1678 }
1679
1680 #[doc = "Transmit Data Buffer Software Reset"]
1681 #[inline(always)]
1682 pub fn tdbrst(
1683 self,
1684 ) -> crate::common::RegisterField<
1685 3,
1686 0x1,
1687 1,
1688 0,
1689 rstctl::Tdbrst,
1690 rstctl::Tdbrst,
1691 Rstctl_SPEC,
1692 crate::common::RW,
1693 > {
1694 crate::common::RegisterField::<
1695 3,
1696 0x1,
1697 1,
1698 0,
1699 rstctl::Tdbrst,
1700 rstctl::Tdbrst,
1701 Rstctl_SPEC,
1702 crate::common::RW,
1703 >::from_register(self, 0)
1704 }
1705
1706 #[doc = "Receive Data Buffer Software Reset"]
1707 #[inline(always)]
1708 pub fn rdbrst(
1709 self,
1710 ) -> crate::common::RegisterField<
1711 4,
1712 0x1,
1713 1,
1714 0,
1715 rstctl::Rdbrst,
1716 rstctl::Rdbrst,
1717 Rstctl_SPEC,
1718 crate::common::RW,
1719 > {
1720 crate::common::RegisterField::<
1721 4,
1722 0x1,
1723 1,
1724 0,
1725 rstctl::Rdbrst,
1726 rstctl::Rdbrst,
1727 Rstctl_SPEC,
1728 crate::common::RW,
1729 >::from_register(self, 0)
1730 }
1731
1732 #[doc = "IBI Queue Software Reset"]
1733 #[inline(always)]
1734 pub fn ibiqrst(
1735 self,
1736 ) -> crate::common::RegisterField<
1737 5,
1738 0x1,
1739 1,
1740 0,
1741 rstctl::Ibiqrst,
1742 rstctl::Ibiqrst,
1743 Rstctl_SPEC,
1744 crate::common::RW,
1745 > {
1746 crate::common::RegisterField::<
1747 5,
1748 0x1,
1749 1,
1750 0,
1751 rstctl::Ibiqrst,
1752 rstctl::Ibiqrst,
1753 Rstctl_SPEC,
1754 crate::common::RW,
1755 >::from_register(self, 0)
1756 }
1757
1758 #[doc = "Receive Status Queue Software Reset"]
1759 #[inline(always)]
1760 pub fn rsqrst(
1761 self,
1762 ) -> crate::common::RegisterField<
1763 6,
1764 0x1,
1765 1,
1766 0,
1767 rstctl::Rsqrst,
1768 rstctl::Rsqrst,
1769 Rstctl_SPEC,
1770 crate::common::RW,
1771 > {
1772 crate::common::RegisterField::<
1773 6,
1774 0x1,
1775 1,
1776 0,
1777 rstctl::Rsqrst,
1778 rstctl::Rsqrst,
1779 Rstctl_SPEC,
1780 crate::common::RW,
1781 >::from_register(self, 0)
1782 }
1783
1784 #[doc = "High Priority Command Queue Software Reset"]
1785 #[inline(always)]
1786 pub fn hcmdqrst(
1787 self,
1788 ) -> crate::common::RegisterField<
1789 9,
1790 0x1,
1791 1,
1792 0,
1793 rstctl::Hcmdqrst,
1794 rstctl::Hcmdqrst,
1795 Rstctl_SPEC,
1796 crate::common::RW,
1797 > {
1798 crate::common::RegisterField::<
1799 9,
1800 0x1,
1801 1,
1802 0,
1803 rstctl::Hcmdqrst,
1804 rstctl::Hcmdqrst,
1805 Rstctl_SPEC,
1806 crate::common::RW,
1807 >::from_register(self, 0)
1808 }
1809
1810 #[doc = "High Priority Response Queue Software Reset"]
1811 #[inline(always)]
1812 pub fn hrspqrst(
1813 self,
1814 ) -> crate::common::RegisterField<
1815 10,
1816 0x1,
1817 1,
1818 0,
1819 rstctl::Hrspqrst,
1820 rstctl::Hrspqrst,
1821 Rstctl_SPEC,
1822 crate::common::RW,
1823 > {
1824 crate::common::RegisterField::<
1825 10,
1826 0x1,
1827 1,
1828 0,
1829 rstctl::Hrspqrst,
1830 rstctl::Hrspqrst,
1831 Rstctl_SPEC,
1832 crate::common::RW,
1833 >::from_register(self, 0)
1834 }
1835
1836 #[doc = "High Priority Transmit Data Buffer Software Reset"]
1837 #[inline(always)]
1838 pub fn htdbrst(
1839 self,
1840 ) -> crate::common::RegisterField<
1841 11,
1842 0x1,
1843 1,
1844 0,
1845 rstctl::Htdbrst,
1846 rstctl::Htdbrst,
1847 Rstctl_SPEC,
1848 crate::common::RW,
1849 > {
1850 crate::common::RegisterField::<
1851 11,
1852 0x1,
1853 1,
1854 0,
1855 rstctl::Htdbrst,
1856 rstctl::Htdbrst,
1857 Rstctl_SPEC,
1858 crate::common::RW,
1859 >::from_register(self, 0)
1860 }
1861
1862 #[doc = "High Priority Receive Data Buffer Software Reset"]
1863 #[inline(always)]
1864 pub fn hrdbrst(
1865 self,
1866 ) -> crate::common::RegisterField<
1867 12,
1868 0x1,
1869 1,
1870 0,
1871 rstctl::Hrdbrst,
1872 rstctl::Hrdbrst,
1873 Rstctl_SPEC,
1874 crate::common::RW,
1875 > {
1876 crate::common::RegisterField::<
1877 12,
1878 0x1,
1879 1,
1880 0,
1881 rstctl::Hrdbrst,
1882 rstctl::Hrdbrst,
1883 Rstctl_SPEC,
1884 crate::common::RW,
1885 >::from_register(self, 0)
1886 }
1887
1888 #[doc = "Internal Software Reset"]
1889 #[inline(always)]
1890 pub fn intlrst(
1891 self,
1892 ) -> crate::common::RegisterField<
1893 16,
1894 0x1,
1895 1,
1896 0,
1897 rstctl::Intlrst,
1898 rstctl::Intlrst,
1899 Rstctl_SPEC,
1900 crate::common::RW,
1901 > {
1902 crate::common::RegisterField::<
1903 16,
1904 0x1,
1905 1,
1906 0,
1907 rstctl::Intlrst,
1908 rstctl::Intlrst,
1909 Rstctl_SPEC,
1910 crate::common::RW,
1911 >::from_register(self, 0)
1912 }
1913}
1914impl ::core::default::Default for Rstctl {
1915 #[inline(always)]
1916 fn default() -> Rstctl {
1917 <crate::RegValueT<Rstctl_SPEC> as RegisterValue<_>>::new(0)
1918 }
1919}
1920pub mod rstctl {
1921
1922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1923 pub struct Ri3Crst_SPEC;
1924 pub type Ri3Crst = crate::EnumBitfieldStruct<u8, Ri3Crst_SPEC>;
1925 impl Ri3Crst {
1926 #[doc = "Release I3C reset."]
1927 pub const _0: Self = Self::new(0);
1928
1929 #[doc = "Initiate I3C reset."]
1930 pub const _1: Self = Self::new(1);
1931 }
1932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1933 pub struct Cmdqrst_SPEC;
1934 pub type Cmdqrst = crate::EnumBitfieldStruct<u8, Cmdqrst_SPEC>;
1935 impl Cmdqrst {
1936 #[doc = "The Command Queues in I3C is not flushed."]
1937 pub const _0: Self = Self::new(0);
1938
1939 #[doc = "The Command Queues in I3C is flushed."]
1940 pub const _1: Self = Self::new(1);
1941 }
1942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1943 pub struct Rspqrst_SPEC;
1944 pub type Rspqrst = crate::EnumBitfieldStruct<u8, Rspqrst_SPEC>;
1945 impl Rspqrst {
1946 #[doc = "The Response Queues in I3C is not flushed."]
1947 pub const _0: Self = Self::new(0);
1948
1949 #[doc = "The Response Queues in I3C is flushed."]
1950 pub const _1: Self = Self::new(1);
1951 }
1952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1953 pub struct Tdbrst_SPEC;
1954 pub type Tdbrst = crate::EnumBitfieldStruct<u8, Tdbrst_SPEC>;
1955 impl Tdbrst {
1956 #[doc = "The Transmit Queues in I3C is not flushed."]
1957 pub const _0: Self = Self::new(0);
1958
1959 #[doc = "The Transmit Queues in I3C is flushed."]
1960 pub const _1: Self = Self::new(1);
1961 }
1962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1963 pub struct Rdbrst_SPEC;
1964 pub type Rdbrst = crate::EnumBitfieldStruct<u8, Rdbrst_SPEC>;
1965 impl Rdbrst {
1966 #[doc = "The Receive Queues in I3C is not flushed."]
1967 pub const _0: Self = Self::new(0);
1968
1969 #[doc = "The Receive Queues in I3C is flushed."]
1970 pub const _1: Self = Self::new(1);
1971 }
1972 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1973 pub struct Ibiqrst_SPEC;
1974 pub type Ibiqrst = crate::EnumBitfieldStruct<u8, Ibiqrst_SPEC>;
1975 impl Ibiqrst {
1976 #[doc = "The IBI Queues in I3C is not flushed."]
1977 pub const _0: Self = Self::new(0);
1978
1979 #[doc = "The IBI Queues in I3C is flushed."]
1980 pub const _1: Self = Self::new(1);
1981 }
1982 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1983 pub struct Rsqrst_SPEC;
1984 pub type Rsqrst = crate::EnumBitfieldStruct<u8, Rsqrst_SPEC>;
1985 impl Rsqrst {
1986 #[doc = "The Receive Status Queue in I3C is not flushed."]
1987 pub const _0: Self = Self::new(0);
1988
1989 #[doc = "The Receive Status Queue in I3C is flushed."]
1990 pub const _1: Self = Self::new(1);
1991 }
1992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1993 pub struct Hcmdqrst_SPEC;
1994 pub type Hcmdqrst = crate::EnumBitfieldStruct<u8, Hcmdqrst_SPEC>;
1995 impl Hcmdqrst {
1996 #[doc = "The High Priority Command Queues in I3C is not flushed."]
1997 pub const _0: Self = Self::new(0);
1998
1999 #[doc = "The High Priority Command Queues in I3C is flushed."]
2000 pub const _1: Self = Self::new(1);
2001 }
2002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003 pub struct Hrspqrst_SPEC;
2004 pub type Hrspqrst = crate::EnumBitfieldStruct<u8, Hrspqrst_SPEC>;
2005 impl Hrspqrst {
2006 #[doc = "The High Priority Response Queues in I3C is not flushed."]
2007 pub const _0: Self = Self::new(0);
2008
2009 #[doc = "The High Priority Response Queues in I3C is flushed."]
2010 pub const _1: Self = Self::new(1);
2011 }
2012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2013 pub struct Htdbrst_SPEC;
2014 pub type Htdbrst = crate::EnumBitfieldStruct<u8, Htdbrst_SPEC>;
2015 impl Htdbrst {
2016 #[doc = "The High Priority Transmit Queues in I3C is not flushed."]
2017 pub const _0: Self = Self::new(0);
2018
2019 #[doc = "The High Priority Transmit Queues in I3C is flushed."]
2020 pub const _1: Self = Self::new(1);
2021 }
2022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2023 pub struct Hrdbrst_SPEC;
2024 pub type Hrdbrst = crate::EnumBitfieldStruct<u8, Hrdbrst_SPEC>;
2025 impl Hrdbrst {
2026 #[doc = "The High Priority Receive Queues in I3C is not flushed."]
2027 pub const _0: Self = Self::new(0);
2028
2029 #[doc = "The High Priority Receive Queues in I3C is flushed."]
2030 pub const _1: Self = Self::new(1);
2031 }
2032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2033 pub struct Intlrst_SPEC;
2034 pub type Intlrst = crate::EnumBitfieldStruct<u8, Intlrst_SPEC>;
2035 impl Intlrst {
2036 #[doc = "Releases of some registers and internal state."]
2037 pub const _0: Self = Self::new(0);
2038
2039 #[doc = "Resets of some registers and internal state."]
2040 pub const _1: Self = Self::new(1);
2041 }
2042}
2043#[doc(hidden)]
2044#[derive(Copy, Clone, Eq, PartialEq)]
2045pub struct Prsst_SPEC;
2046impl crate::sealed::RegSpec for Prsst_SPEC {
2047 type DataType = u32;
2048}
2049
2050#[doc = "Present State Register"]
2051pub type Prsst = crate::RegValueT<Prsst_SPEC>;
2052
2053impl Prsst {
2054 #[doc = "Current Master"]
2055 #[inline(always)]
2056 pub fn crms(
2057 self,
2058 ) -> crate::common::RegisterField<
2059 2,
2060 0x1,
2061 1,
2062 0,
2063 prsst::Crms,
2064 prsst::Crms,
2065 Prsst_SPEC,
2066 crate::common::RW,
2067 > {
2068 crate::common::RegisterField::<
2069 2,
2070 0x1,
2071 1,
2072 0,
2073 prsst::Crms,
2074 prsst::Crms,
2075 Prsst_SPEC,
2076 crate::common::RW,
2077 >::from_register(self, 0)
2078 }
2079
2080 #[doc = "Transmit/Receive Mode"]
2081 #[inline(always)]
2082 pub fn trmd(
2083 self,
2084 ) -> crate::common::RegisterField<
2085 4,
2086 0x1,
2087 1,
2088 0,
2089 prsst::Trmd,
2090 prsst::Trmd,
2091 Prsst_SPEC,
2092 crate::common::R,
2093 > {
2094 crate::common::RegisterField::<
2095 4,
2096 0x1,
2097 1,
2098 0,
2099 prsst::Trmd,
2100 prsst::Trmd,
2101 Prsst_SPEC,
2102 crate::common::R,
2103 >::from_register(self, 0)
2104 }
2105
2106 #[doc = "Present State Write Protect"]
2107 #[inline(always)]
2108 pub fn prsstwp(
2109 self,
2110 ) -> crate::common::RegisterField<
2111 7,
2112 0x1,
2113 1,
2114 0,
2115 prsst::Prsstwp,
2116 prsst::Prsstwp,
2117 Prsst_SPEC,
2118 crate::common::W,
2119 > {
2120 crate::common::RegisterField::<
2121 7,
2122 0x1,
2123 1,
2124 0,
2125 prsst::Prsstwp,
2126 prsst::Prsstwp,
2127 Prsst_SPEC,
2128 crate::common::W,
2129 >::from_register(self, 0)
2130 }
2131}
2132impl ::core::default::Default for Prsst {
2133 #[inline(always)]
2134 fn default() -> Prsst {
2135 <crate::RegValueT<Prsst_SPEC> as RegisterValue<_>>::new(0)
2136 }
2137}
2138pub mod prsst {
2139
2140 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2141 pub struct Crms_SPEC;
2142 pub type Crms = crate::EnumBitfieldStruct<u8, Crms_SPEC>;
2143 impl Crms {
2144 #[doc = "The Master is not the Current Master, and must request and acquire bus ownership before initiating any transfer."]
2145 pub const _0: Self = Self::new(0);
2146
2147 #[doc = "The Master is the Current Master, and as a result can initiate transfers."]
2148 pub const _1: Self = Self::new(1);
2149 }
2150 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2151 pub struct Trmd_SPEC;
2152 pub type Trmd = crate::EnumBitfieldStruct<u8, Trmd_SPEC>;
2153 impl Trmd {
2154 #[doc = "Receive mode"]
2155 pub const _0: Self = Self::new(0);
2156
2157 #[doc = "Transmit mode"]
2158 pub const _1: Self = Self::new(1);
2159 }
2160 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2161 pub struct Prsstwp_SPEC;
2162 pub type Prsstwp = crate::EnumBitfieldStruct<u8, Prsstwp_SPEC>;
2163 impl Prsstwp {
2164 #[doc = "CRMS bit is protected."]
2165 pub const _0: Self = Self::new(0);
2166
2167 #[doc = "CRMS bit can be written when writing simultaneously with the value of the target bit."]
2168 pub const _1: Self = Self::new(1);
2169 }
2170}
2171#[doc(hidden)]
2172#[derive(Copy, Clone, Eq, PartialEq)]
2173pub struct Inst_SPEC;
2174impl crate::sealed::RegSpec for Inst_SPEC {
2175 type DataType = u32;
2176}
2177
2178#[doc = "Internal Status Register"]
2179pub type Inst = crate::RegValueT<Inst_SPEC>;
2180
2181impl Inst {
2182 #[doc = "Internal Error Flag"]
2183 #[inline(always)]
2184 pub fn inef(
2185 self,
2186 ) -> crate::common::RegisterField<
2187 10,
2188 0x1,
2189 1,
2190 0,
2191 inst::Inef,
2192 inst::Inef,
2193 Inst_SPEC,
2194 crate::common::RW,
2195 > {
2196 crate::common::RegisterField::<
2197 10,
2198 0x1,
2199 1,
2200 0,
2201 inst::Inef,
2202 inst::Inef,
2203 Inst_SPEC,
2204 crate::common::RW,
2205 >::from_register(self, 0)
2206 }
2207}
2208impl ::core::default::Default for Inst {
2209 #[inline(always)]
2210 fn default() -> Inst {
2211 <crate::RegValueT<Inst_SPEC> as RegisterValue<_>>::new(0)
2212 }
2213}
2214pub mod inst {
2215
2216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2217 pub struct Inef_SPEC;
2218 pub type Inef = crate::EnumBitfieldStruct<u8, Inef_SPEC>;
2219 impl Inef {
2220 #[doc = "I3C Internal Error has not detected."]
2221 pub const _0: Self = Self::new(0);
2222
2223 #[doc = "I3C Internal Error has detected."]
2224 pub const _1: Self = Self::new(1);
2225 }
2226}
2227#[doc(hidden)]
2228#[derive(Copy, Clone, Eq, PartialEq)]
2229pub struct Inste_SPEC;
2230impl crate::sealed::RegSpec for Inste_SPEC {
2231 type DataType = u32;
2232}
2233
2234#[doc = "Internal Status Enable Register"]
2235pub type Inste = crate::RegValueT<Inste_SPEC>;
2236
2237impl Inste {
2238 #[doc = "Internal Error Enable"]
2239 #[inline(always)]
2240 pub fn inee(
2241 self,
2242 ) -> crate::common::RegisterField<
2243 10,
2244 0x1,
2245 1,
2246 0,
2247 inste::Inee,
2248 inste::Inee,
2249 Inste_SPEC,
2250 crate::common::RW,
2251 > {
2252 crate::common::RegisterField::<
2253 10,
2254 0x1,
2255 1,
2256 0,
2257 inste::Inee,
2258 inste::Inee,
2259 Inste_SPEC,
2260 crate::common::RW,
2261 >::from_register(self, 0)
2262 }
2263}
2264impl ::core::default::Default for Inste {
2265 #[inline(always)]
2266 fn default() -> Inste {
2267 <crate::RegValueT<Inste_SPEC> as RegisterValue<_>>::new(0)
2268 }
2269}
2270pub mod inste {
2271
2272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2273 pub struct Inee_SPEC;
2274 pub type Inee = crate::EnumBitfieldStruct<u8, Inee_SPEC>;
2275 impl Inee {
2276 #[doc = "Disable INST.INEF"]
2277 pub const _0: Self = Self::new(0);
2278
2279 #[doc = "Enable INST.INEF"]
2280 pub const _1: Self = Self::new(1);
2281 }
2282}
2283#[doc(hidden)]
2284#[derive(Copy, Clone, Eq, PartialEq)]
2285pub struct Inie_SPEC;
2286impl crate::sealed::RegSpec for Inie_SPEC {
2287 type DataType = u32;
2288}
2289
2290#[doc = "Internal Interrupt Enable Register"]
2291pub type Inie = crate::RegValueT<Inie_SPEC>;
2292
2293impl Inie {
2294 #[doc = "Internal Error Interrupt Enable"]
2295 #[inline(always)]
2296 pub fn ineie(
2297 self,
2298 ) -> crate::common::RegisterField<
2299 10,
2300 0x1,
2301 1,
2302 0,
2303 inie::Ineie,
2304 inie::Ineie,
2305 Inie_SPEC,
2306 crate::common::RW,
2307 > {
2308 crate::common::RegisterField::<
2309 10,
2310 0x1,
2311 1,
2312 0,
2313 inie::Ineie,
2314 inie::Ineie,
2315 Inie_SPEC,
2316 crate::common::RW,
2317 >::from_register(self, 0)
2318 }
2319}
2320impl ::core::default::Default for Inie {
2321 #[inline(always)]
2322 fn default() -> Inie {
2323 <crate::RegValueT<Inie_SPEC> as RegisterValue<_>>::new(0)
2324 }
2325}
2326pub mod inie {
2327
2328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2329 pub struct Ineie_SPEC;
2330 pub type Ineie = crate::EnumBitfieldStruct<u8, Ineie_SPEC>;
2331 impl Ineie {
2332 #[doc = "Disables Non-recoverable Internal Error Interrupt Signal."]
2333 pub const _0: Self = Self::new(0);
2334
2335 #[doc = "Enables Non-recoverable Internal Error Interrupt Signal."]
2336 pub const _1: Self = Self::new(1);
2337 }
2338}
2339#[doc(hidden)]
2340#[derive(Copy, Clone, Eq, PartialEq)]
2341pub struct Instfc_SPEC;
2342impl crate::sealed::RegSpec for Instfc_SPEC {
2343 type DataType = u32;
2344}
2345
2346#[doc = "Internal Status Force Register"]
2347pub type Instfc = crate::RegValueT<Instfc_SPEC>;
2348
2349impl Instfc {
2350 #[doc = "Internal Error Force"]
2351 #[inline(always)]
2352 pub fn inefc(
2353 self,
2354 ) -> crate::common::RegisterField<
2355 10,
2356 0x1,
2357 1,
2358 0,
2359 instfc::Inefc,
2360 instfc::Inefc,
2361 Instfc_SPEC,
2362 crate::common::W,
2363 > {
2364 crate::common::RegisterField::<
2365 10,
2366 0x1,
2367 1,
2368 0,
2369 instfc::Inefc,
2370 instfc::Inefc,
2371 Instfc_SPEC,
2372 crate::common::W,
2373 >::from_register(self, 0)
2374 }
2375}
2376impl ::core::default::Default for Instfc {
2377 #[inline(always)]
2378 fn default() -> Instfc {
2379 <crate::RegValueT<Instfc_SPEC> as RegisterValue<_>>::new(0)
2380 }
2381}
2382pub mod instfc {
2383
2384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2385 pub struct Inefc_SPEC;
2386 pub type Inefc = crate::EnumBitfieldStruct<u8, Inefc_SPEC>;
2387 impl Inefc {
2388 #[doc = "Not force a specific interrupt"]
2389 pub const _0: Self = Self::new(0);
2390
2391 #[doc = "Force a specific interrupt"]
2392 pub const _1: Self = Self::new(1);
2393 }
2394}
2395#[doc(hidden)]
2396#[derive(Copy, Clone, Eq, PartialEq)]
2397pub struct Dvct_SPEC;
2398impl crate::sealed::RegSpec for Dvct_SPEC {
2399 type DataType = u32;
2400}
2401
2402#[doc = "Device Characteristic Table Register"]
2403pub type Dvct = crate::RegValueT<Dvct_SPEC>;
2404
2405impl Dvct {
2406 #[doc = "DCT Table Index"]
2407 #[inline(always)]
2408 pub fn idx(
2409 self,
2410 ) -> crate::common::RegisterField<19, 0x1f, 1, 0, u8, u8, Dvct_SPEC, crate::common::R> {
2411 crate::common::RegisterField::<19,0x1f,1,0,u8,u8,Dvct_SPEC,crate::common::R>::from_register(self,0)
2412 }
2413}
2414impl ::core::default::Default for Dvct {
2415 #[inline(always)]
2416 fn default() -> Dvct {
2417 <crate::RegValueT<Dvct_SPEC> as RegisterValue<_>>::new(0)
2418 }
2419}
2420
2421#[doc(hidden)]
2422#[derive(Copy, Clone, Eq, PartialEq)]
2423pub struct Ibinctl_SPEC;
2424impl crate::sealed::RegSpec for Ibinctl_SPEC {
2425 type DataType = u32;
2426}
2427
2428#[doc = "IBI Notify Control Register"]
2429pub type Ibinctl = crate::RegValueT<Ibinctl_SPEC>;
2430
2431impl Ibinctl {
2432 #[doc = "Notify Rejected Master Request Control"]
2433 #[inline(always)]
2434 pub fn nrmrctl(
2435 self,
2436 ) -> crate::common::RegisterField<
2437 1,
2438 0x1,
2439 1,
2440 0,
2441 ibinctl::Nrmrctl,
2442 ibinctl::Nrmrctl,
2443 Ibinctl_SPEC,
2444 crate::common::RW,
2445 > {
2446 crate::common::RegisterField::<
2447 1,
2448 0x1,
2449 1,
2450 0,
2451 ibinctl::Nrmrctl,
2452 ibinctl::Nrmrctl,
2453 Ibinctl_SPEC,
2454 crate::common::RW,
2455 >::from_register(self, 0)
2456 }
2457
2458 #[doc = "Notify Rejected Slave Interrupt Request Control"]
2459 #[inline(always)]
2460 pub fn nrsirctl(
2461 self,
2462 ) -> crate::common::RegisterField<
2463 3,
2464 0x1,
2465 1,
2466 0,
2467 ibinctl::Nrsirctl,
2468 ibinctl::Nrsirctl,
2469 Ibinctl_SPEC,
2470 crate::common::RW,
2471 > {
2472 crate::common::RegisterField::<
2473 3,
2474 0x1,
2475 1,
2476 0,
2477 ibinctl::Nrsirctl,
2478 ibinctl::Nrsirctl,
2479 Ibinctl_SPEC,
2480 crate::common::RW,
2481 >::from_register(self, 0)
2482 }
2483}
2484impl ::core::default::Default for Ibinctl {
2485 #[inline(always)]
2486 fn default() -> Ibinctl {
2487 <crate::RegValueT<Ibinctl_SPEC> as RegisterValue<_>>::new(0)
2488 }
2489}
2490pub mod ibinctl {
2491
2492 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2493 pub struct Nrmrctl_SPEC;
2494 pub type Nrmrctl = crate::EnumBitfieldStruct<u8, Nrmrctl_SPEC>;
2495 impl Nrmrctl {
2496 #[doc = "Do not pass rejected IBI Status to IBI Queue/Ring, if the incoming Master Request is NACKed and is auto-disabled based on DVMRRJ field in relevant DAT entry."]
2497 pub const _0: Self = Self::new(0);
2498
2499 #[doc = "Pass rejected IBI Status to the IBI Queue, if the incoming Master Request is NACKed and is autodisabled based on DVMRRJ field in relevant DAT entry."]
2500 pub const _1: Self = Self::new(1);
2501 }
2502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2503 pub struct Nrsirctl_SPEC;
2504 pub type Nrsirctl = crate::EnumBitfieldStruct<u8, Nrsirctl_SPEC>;
2505 impl Nrsirctl {
2506 #[doc = "Do not pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2507 pub const _0: Self = Self::new(0);
2508
2509 #[doc = "Pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2510 pub const _1: Self = Self::new(1);
2511 }
2512}
2513#[doc(hidden)]
2514#[derive(Copy, Clone, Eq, PartialEq)]
2515pub struct Bfctl_SPEC;
2516impl crate::sealed::RegSpec for Bfctl_SPEC {
2517 type DataType = u32;
2518}
2519
2520#[doc = "Bus Function Control Register"]
2521pub type Bfctl = crate::RegValueT<Bfctl_SPEC>;
2522
2523impl Bfctl {
2524 #[doc = "Master Arbitration-Lost Detection Enable"]
2525 #[inline(always)]
2526 pub fn male(
2527 self,
2528 ) -> crate::common::RegisterField<
2529 0,
2530 0x1,
2531 1,
2532 0,
2533 bfctl::Male,
2534 bfctl::Male,
2535 Bfctl_SPEC,
2536 crate::common::RW,
2537 > {
2538 crate::common::RegisterField::<
2539 0,
2540 0x1,
2541 1,
2542 0,
2543 bfctl::Male,
2544 bfctl::Male,
2545 Bfctl_SPEC,
2546 crate::common::RW,
2547 >::from_register(self, 0)
2548 }
2549
2550 #[doc = "NACK Transmission Arbitration-Lost Detection Enable"]
2551 #[inline(always)]
2552 pub fn nale(
2553 self,
2554 ) -> crate::common::RegisterField<
2555 1,
2556 0x1,
2557 1,
2558 0,
2559 bfctl::Nale,
2560 bfctl::Nale,
2561 Bfctl_SPEC,
2562 crate::common::RW,
2563 > {
2564 crate::common::RegisterField::<
2565 1,
2566 0x1,
2567 1,
2568 0,
2569 bfctl::Nale,
2570 bfctl::Nale,
2571 Bfctl_SPEC,
2572 crate::common::RW,
2573 >::from_register(self, 0)
2574 }
2575
2576 #[doc = "Slave Arbitration-Lost Detection Enable"]
2577 #[inline(always)]
2578 pub fn sale(
2579 self,
2580 ) -> crate::common::RegisterField<
2581 2,
2582 0x1,
2583 1,
2584 0,
2585 bfctl::Sale,
2586 bfctl::Sale,
2587 Bfctl_SPEC,
2588 crate::common::RW,
2589 > {
2590 crate::common::RegisterField::<
2591 2,
2592 0x1,
2593 1,
2594 0,
2595 bfctl::Sale,
2596 bfctl::Sale,
2597 Bfctl_SPEC,
2598 crate::common::RW,
2599 >::from_register(self, 0)
2600 }
2601
2602 #[doc = "SCL Synchronous Circuit Enable"]
2603 #[inline(always)]
2604 pub fn scsyne(
2605 self,
2606 ) -> crate::common::RegisterField<
2607 8,
2608 0x1,
2609 1,
2610 0,
2611 bfctl::Scsyne,
2612 bfctl::Scsyne,
2613 Bfctl_SPEC,
2614 crate::common::RW,
2615 > {
2616 crate::common::RegisterField::<
2617 8,
2618 0x1,
2619 1,
2620 0,
2621 bfctl::Scsyne,
2622 bfctl::Scsyne,
2623 Bfctl_SPEC,
2624 crate::common::RW,
2625 >::from_register(self, 0)
2626 }
2627
2628 #[doc = "SMBus/I2C Bus Selection"]
2629 #[inline(always)]
2630 pub fn smbs(
2631 self,
2632 ) -> crate::common::RegisterField<
2633 12,
2634 0x1,
2635 1,
2636 0,
2637 bfctl::Smbs,
2638 bfctl::Smbs,
2639 Bfctl_SPEC,
2640 crate::common::RW,
2641 > {
2642 crate::common::RegisterField::<
2643 12,
2644 0x1,
2645 1,
2646 0,
2647 bfctl::Smbs,
2648 bfctl::Smbs,
2649 Bfctl_SPEC,
2650 crate::common::RW,
2651 >::from_register(self, 0)
2652 }
2653
2654 #[doc = "Fast-mode Plus Enable"]
2655 #[inline(always)]
2656 pub fn fmpe(
2657 self,
2658 ) -> crate::common::RegisterField<
2659 14,
2660 0x1,
2661 1,
2662 0,
2663 bfctl::Fmpe,
2664 bfctl::Fmpe,
2665 Bfctl_SPEC,
2666 crate::common::RW,
2667 > {
2668 crate::common::RegisterField::<
2669 14,
2670 0x1,
2671 1,
2672 0,
2673 bfctl::Fmpe,
2674 bfctl::Fmpe,
2675 Bfctl_SPEC,
2676 crate::common::RW,
2677 >::from_register(self, 0)
2678 }
2679
2680 #[doc = "High Speed Mode Enable"]
2681 #[inline(always)]
2682 pub fn hsme(
2683 self,
2684 ) -> crate::common::RegisterField<
2685 15,
2686 0x1,
2687 1,
2688 0,
2689 bfctl::Hsme,
2690 bfctl::Hsme,
2691 Bfctl_SPEC,
2692 crate::common::RW,
2693 > {
2694 crate::common::RegisterField::<
2695 15,
2696 0x1,
2697 1,
2698 0,
2699 bfctl::Hsme,
2700 bfctl::Hsme,
2701 Bfctl_SPEC,
2702 crate::common::RW,
2703 >::from_register(self, 0)
2704 }
2705}
2706impl ::core::default::Default for Bfctl {
2707 #[inline(always)]
2708 fn default() -> Bfctl {
2709 <crate::RegValueT<Bfctl_SPEC> as RegisterValue<_>>::new(257)
2710 }
2711}
2712pub mod bfctl {
2713
2714 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2715 pub struct Male_SPEC;
2716 pub type Male = crate::EnumBitfieldStruct<u8, Male_SPEC>;
2717 impl Male {
2718 #[doc = "Master arbitration-lost detection disables. Disables the arbitration-lost detection function and does not clear the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2719 pub const _0: Self = Self::new(0);
2720
2721 #[doc = "Master arbitration-lost detection enables. Enables the arbitration-lost detection function and clears the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2722 pub const _1: Self = Self::new(1);
2723 }
2724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2725 pub struct Nale_SPEC;
2726 pub type Nale = crate::EnumBitfieldStruct<u8, Nale_SPEC>;
2727 impl Nale {
2728 #[doc = "NACK transmission arbitration-lost detection disables."]
2729 pub const _0: Self = Self::new(0);
2730
2731 #[doc = "NACK transmission arbitration-lost detection enables."]
2732 pub const _1: Self = Self::new(1);
2733 }
2734 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2735 pub struct Sale_SPEC;
2736 pub type Sale = crate::EnumBitfieldStruct<u8, Sale_SPEC>;
2737 impl Sale {
2738 #[doc = "Slave arbitration-lost detection disables."]
2739 pub const _0: Self = Self::new(0);
2740
2741 #[doc = "Slave arbitration-lost detection enables."]
2742 pub const _1: Self = Self::new(1);
2743 }
2744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2745 pub struct Scsyne_SPEC;
2746 pub type Scsyne = crate::EnumBitfieldStruct<u8, Scsyne_SPEC>;
2747 impl Scsyne {
2748 #[doc = "No SCL synchronous circuit uses."]
2749 pub const _0: Self = Self::new(0);
2750
2751 #[doc = "An SCL synchronous circuit uses."]
2752 pub const _1: Self = Self::new(1);
2753 }
2754 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2755 pub struct Smbs_SPEC;
2756 pub type Smbs = crate::EnumBitfieldStruct<u8, Smbs_SPEC>;
2757 impl Smbs {
2758 #[doc = "The I2C bus select."]
2759 pub const _0: Self = Self::new(0);
2760
2761 #[doc = "The SMBus select."]
2762 pub const _1: Self = Self::new(1);
2763 }
2764 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2765 pub struct Fmpe_SPEC;
2766 pub type Fmpe = crate::EnumBitfieldStruct<u8, Fmpe_SPEC>;
2767 impl Fmpe {
2768 #[doc = "No Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
2769 pub const _0: Self = Self::new(0);
2770
2771 #[doc = "An Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
2772 pub const _1: Self = Self::new(1);
2773 }
2774 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2775 pub struct Hsme_SPEC;
2776 pub type Hsme = crate::EnumBitfieldStruct<u8, Hsme_SPEC>;
2777 impl Hsme {
2778 #[doc = "Disable High Speed Mode."]
2779 pub const _0: Self = Self::new(0);
2780
2781 #[doc = "Enable High Speed Mode."]
2782 pub const _1: Self = Self::new(1);
2783 }
2784}
2785#[doc(hidden)]
2786#[derive(Copy, Clone, Eq, PartialEq)]
2787pub struct Svctl_SPEC;
2788impl crate::sealed::RegSpec for Svctl_SPEC {
2789 type DataType = u32;
2790}
2791
2792#[doc = "Slave Control Register"]
2793pub type Svctl = crate::RegValueT<Svctl_SPEC>;
2794
2795impl Svctl {
2796 #[doc = "General Call Address Enable"]
2797 #[inline(always)]
2798 pub fn gcae(
2799 self,
2800 ) -> crate::common::RegisterField<
2801 0,
2802 0x1,
2803 1,
2804 0,
2805 svctl::Gcae,
2806 svctl::Gcae,
2807 Svctl_SPEC,
2808 crate::common::RW,
2809 > {
2810 crate::common::RegisterField::<
2811 0,
2812 0x1,
2813 1,
2814 0,
2815 svctl::Gcae,
2816 svctl::Gcae,
2817 Svctl_SPEC,
2818 crate::common::RW,
2819 >::from_register(self, 0)
2820 }
2821
2822 #[doc = "Hs-mode Master Code Enable"]
2823 #[inline(always)]
2824 pub fn hsmce(
2825 self,
2826 ) -> crate::common::RegisterField<
2827 5,
2828 0x1,
2829 1,
2830 0,
2831 svctl::Hsmce,
2832 svctl::Hsmce,
2833 Svctl_SPEC,
2834 crate::common::RW,
2835 > {
2836 crate::common::RegisterField::<
2837 5,
2838 0x1,
2839 1,
2840 0,
2841 svctl::Hsmce,
2842 svctl::Hsmce,
2843 Svctl_SPEC,
2844 crate::common::RW,
2845 >::from_register(self, 0)
2846 }
2847
2848 #[doc = "Device-ID Address Enable"]
2849 #[inline(always)]
2850 pub fn dvide(
2851 self,
2852 ) -> crate::common::RegisterField<
2853 6,
2854 0x1,
2855 1,
2856 0,
2857 svctl::Dvide,
2858 svctl::Dvide,
2859 Svctl_SPEC,
2860 crate::common::RW,
2861 > {
2862 crate::common::RegisterField::<
2863 6,
2864 0x1,
2865 1,
2866 0,
2867 svctl::Dvide,
2868 svctl::Dvide,
2869 Svctl_SPEC,
2870 crate::common::RW,
2871 >::from_register(self, 0)
2872 }
2873
2874 #[doc = "Host Address Enable"]
2875 #[inline(always)]
2876 pub fn hoae(
2877 self,
2878 ) -> crate::common::RegisterField<
2879 15,
2880 0x1,
2881 1,
2882 0,
2883 svctl::Hoae,
2884 svctl::Hoae,
2885 Svctl_SPEC,
2886 crate::common::RW,
2887 > {
2888 crate::common::RegisterField::<
2889 15,
2890 0x1,
2891 1,
2892 0,
2893 svctl::Hoae,
2894 svctl::Hoae,
2895 Svctl_SPEC,
2896 crate::common::RW,
2897 >::from_register(self, 0)
2898 }
2899
2900 #[doc = "Slave Address Enable n ( n = 0 to 2 )"]
2901 #[inline(always)]
2902 pub fn svae(
2903 self,
2904 ) -> crate::common::RegisterField<
2905 16,
2906 0x7,
2907 1,
2908 0,
2909 svctl::Svae,
2910 svctl::Svae,
2911 Svctl_SPEC,
2912 crate::common::RW,
2913 > {
2914 crate::common::RegisterField::<
2915 16,
2916 0x7,
2917 1,
2918 0,
2919 svctl::Svae,
2920 svctl::Svae,
2921 Svctl_SPEC,
2922 crate::common::RW,
2923 >::from_register(self, 0)
2924 }
2925}
2926impl ::core::default::Default for Svctl {
2927 #[inline(always)]
2928 fn default() -> Svctl {
2929 <crate::RegValueT<Svctl_SPEC> as RegisterValue<_>>::new(0)
2930 }
2931}
2932pub mod svctl {
2933
2934 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2935 pub struct Gcae_SPEC;
2936 pub type Gcae = crate::EnumBitfieldStruct<u8, Gcae_SPEC>;
2937 impl Gcae {
2938 #[doc = "General call address detection disables."]
2939 pub const _0: Self = Self::new(0);
2940
2941 #[doc = "General call address detection enables."]
2942 pub const _1: Self = Self::new(1);
2943 }
2944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2945 pub struct Hsmce_SPEC;
2946 pub type Hsmce = crate::EnumBitfieldStruct<u8, Hsmce_SPEC>;
2947 impl Hsmce {
2948 #[doc = "Hs-mode Master Code Detection disables."]
2949 pub const _0: Self = Self::new(0);
2950
2951 #[doc = "Hs-mode Master Code Detection enables."]
2952 pub const _1: Self = Self::new(1);
2953 }
2954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2955 pub struct Dvide_SPEC;
2956 pub type Dvide = crate::EnumBitfieldStruct<u8, Dvide_SPEC>;
2957 impl Dvide {
2958 #[doc = "Device-ID address detection disables."]
2959 pub const _0: Self = Self::new(0);
2960
2961 #[doc = "Device-ID address detection enables."]
2962 pub const _1: Self = Self::new(1);
2963 }
2964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2965 pub struct Hoae_SPEC;
2966 pub type Hoae = crate::EnumBitfieldStruct<u8, Hoae_SPEC>;
2967 impl Hoae {
2968 #[doc = "Host address detection disables."]
2969 pub const _0: Self = Self::new(0);
2970
2971 #[doc = "Host address detection enables."]
2972 pub const _1: Self = Self::new(1);
2973 }
2974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2975 pub struct Svae_SPEC;
2976 pub type Svae = crate::EnumBitfieldStruct<u8, Svae_SPEC>;
2977 impl Svae {
2978 #[doc = "Slave n disables"]
2979 pub const _0: Self = Self::new(0);
2980
2981 #[doc = "Slave n enables"]
2982 pub const _1: Self = Self::new(1);
2983 }
2984}
2985#[doc(hidden)]
2986#[derive(Copy, Clone, Eq, PartialEq)]
2987pub struct Refckctl_SPEC;
2988impl crate::sealed::RegSpec for Refckctl_SPEC {
2989 type DataType = u32;
2990}
2991
2992#[doc = "Reference Clock Control Register"]
2993pub type Refckctl = crate::RegValueT<Refckctl_SPEC>;
2994
2995impl Refckctl {
2996 #[doc = "Internal Reference Clock Selection"]
2997 #[inline(always)]
2998 pub fn irefcks(
2999 self,
3000 ) -> crate::common::RegisterField<
3001 0,
3002 0x7,
3003 1,
3004 0,
3005 refckctl::Irefcks,
3006 refckctl::Irefcks,
3007 Refckctl_SPEC,
3008 crate::common::RW,
3009 > {
3010 crate::common::RegisterField::<
3011 0,
3012 0x7,
3013 1,
3014 0,
3015 refckctl::Irefcks,
3016 refckctl::Irefcks,
3017 Refckctl_SPEC,
3018 crate::common::RW,
3019 >::from_register(self, 0)
3020 }
3021}
3022impl ::core::default::Default for Refckctl {
3023 #[inline(always)]
3024 fn default() -> Refckctl {
3025 <crate::RegValueT<Refckctl_SPEC> as RegisterValue<_>>::new(0)
3026 }
3027}
3028pub mod refckctl {
3029
3030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3031 pub struct Irefcks_SPEC;
3032 pub type Irefcks = crate::EnumBitfieldStruct<u8, Irefcks_SPEC>;
3033 impl Irefcks {
3034 #[doc = "TCLK/1 clock"]
3035 pub const _000: Self = Self::new(0);
3036
3037 #[doc = "TCLK/2 clock"]
3038 pub const _001: Self = Self::new(1);
3039
3040 #[doc = "TCLK/4 clock"]
3041 pub const _010: Self = Self::new(2);
3042
3043 #[doc = "TCLK/8 clock"]
3044 pub const _011: Self = Self::new(3);
3045
3046 #[doc = "TCLK/16 clock"]
3047 pub const _100: Self = Self::new(4);
3048
3049 #[doc = "TCLK/32 clock"]
3050 pub const _101: Self = Self::new(5);
3051
3052 #[doc = "TCLK/64 clock"]
3053 pub const _110: Self = Self::new(6);
3054
3055 #[doc = "TCLK/128 clock"]
3056 pub const _111: Self = Self::new(7);
3057 }
3058}
3059#[doc(hidden)]
3060#[derive(Copy, Clone, Eq, PartialEq)]
3061pub struct Stdbr_SPEC;
3062impl crate::sealed::RegSpec for Stdbr_SPEC {
3063 type DataType = u32;
3064}
3065
3066#[doc = "Standard Bit Rate Register"]
3067pub type Stdbr = crate::RegValueT<Stdbr_SPEC>;
3068
3069impl Stdbr {
3070 #[doc = "Standard Bit Rate Low-level Period Open-Drain"]
3071 #[inline(always)]
3072 pub fn sbrlo(
3073 self,
3074 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3075 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3076 }
3077
3078 #[doc = "Standard Bit Rate High-level Period Open-Drain"]
3079 #[inline(always)]
3080 pub fn sbrho(
3081 self,
3082 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3083 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3084 }
3085
3086 #[doc = "Standard Bit Rate Low-level Period Push-Pull"]
3087 #[inline(always)]
3088 pub fn sbrlp(
3089 self,
3090 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3091 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3092 }
3093
3094 #[doc = "Standard Bit Rate High-level Period Push-Pull"]
3095 #[inline(always)]
3096 pub fn sbrhp(
3097 self,
3098 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3099 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3100 }
3101
3102 #[doc = "Double the Standard Bit Rate Period for Open-Drain"]
3103 #[inline(always)]
3104 pub fn dsbrpo(
3105 self,
3106 ) -> crate::common::RegisterField<
3107 31,
3108 0x1,
3109 1,
3110 0,
3111 stdbr::Dsbrpo,
3112 stdbr::Dsbrpo,
3113 Stdbr_SPEC,
3114 crate::common::RW,
3115 > {
3116 crate::common::RegisterField::<
3117 31,
3118 0x1,
3119 1,
3120 0,
3121 stdbr::Dsbrpo,
3122 stdbr::Dsbrpo,
3123 Stdbr_SPEC,
3124 crate::common::RW,
3125 >::from_register(self, 0)
3126 }
3127}
3128impl ::core::default::Default for Stdbr {
3129 #[inline(always)]
3130 fn default() -> Stdbr {
3131 <crate::RegValueT<Stdbr_SPEC> as RegisterValue<_>>::new(1061158911)
3132 }
3133}
3134pub mod stdbr {
3135
3136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3137 pub struct Dsbrpo_SPEC;
3138 pub type Dsbrpo = crate::EnumBitfieldStruct<u8, Dsbrpo_SPEC>;
3139 impl Dsbrpo {
3140 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is not doubled."]
3141 pub const _0: Self = Self::new(0);
3142
3143 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is doubled."]
3144 pub const _1: Self = Self::new(1);
3145 }
3146}
3147#[doc(hidden)]
3148#[derive(Copy, Clone, Eq, PartialEq)]
3149pub struct Extbr_SPEC;
3150impl crate::sealed::RegSpec for Extbr_SPEC {
3151 type DataType = u32;
3152}
3153
3154#[doc = "Extended Bit Rate Register"]
3155pub type Extbr = crate::RegValueT<Extbr_SPEC>;
3156
3157impl Extbr {
3158 #[doc = "Extended Bit Rate Low-level Period Open-Drain"]
3159 #[inline(always)]
3160 pub fn ebrlo(
3161 self,
3162 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3163 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3164 }
3165
3166 #[doc = "Extended Bit Rate High-level Period Open-Drain"]
3167 #[inline(always)]
3168 pub fn ebrho(
3169 self,
3170 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3171 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3172 }
3173
3174 #[doc = "Extended Bit Rate Low-level Period Push-Pull"]
3175 #[inline(always)]
3176 pub fn ebrlp(
3177 self,
3178 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3179 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3180 }
3181
3182 #[doc = "Extended Bit Rate High-level Period Push-Pull"]
3183 #[inline(always)]
3184 pub fn ebrhp(
3185 self,
3186 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3187 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3188 }
3189}
3190impl ::core::default::Default for Extbr {
3191 #[inline(always)]
3192 fn default() -> Extbr {
3193 <crate::RegValueT<Extbr_SPEC> as RegisterValue<_>>::new(1061158911)
3194 }
3195}
3196
3197#[doc(hidden)]
3198#[derive(Copy, Clone, Eq, PartialEq)]
3199pub struct Bfrecdt_SPEC;
3200impl crate::sealed::RegSpec for Bfrecdt_SPEC {
3201 type DataType = u32;
3202}
3203
3204#[doc = "Bus Free Condition Detection Time Register"]
3205pub type Bfrecdt = crate::RegValueT<Bfrecdt_SPEC>;
3206
3207impl Bfrecdt {
3208 #[doc = "Bus Free Condition Detection Cycle"]
3209 #[inline(always)]
3210 pub fn frecyc(
3211 self,
3212 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bfrecdt_SPEC, crate::common::RW>
3213 {
3214 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bfrecdt_SPEC,crate::common::RW>::from_register(self,0)
3215 }
3216}
3217impl ::core::default::Default for Bfrecdt {
3218 #[inline(always)]
3219 fn default() -> Bfrecdt {
3220 <crate::RegValueT<Bfrecdt_SPEC> as RegisterValue<_>>::new(0)
3221 }
3222}
3223
3224#[doc(hidden)]
3225#[derive(Copy, Clone, Eq, PartialEq)]
3226pub struct Bavlcdt_SPEC;
3227impl crate::sealed::RegSpec for Bavlcdt_SPEC {
3228 type DataType = u32;
3229}
3230
3231#[doc = "Bus Available Condition Detection Time Register"]
3232pub type Bavlcdt = crate::RegValueT<Bavlcdt_SPEC>;
3233
3234impl Bavlcdt {
3235 #[doc = "Bus Available Condition Detection Cycle"]
3236 #[inline(always)]
3237 pub fn avlcyc(
3238 self,
3239 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bavlcdt_SPEC, crate::common::RW>
3240 {
3241 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bavlcdt_SPEC,crate::common::RW>::from_register(self,0)
3242 }
3243}
3244impl ::core::default::Default for Bavlcdt {
3245 #[inline(always)]
3246 fn default() -> Bavlcdt {
3247 <crate::RegValueT<Bavlcdt_SPEC> as RegisterValue<_>>::new(0)
3248 }
3249}
3250
3251#[doc(hidden)]
3252#[derive(Copy, Clone, Eq, PartialEq)]
3253pub struct Bidlcdt_SPEC;
3254impl crate::sealed::RegSpec for Bidlcdt_SPEC {
3255 type DataType = u32;
3256}
3257
3258#[doc = "Bus Idle Condition Detection Time Register"]
3259pub type Bidlcdt = crate::RegValueT<Bidlcdt_SPEC>;
3260
3261impl Bidlcdt {
3262 #[doc = "Bus Idle Condition Detection Cycle"]
3263 #[inline(always)]
3264 pub fn idlcyc(
3265 self,
3266 ) -> crate::common::RegisterField<0, 0x3ffff, 1, 0, u32, u32, Bidlcdt_SPEC, crate::common::RW>
3267 {
3268 crate::common::RegisterField::<0,0x3ffff,1,0,u32,u32,Bidlcdt_SPEC,crate::common::RW>::from_register(self,0)
3269 }
3270}
3271impl ::core::default::Default for Bidlcdt {
3272 #[inline(always)]
3273 fn default() -> Bidlcdt {
3274 <crate::RegValueT<Bidlcdt_SPEC> as RegisterValue<_>>::new(0)
3275 }
3276}
3277
3278#[doc(hidden)]
3279#[derive(Copy, Clone, Eq, PartialEq)]
3280pub struct Outctl_SPEC;
3281impl crate::sealed::RegSpec for Outctl_SPEC {
3282 type DataType = u32;
3283}
3284
3285#[doc = "Output Control Register"]
3286pub type Outctl = crate::RegValueT<Outctl_SPEC>;
3287
3288impl Outctl {
3289 #[doc = "SDA Output Control"]
3290 #[inline(always)]
3291 pub fn sdoc(
3292 self,
3293 ) -> crate::common::RegisterField<
3294 0,
3295 0x1,
3296 1,
3297 0,
3298 outctl::Sdoc,
3299 outctl::Sdoc,
3300 Outctl_SPEC,
3301 crate::common::RW,
3302 > {
3303 crate::common::RegisterField::<
3304 0,
3305 0x1,
3306 1,
3307 0,
3308 outctl::Sdoc,
3309 outctl::Sdoc,
3310 Outctl_SPEC,
3311 crate::common::RW,
3312 >::from_register(self, 0)
3313 }
3314
3315 #[doc = "SCL Output Control"]
3316 #[inline(always)]
3317 pub fn scoc(
3318 self,
3319 ) -> crate::common::RegisterField<
3320 1,
3321 0x1,
3322 1,
3323 0,
3324 outctl::Scoc,
3325 outctl::Scoc,
3326 Outctl_SPEC,
3327 crate::common::RW,
3328 > {
3329 crate::common::RegisterField::<
3330 1,
3331 0x1,
3332 1,
3333 0,
3334 outctl::Scoc,
3335 outctl::Scoc,
3336 Outctl_SPEC,
3337 crate::common::RW,
3338 >::from_register(self, 0)
3339 }
3340
3341 #[doc = "SCL/SDA Output Control Write Protect"]
3342 #[inline(always)]
3343 pub fn socwp(
3344 self,
3345 ) -> crate::common::RegisterField<
3346 2,
3347 0x1,
3348 1,
3349 0,
3350 outctl::Socwp,
3351 outctl::Socwp,
3352 Outctl_SPEC,
3353 crate::common::W,
3354 > {
3355 crate::common::RegisterField::<
3356 2,
3357 0x1,
3358 1,
3359 0,
3360 outctl::Socwp,
3361 outctl::Socwp,
3362 Outctl_SPEC,
3363 crate::common::W,
3364 >::from_register(self, 0)
3365 }
3366
3367 #[doc = "Extra SCL Clock Cycle Output"]
3368 #[inline(always)]
3369 pub fn excyc(
3370 self,
3371 ) -> crate::common::RegisterField<
3372 4,
3373 0x1,
3374 1,
3375 0,
3376 outctl::Excyc,
3377 outctl::Excyc,
3378 Outctl_SPEC,
3379 crate::common::RW,
3380 > {
3381 crate::common::RegisterField::<
3382 4,
3383 0x1,
3384 1,
3385 0,
3386 outctl::Excyc,
3387 outctl::Excyc,
3388 Outctl_SPEC,
3389 crate::common::RW,
3390 >::from_register(self, 0)
3391 }
3392
3393 #[doc = "SDA Output Delay"]
3394 #[inline(always)]
3395 pub fn sdod(
3396 self,
3397 ) -> crate::common::RegisterField<
3398 8,
3399 0x7,
3400 1,
3401 0,
3402 outctl::Sdod,
3403 outctl::Sdod,
3404 Outctl_SPEC,
3405 crate::common::RW,
3406 > {
3407 crate::common::RegisterField::<
3408 8,
3409 0x7,
3410 1,
3411 0,
3412 outctl::Sdod,
3413 outctl::Sdod,
3414 Outctl_SPEC,
3415 crate::common::RW,
3416 >::from_register(self, 0)
3417 }
3418
3419 #[doc = "SDA Output Delay Clock Source Selection"]
3420 #[inline(always)]
3421 pub fn sdodcs(
3422 self,
3423 ) -> crate::common::RegisterField<
3424 15,
3425 0x1,
3426 1,
3427 0,
3428 outctl::Sdodcs,
3429 outctl::Sdodcs,
3430 Outctl_SPEC,
3431 crate::common::RW,
3432 > {
3433 crate::common::RegisterField::<
3434 15,
3435 0x1,
3436 1,
3437 0,
3438 outctl::Sdodcs,
3439 outctl::Sdodcs,
3440 Outctl_SPEC,
3441 crate::common::RW,
3442 >::from_register(self, 0)
3443 }
3444}
3445impl ::core::default::Default for Outctl {
3446 #[inline(always)]
3447 fn default() -> Outctl {
3448 <crate::RegValueT<Outctl_SPEC> as RegisterValue<_>>::new(3)
3449 }
3450}
3451pub mod outctl {
3452
3453 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3454 pub struct Sdoc_SPEC;
3455 pub type Sdoc = crate::EnumBitfieldStruct<u8, Sdoc_SPEC>;
3456 impl Sdoc {
3457 #[doc = "I3C drives the I3C_SDA pin low."]
3458 pub const _0: Self = Self::new(0);
3459
3460 #[doc = "I3C releases the I3C_SDA pin."]
3461 pub const _1: Self = Self::new(1);
3462 }
3463 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3464 pub struct Scoc_SPEC;
3465 pub type Scoc = crate::EnumBitfieldStruct<u8, Scoc_SPEC>;
3466 impl Scoc {
3467 #[doc = "I3C drives the I3C_SCL pin low."]
3468 pub const _0: Self = Self::new(0);
3469
3470 #[doc = "I3C releases the I3C_SCL pin."]
3471 pub const _1: Self = Self::new(1);
3472 }
3473 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3474 pub struct Socwp_SPEC;
3475 pub type Socwp = crate::EnumBitfieldStruct<u8, Socwp_SPEC>;
3476 impl Socwp {
3477 #[doc = "Bits SCOC and SDOC are protected."]
3478 pub const _0: Self = Self::new(0);
3479
3480 #[doc = "Bits SCOC and SDOC can be written (When writing simultaneously with the value of the target bit). This bit is read as 0."]
3481 pub const _1: Self = Self::new(1);
3482 }
3483 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3484 pub struct Excyc_SPEC;
3485 pub type Excyc = crate::EnumBitfieldStruct<u8, Excyc_SPEC>;
3486 impl Excyc {
3487 #[doc = "Does not output an extra SCL clock cycle (default)."]
3488 pub const _0: Self = Self::new(0);
3489
3490 #[doc = "Outputs an extra SCL clock cycle."]
3491 pub const _1: Self = Self::new(1);
3492 }
3493 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3494 pub struct Sdod_SPEC;
3495 pub type Sdod = crate::EnumBitfieldStruct<u8, Sdod_SPEC>;
3496 impl Sdod {
3497 #[doc = "No output delay"]
3498 pub const _000: Self = Self::new(0);
3499
3500 #[doc = "1 I3Cφ cycle (When OUTCTL.SDODCS = 0 (I3Cφ)) 1 or 2 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3501 pub const _001: Self = Self::new(1);
3502
3503 #[doc = "2 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 3 or 4 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3504 pub const _010: Self = Self::new(2);
3505
3506 #[doc = "3 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 5 or 6 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3507 pub const _011: Self = Self::new(3);
3508
3509 #[doc = "4 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 7 or 8 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3510 pub const _100: Self = Self::new(4);
3511
3512 #[doc = "5 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 9 or 10 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3513 pub const _101: Self = Self::new(5);
3514
3515 #[doc = "6 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 11 or 12 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3516 pub const _110: Self = Self::new(6);
3517
3518 #[doc = "7 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 13 or 14 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3519 pub const _111: Self = Self::new(7);
3520 }
3521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3522 pub struct Sdodcs_SPEC;
3523 pub type Sdodcs = crate::EnumBitfieldStruct<u8, Sdodcs_SPEC>;
3524 impl Sdodcs {
3525 #[doc = "The internal reference clock (I3Cφ) is selected as the clock source of the SDA output delay counter."]
3526 pub const _0: Self = Self::new(0);
3527
3528 #[doc = "The internal reference clock divided by 2 (I3Cφ/2) is selected as the clock source of the SDA output delay counter."]
3529 pub const _1: Self = Self::new(1);
3530 }
3531}
3532#[doc(hidden)]
3533#[derive(Copy, Clone, Eq, PartialEq)]
3534pub struct Inctl_SPEC;
3535impl crate::sealed::RegSpec for Inctl_SPEC {
3536 type DataType = u32;
3537}
3538
3539#[doc = "Input Control Register"]
3540pub type Inctl = crate::RegValueT<Inctl_SPEC>;
3541
3542impl Inctl {
3543 #[doc = "Digital Noise Filter Stage Selection"]
3544 #[inline(always)]
3545 pub fn dnfs(
3546 self,
3547 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Inctl_SPEC, crate::common::RW> {
3548 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Inctl_SPEC,crate::common::RW>::from_register(self,0)
3549 }
3550
3551 #[doc = "Digital Noise Filter Circuit Enable"]
3552 #[inline(always)]
3553 pub fn dnfe(
3554 self,
3555 ) -> crate::common::RegisterField<
3556 4,
3557 0x1,
3558 1,
3559 0,
3560 inctl::Dnfe,
3561 inctl::Dnfe,
3562 Inctl_SPEC,
3563 crate::common::RW,
3564 > {
3565 crate::common::RegisterField::<
3566 4,
3567 0x1,
3568 1,
3569 0,
3570 inctl::Dnfe,
3571 inctl::Dnfe,
3572 Inctl_SPEC,
3573 crate::common::RW,
3574 >::from_register(self, 0)
3575 }
3576}
3577impl ::core::default::Default for Inctl {
3578 #[inline(always)]
3579 fn default() -> Inctl {
3580 <crate::RegValueT<Inctl_SPEC> as RegisterValue<_>>::new(208)
3581 }
3582}
3583pub mod inctl {
3584
3585 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3586 pub struct Dnfe_SPEC;
3587 pub type Dnfe = crate::EnumBitfieldStruct<u8, Dnfe_SPEC>;
3588 impl Dnfe {
3589 #[doc = "No digital noise filter circuit is used."]
3590 pub const _0: Self = Self::new(0);
3591
3592 #[doc = "A digital noise filter circuit is used."]
3593 pub const _1: Self = Self::new(1);
3594 }
3595}
3596#[doc(hidden)]
3597#[derive(Copy, Clone, Eq, PartialEq)]
3598pub struct Tmoctl_SPEC;
3599impl crate::sealed::RegSpec for Tmoctl_SPEC {
3600 type DataType = u32;
3601}
3602
3603#[doc = "Timeout Control Register"]
3604pub type Tmoctl = crate::RegValueT<Tmoctl_SPEC>;
3605
3606impl Tmoctl {
3607 #[doc = "Timeout Detection Time Selection"]
3608 #[inline(always)]
3609 pub fn todts(
3610 self,
3611 ) -> crate::common::RegisterField<
3612 0,
3613 0x3,
3614 1,
3615 0,
3616 tmoctl::Todts,
3617 tmoctl::Todts,
3618 Tmoctl_SPEC,
3619 crate::common::RW,
3620 > {
3621 crate::common::RegisterField::<
3622 0,
3623 0x3,
3624 1,
3625 0,
3626 tmoctl::Todts,
3627 tmoctl::Todts,
3628 Tmoctl_SPEC,
3629 crate::common::RW,
3630 >::from_register(self, 0)
3631 }
3632
3633 #[doc = "Timeout L Count Control"]
3634 #[inline(always)]
3635 pub fn tolctl(
3636 self,
3637 ) -> crate::common::RegisterField<
3638 4,
3639 0x1,
3640 1,
3641 0,
3642 tmoctl::Tolctl,
3643 tmoctl::Tolctl,
3644 Tmoctl_SPEC,
3645 crate::common::RW,
3646 > {
3647 crate::common::RegisterField::<
3648 4,
3649 0x1,
3650 1,
3651 0,
3652 tmoctl::Tolctl,
3653 tmoctl::Tolctl,
3654 Tmoctl_SPEC,
3655 crate::common::RW,
3656 >::from_register(self, 0)
3657 }
3658
3659 #[doc = "Timeout H Count Control"]
3660 #[inline(always)]
3661 pub fn tohctl(
3662 self,
3663 ) -> crate::common::RegisterField<
3664 5,
3665 0x1,
3666 1,
3667 0,
3668 tmoctl::Tohctl,
3669 tmoctl::Tohctl,
3670 Tmoctl_SPEC,
3671 crate::common::RW,
3672 > {
3673 crate::common::RegisterField::<
3674 5,
3675 0x1,
3676 1,
3677 0,
3678 tmoctl::Tohctl,
3679 tmoctl::Tohctl,
3680 Tmoctl_SPEC,
3681 crate::common::RW,
3682 >::from_register(self, 0)
3683 }
3684
3685 #[doc = "Timeout Operation Mode Selection"]
3686 #[inline(always)]
3687 pub fn tomds(
3688 self,
3689 ) -> crate::common::RegisterField<
3690 6,
3691 0x3,
3692 1,
3693 0,
3694 tmoctl::Tomds,
3695 tmoctl::Tomds,
3696 Tmoctl_SPEC,
3697 crate::common::RW,
3698 > {
3699 crate::common::RegisterField::<
3700 6,
3701 0x3,
3702 1,
3703 0,
3704 tmoctl::Tomds,
3705 tmoctl::Tomds,
3706 Tmoctl_SPEC,
3707 crate::common::RW,
3708 >::from_register(self, 0)
3709 }
3710}
3711impl ::core::default::Default for Tmoctl {
3712 #[inline(always)]
3713 fn default() -> Tmoctl {
3714 <crate::RegValueT<Tmoctl_SPEC> as RegisterValue<_>>::new(48)
3715 }
3716}
3717pub mod tmoctl {
3718
3719 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3720 pub struct Todts_SPEC;
3721 pub type Todts = crate::EnumBitfieldStruct<u8, Todts_SPEC>;
3722 impl Todts {
3723 #[doc = "16bit-timeout"]
3724 pub const _00: Self = Self::new(0);
3725
3726 #[doc = "14bit-timeout"]
3727 pub const _01: Self = Self::new(1);
3728
3729 #[doc = "8bit-timeout"]
3730 pub const _10: Self = Self::new(2);
3731
3732 #[doc = "6bit-timeout"]
3733 pub const _11: Self = Self::new(3);
3734 }
3735 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3736 pub struct Tolctl_SPEC;
3737 pub type Tolctl = crate::EnumBitfieldStruct<u8, Tolctl_SPEC>;
3738 impl Tolctl {
3739 #[doc = "Count is disabled while the I3C_SCL line is at a low level."]
3740 pub const _0: Self = Self::new(0);
3741
3742 #[doc = "Count is enabled while the I3C_SCL line is at a low level."]
3743 pub const _1: Self = Self::new(1);
3744 }
3745 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3746 pub struct Tohctl_SPEC;
3747 pub type Tohctl = crate::EnumBitfieldStruct<u8, Tohctl_SPEC>;
3748 impl Tohctl {
3749 #[doc = "Count is disabled while the I3C_SCL line is at a high level."]
3750 pub const _0: Self = Self::new(0);
3751
3752 #[doc = "Count is enabled while the I3C_SCL line is at a high level."]
3753 pub const _1: Self = Self::new(1);
3754 }
3755 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3756 pub struct Tomds_SPEC;
3757 pub type Tomds = crate::EnumBitfieldStruct<u8, Tomds_SPEC>;
3758 impl Tomds {
3759 #[doc = "Timeout is detected during the following conditions: The bus is busy (BCST.BFREF = 0) in master mode.I3C’s own slave address is detected and the bus is busy in slave mode.The bus is free (BCST.BFREF = 1) while generation of a START condition is requested (CNDCTL.STCND = 1)."]
3760 pub const _00: Self = Self::new(0);
3761
3762 #[doc = "Timeout is detected while the bus is busy."]
3763 pub const _01: Self = Self::new(1);
3764
3765 #[doc = "Timeout is detected while the bus is free."]
3766 pub const _10: Self = Self::new(2);
3767
3768 #[doc = "Setting prohibited"]
3769 pub const _11: Self = Self::new(3);
3770 }
3771}
3772#[doc(hidden)]
3773#[derive(Copy, Clone, Eq, PartialEq)]
3774pub struct Wuctl_SPEC;
3775impl crate::sealed::RegSpec for Wuctl_SPEC {
3776 type DataType = u32;
3777}
3778
3779#[doc = "Wake Up Unit Control Register"]
3780pub type Wuctl = crate::RegValueT<Wuctl_SPEC>;
3781
3782impl Wuctl {
3783 #[doc = "Wake-Up Acknowledge Selection"]
3784 #[inline(always)]
3785 pub fn wuacks(
3786 self,
3787 ) -> crate::common::RegisterFieldBool<0, 1, 0, Wuctl_SPEC, crate::common::RW> {
3788 crate::common::RegisterFieldBool::<0, 1, 0, Wuctl_SPEC, crate::common::RW>::from_register(
3789 self, 0,
3790 )
3791 }
3792
3793 #[doc = "Wake-Up Analog Noise Filter Selection"]
3794 #[inline(always)]
3795 pub fn wuanfs(
3796 self,
3797 ) -> crate::common::RegisterField<
3798 4,
3799 0x1,
3800 1,
3801 0,
3802 wuctl::Wuanfs,
3803 wuctl::Wuanfs,
3804 Wuctl_SPEC,
3805 crate::common::RW,
3806 > {
3807 crate::common::RegisterField::<
3808 4,
3809 0x1,
3810 1,
3811 0,
3812 wuctl::Wuanfs,
3813 wuctl::Wuanfs,
3814 Wuctl_SPEC,
3815 crate::common::RW,
3816 >::from_register(self, 0)
3817 }
3818
3819 #[doc = "Wake-Up function PCLK Synchronous Enable"]
3820 #[inline(always)]
3821 pub fn wufsyne(
3822 self,
3823 ) -> crate::common::RegisterField<
3824 6,
3825 0x1,
3826 1,
3827 0,
3828 wuctl::Wufsyne,
3829 wuctl::Wufsyne,
3830 Wuctl_SPEC,
3831 crate::common::RW,
3832 > {
3833 crate::common::RegisterField::<
3834 6,
3835 0x1,
3836 1,
3837 0,
3838 wuctl::Wufsyne,
3839 wuctl::Wufsyne,
3840 Wuctl_SPEC,
3841 crate::common::RW,
3842 >::from_register(self, 0)
3843 }
3844
3845 #[doc = "Wake-Up function Enable"]
3846 #[inline(always)]
3847 pub fn wufe(
3848 self,
3849 ) -> crate::common::RegisterField<
3850 7,
3851 0x1,
3852 1,
3853 0,
3854 wuctl::Wufe,
3855 wuctl::Wufe,
3856 Wuctl_SPEC,
3857 crate::common::RW,
3858 > {
3859 crate::common::RegisterField::<
3860 7,
3861 0x1,
3862 1,
3863 0,
3864 wuctl::Wufe,
3865 wuctl::Wufe,
3866 Wuctl_SPEC,
3867 crate::common::RW,
3868 >::from_register(self, 0)
3869 }
3870}
3871impl ::core::default::Default for Wuctl {
3872 #[inline(always)]
3873 fn default() -> Wuctl {
3874 <crate::RegValueT<Wuctl_SPEC> as RegisterValue<_>>::new(65)
3875 }
3876}
3877pub mod wuctl {
3878
3879 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3880 pub struct Wuanfs_SPEC;
3881 pub type Wuanfs = crate::EnumBitfieldStruct<u8, Wuanfs_SPEC>;
3882 impl Wuanfs {
3883 #[doc = "Do not add the Wake Up analog filter."]
3884 pub const _0: Self = Self::new(0);
3885
3886 #[doc = "Add the Wake Up analog filter."]
3887 pub const _1: Self = Self::new(1);
3888 }
3889 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3890 pub struct Wufsyne_SPEC;
3891 pub type Wufsyne = crate::EnumBitfieldStruct<u8, Wufsyne_SPEC>;
3892 impl Wufsyne {
3893 #[doc = "I3C asynchronous circuit enable"]
3894 pub const _0: Self = Self::new(0);
3895
3896 #[doc = "I3C synchronous circuit enable"]
3897 pub const _1: Self = Self::new(1);
3898 }
3899 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3900 pub struct Wufe_SPEC;
3901 pub type Wufe = crate::EnumBitfieldStruct<u8, Wufe_SPEC>;
3902 impl Wufe {
3903 #[doc = "Wake-up function disables"]
3904 pub const _0: Self = Self::new(0);
3905
3906 #[doc = "Wake-up function enables"]
3907 pub const _1: Self = Self::new(1);
3908 }
3909}
3910#[doc(hidden)]
3911#[derive(Copy, Clone, Eq, PartialEq)]
3912pub struct Ackctl_SPEC;
3913impl crate::sealed::RegSpec for Ackctl_SPEC {
3914 type DataType = u32;
3915}
3916
3917#[doc = "Acknowledge Control Register"]
3918pub type Ackctl = crate::RegValueT<Ackctl_SPEC>;
3919
3920impl Ackctl {
3921 #[doc = "Acknowledge Reception"]
3922 #[inline(always)]
3923 pub fn ackr(
3924 self,
3925 ) -> crate::common::RegisterField<
3926 0,
3927 0x1,
3928 1,
3929 0,
3930 ackctl::Ackr,
3931 ackctl::Ackr,
3932 Ackctl_SPEC,
3933 crate::common::R,
3934 > {
3935 crate::common::RegisterField::<
3936 0,
3937 0x1,
3938 1,
3939 0,
3940 ackctl::Ackr,
3941 ackctl::Ackr,
3942 Ackctl_SPEC,
3943 crate::common::R,
3944 >::from_register(self, 0)
3945 }
3946
3947 #[doc = "Acknowledge Transmission"]
3948 #[inline(always)]
3949 pub fn ackt(
3950 self,
3951 ) -> crate::common::RegisterField<
3952 1,
3953 0x1,
3954 1,
3955 0,
3956 ackctl::Ackt,
3957 ackctl::Ackt,
3958 Ackctl_SPEC,
3959 crate::common::RW,
3960 > {
3961 crate::common::RegisterField::<
3962 1,
3963 0x1,
3964 1,
3965 0,
3966 ackctl::Ackt,
3967 ackctl::Ackt,
3968 Ackctl_SPEC,
3969 crate::common::RW,
3970 >::from_register(self, 0)
3971 }
3972
3973 #[doc = "ACKT Write Protect"]
3974 #[inline(always)]
3975 pub fn acktwp(
3976 self,
3977 ) -> crate::common::RegisterField<
3978 2,
3979 0x1,
3980 1,
3981 0,
3982 ackctl::Acktwp,
3983 ackctl::Acktwp,
3984 Ackctl_SPEC,
3985 crate::common::W,
3986 > {
3987 crate::common::RegisterField::<
3988 2,
3989 0x1,
3990 1,
3991 0,
3992 ackctl::Acktwp,
3993 ackctl::Acktwp,
3994 Ackctl_SPEC,
3995 crate::common::W,
3996 >::from_register(self, 0)
3997 }
3998}
3999impl ::core::default::Default for Ackctl {
4000 #[inline(always)]
4001 fn default() -> Ackctl {
4002 <crate::RegValueT<Ackctl_SPEC> as RegisterValue<_>>::new(0)
4003 }
4004}
4005pub mod ackctl {
4006
4007 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4008 pub struct Ackr_SPEC;
4009 pub type Ackr = crate::EnumBitfieldStruct<u8, Ackr_SPEC>;
4010 impl Ackr {
4011 #[doc = "A 0 is received as the acknowledge bit (ACK reception)."]
4012 pub const _0: Self = Self::new(0);
4013
4014 #[doc = "A 1 is received as the acknowledge bit (NACK reception)."]
4015 pub const _1: Self = Self::new(1);
4016 }
4017 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4018 pub struct Ackt_SPEC;
4019 pub type Ackt = crate::EnumBitfieldStruct<u8, Ackt_SPEC>;
4020 impl Ackt {
4021 #[doc = "A 0 is sent as the acknowledge bit (ACK transmission)."]
4022 pub const _0: Self = Self::new(0);
4023
4024 #[doc = "A 1 is sent as the acknowledge bit (NACK transmission)."]
4025 pub const _1: Self = Self::new(1);
4026 }
4027 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4028 pub struct Acktwp_SPEC;
4029 pub type Acktwp = crate::EnumBitfieldStruct<u8, Acktwp_SPEC>;
4030 impl Acktwp {
4031 #[doc = "The ACKT bit are protected."]
4032 pub const _0: Self = Self::new(0);
4033
4034 #[doc = "The ACKT bit can be written (when writing simultaneously with the value of the target bit). This bit is read as 0."]
4035 pub const _1: Self = Self::new(1);
4036 }
4037}
4038#[doc(hidden)]
4039#[derive(Copy, Clone, Eq, PartialEq)]
4040pub struct Scstrctl_SPEC;
4041impl crate::sealed::RegSpec for Scstrctl_SPEC {
4042 type DataType = u32;
4043}
4044
4045#[doc = "SCL Stretch Control Register"]
4046pub type Scstrctl = crate::RegValueT<Scstrctl_SPEC>;
4047
4048impl Scstrctl {
4049 #[doc = "Acknowledge Transmission Wait Enable"]
4050 #[inline(always)]
4051 pub fn acktwe(
4052 self,
4053 ) -> crate::common::RegisterField<
4054 0,
4055 0x1,
4056 1,
4057 0,
4058 scstrctl::Acktwe,
4059 scstrctl::Acktwe,
4060 Scstrctl_SPEC,
4061 crate::common::RW,
4062 > {
4063 crate::common::RegisterField::<
4064 0,
4065 0x1,
4066 1,
4067 0,
4068 scstrctl::Acktwe,
4069 scstrctl::Acktwe,
4070 Scstrctl_SPEC,
4071 crate::common::RW,
4072 >::from_register(self, 0)
4073 }
4074
4075 #[doc = "Receive Wait Enable"]
4076 #[inline(always)]
4077 pub fn rwe(
4078 self,
4079 ) -> crate::common::RegisterField<
4080 1,
4081 0x1,
4082 1,
4083 0,
4084 scstrctl::Rwe,
4085 scstrctl::Rwe,
4086 Scstrctl_SPEC,
4087 crate::common::RW,
4088 > {
4089 crate::common::RegisterField::<
4090 1,
4091 0x1,
4092 1,
4093 0,
4094 scstrctl::Rwe,
4095 scstrctl::Rwe,
4096 Scstrctl_SPEC,
4097 crate::common::RW,
4098 >::from_register(self, 0)
4099 }
4100}
4101impl ::core::default::Default for Scstrctl {
4102 #[inline(always)]
4103 fn default() -> Scstrctl {
4104 <crate::RegValueT<Scstrctl_SPEC> as RegisterValue<_>>::new(0)
4105 }
4106}
4107pub mod scstrctl {
4108
4109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4110 pub struct Acktwe_SPEC;
4111 pub type Acktwe = crate::EnumBitfieldStruct<u8, Acktwe_SPEC>;
4112 impl Acktwe {
4113 #[doc = "NTST.RDBFF0 is set at the rising edge of the ninth SCL clock cycle. (The I3C_SCL line is not held low at the falling edge of the eighth clock cycle.)"]
4114 pub const _0: Self = Self::new(0);
4115
4116 #[doc = "NTST.RDBFF0 is set at the rising edge of the eighth SCL clock cycle. (The I3C_SCL line is held low at the falling edge of the eighth clock cycle.) Low-hold is released by writing a value to the ACKCTL.ACKT bit."]
4117 pub const _1: Self = Self::new(1);
4118 }
4119 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4120 pub struct Rwe_SPEC;
4121 pub type Rwe = crate::EnumBitfieldStruct<u8, Rwe_SPEC>;
4122 impl Rwe {
4123 #[doc = "No WAIT (The period between ninth clock cycle and first clock cycle is not held low.)"]
4124 pub const _0: Self = Self::new(0);
4125
4126 #[doc = "WAIT (The period between ninth clock cycle and first clock cycle is held low.) Low-hold is released by reading NTDTBP0."]
4127 pub const _1: Self = Self::new(1);
4128 }
4129}
4130#[doc(hidden)]
4131#[derive(Copy, Clone, Eq, PartialEq)]
4132pub struct Scstlctl_SPEC;
4133impl crate::sealed::RegSpec for Scstlctl_SPEC {
4134 type DataType = u32;
4135}
4136
4137#[doc = "SCL Stalling Control Register"]
4138pub type Scstlctl = crate::RegValueT<Scstlctl_SPEC>;
4139
4140impl Scstlctl {
4141 #[doc = "Stalling Cycle"]
4142 #[inline(always)]
4143 pub fn stlcyc(
4144 self,
4145 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Scstlctl_SPEC, crate::common::RW>
4146 {
4147 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Scstlctl_SPEC,crate::common::RW>::from_register(self,0)
4148 }
4149
4150 #[doc = "Assigned Address Phase Enable"]
4151 #[inline(always)]
4152 pub fn aape(
4153 self,
4154 ) -> crate::common::RegisterField<
4155 28,
4156 0x1,
4157 1,
4158 0,
4159 scstlctl::Aape,
4160 scstlctl::Aape,
4161 Scstlctl_SPEC,
4162 crate::common::RW,
4163 > {
4164 crate::common::RegisterField::<
4165 28,
4166 0x1,
4167 1,
4168 0,
4169 scstlctl::Aape,
4170 scstlctl::Aape,
4171 Scstlctl_SPEC,
4172 crate::common::RW,
4173 >::from_register(self, 0)
4174 }
4175
4176 #[doc = "Parity Phase Enable"]
4177 #[inline(always)]
4178 pub fn parpe(
4179 self,
4180 ) -> crate::common::RegisterField<
4181 30,
4182 0x1,
4183 1,
4184 0,
4185 scstlctl::Parpe,
4186 scstlctl::Parpe,
4187 Scstlctl_SPEC,
4188 crate::common::RW,
4189 > {
4190 crate::common::RegisterField::<
4191 30,
4192 0x1,
4193 1,
4194 0,
4195 scstlctl::Parpe,
4196 scstlctl::Parpe,
4197 Scstlctl_SPEC,
4198 crate::common::RW,
4199 >::from_register(self, 0)
4200 }
4201
4202 #[doc = "ACK phase Enable"]
4203 #[inline(always)]
4204 pub fn ackpe(
4205 self,
4206 ) -> crate::common::RegisterField<
4207 31,
4208 0x1,
4209 1,
4210 0,
4211 scstlctl::Ackpe,
4212 scstlctl::Ackpe,
4213 Scstlctl_SPEC,
4214 crate::common::RW,
4215 > {
4216 crate::common::RegisterField::<
4217 31,
4218 0x1,
4219 1,
4220 0,
4221 scstlctl::Ackpe,
4222 scstlctl::Ackpe,
4223 Scstlctl_SPEC,
4224 crate::common::RW,
4225 >::from_register(self, 0)
4226 }
4227}
4228impl ::core::default::Default for Scstlctl {
4229 #[inline(always)]
4230 fn default() -> Scstlctl {
4231 <crate::RegValueT<Scstlctl_SPEC> as RegisterValue<_>>::new(0)
4232 }
4233}
4234pub mod scstlctl {
4235
4236 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4237 pub struct Aape_SPEC;
4238 pub type Aape = crate::EnumBitfieldStruct<u8, Aape_SPEC>;
4239 impl Aape {
4240 #[doc = "Does not stall the SCL clock during the address assignment phase."]
4241 pub const _0: Self = Self::new(0);
4242
4243 #[doc = "Stall the SCL clock during address assignment phase."]
4244 pub const _1: Self = Self::new(1);
4245 }
4246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4247 pub struct Parpe_SPEC;
4248 pub type Parpe = crate::EnumBitfieldStruct<u8, Parpe_SPEC>;
4249 impl Parpe {
4250 #[doc = "Does not stall the SCL clock during the parity bit period."]
4251 pub const _0: Self = Self::new(0);
4252
4253 #[doc = "Stall the SCL clock during the parity bit period."]
4254 pub const _1: Self = Self::new(1);
4255 }
4256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4257 pub struct Ackpe_SPEC;
4258 pub type Ackpe = crate::EnumBitfieldStruct<u8, Ackpe_SPEC>;
4259 impl Ackpe {
4260 #[doc = "Does not stall the SCL clock during the ACK/NACK phase."]
4261 pub const _0: Self = Self::new(0);
4262
4263 #[doc = "Stall the SCL clock during the ACK/NACK phase."]
4264 pub const _1: Self = Self::new(1);
4265 }
4266}
4267#[doc(hidden)]
4268#[derive(Copy, Clone, Eq, PartialEq)]
4269pub struct Svtdlg0_SPEC;
4270impl crate::sealed::RegSpec for Svtdlg0_SPEC {
4271 type DataType = u32;
4272}
4273
4274#[doc = "Slave Transfer Data Length Register 0"]
4275pub type Svtdlg0 = crate::RegValueT<Svtdlg0_SPEC>;
4276
4277impl Svtdlg0 {
4278 #[doc = "Slave Transfer Data Length"]
4279 #[inline(always)]
4280 pub fn stdlg(
4281 self,
4282 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Svtdlg0_SPEC, crate::common::RW>
4283 {
4284 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Svtdlg0_SPEC,crate::common::RW>::from_register(self,0)
4285 }
4286}
4287impl ::core::default::Default for Svtdlg0 {
4288 #[inline(always)]
4289 fn default() -> Svtdlg0 {
4290 <crate::RegValueT<Svtdlg0_SPEC> as RegisterValue<_>>::new(0)
4291 }
4292}
4293
4294#[doc(hidden)]
4295#[derive(Copy, Clone, Eq, PartialEq)]
4296pub struct Stctl_SPEC;
4297impl crate::sealed::RegSpec for Stctl_SPEC {
4298 type DataType = u32;
4299}
4300
4301#[doc = "Synchronous Timing Control Register"]
4302pub type Stctl = crate::RegValueT<Stctl_SPEC>;
4303
4304impl Stctl {
4305 #[doc = "Synchronous Timing output Enable"]
4306 #[inline(always)]
4307 pub fn stoe(
4308 self,
4309 ) -> crate::common::RegisterField<
4310 0,
4311 0x1,
4312 1,
4313 0,
4314 stctl::Stoe,
4315 stctl::Stoe,
4316 Stctl_SPEC,
4317 crate::common::RW,
4318 > {
4319 crate::common::RegisterField::<
4320 0,
4321 0x1,
4322 1,
4323 0,
4324 stctl::Stoe,
4325 stctl::Stoe,
4326 Stctl_SPEC,
4327 crate::common::RW,
4328 >::from_register(self, 0)
4329 }
4330}
4331impl ::core::default::Default for Stctl {
4332 #[inline(always)]
4333 fn default() -> Stctl {
4334 <crate::RegValueT<Stctl_SPEC> as RegisterValue<_>>::new(0)
4335 }
4336}
4337pub mod stctl {
4338
4339 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4340 pub struct Stoe_SPEC;
4341 pub type Stoe = crate::EnumBitfieldStruct<u8, Stoe_SPEC>;
4342 impl Stoe {
4343 #[doc = "Disable"]
4344 pub const _0: Self = Self::new(0);
4345
4346 #[doc = "Enable"]
4347 pub const _1: Self = Self::new(1);
4348 }
4349}
4350#[doc(hidden)]
4351#[derive(Copy, Clone, Eq, PartialEq)]
4352pub struct Atctl_SPEC;
4353impl crate::sealed::RegSpec for Atctl_SPEC {
4354 type DataType = u32;
4355}
4356
4357#[doc = "Asynchronous Timing Control Register"]
4358pub type Atctl = crate::RegValueT<Atctl_SPEC>;
4359
4360impl Atctl {
4361 #[doc = "Asynchronous Timing Trigger Select"]
4362 #[inline(always)]
4363 pub fn attrgs(
4364 self,
4365 ) -> crate::common::RegisterField<
4366 0,
4367 0x1,
4368 1,
4369 0,
4370 atctl::Attrgs,
4371 atctl::Attrgs,
4372 Atctl_SPEC,
4373 crate::common::RW,
4374 > {
4375 crate::common::RegisterField::<
4376 0,
4377 0x1,
4378 1,
4379 0,
4380 atctl::Attrgs,
4381 atctl::Attrgs,
4382 Atctl_SPEC,
4383 crate::common::RW,
4384 >::from_register(self, 0)
4385 }
4386
4387 #[doc = "MREF Output Enable (Capture Event / Counter Overflow)"]
4388 #[inline(always)]
4389 pub fn mrefoe(
4390 self,
4391 ) -> crate::common::RegisterField<
4392 1,
4393 0x1,
4394 1,
4395 0,
4396 atctl::Mrefoe,
4397 atctl::Mrefoe,
4398 Atctl_SPEC,
4399 crate::common::RW,
4400 > {
4401 crate::common::RegisterField::<
4402 1,
4403 0x1,
4404 1,
4405 0,
4406 atctl::Mrefoe,
4407 atctl::Mrefoe,
4408 Atctl_SPEC,
4409 crate::common::RW,
4410 >::from_register(self, 0)
4411 }
4412
4413 #[doc = "Additional Master-initiated bus Event Output Enable"]
4414 #[inline(always)]
4415 pub fn ameoe(
4416 self,
4417 ) -> crate::common::RegisterField<
4418 2,
4419 0x1,
4420 1,
4421 0,
4422 atctl::Ameoe,
4423 atctl::Ameoe,
4424 Atctl_SPEC,
4425 crate::common::RW,
4426 > {
4427 crate::common::RegisterField::<
4428 2,
4429 0x1,
4430 1,
4431 0,
4432 atctl::Ameoe,
4433 atctl::Ameoe,
4434 Atctl_SPEC,
4435 crate::common::RW,
4436 >::from_register(self, 0)
4437 }
4438
4439 #[doc = "TCLK Counter Divide Setting"]
4440 #[inline(always)]
4441 pub fn cdiv(
4442 self,
4443 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Atctl_SPEC, crate::common::RW> {
4444 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Atctl_SPEC,crate::common::RW>::from_register(self,0)
4445 }
4446}
4447impl ::core::default::Default for Atctl {
4448 #[inline(always)]
4449 fn default() -> Atctl {
4450 <crate::RegValueT<Atctl_SPEC> as RegisterValue<_>>::new(0)
4451 }
4452}
4453pub mod atctl {
4454
4455 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4456 pub struct Attrgs_SPEC;
4457 pub type Attrgs = crate::EnumBitfieldStruct<u8, Attrgs_SPEC>;
4458 impl Attrgs {
4459 #[doc = "Software trigger"]
4460 pub const _0: Self = Self::new(0);
4461
4462 #[doc = "Hardware trigger"]
4463 pub const _1: Self = Self::new(1);
4464 }
4465 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4466 pub struct Mrefoe_SPEC;
4467 pub type Mrefoe = crate::EnumBitfieldStruct<u8, Mrefoe_SPEC>;
4468 impl Mrefoe {
4469 #[doc = "Disable"]
4470 pub const _0: Self = Self::new(0);
4471
4472 #[doc = "Enable"]
4473 pub const _1: Self = Self::new(1);
4474 }
4475 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4476 pub struct Ameoe_SPEC;
4477 pub type Ameoe = crate::EnumBitfieldStruct<u8, Ameoe_SPEC>;
4478 impl Ameoe {
4479 #[doc = "Disable"]
4480 pub const _0: Self = Self::new(0);
4481
4482 #[doc = "Enable"]
4483 pub const _1: Self = Self::new(1);
4484 }
4485}
4486#[doc(hidden)]
4487#[derive(Copy, Clone, Eq, PartialEq)]
4488pub struct Attrg_SPEC;
4489impl crate::sealed::RegSpec for Attrg_SPEC {
4490 type DataType = u32;
4491}
4492
4493#[doc = "Asynchronous Timing Trigger Register"]
4494pub type Attrg = crate::RegValueT<Attrg_SPEC>;
4495
4496impl Attrg {
4497 #[doc = "Asynchronous Timing Software Trigger"]
4498 #[inline(always)]
4499 pub fn atstrg(
4500 self,
4501 ) -> crate::common::RegisterField<
4502 0,
4503 0x1,
4504 1,
4505 0,
4506 attrg::Atstrg,
4507 attrg::Atstrg,
4508 Attrg_SPEC,
4509 crate::common::W,
4510 > {
4511 crate::common::RegisterField::<
4512 0,
4513 0x1,
4514 1,
4515 0,
4516 attrg::Atstrg,
4517 attrg::Atstrg,
4518 Attrg_SPEC,
4519 crate::common::W,
4520 >::from_register(self, 0)
4521 }
4522}
4523impl ::core::default::Default for Attrg {
4524 #[inline(always)]
4525 fn default() -> Attrg {
4526 <crate::RegValueT<Attrg_SPEC> as RegisterValue<_>>::new(0)
4527 }
4528}
4529pub mod attrg {
4530
4531 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4532 pub struct Atstrg_SPEC;
4533 pub type Atstrg = crate::EnumBitfieldStruct<u8, Atstrg_SPEC>;
4534 impl Atstrg {
4535 #[doc = "Do nothing"]
4536 pub const _0: Self = Self::new(0);
4537
4538 #[doc = "Software trigger (one-shot pulse) output This bit is always read as 0."]
4539 pub const _1: Self = Self::new(1);
4540 }
4541}
4542#[doc(hidden)]
4543#[derive(Copy, Clone, Eq, PartialEq)]
4544pub struct Atccnte_SPEC;
4545impl crate::sealed::RegSpec for Atccnte_SPEC {
4546 type DataType = u32;
4547}
4548
4549#[doc = "Asynchronous Timing Contorol Counter enable Register"]
4550pub type Atccnte = crate::RegValueT<Atccnte_SPEC>;
4551
4552impl Atccnte {
4553 #[doc = "Asynchronous Timing Counter Enable for MREF, MC2, SC1, SC2."]
4554 #[inline(always)]
4555 pub fn atce(
4556 self,
4557 ) -> crate::common::RegisterField<
4558 0,
4559 0x1,
4560 1,
4561 0,
4562 atccnte::Atce,
4563 atccnte::Atce,
4564 Atccnte_SPEC,
4565 crate::common::RW,
4566 > {
4567 crate::common::RegisterField::<
4568 0,
4569 0x1,
4570 1,
4571 0,
4572 atccnte::Atce,
4573 atccnte::Atce,
4574 Atccnte_SPEC,
4575 crate::common::RW,
4576 >::from_register(self, 0)
4577 }
4578}
4579impl ::core::default::Default for Atccnte {
4580 #[inline(always)]
4581 fn default() -> Atccnte {
4582 <crate::RegValueT<Atccnte_SPEC> as RegisterValue<_>>::new(0)
4583 }
4584}
4585pub mod atccnte {
4586
4587 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4588 pub struct Atce_SPEC;
4589 pub type Atce = crate::EnumBitfieldStruct<u8, Atce_SPEC>;
4590 impl Atce {
4591 #[doc = "Disable"]
4592 pub const _0: Self = Self::new(0);
4593
4594 #[doc = "Enable"]
4595 pub const _1: Self = Self::new(1);
4596 }
4597}
4598#[doc(hidden)]
4599#[derive(Copy, Clone, Eq, PartialEq)]
4600pub struct Cndctl_SPEC;
4601impl crate::sealed::RegSpec for Cndctl_SPEC {
4602 type DataType = u32;
4603}
4604
4605#[doc = "Condition Control Register"]
4606pub type Cndctl = crate::RegValueT<Cndctl_SPEC>;
4607
4608impl Cndctl {
4609 #[doc = "START (S) Condition Issuance"]
4610 #[inline(always)]
4611 pub fn stcnd(
4612 self,
4613 ) -> crate::common::RegisterField<
4614 0,
4615 0x1,
4616 1,
4617 0,
4618 cndctl::Stcnd,
4619 cndctl::Stcnd,
4620 Cndctl_SPEC,
4621 crate::common::RW,
4622 > {
4623 crate::common::RegisterField::<
4624 0,
4625 0x1,
4626 1,
4627 0,
4628 cndctl::Stcnd,
4629 cndctl::Stcnd,
4630 Cndctl_SPEC,
4631 crate::common::RW,
4632 >::from_register(self, 0)
4633 }
4634
4635 #[doc = "Repeated START (Sr) Condition Issuance"]
4636 #[inline(always)]
4637 pub fn srcnd(
4638 self,
4639 ) -> crate::common::RegisterField<
4640 1,
4641 0x1,
4642 1,
4643 0,
4644 cndctl::Srcnd,
4645 cndctl::Srcnd,
4646 Cndctl_SPEC,
4647 crate::common::RW,
4648 > {
4649 crate::common::RegisterField::<
4650 1,
4651 0x1,
4652 1,
4653 0,
4654 cndctl::Srcnd,
4655 cndctl::Srcnd,
4656 Cndctl_SPEC,
4657 crate::common::RW,
4658 >::from_register(self, 0)
4659 }
4660
4661 #[doc = "STOP (P) Condition Issuance"]
4662 #[inline(always)]
4663 pub fn spcnd(
4664 self,
4665 ) -> crate::common::RegisterField<
4666 2,
4667 0x1,
4668 1,
4669 0,
4670 cndctl::Spcnd,
4671 cndctl::Spcnd,
4672 Cndctl_SPEC,
4673 crate::common::RW,
4674 > {
4675 crate::common::RegisterField::<
4676 2,
4677 0x1,
4678 1,
4679 0,
4680 cndctl::Spcnd,
4681 cndctl::Spcnd,
4682 Cndctl_SPEC,
4683 crate::common::RW,
4684 >::from_register(self, 0)
4685 }
4686}
4687impl ::core::default::Default for Cndctl {
4688 #[inline(always)]
4689 fn default() -> Cndctl {
4690 <crate::RegValueT<Cndctl_SPEC> as RegisterValue<_>>::new(0)
4691 }
4692}
4693pub mod cndctl {
4694
4695 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4696 pub struct Stcnd_SPEC;
4697 pub type Stcnd = crate::EnumBitfieldStruct<u8, Stcnd_SPEC>;
4698 impl Stcnd {
4699 #[doc = "Does not request to issue a START condition."]
4700 pub const _0: Self = Self::new(0);
4701
4702 #[doc = "Requests to issue a START condition."]
4703 pub const _1: Self = Self::new(1);
4704 }
4705 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4706 pub struct Srcnd_SPEC;
4707 pub type Srcnd = crate::EnumBitfieldStruct<u8, Srcnd_SPEC>;
4708 impl Srcnd {
4709 #[doc = "Does not request to issue a Repeated START condition."]
4710 pub const _0: Self = Self::new(0);
4711
4712 #[doc = "Requests to issue a Repeated START condition."]
4713 pub const _1: Self = Self::new(1);
4714 }
4715 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4716 pub struct Spcnd_SPEC;
4717 pub type Spcnd = crate::EnumBitfieldStruct<u8, Spcnd_SPEC>;
4718 impl Spcnd {
4719 #[doc = "Does not request to issue a STOP condition."]
4720 pub const _0: Self = Self::new(0);
4721
4722 #[doc = "Requests to issue a STOP condition."]
4723 pub const _1: Self = Self::new(1);
4724 }
4725}
4726#[doc(hidden)]
4727#[derive(Copy, Clone, Eq, PartialEq)]
4728pub struct Ncmdqp_SPEC;
4729impl crate::sealed::RegSpec for Ncmdqp_SPEC {
4730 type DataType = u32;
4731}
4732
4733#[doc = "Normal Command Queue Port Register"]
4734pub type Ncmdqp = crate::RegValueT<Ncmdqp_SPEC>;
4735
4736impl NoBitfieldReg<Ncmdqp_SPEC> for Ncmdqp {}
4737impl ::core::default::Default for Ncmdqp {
4738 #[inline(always)]
4739 fn default() -> Ncmdqp {
4740 <crate::RegValueT<Ncmdqp_SPEC> as RegisterValue<_>>::new(0)
4741 }
4742}
4743
4744#[doc(hidden)]
4745#[derive(Copy, Clone, Eq, PartialEq)]
4746pub struct Nrspqp_SPEC;
4747impl crate::sealed::RegSpec for Nrspqp_SPEC {
4748 type DataType = u32;
4749}
4750
4751#[doc = "Normal Response Queue Port Register"]
4752pub type Nrspqp = crate::RegValueT<Nrspqp_SPEC>;
4753
4754impl NoBitfieldReg<Nrspqp_SPEC> for Nrspqp {}
4755impl ::core::default::Default for Nrspqp {
4756 #[inline(always)]
4757 fn default() -> Nrspqp {
4758 <crate::RegValueT<Nrspqp_SPEC> as RegisterValue<_>>::new(0)
4759 }
4760}
4761
4762#[doc(hidden)]
4763#[derive(Copy, Clone, Eq, PartialEq)]
4764pub struct Ntdtbp0_SPEC;
4765impl crate::sealed::RegSpec for Ntdtbp0_SPEC {
4766 type DataType = u32;
4767}
4768
4769#[doc = "Normal Transfer Data Buffer Port Register 0"]
4770pub type Ntdtbp0 = crate::RegValueT<Ntdtbp0_SPEC>;
4771
4772impl NoBitfieldReg<Ntdtbp0_SPEC> for Ntdtbp0 {}
4773impl ::core::default::Default for Ntdtbp0 {
4774 #[inline(always)]
4775 fn default() -> Ntdtbp0 {
4776 <crate::RegValueT<Ntdtbp0_SPEC> as RegisterValue<_>>::new(0)
4777 }
4778}
4779
4780#[doc(hidden)]
4781#[derive(Copy, Clone, Eq, PartialEq)]
4782pub struct Ntdtbp0By_SPEC;
4783impl crate::sealed::RegSpec for Ntdtbp0By_SPEC {
4784 type DataType = u8;
4785}
4786
4787#[doc = "Normal Transfer Data Buffer Port Register 0"]
4788pub type Ntdtbp0By = crate::RegValueT<Ntdtbp0By_SPEC>;
4789
4790impl NoBitfieldReg<Ntdtbp0By_SPEC> for Ntdtbp0By {}
4791impl ::core::default::Default for Ntdtbp0By {
4792 #[inline(always)]
4793 fn default() -> Ntdtbp0By {
4794 <crate::RegValueT<Ntdtbp0By_SPEC> as RegisterValue<_>>::new(0)
4795 }
4796}
4797
4798#[doc(hidden)]
4799#[derive(Copy, Clone, Eq, PartialEq)]
4800pub struct Nibiqp_SPEC;
4801impl crate::sealed::RegSpec for Nibiqp_SPEC {
4802 type DataType = u32;
4803}
4804
4805#[doc = "Normal IBI Queue Port Register"]
4806pub type Nibiqp = crate::RegValueT<Nibiqp_SPEC>;
4807
4808impl NoBitfieldReg<Nibiqp_SPEC> for Nibiqp {}
4809impl ::core::default::Default for Nibiqp {
4810 #[inline(always)]
4811 fn default() -> Nibiqp {
4812 <crate::RegValueT<Nibiqp_SPEC> as RegisterValue<_>>::new(0)
4813 }
4814}
4815
4816#[doc(hidden)]
4817#[derive(Copy, Clone, Eq, PartialEq)]
4818pub struct Nrsqp_SPEC;
4819impl crate::sealed::RegSpec for Nrsqp_SPEC {
4820 type DataType = u32;
4821}
4822
4823#[doc = "Normal Receive Status Queue Port Register"]
4824pub type Nrsqp = crate::RegValueT<Nrsqp_SPEC>;
4825
4826impl NoBitfieldReg<Nrsqp_SPEC> for Nrsqp {}
4827impl ::core::default::Default for Nrsqp {
4828 #[inline(always)]
4829 fn default() -> Nrsqp {
4830 <crate::RegValueT<Nrsqp_SPEC> as RegisterValue<_>>::new(0)
4831 }
4832}
4833
4834#[doc(hidden)]
4835#[derive(Copy, Clone, Eq, PartialEq)]
4836pub struct Hcmdqp_SPEC;
4837impl crate::sealed::RegSpec for Hcmdqp_SPEC {
4838 type DataType = u32;
4839}
4840
4841#[doc = "High Priority Command Queue Port Register"]
4842pub type Hcmdqp = crate::RegValueT<Hcmdqp_SPEC>;
4843
4844impl NoBitfieldReg<Hcmdqp_SPEC> for Hcmdqp {}
4845impl ::core::default::Default for Hcmdqp {
4846 #[inline(always)]
4847 fn default() -> Hcmdqp {
4848 <crate::RegValueT<Hcmdqp_SPEC> as RegisterValue<_>>::new(0)
4849 }
4850}
4851
4852#[doc(hidden)]
4853#[derive(Copy, Clone, Eq, PartialEq)]
4854pub struct Hrspqp_SPEC;
4855impl crate::sealed::RegSpec for Hrspqp_SPEC {
4856 type DataType = u32;
4857}
4858
4859#[doc = "High Priority Response Queue Port Register"]
4860pub type Hrspqp = crate::RegValueT<Hrspqp_SPEC>;
4861
4862impl NoBitfieldReg<Hrspqp_SPEC> for Hrspqp {}
4863impl ::core::default::Default for Hrspqp {
4864 #[inline(always)]
4865 fn default() -> Hrspqp {
4866 <crate::RegValueT<Hrspqp_SPEC> as RegisterValue<_>>::new(0)
4867 }
4868}
4869
4870#[doc(hidden)]
4871#[derive(Copy, Clone, Eq, PartialEq)]
4872pub struct Htdtbp_SPEC;
4873impl crate::sealed::RegSpec for Htdtbp_SPEC {
4874 type DataType = u32;
4875}
4876
4877#[doc = "High Priority Transfer Data Buffer Port Register"]
4878pub type Htdtbp = crate::RegValueT<Htdtbp_SPEC>;
4879
4880impl NoBitfieldReg<Htdtbp_SPEC> for Htdtbp {}
4881impl ::core::default::Default for Htdtbp {
4882 #[inline(always)]
4883 fn default() -> Htdtbp {
4884 <crate::RegValueT<Htdtbp_SPEC> as RegisterValue<_>>::new(0)
4885 }
4886}
4887
4888#[doc(hidden)]
4889#[derive(Copy, Clone, Eq, PartialEq)]
4890pub struct Nqthctl_SPEC;
4891impl crate::sealed::RegSpec for Nqthctl_SPEC {
4892 type DataType = u32;
4893}
4894
4895#[doc = "Normal Queue Threshold Control Register"]
4896pub type Nqthctl = crate::RegValueT<Nqthctl_SPEC>;
4897
4898impl Nqthctl {
4899 #[doc = "Normal Command Ready Queue Threshold"]
4900 #[inline(always)]
4901 pub fn cmdqth(
4902 self,
4903 ) -> crate::common::RegisterField<
4904 0,
4905 0xff,
4906 1,
4907 0,
4908 nqthctl::Cmdqth,
4909 nqthctl::Cmdqth,
4910 Nqthctl_SPEC,
4911 crate::common::RW,
4912 > {
4913 crate::common::RegisterField::<
4914 0,
4915 0xff,
4916 1,
4917 0,
4918 nqthctl::Cmdqth,
4919 nqthctl::Cmdqth,
4920 Nqthctl_SPEC,
4921 crate::common::RW,
4922 >::from_register(self, 0)
4923 }
4924
4925 #[doc = "Normal Response Queue Threshold"]
4926 #[inline(always)]
4927 pub fn rspqth(
4928 self,
4929 ) -> crate::common::RegisterField<
4930 8,
4931 0xff,
4932 1,
4933 0,
4934 nqthctl::Rspqth,
4935 nqthctl::Rspqth,
4936 Nqthctl_SPEC,
4937 crate::common::RW,
4938 > {
4939 crate::common::RegisterField::<
4940 8,
4941 0xff,
4942 1,
4943 0,
4944 nqthctl::Rspqth,
4945 nqthctl::Rspqth,
4946 Nqthctl_SPEC,
4947 crate::common::RW,
4948 >::from_register(self, 0)
4949 }
4950
4951 #[doc = "Normal IBI Data Segment Size"]
4952 #[inline(always)]
4953 pub fn ibidssz(
4954 self,
4955 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqthctl_SPEC, crate::common::RW> {
4956 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqthctl_SPEC,crate::common::RW>::from_register(self,0)
4957 }
4958
4959 #[doc = "Normal IBI Queue Threshold"]
4960 #[inline(always)]
4961 pub fn ibiqth(
4962 self,
4963 ) -> crate::common::RegisterField<
4964 24,
4965 0xff,
4966 1,
4967 0,
4968 nqthctl::Ibiqth,
4969 nqthctl::Ibiqth,
4970 Nqthctl_SPEC,
4971 crate::common::RW,
4972 > {
4973 crate::common::RegisterField::<
4974 24,
4975 0xff,
4976 1,
4977 0,
4978 nqthctl::Ibiqth,
4979 nqthctl::Ibiqth,
4980 Nqthctl_SPEC,
4981 crate::common::RW,
4982 >::from_register(self, 0)
4983 }
4984}
4985impl ::core::default::Default for Nqthctl {
4986 #[inline(always)]
4987 fn default() -> Nqthctl {
4988 <crate::RegValueT<Nqthctl_SPEC> as RegisterValue<_>>::new(16843009)
4989 }
4990}
4991pub mod nqthctl {
4992
4993 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4994 pub struct Cmdqth_SPEC;
4995 pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
4996 impl Cmdqth {
4997 #[doc = "Interrupt is issued when Command Queue is completely empty."]
4998 pub const _0_X_00: Self = Self::new(0);
4999
5000 #[doc = "Interrupt is issued when Command Queue contains N empties. (N = CMDQTH\\[7:0\\])"]
5001 pub const OTHERS: Self = Self::new(0);
5002 }
5003 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5004 pub struct Rspqth_SPEC;
5005 pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
5006 impl Rspqth {
5007 #[doc = "Interrupt is issued when Response Queue contains 1 entry (DWORD)."]
5008 pub const _0_X_00: Self = Self::new(0);
5009
5010 #[doc = "Interrupt is triggered when Response Queue contains N+1 entries (DWORD). (N = CMDQTH\\[7:0\\])"]
5011 pub const OTHERS: Self = Self::new(0);
5012 }
5013 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5014 pub struct Ibiqth_SPEC;
5015 pub type Ibiqth = crate::EnumBitfieldStruct<u8, Ibiqth_SPEC>;
5016 impl Ibiqth {
5017 #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is 1 or more. I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer is completely empty."]
5018 pub const _0_X_00: Self = Self::new(0);
5019
5020 #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is N + 1 or more. (N = CMDQTH\\[7:0\\]) I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer contains N empties."]
5021 pub const OTHERS: Self = Self::new(0);
5022 }
5023}
5024#[doc(hidden)]
5025#[derive(Copy, Clone, Eq, PartialEq)]
5026pub struct Ntbthctl0_SPEC;
5027impl crate::sealed::RegSpec for Ntbthctl0_SPEC {
5028 type DataType = u32;
5029}
5030
5031#[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
5032pub type Ntbthctl0 = crate::RegValueT<Ntbthctl0_SPEC>;
5033
5034impl Ntbthctl0 {
5035 #[doc = "Normal Transmit Data Buffer Threshold"]
5036 #[inline(always)]
5037 pub fn txdbth(
5038 self,
5039 ) -> crate::common::RegisterField<
5040 0,
5041 0x7,
5042 1,
5043 0,
5044 ntbthctl0::Txdbth,
5045 ntbthctl0::Txdbth,
5046 Ntbthctl0_SPEC,
5047 crate::common::RW,
5048 > {
5049 crate::common::RegisterField::<
5050 0,
5051 0x7,
5052 1,
5053 0,
5054 ntbthctl0::Txdbth,
5055 ntbthctl0::Txdbth,
5056 Ntbthctl0_SPEC,
5057 crate::common::RW,
5058 >::from_register(self, 0)
5059 }
5060
5061 #[doc = "Normal Receive Data Buffer Threshold"]
5062 #[inline(always)]
5063 pub fn rxdbth(
5064 self,
5065 ) -> crate::common::RegisterField<
5066 8,
5067 0x7,
5068 1,
5069 0,
5070 ntbthctl0::Rxdbth,
5071 ntbthctl0::Rxdbth,
5072 Ntbthctl0_SPEC,
5073 crate::common::RW,
5074 > {
5075 crate::common::RegisterField::<
5076 8,
5077 0x7,
5078 1,
5079 0,
5080 ntbthctl0::Rxdbth,
5081 ntbthctl0::Rxdbth,
5082 Ntbthctl0_SPEC,
5083 crate::common::RW,
5084 >::from_register(self, 0)
5085 }
5086
5087 #[doc = "Normal Tx Start Threshold"]
5088 #[inline(always)]
5089 pub fn txstth(
5090 self,
5091 ) -> crate::common::RegisterField<
5092 16,
5093 0x7,
5094 1,
5095 0,
5096 ntbthctl0::Txstth,
5097 ntbthctl0::Txstth,
5098 Ntbthctl0_SPEC,
5099 crate::common::RW,
5100 > {
5101 crate::common::RegisterField::<
5102 16,
5103 0x7,
5104 1,
5105 0,
5106 ntbthctl0::Txstth,
5107 ntbthctl0::Txstth,
5108 Ntbthctl0_SPEC,
5109 crate::common::RW,
5110 >::from_register(self, 0)
5111 }
5112
5113 #[doc = "Normal Rx Start Threshold"]
5114 #[inline(always)]
5115 pub fn rxstth(
5116 self,
5117 ) -> crate::common::RegisterField<
5118 24,
5119 0x7,
5120 1,
5121 0,
5122 ntbthctl0::Rxstth,
5123 ntbthctl0::Rxstth,
5124 Ntbthctl0_SPEC,
5125 crate::common::RW,
5126 > {
5127 crate::common::RegisterField::<
5128 24,
5129 0x7,
5130 1,
5131 0,
5132 ntbthctl0::Rxstth,
5133 ntbthctl0::Rxstth,
5134 Ntbthctl0_SPEC,
5135 crate::common::RW,
5136 >::from_register(self, 0)
5137 }
5138}
5139impl ::core::default::Default for Ntbthctl0 {
5140 #[inline(always)]
5141 fn default() -> Ntbthctl0 {
5142 <crate::RegValueT<Ntbthctl0_SPEC> as RegisterValue<_>>::new(16843009)
5143 }
5144}
5145pub mod ntbthctl0 {
5146
5147 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5148 pub struct Txdbth_SPEC;
5149 pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
5150 impl Txdbth {
5151 #[doc = "Interrupt triggers at 2 Tx Buffer empties, DWORDs"]
5152 pub const _000: Self = Self::new(0);
5153
5154 #[doc = "Interrupt triggers at 4 Tx Buffer empties, DWORDs"]
5155 pub const _001: Self = Self::new(1);
5156
5157 #[doc = "Interrupt triggers at 8 Tx Buffer empties, DWORDs"]
5158 pub const _010: Self = Self::new(2);
5159
5160 #[doc = "Interrupt triggers at 16 Tx Buffer empties, DWORDs"]
5161 pub const _011: Self = Self::new(3);
5162
5163 #[doc = "Setting prohibited"]
5164 pub const OTHERS: Self = Self::new(0);
5165 }
5166 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5167 pub struct Rxdbth_SPEC;
5168 pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
5169 impl Rxdbth {
5170 #[doc = "Interrupt triggers at 2 Rx Buffer entries, DWORDs"]
5171 pub const _000: Self = Self::new(0);
5172
5173 #[doc = "Interrupt triggers at 4 Rx Buffer entries, DWORDs"]
5174 pub const _001: Self = Self::new(1);
5175
5176 #[doc = "Interrupt triggers at 8 Rx Buffer entries, DWORDs"]
5177 pub const _010: Self = Self::new(2);
5178
5179 #[doc = "Interrupt triggers at 16 Rx Buffer entries, DWORDs"]
5180 pub const _011: Self = Self::new(3);
5181
5182 #[doc = "Setting prohibited"]
5183 pub const OTHERS: Self = Self::new(0);
5184 }
5185 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5186 pub struct Txstth_SPEC;
5187 pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
5188 impl Txstth {
5189 #[doc = "Wait for 2 entry DWORDs"]
5190 pub const _000: Self = Self::new(0);
5191
5192 #[doc = "Wait for 4 entry DWORDs"]
5193 pub const _001: Self = Self::new(1);
5194
5195 #[doc = "Wait for 8 entry DWORDs"]
5196 pub const _010: Self = Self::new(2);
5197
5198 #[doc = "Wait for 16 entry DWORDs"]
5199 pub const _011: Self = Self::new(3);
5200
5201 #[doc = "Setting prohibited"]
5202 pub const OTHERS: Self = Self::new(0);
5203 }
5204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5205 pub struct Rxstth_SPEC;
5206 pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
5207 impl Rxstth {
5208 #[doc = "Wait for 2 empty DWORDs"]
5209 pub const _000: Self = Self::new(0);
5210
5211 #[doc = "Wait for 4 empty DWORDs"]
5212 pub const _001: Self = Self::new(1);
5213
5214 #[doc = "Wait for 8 empty DWORDs"]
5215 pub const _010: Self = Self::new(2);
5216
5217 #[doc = "Wait for 16 empty DWORDs"]
5218 pub const _011: Self = Self::new(3);
5219
5220 #[doc = "Setting prohibited"]
5221 pub const OTHERS: Self = Self::new(0);
5222 }
5223}
5224#[doc(hidden)]
5225#[derive(Copy, Clone, Eq, PartialEq)]
5226pub struct Nrqthctl_SPEC;
5227impl crate::sealed::RegSpec for Nrqthctl_SPEC {
5228 type DataType = u32;
5229}
5230
5231#[doc = "Normal Receive Status Queue Threshold Control Register"]
5232pub type Nrqthctl = crate::RegValueT<Nrqthctl_SPEC>;
5233
5234impl Nrqthctl {
5235 #[doc = "Normal Receive Status Queue Threshold"]
5236 #[inline(always)]
5237 pub fn rsqth(
5238 self,
5239 ) -> crate::common::RegisterField<
5240 0,
5241 0xff,
5242 1,
5243 0,
5244 nrqthctl::Rsqth,
5245 nrqthctl::Rsqth,
5246 Nrqthctl_SPEC,
5247 crate::common::RW,
5248 > {
5249 crate::common::RegisterField::<
5250 0,
5251 0xff,
5252 1,
5253 0,
5254 nrqthctl::Rsqth,
5255 nrqthctl::Rsqth,
5256 Nrqthctl_SPEC,
5257 crate::common::RW,
5258 >::from_register(self, 0)
5259 }
5260}
5261impl ::core::default::Default for Nrqthctl {
5262 #[inline(always)]
5263 fn default() -> Nrqthctl {
5264 <crate::RegValueT<Nrqthctl_SPEC> as RegisterValue<_>>::new(1)
5265 }
5266}
5267pub mod nrqthctl {
5268
5269 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5270 pub struct Rsqth_SPEC;
5271 pub type Rsqth = crate::EnumBitfieldStruct<u8, Rsqth_SPEC>;
5272 impl Rsqth {
5273 #[doc = "Interrupt is issued when Receive Status Queue contains 1 entry (DWORD)."]
5274 pub const _0_X_00: Self = Self::new(0);
5275
5276 #[doc = "Interrupt is triggered when Receive Status Queue contains N+1 entries (DWORD). (N = RSQTH\\[7:0\\])"]
5277 pub const OTHERS: Self = Self::new(0);
5278 }
5279}
5280#[doc(hidden)]
5281#[derive(Copy, Clone, Eq, PartialEq)]
5282pub struct Hqthctl_SPEC;
5283impl crate::sealed::RegSpec for Hqthctl_SPEC {
5284 type DataType = u32;
5285}
5286
5287#[doc = "High Priority Queue Threshold Control Register"]
5288pub type Hqthctl = crate::RegValueT<Hqthctl_SPEC>;
5289
5290impl Hqthctl {
5291 #[doc = "High Priority Command Ready Queue Threshold"]
5292 #[inline(always)]
5293 pub fn cmdqth(
5294 self,
5295 ) -> crate::common::RegisterField<
5296 0,
5297 0xff,
5298 1,
5299 0,
5300 hqthctl::Cmdqth,
5301 hqthctl::Cmdqth,
5302 Hqthctl_SPEC,
5303 crate::common::RW,
5304 > {
5305 crate::common::RegisterField::<
5306 0,
5307 0xff,
5308 1,
5309 0,
5310 hqthctl::Cmdqth,
5311 hqthctl::Cmdqth,
5312 Hqthctl_SPEC,
5313 crate::common::RW,
5314 >::from_register(self, 0)
5315 }
5316
5317 #[doc = "High Priority Response Ready Queue Threshold"]
5318 #[inline(always)]
5319 pub fn rspqth(
5320 self,
5321 ) -> crate::common::RegisterField<
5322 8,
5323 0xff,
5324 1,
5325 0,
5326 hqthctl::Rspqth,
5327 hqthctl::Rspqth,
5328 Hqthctl_SPEC,
5329 crate::common::RW,
5330 > {
5331 crate::common::RegisterField::<
5332 8,
5333 0xff,
5334 1,
5335 0,
5336 hqthctl::Rspqth,
5337 hqthctl::Rspqth,
5338 Hqthctl_SPEC,
5339 crate::common::RW,
5340 >::from_register(self, 0)
5341 }
5342}
5343impl ::core::default::Default for Hqthctl {
5344 #[inline(always)]
5345 fn default() -> Hqthctl {
5346 <crate::RegValueT<Hqthctl_SPEC> as RegisterValue<_>>::new(257)
5347 }
5348}
5349pub mod hqthctl {
5350
5351 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5352 pub struct Cmdqth_SPEC;
5353 pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
5354 impl Cmdqth {
5355 #[doc = "Interrupt is issued when High Priority Command Queue is completely empty."]
5356 pub const _0_X_00: Self = Self::new(0);
5357
5358 #[doc = "Interrupt is issued when High Priority Command Queue contains N entries. (N = CMDQTH\\[7:0\\])"]
5359 pub const OTHERS: Self = Self::new(0);
5360 }
5361 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5362 pub struct Rspqth_SPEC;
5363 pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
5364 impl Rspqth {
5365 #[doc = "Interrupt is issued when High Priority Response Queue contains 1 entry (DWORD)."]
5366 pub const _0_X_00: Self = Self::new(0);
5367
5368 #[doc = "Interrupt is triggered when High Priority Response Queue contains N+1 entries (DWORD). (N = RSPQTH\\[7:0\\])"]
5369 pub const OTHERS: Self = Self::new(0);
5370 }
5371}
5372#[doc(hidden)]
5373#[derive(Copy, Clone, Eq, PartialEq)]
5374pub struct Htbthctl_SPEC;
5375impl crate::sealed::RegSpec for Htbthctl_SPEC {
5376 type DataType = u32;
5377}
5378
5379#[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
5380pub type Htbthctl = crate::RegValueT<Htbthctl_SPEC>;
5381
5382impl Htbthctl {
5383 #[doc = "High Priority Transmit Data Buffer Threshold"]
5384 #[inline(always)]
5385 pub fn txdbth(
5386 self,
5387 ) -> crate::common::RegisterField<
5388 0,
5389 0x7,
5390 1,
5391 0,
5392 htbthctl::Txdbth,
5393 htbthctl::Txdbth,
5394 Htbthctl_SPEC,
5395 crate::common::RW,
5396 > {
5397 crate::common::RegisterField::<
5398 0,
5399 0x7,
5400 1,
5401 0,
5402 htbthctl::Txdbth,
5403 htbthctl::Txdbth,
5404 Htbthctl_SPEC,
5405 crate::common::RW,
5406 >::from_register(self, 0)
5407 }
5408
5409 #[doc = "High Priority Receive Data Buffer Threshold"]
5410 #[inline(always)]
5411 pub fn rxdbth(
5412 self,
5413 ) -> crate::common::RegisterField<
5414 8,
5415 0x7,
5416 1,
5417 0,
5418 htbthctl::Rxdbth,
5419 htbthctl::Rxdbth,
5420 Htbthctl_SPEC,
5421 crate::common::RW,
5422 > {
5423 crate::common::RegisterField::<
5424 8,
5425 0x7,
5426 1,
5427 0,
5428 htbthctl::Rxdbth,
5429 htbthctl::Rxdbth,
5430 Htbthctl_SPEC,
5431 crate::common::RW,
5432 >::from_register(self, 0)
5433 }
5434
5435 #[doc = "High Priority Tx Start Threshold"]
5436 #[inline(always)]
5437 pub fn txstth(
5438 self,
5439 ) -> crate::common::RegisterField<
5440 16,
5441 0x7,
5442 1,
5443 0,
5444 htbthctl::Txstth,
5445 htbthctl::Txstth,
5446 Htbthctl_SPEC,
5447 crate::common::RW,
5448 > {
5449 crate::common::RegisterField::<
5450 16,
5451 0x7,
5452 1,
5453 0,
5454 htbthctl::Txstth,
5455 htbthctl::Txstth,
5456 Htbthctl_SPEC,
5457 crate::common::RW,
5458 >::from_register(self, 0)
5459 }
5460
5461 #[doc = "High Priority Rx Start Threshold"]
5462 #[inline(always)]
5463 pub fn rxstth(
5464 self,
5465 ) -> crate::common::RegisterField<
5466 24,
5467 0x7,
5468 1,
5469 0,
5470 htbthctl::Rxstth,
5471 htbthctl::Rxstth,
5472 Htbthctl_SPEC,
5473 crate::common::RW,
5474 > {
5475 crate::common::RegisterField::<
5476 24,
5477 0x7,
5478 1,
5479 0,
5480 htbthctl::Rxstth,
5481 htbthctl::Rxstth,
5482 Htbthctl_SPEC,
5483 crate::common::RW,
5484 >::from_register(self, 0)
5485 }
5486}
5487impl ::core::default::Default for Htbthctl {
5488 #[inline(always)]
5489 fn default() -> Htbthctl {
5490 <crate::RegValueT<Htbthctl_SPEC> as RegisterValue<_>>::new(16843009)
5491 }
5492}
5493pub mod htbthctl {
5494
5495 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5496 pub struct Txdbth_SPEC;
5497 pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
5498 impl Txdbth {
5499 #[doc = "Interrupt triggers at 2 High Priority Tx Buffer empties, DWORDs"]
5500 pub const _000: Self = Self::new(0);
5501
5502 #[doc = "Reserved"]
5503 pub const _001: Self = Self::new(1);
5504
5505 #[doc = "Setting prohibited"]
5506 pub const OTHERS: Self = Self::new(0);
5507 }
5508 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5509 pub struct Rxdbth_SPEC;
5510 pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
5511 impl Rxdbth {
5512 #[doc = "Interrupt triggers at 2 High Priority Rx Buffer entries, DWORDs"]
5513 pub const _000: Self = Self::new(0);
5514
5515 #[doc = "Reserved"]
5516 pub const _001: Self = Self::new(1);
5517
5518 #[doc = "Setting prohibited"]
5519 pub const OTHERS: Self = Self::new(0);
5520 }
5521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5522 pub struct Txstth_SPEC;
5523 pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
5524 impl Txstth {
5525 #[doc = "Wait for 2 entry DWORDs"]
5526 pub const _000: Self = Self::new(0);
5527
5528 #[doc = "Reserved"]
5529 pub const _001: Self = Self::new(1);
5530
5531 #[doc = "Setting prohibited"]
5532 pub const OTHERS: Self = Self::new(0);
5533 }
5534 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5535 pub struct Rxstth_SPEC;
5536 pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
5537 impl Rxstth {
5538 #[doc = "Wait for 2 empty DWORDs"]
5539 pub const _000: Self = Self::new(0);
5540
5541 #[doc = "Reserved"]
5542 pub const _001: Self = Self::new(1);
5543
5544 #[doc = "Setting prohibited"]
5545 pub const OTHERS: Self = Self::new(0);
5546 }
5547}
5548#[doc(hidden)]
5549#[derive(Copy, Clone, Eq, PartialEq)]
5550pub struct Bst_SPEC;
5551impl crate::sealed::RegSpec for Bst_SPEC {
5552 type DataType = u32;
5553}
5554
5555#[doc = "Bus Status Register"]
5556pub type Bst = crate::RegValueT<Bst_SPEC>;
5557
5558impl Bst {
5559 #[doc = "START Condition Detection Flag"]
5560 #[inline(always)]
5561 pub fn stcnddf(
5562 self,
5563 ) -> crate::common::RegisterField<
5564 0,
5565 0x1,
5566 1,
5567 0,
5568 bst::Stcnddf,
5569 bst::Stcnddf,
5570 Bst_SPEC,
5571 crate::common::RW,
5572 > {
5573 crate::common::RegisterField::<
5574 0,
5575 0x1,
5576 1,
5577 0,
5578 bst::Stcnddf,
5579 bst::Stcnddf,
5580 Bst_SPEC,
5581 crate::common::RW,
5582 >::from_register(self, 0)
5583 }
5584
5585 #[doc = "STOP Condition Detection Flag"]
5586 #[inline(always)]
5587 pub fn spcnddf(
5588 self,
5589 ) -> crate::common::RegisterField<
5590 1,
5591 0x1,
5592 1,
5593 0,
5594 bst::Spcnddf,
5595 bst::Spcnddf,
5596 Bst_SPEC,
5597 crate::common::RW,
5598 > {
5599 crate::common::RegisterField::<
5600 1,
5601 0x1,
5602 1,
5603 0,
5604 bst::Spcnddf,
5605 bst::Spcnddf,
5606 Bst_SPEC,
5607 crate::common::RW,
5608 >::from_register(self, 0)
5609 }
5610
5611 #[doc = "HDR Exit Pattern Detection Flag"]
5612 #[inline(always)]
5613 pub fn hdrexdf(
5614 self,
5615 ) -> crate::common::RegisterField<
5616 2,
5617 0x1,
5618 1,
5619 0,
5620 bst::Hdrexdf,
5621 bst::Hdrexdf,
5622 Bst_SPEC,
5623 crate::common::RW,
5624 > {
5625 crate::common::RegisterField::<
5626 2,
5627 0x1,
5628 1,
5629 0,
5630 bst::Hdrexdf,
5631 bst::Hdrexdf,
5632 Bst_SPEC,
5633 crate::common::RW,
5634 >::from_register(self, 0)
5635 }
5636
5637 #[doc = "NACK Detection Flag"]
5638 #[inline(always)]
5639 pub fn nackdf(
5640 self,
5641 ) -> crate::common::RegisterField<
5642 4,
5643 0x1,
5644 1,
5645 0,
5646 bst::Nackdf,
5647 bst::Nackdf,
5648 Bst_SPEC,
5649 crate::common::RW,
5650 > {
5651 crate::common::RegisterField::<
5652 4,
5653 0x1,
5654 1,
5655 0,
5656 bst::Nackdf,
5657 bst::Nackdf,
5658 Bst_SPEC,
5659 crate::common::RW,
5660 >::from_register(self, 0)
5661 }
5662
5663 #[doc = "Transmit End Flag"]
5664 #[inline(always)]
5665 pub fn tendf(
5666 self,
5667 ) -> crate::common::RegisterField<
5668 8,
5669 0x1,
5670 1,
5671 0,
5672 bst::Tendf,
5673 bst::Tendf,
5674 Bst_SPEC,
5675 crate::common::RW,
5676 > {
5677 crate::common::RegisterField::<
5678 8,
5679 0x1,
5680 1,
5681 0,
5682 bst::Tendf,
5683 bst::Tendf,
5684 Bst_SPEC,
5685 crate::common::RW,
5686 >::from_register(self, 0)
5687 }
5688
5689 #[doc = "Arbitration Lost Flag"]
5690 #[inline(always)]
5691 pub fn alf(
5692 self,
5693 ) -> crate::common::RegisterField<16, 0x1, 1, 0, bst::Alf, bst::Alf, Bst_SPEC, crate::common::RW>
5694 {
5695 crate::common::RegisterField::<16,0x1,1,0,bst::Alf,bst::Alf,Bst_SPEC,crate::common::RW>::from_register(self,0)
5696 }
5697
5698 #[doc = "Timeout Detection Flag"]
5699 #[inline(always)]
5700 pub fn todf(
5701 self,
5702 ) -> crate::common::RegisterField<
5703 20,
5704 0x1,
5705 1,
5706 0,
5707 bst::Todf,
5708 bst::Todf,
5709 Bst_SPEC,
5710 crate::common::RW,
5711 > {
5712 crate::common::RegisterField::<
5713 20,
5714 0x1,
5715 1,
5716 0,
5717 bst::Todf,
5718 bst::Todf,
5719 Bst_SPEC,
5720 crate::common::RW,
5721 >::from_register(self, 0)
5722 }
5723
5724 #[doc = "Wake-Up Condition Detection Flag"]
5725 #[inline(always)]
5726 pub fn wucnddf(
5727 self,
5728 ) -> crate::common::RegisterField<
5729 24,
5730 0x1,
5731 1,
5732 0,
5733 bst::Wucnddf,
5734 bst::Wucnddf,
5735 Bst_SPEC,
5736 crate::common::RW,
5737 > {
5738 crate::common::RegisterField::<
5739 24,
5740 0x1,
5741 1,
5742 0,
5743 bst::Wucnddf,
5744 bst::Wucnddf,
5745 Bst_SPEC,
5746 crate::common::RW,
5747 >::from_register(self, 0)
5748 }
5749}
5750impl ::core::default::Default for Bst {
5751 #[inline(always)]
5752 fn default() -> Bst {
5753 <crate::RegValueT<Bst_SPEC> as RegisterValue<_>>::new(0)
5754 }
5755}
5756pub mod bst {
5757
5758 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5759 pub struct Stcnddf_SPEC;
5760 pub type Stcnddf = crate::EnumBitfieldStruct<u8, Stcnddf_SPEC>;
5761 impl Stcnddf {
5762 #[doc = "START condition is not detected."]
5763 pub const _0: Self = Self::new(0);
5764
5765 #[doc = "START condition is detected."]
5766 pub const _1: Self = Self::new(1);
5767 }
5768 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5769 pub struct Spcnddf_SPEC;
5770 pub type Spcnddf = crate::EnumBitfieldStruct<u8, Spcnddf_SPEC>;
5771 impl Spcnddf {
5772 #[doc = "STOP condition is not detected."]
5773 pub const _0: Self = Self::new(0);
5774
5775 #[doc = "STOP condition is detected."]
5776 pub const _1: Self = Self::new(1);
5777 }
5778 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5779 pub struct Hdrexdf_SPEC;
5780 pub type Hdrexdf = crate::EnumBitfieldStruct<u8, Hdrexdf_SPEC>;
5781 impl Hdrexdf {
5782 #[doc = "HDR Exit Pattern is not detected"]
5783 pub const _0: Self = Self::new(0);
5784
5785 #[doc = "HDR Exit Pattern is detected."]
5786 pub const _1: Self = Self::new(1);
5787 }
5788 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5789 pub struct Nackdf_SPEC;
5790 pub type Nackdf = crate::EnumBitfieldStruct<u8, Nackdf_SPEC>;
5791 impl Nackdf {
5792 #[doc = "NACK is not detected."]
5793 pub const _0: Self = Self::new(0);
5794
5795 #[doc = "NACK is detected."]
5796 pub const _1: Self = Self::new(1);
5797 }
5798 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5799 pub struct Tendf_SPEC;
5800 pub type Tendf = crate::EnumBitfieldStruct<u8, Tendf_SPEC>;
5801 impl Tendf {
5802 #[doc = "Data is being transmitted."]
5803 pub const _0: Self = Self::new(0);
5804
5805 #[doc = "Data has been transmitted."]
5806 pub const _1: Self = Self::new(1);
5807 }
5808 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5809 pub struct Alf_SPEC;
5810 pub type Alf = crate::EnumBitfieldStruct<u8, Alf_SPEC>;
5811 impl Alf {
5812 #[doc = "Arbitration is not lost"]
5813 pub const _0: Self = Self::new(0);
5814
5815 #[doc = "Arbitration is lost."]
5816 pub const _1: Self = Self::new(1);
5817 }
5818 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5819 pub struct Todf_SPEC;
5820 pub type Todf = crate::EnumBitfieldStruct<u8, Todf_SPEC>;
5821 impl Todf {
5822 #[doc = "Timeout is not detected."]
5823 pub const _0: Self = Self::new(0);
5824
5825 #[doc = "Timeout is detected."]
5826 pub const _1: Self = Self::new(1);
5827 }
5828 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5829 pub struct Wucnddf_SPEC;
5830 pub type Wucnddf = crate::EnumBitfieldStruct<u8, Wucnddf_SPEC>;
5831 impl Wucnddf {
5832 #[doc = "Wake-Up is not detected."]
5833 pub const _0: Self = Self::new(0);
5834
5835 #[doc = "Wake-Up is detected."]
5836 pub const _1: Self = Self::new(1);
5837 }
5838}
5839#[doc(hidden)]
5840#[derive(Copy, Clone, Eq, PartialEq)]
5841pub struct Bste_SPEC;
5842impl crate::sealed::RegSpec for Bste_SPEC {
5843 type DataType = u32;
5844}
5845
5846#[doc = "Bus Status Enable Register"]
5847pub type Bste = crate::RegValueT<Bste_SPEC>;
5848
5849impl Bste {
5850 #[doc = "START Condition Detection Enable"]
5851 #[inline(always)]
5852 pub fn stcndde(
5853 self,
5854 ) -> crate::common::RegisterField<
5855 0,
5856 0x1,
5857 1,
5858 0,
5859 bste::Stcndde,
5860 bste::Stcndde,
5861 Bste_SPEC,
5862 crate::common::RW,
5863 > {
5864 crate::common::RegisterField::<
5865 0,
5866 0x1,
5867 1,
5868 0,
5869 bste::Stcndde,
5870 bste::Stcndde,
5871 Bste_SPEC,
5872 crate::common::RW,
5873 >::from_register(self, 0)
5874 }
5875
5876 #[doc = "STOP Condition Detection Enable"]
5877 #[inline(always)]
5878 pub fn spcndde(
5879 self,
5880 ) -> crate::common::RegisterField<
5881 1,
5882 0x1,
5883 1,
5884 0,
5885 bste::Spcndde,
5886 bste::Spcndde,
5887 Bste_SPEC,
5888 crate::common::RW,
5889 > {
5890 crate::common::RegisterField::<
5891 1,
5892 0x1,
5893 1,
5894 0,
5895 bste::Spcndde,
5896 bste::Spcndde,
5897 Bste_SPEC,
5898 crate::common::RW,
5899 >::from_register(self, 0)
5900 }
5901
5902 #[doc = "HDR Exit Pattern Detection Enable"]
5903 #[inline(always)]
5904 pub fn hdrexde(
5905 self,
5906 ) -> crate::common::RegisterField<
5907 2,
5908 0x1,
5909 1,
5910 0,
5911 bste::Hdrexde,
5912 bste::Hdrexde,
5913 Bste_SPEC,
5914 crate::common::RW,
5915 > {
5916 crate::common::RegisterField::<
5917 2,
5918 0x1,
5919 1,
5920 0,
5921 bste::Hdrexde,
5922 bste::Hdrexde,
5923 Bste_SPEC,
5924 crate::common::RW,
5925 >::from_register(self, 0)
5926 }
5927
5928 #[doc = "NACK Detection Enable"]
5929 #[inline(always)]
5930 pub fn nackde(
5931 self,
5932 ) -> crate::common::RegisterField<
5933 4,
5934 0x1,
5935 1,
5936 0,
5937 bste::Nackde,
5938 bste::Nackde,
5939 Bste_SPEC,
5940 crate::common::RW,
5941 > {
5942 crate::common::RegisterField::<
5943 4,
5944 0x1,
5945 1,
5946 0,
5947 bste::Nackde,
5948 bste::Nackde,
5949 Bste_SPEC,
5950 crate::common::RW,
5951 >::from_register(self, 0)
5952 }
5953
5954 #[doc = "Transmit End Enable"]
5955 #[inline(always)]
5956 pub fn tende(
5957 self,
5958 ) -> crate::common::RegisterField<
5959 8,
5960 0x1,
5961 1,
5962 0,
5963 bste::Tende,
5964 bste::Tende,
5965 Bste_SPEC,
5966 crate::common::RW,
5967 > {
5968 crate::common::RegisterField::<
5969 8,
5970 0x1,
5971 1,
5972 0,
5973 bste::Tende,
5974 bste::Tende,
5975 Bste_SPEC,
5976 crate::common::RW,
5977 >::from_register(self, 0)
5978 }
5979
5980 #[doc = "Arbitration Lost Enable"]
5981 #[inline(always)]
5982 pub fn ale(
5983 self,
5984 ) -> crate::common::RegisterField<
5985 16,
5986 0x1,
5987 1,
5988 0,
5989 bste::Ale,
5990 bste::Ale,
5991 Bste_SPEC,
5992 crate::common::RW,
5993 > {
5994 crate::common::RegisterField::<
5995 16,
5996 0x1,
5997 1,
5998 0,
5999 bste::Ale,
6000 bste::Ale,
6001 Bste_SPEC,
6002 crate::common::RW,
6003 >::from_register(self, 0)
6004 }
6005
6006 #[doc = "Timeout Detection Enable"]
6007 #[inline(always)]
6008 pub fn tode(
6009 self,
6010 ) -> crate::common::RegisterField<
6011 20,
6012 0x1,
6013 1,
6014 0,
6015 bste::Tode,
6016 bste::Tode,
6017 Bste_SPEC,
6018 crate::common::RW,
6019 > {
6020 crate::common::RegisterField::<
6021 20,
6022 0x1,
6023 1,
6024 0,
6025 bste::Tode,
6026 bste::Tode,
6027 Bste_SPEC,
6028 crate::common::RW,
6029 >::from_register(self, 0)
6030 }
6031
6032 #[doc = "Wake-up Condition Detection Enable"]
6033 #[inline(always)]
6034 pub fn wucndde(
6035 self,
6036 ) -> crate::common::RegisterField<
6037 24,
6038 0x1,
6039 1,
6040 0,
6041 bste::Wucndde,
6042 bste::Wucndde,
6043 Bste_SPEC,
6044 crate::common::RW,
6045 > {
6046 crate::common::RegisterField::<
6047 24,
6048 0x1,
6049 1,
6050 0,
6051 bste::Wucndde,
6052 bste::Wucndde,
6053 Bste_SPEC,
6054 crate::common::RW,
6055 >::from_register(self, 0)
6056 }
6057}
6058impl ::core::default::Default for Bste {
6059 #[inline(always)]
6060 fn default() -> Bste {
6061 <crate::RegValueT<Bste_SPEC> as RegisterValue<_>>::new(0)
6062 }
6063}
6064pub mod bste {
6065
6066 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6067 pub struct Stcndde_SPEC;
6068 pub type Stcndde = crate::EnumBitfieldStruct<u8, Stcndde_SPEC>;
6069 impl Stcndde {
6070 #[doc = "Disables START condition Detection Interrupt Status logging."]
6071 pub const _0: Self = Self::new(0);
6072
6073 #[doc = "Enables START condition Detection Interrupt Status logging."]
6074 pub const _1: Self = Self::new(1);
6075 }
6076 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6077 pub struct Spcndde_SPEC;
6078 pub type Spcndde = crate::EnumBitfieldStruct<u8, Spcndde_SPEC>;
6079 impl Spcndde {
6080 #[doc = "Disables STOP condition Detection Interrupt Status logging."]
6081 pub const _0: Self = Self::new(0);
6082
6083 #[doc = "Enables STOP condition Detection Interrupt Status logging."]
6084 pub const _1: Self = Self::new(1);
6085 }
6086 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6087 pub struct Hdrexde_SPEC;
6088 pub type Hdrexde = crate::EnumBitfieldStruct<u8, Hdrexde_SPEC>;
6089 impl Hdrexde {
6090 #[doc = "Disables HDR Exit Pattern Detection Interrupt Status logging."]
6091 pub const _0: Self = Self::new(0);
6092
6093 #[doc = "Enables HDR Exit Pattern Detection Interrupt Status logging."]
6094 pub const _1: Self = Self::new(1);
6095 }
6096 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6097 pub struct Nackde_SPEC;
6098 pub type Nackde = crate::EnumBitfieldStruct<u8, Nackde_SPEC>;
6099 impl Nackde {
6100 #[doc = "Disables NACK Detection Interrupt Status logging."]
6101 pub const _0: Self = Self::new(0);
6102
6103 #[doc = "Enables NACK Detection Interrupt Status logging."]
6104 pub const _1: Self = Self::new(1);
6105 }
6106 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6107 pub struct Tende_SPEC;
6108 pub type Tende = crate::EnumBitfieldStruct<u8, Tende_SPEC>;
6109 impl Tende {
6110 #[doc = "Disables Transmit End Interrupt Status logging."]
6111 pub const _0: Self = Self::new(0);
6112
6113 #[doc = "Enables Transmit End Interrupt Status logging."]
6114 pub const _1: Self = Self::new(1);
6115 }
6116 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6117 pub struct Ale_SPEC;
6118 pub type Ale = crate::EnumBitfieldStruct<u8, Ale_SPEC>;
6119 impl Ale {
6120 #[doc = "Disables Arbitration Lost Interrupt Status logging."]
6121 pub const _0: Self = Self::new(0);
6122
6123 #[doc = "Enables Arbitration Lost Interrupt Status logging."]
6124 pub const _1: Self = Self::new(1);
6125 }
6126 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6127 pub struct Tode_SPEC;
6128 pub type Tode = crate::EnumBitfieldStruct<u8, Tode_SPEC>;
6129 impl Tode {
6130 #[doc = "Disables Timeout Detection Interrupt Status logging."]
6131 pub const _0: Self = Self::new(0);
6132
6133 #[doc = "Enables Timeout Detection Interrupt Status logging."]
6134 pub const _1: Self = Self::new(1);
6135 }
6136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6137 pub struct Wucndde_SPEC;
6138 pub type Wucndde = crate::EnumBitfieldStruct<u8, Wucndde_SPEC>;
6139 impl Wucndde {
6140 #[doc = "Disables Wake-up Condition Detection Status logging."]
6141 pub const _0: Self = Self::new(0);
6142
6143 #[doc = "Enables Wake-up Condition Detection Status logging."]
6144 pub const _1: Self = Self::new(1);
6145 }
6146}
6147#[doc(hidden)]
6148#[derive(Copy, Clone, Eq, PartialEq)]
6149pub struct Bie_SPEC;
6150impl crate::sealed::RegSpec for Bie_SPEC {
6151 type DataType = u32;
6152}
6153
6154#[doc = "Bus Interrupt Enable Register"]
6155pub type Bie = crate::RegValueT<Bie_SPEC>;
6156
6157impl Bie {
6158 #[doc = "START Condition Detection Interrupt Enable"]
6159 #[inline(always)]
6160 pub fn stcnddie(
6161 self,
6162 ) -> crate::common::RegisterField<
6163 0,
6164 0x1,
6165 1,
6166 0,
6167 bie::Stcnddie,
6168 bie::Stcnddie,
6169 Bie_SPEC,
6170 crate::common::RW,
6171 > {
6172 crate::common::RegisterField::<
6173 0,
6174 0x1,
6175 1,
6176 0,
6177 bie::Stcnddie,
6178 bie::Stcnddie,
6179 Bie_SPEC,
6180 crate::common::RW,
6181 >::from_register(self, 0)
6182 }
6183
6184 #[doc = "STOP Condition Detection Interrupt Enable"]
6185 #[inline(always)]
6186 pub fn spcnddie(
6187 self,
6188 ) -> crate::common::RegisterField<
6189 1,
6190 0x1,
6191 1,
6192 0,
6193 bie::Spcnddie,
6194 bie::Spcnddie,
6195 Bie_SPEC,
6196 crate::common::RW,
6197 > {
6198 crate::common::RegisterField::<
6199 1,
6200 0x1,
6201 1,
6202 0,
6203 bie::Spcnddie,
6204 bie::Spcnddie,
6205 Bie_SPEC,
6206 crate::common::RW,
6207 >::from_register(self, 0)
6208 }
6209
6210 #[doc = "HDR Exit Pattern Detection Interrupt Enable"]
6211 #[inline(always)]
6212 pub fn hdrexdie(
6213 self,
6214 ) -> crate::common::RegisterField<
6215 2,
6216 0x1,
6217 1,
6218 0,
6219 bie::Hdrexdie,
6220 bie::Hdrexdie,
6221 Bie_SPEC,
6222 crate::common::RW,
6223 > {
6224 crate::common::RegisterField::<
6225 2,
6226 0x1,
6227 1,
6228 0,
6229 bie::Hdrexdie,
6230 bie::Hdrexdie,
6231 Bie_SPEC,
6232 crate::common::RW,
6233 >::from_register(self, 0)
6234 }
6235
6236 #[doc = "NACK Detection Interrupt Enable"]
6237 #[inline(always)]
6238 pub fn nackdie(
6239 self,
6240 ) -> crate::common::RegisterField<
6241 4,
6242 0x1,
6243 1,
6244 0,
6245 bie::Nackdie,
6246 bie::Nackdie,
6247 Bie_SPEC,
6248 crate::common::RW,
6249 > {
6250 crate::common::RegisterField::<
6251 4,
6252 0x1,
6253 1,
6254 0,
6255 bie::Nackdie,
6256 bie::Nackdie,
6257 Bie_SPEC,
6258 crate::common::RW,
6259 >::from_register(self, 0)
6260 }
6261
6262 #[doc = "Transmit End Interrupt Enable"]
6263 #[inline(always)]
6264 pub fn tendie(
6265 self,
6266 ) -> crate::common::RegisterField<
6267 8,
6268 0x1,
6269 1,
6270 0,
6271 bie::Tendie,
6272 bie::Tendie,
6273 Bie_SPEC,
6274 crate::common::RW,
6275 > {
6276 crate::common::RegisterField::<
6277 8,
6278 0x1,
6279 1,
6280 0,
6281 bie::Tendie,
6282 bie::Tendie,
6283 Bie_SPEC,
6284 crate::common::RW,
6285 >::from_register(self, 0)
6286 }
6287
6288 #[doc = "Arbitration Lost Interrupt Enable"]
6289 #[inline(always)]
6290 pub fn alie(
6291 self,
6292 ) -> crate::common::RegisterField<
6293 16,
6294 0x1,
6295 1,
6296 0,
6297 bie::Alie,
6298 bie::Alie,
6299 Bie_SPEC,
6300 crate::common::RW,
6301 > {
6302 crate::common::RegisterField::<
6303 16,
6304 0x1,
6305 1,
6306 0,
6307 bie::Alie,
6308 bie::Alie,
6309 Bie_SPEC,
6310 crate::common::RW,
6311 >::from_register(self, 0)
6312 }
6313
6314 #[doc = "Timeout Detection Interrupt Enable"]
6315 #[inline(always)]
6316 pub fn todie(
6317 self,
6318 ) -> crate::common::RegisterField<
6319 20,
6320 0x1,
6321 1,
6322 0,
6323 bie::Todie,
6324 bie::Todie,
6325 Bie_SPEC,
6326 crate::common::RW,
6327 > {
6328 crate::common::RegisterField::<
6329 20,
6330 0x1,
6331 1,
6332 0,
6333 bie::Todie,
6334 bie::Todie,
6335 Bie_SPEC,
6336 crate::common::RW,
6337 >::from_register(self, 0)
6338 }
6339
6340 #[doc = "Wake-Up Condition Detection Interrupt Enable"]
6341 #[inline(always)]
6342 pub fn wucnddie(
6343 self,
6344 ) -> crate::common::RegisterField<
6345 24,
6346 0x1,
6347 1,
6348 0,
6349 bie::Wucnddie,
6350 bie::Wucnddie,
6351 Bie_SPEC,
6352 crate::common::RW,
6353 > {
6354 crate::common::RegisterField::<
6355 24,
6356 0x1,
6357 1,
6358 0,
6359 bie::Wucnddie,
6360 bie::Wucnddie,
6361 Bie_SPEC,
6362 crate::common::RW,
6363 >::from_register(self, 0)
6364 }
6365}
6366impl ::core::default::Default for Bie {
6367 #[inline(always)]
6368 fn default() -> Bie {
6369 <crate::RegValueT<Bie_SPEC> as RegisterValue<_>>::new(0)
6370 }
6371}
6372pub mod bie {
6373
6374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6375 pub struct Stcnddie_SPEC;
6376 pub type Stcnddie = crate::EnumBitfieldStruct<u8, Stcnddie_SPEC>;
6377 impl Stcnddie {
6378 #[doc = "Disables START condition Detection Interrupt Signal."]
6379 pub const _0: Self = Self::new(0);
6380
6381 #[doc = "Enables START condition Detection Interrupt Signal."]
6382 pub const _1: Self = Self::new(1);
6383 }
6384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6385 pub struct Spcnddie_SPEC;
6386 pub type Spcnddie = crate::EnumBitfieldStruct<u8, Spcnddie_SPEC>;
6387 impl Spcnddie {
6388 #[doc = "Disables STOP condition Detection Interrupt Signal."]
6389 pub const _0: Self = Self::new(0);
6390
6391 #[doc = "Enables STOP condition Detection Interrupt Signal."]
6392 pub const _1: Self = Self::new(1);
6393 }
6394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6395 pub struct Hdrexdie_SPEC;
6396 pub type Hdrexdie = crate::EnumBitfieldStruct<u8, Hdrexdie_SPEC>;
6397 impl Hdrexdie {
6398 #[doc = "Disables HDR Exit Pattern Detection Interrupt Signal."]
6399 pub const _0: Self = Self::new(0);
6400
6401 #[doc = "Enables HDR Exit Pattern Detection Interrupt Signal."]
6402 pub const _1: Self = Self::new(1);
6403 }
6404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6405 pub struct Nackdie_SPEC;
6406 pub type Nackdie = crate::EnumBitfieldStruct<u8, Nackdie_SPEC>;
6407 impl Nackdie {
6408 #[doc = "Disables NACK Detection Interrupt Signal."]
6409 pub const _0: Self = Self::new(0);
6410
6411 #[doc = "Enables NACK Detection Interrupt Signal."]
6412 pub const _1: Self = Self::new(1);
6413 }
6414 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6415 pub struct Tendie_SPEC;
6416 pub type Tendie = crate::EnumBitfieldStruct<u8, Tendie_SPEC>;
6417 impl Tendie {
6418 #[doc = "Disables Transmit End Interrupt Signal."]
6419 pub const _0: Self = Self::new(0);
6420
6421 #[doc = "Enables Transmit End Interrupt Signal."]
6422 pub const _1: Self = Self::new(1);
6423 }
6424 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6425 pub struct Alie_SPEC;
6426 pub type Alie = crate::EnumBitfieldStruct<u8, Alie_SPEC>;
6427 impl Alie {
6428 #[doc = "Disables Arbitration Lost Interrupt Signal."]
6429 pub const _0: Self = Self::new(0);
6430
6431 #[doc = "Enables Arbitration Lost Interrupt Signal."]
6432 pub const _1: Self = Self::new(1);
6433 }
6434 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6435 pub struct Todie_SPEC;
6436 pub type Todie = crate::EnumBitfieldStruct<u8, Todie_SPEC>;
6437 impl Todie {
6438 #[doc = "Disables Timeout Detection Interrupt Signal."]
6439 pub const _0: Self = Self::new(0);
6440
6441 #[doc = "Enables Timeout Detection Interrupt Signal."]
6442 pub const _1: Self = Self::new(1);
6443 }
6444 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6445 pub struct Wucnddie_SPEC;
6446 pub type Wucnddie = crate::EnumBitfieldStruct<u8, Wucnddie_SPEC>;
6447 impl Wucnddie {
6448 #[doc = "Disables Wake-Up Condition Detection Interrupt Signal."]
6449 pub const _0: Self = Self::new(0);
6450
6451 #[doc = "Enables Wake-Up Condition Detection Interrupt Signal."]
6452 pub const _1: Self = Self::new(1);
6453 }
6454}
6455#[doc(hidden)]
6456#[derive(Copy, Clone, Eq, PartialEq)]
6457pub struct Bstfc_SPEC;
6458impl crate::sealed::RegSpec for Bstfc_SPEC {
6459 type DataType = u32;
6460}
6461
6462#[doc = "Bus Status Force Register"]
6463pub type Bstfc = crate::RegValueT<Bstfc_SPEC>;
6464
6465impl Bstfc {
6466 #[doc = "START condition Detection Force"]
6467 #[inline(always)]
6468 pub fn stcnddfc(
6469 self,
6470 ) -> crate::common::RegisterField<
6471 0,
6472 0x1,
6473 1,
6474 0,
6475 bstfc::Stcnddfc,
6476 bstfc::Stcnddfc,
6477 Bstfc_SPEC,
6478 crate::common::W,
6479 > {
6480 crate::common::RegisterField::<
6481 0,
6482 0x1,
6483 1,
6484 0,
6485 bstfc::Stcnddfc,
6486 bstfc::Stcnddfc,
6487 Bstfc_SPEC,
6488 crate::common::W,
6489 >::from_register(self, 0)
6490 }
6491
6492 #[doc = "STOP condition Detection Force"]
6493 #[inline(always)]
6494 pub fn spcnddfc(
6495 self,
6496 ) -> crate::common::RegisterField<
6497 1,
6498 0x1,
6499 1,
6500 0,
6501 bstfc::Spcnddfc,
6502 bstfc::Spcnddfc,
6503 Bstfc_SPEC,
6504 crate::common::W,
6505 > {
6506 crate::common::RegisterField::<
6507 1,
6508 0x1,
6509 1,
6510 0,
6511 bstfc::Spcnddfc,
6512 bstfc::Spcnddfc,
6513 Bstfc_SPEC,
6514 crate::common::W,
6515 >::from_register(self, 0)
6516 }
6517
6518 #[doc = "HDR Exit Pattern Detection Force"]
6519 #[inline(always)]
6520 pub fn hdrexdfc(
6521 self,
6522 ) -> crate::common::RegisterField<
6523 2,
6524 0x1,
6525 1,
6526 0,
6527 bstfc::Hdrexdfc,
6528 bstfc::Hdrexdfc,
6529 Bstfc_SPEC,
6530 crate::common::W,
6531 > {
6532 crate::common::RegisterField::<
6533 2,
6534 0x1,
6535 1,
6536 0,
6537 bstfc::Hdrexdfc,
6538 bstfc::Hdrexdfc,
6539 Bstfc_SPEC,
6540 crate::common::W,
6541 >::from_register(self, 0)
6542 }
6543
6544 #[doc = "NACK Detection Force"]
6545 #[inline(always)]
6546 pub fn nackdfc(
6547 self,
6548 ) -> crate::common::RegisterField<
6549 4,
6550 0x1,
6551 1,
6552 0,
6553 bstfc::Nackdfc,
6554 bstfc::Nackdfc,
6555 Bstfc_SPEC,
6556 crate::common::W,
6557 > {
6558 crate::common::RegisterField::<
6559 4,
6560 0x1,
6561 1,
6562 0,
6563 bstfc::Nackdfc,
6564 bstfc::Nackdfc,
6565 Bstfc_SPEC,
6566 crate::common::W,
6567 >::from_register(self, 0)
6568 }
6569
6570 #[doc = "Transmit End Force"]
6571 #[inline(always)]
6572 pub fn tendfc(
6573 self,
6574 ) -> crate::common::RegisterField<
6575 8,
6576 0x1,
6577 1,
6578 0,
6579 bstfc::Tendfc,
6580 bstfc::Tendfc,
6581 Bstfc_SPEC,
6582 crate::common::W,
6583 > {
6584 crate::common::RegisterField::<
6585 8,
6586 0x1,
6587 1,
6588 0,
6589 bstfc::Tendfc,
6590 bstfc::Tendfc,
6591 Bstfc_SPEC,
6592 crate::common::W,
6593 >::from_register(self, 0)
6594 }
6595
6596 #[doc = "Arbitration Lost Force"]
6597 #[inline(always)]
6598 pub fn alfc(
6599 self,
6600 ) -> crate::common::RegisterField<
6601 16,
6602 0x1,
6603 1,
6604 0,
6605 bstfc::Alfc,
6606 bstfc::Alfc,
6607 Bstfc_SPEC,
6608 crate::common::W,
6609 > {
6610 crate::common::RegisterField::<
6611 16,
6612 0x1,
6613 1,
6614 0,
6615 bstfc::Alfc,
6616 bstfc::Alfc,
6617 Bstfc_SPEC,
6618 crate::common::W,
6619 >::from_register(self, 0)
6620 }
6621
6622 #[doc = "Timeout Detection Force"]
6623 #[inline(always)]
6624 pub fn todfc(
6625 self,
6626 ) -> crate::common::RegisterField<
6627 20,
6628 0x1,
6629 1,
6630 0,
6631 bstfc::Todfc,
6632 bstfc::Todfc,
6633 Bstfc_SPEC,
6634 crate::common::W,
6635 > {
6636 crate::common::RegisterField::<
6637 20,
6638 0x1,
6639 1,
6640 0,
6641 bstfc::Todfc,
6642 bstfc::Todfc,
6643 Bstfc_SPEC,
6644 crate::common::W,
6645 >::from_register(self, 0)
6646 }
6647
6648 #[doc = "Wake-Up Condition Detection Force"]
6649 #[inline(always)]
6650 pub fn wucnddfc(
6651 self,
6652 ) -> crate::common::RegisterField<
6653 24,
6654 0x1,
6655 1,
6656 0,
6657 bstfc::Wucnddfc,
6658 bstfc::Wucnddfc,
6659 Bstfc_SPEC,
6660 crate::common::W,
6661 > {
6662 crate::common::RegisterField::<
6663 24,
6664 0x1,
6665 1,
6666 0,
6667 bstfc::Wucnddfc,
6668 bstfc::Wucnddfc,
6669 Bstfc_SPEC,
6670 crate::common::W,
6671 >::from_register(self, 0)
6672 }
6673}
6674impl ::core::default::Default for Bstfc {
6675 #[inline(always)]
6676 fn default() -> Bstfc {
6677 <crate::RegValueT<Bstfc_SPEC> as RegisterValue<_>>::new(0)
6678 }
6679}
6680pub mod bstfc {
6681
6682 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6683 pub struct Stcnddfc_SPEC;
6684 pub type Stcnddfc = crate::EnumBitfieldStruct<u8, Stcnddfc_SPEC>;
6685 impl Stcnddfc {
6686 #[doc = "Not Force START condition Detection Interrupt for software testing."]
6687 pub const _0: Self = Self::new(0);
6688
6689 #[doc = "Force START condition Detection Interrupt for software testing."]
6690 pub const _1: Self = Self::new(1);
6691 }
6692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6693 pub struct Spcnddfc_SPEC;
6694 pub type Spcnddfc = crate::EnumBitfieldStruct<u8, Spcnddfc_SPEC>;
6695 impl Spcnddfc {
6696 #[doc = "Not Force STOP condition Detection Interrupt for software testing."]
6697 pub const _0: Self = Self::new(0);
6698
6699 #[doc = "Force STOP condition Detection Interrupt for software testing."]
6700 pub const _1: Self = Self::new(1);
6701 }
6702 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6703 pub struct Hdrexdfc_SPEC;
6704 pub type Hdrexdfc = crate::EnumBitfieldStruct<u8, Hdrexdfc_SPEC>;
6705 impl Hdrexdfc {
6706 #[doc = "Not Force HDR Exit Pattern Detection Interrupt for software testing."]
6707 pub const _0: Self = Self::new(0);
6708
6709 #[doc = "Force HDR Exit Pattern Detection Interrupt for software testing."]
6710 pub const _1: Self = Self::new(1);
6711 }
6712 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6713 pub struct Nackdfc_SPEC;
6714 pub type Nackdfc = crate::EnumBitfieldStruct<u8, Nackdfc_SPEC>;
6715 impl Nackdfc {
6716 #[doc = "Not Force NACK Detection Interrupt for software testing."]
6717 pub const _0: Self = Self::new(0);
6718
6719 #[doc = "Force NACK Detection Interrupt for software testing."]
6720 pub const _1: Self = Self::new(1);
6721 }
6722 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6723 pub struct Tendfc_SPEC;
6724 pub type Tendfc = crate::EnumBitfieldStruct<u8, Tendfc_SPEC>;
6725 impl Tendfc {
6726 #[doc = "Not Force Transmit End Interrupt for software testing."]
6727 pub const _0: Self = Self::new(0);
6728
6729 #[doc = "Force Transmit End Interrupt for software testing."]
6730 pub const _1: Self = Self::new(1);
6731 }
6732 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6733 pub struct Alfc_SPEC;
6734 pub type Alfc = crate::EnumBitfieldStruct<u8, Alfc_SPEC>;
6735 impl Alfc {
6736 #[doc = "Not Force Arbitration Lost Interrupt for software testing."]
6737 pub const _0: Self = Self::new(0);
6738
6739 #[doc = "Force Arbitration Lost Interrupt for software testing."]
6740 pub const _1: Self = Self::new(1);
6741 }
6742 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6743 pub struct Todfc_SPEC;
6744 pub type Todfc = crate::EnumBitfieldStruct<u8, Todfc_SPEC>;
6745 impl Todfc {
6746 #[doc = "Not Force Timeout Detection Interrupt for software testing."]
6747 pub const _0: Self = Self::new(0);
6748
6749 #[doc = "Force Timeout Detection Interrupt for software testing."]
6750 pub const _1: Self = Self::new(1);
6751 }
6752 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6753 pub struct Wucnddfc_SPEC;
6754 pub type Wucnddfc = crate::EnumBitfieldStruct<u8, Wucnddfc_SPEC>;
6755 impl Wucnddfc {
6756 #[doc = "Not Force Wake-Up Condition Detection Interrupt for software testing."]
6757 pub const _0: Self = Self::new(0);
6758
6759 #[doc = "Force Wake-Up Condition Detection Interrupt for software testing."]
6760 pub const _1: Self = Self::new(1);
6761 }
6762}
6763#[doc(hidden)]
6764#[derive(Copy, Clone, Eq, PartialEq)]
6765pub struct Ntst_SPEC;
6766impl crate::sealed::RegSpec for Ntst_SPEC {
6767 type DataType = u32;
6768}
6769
6770#[doc = "Normal Transfer Status Register"]
6771pub type Ntst = crate::RegValueT<Ntst_SPEC>;
6772
6773impl Ntst {
6774 #[doc = "Normal Transmit Data Buffer Empty Flag 0"]
6775 #[inline(always)]
6776 pub fn tdbef0(
6777 self,
6778 ) -> crate::common::RegisterField<
6779 0,
6780 0x1,
6781 1,
6782 0,
6783 ntst::Tdbef0,
6784 ntst::Tdbef0,
6785 Ntst_SPEC,
6786 crate::common::RW,
6787 > {
6788 crate::common::RegisterField::<
6789 0,
6790 0x1,
6791 1,
6792 0,
6793 ntst::Tdbef0,
6794 ntst::Tdbef0,
6795 Ntst_SPEC,
6796 crate::common::RW,
6797 >::from_register(self, 0)
6798 }
6799
6800 #[doc = "Normal Receive Data Buffer Full Flag 0"]
6801 #[inline(always)]
6802 pub fn rdbff0(
6803 self,
6804 ) -> crate::common::RegisterField<
6805 1,
6806 0x1,
6807 1,
6808 0,
6809 ntst::Rdbff0,
6810 ntst::Rdbff0,
6811 Ntst_SPEC,
6812 crate::common::RW,
6813 > {
6814 crate::common::RegisterField::<
6815 1,
6816 0x1,
6817 1,
6818 0,
6819 ntst::Rdbff0,
6820 ntst::Rdbff0,
6821 Ntst_SPEC,
6822 crate::common::RW,
6823 >::from_register(self, 0)
6824 }
6825
6826 #[doc = "Normal IBI Queue Empty/Full Flag"]
6827 #[inline(always)]
6828 pub fn ibiqeff(
6829 self,
6830 ) -> crate::common::RegisterField<
6831 2,
6832 0x1,
6833 1,
6834 0,
6835 ntst::Ibiqeff,
6836 ntst::Ibiqeff,
6837 Ntst_SPEC,
6838 crate::common::RW,
6839 > {
6840 crate::common::RegisterField::<
6841 2,
6842 0x1,
6843 1,
6844 0,
6845 ntst::Ibiqeff,
6846 ntst::Ibiqeff,
6847 Ntst_SPEC,
6848 crate::common::RW,
6849 >::from_register(self, 0)
6850 }
6851
6852 #[doc = "Normal Command Queue Empty Flag"]
6853 #[inline(always)]
6854 pub fn cmdqef(
6855 self,
6856 ) -> crate::common::RegisterField<
6857 3,
6858 0x1,
6859 1,
6860 0,
6861 ntst::Cmdqef,
6862 ntst::Cmdqef,
6863 Ntst_SPEC,
6864 crate::common::RW,
6865 > {
6866 crate::common::RegisterField::<
6867 3,
6868 0x1,
6869 1,
6870 0,
6871 ntst::Cmdqef,
6872 ntst::Cmdqef,
6873 Ntst_SPEC,
6874 crate::common::RW,
6875 >::from_register(self, 0)
6876 }
6877
6878 #[doc = "Normal Response Queue Full Flag"]
6879 #[inline(always)]
6880 pub fn rspqff(
6881 self,
6882 ) -> crate::common::RegisterField<
6883 4,
6884 0x1,
6885 1,
6886 0,
6887 ntst::Rspqff,
6888 ntst::Rspqff,
6889 Ntst_SPEC,
6890 crate::common::RW,
6891 > {
6892 crate::common::RegisterField::<
6893 4,
6894 0x1,
6895 1,
6896 0,
6897 ntst::Rspqff,
6898 ntst::Rspqff,
6899 Ntst_SPEC,
6900 crate::common::RW,
6901 >::from_register(self, 0)
6902 }
6903
6904 #[doc = "Normal Transfer Abort Flag"]
6905 #[inline(always)]
6906 pub fn tabtf(
6907 self,
6908 ) -> crate::common::RegisterField<
6909 5,
6910 0x1,
6911 1,
6912 0,
6913 ntst::Tabtf,
6914 ntst::Tabtf,
6915 Ntst_SPEC,
6916 crate::common::RW,
6917 > {
6918 crate::common::RegisterField::<
6919 5,
6920 0x1,
6921 1,
6922 0,
6923 ntst::Tabtf,
6924 ntst::Tabtf,
6925 Ntst_SPEC,
6926 crate::common::RW,
6927 >::from_register(self, 0)
6928 }
6929
6930 #[doc = "Normal Transfer Error Flag"]
6931 #[inline(always)]
6932 pub fn tef(
6933 self,
6934 ) -> crate::common::RegisterField<
6935 9,
6936 0x1,
6937 1,
6938 0,
6939 ntst::Tef,
6940 ntst::Tef,
6941 Ntst_SPEC,
6942 crate::common::RW,
6943 > {
6944 crate::common::RegisterField::<
6945 9,
6946 0x1,
6947 1,
6948 0,
6949 ntst::Tef,
6950 ntst::Tef,
6951 Ntst_SPEC,
6952 crate::common::RW,
6953 >::from_register(self, 0)
6954 }
6955
6956 #[doc = "Normal Receive Status Queue Full Flag"]
6957 #[inline(always)]
6958 pub fn rsqff(
6959 self,
6960 ) -> crate::common::RegisterField<
6961 20,
6962 0x1,
6963 1,
6964 0,
6965 ntst::Rsqff,
6966 ntst::Rsqff,
6967 Ntst_SPEC,
6968 crate::common::RW,
6969 > {
6970 crate::common::RegisterField::<
6971 20,
6972 0x1,
6973 1,
6974 0,
6975 ntst::Rsqff,
6976 ntst::Rsqff,
6977 Ntst_SPEC,
6978 crate::common::RW,
6979 >::from_register(self, 0)
6980 }
6981}
6982impl ::core::default::Default for Ntst {
6983 #[inline(always)]
6984 fn default() -> Ntst {
6985 <crate::RegValueT<Ntst_SPEC> as RegisterValue<_>>::new(0)
6986 }
6987}
6988pub mod ntst {
6989
6990 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6991 pub struct Tdbef0_SPEC;
6992 pub type Tdbef0 = crate::EnumBitfieldStruct<u8, Tdbef0_SPEC>;
6993 impl Tdbef0 {
6994 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is less than the NTBTHCTL0.TXDBTH\\[2:0\\] threshold."]
6995 pub const _0: Self = Self::new(0);
6996
6997 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains no transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is the NTBTHCTL0.TXDBTH\\[2:0\\] threshold or more."]
6998 pub const _1: Self = Self::new(1);
6999 }
7000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7001 pub struct Rdbff0_SPEC;
7002 pub type Rdbff0 = crate::EnumBitfieldStruct<u8, Rdbff0_SPEC>;
7003 impl Rdbff0 {
7004 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains no receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is less than the NTBTHCTL0.RXDBTH\\[2:0\\] threshold."]
7005 pub const _0: Self = Self::new(0);
7006
7007 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is the NTBTHCTL0.RXDBTH\\[2:0\\] threshold or more."]
7008 pub const _1: Self = Self::new(1);
7009 }
7010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7011 pub struct Ibiqeff_SPEC;
7012 pub type Ibiqeff = crate::EnumBitfieldStruct<u8, Ibiqeff_SPEC>;
7013 impl Ibiqeff {
7014 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is the NQTHCTL.IBIQTH threshold or less. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is less than the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is less than the NQTHCTL.IBIQTH threshold."]
7015 pub const _0: Self = Self::new(0);
7016
7017 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is more than the NQTHCTL.IBIQTH threshold. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is the NQTHCTL.IBIQTH threshold or more."]
7018 pub const _1: Self = Self::new(1);
7019 }
7020 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7021 pub struct Cmdqef_SPEC;
7022 pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
7023 impl Cmdqef {
7024 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is less than the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: The number of Command Queue empties is less than the NQTHCTL.CMDQTH threshold."]
7025 pub const _0: Self = Self::new(0);
7026
7027 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: 1: The number of Command Queue empties is the NQTHCTL.CMDQTH threshold or more."]
7028 pub const _1: Self = Self::new(1);
7029 }
7030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7031 pub struct Rspqff_SPEC;
7032 pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
7033 impl Rspqff {
7034 #[doc = "The number of Response Queue entries is the NQTHCTL.RSPQTH threshold or less."]
7035 pub const _0: Self = Self::new(0);
7036
7037 #[doc = "The number of Response Queue entries is more than the NQTHCTL.RSPQTH threshold."]
7038 pub const _1: Self = Self::new(1);
7039 }
7040 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7041 pub struct Tabtf_SPEC;
7042 pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
7043 impl Tabtf {
7044 #[doc = "Transfer Abort does not occur."]
7045 pub const _0: Self = Self::new(0);
7046
7047 #[doc = "Transfer Abort occur. To clear, write 0 to this bit after 1 state is read."]
7048 pub const _1: Self = Self::new(1);
7049 }
7050 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7051 pub struct Tef_SPEC;
7052 pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
7053 impl Tef {
7054 #[doc = "Transfer Error does not occur."]
7055 pub const _0: Self = Self::new(0);
7056
7057 #[doc = "Transfer Error occurs. To clear, write 0 to this bit after 1 state is read."]
7058 pub const _1: Self = Self::new(1);
7059 }
7060 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7061 pub struct Rsqff_SPEC;
7062 pub type Rsqff = crate::EnumBitfieldStruct<u8, Rsqff_SPEC>;
7063 impl Rsqff {
7064 #[doc = "The number of Receive Status Queue entries is the NRQTHCTL.RSQTH threshold or less."]
7065 pub const _0: Self = Self::new(0);
7066
7067 #[doc = "The number of Receive Status Queue entries is more than the NRQTHCTL.RSQTH threshold."]
7068 pub const _1: Self = Self::new(1);
7069 }
7070}
7071#[doc(hidden)]
7072#[derive(Copy, Clone, Eq, PartialEq)]
7073pub struct Ntste_SPEC;
7074impl crate::sealed::RegSpec for Ntste_SPEC {
7075 type DataType = u32;
7076}
7077
7078#[doc = "Normal Transfer Status Enable Register"]
7079pub type Ntste = crate::RegValueT<Ntste_SPEC>;
7080
7081impl Ntste {
7082 #[doc = "Normal Transmit Data Buffer Empty Enable 0"]
7083 #[inline(always)]
7084 pub fn tdbee0(
7085 self,
7086 ) -> crate::common::RegisterField<
7087 0,
7088 0x1,
7089 1,
7090 0,
7091 ntste::Tdbee0,
7092 ntste::Tdbee0,
7093 Ntste_SPEC,
7094 crate::common::RW,
7095 > {
7096 crate::common::RegisterField::<
7097 0,
7098 0x1,
7099 1,
7100 0,
7101 ntste::Tdbee0,
7102 ntste::Tdbee0,
7103 Ntste_SPEC,
7104 crate::common::RW,
7105 >::from_register(self, 0)
7106 }
7107
7108 #[doc = "Normal Receive Data Buffer Full Enable 0"]
7109 #[inline(always)]
7110 pub fn rdbfe0(
7111 self,
7112 ) -> crate::common::RegisterField<
7113 1,
7114 0x1,
7115 1,
7116 0,
7117 ntste::Rdbfe0,
7118 ntste::Rdbfe0,
7119 Ntste_SPEC,
7120 crate::common::RW,
7121 > {
7122 crate::common::RegisterField::<
7123 1,
7124 0x1,
7125 1,
7126 0,
7127 ntste::Rdbfe0,
7128 ntste::Rdbfe0,
7129 Ntste_SPEC,
7130 crate::common::RW,
7131 >::from_register(self, 0)
7132 }
7133
7134 #[doc = "Normal IBI Queue Empty/Full Enable"]
7135 #[inline(always)]
7136 pub fn ibiqefe(
7137 self,
7138 ) -> crate::common::RegisterField<
7139 2,
7140 0x1,
7141 1,
7142 0,
7143 ntste::Ibiqefe,
7144 ntste::Ibiqefe,
7145 Ntste_SPEC,
7146 crate::common::RW,
7147 > {
7148 crate::common::RegisterField::<
7149 2,
7150 0x1,
7151 1,
7152 0,
7153 ntste::Ibiqefe,
7154 ntste::Ibiqefe,
7155 Ntste_SPEC,
7156 crate::common::RW,
7157 >::from_register(self, 0)
7158 }
7159
7160 #[doc = "Normal Command Queue Empty Enable"]
7161 #[inline(always)]
7162 pub fn cmdqee(
7163 self,
7164 ) -> crate::common::RegisterField<
7165 3,
7166 0x1,
7167 1,
7168 0,
7169 ntste::Cmdqee,
7170 ntste::Cmdqee,
7171 Ntste_SPEC,
7172 crate::common::RW,
7173 > {
7174 crate::common::RegisterField::<
7175 3,
7176 0x1,
7177 1,
7178 0,
7179 ntste::Cmdqee,
7180 ntste::Cmdqee,
7181 Ntste_SPEC,
7182 crate::common::RW,
7183 >::from_register(self, 0)
7184 }
7185
7186 #[doc = "Normal Response Queue Full Enable"]
7187 #[inline(always)]
7188 pub fn rspqfe(
7189 self,
7190 ) -> crate::common::RegisterField<
7191 4,
7192 0x1,
7193 1,
7194 0,
7195 ntste::Rspqfe,
7196 ntste::Rspqfe,
7197 Ntste_SPEC,
7198 crate::common::RW,
7199 > {
7200 crate::common::RegisterField::<
7201 4,
7202 0x1,
7203 1,
7204 0,
7205 ntste::Rspqfe,
7206 ntste::Rspqfe,
7207 Ntste_SPEC,
7208 crate::common::RW,
7209 >::from_register(self, 0)
7210 }
7211
7212 #[doc = "Normal Transfer Abort Enable"]
7213 #[inline(always)]
7214 pub fn tabte(
7215 self,
7216 ) -> crate::common::RegisterField<
7217 5,
7218 0x1,
7219 1,
7220 0,
7221 ntste::Tabte,
7222 ntste::Tabte,
7223 Ntste_SPEC,
7224 crate::common::RW,
7225 > {
7226 crate::common::RegisterField::<
7227 5,
7228 0x1,
7229 1,
7230 0,
7231 ntste::Tabte,
7232 ntste::Tabte,
7233 Ntste_SPEC,
7234 crate::common::RW,
7235 >::from_register(self, 0)
7236 }
7237
7238 #[doc = "Normal Transfer Error Enable"]
7239 #[inline(always)]
7240 pub fn tee(
7241 self,
7242 ) -> crate::common::RegisterField<
7243 9,
7244 0x1,
7245 1,
7246 0,
7247 ntste::Tee,
7248 ntste::Tee,
7249 Ntste_SPEC,
7250 crate::common::RW,
7251 > {
7252 crate::common::RegisterField::<
7253 9,
7254 0x1,
7255 1,
7256 0,
7257 ntste::Tee,
7258 ntste::Tee,
7259 Ntste_SPEC,
7260 crate::common::RW,
7261 >::from_register(self, 0)
7262 }
7263
7264 #[doc = "Normal Receive Status Queue Full Enable"]
7265 #[inline(always)]
7266 pub fn rsqfe(
7267 self,
7268 ) -> crate::common::RegisterField<
7269 20,
7270 0x1,
7271 1,
7272 0,
7273 ntste::Rsqfe,
7274 ntste::Rsqfe,
7275 Ntste_SPEC,
7276 crate::common::RW,
7277 > {
7278 crate::common::RegisterField::<
7279 20,
7280 0x1,
7281 1,
7282 0,
7283 ntste::Rsqfe,
7284 ntste::Rsqfe,
7285 Ntste_SPEC,
7286 crate::common::RW,
7287 >::from_register(self, 0)
7288 }
7289}
7290impl ::core::default::Default for Ntste {
7291 #[inline(always)]
7292 fn default() -> Ntste {
7293 <crate::RegValueT<Ntste_SPEC> as RegisterValue<_>>::new(0)
7294 }
7295}
7296pub mod ntste {
7297
7298 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7299 pub struct Tdbee0_SPEC;
7300 pub type Tdbee0 = crate::EnumBitfieldStruct<u8, Tdbee0_SPEC>;
7301 impl Tdbee0 {
7302 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Status logging."]
7303 pub const _0: Self = Self::new(0);
7304
7305 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Status logging."]
7306 pub const _1: Self = Self::new(1);
7307 }
7308 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7309 pub struct Rdbfe0_SPEC;
7310 pub type Rdbfe0 = crate::EnumBitfieldStruct<u8, Rdbfe0_SPEC>;
7311 impl Rdbfe0 {
7312 #[doc = "Disables Rx0 Data Buffer Full Interrupt Status logging."]
7313 pub const _0: Self = Self::new(0);
7314
7315 #[doc = "Enables Rx0 Data Buffer Full Interrupt Status logging."]
7316 pub const _1: Self = Self::new(1);
7317 }
7318 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7319 pub struct Ibiqefe_SPEC;
7320 pub type Ibiqefe = crate::EnumBitfieldStruct<u8, Ibiqefe_SPEC>;
7321 impl Ibiqefe {
7322 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Status logging."]
7323 pub const _0: Self = Self::new(0);
7324
7325 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Status logging."]
7326 pub const _1: Self = Self::new(1);
7327 }
7328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7329 pub struct Cmdqee_SPEC;
7330 pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
7331 impl Cmdqee {
7332 #[doc = "Disables Command Buffer Empty Interrupt Status logging."]
7333 pub const _0: Self = Self::new(0);
7334
7335 #[doc = "Enables Command Buffer Empty Interrupt Status logging."]
7336 pub const _1: Self = Self::new(1);
7337 }
7338 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7339 pub struct Rspqfe_SPEC;
7340 pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
7341 impl Rspqfe {
7342 #[doc = "Disables Response Buffer Full Interrupt Status logging."]
7343 pub const _0: Self = Self::new(0);
7344
7345 #[doc = "Enables Response Buffer Full Interrupt Status logging."]
7346 pub const _1: Self = Self::new(1);
7347 }
7348 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7349 pub struct Tabte_SPEC;
7350 pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
7351 impl Tabte {
7352 #[doc = "Disables Transfer Abort Interrupt Status logging."]
7353 pub const _0: Self = Self::new(0);
7354
7355 #[doc = "Enables Transfer Abort Interrupt Status logging."]
7356 pub const _1: Self = Self::new(1);
7357 }
7358 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7359 pub struct Tee_SPEC;
7360 pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
7361 impl Tee {
7362 #[doc = "Disables Transfer Error Interrupt Status logging."]
7363 pub const _0: Self = Self::new(0);
7364
7365 #[doc = "Enables Transfer Error Interrupt Status logging."]
7366 pub const _1: Self = Self::new(1);
7367 }
7368 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7369 pub struct Rsqfe_SPEC;
7370 pub type Rsqfe = crate::EnumBitfieldStruct<u8, Rsqfe_SPEC>;
7371 impl Rsqfe {
7372 #[doc = "Disables Receive Status Buffer Full Interrupt Status logging."]
7373 pub const _0: Self = Self::new(0);
7374
7375 #[doc = "Enables Receive Status Buffer Full Interrupt Status logging."]
7376 pub const _1: Self = Self::new(1);
7377 }
7378}
7379#[doc(hidden)]
7380#[derive(Copy, Clone, Eq, PartialEq)]
7381pub struct Ntie_SPEC;
7382impl crate::sealed::RegSpec for Ntie_SPEC {
7383 type DataType = u32;
7384}
7385
7386#[doc = "Normal Transfer Interrupt Enable Register"]
7387pub type Ntie = crate::RegValueT<Ntie_SPEC>;
7388
7389impl Ntie {
7390 #[doc = "Normal Transmit Data Buffer Empty Interrupt Enable 0"]
7391 #[inline(always)]
7392 pub fn tdbeie0(
7393 self,
7394 ) -> crate::common::RegisterField<
7395 0,
7396 0x1,
7397 1,
7398 0,
7399 ntie::Tdbeie0,
7400 ntie::Tdbeie0,
7401 Ntie_SPEC,
7402 crate::common::RW,
7403 > {
7404 crate::common::RegisterField::<
7405 0,
7406 0x1,
7407 1,
7408 0,
7409 ntie::Tdbeie0,
7410 ntie::Tdbeie0,
7411 Ntie_SPEC,
7412 crate::common::RW,
7413 >::from_register(self, 0)
7414 }
7415
7416 #[doc = "Normal Receive Data Buffer Full Interrupt Enable 0"]
7417 #[inline(always)]
7418 pub fn rdbfie0(
7419 self,
7420 ) -> crate::common::RegisterField<
7421 1,
7422 0x1,
7423 1,
7424 0,
7425 ntie::Rdbfie0,
7426 ntie::Rdbfie0,
7427 Ntie_SPEC,
7428 crate::common::RW,
7429 > {
7430 crate::common::RegisterField::<
7431 1,
7432 0x1,
7433 1,
7434 0,
7435 ntie::Rdbfie0,
7436 ntie::Rdbfie0,
7437 Ntie_SPEC,
7438 crate::common::RW,
7439 >::from_register(self, 0)
7440 }
7441
7442 #[doc = "Normal IBI Queue Empty/Full Interrupt Enable"]
7443 #[inline(always)]
7444 pub fn ibiqefie(
7445 self,
7446 ) -> crate::common::RegisterField<
7447 2,
7448 0x1,
7449 1,
7450 0,
7451 ntie::Ibiqefie,
7452 ntie::Ibiqefie,
7453 Ntie_SPEC,
7454 crate::common::RW,
7455 > {
7456 crate::common::RegisterField::<
7457 2,
7458 0x1,
7459 1,
7460 0,
7461 ntie::Ibiqefie,
7462 ntie::Ibiqefie,
7463 Ntie_SPEC,
7464 crate::common::RW,
7465 >::from_register(self, 0)
7466 }
7467
7468 #[doc = "Normal Command Queue Empty Interrupt Enable"]
7469 #[inline(always)]
7470 pub fn cmdqeie(
7471 self,
7472 ) -> crate::common::RegisterField<
7473 3,
7474 0x1,
7475 1,
7476 0,
7477 ntie::Cmdqeie,
7478 ntie::Cmdqeie,
7479 Ntie_SPEC,
7480 crate::common::RW,
7481 > {
7482 crate::common::RegisterField::<
7483 3,
7484 0x1,
7485 1,
7486 0,
7487 ntie::Cmdqeie,
7488 ntie::Cmdqeie,
7489 Ntie_SPEC,
7490 crate::common::RW,
7491 >::from_register(self, 0)
7492 }
7493
7494 #[doc = "Normal Response Queue Full Interrupt Enable"]
7495 #[inline(always)]
7496 pub fn rspqfie(
7497 self,
7498 ) -> crate::common::RegisterField<
7499 4,
7500 0x1,
7501 1,
7502 0,
7503 ntie::Rspqfie,
7504 ntie::Rspqfie,
7505 Ntie_SPEC,
7506 crate::common::RW,
7507 > {
7508 crate::common::RegisterField::<
7509 4,
7510 0x1,
7511 1,
7512 0,
7513 ntie::Rspqfie,
7514 ntie::Rspqfie,
7515 Ntie_SPEC,
7516 crate::common::RW,
7517 >::from_register(self, 0)
7518 }
7519
7520 #[doc = "Normal Transfer Abort Interrupt Enable"]
7521 #[inline(always)]
7522 pub fn tabtie(
7523 self,
7524 ) -> crate::common::RegisterField<
7525 5,
7526 0x1,
7527 1,
7528 0,
7529 ntie::Tabtie,
7530 ntie::Tabtie,
7531 Ntie_SPEC,
7532 crate::common::RW,
7533 > {
7534 crate::common::RegisterField::<
7535 5,
7536 0x1,
7537 1,
7538 0,
7539 ntie::Tabtie,
7540 ntie::Tabtie,
7541 Ntie_SPEC,
7542 crate::common::RW,
7543 >::from_register(self, 0)
7544 }
7545
7546 #[doc = "Normal Transfer Error Interrupt Enable"]
7547 #[inline(always)]
7548 pub fn teie(
7549 self,
7550 ) -> crate::common::RegisterField<
7551 9,
7552 0x1,
7553 1,
7554 0,
7555 ntie::Teie,
7556 ntie::Teie,
7557 Ntie_SPEC,
7558 crate::common::RW,
7559 > {
7560 crate::common::RegisterField::<
7561 9,
7562 0x1,
7563 1,
7564 0,
7565 ntie::Teie,
7566 ntie::Teie,
7567 Ntie_SPEC,
7568 crate::common::RW,
7569 >::from_register(self, 0)
7570 }
7571
7572 #[doc = "Normal Receive Status Queue Full Interrupt Enable"]
7573 #[inline(always)]
7574 pub fn rsqfie(
7575 self,
7576 ) -> crate::common::RegisterField<
7577 20,
7578 0x1,
7579 1,
7580 0,
7581 ntie::Rsqfie,
7582 ntie::Rsqfie,
7583 Ntie_SPEC,
7584 crate::common::RW,
7585 > {
7586 crate::common::RegisterField::<
7587 20,
7588 0x1,
7589 1,
7590 0,
7591 ntie::Rsqfie,
7592 ntie::Rsqfie,
7593 Ntie_SPEC,
7594 crate::common::RW,
7595 >::from_register(self, 0)
7596 }
7597}
7598impl ::core::default::Default for Ntie {
7599 #[inline(always)]
7600 fn default() -> Ntie {
7601 <crate::RegValueT<Ntie_SPEC> as RegisterValue<_>>::new(0)
7602 }
7603}
7604pub mod ntie {
7605
7606 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7607 pub struct Tdbeie0_SPEC;
7608 pub type Tdbeie0 = crate::EnumBitfieldStruct<u8, Tdbeie0_SPEC>;
7609 impl Tdbeie0 {
7610 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Signal."]
7611 pub const _0: Self = Self::new(0);
7612
7613 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Signal."]
7614 pub const _1: Self = Self::new(1);
7615 }
7616 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7617 pub struct Rdbfie0_SPEC;
7618 pub type Rdbfie0 = crate::EnumBitfieldStruct<u8, Rdbfie0_SPEC>;
7619 impl Rdbfie0 {
7620 #[doc = "Disables Rx0 Data Buffer Full Interrupt Signal."]
7621 pub const _0: Self = Self::new(0);
7622
7623 #[doc = "Enables Rx0 Data Buffer Full Interrupt Signal."]
7624 pub const _1: Self = Self::new(1);
7625 }
7626 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7627 pub struct Ibiqefie_SPEC;
7628 pub type Ibiqefie = crate::EnumBitfieldStruct<u8, Ibiqefie_SPEC>;
7629 impl Ibiqefie {
7630 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Signal."]
7631 pub const _0: Self = Self::new(0);
7632
7633 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Signal."]
7634 pub const _1: Self = Self::new(1);
7635 }
7636 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7637 pub struct Cmdqeie_SPEC;
7638 pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
7639 impl Cmdqeie {
7640 #[doc = "Disables Command Buffer Empty Interrupt Signal."]
7641 pub const _0: Self = Self::new(0);
7642
7643 #[doc = "Enables Command Buffer Empty Interrupt Signal."]
7644 pub const _1: Self = Self::new(1);
7645 }
7646 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7647 pub struct Rspqfie_SPEC;
7648 pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
7649 impl Rspqfie {
7650 #[doc = "Disables Response Buffer Full Interrupt Signal."]
7651 pub const _0: Self = Self::new(0);
7652
7653 #[doc = "Enables Response Buffer Full Interrupt Signal."]
7654 pub const _1: Self = Self::new(1);
7655 }
7656 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7657 pub struct Tabtie_SPEC;
7658 pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
7659 impl Tabtie {
7660 #[doc = "Disables Transfer Abort Interrupt Signal."]
7661 pub const _0: Self = Self::new(0);
7662
7663 #[doc = "Enables Transfer Abort Interrupt Signal."]
7664 pub const _1: Self = Self::new(1);
7665 }
7666 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7667 pub struct Teie_SPEC;
7668 pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
7669 impl Teie {
7670 #[doc = "Disables Transfer Error Interrupt Signal."]
7671 pub const _0: Self = Self::new(0);
7672
7673 #[doc = "Enables Transfer Error Interrupt Signal."]
7674 pub const _1: Self = Self::new(1);
7675 }
7676 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7677 pub struct Rsqfie_SPEC;
7678 pub type Rsqfie = crate::EnumBitfieldStruct<u8, Rsqfie_SPEC>;
7679 impl Rsqfie {
7680 #[doc = "Disables Receive Status Buffer Full Interrupt Signal."]
7681 pub const _0: Self = Self::new(0);
7682
7683 #[doc = "Enables Receive Status Buffer Full Interrupt Signal."]
7684 pub const _1: Self = Self::new(1);
7685 }
7686}
7687#[doc(hidden)]
7688#[derive(Copy, Clone, Eq, PartialEq)]
7689pub struct Ntstfc_SPEC;
7690impl crate::sealed::RegSpec for Ntstfc_SPEC {
7691 type DataType = u32;
7692}
7693
7694#[doc = "Normal Transfer Status Force Register"]
7695pub type Ntstfc = crate::RegValueT<Ntstfc_SPEC>;
7696
7697impl Ntstfc {
7698 #[doc = "Normal Transmit Data Buffer Empty Force 0"]
7699 #[inline(always)]
7700 pub fn tdbefc0(
7701 self,
7702 ) -> crate::common::RegisterField<
7703 0,
7704 0x1,
7705 1,
7706 0,
7707 ntstfc::Tdbefc0,
7708 ntstfc::Tdbefc0,
7709 Ntstfc_SPEC,
7710 crate::common::W,
7711 > {
7712 crate::common::RegisterField::<
7713 0,
7714 0x1,
7715 1,
7716 0,
7717 ntstfc::Tdbefc0,
7718 ntstfc::Tdbefc0,
7719 Ntstfc_SPEC,
7720 crate::common::W,
7721 >::from_register(self, 0)
7722 }
7723
7724 #[doc = "Normal Receive Data Buffer Full Force 0"]
7725 #[inline(always)]
7726 pub fn rdbffc0(
7727 self,
7728 ) -> crate::common::RegisterField<
7729 1,
7730 0x1,
7731 1,
7732 0,
7733 ntstfc::Rdbffc0,
7734 ntstfc::Rdbffc0,
7735 Ntstfc_SPEC,
7736 crate::common::W,
7737 > {
7738 crate::common::RegisterField::<
7739 1,
7740 0x1,
7741 1,
7742 0,
7743 ntstfc::Rdbffc0,
7744 ntstfc::Rdbffc0,
7745 Ntstfc_SPEC,
7746 crate::common::W,
7747 >::from_register(self, 0)
7748 }
7749
7750 #[doc = "Normal IBI Queue Empty/Full Force"]
7751 #[inline(always)]
7752 pub fn ibiqeffc(
7753 self,
7754 ) -> crate::common::RegisterField<
7755 2,
7756 0x1,
7757 1,
7758 0,
7759 ntstfc::Ibiqeffc,
7760 ntstfc::Ibiqeffc,
7761 Ntstfc_SPEC,
7762 crate::common::W,
7763 > {
7764 crate::common::RegisterField::<
7765 2,
7766 0x1,
7767 1,
7768 0,
7769 ntstfc::Ibiqeffc,
7770 ntstfc::Ibiqeffc,
7771 Ntstfc_SPEC,
7772 crate::common::W,
7773 >::from_register(self, 0)
7774 }
7775
7776 #[doc = "Normal Command Queue Empty Force"]
7777 #[inline(always)]
7778 pub fn cmdqefc(
7779 self,
7780 ) -> crate::common::RegisterField<
7781 3,
7782 0x1,
7783 1,
7784 0,
7785 ntstfc::Cmdqefc,
7786 ntstfc::Cmdqefc,
7787 Ntstfc_SPEC,
7788 crate::common::W,
7789 > {
7790 crate::common::RegisterField::<
7791 3,
7792 0x1,
7793 1,
7794 0,
7795 ntstfc::Cmdqefc,
7796 ntstfc::Cmdqefc,
7797 Ntstfc_SPEC,
7798 crate::common::W,
7799 >::from_register(self, 0)
7800 }
7801
7802 #[doc = "Normal Response Queue Full Force"]
7803 #[inline(always)]
7804 pub fn rspqffc(
7805 self,
7806 ) -> crate::common::RegisterField<
7807 4,
7808 0x1,
7809 1,
7810 0,
7811 ntstfc::Rspqffc,
7812 ntstfc::Rspqffc,
7813 Ntstfc_SPEC,
7814 crate::common::W,
7815 > {
7816 crate::common::RegisterField::<
7817 4,
7818 0x1,
7819 1,
7820 0,
7821 ntstfc::Rspqffc,
7822 ntstfc::Rspqffc,
7823 Ntstfc_SPEC,
7824 crate::common::W,
7825 >::from_register(self, 0)
7826 }
7827
7828 #[doc = "Normal Transfer Abort Force"]
7829 #[inline(always)]
7830 pub fn tabtfc(
7831 self,
7832 ) -> crate::common::RegisterField<
7833 5,
7834 0x1,
7835 1,
7836 0,
7837 ntstfc::Tabtfc,
7838 ntstfc::Tabtfc,
7839 Ntstfc_SPEC,
7840 crate::common::W,
7841 > {
7842 crate::common::RegisterField::<
7843 5,
7844 0x1,
7845 1,
7846 0,
7847 ntstfc::Tabtfc,
7848 ntstfc::Tabtfc,
7849 Ntstfc_SPEC,
7850 crate::common::W,
7851 >::from_register(self, 0)
7852 }
7853
7854 #[doc = "Normal Transfer Error Force"]
7855 #[inline(always)]
7856 pub fn tefc(
7857 self,
7858 ) -> crate::common::RegisterField<
7859 9,
7860 0x1,
7861 1,
7862 0,
7863 ntstfc::Tefc,
7864 ntstfc::Tefc,
7865 Ntstfc_SPEC,
7866 crate::common::W,
7867 > {
7868 crate::common::RegisterField::<
7869 9,
7870 0x1,
7871 1,
7872 0,
7873 ntstfc::Tefc,
7874 ntstfc::Tefc,
7875 Ntstfc_SPEC,
7876 crate::common::W,
7877 >::from_register(self, 0)
7878 }
7879
7880 #[doc = "Normal Receive Status Queue Full Force"]
7881 #[inline(always)]
7882 pub fn rsqffc(
7883 self,
7884 ) -> crate::common::RegisterField<
7885 20,
7886 0x1,
7887 1,
7888 0,
7889 ntstfc::Rsqffc,
7890 ntstfc::Rsqffc,
7891 Ntstfc_SPEC,
7892 crate::common::W,
7893 > {
7894 crate::common::RegisterField::<
7895 20,
7896 0x1,
7897 1,
7898 0,
7899 ntstfc::Rsqffc,
7900 ntstfc::Rsqffc,
7901 Ntstfc_SPEC,
7902 crate::common::W,
7903 >::from_register(self, 0)
7904 }
7905}
7906impl ::core::default::Default for Ntstfc {
7907 #[inline(always)]
7908 fn default() -> Ntstfc {
7909 <crate::RegValueT<Ntstfc_SPEC> as RegisterValue<_>>::new(0)
7910 }
7911}
7912pub mod ntstfc {
7913
7914 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7915 pub struct Tdbefc0_SPEC;
7916 pub type Tdbefc0 = crate::EnumBitfieldStruct<u8, Tdbefc0_SPEC>;
7917 impl Tdbefc0 {
7918 #[doc = "Not Force Tx0 Data Buffer Empty Interrupt for software testing."]
7919 pub const _0: Self = Self::new(0);
7920
7921 #[doc = "Force Tx0 Data Buffer Empty Interrupt for software testing."]
7922 pub const _1: Self = Self::new(1);
7923 }
7924 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7925 pub struct Rdbffc0_SPEC;
7926 pub type Rdbffc0 = crate::EnumBitfieldStruct<u8, Rdbffc0_SPEC>;
7927 impl Rdbffc0 {
7928 #[doc = "Not Force Rx0 Data Buffer Full Interrupt for software testing."]
7929 pub const _0: Self = Self::new(0);
7930
7931 #[doc = "Force Rx0 Data Buffer Full Interrupt for software testing."]
7932 pub const _1: Self = Self::new(1);
7933 }
7934 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7935 pub struct Ibiqeffc_SPEC;
7936 pub type Ibiqeffc = crate::EnumBitfieldStruct<u8, Ibiqeffc_SPEC>;
7937 impl Ibiqeffc {
7938 #[doc = "Not Force IBI Status Buffer Full Interrupt for software testing."]
7939 pub const _0: Self = Self::new(0);
7940
7941 #[doc = "Force IBI Status Buffer Full Interrupt for software testing."]
7942 pub const _1: Self = Self::new(1);
7943 }
7944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7945 pub struct Cmdqefc_SPEC;
7946 pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
7947 impl Cmdqefc {
7948 #[doc = "Not Force Command Buffer Empty Interrupt for software testing."]
7949 pub const _0: Self = Self::new(0);
7950
7951 #[doc = "Force Command Buffer Empty Interrupt for software testing."]
7952 pub const _1: Self = Self::new(1);
7953 }
7954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7955 pub struct Rspqffc_SPEC;
7956 pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
7957 impl Rspqffc {
7958 #[doc = "Not Force Response Buffer Full Interrupt for software testing."]
7959 pub const _0: Self = Self::new(0);
7960
7961 #[doc = "Force Response Buffer Full Interrupt for software testing."]
7962 pub const _1: Self = Self::new(1);
7963 }
7964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7965 pub struct Tabtfc_SPEC;
7966 pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
7967 impl Tabtfc {
7968 #[doc = "Not Force Transfer Abort Interrupt for software testing."]
7969 pub const _0: Self = Self::new(0);
7970
7971 #[doc = "Force Transfer Abort Interrupt for software testing."]
7972 pub const _1: Self = Self::new(1);
7973 }
7974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7975 pub struct Tefc_SPEC;
7976 pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
7977 impl Tefc {
7978 #[doc = "Not Force Transfer Error Interrupt for software testing."]
7979 pub const _0: Self = Self::new(0);
7980
7981 #[doc = "Force Transfer Error Interrupt for software testing."]
7982 pub const _1: Self = Self::new(1);
7983 }
7984 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7985 pub struct Rsqffc_SPEC;
7986 pub type Rsqffc = crate::EnumBitfieldStruct<u8, Rsqffc_SPEC>;
7987 impl Rsqffc {
7988 #[doc = "Not Force Receive Status Buffer Full Interrupt for software testing."]
7989 pub const _0: Self = Self::new(0);
7990
7991 #[doc = "Force Receive Status Buffer Full Interrupt for software testing."]
7992 pub const _1: Self = Self::new(1);
7993 }
7994}
7995#[doc(hidden)]
7996#[derive(Copy, Clone, Eq, PartialEq)]
7997pub struct Htst_SPEC;
7998impl crate::sealed::RegSpec for Htst_SPEC {
7999 type DataType = u32;
8000}
8001
8002#[doc = "High Priority Transfer Status Register"]
8003pub type Htst = crate::RegValueT<Htst_SPEC>;
8004
8005impl Htst {
8006 #[doc = "High Priority Transmit Data Buffer Empty Flag"]
8007 #[inline(always)]
8008 pub fn tdbef(
8009 self,
8010 ) -> crate::common::RegisterField<
8011 0,
8012 0x1,
8013 1,
8014 0,
8015 htst::Tdbef,
8016 htst::Tdbef,
8017 Htst_SPEC,
8018 crate::common::RW,
8019 > {
8020 crate::common::RegisterField::<
8021 0,
8022 0x1,
8023 1,
8024 0,
8025 htst::Tdbef,
8026 htst::Tdbef,
8027 Htst_SPEC,
8028 crate::common::RW,
8029 >::from_register(self, 0)
8030 }
8031
8032 #[doc = "High Priority Receive Data Buffer Full Flag"]
8033 #[inline(always)]
8034 pub fn rdbff(
8035 self,
8036 ) -> crate::common::RegisterField<
8037 1,
8038 0x1,
8039 1,
8040 0,
8041 htst::Rdbff,
8042 htst::Rdbff,
8043 Htst_SPEC,
8044 crate::common::RW,
8045 > {
8046 crate::common::RegisterField::<
8047 1,
8048 0x1,
8049 1,
8050 0,
8051 htst::Rdbff,
8052 htst::Rdbff,
8053 Htst_SPEC,
8054 crate::common::RW,
8055 >::from_register(self, 0)
8056 }
8057
8058 #[doc = "High Priority Command Queue Empty Flag"]
8059 #[inline(always)]
8060 pub fn cmdqef(
8061 self,
8062 ) -> crate::common::RegisterField<
8063 3,
8064 0x1,
8065 1,
8066 0,
8067 htst::Cmdqef,
8068 htst::Cmdqef,
8069 Htst_SPEC,
8070 crate::common::RW,
8071 > {
8072 crate::common::RegisterField::<
8073 3,
8074 0x1,
8075 1,
8076 0,
8077 htst::Cmdqef,
8078 htst::Cmdqef,
8079 Htst_SPEC,
8080 crate::common::RW,
8081 >::from_register(self, 0)
8082 }
8083
8084 #[doc = "High Priority Response Queue Full Flag"]
8085 #[inline(always)]
8086 pub fn rspqff(
8087 self,
8088 ) -> crate::common::RegisterField<
8089 4,
8090 0x1,
8091 1,
8092 0,
8093 htst::Rspqff,
8094 htst::Rspqff,
8095 Htst_SPEC,
8096 crate::common::RW,
8097 > {
8098 crate::common::RegisterField::<
8099 4,
8100 0x1,
8101 1,
8102 0,
8103 htst::Rspqff,
8104 htst::Rspqff,
8105 Htst_SPEC,
8106 crate::common::RW,
8107 >::from_register(self, 0)
8108 }
8109
8110 #[doc = "High Priority Transfer Abort Flag"]
8111 #[inline(always)]
8112 pub fn tabtf(
8113 self,
8114 ) -> crate::common::RegisterField<
8115 5,
8116 0x1,
8117 1,
8118 0,
8119 htst::Tabtf,
8120 htst::Tabtf,
8121 Htst_SPEC,
8122 crate::common::RW,
8123 > {
8124 crate::common::RegisterField::<
8125 5,
8126 0x1,
8127 1,
8128 0,
8129 htst::Tabtf,
8130 htst::Tabtf,
8131 Htst_SPEC,
8132 crate::common::RW,
8133 >::from_register(self, 0)
8134 }
8135
8136 #[doc = "High Priority Transfer Error Flag"]
8137 #[inline(always)]
8138 pub fn tef(
8139 self,
8140 ) -> crate::common::RegisterField<
8141 9,
8142 0x1,
8143 1,
8144 0,
8145 htst::Tef,
8146 htst::Tef,
8147 Htst_SPEC,
8148 crate::common::RW,
8149 > {
8150 crate::common::RegisterField::<
8151 9,
8152 0x1,
8153 1,
8154 0,
8155 htst::Tef,
8156 htst::Tef,
8157 Htst_SPEC,
8158 crate::common::RW,
8159 >::from_register(self, 0)
8160 }
8161}
8162impl ::core::default::Default for Htst {
8163 #[inline(always)]
8164 fn default() -> Htst {
8165 <crate::RegValueT<Htst_SPEC> as RegisterValue<_>>::new(0)
8166 }
8167}
8168pub mod htst {
8169
8170 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8171 pub struct Tdbef_SPEC;
8172 pub type Tdbef = crate::EnumBitfieldStruct<u8, Tdbef_SPEC>;
8173 impl Tdbef {
8174 #[doc = "The number of empties in the High Priority Transmit Data Buffer is less than the HTBTHCTL.TXDBTH\\[2:0\\] threshold."]
8175 pub const _0: Self = Self::new(0);
8176
8177 #[doc = "The number of empties in the High Priority Transmit Data Buffer is the HTBTHCTL.TXDBTH\\[2:0\\] threshold or more."]
8178 pub const _1: Self = Self::new(1);
8179 }
8180 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8181 pub struct Rdbff_SPEC;
8182 pub type Rdbff = crate::EnumBitfieldStruct<u8, Rdbff_SPEC>;
8183 impl Rdbff {
8184 #[doc = "The number of entries in the High Priority Receive Data Buffer is less than the HTBTHCTL.RXDBTH\\[2:0\\] threshold."]
8185 pub const _0: Self = Self::new(0);
8186
8187 #[doc = "The number of entries in the High Priority Receive Data Buffer is the HTBTHCTL.RXDBTH\\[2:0\\] threshold or more."]
8188 pub const _1: Self = Self::new(1);
8189 }
8190 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8191 pub struct Cmdqef_SPEC;
8192 pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
8193 impl Cmdqef {
8194 #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is less than the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is less than the HQTHCTL.CMDQTH threshold."]
8195 pub const _0: Self = Self::new(0);
8196
8197 #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is the HQTHCTL.CMDQTH threshold or more."]
8198 pub const _1: Self = Self::new(1);
8199 }
8200 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8201 pub struct Rspqff_SPEC;
8202 pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
8203 impl Rspqff {
8204 #[doc = "The number of High Priority Response Queue entries is less than the HQTHCTL .RSPQTH threshold."]
8205 pub const _0: Self = Self::new(0);
8206
8207 #[doc = "The number of High Priority Response Queue entries is the HQTHCTL .RSPQTH threshold or more."]
8208 pub const _1: Self = Self::new(1);
8209 }
8210 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8211 pub struct Tabtf_SPEC;
8212 pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
8213 impl Tabtf {
8214 #[doc = "High Priority Transfer Abort does not occur."]
8215 pub const _0: Self = Self::new(0);
8216
8217 #[doc = "High Priority Transfer Abort occurs. To clear, write 0 to this bit after 1 is read."]
8218 pub const _1: Self = Self::new(1);
8219 }
8220 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8221 pub struct Tef_SPEC;
8222 pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
8223 impl Tef {
8224 #[doc = "High Priority Transfer Error does not occur."]
8225 pub const _0: Self = Self::new(0);
8226
8227 #[doc = "High Priority Transfer Error occurs. To clear, write 0 to this bit after 1 is read."]
8228 pub const _1: Self = Self::new(1);
8229 }
8230}
8231#[doc(hidden)]
8232#[derive(Copy, Clone, Eq, PartialEq)]
8233pub struct Htste_SPEC;
8234impl crate::sealed::RegSpec for Htste_SPEC {
8235 type DataType = u32;
8236}
8237
8238#[doc = "High Priority Transfer Status Enable Register"]
8239pub type Htste = crate::RegValueT<Htste_SPEC>;
8240
8241impl Htste {
8242 #[doc = "High Priority Transmit Data Buffer Empty Enable"]
8243 #[inline(always)]
8244 pub fn tdbee(
8245 self,
8246 ) -> crate::common::RegisterField<
8247 0,
8248 0x1,
8249 1,
8250 0,
8251 htste::Tdbee,
8252 htste::Tdbee,
8253 Htste_SPEC,
8254 crate::common::RW,
8255 > {
8256 crate::common::RegisterField::<
8257 0,
8258 0x1,
8259 1,
8260 0,
8261 htste::Tdbee,
8262 htste::Tdbee,
8263 Htste_SPEC,
8264 crate::common::RW,
8265 >::from_register(self, 0)
8266 }
8267
8268 #[doc = "High Priority Receive Data Buffer Full Enable"]
8269 #[inline(always)]
8270 pub fn rdbfe(
8271 self,
8272 ) -> crate::common::RegisterField<
8273 1,
8274 0x1,
8275 1,
8276 0,
8277 htste::Rdbfe,
8278 htste::Rdbfe,
8279 Htste_SPEC,
8280 crate::common::RW,
8281 > {
8282 crate::common::RegisterField::<
8283 1,
8284 0x1,
8285 1,
8286 0,
8287 htste::Rdbfe,
8288 htste::Rdbfe,
8289 Htste_SPEC,
8290 crate::common::RW,
8291 >::from_register(self, 0)
8292 }
8293
8294 #[doc = "High Priority Command Queue Empty Enable"]
8295 #[inline(always)]
8296 pub fn cmdqee(
8297 self,
8298 ) -> crate::common::RegisterField<
8299 3,
8300 0x1,
8301 1,
8302 0,
8303 htste::Cmdqee,
8304 htste::Cmdqee,
8305 Htste_SPEC,
8306 crate::common::RW,
8307 > {
8308 crate::common::RegisterField::<
8309 3,
8310 0x1,
8311 1,
8312 0,
8313 htste::Cmdqee,
8314 htste::Cmdqee,
8315 Htste_SPEC,
8316 crate::common::RW,
8317 >::from_register(self, 0)
8318 }
8319
8320 #[doc = "High Priority Response Queue Full Enable"]
8321 #[inline(always)]
8322 pub fn rspqfe(
8323 self,
8324 ) -> crate::common::RegisterField<
8325 4,
8326 0x1,
8327 1,
8328 0,
8329 htste::Rspqfe,
8330 htste::Rspqfe,
8331 Htste_SPEC,
8332 crate::common::RW,
8333 > {
8334 crate::common::RegisterField::<
8335 4,
8336 0x1,
8337 1,
8338 0,
8339 htste::Rspqfe,
8340 htste::Rspqfe,
8341 Htste_SPEC,
8342 crate::common::RW,
8343 >::from_register(self, 0)
8344 }
8345
8346 #[doc = "High Priority Transfer Abort Enable"]
8347 #[inline(always)]
8348 pub fn tabte(
8349 self,
8350 ) -> crate::common::RegisterField<
8351 5,
8352 0x1,
8353 1,
8354 0,
8355 htste::Tabte,
8356 htste::Tabte,
8357 Htste_SPEC,
8358 crate::common::RW,
8359 > {
8360 crate::common::RegisterField::<
8361 5,
8362 0x1,
8363 1,
8364 0,
8365 htste::Tabte,
8366 htste::Tabte,
8367 Htste_SPEC,
8368 crate::common::RW,
8369 >::from_register(self, 0)
8370 }
8371
8372 #[doc = "High Priority Transfer Error Enable"]
8373 #[inline(always)]
8374 pub fn tee(
8375 self,
8376 ) -> crate::common::RegisterField<
8377 9,
8378 0x1,
8379 1,
8380 0,
8381 htste::Tee,
8382 htste::Tee,
8383 Htste_SPEC,
8384 crate::common::RW,
8385 > {
8386 crate::common::RegisterField::<
8387 9,
8388 0x1,
8389 1,
8390 0,
8391 htste::Tee,
8392 htste::Tee,
8393 Htste_SPEC,
8394 crate::common::RW,
8395 >::from_register(self, 0)
8396 }
8397}
8398impl ::core::default::Default for Htste {
8399 #[inline(always)]
8400 fn default() -> Htste {
8401 <crate::RegValueT<Htste_SPEC> as RegisterValue<_>>::new(0)
8402 }
8403}
8404pub mod htste {
8405
8406 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8407 pub struct Tdbee_SPEC;
8408 pub type Tdbee = crate::EnumBitfieldStruct<u8, Tdbee_SPEC>;
8409 impl Tdbee {
8410 #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
8411 pub const _0: Self = Self::new(0);
8412
8413 #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
8414 pub const _1: Self = Self::new(1);
8415 }
8416 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8417 pub struct Rdbfe_SPEC;
8418 pub type Rdbfe = crate::EnumBitfieldStruct<u8, Rdbfe_SPEC>;
8419 impl Rdbfe {
8420 #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Status logging."]
8421 pub const _0: Self = Self::new(0);
8422
8423 #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Status logging."]
8424 pub const _1: Self = Self::new(1);
8425 }
8426 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8427 pub struct Cmdqee_SPEC;
8428 pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
8429 impl Cmdqee {
8430 #[doc = "Disables High Priority Command Buffer Empty Interrupt Status logging."]
8431 pub const _0: Self = Self::new(0);
8432
8433 #[doc = "Enables High Priority Command Buffer Empty Interrupt Status logging."]
8434 pub const _1: Self = Self::new(1);
8435 }
8436 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8437 pub struct Rspqfe_SPEC;
8438 pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
8439 impl Rspqfe {
8440 #[doc = "Disables High Priority Response Buffer Full Interrupt Status logging."]
8441 pub const _0: Self = Self::new(0);
8442
8443 #[doc = "Enables High Priority Response Buffer Full Interrupt Status logging."]
8444 pub const _1: Self = Self::new(1);
8445 }
8446 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8447 pub struct Tabte_SPEC;
8448 pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
8449 impl Tabte {
8450 #[doc = "Disables High PriorityTransfer Abort Interrupt Status logging."]
8451 pub const _0: Self = Self::new(0);
8452
8453 #[doc = "Enables High Priority Transfer Abort Interrupt Status logging."]
8454 pub const _1: Self = Self::new(1);
8455 }
8456 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8457 pub struct Tee_SPEC;
8458 pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
8459 impl Tee {
8460 #[doc = "Disables High Priority Transfer Error interrupt Stats logging."]
8461 pub const _0: Self = Self::new(0);
8462
8463 #[doc = "Enables High Priority Transfer Error interrupt Stats logging."]
8464 pub const _1: Self = Self::new(1);
8465 }
8466}
8467#[doc(hidden)]
8468#[derive(Copy, Clone, Eq, PartialEq)]
8469pub struct Htie_SPEC;
8470impl crate::sealed::RegSpec for Htie_SPEC {
8471 type DataType = u32;
8472}
8473
8474#[doc = "High Priority Transfer Interrupt Enable Register"]
8475pub type Htie = crate::RegValueT<Htie_SPEC>;
8476
8477impl Htie {
8478 #[doc = "High Priority Transmit Data Buffer Empty Interrupt Enable"]
8479 #[inline(always)]
8480 pub fn tdbeie(
8481 self,
8482 ) -> crate::common::RegisterField<
8483 0,
8484 0x1,
8485 1,
8486 0,
8487 htie::Tdbeie,
8488 htie::Tdbeie,
8489 Htie_SPEC,
8490 crate::common::RW,
8491 > {
8492 crate::common::RegisterField::<
8493 0,
8494 0x1,
8495 1,
8496 0,
8497 htie::Tdbeie,
8498 htie::Tdbeie,
8499 Htie_SPEC,
8500 crate::common::RW,
8501 >::from_register(self, 0)
8502 }
8503
8504 #[doc = "High Priority Receive Data Buffer Full Interrupt Enable"]
8505 #[inline(always)]
8506 pub fn rdbfie(
8507 self,
8508 ) -> crate::common::RegisterField<
8509 1,
8510 0x1,
8511 1,
8512 0,
8513 htie::Rdbfie,
8514 htie::Rdbfie,
8515 Htie_SPEC,
8516 crate::common::RW,
8517 > {
8518 crate::common::RegisterField::<
8519 1,
8520 0x1,
8521 1,
8522 0,
8523 htie::Rdbfie,
8524 htie::Rdbfie,
8525 Htie_SPEC,
8526 crate::common::RW,
8527 >::from_register(self, 0)
8528 }
8529
8530 #[doc = "High Priority Command Queue Empty Interrupt Enable"]
8531 #[inline(always)]
8532 pub fn cmdqeie(
8533 self,
8534 ) -> crate::common::RegisterField<
8535 3,
8536 0x1,
8537 1,
8538 0,
8539 htie::Cmdqeie,
8540 htie::Cmdqeie,
8541 Htie_SPEC,
8542 crate::common::RW,
8543 > {
8544 crate::common::RegisterField::<
8545 3,
8546 0x1,
8547 1,
8548 0,
8549 htie::Cmdqeie,
8550 htie::Cmdqeie,
8551 Htie_SPEC,
8552 crate::common::RW,
8553 >::from_register(self, 0)
8554 }
8555
8556 #[doc = "High Priority Response Queue Full Interrupt Enable"]
8557 #[inline(always)]
8558 pub fn rspqfie(
8559 self,
8560 ) -> crate::common::RegisterField<
8561 4,
8562 0x1,
8563 1,
8564 0,
8565 htie::Rspqfie,
8566 htie::Rspqfie,
8567 Htie_SPEC,
8568 crate::common::RW,
8569 > {
8570 crate::common::RegisterField::<
8571 4,
8572 0x1,
8573 1,
8574 0,
8575 htie::Rspqfie,
8576 htie::Rspqfie,
8577 Htie_SPEC,
8578 crate::common::RW,
8579 >::from_register(self, 0)
8580 }
8581
8582 #[doc = "High Priority Transfer Abort Interrupt Enable"]
8583 #[inline(always)]
8584 pub fn tabtie(
8585 self,
8586 ) -> crate::common::RegisterField<
8587 5,
8588 0x1,
8589 1,
8590 0,
8591 htie::Tabtie,
8592 htie::Tabtie,
8593 Htie_SPEC,
8594 crate::common::RW,
8595 > {
8596 crate::common::RegisterField::<
8597 5,
8598 0x1,
8599 1,
8600 0,
8601 htie::Tabtie,
8602 htie::Tabtie,
8603 Htie_SPEC,
8604 crate::common::RW,
8605 >::from_register(self, 0)
8606 }
8607
8608 #[doc = "High Priority Transfer Error Interrupt Enable"]
8609 #[inline(always)]
8610 pub fn teie(
8611 self,
8612 ) -> crate::common::RegisterField<
8613 9,
8614 0x1,
8615 1,
8616 0,
8617 htie::Teie,
8618 htie::Teie,
8619 Htie_SPEC,
8620 crate::common::RW,
8621 > {
8622 crate::common::RegisterField::<
8623 9,
8624 0x1,
8625 1,
8626 0,
8627 htie::Teie,
8628 htie::Teie,
8629 Htie_SPEC,
8630 crate::common::RW,
8631 >::from_register(self, 0)
8632 }
8633}
8634impl ::core::default::Default for Htie {
8635 #[inline(always)]
8636 fn default() -> Htie {
8637 <crate::RegValueT<Htie_SPEC> as RegisterValue<_>>::new(0)
8638 }
8639}
8640pub mod htie {
8641
8642 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8643 pub struct Tdbeie_SPEC;
8644 pub type Tdbeie = crate::EnumBitfieldStruct<u8, Tdbeie_SPEC>;
8645 impl Tdbeie {
8646 #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Signal."]
8647 pub const _0: Self = Self::new(0);
8648
8649 #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Signal."]
8650 pub const _1: Self = Self::new(1);
8651 }
8652 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8653 pub struct Rdbfie_SPEC;
8654 pub type Rdbfie = crate::EnumBitfieldStruct<u8, Rdbfie_SPEC>;
8655 impl Rdbfie {
8656 #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Signal."]
8657 pub const _0: Self = Self::new(0);
8658
8659 #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Signal."]
8660 pub const _1: Self = Self::new(1);
8661 }
8662 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8663 pub struct Cmdqeie_SPEC;
8664 pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
8665 impl Cmdqeie {
8666 #[doc = "Disables High Priority Command Buffer Empty Interrupt Signal."]
8667 pub const _0: Self = Self::new(0);
8668
8669 #[doc = "Enables High Priority Command Buffer Empty Interrupt Signal."]
8670 pub const _1: Self = Self::new(1);
8671 }
8672 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8673 pub struct Rspqfie_SPEC;
8674 pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
8675 impl Rspqfie {
8676 #[doc = "Disables High Priority Response Buffer Full Interrupt Signal."]
8677 pub const _0: Self = Self::new(0);
8678
8679 #[doc = "Enables High Priority Response Buffer Full Interrupt Signal."]
8680 pub const _1: Self = Self::new(1);
8681 }
8682 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8683 pub struct Tabtie_SPEC;
8684 pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
8685 impl Tabtie {
8686 #[doc = "Disables High Priority Transfer Abort interrupt Signal."]
8687 pub const _0: Self = Self::new(0);
8688
8689 #[doc = "Enables High Priority Transfer Abort interrupt Signal."]
8690 pub const _1: Self = Self::new(1);
8691 }
8692 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8693 pub struct Teie_SPEC;
8694 pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
8695 impl Teie {
8696 #[doc = "Disables High Priority Transfer Error Interrupt Signal."]
8697 pub const _0: Self = Self::new(0);
8698
8699 #[doc = "Enables High Priority Transfer Error Interrupt Signal."]
8700 pub const _1: Self = Self::new(1);
8701 }
8702}
8703#[doc(hidden)]
8704#[derive(Copy, Clone, Eq, PartialEq)]
8705pub struct Htstfc_SPEC;
8706impl crate::sealed::RegSpec for Htstfc_SPEC {
8707 type DataType = u32;
8708}
8709
8710#[doc = "High Priority Transfer Status Force Register"]
8711pub type Htstfc = crate::RegValueT<Htstfc_SPEC>;
8712
8713impl Htstfc {
8714 #[doc = "High Priority Transmit Data Buffer Empty Force"]
8715 #[inline(always)]
8716 pub fn tdbefc(
8717 self,
8718 ) -> crate::common::RegisterField<
8719 0,
8720 0x1,
8721 1,
8722 0,
8723 htstfc::Tdbefc,
8724 htstfc::Tdbefc,
8725 Htstfc_SPEC,
8726 crate::common::W,
8727 > {
8728 crate::common::RegisterField::<
8729 0,
8730 0x1,
8731 1,
8732 0,
8733 htstfc::Tdbefc,
8734 htstfc::Tdbefc,
8735 Htstfc_SPEC,
8736 crate::common::W,
8737 >::from_register(self, 0)
8738 }
8739
8740 #[doc = "High Priority Receive Data Buffer Full Force"]
8741 #[inline(always)]
8742 pub fn rdbffc(
8743 self,
8744 ) -> crate::common::RegisterField<
8745 1,
8746 0x1,
8747 1,
8748 0,
8749 htstfc::Rdbffc,
8750 htstfc::Rdbffc,
8751 Htstfc_SPEC,
8752 crate::common::W,
8753 > {
8754 crate::common::RegisterField::<
8755 1,
8756 0x1,
8757 1,
8758 0,
8759 htstfc::Rdbffc,
8760 htstfc::Rdbffc,
8761 Htstfc_SPEC,
8762 crate::common::W,
8763 >::from_register(self, 0)
8764 }
8765
8766 #[doc = "High Priority Command Queue Empty Force"]
8767 #[inline(always)]
8768 pub fn cmdqefc(
8769 self,
8770 ) -> crate::common::RegisterField<
8771 3,
8772 0x1,
8773 1,
8774 0,
8775 htstfc::Cmdqefc,
8776 htstfc::Cmdqefc,
8777 Htstfc_SPEC,
8778 crate::common::W,
8779 > {
8780 crate::common::RegisterField::<
8781 3,
8782 0x1,
8783 1,
8784 0,
8785 htstfc::Cmdqefc,
8786 htstfc::Cmdqefc,
8787 Htstfc_SPEC,
8788 crate::common::W,
8789 >::from_register(self, 0)
8790 }
8791
8792 #[doc = "High Priority Response Queue Full Force"]
8793 #[inline(always)]
8794 pub fn rspqffc(
8795 self,
8796 ) -> crate::common::RegisterField<
8797 4,
8798 0x1,
8799 1,
8800 0,
8801 htstfc::Rspqffc,
8802 htstfc::Rspqffc,
8803 Htstfc_SPEC,
8804 crate::common::W,
8805 > {
8806 crate::common::RegisterField::<
8807 4,
8808 0x1,
8809 1,
8810 0,
8811 htstfc::Rspqffc,
8812 htstfc::Rspqffc,
8813 Htstfc_SPEC,
8814 crate::common::W,
8815 >::from_register(self, 0)
8816 }
8817
8818 #[doc = "High Priority Transfer Abort Force"]
8819 #[inline(always)]
8820 pub fn tabtfc(
8821 self,
8822 ) -> crate::common::RegisterField<
8823 5,
8824 0x1,
8825 1,
8826 0,
8827 htstfc::Tabtfc,
8828 htstfc::Tabtfc,
8829 Htstfc_SPEC,
8830 crate::common::W,
8831 > {
8832 crate::common::RegisterField::<
8833 5,
8834 0x1,
8835 1,
8836 0,
8837 htstfc::Tabtfc,
8838 htstfc::Tabtfc,
8839 Htstfc_SPEC,
8840 crate::common::W,
8841 >::from_register(self, 0)
8842 }
8843
8844 #[doc = "High Priority Transfer Error Force"]
8845 #[inline(always)]
8846 pub fn tefc(
8847 self,
8848 ) -> crate::common::RegisterField<
8849 9,
8850 0x1,
8851 1,
8852 0,
8853 htstfc::Tefc,
8854 htstfc::Tefc,
8855 Htstfc_SPEC,
8856 crate::common::W,
8857 > {
8858 crate::common::RegisterField::<
8859 9,
8860 0x1,
8861 1,
8862 0,
8863 htstfc::Tefc,
8864 htstfc::Tefc,
8865 Htstfc_SPEC,
8866 crate::common::W,
8867 >::from_register(self, 0)
8868 }
8869}
8870impl ::core::default::Default for Htstfc {
8871 #[inline(always)]
8872 fn default() -> Htstfc {
8873 <crate::RegValueT<Htstfc_SPEC> as RegisterValue<_>>::new(0)
8874 }
8875}
8876pub mod htstfc {
8877
8878 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8879 pub struct Tdbefc_SPEC;
8880 pub type Tdbefc = crate::EnumBitfieldStruct<u8, Tdbefc_SPEC>;
8881 impl Tdbefc {
8882 #[doc = "Not Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
8883 pub const _0: Self = Self::new(0);
8884
8885 #[doc = "Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
8886 pub const _1: Self = Self::new(1);
8887 }
8888 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8889 pub struct Rdbffc_SPEC;
8890 pub type Rdbffc = crate::EnumBitfieldStruct<u8, Rdbffc_SPEC>;
8891 impl Rdbffc {
8892 #[doc = "Not Force High Priority Receive Data Buffer Full Interrupt for software testing."]
8893 pub const _0: Self = Self::new(0);
8894
8895 #[doc = "Force High Priority Receive Data Buffer Full Interrupt for software testing."]
8896 pub const _1: Self = Self::new(1);
8897 }
8898 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8899 pub struct Cmdqefc_SPEC;
8900 pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
8901 impl Cmdqefc {
8902 #[doc = "Not Force High Priority Command Buffer Empty Interrupt for software testing."]
8903 pub const _0: Self = Self::new(0);
8904
8905 #[doc = "Force High Priority Command Buffer Empty Interrupt for software testing."]
8906 pub const _1: Self = Self::new(1);
8907 }
8908 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8909 pub struct Rspqffc_SPEC;
8910 pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
8911 impl Rspqffc {
8912 #[doc = "Not Force High Priority Response Buffer Full Interrupt for software testing."]
8913 pub const _0: Self = Self::new(0);
8914
8915 #[doc = "Force High Priority Response Buffer Full Interrupt for software testing."]
8916 pub const _1: Self = Self::new(1);
8917 }
8918 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8919 pub struct Tabtfc_SPEC;
8920 pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
8921 impl Tabtfc {
8922 #[doc = "Not Force High Priority Transfer Abort Interrupt for software testing."]
8923 pub const _0: Self = Self::new(0);
8924
8925 #[doc = "Force High Priority Transfer Abort Interrupt for software testing."]
8926 pub const _1: Self = Self::new(1);
8927 }
8928 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8929 pub struct Tefc_SPEC;
8930 pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
8931 impl Tefc {
8932 #[doc = "Not Force High Priority Transfer Error Interrupt for software testing."]
8933 pub const _0: Self = Self::new(0);
8934
8935 #[doc = "Force High Priority Transfer Error Interrupt for software testing."]
8936 pub const _1: Self = Self::new(1);
8937 }
8938}
8939#[doc(hidden)]
8940#[derive(Copy, Clone, Eq, PartialEq)]
8941pub struct Bcst_SPEC;
8942impl crate::sealed::RegSpec for Bcst_SPEC {
8943 type DataType = u32;
8944}
8945
8946#[doc = "Bus Condition Status Register"]
8947pub type Bcst = crate::RegValueT<Bcst_SPEC>;
8948
8949impl Bcst {
8950 #[doc = "Bus Free Detection Flag"]
8951 #[inline(always)]
8952 pub fn bfref(
8953 self,
8954 ) -> crate::common::RegisterField<
8955 0,
8956 0x1,
8957 1,
8958 0,
8959 bcst::Bfref,
8960 bcst::Bfref,
8961 Bcst_SPEC,
8962 crate::common::R,
8963 > {
8964 crate::common::RegisterField::<
8965 0,
8966 0x1,
8967 1,
8968 0,
8969 bcst::Bfref,
8970 bcst::Bfref,
8971 Bcst_SPEC,
8972 crate::common::R,
8973 >::from_register(self, 0)
8974 }
8975
8976 #[doc = "Bus Available Detection Flag"]
8977 #[inline(always)]
8978 pub fn bavlf(
8979 self,
8980 ) -> crate::common::RegisterField<
8981 1,
8982 0x1,
8983 1,
8984 0,
8985 bcst::Bavlf,
8986 bcst::Bavlf,
8987 Bcst_SPEC,
8988 crate::common::R,
8989 > {
8990 crate::common::RegisterField::<
8991 1,
8992 0x1,
8993 1,
8994 0,
8995 bcst::Bavlf,
8996 bcst::Bavlf,
8997 Bcst_SPEC,
8998 crate::common::R,
8999 >::from_register(self, 0)
9000 }
9001
9002 #[doc = "Bus Idle Detection Flag"]
9003 #[inline(always)]
9004 pub fn bidlf(
9005 self,
9006 ) -> crate::common::RegisterField<
9007 2,
9008 0x1,
9009 1,
9010 0,
9011 bcst::Bidlf,
9012 bcst::Bidlf,
9013 Bcst_SPEC,
9014 crate::common::R,
9015 > {
9016 crate::common::RegisterField::<
9017 2,
9018 0x1,
9019 1,
9020 0,
9021 bcst::Bidlf,
9022 bcst::Bidlf,
9023 Bcst_SPEC,
9024 crate::common::R,
9025 >::from_register(self, 0)
9026 }
9027}
9028impl ::core::default::Default for Bcst {
9029 #[inline(always)]
9030 fn default() -> Bcst {
9031 <crate::RegValueT<Bcst_SPEC> as RegisterValue<_>>::new(0)
9032 }
9033}
9034pub mod bcst {
9035
9036 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9037 pub struct Bfref_SPEC;
9038 pub type Bfref = crate::EnumBitfieldStruct<u8, Bfref_SPEC>;
9039 impl Bfref {
9040 #[doc = "Have not Detected Bus Free"]
9041 pub const _0: Self = Self::new(0);
9042
9043 #[doc = "Have Detected Bus Free"]
9044 pub const _1: Self = Self::new(1);
9045 }
9046 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9047 pub struct Bavlf_SPEC;
9048 pub type Bavlf = crate::EnumBitfieldStruct<u8, Bavlf_SPEC>;
9049 impl Bavlf {
9050 #[doc = "Have not Detected Bus Available"]
9051 pub const _0: Self = Self::new(0);
9052
9053 #[doc = "Have Detected Bus Available"]
9054 pub const _1: Self = Self::new(1);
9055 }
9056 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9057 pub struct Bidlf_SPEC;
9058 pub type Bidlf = crate::EnumBitfieldStruct<u8, Bidlf_SPEC>;
9059 impl Bidlf {
9060 #[doc = "Have not Detected Bus Idle"]
9061 pub const _0: Self = Self::new(0);
9062
9063 #[doc = "Have Detected Bus Idle"]
9064 pub const _1: Self = Self::new(1);
9065 }
9066}
9067#[doc(hidden)]
9068#[derive(Copy, Clone, Eq, PartialEq)]
9069pub struct Svst_SPEC;
9070impl crate::sealed::RegSpec for Svst_SPEC {
9071 type DataType = u32;
9072}
9073
9074#[doc = "Slave Status Register"]
9075pub type Svst = crate::RegValueT<Svst_SPEC>;
9076
9077impl Svst {
9078 #[doc = "General Call Address Detection Flag"]
9079 #[inline(always)]
9080 pub fn gcaf(
9081 self,
9082 ) -> crate::common::RegisterField<
9083 0,
9084 0x1,
9085 1,
9086 0,
9087 svst::Gcaf,
9088 svst::Gcaf,
9089 Svst_SPEC,
9090 crate::common::RW,
9091 > {
9092 crate::common::RegisterField::<
9093 0,
9094 0x1,
9095 1,
9096 0,
9097 svst::Gcaf,
9098 svst::Gcaf,
9099 Svst_SPEC,
9100 crate::common::RW,
9101 >::from_register(self, 0)
9102 }
9103
9104 #[doc = "Hs-mode Master Code Detection Flag"]
9105 #[inline(always)]
9106 pub fn hsmcf(
9107 self,
9108 ) -> crate::common::RegisterField<
9109 5,
9110 0x1,
9111 1,
9112 0,
9113 svst::Hsmcf,
9114 svst::Hsmcf,
9115 Svst_SPEC,
9116 crate::common::RW,
9117 > {
9118 crate::common::RegisterField::<
9119 5,
9120 0x1,
9121 1,
9122 0,
9123 svst::Hsmcf,
9124 svst::Hsmcf,
9125 Svst_SPEC,
9126 crate::common::RW,
9127 >::from_register(self, 0)
9128 }
9129
9130 #[doc = "Device-ID Address Detection Flag"]
9131 #[inline(always)]
9132 pub fn dvidf(
9133 self,
9134 ) -> crate::common::RegisterField<
9135 6,
9136 0x1,
9137 1,
9138 0,
9139 svst::Dvidf,
9140 svst::Dvidf,
9141 Svst_SPEC,
9142 crate::common::RW,
9143 > {
9144 crate::common::RegisterField::<
9145 6,
9146 0x1,
9147 1,
9148 0,
9149 svst::Dvidf,
9150 svst::Dvidf,
9151 Svst_SPEC,
9152 crate::common::RW,
9153 >::from_register(self, 0)
9154 }
9155
9156 #[doc = "Host Address Detection Flag"]
9157 #[inline(always)]
9158 pub fn hoaf(
9159 self,
9160 ) -> crate::common::RegisterField<
9161 15,
9162 0x1,
9163 1,
9164 0,
9165 svst::Hoaf,
9166 svst::Hoaf,
9167 Svst_SPEC,
9168 crate::common::RW,
9169 > {
9170 crate::common::RegisterField::<
9171 15,
9172 0x1,
9173 1,
9174 0,
9175 svst::Hoaf,
9176 svst::Hoaf,
9177 Svst_SPEC,
9178 crate::common::RW,
9179 >::from_register(self, 0)
9180 }
9181
9182 #[doc = "Slave Address Detection Flag n ( n = 0 to 2 )"]
9183 #[inline(always)]
9184 pub fn svaf(
9185 self,
9186 ) -> crate::common::RegisterField<
9187 16,
9188 0x7,
9189 1,
9190 0,
9191 svst::Svaf,
9192 svst::Svaf,
9193 Svst_SPEC,
9194 crate::common::RW,
9195 > {
9196 crate::common::RegisterField::<
9197 16,
9198 0x7,
9199 1,
9200 0,
9201 svst::Svaf,
9202 svst::Svaf,
9203 Svst_SPEC,
9204 crate::common::RW,
9205 >::from_register(self, 0)
9206 }
9207}
9208impl ::core::default::Default for Svst {
9209 #[inline(always)]
9210 fn default() -> Svst {
9211 <crate::RegValueT<Svst_SPEC> as RegisterValue<_>>::new(0)
9212 }
9213}
9214pub mod svst {
9215
9216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9217 pub struct Gcaf_SPEC;
9218 pub type Gcaf = crate::EnumBitfieldStruct<u8, Gcaf_SPEC>;
9219 impl Gcaf {
9220 #[doc = "General call address does not detect."]
9221 pub const _0: Self = Self::new(0);
9222
9223 #[doc = "General call address detects."]
9224 pub const _1: Self = Self::new(1);
9225 }
9226 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9227 pub struct Hsmcf_SPEC;
9228 pub type Hsmcf = crate::EnumBitfieldStruct<u8, Hsmcf_SPEC>;
9229 impl Hsmcf {
9230 #[doc = "Hs-mode Master Code does not detect."]
9231 pub const _0: Self = Self::new(0);
9232
9233 #[doc = "Hs-mode Master Code detects."]
9234 pub const _1: Self = Self::new(1);
9235 }
9236 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9237 pub struct Dvidf_SPEC;
9238 pub type Dvidf = crate::EnumBitfieldStruct<u8, Dvidf_SPEC>;
9239 impl Dvidf {
9240 #[doc = "Device-ID command does not detect."]
9241 pub const _0: Self = Self::new(0);
9242
9243 #[doc = "Device-ID command detects. This bit set to 1 when the first frame received immediately after a START condition is detected matches a value of (device ID (1111 100) + 0\\[W\\])."]
9244 pub const _1: Self = Self::new(1);
9245 }
9246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9247 pub struct Hoaf_SPEC;
9248 pub type Hoaf = crate::EnumBitfieldStruct<u8, Hoaf_SPEC>;
9249 impl Hoaf {
9250 #[doc = "Host address does not detect."]
9251 pub const _0: Self = Self::new(0);
9252
9253 #[doc = "Host address detects. This bit set to 1 when the received slave address matches the host address (0001 000)."]
9254 pub const _1: Self = Self::new(1);
9255 }
9256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9257 pub struct Svaf_SPEC;
9258 pub type Svaf = crate::EnumBitfieldStruct<u8, Svaf_SPEC>;
9259 impl Svaf {
9260 #[doc = "Slave n does not detect"]
9261 pub const _0: Self = Self::new(0);
9262
9263 #[doc = "Slave n detect"]
9264 pub const _1: Self = Self::new(1);
9265 }
9266}
9267#[doc(hidden)]
9268#[derive(Copy, Clone, Eq, PartialEq)]
9269pub struct Wust_SPEC;
9270impl crate::sealed::RegSpec for Wust_SPEC {
9271 type DataType = u32;
9272}
9273
9274#[doc = "Wake Up Unit Operating Status Register"]
9275pub type Wust = crate::RegValueT<Wust_SPEC>;
9276
9277impl Wust {
9278 #[doc = "Wake-up function asynchronous operation status flag"]
9279 #[inline(always)]
9280 pub fn wuasynf(
9281 self,
9282 ) -> crate::common::RegisterField<
9283 0,
9284 0x1,
9285 1,
9286 0,
9287 wust::Wuasynf,
9288 wust::Wuasynf,
9289 Wust_SPEC,
9290 crate::common::R,
9291 > {
9292 crate::common::RegisterField::<
9293 0,
9294 0x1,
9295 1,
9296 0,
9297 wust::Wuasynf,
9298 wust::Wuasynf,
9299 Wust_SPEC,
9300 crate::common::R,
9301 >::from_register(self, 0)
9302 }
9303}
9304impl ::core::default::Default for Wust {
9305 #[inline(always)]
9306 fn default() -> Wust {
9307 <crate::RegValueT<Wust_SPEC> as RegisterValue<_>>::new(0)
9308 }
9309}
9310pub mod wust {
9311
9312 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9313 pub struct Wuasynf_SPEC;
9314 pub type Wuasynf = crate::EnumBitfieldStruct<u8, Wuasynf_SPEC>;
9315 impl Wuasynf {
9316 #[doc = "I3C synchronous circuit enable condition."]
9317 pub const _0: Self = Self::new(0);
9318
9319 #[doc = "I3C asynchronous circuit enable condition."]
9320 pub const _1: Self = Self::new(1);
9321 }
9322}
9323#[doc(hidden)]
9324#[derive(Copy, Clone, Eq, PartialEq)]
9325pub struct Mrccpt_SPEC;
9326impl crate::sealed::RegSpec for Mrccpt_SPEC {
9327 type DataType = u32;
9328}
9329
9330#[doc = "MsyncCNT Counter Capture Register"]
9331pub type Mrccpt = crate::RegValueT<Mrccpt_SPEC>;
9332
9333impl NoBitfieldReg<Mrccpt_SPEC> for Mrccpt {}
9334impl ::core::default::Default for Mrccpt {
9335 #[inline(always)]
9336 fn default() -> Mrccpt {
9337 <crate::RegValueT<Mrccpt_SPEC> as RegisterValue<_>>::new(0)
9338 }
9339}
9340
9341#[doc(hidden)]
9342#[derive(Copy, Clone, Eq, PartialEq)]
9343pub struct Datbas_SPEC;
9344impl crate::sealed::RegSpec for Datbas_SPEC {
9345 type DataType = u32;
9346}
9347
9348#[doc = "Device Address Table Basic Register %s"]
9349pub type Datbas = crate::RegValueT<Datbas_SPEC>;
9350
9351impl Datbas {
9352 #[doc = "Device Static Address"]
9353 #[inline(always)]
9354 pub fn dvstad(
9355 self,
9356 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9357 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9358 }
9359
9360 #[doc = "Device IBI Payload"]
9361 #[inline(always)]
9362 pub fn dvibipl(
9363 self,
9364 ) -> crate::common::RegisterField<
9365 12,
9366 0x1,
9367 1,
9368 0,
9369 datbas::Dvibipl,
9370 datbas::Dvibipl,
9371 Datbas_SPEC,
9372 crate::common::RW,
9373 > {
9374 crate::common::RegisterField::<
9375 12,
9376 0x1,
9377 1,
9378 0,
9379 datbas::Dvibipl,
9380 datbas::Dvibipl,
9381 Datbas_SPEC,
9382 crate::common::RW,
9383 >::from_register(self, 0)
9384 }
9385
9386 #[doc = "Device In-Band Slave Interrupt Request Reject"]
9387 #[inline(always)]
9388 pub fn dvsirrj(
9389 self,
9390 ) -> crate::common::RegisterField<
9391 13,
9392 0x1,
9393 1,
9394 0,
9395 datbas::Dvsirrj,
9396 datbas::Dvsirrj,
9397 Datbas_SPEC,
9398 crate::common::RW,
9399 > {
9400 crate::common::RegisterField::<
9401 13,
9402 0x1,
9403 1,
9404 0,
9405 datbas::Dvsirrj,
9406 datbas::Dvsirrj,
9407 Datbas_SPEC,
9408 crate::common::RW,
9409 >::from_register(self, 0)
9410 }
9411
9412 #[doc = "Device In-Band Master Request Reject"]
9413 #[inline(always)]
9414 pub fn dvmrrj(
9415 self,
9416 ) -> crate::common::RegisterField<
9417 14,
9418 0x1,
9419 1,
9420 0,
9421 datbas::Dvmrrj,
9422 datbas::Dvmrrj,
9423 Datbas_SPEC,
9424 crate::common::RW,
9425 > {
9426 crate::common::RegisterField::<
9427 14,
9428 0x1,
9429 1,
9430 0,
9431 datbas::Dvmrrj,
9432 datbas::Dvmrrj,
9433 Datbas_SPEC,
9434 crate::common::RW,
9435 >::from_register(self, 0)
9436 }
9437
9438 #[doc = "Device IBI Time-stamp"]
9439 #[inline(always)]
9440 pub fn dvibits(
9441 self,
9442 ) -> crate::common::RegisterField<
9443 15,
9444 0x1,
9445 1,
9446 0,
9447 datbas::Dvibits,
9448 datbas::Dvibits,
9449 Datbas_SPEC,
9450 crate::common::RW,
9451 > {
9452 crate::common::RegisterField::<
9453 15,
9454 0x1,
9455 1,
9456 0,
9457 datbas::Dvibits,
9458 datbas::Dvibits,
9459 Datbas_SPEC,
9460 crate::common::RW,
9461 >::from_register(self, 0)
9462 }
9463
9464 #[doc = "Device I3C Dynamic Address"]
9465 #[inline(always)]
9466 pub fn dvdyad(
9467 self,
9468 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9469 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9470 }
9471
9472 #[doc = "Device NACK Retry Count"]
9473 #[inline(always)]
9474 pub fn dvnack(
9475 self,
9476 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9477 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9478 }
9479
9480 #[doc = "Device Type"]
9481 #[inline(always)]
9482 pub fn dvtyp(
9483 self,
9484 ) -> crate::common::RegisterField<
9485 31,
9486 0x1,
9487 1,
9488 0,
9489 datbas::Dvtyp,
9490 datbas::Dvtyp,
9491 Datbas_SPEC,
9492 crate::common::RW,
9493 > {
9494 crate::common::RegisterField::<
9495 31,
9496 0x1,
9497 1,
9498 0,
9499 datbas::Dvtyp,
9500 datbas::Dvtyp,
9501 Datbas_SPEC,
9502 crate::common::RW,
9503 >::from_register(self, 0)
9504 }
9505}
9506impl ::core::default::Default for Datbas {
9507 #[inline(always)]
9508 fn default() -> Datbas {
9509 <crate::RegValueT<Datbas_SPEC> as RegisterValue<_>>::new(0)
9510 }
9511}
9512pub mod datbas {
9513
9514 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9515 pub struct Dvibipl_SPEC;
9516 pub type Dvibipl = crate::EnumBitfieldStruct<u8, Dvibipl_SPEC>;
9517 impl Dvibipl {
9518 #[doc = "IBIs from this Device do not carry a Data Payload."]
9519 pub const _0: Self = Self::new(0);
9520
9521 #[doc = "IBIs from this Device do carry a Data Payload."]
9522 pub const _1: Self = Self::new(1);
9523 }
9524 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9525 pub struct Dvsirrj_SPEC;
9526 pub type Dvsirrj = crate::EnumBitfieldStruct<u8, Dvsirrj_SPEC>;
9527 impl Dvsirrj {
9528 #[doc = "This Device shall ACK the SIR."]
9529 pub const _0: Self = Self::new(0);
9530
9531 #[doc = "This Device shall NACK the SIR and send the auto-disable CCC."]
9532 pub const _1: Self = Self::new(1);
9533 }
9534 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9535 pub struct Dvmrrj_SPEC;
9536 pub type Dvmrrj = crate::EnumBitfieldStruct<u8, Dvmrrj_SPEC>;
9537 impl Dvmrrj {
9538 #[doc = "This Device shall ACK Master Requests."]
9539 pub const _0: Self = Self::new(0);
9540
9541 #[doc = "This Device shall NACK Master Requests and send the auto-disable command."]
9542 pub const _1: Self = Self::new(1);
9543 }
9544 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9545 pub struct Dvibits_SPEC;
9546 pub type Dvibits = crate::EnumBitfieldStruct<u8, Dvibits_SPEC>;
9547 impl Dvibits {
9548 #[doc = "The Master shall not time-stamp IBIs from this Device with Master Time-stamps."]
9549 pub const _0: Self = Self::new(0);
9550
9551 #[doc = "The Master shall time-stamp IBIs for this Device with Master Time-stamps."]
9552 pub const _1: Self = Self::new(1);
9553 }
9554 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9555 pub struct Dvtyp_SPEC;
9556 pub type Dvtyp = crate::EnumBitfieldStruct<u8, Dvtyp_SPEC>;
9557 impl Dvtyp {
9558 #[doc = "I3C Device"]
9559 pub const _0: Self = Self::new(0);
9560
9561 #[doc = "I2C Device"]
9562 pub const _1: Self = Self::new(1);
9563 }
9564}
9565#[doc(hidden)]
9566#[derive(Copy, Clone, Eq, PartialEq)]
9567pub struct Exdatbas_SPEC;
9568impl crate::sealed::RegSpec for Exdatbas_SPEC {
9569 type DataType = u32;
9570}
9571
9572#[doc = "Extended Device Address Table Basic Register"]
9573pub type Exdatbas = crate::RegValueT<Exdatbas_SPEC>;
9574
9575impl Exdatbas {
9576 #[doc = "Extended Device Static Address"]
9577 #[inline(always)]
9578 pub fn edstad(
9579 self,
9580 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
9581 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9582 }
9583
9584 #[doc = "Extended Device I3C Dynamic Address"]
9585 #[inline(always)]
9586 pub fn eddyad(
9587 self,
9588 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW>
9589 {
9590 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9591 }
9592
9593 #[doc = "Extended Device NACK Retry Count"]
9594 #[inline(always)]
9595 pub fn ednack(
9596 self,
9597 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
9598 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9599 }
9600
9601 #[doc = "Extended Device Type"]
9602 #[inline(always)]
9603 pub fn edtyp(
9604 self,
9605 ) -> crate::common::RegisterField<
9606 31,
9607 0x1,
9608 1,
9609 0,
9610 exdatbas::Edtyp,
9611 exdatbas::Edtyp,
9612 Exdatbas_SPEC,
9613 crate::common::RW,
9614 > {
9615 crate::common::RegisterField::<
9616 31,
9617 0x1,
9618 1,
9619 0,
9620 exdatbas::Edtyp,
9621 exdatbas::Edtyp,
9622 Exdatbas_SPEC,
9623 crate::common::RW,
9624 >::from_register(self, 0)
9625 }
9626}
9627impl ::core::default::Default for Exdatbas {
9628 #[inline(always)]
9629 fn default() -> Exdatbas {
9630 <crate::RegValueT<Exdatbas_SPEC> as RegisterValue<_>>::new(0)
9631 }
9632}
9633pub mod exdatbas {
9634
9635 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9636 pub struct Edtyp_SPEC;
9637 pub type Edtyp = crate::EnumBitfieldStruct<u8, Edtyp_SPEC>;
9638 impl Edtyp {
9639 #[doc = "I3C Device"]
9640 pub const _0: Self = Self::new(0);
9641
9642 #[doc = "I2C Device"]
9643 pub const _1: Self = Self::new(1);
9644 }
9645}
9646#[doc(hidden)]
9647#[derive(Copy, Clone, Eq, PartialEq)]
9648pub struct Sdatbas0_SPEC;
9649impl crate::sealed::RegSpec for Sdatbas0_SPEC {
9650 type DataType = u32;
9651}
9652
9653#[doc = "Slave Device Address Table Basic Register 0"]
9654pub type Sdatbas0 = crate::RegValueT<Sdatbas0_SPEC>;
9655
9656impl Sdatbas0 {
9657 #[doc = "Slave Device Static Address"]
9658 #[inline(always)]
9659 pub fn sdstad(
9660 self,
9661 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas0_SPEC, crate::common::RW>
9662 {
9663 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
9664 }
9665
9666 #[doc = "Slave Device Address Length Selection"]
9667 #[inline(always)]
9668 pub fn sdadls(
9669 self,
9670 ) -> crate::common::RegisterField<
9671 10,
9672 0x1,
9673 1,
9674 0,
9675 sdatbas0::Sdadls,
9676 sdatbas0::Sdadls,
9677 Sdatbas0_SPEC,
9678 crate::common::RW,
9679 > {
9680 crate::common::RegisterField::<
9681 10,
9682 0x1,
9683 1,
9684 0,
9685 sdatbas0::Sdadls,
9686 sdatbas0::Sdadls,
9687 Sdatbas0_SPEC,
9688 crate::common::RW,
9689 >::from_register(self, 0)
9690 }
9691
9692 #[doc = "Slave Device IBI Payload"]
9693 #[inline(always)]
9694 pub fn sdibipl(
9695 self,
9696 ) -> crate::common::RegisterField<
9697 12,
9698 0x1,
9699 1,
9700 0,
9701 sdatbas0::Sdibipl,
9702 sdatbas0::Sdibipl,
9703 Sdatbas0_SPEC,
9704 crate::common::RW,
9705 > {
9706 crate::common::RegisterField::<
9707 12,
9708 0x1,
9709 1,
9710 0,
9711 sdatbas0::Sdibipl,
9712 sdatbas0::Sdibipl,
9713 Sdatbas0_SPEC,
9714 crate::common::RW,
9715 >::from_register(self, 0)
9716 }
9717
9718 #[doc = "Slave Device I3C Dynamic Address"]
9719 #[inline(always)]
9720 pub fn sddyad(
9721 self,
9722 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas0_SPEC, crate::common::RW>
9723 {
9724 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
9725 }
9726}
9727impl ::core::default::Default for Sdatbas0 {
9728 #[inline(always)]
9729 fn default() -> Sdatbas0 {
9730 <crate::RegValueT<Sdatbas0_SPEC> as RegisterValue<_>>::new(0)
9731 }
9732}
9733pub mod sdatbas0 {
9734
9735 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9736 pub struct Sdadls_SPEC;
9737 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9738 impl Sdadls {
9739 #[doc = "Slave device address length 7 bits selected."]
9740 pub const _0: Self = Self::new(0);
9741
9742 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9743 pub const _1: Self = Self::new(1);
9744 }
9745 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9746 pub struct Sdibipl_SPEC;
9747 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9748 impl Sdibipl {
9749 #[doc = "IBIs from this device do not carry a data payload."]
9750 pub const _0: Self = Self::new(0);
9751
9752 #[doc = "IBIs from this device carry a data payload."]
9753 pub const _1: Self = Self::new(1);
9754 }
9755}
9756#[doc(hidden)]
9757#[derive(Copy, Clone, Eq, PartialEq)]
9758pub struct Sdatbas1_SPEC;
9759impl crate::sealed::RegSpec for Sdatbas1_SPEC {
9760 type DataType = u32;
9761}
9762
9763#[doc = "Slave Device Address Table Basic Register 1"]
9764pub type Sdatbas1 = crate::RegValueT<Sdatbas1_SPEC>;
9765
9766impl Sdatbas1 {
9767 #[doc = "Slave Device Static Address"]
9768 #[inline(always)]
9769 pub fn sdstad(
9770 self,
9771 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas1_SPEC, crate::common::RW>
9772 {
9773 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
9774 }
9775
9776 #[doc = "Slave Device Address Length Selection"]
9777 #[inline(always)]
9778 pub fn sdadls(
9779 self,
9780 ) -> crate::common::RegisterField<
9781 10,
9782 0x1,
9783 1,
9784 0,
9785 sdatbas1::Sdadls,
9786 sdatbas1::Sdadls,
9787 Sdatbas1_SPEC,
9788 crate::common::RW,
9789 > {
9790 crate::common::RegisterField::<
9791 10,
9792 0x1,
9793 1,
9794 0,
9795 sdatbas1::Sdadls,
9796 sdatbas1::Sdadls,
9797 Sdatbas1_SPEC,
9798 crate::common::RW,
9799 >::from_register(self, 0)
9800 }
9801
9802 #[doc = "Slave Device IBI Payload"]
9803 #[inline(always)]
9804 pub fn sdibipl(
9805 self,
9806 ) -> crate::common::RegisterField<
9807 12,
9808 0x1,
9809 1,
9810 0,
9811 sdatbas1::Sdibipl,
9812 sdatbas1::Sdibipl,
9813 Sdatbas1_SPEC,
9814 crate::common::RW,
9815 > {
9816 crate::common::RegisterField::<
9817 12,
9818 0x1,
9819 1,
9820 0,
9821 sdatbas1::Sdibipl,
9822 sdatbas1::Sdibipl,
9823 Sdatbas1_SPEC,
9824 crate::common::RW,
9825 >::from_register(self, 0)
9826 }
9827
9828 #[doc = "Slave Device I3C Dynamic Address"]
9829 #[inline(always)]
9830 pub fn sddyad(
9831 self,
9832 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas1_SPEC, crate::common::RW>
9833 {
9834 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
9835 }
9836}
9837impl ::core::default::Default for Sdatbas1 {
9838 #[inline(always)]
9839 fn default() -> Sdatbas1 {
9840 <crate::RegValueT<Sdatbas1_SPEC> as RegisterValue<_>>::new(0)
9841 }
9842}
9843pub mod sdatbas1 {
9844
9845 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9846 pub struct Sdadls_SPEC;
9847 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9848 impl Sdadls {
9849 #[doc = "Slave device address length 7 bits selected."]
9850 pub const _0: Self = Self::new(0);
9851
9852 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9853 pub const _1: Self = Self::new(1);
9854 }
9855 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9856 pub struct Sdibipl_SPEC;
9857 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9858 impl Sdibipl {
9859 #[doc = "IBIs from this device do not carry a data payload."]
9860 pub const _0: Self = Self::new(0);
9861
9862 #[doc = "IBIs from this device carry a data payload."]
9863 pub const _1: Self = Self::new(1);
9864 }
9865}
9866#[doc(hidden)]
9867#[derive(Copy, Clone, Eq, PartialEq)]
9868pub struct Sdatbas2_SPEC;
9869impl crate::sealed::RegSpec for Sdatbas2_SPEC {
9870 type DataType = u32;
9871}
9872
9873#[doc = "Slave Device Address Table Basic Register 2"]
9874pub type Sdatbas2 = crate::RegValueT<Sdatbas2_SPEC>;
9875
9876impl Sdatbas2 {
9877 #[doc = "Slave Device Static Address"]
9878 #[inline(always)]
9879 pub fn sdstad(
9880 self,
9881 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas2_SPEC, crate::common::RW>
9882 {
9883 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
9884 }
9885
9886 #[doc = "Slave Device Address Length Selection"]
9887 #[inline(always)]
9888 pub fn sdadls(
9889 self,
9890 ) -> crate::common::RegisterField<
9891 10,
9892 0x1,
9893 1,
9894 0,
9895 sdatbas2::Sdadls,
9896 sdatbas2::Sdadls,
9897 Sdatbas2_SPEC,
9898 crate::common::RW,
9899 > {
9900 crate::common::RegisterField::<
9901 10,
9902 0x1,
9903 1,
9904 0,
9905 sdatbas2::Sdadls,
9906 sdatbas2::Sdadls,
9907 Sdatbas2_SPEC,
9908 crate::common::RW,
9909 >::from_register(self, 0)
9910 }
9911
9912 #[doc = "Slave Device IBI Payload"]
9913 #[inline(always)]
9914 pub fn sdibipl(
9915 self,
9916 ) -> crate::common::RegisterField<
9917 12,
9918 0x1,
9919 1,
9920 0,
9921 sdatbas2::Sdibipl,
9922 sdatbas2::Sdibipl,
9923 Sdatbas2_SPEC,
9924 crate::common::RW,
9925 > {
9926 crate::common::RegisterField::<
9927 12,
9928 0x1,
9929 1,
9930 0,
9931 sdatbas2::Sdibipl,
9932 sdatbas2::Sdibipl,
9933 Sdatbas2_SPEC,
9934 crate::common::RW,
9935 >::from_register(self, 0)
9936 }
9937
9938 #[doc = "Slave Device I3C Dynamic Address"]
9939 #[inline(always)]
9940 pub fn sddyad(
9941 self,
9942 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas2_SPEC, crate::common::RW>
9943 {
9944 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
9945 }
9946}
9947impl ::core::default::Default for Sdatbas2 {
9948 #[inline(always)]
9949 fn default() -> Sdatbas2 {
9950 <crate::RegValueT<Sdatbas2_SPEC> as RegisterValue<_>>::new(0)
9951 }
9952}
9953pub mod sdatbas2 {
9954
9955 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9956 pub struct Sdadls_SPEC;
9957 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9958 impl Sdadls {
9959 #[doc = "Slave device address length 7 bits selected."]
9960 pub const _0: Self = Self::new(0);
9961
9962 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9963 pub const _1: Self = Self::new(1);
9964 }
9965 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9966 pub struct Sdibipl_SPEC;
9967 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9968 impl Sdibipl {
9969 #[doc = "IBIs from this device do not carry a data payload."]
9970 pub const _0: Self = Self::new(0);
9971
9972 #[doc = "IBIs from this device carry a data payload."]
9973 pub const _1: Self = Self::new(1);
9974 }
9975}
9976#[doc(hidden)]
9977#[derive(Copy, Clone, Eq, PartialEq)]
9978pub struct Msdct_SPEC;
9979impl crate::sealed::RegSpec for Msdct_SPEC {
9980 type DataType = u32;
9981}
9982
9983#[doc = "Master Device Characteristic Table Register %s"]
9984pub type Msdct = crate::RegValueT<Msdct_SPEC>;
9985
9986impl Msdct {
9987 #[doc = "Max Data Speed Limitation"]
9988 #[inline(always)]
9989 pub fn rbcr0(
9990 self,
9991 ) -> crate::common::RegisterField<
9992 8,
9993 0x1,
9994 1,
9995 0,
9996 msdct::Rbcr0,
9997 msdct::Rbcr0,
9998 Msdct_SPEC,
9999 crate::common::RW,
10000 > {
10001 crate::common::RegisterField::<
10002 8,
10003 0x1,
10004 1,
10005 0,
10006 msdct::Rbcr0,
10007 msdct::Rbcr0,
10008 Msdct_SPEC,
10009 crate::common::RW,
10010 >::from_register(self, 0)
10011 }
10012
10013 #[doc = "IBI Request Capable"]
10014 #[inline(always)]
10015 pub fn rbcr1(
10016 self,
10017 ) -> crate::common::RegisterField<
10018 9,
10019 0x1,
10020 1,
10021 0,
10022 msdct::Rbcr1,
10023 msdct::Rbcr1,
10024 Msdct_SPEC,
10025 crate::common::RW,
10026 > {
10027 crate::common::RegisterField::<
10028 9,
10029 0x1,
10030 1,
10031 0,
10032 msdct::Rbcr1,
10033 msdct::Rbcr1,
10034 Msdct_SPEC,
10035 crate::common::RW,
10036 >::from_register(self, 0)
10037 }
10038
10039 #[doc = "IBI Payload"]
10040 #[inline(always)]
10041 pub fn rbcr2(
10042 self,
10043 ) -> crate::common::RegisterField<
10044 10,
10045 0x1,
10046 1,
10047 0,
10048 msdct::Rbcr2,
10049 msdct::Rbcr2,
10050 Msdct_SPEC,
10051 crate::common::RW,
10052 > {
10053 crate::common::RegisterField::<
10054 10,
10055 0x1,
10056 1,
10057 0,
10058 msdct::Rbcr2,
10059 msdct::Rbcr2,
10060 Msdct_SPEC,
10061 crate::common::RW,
10062 >::from_register(self, 0)
10063 }
10064
10065 #[doc = "Offline Capable"]
10066 #[inline(always)]
10067 pub fn rbcr3(
10068 self,
10069 ) -> crate::common::RegisterField<
10070 11,
10071 0x1,
10072 1,
10073 0,
10074 msdct::Rbcr3,
10075 msdct::Rbcr3,
10076 Msdct_SPEC,
10077 crate::common::RW,
10078 > {
10079 crate::common::RegisterField::<
10080 11,
10081 0x1,
10082 1,
10083 0,
10084 msdct::Rbcr3,
10085 msdct::Rbcr3,
10086 Msdct_SPEC,
10087 crate::common::RW,
10088 >::from_register(self, 0)
10089 }
10090
10091 #[doc = "Bridge Identifier"]
10092 #[inline(always)]
10093 pub fn rbcr4(
10094 self,
10095 ) -> crate::common::RegisterField<
10096 12,
10097 0x1,
10098 1,
10099 0,
10100 msdct::Rbcr4,
10101 msdct::Rbcr4,
10102 Msdct_SPEC,
10103 crate::common::RW,
10104 > {
10105 crate::common::RegisterField::<
10106 12,
10107 0x1,
10108 1,
10109 0,
10110 msdct::Rbcr4,
10111 msdct::Rbcr4,
10112 Msdct_SPEC,
10113 crate::common::RW,
10114 >::from_register(self, 0)
10115 }
10116
10117 #[doc = "Device Role"]
10118 #[inline(always)]
10119 pub fn rbcr76(
10120 self,
10121 ) -> crate::common::RegisterField<
10122 14,
10123 0x3,
10124 1,
10125 0,
10126 msdct::Rbcr76,
10127 msdct::Rbcr76,
10128 Msdct_SPEC,
10129 crate::common::RW,
10130 > {
10131 crate::common::RegisterField::<
10132 14,
10133 0x3,
10134 1,
10135 0,
10136 msdct::Rbcr76,
10137 msdct::Rbcr76,
10138 Msdct_SPEC,
10139 crate::common::RW,
10140 >::from_register(self, 0)
10141 }
10142}
10143impl ::core::default::Default for Msdct {
10144 #[inline(always)]
10145 fn default() -> Msdct {
10146 <crate::RegValueT<Msdct_SPEC> as RegisterValue<_>>::new(0)
10147 }
10148}
10149pub mod msdct {
10150
10151 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10152 pub struct Rbcr0_SPEC;
10153 pub type Rbcr0 = crate::EnumBitfieldStruct<u8, Rbcr0_SPEC>;
10154 impl Rbcr0 {
10155 #[doc = "No Limitation"]
10156 pub const _0: Self = Self::new(0);
10157
10158 #[doc = "Limitation"]
10159 pub const _1: Self = Self::new(1);
10160 }
10161 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10162 pub struct Rbcr1_SPEC;
10163 pub type Rbcr1 = crate::EnumBitfieldStruct<u8, Rbcr1_SPEC>;
10164 impl Rbcr1 {
10165 #[doc = "Not Capable"]
10166 pub const _0: Self = Self::new(0);
10167
10168 #[doc = "Capable"]
10169 pub const _1: Self = Self::new(1);
10170 }
10171 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10172 pub struct Rbcr2_SPEC;
10173 pub type Rbcr2 = crate::EnumBitfieldStruct<u8, Rbcr2_SPEC>;
10174 impl Rbcr2 {
10175 #[doc = "No data byte follows the accepted IBI."]
10176 pub const _0: Self = Self::new(0);
10177
10178 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
10179 pub const _1: Self = Self::new(1);
10180 }
10181 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10182 pub struct Rbcr3_SPEC;
10183 pub type Rbcr3 = crate::EnumBitfieldStruct<u8, Rbcr3_SPEC>;
10184 impl Rbcr3 {
10185 #[doc = "Device will always respond to I3C bus commands."]
10186 pub const _0: Self = Self::new(0);
10187
10188 #[doc = "Device will not always respond to I3C bus commands."]
10189 pub const _1: Self = Self::new(1);
10190 }
10191 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10192 pub struct Rbcr4_SPEC;
10193 pub type Rbcr4 = crate::EnumBitfieldStruct<u8, Rbcr4_SPEC>;
10194 impl Rbcr4 {
10195 #[doc = "Not a Bridge Device"]
10196 pub const _0: Self = Self::new(0);
10197
10198 #[doc = "A Bridge Device"]
10199 pub const _1: Self = Self::new(1);
10200 }
10201 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10202 pub struct Rbcr76_SPEC;
10203 pub type Rbcr76 = crate::EnumBitfieldStruct<u8, Rbcr76_SPEC>;
10204 impl Rbcr76 {
10205 #[doc = "I3C Slave"]
10206 pub const _00: Self = Self::new(0);
10207
10208 #[doc = "I3C Master"]
10209 pub const _01: Self = Self::new(1);
10210
10211 #[doc = "Setting prohibited"]
10212 pub const OTHERS: Self = Self::new(0);
10213 }
10214}
10215#[doc(hidden)]
10216#[derive(Copy, Clone, Eq, PartialEq)]
10217pub struct Svdct_SPEC;
10218impl crate::sealed::RegSpec for Svdct_SPEC {
10219 type DataType = u32;
10220}
10221
10222#[doc = "Slave Device Characteristic Table Register"]
10223pub type Svdct = crate::RegValueT<Svdct_SPEC>;
10224
10225impl Svdct {
10226 #[doc = "Transfar Device Characteristic Register"]
10227 #[inline(always)]
10228 pub fn tdcr(
10229 self,
10230 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Svdct_SPEC, crate::common::RW> {
10231 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Svdct_SPEC,crate::common::RW>::from_register(self,0)
10232 }
10233
10234 #[doc = "Max Data Speed Limitation"]
10235 #[inline(always)]
10236 pub fn tbcr0(
10237 self,
10238 ) -> crate::common::RegisterField<
10239 8,
10240 0x1,
10241 1,
10242 0,
10243 svdct::Tbcr0,
10244 svdct::Tbcr0,
10245 Svdct_SPEC,
10246 crate::common::RW,
10247 > {
10248 crate::common::RegisterField::<
10249 8,
10250 0x1,
10251 1,
10252 0,
10253 svdct::Tbcr0,
10254 svdct::Tbcr0,
10255 Svdct_SPEC,
10256 crate::common::RW,
10257 >::from_register(self, 0)
10258 }
10259
10260 #[doc = "IBI Request Capable"]
10261 #[inline(always)]
10262 pub fn tbcr1(
10263 self,
10264 ) -> crate::common::RegisterField<
10265 9,
10266 0x1,
10267 1,
10268 0,
10269 svdct::Tbcr1,
10270 svdct::Tbcr1,
10271 Svdct_SPEC,
10272 crate::common::RW,
10273 > {
10274 crate::common::RegisterField::<
10275 9,
10276 0x1,
10277 1,
10278 0,
10279 svdct::Tbcr1,
10280 svdct::Tbcr1,
10281 Svdct_SPEC,
10282 crate::common::RW,
10283 >::from_register(self, 0)
10284 }
10285
10286 #[doc = "IBI Payload"]
10287 #[inline(always)]
10288 pub fn tbcr2(
10289 self,
10290 ) -> crate::common::RegisterField<
10291 10,
10292 0x1,
10293 1,
10294 0,
10295 svdct::Tbcr2,
10296 svdct::Tbcr2,
10297 Svdct_SPEC,
10298 crate::common::RW,
10299 > {
10300 crate::common::RegisterField::<
10301 10,
10302 0x1,
10303 1,
10304 0,
10305 svdct::Tbcr2,
10306 svdct::Tbcr2,
10307 Svdct_SPEC,
10308 crate::common::RW,
10309 >::from_register(self, 0)
10310 }
10311
10312 #[doc = "Offline Capable"]
10313 #[inline(always)]
10314 pub fn tbcr3(
10315 self,
10316 ) -> crate::common::RegisterField<
10317 11,
10318 0x1,
10319 1,
10320 0,
10321 svdct::Tbcr3,
10322 svdct::Tbcr3,
10323 Svdct_SPEC,
10324 crate::common::RW,
10325 > {
10326 crate::common::RegisterField::<
10327 11,
10328 0x1,
10329 1,
10330 0,
10331 svdct::Tbcr3,
10332 svdct::Tbcr3,
10333 Svdct_SPEC,
10334 crate::common::RW,
10335 >::from_register(self, 0)
10336 }
10337
10338 #[doc = "Bridge Identifier"]
10339 #[inline(always)]
10340 pub fn tbcr4(
10341 self,
10342 ) -> crate::common::RegisterField<
10343 12,
10344 0x1,
10345 1,
10346 0,
10347 svdct::Tbcr4,
10348 svdct::Tbcr4,
10349 Svdct_SPEC,
10350 crate::common::RW,
10351 > {
10352 crate::common::RegisterField::<
10353 12,
10354 0x1,
10355 1,
10356 0,
10357 svdct::Tbcr4,
10358 svdct::Tbcr4,
10359 Svdct_SPEC,
10360 crate::common::RW,
10361 >::from_register(self, 0)
10362 }
10363
10364 #[doc = "Device Role"]
10365 #[inline(always)]
10366 pub fn tbcr76(
10367 self,
10368 ) -> crate::common::RegisterField<
10369 14,
10370 0x3,
10371 1,
10372 0,
10373 svdct::Tbcr76,
10374 svdct::Tbcr76,
10375 Svdct_SPEC,
10376 crate::common::RW,
10377 > {
10378 crate::common::RegisterField::<
10379 14,
10380 0x3,
10381 1,
10382 0,
10383 svdct::Tbcr76,
10384 svdct::Tbcr76,
10385 Svdct_SPEC,
10386 crate::common::RW,
10387 >::from_register(self, 0)
10388 }
10389}
10390impl ::core::default::Default for Svdct {
10391 #[inline(always)]
10392 fn default() -> Svdct {
10393 <crate::RegValueT<Svdct_SPEC> as RegisterValue<_>>::new(0)
10394 }
10395}
10396pub mod svdct {
10397
10398 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10399 pub struct Tbcr0_SPEC;
10400 pub type Tbcr0 = crate::EnumBitfieldStruct<u8, Tbcr0_SPEC>;
10401 impl Tbcr0 {
10402 #[doc = "No Limitation"]
10403 pub const _0: Self = Self::new(0);
10404
10405 #[doc = "Limitation"]
10406 pub const _1: Self = Self::new(1);
10407 }
10408 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10409 pub struct Tbcr1_SPEC;
10410 pub type Tbcr1 = crate::EnumBitfieldStruct<u8, Tbcr1_SPEC>;
10411 impl Tbcr1 {
10412 #[doc = "Not Capable"]
10413 pub const _0: Self = Self::new(0);
10414
10415 #[doc = "Capable"]
10416 pub const _1: Self = Self::new(1);
10417 }
10418 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10419 pub struct Tbcr2_SPEC;
10420 pub type Tbcr2 = crate::EnumBitfieldStruct<u8, Tbcr2_SPEC>;
10421 impl Tbcr2 {
10422 #[doc = "No data byte follows the accepted IBI."]
10423 pub const _0: Self = Self::new(0);
10424
10425 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
10426 pub const _1: Self = Self::new(1);
10427 }
10428 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10429 pub struct Tbcr3_SPEC;
10430 pub type Tbcr3 = crate::EnumBitfieldStruct<u8, Tbcr3_SPEC>;
10431 impl Tbcr3 {
10432 #[doc = "Device will always respond to I3C bus commands."]
10433 pub const _0: Self = Self::new(0);
10434
10435 #[doc = "Device will not always respond to I3C bus commands."]
10436 pub const _1: Self = Self::new(1);
10437 }
10438 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10439 pub struct Tbcr4_SPEC;
10440 pub type Tbcr4 = crate::EnumBitfieldStruct<u8, Tbcr4_SPEC>;
10441 impl Tbcr4 {
10442 #[doc = "Not a Bridge Device"]
10443 pub const _0: Self = Self::new(0);
10444
10445 #[doc = "A Bridge Device"]
10446 pub const _1: Self = Self::new(1);
10447 }
10448 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10449 pub struct Tbcr76_SPEC;
10450 pub type Tbcr76 = crate::EnumBitfieldStruct<u8, Tbcr76_SPEC>;
10451 impl Tbcr76 {
10452 #[doc = "I3C Slave"]
10453 pub const _00: Self = Self::new(0);
10454
10455 #[doc = "I3C Master"]
10456 pub const _01: Self = Self::new(1);
10457
10458 #[doc = "Setting prohibited"]
10459 pub const OTHERS: Self = Self::new(0);
10460 }
10461}
10462#[doc(hidden)]
10463#[derive(Copy, Clone, Eq, PartialEq)]
10464pub struct Sdctpidl_SPEC;
10465impl crate::sealed::RegSpec for Sdctpidl_SPEC {
10466 type DataType = u32;
10467}
10468
10469#[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
10470pub type Sdctpidl = crate::RegValueT<Sdctpidl_SPEC>;
10471
10472impl NoBitfieldReg<Sdctpidl_SPEC> for Sdctpidl {}
10473impl ::core::default::Default for Sdctpidl {
10474 #[inline(always)]
10475 fn default() -> Sdctpidl {
10476 <crate::RegValueT<Sdctpidl_SPEC> as RegisterValue<_>>::new(0)
10477 }
10478}
10479
10480#[doc(hidden)]
10481#[derive(Copy, Clone, Eq, PartialEq)]
10482pub struct Sdctpidh_SPEC;
10483impl crate::sealed::RegSpec for Sdctpidh_SPEC {
10484 type DataType = u32;
10485}
10486
10487#[doc = "Slave Device Characteristic Table Provisional ID High Register"]
10488pub type Sdctpidh = crate::RegValueT<Sdctpidh_SPEC>;
10489
10490impl NoBitfieldReg<Sdctpidh_SPEC> for Sdctpidh {}
10491impl ::core::default::Default for Sdctpidh {
10492 #[inline(always)]
10493 fn default() -> Sdctpidh {
10494 <crate::RegValueT<Sdctpidh_SPEC> as RegisterValue<_>>::new(0)
10495 }
10496}
10497
10498#[doc(hidden)]
10499#[derive(Copy, Clone, Eq, PartialEq)]
10500pub struct Svdvad_SPEC;
10501impl crate::sealed::RegSpec for Svdvad_SPEC {
10502 type DataType = u32;
10503}
10504
10505#[doc = "Slave Device Address Register %s"]
10506pub type Svdvad = crate::RegValueT<Svdvad_SPEC>;
10507
10508impl Svdvad {
10509 #[doc = "Slave Address"]
10510 #[inline(always)]
10511 pub fn svad(
10512 self,
10513 ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, u16, Svdvad_SPEC, crate::common::R>
10514 {
10515 crate::common::RegisterField::<16,0x3ff,1,0,u16,u16,Svdvad_SPEC,crate::common::R>::from_register(self,0)
10516 }
10517
10518 #[doc = "Slave Address Length"]
10519 #[inline(always)]
10520 pub fn sadlg(
10521 self,
10522 ) -> crate::common::RegisterField<
10523 27,
10524 0x1,
10525 1,
10526 0,
10527 svdvad::Sadlg,
10528 svdvad::Sadlg,
10529 Svdvad_SPEC,
10530 crate::common::R,
10531 > {
10532 crate::common::RegisterField::<
10533 27,
10534 0x1,
10535 1,
10536 0,
10537 svdvad::Sadlg,
10538 svdvad::Sadlg,
10539 Svdvad_SPEC,
10540 crate::common::R,
10541 >::from_register(self, 0)
10542 }
10543
10544 #[doc = "Slave Static Address Valid"]
10545 #[inline(always)]
10546 pub fn sstadv(
10547 self,
10548 ) -> crate::common::RegisterField<
10549 30,
10550 0x1,
10551 1,
10552 0,
10553 svdvad::Sstadv,
10554 svdvad::Sstadv,
10555 Svdvad_SPEC,
10556 crate::common::R,
10557 > {
10558 crate::common::RegisterField::<
10559 30,
10560 0x1,
10561 1,
10562 0,
10563 svdvad::Sstadv,
10564 svdvad::Sstadv,
10565 Svdvad_SPEC,
10566 crate::common::R,
10567 >::from_register(self, 0)
10568 }
10569
10570 #[doc = "Slave Dynamic Address Valid"]
10571 #[inline(always)]
10572 pub fn sdyadv(
10573 self,
10574 ) -> crate::common::RegisterField<
10575 31,
10576 0x1,
10577 1,
10578 0,
10579 svdvad::Sdyadv,
10580 svdvad::Sdyadv,
10581 Svdvad_SPEC,
10582 crate::common::R,
10583 > {
10584 crate::common::RegisterField::<
10585 31,
10586 0x1,
10587 1,
10588 0,
10589 svdvad::Sdyadv,
10590 svdvad::Sdyadv,
10591 Svdvad_SPEC,
10592 crate::common::R,
10593 >::from_register(self, 0)
10594 }
10595}
10596impl ::core::default::Default for Svdvad {
10597 #[inline(always)]
10598 fn default() -> Svdvad {
10599 <crate::RegValueT<Svdvad_SPEC> as RegisterValue<_>>::new(0)
10600 }
10601}
10602pub mod svdvad {
10603
10604 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10605 pub struct Sadlg_SPEC;
10606 pub type Sadlg = crate::EnumBitfieldStruct<u8, Sadlg_SPEC>;
10607 impl Sadlg {
10608 #[doc = "The 7-bit address format is selected."]
10609 pub const _0: Self = Self::new(0);
10610
10611 #[doc = "The 10-bit address format is selected."]
10612 pub const _1: Self = Self::new(1);
10613 }
10614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10615 pub struct Sstadv_SPEC;
10616 pub type Sstadv = crate::EnumBitfieldStruct<u8, Sstadv_SPEC>;
10617 impl Sstadv {
10618 #[doc = "Slave address is disabled."]
10619 pub const _0: Self = Self::new(0);
10620
10621 #[doc = "Slave address is enabled."]
10622 pub const _1: Self = Self::new(1);
10623 }
10624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10625 pub struct Sdyadv_SPEC;
10626 pub type Sdyadv = crate::EnumBitfieldStruct<u8, Sdyadv_SPEC>;
10627 impl Sdyadv {
10628 #[doc = "Dynamic Address is disabled."]
10629 pub const _0: Self = Self::new(0);
10630
10631 #[doc = "Dynamic Address is enabled."]
10632 pub const _1: Self = Self::new(1);
10633 }
10634}
10635#[doc(hidden)]
10636#[derive(Copy, Clone, Eq, PartialEq)]
10637pub struct Csecmd_SPEC;
10638impl crate::sealed::RegSpec for Csecmd_SPEC {
10639 type DataType = u32;
10640}
10641
10642#[doc = "CCC Slave Events Command Register"]
10643pub type Csecmd = crate::RegValueT<Csecmd_SPEC>;
10644
10645impl Csecmd {
10646 #[doc = "Slave Interrupt Requests Enable"]
10647 #[inline(always)]
10648 pub fn svirqe(
10649 self,
10650 ) -> crate::common::RegisterField<
10651 0,
10652 0x1,
10653 1,
10654 0,
10655 csecmd::Svirqe,
10656 csecmd::Svirqe,
10657 Csecmd_SPEC,
10658 crate::common::RW,
10659 > {
10660 crate::common::RegisterField::<
10661 0,
10662 0x1,
10663 1,
10664 0,
10665 csecmd::Svirqe,
10666 csecmd::Svirqe,
10667 Csecmd_SPEC,
10668 crate::common::RW,
10669 >::from_register(self, 0)
10670 }
10671
10672 #[doc = "Mastership Requests Enable"]
10673 #[inline(always)]
10674 pub fn msrqe(
10675 self,
10676 ) -> crate::common::RegisterField<
10677 1,
10678 0x1,
10679 1,
10680 0,
10681 csecmd::Msrqe,
10682 csecmd::Msrqe,
10683 Csecmd_SPEC,
10684 crate::common::RW,
10685 > {
10686 crate::common::RegisterField::<
10687 1,
10688 0x1,
10689 1,
10690 0,
10691 csecmd::Msrqe,
10692 csecmd::Msrqe,
10693 Csecmd_SPEC,
10694 crate::common::RW,
10695 >::from_register(self, 0)
10696 }
10697}
10698impl ::core::default::Default for Csecmd {
10699 #[inline(always)]
10700 fn default() -> Csecmd {
10701 <crate::RegValueT<Csecmd_SPEC> as RegisterValue<_>>::new(0)
10702 }
10703}
10704pub mod csecmd {
10705
10706 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10707 pub struct Svirqe_SPEC;
10708 pub type Svirqe = crate::EnumBitfieldStruct<u8, Svirqe_SPEC>;
10709 impl Svirqe {
10710 #[doc = "DISABLED: Slave-initiated Interrupts is Disabled by the Master to control."]
10711 pub const _0: Self = Self::new(0);
10712
10713 #[doc = "ENABLED: Slave-initiated Interrupts is Enabled by the Master to control."]
10714 pub const _1: Self = Self::new(1);
10715 }
10716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10717 pub struct Msrqe_SPEC;
10718 pub type Msrqe = crate::EnumBitfieldStruct<u8, Msrqe_SPEC>;
10719 impl Msrqe {
10720 #[doc = "DISABLED: Mastership requests from Secondary Masters is Disabled by the Current Master to control."]
10721 pub const _0: Self = Self::new(0);
10722
10723 #[doc = "ENABLED: Mastership requests from Secondary Masters is Enabled by the Current Master to control."]
10724 pub const _1: Self = Self::new(1);
10725 }
10726}
10727#[doc(hidden)]
10728#[derive(Copy, Clone, Eq, PartialEq)]
10729pub struct Ceactst_SPEC;
10730impl crate::sealed::RegSpec for Ceactst_SPEC {
10731 type DataType = u32;
10732}
10733
10734#[doc = "CCC Enter Activity State Register"]
10735pub type Ceactst = crate::RegValueT<Ceactst_SPEC>;
10736
10737impl Ceactst {
10738 #[doc = "Activity State"]
10739 #[inline(always)]
10740 pub fn actst(
10741 self,
10742 ) -> crate::common::RegisterField<
10743 0,
10744 0xf,
10745 1,
10746 0,
10747 ceactst::Actst,
10748 ceactst::Actst,
10749 Ceactst_SPEC,
10750 crate::common::RW,
10751 > {
10752 crate::common::RegisterField::<
10753 0,
10754 0xf,
10755 1,
10756 0,
10757 ceactst::Actst,
10758 ceactst::Actst,
10759 Ceactst_SPEC,
10760 crate::common::RW,
10761 >::from_register(self, 0)
10762 }
10763}
10764impl ::core::default::Default for Ceactst {
10765 #[inline(always)]
10766 fn default() -> Ceactst {
10767 <crate::RegValueT<Ceactst_SPEC> as RegisterValue<_>>::new(0)
10768 }
10769}
10770pub mod ceactst {
10771
10772 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10773 pub struct Actst_SPEC;
10774 pub type Actst = crate::EnumBitfieldStruct<u8, Actst_SPEC>;
10775 impl Actst {
10776 #[doc = "ENTAS0 (1µs: Latency-free operation)"]
10777 pub const _0_X_1: Self = Self::new(1);
10778
10779 #[doc = "ENTAS1 (100 µs)"]
10780 pub const _0_X_2: Self = Self::new(2);
10781
10782 #[doc = "ENTAS2 (2 ms)"]
10783 pub const _0_X_4: Self = Self::new(4);
10784
10785 #[doc = "ENTAS3 (50 ms: Lowest-activity operation)"]
10786 pub const _0_X_8: Self = Self::new(8);
10787
10788 #[doc = "Setting prohibited"]
10789 pub const OTHERS: Self = Self::new(0);
10790 }
10791}
10792#[doc(hidden)]
10793#[derive(Copy, Clone, Eq, PartialEq)]
10794pub struct Cmwlg_SPEC;
10795impl crate::sealed::RegSpec for Cmwlg_SPEC {
10796 type DataType = u32;
10797}
10798
10799#[doc = "CCC Max Write Length Register"]
10800pub type Cmwlg = crate::RegValueT<Cmwlg_SPEC>;
10801
10802impl Cmwlg {
10803 #[doc = "Max Write Length"]
10804 #[inline(always)]
10805 pub fn mwlg(
10806 self,
10807 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmwlg_SPEC, crate::common::RW>
10808 {
10809 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmwlg_SPEC,crate::common::RW>::from_register(self,0)
10810 }
10811}
10812impl ::core::default::Default for Cmwlg {
10813 #[inline(always)]
10814 fn default() -> Cmwlg {
10815 <crate::RegValueT<Cmwlg_SPEC> as RegisterValue<_>>::new(0)
10816 }
10817}
10818
10819#[doc(hidden)]
10820#[derive(Copy, Clone, Eq, PartialEq)]
10821pub struct Cmrlg_SPEC;
10822impl crate::sealed::RegSpec for Cmrlg_SPEC {
10823 type DataType = u32;
10824}
10825
10826#[doc = "CCC Max Read Length Register"]
10827pub type Cmrlg = crate::RegValueT<Cmrlg_SPEC>;
10828
10829impl Cmrlg {
10830 #[doc = "Max Read Length"]
10831 #[inline(always)]
10832 pub fn mrlg(
10833 self,
10834 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmrlg_SPEC, crate::common::RW>
10835 {
10836 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
10837 }
10838
10839 #[doc = "IBI Payload Size"]
10840 #[inline(always)]
10841 pub fn ibipsz(
10842 self,
10843 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Cmrlg_SPEC, crate::common::RW> {
10844 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
10845 }
10846}
10847impl ::core::default::Default for Cmrlg {
10848 #[inline(always)]
10849 fn default() -> Cmrlg {
10850 <crate::RegValueT<Cmrlg_SPEC> as RegisterValue<_>>::new(0)
10851 }
10852}
10853
10854#[doc(hidden)]
10855#[derive(Copy, Clone, Eq, PartialEq)]
10856pub struct Cetstmd_SPEC;
10857impl crate::sealed::RegSpec for Cetstmd_SPEC {
10858 type DataType = u32;
10859}
10860
10861#[doc = "CCC Enter Test Mode Register"]
10862pub type Cetstmd = crate::RegValueT<Cetstmd_SPEC>;
10863
10864impl Cetstmd {
10865 #[doc = "Test Mode"]
10866 #[inline(always)]
10867 pub fn tstmd(
10868 self,
10869 ) -> crate::common::RegisterField<
10870 0,
10871 0xff,
10872 1,
10873 0,
10874 cetstmd::Tstmd,
10875 cetstmd::Tstmd,
10876 Cetstmd_SPEC,
10877 crate::common::R,
10878 > {
10879 crate::common::RegisterField::<
10880 0,
10881 0xff,
10882 1,
10883 0,
10884 cetstmd::Tstmd,
10885 cetstmd::Tstmd,
10886 Cetstmd_SPEC,
10887 crate::common::R,
10888 >::from_register(self, 0)
10889 }
10890}
10891impl ::core::default::Default for Cetstmd {
10892 #[inline(always)]
10893 fn default() -> Cetstmd {
10894 <crate::RegValueT<Cetstmd_SPEC> as RegisterValue<_>>::new(0)
10895 }
10896}
10897pub mod cetstmd {
10898
10899 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10900 pub struct Tstmd_SPEC;
10901 pub type Tstmd = crate::EnumBitfieldStruct<u8, Tstmd_SPEC>;
10902 impl Tstmd {
10903 #[doc = "Exit Test Mode This value removes all I3C devices from Test Mode."]
10904 pub const _0_X_00: Self = Self::new(0);
10905
10906 #[doc = "Vendor Test Mode This value indicates that I3C devices shall return a random 32bit value in the provisional ID during the Dynamic Address Assignment procedure."]
10907 pub const _0_X_01: Self = Self::new(1);
10908
10909 #[doc = "Setting prohibited"]
10910 pub const OTHERS: Self = Self::new(0);
10911 }
10912}
10913#[doc(hidden)]
10914#[derive(Copy, Clone, Eq, PartialEq)]
10915pub struct Cgdvst_SPEC;
10916impl crate::sealed::RegSpec for Cgdvst_SPEC {
10917 type DataType = u32;
10918}
10919
10920#[doc = "CCC Get Device Status Register"]
10921pub type Cgdvst = crate::RegValueT<Cgdvst_SPEC>;
10922
10923impl Cgdvst {
10924 #[doc = "Pending Interrupt"]
10925 #[inline(always)]
10926 pub fn pndint(
10927 self,
10928 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
10929 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
10930 }
10931
10932 #[doc = "Protocol Error"]
10933 #[inline(always)]
10934 pub fn prte(
10935 self,
10936 ) -> crate::common::RegisterField<
10937 5,
10938 0x1,
10939 1,
10940 0,
10941 cgdvst::Prte,
10942 cgdvst::Prte,
10943 Cgdvst_SPEC,
10944 crate::common::RW,
10945 > {
10946 crate::common::RegisterField::<
10947 5,
10948 0x1,
10949 1,
10950 0,
10951 cgdvst::Prte,
10952 cgdvst::Prte,
10953 Cgdvst_SPEC,
10954 crate::common::RW,
10955 >::from_register(self, 0)
10956 }
10957
10958 #[doc = "Slave Device’s current Activity Mode"]
10959 #[inline(always)]
10960 pub fn actmd(
10961 self,
10962 ) -> crate::common::RegisterField<
10963 6,
10964 0x3,
10965 1,
10966 0,
10967 cgdvst::Actmd,
10968 cgdvst::Actmd,
10969 Cgdvst_SPEC,
10970 crate::common::RW,
10971 > {
10972 crate::common::RegisterField::<
10973 6,
10974 0x3,
10975 1,
10976 0,
10977 cgdvst::Actmd,
10978 cgdvst::Actmd,
10979 Cgdvst_SPEC,
10980 crate::common::RW,
10981 >::from_register(self, 0)
10982 }
10983
10984 #[doc = "Vendor Reserved"]
10985 #[inline(always)]
10986 pub fn vdrsv(
10987 self,
10988 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
10989 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
10990 }
10991}
10992impl ::core::default::Default for Cgdvst {
10993 #[inline(always)]
10994 fn default() -> Cgdvst {
10995 <crate::RegValueT<Cgdvst_SPEC> as RegisterValue<_>>::new(0)
10996 }
10997}
10998pub mod cgdvst {
10999
11000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11001 pub struct Prte_SPEC;
11002 pub type Prte = crate::EnumBitfieldStruct<u8, Prte_SPEC>;
11003 impl Prte {
11004 #[doc = "The Slave has not detected a protocol error since the last Status read."]
11005 pub const _0: Self = Self::new(0);
11006
11007 #[doc = "The Slave has detected a protocol error since the last Status read."]
11008 pub const _1: Self = Self::new(1);
11009 }
11010 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11011 pub struct Actmd_SPEC;
11012 pub type Actmd = crate::EnumBitfieldStruct<u8, Actmd_SPEC>;
11013 impl Actmd {
11014 #[doc = "Activity Mode 0"]
11015 pub const _00: Self = Self::new(0);
11016
11017 #[doc = "Activity Mode 1"]
11018 pub const _01: Self = Self::new(1);
11019
11020 #[doc = "Activity Mode 2"]
11021 pub const _10: Self = Self::new(2);
11022
11023 #[doc = "Activity Mode 3"]
11024 pub const _11: Self = Self::new(3);
11025 }
11026}
11027#[doc(hidden)]
11028#[derive(Copy, Clone, Eq, PartialEq)]
11029pub struct Cmdspw_SPEC;
11030impl crate::sealed::RegSpec for Cmdspw_SPEC {
11031 type DataType = u32;
11032}
11033
11034#[doc = "CCC Max Data Speed W (Write) Register"]
11035pub type Cmdspw = crate::RegValueT<Cmdspw_SPEC>;
11036
11037impl Cmdspw {
11038 #[doc = "Maximum Sustained Write Data Rate"]
11039 #[inline(always)]
11040 pub fn mswdr(
11041 self,
11042 ) -> crate::common::RegisterField<
11043 0,
11044 0x7,
11045 1,
11046 0,
11047 cmdspw::Mswdr,
11048 cmdspw::Mswdr,
11049 Cmdspw_SPEC,
11050 crate::common::RW,
11051 > {
11052 crate::common::RegisterField::<
11053 0,
11054 0x7,
11055 1,
11056 0,
11057 cmdspw::Mswdr,
11058 cmdspw::Mswdr,
11059 Cmdspw_SPEC,
11060 crate::common::RW,
11061 >::from_register(self, 0)
11062 }
11063}
11064impl ::core::default::Default for Cmdspw {
11065 #[inline(always)]
11066 fn default() -> Cmdspw {
11067 <crate::RegValueT<Cmdspw_SPEC> as RegisterValue<_>>::new(0)
11068 }
11069}
11070pub mod cmdspw {
11071
11072 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11073 pub struct Mswdr_SPEC;
11074 pub type Mswdr = crate::EnumBitfieldStruct<u8, Mswdr_SPEC>;
11075 impl Mswdr {
11076 #[doc = "fscl Max (default value)"]
11077 pub const _000: Self = Self::new(0);
11078
11079 #[doc = "8 MHz"]
11080 pub const _001: Self = Self::new(1);
11081
11082 #[doc = "6 MHz"]
11083 pub const _010: Self = Self::new(2);
11084
11085 #[doc = "4 MHz"]
11086 pub const _011: Self = Self::new(3);
11087
11088 #[doc = "2 MHz"]
11089 pub const _100: Self = Self::new(4);
11090
11091 #[doc = "Setting prohibited"]
11092 pub const OTHERS: Self = Self::new(0);
11093 }
11094}
11095#[doc(hidden)]
11096#[derive(Copy, Clone, Eq, PartialEq)]
11097pub struct Cmdspr_SPEC;
11098impl crate::sealed::RegSpec for Cmdspr_SPEC {
11099 type DataType = u32;
11100}
11101
11102#[doc = "CCC Max Data Speed R (Read) Register"]
11103pub type Cmdspr = crate::RegValueT<Cmdspr_SPEC>;
11104
11105impl Cmdspr {
11106 #[doc = "Maximum Sustained Read Data Rate"]
11107 #[inline(always)]
11108 pub fn msrdr(
11109 self,
11110 ) -> crate::common::RegisterField<
11111 0,
11112 0x7,
11113 1,
11114 0,
11115 cmdspr::Msrdr,
11116 cmdspr::Msrdr,
11117 Cmdspr_SPEC,
11118 crate::common::RW,
11119 > {
11120 crate::common::RegisterField::<
11121 0,
11122 0x7,
11123 1,
11124 0,
11125 cmdspr::Msrdr,
11126 cmdspr::Msrdr,
11127 Cmdspr_SPEC,
11128 crate::common::RW,
11129 >::from_register(self, 0)
11130 }
11131
11132 #[doc = "Clock to Data Turnaround Time (TSCO)"]
11133 #[inline(always)]
11134 pub fn cdttim(
11135 self,
11136 ) -> crate::common::RegisterField<
11137 3,
11138 0x7,
11139 1,
11140 0,
11141 cmdspr::Cdttim,
11142 cmdspr::Cdttim,
11143 Cmdspr_SPEC,
11144 crate::common::RW,
11145 > {
11146 crate::common::RegisterField::<
11147 3,
11148 0x7,
11149 1,
11150 0,
11151 cmdspr::Cdttim,
11152 cmdspr::Cdttim,
11153 Cmdspr_SPEC,
11154 crate::common::RW,
11155 >::from_register(self, 0)
11156 }
11157}
11158impl ::core::default::Default for Cmdspr {
11159 #[inline(always)]
11160 fn default() -> Cmdspr {
11161 <crate::RegValueT<Cmdspr_SPEC> as RegisterValue<_>>::new(0)
11162 }
11163}
11164pub mod cmdspr {
11165
11166 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11167 pub struct Msrdr_SPEC;
11168 pub type Msrdr = crate::EnumBitfieldStruct<u8, Msrdr_SPEC>;
11169 impl Msrdr {
11170 #[doc = "fscl Max (default value)"]
11171 pub const _000: Self = Self::new(0);
11172
11173 #[doc = "8 MHz"]
11174 pub const _001: Self = Self::new(1);
11175
11176 #[doc = "6 MHz"]
11177 pub const _010: Self = Self::new(2);
11178
11179 #[doc = "4 MHz"]
11180 pub const _011: Self = Self::new(3);
11181
11182 #[doc = "2 MHz"]
11183 pub const _100: Self = Self::new(4);
11184
11185 #[doc = "Setting prohibited"]
11186 pub const OTHERS: Self = Self::new(0);
11187 }
11188 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11189 pub struct Cdttim_SPEC;
11190 pub type Cdttim = crate::EnumBitfieldStruct<u8, Cdttim_SPEC>;
11191 impl Cdttim {
11192 #[doc = "8 ns or less (default value)"]
11193 pub const _000: Self = Self::new(0);
11194
11195 #[doc = "9 ns or less"]
11196 pub const _001: Self = Self::new(1);
11197
11198 #[doc = "10 ns or less"]
11199 pub const _010: Self = Self::new(2);
11200
11201 #[doc = "11 ns or less"]
11202 pub const _011: Self = Self::new(3);
11203
11204 #[doc = "12 ns or less"]
11205 pub const _100: Self = Self::new(4);
11206
11207 #[doc = "TSCO is more than 12 ns, and is reported by private agreement."]
11208 pub const _111: Self = Self::new(7);
11209
11210 #[doc = "Setting prohibited"]
11211 pub const OTHERS: Self = Self::new(0);
11212 }
11213}
11214#[doc(hidden)]
11215#[derive(Copy, Clone, Eq, PartialEq)]
11216pub struct Cmdspt_SPEC;
11217impl crate::sealed::RegSpec for Cmdspt_SPEC {
11218 type DataType = u32;
11219}
11220
11221#[doc = "CCC Max Data Speed T (Turnaround) Register"]
11222pub type Cmdspt = crate::RegValueT<Cmdspt_SPEC>;
11223
11224impl Cmdspt {
11225 #[doc = "Maximum Read Turnaround Time"]
11226 #[inline(always)]
11227 pub fn mrttim(
11228 self,
11229 ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, u32, Cmdspt_SPEC, crate::common::RW>
11230 {
11231 crate::common::RegisterField::<0,0xffffff,1,0,u32,u32,Cmdspt_SPEC,crate::common::RW>::from_register(self,0)
11232 }
11233
11234 #[doc = "Maximum Read Turnaround Time Enable"]
11235 #[inline(always)]
11236 pub fn mrte(
11237 self,
11238 ) -> crate::common::RegisterField<
11239 31,
11240 0x1,
11241 1,
11242 0,
11243 cmdspt::Mrte,
11244 cmdspt::Mrte,
11245 Cmdspt_SPEC,
11246 crate::common::RW,
11247 > {
11248 crate::common::RegisterField::<
11249 31,
11250 0x1,
11251 1,
11252 0,
11253 cmdspt::Mrte,
11254 cmdspt::Mrte,
11255 Cmdspt_SPEC,
11256 crate::common::RW,
11257 >::from_register(self, 0)
11258 }
11259}
11260impl ::core::default::Default for Cmdspt {
11261 #[inline(always)]
11262 fn default() -> Cmdspt {
11263 <crate::RegValueT<Cmdspt_SPEC> as RegisterValue<_>>::new(0)
11264 }
11265}
11266pub mod cmdspt {
11267
11268 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11269 pub struct Mrte_SPEC;
11270 pub type Mrte = crate::EnumBitfieldStruct<u8, Mrte_SPEC>;
11271 impl Mrte {
11272 #[doc = "Disables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 1: Without Turnaround)"]
11273 pub const _0: Self = Self::new(0);
11274
11275 #[doc = "Enables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 2: With Turnaround)"]
11276 pub const _1: Self = Self::new(1);
11277 }
11278}
11279#[doc(hidden)]
11280#[derive(Copy, Clone, Eq, PartialEq)]
11281pub struct Cetsm_SPEC;
11282impl crate::sealed::RegSpec for Cetsm_SPEC {
11283 type DataType = u32;
11284}
11285
11286#[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
11287pub type Cetsm = crate::RegValueT<Cetsm_SPEC>;
11288
11289impl Cetsm {
11290 #[doc = "Supports Sync Mode"]
11291 #[inline(always)]
11292 pub fn sptsyn(
11293 self,
11294 ) -> crate::common::RegisterField<
11295 0,
11296 0x1,
11297 1,
11298 0,
11299 cetsm::Sptsyn,
11300 cetsm::Sptsyn,
11301 Cetsm_SPEC,
11302 crate::common::RW,
11303 > {
11304 crate::common::RegisterField::<
11305 0,
11306 0x1,
11307 1,
11308 0,
11309 cetsm::Sptsyn,
11310 cetsm::Sptsyn,
11311 Cetsm_SPEC,
11312 crate::common::RW,
11313 >::from_register(self, 0)
11314 }
11315
11316 #[doc = "Support Async Mode 0"]
11317 #[inline(always)]
11318 pub fn sptasyn0(
11319 self,
11320 ) -> crate::common::RegisterField<
11321 1,
11322 0x1,
11323 1,
11324 0,
11325 cetsm::Sptasyn0,
11326 cetsm::Sptasyn0,
11327 Cetsm_SPEC,
11328 crate::common::RW,
11329 > {
11330 crate::common::RegisterField::<
11331 1,
11332 0x1,
11333 1,
11334 0,
11335 cetsm::Sptasyn0,
11336 cetsm::Sptasyn0,
11337 Cetsm_SPEC,
11338 crate::common::RW,
11339 >::from_register(self, 0)
11340 }
11341
11342 #[doc = "Support Async Mode 1"]
11343 #[inline(always)]
11344 pub fn sptasyn1(
11345 self,
11346 ) -> crate::common::RegisterField<
11347 2,
11348 0x1,
11349 1,
11350 0,
11351 cetsm::Sptasyn1,
11352 cetsm::Sptasyn1,
11353 Cetsm_SPEC,
11354 crate::common::RW,
11355 > {
11356 crate::common::RegisterField::<
11357 2,
11358 0x1,
11359 1,
11360 0,
11361 cetsm::Sptasyn1,
11362 cetsm::Sptasyn1,
11363 Cetsm_SPEC,
11364 crate::common::RW,
11365 >::from_register(self, 0)
11366 }
11367
11368 #[doc = "Frequency Byte"]
11369 #[inline(always)]
11370 pub fn freq(
11371 self,
11372 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Cetsm_SPEC, crate::common::RW> {
11373 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Cetsm_SPEC,crate::common::RW>::from_register(self,0)
11374 }
11375
11376 #[doc = "Inaccuracy Byte"]
11377 #[inline(always)]
11378 pub fn inac(
11379 self,
11380 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Cetsm_SPEC, crate::common::RW> {
11381 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Cetsm_SPEC,crate::common::RW>::from_register(self,0)
11382 }
11383}
11384impl ::core::default::Default for Cetsm {
11385 #[inline(always)]
11386 fn default() -> Cetsm {
11387 <crate::RegValueT<Cetsm_SPEC> as RegisterValue<_>>::new(0)
11388 }
11389}
11390pub mod cetsm {
11391
11392 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11393 pub struct Sptsyn_SPEC;
11394 pub type Sptsyn = crate::EnumBitfieldStruct<u8, Sptsyn_SPEC>;
11395 impl Sptsyn {
11396 #[doc = "Sync Mode is not supported."]
11397 pub const _0: Self = Self::new(0);
11398
11399 #[doc = "Sync Mode is supported."]
11400 pub const _1: Self = Self::new(1);
11401 }
11402 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11403 pub struct Sptasyn0_SPEC;
11404 pub type Sptasyn0 = crate::EnumBitfieldStruct<u8, Sptasyn0_SPEC>;
11405 impl Sptasyn0 {
11406 #[doc = "Async Mode 0 is not supported."]
11407 pub const _0: Self = Self::new(0);
11408
11409 #[doc = "Async Mode 0 is supported."]
11410 pub const _1: Self = Self::new(1);
11411 }
11412 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11413 pub struct Sptasyn1_SPEC;
11414 pub type Sptasyn1 = crate::EnumBitfieldStruct<u8, Sptasyn1_SPEC>;
11415 impl Sptasyn1 {
11416 #[doc = "Async Mode 1 is not supported."]
11417 pub const _0: Self = Self::new(0);
11418
11419 #[doc = "Async Mode 1 is supported."]
11420 pub const _1: Self = Self::new(1);
11421 }
11422}
11423#[doc(hidden)]
11424#[derive(Copy, Clone, Eq, PartialEq)]
11425pub struct Cetss_SPEC;
11426impl crate::sealed::RegSpec for Cetss_SPEC {
11427 type DataType = u32;
11428}
11429
11430#[doc = "CCC Exchange Timing Support Information S (State) Register"]
11431pub type Cetss = crate::RegValueT<Cetss_SPEC>;
11432
11433impl Cetss {
11434 #[doc = "Sync Mode Enabled"]
11435 #[inline(always)]
11436 pub fn syne(
11437 self,
11438 ) -> crate::common::RegisterField<
11439 0,
11440 0x1,
11441 1,
11442 0,
11443 cetss::Syne,
11444 cetss::Syne,
11445 Cetss_SPEC,
11446 crate::common::RW,
11447 > {
11448 crate::common::RegisterField::<
11449 0,
11450 0x1,
11451 1,
11452 0,
11453 cetss::Syne,
11454 cetss::Syne,
11455 Cetss_SPEC,
11456 crate::common::RW,
11457 >::from_register(self, 0)
11458 }
11459
11460 #[doc = "Async Mode Enabled"]
11461 #[inline(always)]
11462 pub fn asyne(
11463 self,
11464 ) -> crate::common::RegisterField<
11465 1,
11466 0x3,
11467 1,
11468 0,
11469 cetss::Asyne,
11470 cetss::Asyne,
11471 Cetss_SPEC,
11472 crate::common::RW,
11473 > {
11474 crate::common::RegisterField::<
11475 1,
11476 0x3,
11477 1,
11478 0,
11479 cetss::Asyne,
11480 cetss::Asyne,
11481 Cetss_SPEC,
11482 crate::common::RW,
11483 >::from_register(self, 0)
11484 }
11485
11486 #[doc = "Internal Counter Overflow"]
11487 #[inline(always)]
11488 pub fn icovf(
11489 self,
11490 ) -> crate::common::RegisterField<
11491 7,
11492 0x1,
11493 1,
11494 0,
11495 cetss::Icovf,
11496 cetss::Icovf,
11497 Cetss_SPEC,
11498 crate::common::RW,
11499 > {
11500 crate::common::RegisterField::<
11501 7,
11502 0x1,
11503 1,
11504 0,
11505 cetss::Icovf,
11506 cetss::Icovf,
11507 Cetss_SPEC,
11508 crate::common::RW,
11509 >::from_register(self, 0)
11510 }
11511}
11512impl ::core::default::Default for Cetss {
11513 #[inline(always)]
11514 fn default() -> Cetss {
11515 <crate::RegValueT<Cetss_SPEC> as RegisterValue<_>>::new(0)
11516 }
11517}
11518pub mod cetss {
11519
11520 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11521 pub struct Syne_SPEC;
11522 pub type Syne = crate::EnumBitfieldStruct<u8, Syne_SPEC>;
11523 impl Syne {
11524 #[doc = "Sync Mode Disabled"]
11525 pub const _0: Self = Self::new(0);
11526
11527 #[doc = "Sync Mode Enabled"]
11528 pub const _1: Self = Self::new(1);
11529 }
11530 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11531 pub struct Asyne_SPEC;
11532 pub type Asyne = crate::EnumBitfieldStruct<u8, Asyne_SPEC>;
11533 impl Asyne {
11534 #[doc = "All Mode Disable"]
11535 pub const _00: Self = Self::new(0);
11536
11537 #[doc = "Async Mode 0 Enabled"]
11538 pub const _01: Self = Self::new(1);
11539
11540 #[doc = "Async Mode 1 Enabled"]
11541 pub const _10: Self = Self::new(2);
11542
11543 #[doc = "Setting prohibited"]
11544 pub const OTHERS: Self = Self::new(0);
11545 }
11546 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11547 pub struct Icovf_SPEC;
11548 pub type Icovf = crate::EnumBitfieldStruct<u8, Icovf_SPEC>;
11549 impl Icovf {
11550 #[doc = "Slave has not experienced a counter overflow since the most recent previous check."]
11551 pub const _0: Self = Self::new(0);
11552
11553 #[doc = "Slave experienced a counter overflow since the most recent previous check."]
11554 pub const _1: Self = Self::new(1);
11555 }
11556}
11557#[doc(hidden)]
11558#[derive(Copy, Clone, Eq, PartialEq)]
11559pub struct Bitcnt_SPEC;
11560impl crate::sealed::RegSpec for Bitcnt_SPEC {
11561 type DataType = u32;
11562}
11563
11564#[doc = "Bit Count Register"]
11565pub type Bitcnt = crate::RegValueT<Bitcnt_SPEC>;
11566
11567impl Bitcnt {
11568 #[doc = "Bit Counter"]
11569 #[inline(always)]
11570 pub fn bcnt(
11571 self,
11572 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Bitcnt_SPEC, crate::common::R> {
11573 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Bitcnt_SPEC,crate::common::R>::from_register(self,0)
11574 }
11575}
11576impl ::core::default::Default for Bitcnt {
11577 #[inline(always)]
11578 fn default() -> Bitcnt {
11579 <crate::RegValueT<Bitcnt_SPEC> as RegisterValue<_>>::new(0)
11580 }
11581}
11582
11583#[doc(hidden)]
11584#[derive(Copy, Clone, Eq, PartialEq)]
11585pub struct Nqstlv_SPEC;
11586impl crate::sealed::RegSpec for Nqstlv_SPEC {
11587 type DataType = u32;
11588}
11589
11590#[doc = "Normal Queue Status Level Register"]
11591pub type Nqstlv = crate::RegValueT<Nqstlv_SPEC>;
11592
11593impl Nqstlv {
11594 #[doc = "Normal Command Queue Free Level"]
11595 #[inline(always)]
11596 pub fn cmdqflv(
11597 self,
11598 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11599 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11600 }
11601
11602 #[doc = "Normal Response Queue Level"]
11603 #[inline(always)]
11604 pub fn rspqlv(
11605 self,
11606 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11607 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11608 }
11609
11610 #[doc = "Normal IBI Queue Level"]
11611 #[inline(always)]
11612 pub fn ibiqlv(
11613 self,
11614 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11615 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11616 }
11617
11618 #[doc = "Normal IBI Status Count"]
11619 #[inline(always)]
11620 pub fn ibiscnt(
11621 self,
11622 ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11623 crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11624 }
11625}
11626impl ::core::default::Default for Nqstlv {
11627 #[inline(always)]
11628 fn default() -> Nqstlv {
11629 <crate::RegValueT<Nqstlv_SPEC> as RegisterValue<_>>::new(4)
11630 }
11631}
11632
11633#[doc(hidden)]
11634#[derive(Copy, Clone, Eq, PartialEq)]
11635pub struct Ndbstlv0_SPEC;
11636impl crate::sealed::RegSpec for Ndbstlv0_SPEC {
11637 type DataType = u32;
11638}
11639
11640#[doc = "Normal Data Buffer Status Level Register 0"]
11641pub type Ndbstlv0 = crate::RegValueT<Ndbstlv0_SPEC>;
11642
11643impl Ndbstlv0 {
11644 #[doc = "Normal Transmit Data Buffer Free Level"]
11645 #[inline(always)]
11646 pub fn tdbflv(
11647 self,
11648 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
11649 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
11650 }
11651
11652 #[doc = "Normal Receive Data Buffer Level"]
11653 #[inline(always)]
11654 pub fn rdblv(
11655 self,
11656 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
11657 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
11658 }
11659}
11660impl ::core::default::Default for Ndbstlv0 {
11661 #[inline(always)]
11662 fn default() -> Ndbstlv0 {
11663 <crate::RegValueT<Ndbstlv0_SPEC> as RegisterValue<_>>::new(1)
11664 }
11665}
11666
11667#[doc(hidden)]
11668#[derive(Copy, Clone, Eq, PartialEq)]
11669pub struct Nrsqstlv_SPEC;
11670impl crate::sealed::RegSpec for Nrsqstlv_SPEC {
11671 type DataType = u32;
11672}
11673
11674#[doc = "Normal Receive Status Queue Status Level Register"]
11675pub type Nrsqstlv = crate::RegValueT<Nrsqstlv_SPEC>;
11676
11677impl Nrsqstlv {
11678 #[doc = "Normal Receive Status Queue Level"]
11679 #[inline(always)]
11680 pub fn rsqlv(
11681 self,
11682 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nrsqstlv_SPEC, crate::common::R> {
11683 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nrsqstlv_SPEC,crate::common::R>::from_register(self,0)
11684 }
11685}
11686impl ::core::default::Default for Nrsqstlv {
11687 #[inline(always)]
11688 fn default() -> Nrsqstlv {
11689 <crate::RegValueT<Nrsqstlv_SPEC> as RegisterValue<_>>::new(0)
11690 }
11691}
11692
11693#[doc(hidden)]
11694#[derive(Copy, Clone, Eq, PartialEq)]
11695pub struct Hqstlv_SPEC;
11696impl crate::sealed::RegSpec for Hqstlv_SPEC {
11697 type DataType = u32;
11698}
11699
11700#[doc = "High Priority Queue Status Level Register"]
11701pub type Hqstlv = crate::RegValueT<Hqstlv_SPEC>;
11702
11703impl Hqstlv {
11704 #[doc = "High Priority Command Queue Level"]
11705 #[inline(always)]
11706 pub fn cmdqlv(
11707 self,
11708 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hqstlv_SPEC, crate::common::R> {
11709 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hqstlv_SPEC,crate::common::R>::from_register(self,0)
11710 }
11711
11712 #[doc = "High Priority Response Queue Level"]
11713 #[inline(always)]
11714 pub fn rspqlv(
11715 self,
11716 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Hqstlv_SPEC, crate::common::R> {
11717 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Hqstlv_SPEC,crate::common::R>::from_register(self,0)
11718 }
11719}
11720impl ::core::default::Default for Hqstlv {
11721 #[inline(always)]
11722 fn default() -> Hqstlv {
11723 <crate::RegValueT<Hqstlv_SPEC> as RegisterValue<_>>::new(2)
11724 }
11725}
11726
11727#[doc(hidden)]
11728#[derive(Copy, Clone, Eq, PartialEq)]
11729pub struct Hdbstlv_SPEC;
11730impl crate::sealed::RegSpec for Hdbstlv_SPEC {
11731 type DataType = u32;
11732}
11733
11734#[doc = "High Priority Data Buffer Status Level Register"]
11735pub type Hdbstlv = crate::RegValueT<Hdbstlv_SPEC>;
11736
11737impl Hdbstlv {
11738 #[doc = "High Priority Transmit Data Buffer Free Level"]
11739 #[inline(always)]
11740 pub fn tdbflv(
11741 self,
11742 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hdbstlv_SPEC, crate::common::R> {
11743 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
11744 }
11745
11746 #[doc = "High Priority Receive Data Buffer Level"]
11747 #[inline(always)]
11748 pub fn rdblv(
11749 self,
11750 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Hdbstlv_SPEC, crate::common::R> {
11751 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
11752 }
11753}
11754impl ::core::default::Default for Hdbstlv {
11755 #[inline(always)]
11756 fn default() -> Hdbstlv {
11757 <crate::RegValueT<Hdbstlv_SPEC> as RegisterValue<_>>::new(2)
11758 }
11759}
11760
11761#[doc(hidden)]
11762#[derive(Copy, Clone, Eq, PartialEq)]
11763pub struct Prstdbg_SPEC;
11764impl crate::sealed::RegSpec for Prstdbg_SPEC {
11765 type DataType = u32;
11766}
11767
11768#[doc = "Present State Debug Register"]
11769pub type Prstdbg = crate::RegValueT<Prstdbg_SPEC>;
11770
11771impl Prstdbg {
11772 #[doc = "SCL Line Signal Level"]
11773 #[inline(always)]
11774 pub fn scilv(
11775 self,
11776 ) -> crate::common::RegisterFieldBool<0, 1, 0, Prstdbg_SPEC, crate::common::R> {
11777 crate::common::RegisterFieldBool::<0, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
11778 self, 0,
11779 )
11780 }
11781
11782 #[doc = "SDA Line Signal Level"]
11783 #[inline(always)]
11784 pub fn sdilv(
11785 self,
11786 ) -> crate::common::RegisterFieldBool<1, 1, 0, Prstdbg_SPEC, crate::common::R> {
11787 crate::common::RegisterFieldBool::<1, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
11788 self, 0,
11789 )
11790 }
11791
11792 #[doc = "SCL Output Level"]
11793 #[inline(always)]
11794 pub fn scolv(
11795 self,
11796 ) -> crate::common::RegisterField<
11797 2,
11798 0x1,
11799 1,
11800 0,
11801 prstdbg::Scolv,
11802 prstdbg::Scolv,
11803 Prstdbg_SPEC,
11804 crate::common::R,
11805 > {
11806 crate::common::RegisterField::<
11807 2,
11808 0x1,
11809 1,
11810 0,
11811 prstdbg::Scolv,
11812 prstdbg::Scolv,
11813 Prstdbg_SPEC,
11814 crate::common::R,
11815 >::from_register(self, 0)
11816 }
11817
11818 #[doc = "SDA Output Level"]
11819 #[inline(always)]
11820 pub fn sdolv(
11821 self,
11822 ) -> crate::common::RegisterField<
11823 3,
11824 0x1,
11825 1,
11826 0,
11827 prstdbg::Sdolv,
11828 prstdbg::Sdolv,
11829 Prstdbg_SPEC,
11830 crate::common::R,
11831 > {
11832 crate::common::RegisterField::<
11833 3,
11834 0x1,
11835 1,
11836 0,
11837 prstdbg::Sdolv,
11838 prstdbg::Sdolv,
11839 Prstdbg_SPEC,
11840 crate::common::R,
11841 >::from_register(self, 0)
11842 }
11843}
11844impl ::core::default::Default for Prstdbg {
11845 #[inline(always)]
11846 fn default() -> Prstdbg {
11847 <crate::RegValueT<Prstdbg_SPEC> as RegisterValue<_>>::new(15)
11848 }
11849}
11850pub mod prstdbg {
11851
11852 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11853 pub struct Scolv_SPEC;
11854 pub type Scolv = crate::EnumBitfieldStruct<u8, Scolv_SPEC>;
11855 impl Scolv {
11856 #[doc = "I3C has driven the SCL pin low."]
11857 pub const _0: Self = Self::new(0);
11858
11859 #[doc = "I3C has released the SCL pin."]
11860 pub const _1: Self = Self::new(1);
11861 }
11862 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11863 pub struct Sdolv_SPEC;
11864 pub type Sdolv = crate::EnumBitfieldStruct<u8, Sdolv_SPEC>;
11865 impl Sdolv {
11866 #[doc = "I3C has driven the SDA pin low."]
11867 pub const _0: Self = Self::new(0);
11868
11869 #[doc = "I3C has released the SDA pin."]
11870 pub const _1: Self = Self::new(1);
11871 }
11872}
11873#[doc(hidden)]
11874#[derive(Copy, Clone, Eq, PartialEq)]
11875pub struct Mserrcnt_SPEC;
11876impl crate::sealed::RegSpec for Mserrcnt_SPEC {
11877 type DataType = u32;
11878}
11879
11880#[doc = "Master Error Counters Register"]
11881pub type Mserrcnt = crate::RegValueT<Mserrcnt_SPEC>;
11882
11883impl Mserrcnt {
11884 #[doc = "M2 Error Counter"]
11885 #[inline(always)]
11886 pub fn m2ecnt(
11887 self,
11888 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mserrcnt_SPEC, crate::common::R> {
11889 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mserrcnt_SPEC,crate::common::R>::from_register(self,0)
11890 }
11891}
11892impl ::core::default::Default for Mserrcnt {
11893 #[inline(always)]
11894 fn default() -> Mserrcnt {
11895 <crate::RegValueT<Mserrcnt_SPEC> as RegisterValue<_>>::new(0)
11896 }
11897}
11898
11899#[doc(hidden)]
11900#[derive(Copy, Clone, Eq, PartialEq)]
11901pub struct Sc1Cpt_SPEC;
11902impl crate::sealed::RegSpec for Sc1Cpt_SPEC {
11903 type DataType = u32;
11904}
11905
11906#[doc = "SC1 Capture monitor Register"]
11907pub type Sc1Cpt = crate::RegValueT<Sc1Cpt_SPEC>;
11908
11909impl Sc1Cpt {
11910 #[doc = "SC1 Capture"]
11911 #[inline(always)]
11912 pub fn sc1c(
11913 self,
11914 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Sc1Cpt_SPEC, crate::common::R>
11915 {
11916 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Sc1Cpt_SPEC,crate::common::R>::from_register(self,0)
11917 }
11918}
11919impl ::core::default::Default for Sc1Cpt {
11920 #[inline(always)]
11921 fn default() -> Sc1Cpt {
11922 <crate::RegValueT<Sc1Cpt_SPEC> as RegisterValue<_>>::new(0)
11923 }
11924}
11925
11926#[doc(hidden)]
11927#[derive(Copy, Clone, Eq, PartialEq)]
11928pub struct Sc2Cpt_SPEC;
11929impl crate::sealed::RegSpec for Sc2Cpt_SPEC {
11930 type DataType = u32;
11931}
11932
11933#[doc = "SC2 Capture monitor Register"]
11934pub type Sc2Cpt = crate::RegValueT<Sc2Cpt_SPEC>;
11935
11936impl Sc2Cpt {
11937 #[doc = "SC2 Capture"]
11938 #[inline(always)]
11939 pub fn sc2c(
11940 self,
11941 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Sc2Cpt_SPEC, crate::common::R>
11942 {
11943 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Sc2Cpt_SPEC,crate::common::R>::from_register(self,0)
11944 }
11945}
11946impl ::core::default::Default for Sc2Cpt {
11947 #[inline(always)]
11948 fn default() -> Sc2Cpt {
11949 <crate::RegValueT<Sc2Cpt_SPEC> as RegisterValue<_>>::new(0)
11950 }
11951}