ra4e2_pac/
cec.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:48:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Consumer Electronics Control"]
28unsafe impl ::core::marker::Send for super::Cec {}
29unsafe impl ::core::marker::Sync for super::Cec {}
30impl super::Cec {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CEC Local Address Setting Register"]
38    #[inline(always)]
39    pub const fn cadr(&self) -> &'static crate::common::Reg<self::Cadr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Cadr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "CEC Control Register 1"]
48    #[inline(always)]
49    pub const fn cecctl1(
50        &self,
51    ) -> &'static crate::common::Reg<self::Cecctl1_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Cecctl1_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(2usize),
55            )
56        }
57    }
58
59    #[doc = "CEC Transmission Start Bit Width Setting Register"]
60    #[inline(always)]
61    pub const fn statb(&self) -> &'static crate::common::Reg<self::Statb_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Statb_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(4usize),
65            )
66        }
67    }
68
69    #[doc = "CEC Transmission Start Bit Low Width Setting Register"]
70    #[inline(always)]
71    pub const fn statl(&self) -> &'static crate::common::Reg<self::Statl_SPEC, crate::common::RW> {
72        unsafe {
73            crate::common::Reg::<self::Statl_SPEC, crate::common::RW>::from_ptr(
74                self._svd2pac_as_ptr().add(6usize),
75            )
76        }
77    }
78
79    #[doc = "CEC Transmission Logical 0 Low Width Setting Register"]
80    #[inline(always)]
81    pub const fn lgc0l(&self) -> &'static crate::common::Reg<self::Lgc0L_SPEC, crate::common::RW> {
82        unsafe {
83            crate::common::Reg::<self::Lgc0L_SPEC, crate::common::RW>::from_ptr(
84                self._svd2pac_as_ptr().add(8usize),
85            )
86        }
87    }
88
89    #[doc = "CEC Transmission Logical 1 Low Width Setting Register"]
90    #[inline(always)]
91    pub const fn lgc1l(&self) -> &'static crate::common::Reg<self::Lgc1L_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Lgc1L_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(10usize),
95            )
96        }
97    }
98
99    #[doc = "CEC Transmission Data Bit Width Setting Register"]
100    #[inline(always)]
101    pub const fn datb(&self) -> &'static crate::common::Reg<self::Datb_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::Datb_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(12usize),
105            )
106        }
107    }
108
109    #[doc = "CEC Reception Data Sampling Time Setting Register"]
110    #[inline(always)]
111    pub const fn nomt(&self) -> &'static crate::common::Reg<self::Nomt_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Nomt_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(14usize),
115            )
116        }
117    }
118
119    #[doc = "CEC Reception Start Bit Minimum Low Width Setting Register"]
120    #[inline(always)]
121    pub const fn statll(
122        &self,
123    ) -> &'static crate::common::Reg<self::Statll_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Statll_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(16usize),
127            )
128        }
129    }
130
131    #[doc = "CEC Reception Start Bit Maximum Low Width Setting Register"]
132    #[inline(always)]
133    pub const fn statlh(
134        &self,
135    ) -> &'static crate::common::Reg<self::Statlh_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Statlh_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(18usize),
139            )
140        }
141    }
142
143    #[doc = "CEC Reception Start Bit Minimum Bit Width Setting Register"]
144    #[inline(always)]
145    pub const fn statbl(
146        &self,
147    ) -> &'static crate::common::Reg<self::Statbl_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Statbl_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(20usize),
151            )
152        }
153    }
154
155    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting Register"]
156    #[inline(always)]
157    pub const fn statbh(
158        &self,
159    ) -> &'static crate::common::Reg<self::Statbh_SPEC, crate::common::RW> {
160        unsafe {
161            crate::common::Reg::<self::Statbh_SPEC, crate::common::RW>::from_ptr(
162                self._svd2pac_as_ptr().add(22usize),
163            )
164        }
165    }
166
167    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting Register"]
168    #[inline(always)]
169    pub const fn lgc0ll(
170        &self,
171    ) -> &'static crate::common::Reg<self::Lgc0Ll_SPEC, crate::common::RW> {
172        unsafe {
173            crate::common::Reg::<self::Lgc0Ll_SPEC, crate::common::RW>::from_ptr(
174                self._svd2pac_as_ptr().add(24usize),
175            )
176        }
177    }
178
179    #[doc = "CEC Reception Logical 0 Maximum Low Width Setting Register"]
180    #[inline(always)]
181    pub const fn lgc0lh(
182        &self,
183    ) -> &'static crate::common::Reg<self::Lgc0Lh_SPEC, crate::common::RW> {
184        unsafe {
185            crate::common::Reg::<self::Lgc0Lh_SPEC, crate::common::RW>::from_ptr(
186                self._svd2pac_as_ptr().add(26usize),
187            )
188        }
189    }
190
191    #[doc = "CEC Reception Logical 1 Minimum Low Width Setting Register"]
192    #[inline(always)]
193    pub const fn lgc1ll(
194        &self,
195    ) -> &'static crate::common::Reg<self::Lgc1Ll_SPEC, crate::common::RW> {
196        unsafe {
197            crate::common::Reg::<self::Lgc1Ll_SPEC, crate::common::RW>::from_ptr(
198                self._svd2pac_as_ptr().add(28usize),
199            )
200        }
201    }
202
203    #[doc = "CEC Reception Logical 1 Maximum Low Width Setting Register"]
204    #[inline(always)]
205    pub const fn lgc1lh(
206        &self,
207    ) -> &'static crate::common::Reg<self::Lgc1Lh_SPEC, crate::common::RW> {
208        unsafe {
209            crate::common::Reg::<self::Lgc1Lh_SPEC, crate::common::RW>::from_ptr(
210                self._svd2pac_as_ptr().add(30usize),
211            )
212        }
213    }
214
215    #[doc = "CEC Reception Data Bit Minimum Bit Width Setting Register"]
216    #[inline(always)]
217    pub const fn datbl(&self) -> &'static crate::common::Reg<self::Datbl_SPEC, crate::common::RW> {
218        unsafe {
219            crate::common::Reg::<self::Datbl_SPEC, crate::common::RW>::from_ptr(
220                self._svd2pac_as_ptr().add(32usize),
221            )
222        }
223    }
224
225    #[doc = "CEC Reception Data Bit Maximum Bit Width Setting Register"]
226    #[inline(always)]
227    pub const fn datbh(&self) -> &'static crate::common::Reg<self::Datbh_SPEC, crate::common::RW> {
228        unsafe {
229            crate::common::Reg::<self::Datbh_SPEC, crate::common::RW>::from_ptr(
230                self._svd2pac_as_ptr().add(34usize),
231            )
232        }
233    }
234
235    #[doc = "CEC Data Bit Reference Width Setting Register"]
236    #[inline(always)]
237    pub const fn nomp(&self) -> &'static crate::common::Reg<self::Nomp_SPEC, crate::common::RW> {
238        unsafe {
239            crate::common::Reg::<self::Nomp_SPEC, crate::common::RW>::from_ptr(
240                self._svd2pac_as_ptr().add(36usize),
241            )
242        }
243    }
244
245    #[doc = "CEC Extension Mode Register"]
246    #[inline(always)]
247    pub const fn cecexmd(
248        &self,
249    ) -> &'static crate::common::Reg<self::Cecexmd_SPEC, crate::common::RW> {
250        unsafe {
251            crate::common::Reg::<self::Cecexmd_SPEC, crate::common::RW>::from_ptr(
252                self._svd2pac_as_ptr().add(40usize),
253            )
254        }
255    }
256
257    #[doc = "CEC Extension Monitor Register"]
258    #[inline(always)]
259    pub const fn cecexmon(
260        &self,
261    ) -> &'static crate::common::Reg<self::Cecexmon_SPEC, crate::common::RW> {
262        unsafe {
263            crate::common::Reg::<self::Cecexmon_SPEC, crate::common::RW>::from_ptr(
264                self._svd2pac_as_ptr().add(42usize),
265            )
266        }
267    }
268
269    #[doc = "CEC Transmission Buffer Register"]
270    #[inline(always)]
271    pub const fn ctxd(&self) -> &'static crate::common::Reg<self::Ctxd_SPEC, crate::common::RW> {
272        unsafe {
273            crate::common::Reg::<self::Ctxd_SPEC, crate::common::RW>::from_ptr(
274                self._svd2pac_as_ptr().add(64usize),
275            )
276        }
277    }
278
279    #[doc = "CEC Reception Buffer Register"]
280    #[inline(always)]
281    pub const fn crxd(&self) -> &'static crate::common::Reg<self::Crxd_SPEC, crate::common::RW> {
282        unsafe {
283            crate::common::Reg::<self::Crxd_SPEC, crate::common::RW>::from_ptr(
284                self._svd2pac_as_ptr().add(65usize),
285            )
286        }
287    }
288
289    #[doc = "CEC Communication Error Status Register"]
290    #[inline(always)]
291    pub const fn ceces(&self) -> &'static crate::common::Reg<self::Ceces_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Ceces_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(66usize),
295            )
296        }
297    }
298
299    #[doc = "CEC Communication Status Register"]
300    #[inline(always)]
301    pub const fn cecs(&self) -> &'static crate::common::Reg<self::Cecs_SPEC, crate::common::RW> {
302        unsafe {
303            crate::common::Reg::<self::Cecs_SPEC, crate::common::RW>::from_ptr(
304                self._svd2pac_as_ptr().add(67usize),
305            )
306        }
307    }
308
309    #[doc = "CEC Communication Error Flag Clear Trigger Register"]
310    #[inline(always)]
311    pub const fn cecfc(&self) -> &'static crate::common::Reg<self::Cecfc_SPEC, crate::common::RW> {
312        unsafe {
313            crate::common::Reg::<self::Cecfc_SPEC, crate::common::RW>::from_ptr(
314                self._svd2pac_as_ptr().add(68usize),
315            )
316        }
317    }
318
319    #[doc = "CEC Control Register 0"]
320    #[inline(always)]
321    pub const fn cecctl0(
322        &self,
323    ) -> &'static crate::common::Reg<self::Cecctl0_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Cecctl0_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(69usize),
327            )
328        }
329    }
330}
331#[doc(hidden)]
332#[derive(Copy, Clone, Eq, PartialEq)]
333pub struct Cadr_SPEC;
334impl crate::sealed::RegSpec for Cadr_SPEC {
335    type DataType = u16;
336}
337
338#[doc = "CEC Local Address Setting Register"]
339pub type Cadr = crate::RegValueT<Cadr_SPEC>;
340
341impl Cadr {
342    #[doc = "Local Address at Address 0 (TV)"]
343    #[inline(always)]
344    pub fn adr00(
345        self,
346    ) -> crate::common::RegisterField<
347        0,
348        0x1,
349        1,
350        0,
351        cadr::Adr00,
352        cadr::Adr00,
353        Cadr_SPEC,
354        crate::common::RW,
355    > {
356        crate::common::RegisterField::<
357            0,
358            0x1,
359            1,
360            0,
361            cadr::Adr00,
362            cadr::Adr00,
363            Cadr_SPEC,
364            crate::common::RW,
365        >::from_register(self, 0)
366    }
367
368    #[doc = "Local Address Setting at Address 1 (recording device 1)"]
369    #[inline(always)]
370    pub fn adr01(
371        self,
372    ) -> crate::common::RegisterField<
373        1,
374        0x1,
375        1,
376        0,
377        cadr::Adr01,
378        cadr::Adr01,
379        Cadr_SPEC,
380        crate::common::RW,
381    > {
382        crate::common::RegisterField::<
383            1,
384            0x1,
385            1,
386            0,
387            cadr::Adr01,
388            cadr::Adr01,
389            Cadr_SPEC,
390            crate::common::RW,
391        >::from_register(self, 0)
392    }
393
394    #[doc = "Local Address Setting at Address 2 (recording device 2)"]
395    #[inline(always)]
396    pub fn adr02(
397        self,
398    ) -> crate::common::RegisterField<
399        2,
400        0x1,
401        1,
402        0,
403        cadr::Adr02,
404        cadr::Adr02,
405        Cadr_SPEC,
406        crate::common::RW,
407    > {
408        crate::common::RegisterField::<
409            2,
410            0x1,
411            1,
412            0,
413            cadr::Adr02,
414            cadr::Adr02,
415            Cadr_SPEC,
416            crate::common::RW,
417        >::from_register(self, 0)
418    }
419
420    #[doc = "Local Address Setting at Address 3 (tuner 1)"]
421    #[inline(always)]
422    pub fn adr03(
423        self,
424    ) -> crate::common::RegisterField<
425        3,
426        0x1,
427        1,
428        0,
429        cadr::Adr03,
430        cadr::Adr03,
431        Cadr_SPEC,
432        crate::common::RW,
433    > {
434        crate::common::RegisterField::<
435            3,
436            0x1,
437            1,
438            0,
439            cadr::Adr03,
440            cadr::Adr03,
441            Cadr_SPEC,
442            crate::common::RW,
443        >::from_register(self, 0)
444    }
445
446    #[doc = "Local Address Setting at Address 4 (playback device 1)"]
447    #[inline(always)]
448    pub fn adr04(
449        self,
450    ) -> crate::common::RegisterField<
451        4,
452        0x1,
453        1,
454        0,
455        cadr::Adr04,
456        cadr::Adr04,
457        Cadr_SPEC,
458        crate::common::RW,
459    > {
460        crate::common::RegisterField::<
461            4,
462            0x1,
463            1,
464            0,
465            cadr::Adr04,
466            cadr::Adr04,
467            Cadr_SPEC,
468            crate::common::RW,
469        >::from_register(self, 0)
470    }
471
472    #[doc = "Local Address Setting at Address 5 (audio system)"]
473    #[inline(always)]
474    pub fn adr05(
475        self,
476    ) -> crate::common::RegisterField<
477        5,
478        0x1,
479        1,
480        0,
481        cadr::Adr05,
482        cadr::Adr05,
483        Cadr_SPEC,
484        crate::common::RW,
485    > {
486        crate::common::RegisterField::<
487            5,
488            0x1,
489            1,
490            0,
491            cadr::Adr05,
492            cadr::Adr05,
493            Cadr_SPEC,
494            crate::common::RW,
495        >::from_register(self, 0)
496    }
497
498    #[doc = "Local Address Setting at Address 6 (tuner 2)"]
499    #[inline(always)]
500    pub fn adr06(
501        self,
502    ) -> crate::common::RegisterField<
503        6,
504        0x1,
505        1,
506        0,
507        cadr::Adr06,
508        cadr::Adr06,
509        Cadr_SPEC,
510        crate::common::RW,
511    > {
512        crate::common::RegisterField::<
513            6,
514            0x1,
515            1,
516            0,
517            cadr::Adr06,
518            cadr::Adr06,
519            Cadr_SPEC,
520            crate::common::RW,
521        >::from_register(self, 0)
522    }
523
524    #[doc = "Local Address Setting at Address 7 (tuner 3)"]
525    #[inline(always)]
526    pub fn adr07(
527        self,
528    ) -> crate::common::RegisterField<
529        7,
530        0x1,
531        1,
532        0,
533        cadr::Adr07,
534        cadr::Adr07,
535        Cadr_SPEC,
536        crate::common::RW,
537    > {
538        crate::common::RegisterField::<
539            7,
540            0x1,
541            1,
542            0,
543            cadr::Adr07,
544            cadr::Adr07,
545            Cadr_SPEC,
546            crate::common::RW,
547        >::from_register(self, 0)
548    }
549
550    #[doc = "Local Address Setting at Address 8 (playback device 2)"]
551    #[inline(always)]
552    pub fn adr08(
553        self,
554    ) -> crate::common::RegisterField<
555        8,
556        0x1,
557        1,
558        0,
559        cadr::Adr08,
560        cadr::Adr08,
561        Cadr_SPEC,
562        crate::common::RW,
563    > {
564        crate::common::RegisterField::<
565            8,
566            0x1,
567            1,
568            0,
569            cadr::Adr08,
570            cadr::Adr08,
571            Cadr_SPEC,
572            crate::common::RW,
573        >::from_register(self, 0)
574    }
575
576    #[doc = "Local Address Setting at Address 9 (recording device 3)"]
577    #[inline(always)]
578    pub fn adr09(
579        self,
580    ) -> crate::common::RegisterField<
581        9,
582        0x1,
583        1,
584        0,
585        cadr::Adr09,
586        cadr::Adr09,
587        Cadr_SPEC,
588        crate::common::RW,
589    > {
590        crate::common::RegisterField::<
591            9,
592            0x1,
593            1,
594            0,
595            cadr::Adr09,
596            cadr::Adr09,
597            Cadr_SPEC,
598            crate::common::RW,
599        >::from_register(self, 0)
600    }
601
602    #[doc = "Local Address Setting at Address 10 (tuner 4)"]
603    #[inline(always)]
604    pub fn adr10(
605        self,
606    ) -> crate::common::RegisterField<
607        10,
608        0x1,
609        1,
610        0,
611        cadr::Adr10,
612        cadr::Adr10,
613        Cadr_SPEC,
614        crate::common::RW,
615    > {
616        crate::common::RegisterField::<
617            10,
618            0x1,
619            1,
620            0,
621            cadr::Adr10,
622            cadr::Adr10,
623            Cadr_SPEC,
624            crate::common::RW,
625        >::from_register(self, 0)
626    }
627
628    #[doc = "Local Address Setting at Address 11 (playback device 3)"]
629    #[inline(always)]
630    pub fn adr11(
631        self,
632    ) -> crate::common::RegisterField<
633        11,
634        0x1,
635        1,
636        0,
637        cadr::Adr11,
638        cadr::Adr11,
639        Cadr_SPEC,
640        crate::common::RW,
641    > {
642        crate::common::RegisterField::<
643            11,
644            0x1,
645            1,
646            0,
647            cadr::Adr11,
648            cadr::Adr11,
649            Cadr_SPEC,
650            crate::common::RW,
651        >::from_register(self, 0)
652    }
653
654    #[doc = "Local Address Setting at Address 12 (reserved)"]
655    #[inline(always)]
656    pub fn adr12(
657        self,
658    ) -> crate::common::RegisterField<
659        12,
660        0x1,
661        1,
662        0,
663        cadr::Adr12,
664        cadr::Adr12,
665        Cadr_SPEC,
666        crate::common::RW,
667    > {
668        crate::common::RegisterField::<
669            12,
670            0x1,
671            1,
672            0,
673            cadr::Adr12,
674            cadr::Adr12,
675            Cadr_SPEC,
676            crate::common::RW,
677        >::from_register(self, 0)
678    }
679
680    #[doc = "Local Address Setting at Address 13 (reserved)"]
681    #[inline(always)]
682    pub fn adr13(
683        self,
684    ) -> crate::common::RegisterField<
685        13,
686        0x1,
687        1,
688        0,
689        cadr::Adr13,
690        cadr::Adr13,
691        Cadr_SPEC,
692        crate::common::RW,
693    > {
694        crate::common::RegisterField::<
695            13,
696            0x1,
697            1,
698            0,
699            cadr::Adr13,
700            cadr::Adr13,
701            Cadr_SPEC,
702            crate::common::RW,
703        >::from_register(self, 0)
704    }
705
706    #[doc = "Local Address Setting at Address 14 (specific use)"]
707    #[inline(always)]
708    pub fn adr14(
709        self,
710    ) -> crate::common::RegisterField<
711        14,
712        0x1,
713        1,
714        0,
715        cadr::Adr14,
716        cadr::Adr14,
717        Cadr_SPEC,
718        crate::common::RW,
719    > {
720        crate::common::RegisterField::<
721            14,
722            0x1,
723            1,
724            0,
725            cadr::Adr14,
726            cadr::Adr14,
727            Cadr_SPEC,
728            crate::common::RW,
729        >::from_register(self, 0)
730    }
731}
732impl ::core::default::Default for Cadr {
733    #[inline(always)]
734    fn default() -> Cadr {
735        <crate::RegValueT<Cadr_SPEC> as RegisterValue<_>>::new(0)
736    }
737}
738pub mod cadr {
739
740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
741    pub struct Adr00_SPEC;
742    pub type Adr00 = crate::EnumBitfieldStruct<u8, Adr00_SPEC>;
743    impl Adr00 {
744        #[doc = "Does not set as local address."]
745        pub const _0: Self = Self::new(0);
746
747        #[doc = "Sets as local address."]
748        pub const _1: Self = Self::new(1);
749    }
750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
751    pub struct Adr01_SPEC;
752    pub type Adr01 = crate::EnumBitfieldStruct<u8, Adr01_SPEC>;
753    impl Adr01 {
754        #[doc = "Does not set as local address."]
755        pub const _0: Self = Self::new(0);
756
757        #[doc = "Sets as local address."]
758        pub const _1: Self = Self::new(1);
759    }
760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
761    pub struct Adr02_SPEC;
762    pub type Adr02 = crate::EnumBitfieldStruct<u8, Adr02_SPEC>;
763    impl Adr02 {
764        #[doc = "Does not set as local address."]
765        pub const _0: Self = Self::new(0);
766
767        #[doc = "Sets as local address."]
768        pub const _1: Self = Self::new(1);
769    }
770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
771    pub struct Adr03_SPEC;
772    pub type Adr03 = crate::EnumBitfieldStruct<u8, Adr03_SPEC>;
773    impl Adr03 {
774        #[doc = "Does not set as local address."]
775        pub const _0: Self = Self::new(0);
776
777        #[doc = "Sets as local address."]
778        pub const _1: Self = Self::new(1);
779    }
780    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
781    pub struct Adr04_SPEC;
782    pub type Adr04 = crate::EnumBitfieldStruct<u8, Adr04_SPEC>;
783    impl Adr04 {
784        #[doc = "Does not set as local address."]
785        pub const _0: Self = Self::new(0);
786
787        #[doc = "Sets as local address."]
788        pub const _1: Self = Self::new(1);
789    }
790    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
791    pub struct Adr05_SPEC;
792    pub type Adr05 = crate::EnumBitfieldStruct<u8, Adr05_SPEC>;
793    impl Adr05 {
794        #[doc = "Does not set as local address."]
795        pub const _0: Self = Self::new(0);
796
797        #[doc = "Sets as local address."]
798        pub const _1: Self = Self::new(1);
799    }
800    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
801    pub struct Adr06_SPEC;
802    pub type Adr06 = crate::EnumBitfieldStruct<u8, Adr06_SPEC>;
803    impl Adr06 {
804        #[doc = "Does not set as local address."]
805        pub const _0: Self = Self::new(0);
806
807        #[doc = "Sets as local address."]
808        pub const _1: Self = Self::new(1);
809    }
810    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
811    pub struct Adr07_SPEC;
812    pub type Adr07 = crate::EnumBitfieldStruct<u8, Adr07_SPEC>;
813    impl Adr07 {
814        #[doc = "Does not set as local address."]
815        pub const _0: Self = Self::new(0);
816
817        #[doc = "Sets as local address."]
818        pub const _1: Self = Self::new(1);
819    }
820    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
821    pub struct Adr08_SPEC;
822    pub type Adr08 = crate::EnumBitfieldStruct<u8, Adr08_SPEC>;
823    impl Adr08 {
824        #[doc = "Does not set as local address."]
825        pub const _0: Self = Self::new(0);
826
827        #[doc = "Sets as local address."]
828        pub const _1: Self = Self::new(1);
829    }
830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
831    pub struct Adr09_SPEC;
832    pub type Adr09 = crate::EnumBitfieldStruct<u8, Adr09_SPEC>;
833    impl Adr09 {
834        #[doc = "Does not set as local address."]
835        pub const _0: Self = Self::new(0);
836
837        #[doc = "Sets as local address."]
838        pub const _1: Self = Self::new(1);
839    }
840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
841    pub struct Adr10_SPEC;
842    pub type Adr10 = crate::EnumBitfieldStruct<u8, Adr10_SPEC>;
843    impl Adr10 {
844        #[doc = "Does not set as local address."]
845        pub const _0: Self = Self::new(0);
846
847        #[doc = "Sets as local address."]
848        pub const _1: Self = Self::new(1);
849    }
850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
851    pub struct Adr11_SPEC;
852    pub type Adr11 = crate::EnumBitfieldStruct<u8, Adr11_SPEC>;
853    impl Adr11 {
854        #[doc = "Does not set as local address."]
855        pub const _0: Self = Self::new(0);
856
857        #[doc = "Sets as local address."]
858        pub const _1: Self = Self::new(1);
859    }
860    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
861    pub struct Adr12_SPEC;
862    pub type Adr12 = crate::EnumBitfieldStruct<u8, Adr12_SPEC>;
863    impl Adr12 {
864        #[doc = "Does not set as local address."]
865        pub const _0: Self = Self::new(0);
866
867        #[doc = "Sets as local address."]
868        pub const _1: Self = Self::new(1);
869    }
870    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
871    pub struct Adr13_SPEC;
872    pub type Adr13 = crate::EnumBitfieldStruct<u8, Adr13_SPEC>;
873    impl Adr13 {
874        #[doc = "Does not set as local address."]
875        pub const _0: Self = Self::new(0);
876
877        #[doc = "Sets as local address."]
878        pub const _1: Self = Self::new(1);
879    }
880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
881    pub struct Adr14_SPEC;
882    pub type Adr14 = crate::EnumBitfieldStruct<u8, Adr14_SPEC>;
883    impl Adr14 {
884        #[doc = "Does not set as local address."]
885        pub const _0: Self = Self::new(0);
886
887        #[doc = "Sets as local address."]
888        pub const _1: Self = Self::new(1);
889    }
890}
891#[doc(hidden)]
892#[derive(Copy, Clone, Eq, PartialEq)]
893pub struct Cecctl1_SPEC;
894impl crate::sealed::RegSpec for Cecctl1_SPEC {
895    type DataType = u8;
896}
897
898#[doc = "CEC Control Register 1"]
899pub type Cecctl1 = crate::RegValueT<Cecctl1_SPEC>;
900
901impl Cecctl1 {
902    #[doc = "Signal-Free Time Data Bit Width Select"]
903    #[inline(always)]
904    pub fn sft(
905        self,
906    ) -> crate::common::RegisterField<
907        0,
908        0x3,
909        1,
910        0,
911        cecctl1::Sft,
912        cecctl1::Sft,
913        Cecctl1_SPEC,
914        crate::common::RW,
915    > {
916        crate::common::RegisterField::<
917            0,
918            0x3,
919            1,
920            0,
921            cecctl1::Sft,
922            cecctl1::Sft,
923            Cecctl1_SPEC,
924            crate::common::RW,
925        >::from_register(self, 0)
926    }
927
928    #[doc = "Communication Complete Interrupt (INTCE) Generation Timing Select"]
929    #[inline(always)]
930    pub fn cesel(
931        self,
932    ) -> crate::common::RegisterField<
933        2,
934        0x3,
935        1,
936        0,
937        cecctl1::Cesel,
938        cecctl1::Cesel,
939        Cecctl1_SPEC,
940        crate::common::RW,
941    > {
942        crate::common::RegisterField::<
943            2,
944            0x3,
945            1,
946            0,
947            cecctl1::Cesel,
948            cecctl1::Cesel,
949            Cecctl1_SPEC,
950            crate::common::RW,
951        >::from_register(self, 0)
952    }
953
954    #[doc = "Start Bit Error Detection Select"]
955    #[inline(always)]
956    pub fn sterrd(
957        self,
958    ) -> crate::common::RegisterField<
959        4,
960        0x1,
961        1,
962        0,
963        cecctl1::Sterrd,
964        cecctl1::Sterrd,
965        Cecctl1_SPEC,
966        crate::common::RW,
967    > {
968        crate::common::RegisterField::<
969            4,
970            0x1,
971            1,
972            0,
973            cecctl1::Sterrd,
974            cecctl1::Sterrd,
975            Cecctl1_SPEC,
976            crate::common::RW,
977        >::from_register(self, 0)
978    }
979
980    #[doc = "Bus Lock Detection Select"]
981    #[inline(always)]
982    pub fn blerrd(
983        self,
984    ) -> crate::common::RegisterField<
985        5,
986        0x1,
987        1,
988        0,
989        cecctl1::Blerrd,
990        cecctl1::Blerrd,
991        Cecctl1_SPEC,
992        crate::common::RW,
993    > {
994        crate::common::RegisterField::<
995            5,
996            0x1,
997            1,
998            0,
999            cecctl1::Blerrd,
1000            cecctl1::Blerrd,
1001            Cecctl1_SPEC,
1002            crate::common::RW,
1003        >::from_register(self, 0)
1004    }
1005
1006    #[doc = "CEC Data Interrupt (INTDA) Generation Select"]
1007    #[inline(always)]
1008    pub fn cintmk(
1009        self,
1010    ) -> crate::common::RegisterField<
1011        6,
1012        0x1,
1013        1,
1014        0,
1015        cecctl1::Cintmk,
1016        cecctl1::Cintmk,
1017        Cecctl1_SPEC,
1018        crate::common::RW,
1019    > {
1020        crate::common::RegisterField::<
1021            6,
1022            0x1,
1023            1,
1024            0,
1025            cecctl1::Cintmk,
1026            cecctl1::Cintmk,
1027            Cecctl1_SPEC,
1028            crate::common::RW,
1029        >::from_register(self, 0)
1030    }
1031
1032    #[doc = "Digital Filter Select"]
1033    #[inline(always)]
1034    pub fn cdfc(
1035        self,
1036    ) -> crate::common::RegisterField<
1037        7,
1038        0x1,
1039        1,
1040        0,
1041        cecctl1::Cdfc,
1042        cecctl1::Cdfc,
1043        Cecctl1_SPEC,
1044        crate::common::RW,
1045    > {
1046        crate::common::RegisterField::<
1047            7,
1048            0x1,
1049            1,
1050            0,
1051            cecctl1::Cdfc,
1052            cecctl1::Cdfc,
1053            Cecctl1_SPEC,
1054            crate::common::RW,
1055        >::from_register(self, 0)
1056    }
1057}
1058impl ::core::default::Default for Cecctl1 {
1059    #[inline(always)]
1060    fn default() -> Cecctl1 {
1061        <crate::RegValueT<Cecctl1_SPEC> as RegisterValue<_>>::new(0)
1062    }
1063}
1064pub mod cecctl1 {
1065
1066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1067    pub struct Sft_SPEC;
1068    pub type Sft = crate::EnumBitfieldStruct<u8, Sft_SPEC>;
1069    impl Sft {
1070        #[doc = "3-data bit width"]
1071        pub const _00: Self = Self::new(0);
1072
1073        #[doc = "5-data bit width"]
1074        pub const _01: Self = Self::new(1);
1075
1076        #[doc = "7-data bit width"]
1077        pub const _10: Self = Self::new(2);
1078
1079        #[doc = "Does not detect signal-free time."]
1080        pub const _11: Self = Self::new(3);
1081    }
1082    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1083    pub struct Cesel_SPEC;
1084    pub type Cesel = crate::EnumBitfieldStruct<u8, Cesel_SPEC>;
1085    impl Cesel {
1086        #[doc = "Generates communication complete interrupt once after ACK transmission (reception) of the last frame (EOM = 1) is complete and another time after signal-free time is detected."]
1087        pub const _00: Self = Self::new(0);
1088
1089        #[doc = "Generates communication complete interrupt after ACK transmission (reception) of the last frame (EOM = 1) is completed."]
1090        pub const _01: Self = Self::new(1);
1091
1092        #[doc = "Generates communication complete interrupt after signal-free time is detected."]
1093        pub const _10: Self = Self::new(2);
1094
1095        #[doc = "Setting prohibited"]
1096        pub const _11: Self = Self::new(3);
1097    }
1098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1099    pub struct Sterrd_SPEC;
1100    pub type Sterrd = crate::EnumBitfieldStruct<u8, Sterrd_SPEC>;
1101    impl Sterrd {
1102        #[doc = "Does not detect timing errors during start bit reception."]
1103        pub const _0: Self = Self::new(0);
1104
1105        #[doc = "Detects timing errors during start bit reception."]
1106        pub const _1: Self = Self::new(1);
1107    }
1108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1109    pub struct Blerrd_SPEC;
1110    pub type Blerrd = crate::EnumBitfieldStruct<u8, Blerrd_SPEC>;
1111    impl Blerrd {
1112        #[doc = "Does not detect sticking of receive data to high or low"]
1113        pub const _0: Self = Self::new(0);
1114
1115        #[doc = "Detects sticking of receive data to high or low."]
1116        pub const _1: Self = Self::new(1);
1117    }
1118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1119    pub struct Cintmk_SPEC;
1120    pub type Cintmk = crate::EnumBitfieldStruct<u8, Cintmk_SPEC>;
1121    impl Cintmk {
1122        #[doc = "Does not generate an interrupt when the addresses do not match."]
1123        pub const _0: Self = Self::new(0);
1124
1125        #[doc = "Generates an interrupt when the addresses do not match."]
1126        pub const _1: Self = Self::new(1);
1127    }
1128    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1129    pub struct Cdfc_SPEC;
1130    pub type Cdfc = crate::EnumBitfieldStruct<u8, Cdfc_SPEC>;
1131    impl Cdfc {
1132        #[doc = "Does not use a digital filter."]
1133        pub const _0: Self = Self::new(0);
1134
1135        #[doc = "Uses a digital filter."]
1136        pub const _1: Self = Self::new(1);
1137    }
1138}
1139#[doc(hidden)]
1140#[derive(Copy, Clone, Eq, PartialEq)]
1141pub struct Statb_SPEC;
1142impl crate::sealed::RegSpec for Statb_SPEC {
1143    type DataType = u16;
1144}
1145
1146#[doc = "CEC Transmission Start Bit Width Setting Register"]
1147pub type Statb = crate::RegValueT<Statb_SPEC>;
1148
1149impl Statb {
1150    #[doc = "CEC Transmission Start Bit Width Setting"]
1151    #[inline(always)]
1152    pub fn statb(
1153        self,
1154    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statb_SPEC, crate::common::RW> {
1155        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statb_SPEC,crate::common::RW>::from_register(self,0)
1156    }
1157}
1158impl ::core::default::Default for Statb {
1159    #[inline(always)]
1160    fn default() -> Statb {
1161        <crate::RegValueT<Statb_SPEC> as RegisterValue<_>>::new(0)
1162    }
1163}
1164
1165#[doc(hidden)]
1166#[derive(Copy, Clone, Eq, PartialEq)]
1167pub struct Statl_SPEC;
1168impl crate::sealed::RegSpec for Statl_SPEC {
1169    type DataType = u16;
1170}
1171
1172#[doc = "CEC Transmission Start Bit Low Width Setting Register"]
1173pub type Statl = crate::RegValueT<Statl_SPEC>;
1174
1175impl Statl {
1176    #[doc = "CEC Transmission Start Bit Low Width Setting"]
1177    #[inline(always)]
1178    pub fn statl(
1179        self,
1180    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statl_SPEC, crate::common::RW> {
1181        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statl_SPEC,crate::common::RW>::from_register(self,0)
1182    }
1183}
1184impl ::core::default::Default for Statl {
1185    #[inline(always)]
1186    fn default() -> Statl {
1187        <crate::RegValueT<Statl_SPEC> as RegisterValue<_>>::new(0)
1188    }
1189}
1190
1191#[doc(hidden)]
1192#[derive(Copy, Clone, Eq, PartialEq)]
1193pub struct Lgc0L_SPEC;
1194impl crate::sealed::RegSpec for Lgc0L_SPEC {
1195    type DataType = u16;
1196}
1197
1198#[doc = "CEC Transmission Logical 0 Low Width Setting Register"]
1199pub type Lgc0L = crate::RegValueT<Lgc0L_SPEC>;
1200
1201impl Lgc0L {
1202    #[doc = "CEC Transmission Logical 0 Low Width Setting"]
1203    #[inline(always)]
1204    pub fn lgc0l(
1205        self,
1206    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc0L_SPEC, crate::common::RW> {
1207        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc0L_SPEC,crate::common::RW>::from_register(self,0)
1208    }
1209}
1210impl ::core::default::Default for Lgc0L {
1211    #[inline(always)]
1212    fn default() -> Lgc0L {
1213        <crate::RegValueT<Lgc0L_SPEC> as RegisterValue<_>>::new(0)
1214    }
1215}
1216
1217#[doc(hidden)]
1218#[derive(Copy, Clone, Eq, PartialEq)]
1219pub struct Lgc1L_SPEC;
1220impl crate::sealed::RegSpec for Lgc1L_SPEC {
1221    type DataType = u16;
1222}
1223
1224#[doc = "CEC Transmission Logical 1 Low Width Setting Register"]
1225pub type Lgc1L = crate::RegValueT<Lgc1L_SPEC>;
1226
1227impl Lgc1L {
1228    #[doc = "CEC Transmission Logical 1 Low Width Setting"]
1229    #[inline(always)]
1230    pub fn lgc1l(
1231        self,
1232    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc1L_SPEC, crate::common::RW> {
1233        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc1L_SPEC,crate::common::RW>::from_register(self,0)
1234    }
1235}
1236impl ::core::default::Default for Lgc1L {
1237    #[inline(always)]
1238    fn default() -> Lgc1L {
1239        <crate::RegValueT<Lgc1L_SPEC> as RegisterValue<_>>::new(0)
1240    }
1241}
1242
1243#[doc(hidden)]
1244#[derive(Copy, Clone, Eq, PartialEq)]
1245pub struct Datb_SPEC;
1246impl crate::sealed::RegSpec for Datb_SPEC {
1247    type DataType = u16;
1248}
1249
1250#[doc = "CEC Transmission Data Bit Width Setting Register"]
1251pub type Datb = crate::RegValueT<Datb_SPEC>;
1252
1253impl Datb {
1254    #[doc = "CEC Transmission Data Bit Width Setting"]
1255    #[inline(always)]
1256    pub fn datb(
1257        self,
1258    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Datb_SPEC, crate::common::RW> {
1259        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Datb_SPEC,crate::common::RW>::from_register(self,0)
1260    }
1261}
1262impl ::core::default::Default for Datb {
1263    #[inline(always)]
1264    fn default() -> Datb {
1265        <crate::RegValueT<Datb_SPEC> as RegisterValue<_>>::new(0)
1266    }
1267}
1268
1269#[doc(hidden)]
1270#[derive(Copy, Clone, Eq, PartialEq)]
1271pub struct Nomt_SPEC;
1272impl crate::sealed::RegSpec for Nomt_SPEC {
1273    type DataType = u16;
1274}
1275
1276#[doc = "CEC Reception Data Sampling Time Setting Register"]
1277pub type Nomt = crate::RegValueT<Nomt_SPEC>;
1278
1279impl Nomt {
1280    #[doc = "CEC Reception Data Sampling Time Setting,"]
1281    #[inline(always)]
1282    pub fn nomt(
1283        self,
1284    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Nomt_SPEC, crate::common::RW> {
1285        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Nomt_SPEC,crate::common::RW>::from_register(self,0)
1286    }
1287}
1288impl ::core::default::Default for Nomt {
1289    #[inline(always)]
1290    fn default() -> Nomt {
1291        <crate::RegValueT<Nomt_SPEC> as RegisterValue<_>>::new(0)
1292    }
1293}
1294
1295#[doc(hidden)]
1296#[derive(Copy, Clone, Eq, PartialEq)]
1297pub struct Statll_SPEC;
1298impl crate::sealed::RegSpec for Statll_SPEC {
1299    type DataType = u16;
1300}
1301
1302#[doc = "CEC Reception Start Bit Minimum Low Width Setting Register"]
1303pub type Statll = crate::RegValueT<Statll_SPEC>;
1304
1305impl Statll {
1306    #[doc = "CEC Reception Start Bit Minimum Low Width Setting"]
1307    #[inline(always)]
1308    pub fn statll(
1309        self,
1310    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statll_SPEC, crate::common::RW>
1311    {
1312        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statll_SPEC,crate::common::RW>::from_register(self,0)
1313    }
1314}
1315impl ::core::default::Default for Statll {
1316    #[inline(always)]
1317    fn default() -> Statll {
1318        <crate::RegValueT<Statll_SPEC> as RegisterValue<_>>::new(0)
1319    }
1320}
1321
1322#[doc(hidden)]
1323#[derive(Copy, Clone, Eq, PartialEq)]
1324pub struct Statlh_SPEC;
1325impl crate::sealed::RegSpec for Statlh_SPEC {
1326    type DataType = u16;
1327}
1328
1329#[doc = "CEC Reception Start Bit Maximum Low Width Setting Register"]
1330pub type Statlh = crate::RegValueT<Statlh_SPEC>;
1331
1332impl Statlh {
1333    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting"]
1334    #[inline(always)]
1335    pub fn statlh(
1336        self,
1337    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statlh_SPEC, crate::common::RW>
1338    {
1339        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statlh_SPEC,crate::common::RW>::from_register(self,0)
1340    }
1341}
1342impl ::core::default::Default for Statlh {
1343    #[inline(always)]
1344    fn default() -> Statlh {
1345        <crate::RegValueT<Statlh_SPEC> as RegisterValue<_>>::new(0)
1346    }
1347}
1348
1349#[doc(hidden)]
1350#[derive(Copy, Clone, Eq, PartialEq)]
1351pub struct Statbl_SPEC;
1352impl crate::sealed::RegSpec for Statbl_SPEC {
1353    type DataType = u16;
1354}
1355
1356#[doc = "CEC Reception Start Bit Minimum Bit Width Setting Register"]
1357pub type Statbl = crate::RegValueT<Statbl_SPEC>;
1358
1359impl Statbl {
1360    #[doc = "CEC Reception Start Bit Minimum Bit Width Setting"]
1361    #[inline(always)]
1362    pub fn statbl(
1363        self,
1364    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statbl_SPEC, crate::common::RW>
1365    {
1366        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statbl_SPEC,crate::common::RW>::from_register(self,0)
1367    }
1368}
1369impl ::core::default::Default for Statbl {
1370    #[inline(always)]
1371    fn default() -> Statbl {
1372        <crate::RegValueT<Statbl_SPEC> as RegisterValue<_>>::new(0)
1373    }
1374}
1375
1376#[doc(hidden)]
1377#[derive(Copy, Clone, Eq, PartialEq)]
1378pub struct Statbh_SPEC;
1379impl crate::sealed::RegSpec for Statbh_SPEC {
1380    type DataType = u16;
1381}
1382
1383#[doc = "CEC Reception Start Bit Maximum Bit Width Setting Register"]
1384pub type Statbh = crate::RegValueT<Statbh_SPEC>;
1385
1386impl Statbh {
1387    #[doc = "CEC Reception Start Bit Maximum Bit Width Setting"]
1388    #[inline(always)]
1389    pub fn statbh(
1390        self,
1391    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Statbh_SPEC, crate::common::RW>
1392    {
1393        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Statbh_SPEC,crate::common::RW>::from_register(self,0)
1394    }
1395}
1396impl ::core::default::Default for Statbh {
1397    #[inline(always)]
1398    fn default() -> Statbh {
1399        <crate::RegValueT<Statbh_SPEC> as RegisterValue<_>>::new(0)
1400    }
1401}
1402
1403#[doc(hidden)]
1404#[derive(Copy, Clone, Eq, PartialEq)]
1405pub struct Lgc0Ll_SPEC;
1406impl crate::sealed::RegSpec for Lgc0Ll_SPEC {
1407    type DataType = u16;
1408}
1409
1410#[doc = "CEC Reception Logical 0 Minimum Low Width Setting Register"]
1411pub type Lgc0Ll = crate::RegValueT<Lgc0Ll_SPEC>;
1412
1413impl Lgc0Ll {
1414    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting"]
1415    #[inline(always)]
1416    pub fn lgc0ll(
1417        self,
1418    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc0Ll_SPEC, crate::common::RW>
1419    {
1420        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc0Ll_SPEC,crate::common::RW>::from_register(self,0)
1421    }
1422}
1423impl ::core::default::Default for Lgc0Ll {
1424    #[inline(always)]
1425    fn default() -> Lgc0Ll {
1426        <crate::RegValueT<Lgc0Ll_SPEC> as RegisterValue<_>>::new(0)
1427    }
1428}
1429
1430#[doc(hidden)]
1431#[derive(Copy, Clone, Eq, PartialEq)]
1432pub struct Lgc0Lh_SPEC;
1433impl crate::sealed::RegSpec for Lgc0Lh_SPEC {
1434    type DataType = u16;
1435}
1436
1437#[doc = "CEC Reception Logical 0 Maximum Low Width Setting Register"]
1438pub type Lgc0Lh = crate::RegValueT<Lgc0Lh_SPEC>;
1439
1440impl Lgc0Lh {
1441    #[doc = "CEC Reception Logical 0 Minimum Low Width Setting"]
1442    #[inline(always)]
1443    pub fn lgc0lh(
1444        self,
1445    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc0Lh_SPEC, crate::common::RW>
1446    {
1447        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc0Lh_SPEC,crate::common::RW>::from_register(self,0)
1448    }
1449}
1450impl ::core::default::Default for Lgc0Lh {
1451    #[inline(always)]
1452    fn default() -> Lgc0Lh {
1453        <crate::RegValueT<Lgc0Lh_SPEC> as RegisterValue<_>>::new(0)
1454    }
1455}
1456
1457#[doc(hidden)]
1458#[derive(Copy, Clone, Eq, PartialEq)]
1459pub struct Lgc1Ll_SPEC;
1460impl crate::sealed::RegSpec for Lgc1Ll_SPEC {
1461    type DataType = u16;
1462}
1463
1464#[doc = "CEC Reception Logical 1 Minimum Low Width Setting Register"]
1465pub type Lgc1Ll = crate::RegValueT<Lgc1Ll_SPEC>;
1466
1467impl Lgc1Ll {
1468    #[doc = "CEC Reception Logical 1 Minimum Low Width Setting"]
1469    #[inline(always)]
1470    pub fn lgc1ll(
1471        self,
1472    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc1Ll_SPEC, crate::common::RW>
1473    {
1474        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc1Ll_SPEC,crate::common::RW>::from_register(self,0)
1475    }
1476}
1477impl ::core::default::Default for Lgc1Ll {
1478    #[inline(always)]
1479    fn default() -> Lgc1Ll {
1480        <crate::RegValueT<Lgc1Ll_SPEC> as RegisterValue<_>>::new(0)
1481    }
1482}
1483
1484#[doc(hidden)]
1485#[derive(Copy, Clone, Eq, PartialEq)]
1486pub struct Lgc1Lh_SPEC;
1487impl crate::sealed::RegSpec for Lgc1Lh_SPEC {
1488    type DataType = u16;
1489}
1490
1491#[doc = "CEC Reception Logical 1 Maximum Low Width Setting Register"]
1492pub type Lgc1Lh = crate::RegValueT<Lgc1Lh_SPEC>;
1493
1494impl Lgc1Lh {
1495    #[doc = "CEC Reception Logical 1 Maximum Low Width Setting"]
1496    #[inline(always)]
1497    pub fn lgc1lh(
1498        self,
1499    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Lgc1Lh_SPEC, crate::common::RW>
1500    {
1501        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Lgc1Lh_SPEC,crate::common::RW>::from_register(self,0)
1502    }
1503}
1504impl ::core::default::Default for Lgc1Lh {
1505    #[inline(always)]
1506    fn default() -> Lgc1Lh {
1507        <crate::RegValueT<Lgc1Lh_SPEC> as RegisterValue<_>>::new(0)
1508    }
1509}
1510
1511#[doc(hidden)]
1512#[derive(Copy, Clone, Eq, PartialEq)]
1513pub struct Datbl_SPEC;
1514impl crate::sealed::RegSpec for Datbl_SPEC {
1515    type DataType = u16;
1516}
1517
1518#[doc = "CEC Reception Data Bit Minimum Bit Width Setting Register"]
1519pub type Datbl = crate::RegValueT<Datbl_SPEC>;
1520
1521impl Datbl {
1522    #[doc = "CEC Reception Data Bit Minimum Bit Width Setting"]
1523    #[inline(always)]
1524    pub fn datbl(
1525        self,
1526    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Datbl_SPEC, crate::common::RW> {
1527        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Datbl_SPEC,crate::common::RW>::from_register(self,0)
1528    }
1529}
1530impl ::core::default::Default for Datbl {
1531    #[inline(always)]
1532    fn default() -> Datbl {
1533        <crate::RegValueT<Datbl_SPEC> as RegisterValue<_>>::new(0)
1534    }
1535}
1536
1537#[doc(hidden)]
1538#[derive(Copy, Clone, Eq, PartialEq)]
1539pub struct Datbh_SPEC;
1540impl crate::sealed::RegSpec for Datbh_SPEC {
1541    type DataType = u16;
1542}
1543
1544#[doc = "CEC Reception Data Bit Maximum Bit Width Setting Register"]
1545pub type Datbh = crate::RegValueT<Datbh_SPEC>;
1546
1547impl Datbh {
1548    #[doc = "CEC Reception Data Bit Maximum Bit Width Setting"]
1549    #[inline(always)]
1550    pub fn datbh(
1551        self,
1552    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Datbh_SPEC, crate::common::RW> {
1553        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Datbh_SPEC,crate::common::RW>::from_register(self,0)
1554    }
1555}
1556impl ::core::default::Default for Datbh {
1557    #[inline(always)]
1558    fn default() -> Datbh {
1559        <crate::RegValueT<Datbh_SPEC> as RegisterValue<_>>::new(0)
1560    }
1561}
1562
1563#[doc(hidden)]
1564#[derive(Copy, Clone, Eq, PartialEq)]
1565pub struct Nomp_SPEC;
1566impl crate::sealed::RegSpec for Nomp_SPEC {
1567    type DataType = u16;
1568}
1569
1570#[doc = "CEC Data Bit Reference Width Setting Register"]
1571pub type Nomp = crate::RegValueT<Nomp_SPEC>;
1572
1573impl Nomp {
1574    #[doc = "CEC Data Bit Reference Width Setting"]
1575    #[inline(always)]
1576    pub fn nomp(
1577        self,
1578    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Nomp_SPEC, crate::common::RW> {
1579        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Nomp_SPEC,crate::common::RW>::from_register(self,0)
1580    }
1581}
1582impl ::core::default::Default for Nomp {
1583    #[inline(always)]
1584    fn default() -> Nomp {
1585        <crate::RegValueT<Nomp_SPEC> as RegisterValue<_>>::new(0)
1586    }
1587}
1588
1589#[doc(hidden)]
1590#[derive(Copy, Clone, Eq, PartialEq)]
1591pub struct Cecexmd_SPEC;
1592impl crate::sealed::RegSpec for Cecexmd_SPEC {
1593    type DataType = u8;
1594}
1595
1596#[doc = "CEC Extension Mode Register"]
1597pub type Cecexmd = crate::RegValueT<Cecexmd_SPEC>;
1598
1599impl Cecexmd {
1600    #[doc = "Pulse Output Function Enable by Long Bit Width Error"]
1601    #[inline(always)]
1602    pub fn lerplen(
1603        self,
1604    ) -> crate::common::RegisterField<
1605        4,
1606        0x1,
1607        1,
1608        0,
1609        cecexmd::Lerplen,
1610        cecexmd::Lerplen,
1611        Cecexmd_SPEC,
1612        crate::common::RW,
1613    > {
1614        crate::common::RegisterField::<
1615            4,
1616            0x1,
1617            1,
1618            0,
1619            cecexmd::Lerplen,
1620            cecexmd::Lerplen,
1621            Cecexmd_SPEC,
1622            crate::common::RW,
1623        >::from_register(self, 0)
1624    }
1625
1626    #[doc = "Start Detection Reception Restart Enable"]
1627    #[inline(always)]
1628    pub fn rercven(
1629        self,
1630    ) -> crate::common::RegisterField<
1631        5,
1632        0x1,
1633        1,
1634        0,
1635        cecexmd::Rercven,
1636        cecexmd::Rercven,
1637        Cecexmd_SPEC,
1638        crate::common::RW,
1639    > {
1640        crate::common::RegisterField::<
1641            5,
1642            0x1,
1643            1,
1644            0,
1645            cecexmd::Rercven,
1646            cecexmd::Rercven,
1647            Cecexmd_SPEC,
1648            crate::common::RW,
1649        >::from_register(self, 0)
1650    }
1651
1652    #[doc = "INTDA Reception Interrupt Timing Change"]
1653    #[inline(always)]
1654    pub fn rcvintdsel(
1655        self,
1656    ) -> crate::common::RegisterField<
1657        7,
1658        0x1,
1659        1,
1660        0,
1661        cecexmd::Rcvintdsel,
1662        cecexmd::Rcvintdsel,
1663        Cecexmd_SPEC,
1664        crate::common::RW,
1665    > {
1666        crate::common::RegisterField::<
1667            7,
1668            0x1,
1669            1,
1670            0,
1671            cecexmd::Rcvintdsel,
1672            cecexmd::Rcvintdsel,
1673            Cecexmd_SPEC,
1674            crate::common::RW,
1675        >::from_register(self, 0)
1676    }
1677}
1678impl ::core::default::Default for Cecexmd {
1679    #[inline(always)]
1680    fn default() -> Cecexmd {
1681        <crate::RegValueT<Cecexmd_SPEC> as RegisterValue<_>>::new(0)
1682    }
1683}
1684pub mod cecexmd {
1685
1686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1687    pub struct Lerplen_SPEC;
1688    pub type Lerplen = crate::EnumBitfieldStruct<u8, Lerplen_SPEC>;
1689    impl Lerplen {
1690        #[doc = "Detects only a long bit width error."]
1691        pub const _0: Self = Self::new(0);
1692
1693        #[doc = "Detects a long bit width error and outputs an error handling pulse."]
1694        pub const _1: Self = Self::new(1);
1695    }
1696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1697    pub struct Rercven_SPEC;
1698    pub type Rercven = crate::EnumBitfieldStruct<u8, Rercven_SPEC>;
1699    impl Rercven {
1700        #[doc = "Does not restart reception when the start bit is detected during reception."]
1701        pub const _0: Self = Self::new(0);
1702
1703        #[doc = "Restarts reception when the start bit is detected during reception."]
1704        pub const _1: Self = Self::new(1);
1705    }
1706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1707    pub struct Rcvintdsel_SPEC;
1708    pub type Rcvintdsel = crate::EnumBitfieldStruct<u8, Rcvintdsel_SPEC>;
1709    impl Rcvintdsel {
1710        #[doc = "EOM timing (9th bit of data)"]
1711        pub const _0: Self = Self::new(0);
1712
1713        #[doc = "ACK timing (10th bit of data)"]
1714        pub const _1: Self = Self::new(1);
1715    }
1716}
1717#[doc(hidden)]
1718#[derive(Copy, Clone, Eq, PartialEq)]
1719pub struct Cecexmon_SPEC;
1720impl crate::sealed::RegSpec for Cecexmon_SPEC {
1721    type DataType = u8;
1722}
1723
1724#[doc = "CEC Extension Monitor Register"]
1725pub type Cecexmon = crate::RegValueT<Cecexmon_SPEC>;
1726
1727impl Cecexmon {
1728    #[doc = "CEC Line Monitor"]
1729    #[inline(always)]
1730    pub fn ceclnmon(
1731        self,
1732    ) -> crate::common::RegisterField<
1733        0,
1734        0x1,
1735        1,
1736        0,
1737        cecexmon::Ceclnmon,
1738        cecexmon::Ceclnmon,
1739        Cecexmon_SPEC,
1740        crate::common::R,
1741    > {
1742        crate::common::RegisterField::<
1743            0,
1744            0x1,
1745            1,
1746            0,
1747            cecexmon::Ceclnmon,
1748            cecexmon::Ceclnmon,
1749            Cecexmon_SPEC,
1750            crate::common::R,
1751        >::from_register(self, 0)
1752    }
1753
1754    #[doc = "ACK Flag"]
1755    #[inline(always)]
1756    pub fn ackf(
1757        self,
1758    ) -> crate::common::RegisterFieldBool<1, 1, 0, Cecexmon_SPEC, crate::common::R> {
1759        crate::common::RegisterFieldBool::<1, 1, 0, Cecexmon_SPEC, crate::common::R>::from_register(
1760            self, 0,
1761        )
1762    }
1763}
1764impl ::core::default::Default for Cecexmon {
1765    #[inline(always)]
1766    fn default() -> Cecexmon {
1767        <crate::RegValueT<Cecexmon_SPEC> as RegisterValue<_>>::new(0)
1768    }
1769}
1770pub mod cecexmon {
1771
1772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1773    pub struct Ceclnmon_SPEC;
1774    pub type Ceclnmon = crate::EnumBitfieldStruct<u8, Ceclnmon_SPEC>;
1775    impl Ceclnmon {
1776        #[doc = "Low level"]
1777        pub const _0: Self = Self::new(0);
1778
1779        #[doc = "High level"]
1780        pub const _1: Self = Self::new(1);
1781    }
1782}
1783#[doc(hidden)]
1784#[derive(Copy, Clone, Eq, PartialEq)]
1785pub struct Ctxd_SPEC;
1786impl crate::sealed::RegSpec for Ctxd_SPEC {
1787    type DataType = u8;
1788}
1789
1790#[doc = "CEC Transmission Buffer Register"]
1791pub type Ctxd = crate::RegValueT<Ctxd_SPEC>;
1792
1793impl NoBitfieldReg<Ctxd_SPEC> for Ctxd {}
1794impl ::core::default::Default for Ctxd {
1795    #[inline(always)]
1796    fn default() -> Ctxd {
1797        <crate::RegValueT<Ctxd_SPEC> as RegisterValue<_>>::new(0)
1798    }
1799}
1800
1801#[doc(hidden)]
1802#[derive(Copy, Clone, Eq, PartialEq)]
1803pub struct Crxd_SPEC;
1804impl crate::sealed::RegSpec for Crxd_SPEC {
1805    type DataType = u8;
1806}
1807
1808#[doc = "CEC Reception Buffer Register"]
1809pub type Crxd = crate::RegValueT<Crxd_SPEC>;
1810
1811impl NoBitfieldReg<Crxd_SPEC> for Crxd {}
1812impl ::core::default::Default for Crxd {
1813    #[inline(always)]
1814    fn default() -> Crxd {
1815        <crate::RegValueT<Crxd_SPEC> as RegisterValue<_>>::new(0)
1816    }
1817}
1818
1819#[doc(hidden)]
1820#[derive(Copy, Clone, Eq, PartialEq)]
1821pub struct Ceces_SPEC;
1822impl crate::sealed::RegSpec for Ceces_SPEC {
1823    type DataType = u8;
1824}
1825
1826#[doc = "CEC Communication Error Status Register"]
1827pub type Ceces = crate::RegValueT<Ceces_SPEC>;
1828
1829impl Ceces {
1830    #[doc = "Overrun Error Detection Flag"]
1831    #[inline(always)]
1832    pub fn oerr(
1833        self,
1834    ) -> crate::common::RegisterField<
1835        0,
1836        0x1,
1837        1,
1838        0,
1839        ceces::Oerr,
1840        ceces::Oerr,
1841        Ceces_SPEC,
1842        crate::common::R,
1843    > {
1844        crate::common::RegisterField::<
1845            0,
1846            0x1,
1847            1,
1848            0,
1849            ceces::Oerr,
1850            ceces::Oerr,
1851            Ceces_SPEC,
1852            crate::common::R,
1853        >::from_register(self, 0)
1854    }
1855
1856    #[doc = "Underrun Error Detection Flag"]
1857    #[inline(always)]
1858    pub fn uerr(
1859        self,
1860    ) -> crate::common::RegisterField<
1861        1,
1862        0x1,
1863        1,
1864        0,
1865        ceces::Uerr,
1866        ceces::Uerr,
1867        Ceces_SPEC,
1868        crate::common::R,
1869    > {
1870        crate::common::RegisterField::<
1871            1,
1872            0x1,
1873            1,
1874            0,
1875            ceces::Uerr,
1876            ceces::Uerr,
1877            Ceces_SPEC,
1878            crate::common::R,
1879        >::from_register(self, 0)
1880    }
1881
1882    #[doc = "ACK Error Detection Flag"]
1883    #[inline(always)]
1884    pub fn ackerr(
1885        self,
1886    ) -> crate::common::RegisterField<
1887        2,
1888        0x1,
1889        1,
1890        0,
1891        ceces::Ackerr,
1892        ceces::Ackerr,
1893        Ceces_SPEC,
1894        crate::common::R,
1895    > {
1896        crate::common::RegisterField::<
1897            2,
1898            0x1,
1899            1,
1900            0,
1901            ceces::Ackerr,
1902            ceces::Ackerr,
1903            Ceces_SPEC,
1904            crate::common::R,
1905        >::from_register(self, 0)
1906    }
1907
1908    #[doc = "Timing Error Detection Flag"]
1909    #[inline(always)]
1910    pub fn terr(
1911        self,
1912    ) -> crate::common::RegisterField<
1913        3,
1914        0x1,
1915        1,
1916        0,
1917        ceces::Terr,
1918        ceces::Terr,
1919        Ceces_SPEC,
1920        crate::common::R,
1921    > {
1922        crate::common::RegisterField::<
1923            3,
1924            0x1,
1925            1,
1926            0,
1927            ceces::Terr,
1928            ceces::Terr,
1929            Ceces_SPEC,
1930            crate::common::R,
1931        >::from_register(self, 0)
1932    }
1933
1934    #[doc = "Transmission Error Detection Flag"]
1935    #[inline(always)]
1936    pub fn txerr(
1937        self,
1938    ) -> crate::common::RegisterField<
1939        4,
1940        0x1,
1941        1,
1942        0,
1943        ceces::Txerr,
1944        ceces::Txerr,
1945        Ceces_SPEC,
1946        crate::common::R,
1947    > {
1948        crate::common::RegisterField::<
1949            4,
1950            0x1,
1951            1,
1952            0,
1953            ceces::Txerr,
1954            ceces::Txerr,
1955            Ceces_SPEC,
1956            crate::common::R,
1957        >::from_register(self, 0)
1958    }
1959
1960    #[doc = "Arbitration Loss Detection Flag"]
1961    #[inline(always)]
1962    pub fn aerr(
1963        self,
1964    ) -> crate::common::RegisterField<
1965        5,
1966        0x1,
1967        1,
1968        0,
1969        ceces::Aerr,
1970        ceces::Aerr,
1971        Ceces_SPEC,
1972        crate::common::R,
1973    > {
1974        crate::common::RegisterField::<
1975            5,
1976            0x1,
1977            1,
1978            0,
1979            ceces::Aerr,
1980            ceces::Aerr,
1981            Ceces_SPEC,
1982            crate::common::R,
1983        >::from_register(self, 0)
1984    }
1985
1986    #[doc = "Bus Lock Error Detection Flag"]
1987    #[inline(always)]
1988    pub fn blerr(
1989        self,
1990    ) -> crate::common::RegisterField<
1991        6,
1992        0x1,
1993        1,
1994        0,
1995        ceces::Blerr,
1996        ceces::Blerr,
1997        Ceces_SPEC,
1998        crate::common::R,
1999    > {
2000        crate::common::RegisterField::<
2001            6,
2002            0x1,
2003            1,
2004            0,
2005            ceces::Blerr,
2006            ceces::Blerr,
2007            Ceces_SPEC,
2008            crate::common::R,
2009        >::from_register(self, 0)
2010    }
2011}
2012impl ::core::default::Default for Ceces {
2013    #[inline(always)]
2014    fn default() -> Ceces {
2015        <crate::RegValueT<Ceces_SPEC> as RegisterValue<_>>::new(0)
2016    }
2017}
2018pub mod ceces {
2019
2020    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2021    pub struct Oerr_SPEC;
2022    pub type Oerr = crate::EnumBitfieldStruct<u8, Oerr_SPEC>;
2023    impl Oerr {
2024        #[doc = "No overrun error has occurred."]
2025        pub const _0: Self = Self::new(0);
2026
2027        #[doc = "An overrun error has occurred."]
2028        pub const _1: Self = Self::new(1);
2029    }
2030    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2031    pub struct Uerr_SPEC;
2032    pub type Uerr = crate::EnumBitfieldStruct<u8, Uerr_SPEC>;
2033    impl Uerr {
2034        #[doc = "No underrun error has occurred."]
2035        pub const _0: Self = Self::new(0);
2036
2037        #[doc = "An underrun error has occurred."]
2038        pub const _1: Self = Self::new(1);
2039    }
2040    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2041    pub struct Ackerr_SPEC;
2042    pub type Ackerr = crate::EnumBitfieldStruct<u8, Ackerr_SPEC>;
2043    impl Ackerr {
2044        #[doc = "No ACK error has occurred."]
2045        pub const _0: Self = Self::new(0);
2046
2047        #[doc = "An ACK error has occurred."]
2048        pub const _1: Self = Self::new(1);
2049    }
2050    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2051    pub struct Terr_SPEC;
2052    pub type Terr = crate::EnumBitfieldStruct<u8, Terr_SPEC>;
2053    impl Terr {
2054        #[doc = "No timing error has occurred."]
2055        pub const _0: Self = Self::new(0);
2056
2057        #[doc = "A timing error has occurred."]
2058        pub const _1: Self = Self::new(1);
2059    }
2060    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2061    pub struct Txerr_SPEC;
2062    pub type Txerr = crate::EnumBitfieldStruct<u8, Txerr_SPEC>;
2063    impl Txerr {
2064        #[doc = "No transmission error has occurred."]
2065        pub const _0: Self = Self::new(0);
2066
2067        #[doc = "A transmission error has occurred."]
2068        pub const _1: Self = Self::new(1);
2069    }
2070    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2071    pub struct Aerr_SPEC;
2072    pub type Aerr = crate::EnumBitfieldStruct<u8, Aerr_SPEC>;
2073    impl Aerr {
2074        #[doc = "No arbitration loss has occurred."]
2075        pub const _0: Self = Self::new(0);
2076
2077        #[doc = "An arbitration loss has occurred."]
2078        pub const _1: Self = Self::new(1);
2079    }
2080    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2081    pub struct Blerr_SPEC;
2082    pub type Blerr = crate::EnumBitfieldStruct<u8, Blerr_SPEC>;
2083    impl Blerr {
2084        #[doc = "No bus lock error has occurred."]
2085        pub const _0: Self = Self::new(0);
2086
2087        #[doc = "A bus lock error has occurred."]
2088        pub const _1: Self = Self::new(1);
2089    }
2090}
2091#[doc(hidden)]
2092#[derive(Copy, Clone, Eq, PartialEq)]
2093pub struct Cecs_SPEC;
2094impl crate::sealed::RegSpec for Cecs_SPEC {
2095    type DataType = u8;
2096}
2097
2098#[doc = "CEC Communication Status Register"]
2099pub type Cecs = crate::RegValueT<Cecs_SPEC>;
2100
2101impl Cecs {
2102    #[doc = "Address Match Detection Flag"]
2103    #[inline(always)]
2104    pub fn adrf(
2105        self,
2106    ) -> crate::common::RegisterField<
2107        0,
2108        0x1,
2109        1,
2110        0,
2111        cecs::Adrf,
2112        cecs::Adrf,
2113        Cecs_SPEC,
2114        crate::common::R,
2115    > {
2116        crate::common::RegisterField::<
2117            0,
2118            0x1,
2119            1,
2120            0,
2121            cecs::Adrf,
2122            cecs::Adrf,
2123            Cecs_SPEC,
2124            crate::common::R,
2125        >::from_register(self, 0)
2126    }
2127
2128    #[doc = "Bus Busy Detection Flag"]
2129    #[inline(always)]
2130    pub fn busst(
2131        self,
2132    ) -> crate::common::RegisterField<
2133        1,
2134        0x1,
2135        1,
2136        0,
2137        cecs::Busst,
2138        cecs::Busst,
2139        Cecs_SPEC,
2140        crate::common::R,
2141    > {
2142        crate::common::RegisterField::<
2143            1,
2144            0x1,
2145            1,
2146            0,
2147            cecs::Busst,
2148            cecs::Busst,
2149            Cecs_SPEC,
2150            crate::common::R,
2151        >::from_register(self, 0)
2152    }
2153
2154    #[doc = "Transmission Status Flag"]
2155    #[inline(always)]
2156    pub fn txst(
2157        self,
2158    ) -> crate::common::RegisterField<
2159        2,
2160        0x1,
2161        1,
2162        0,
2163        cecs::Txst,
2164        cecs::Txst,
2165        Cecs_SPEC,
2166        crate::common::R,
2167    > {
2168        crate::common::RegisterField::<
2169            2,
2170            0x1,
2171            1,
2172            0,
2173            cecs::Txst,
2174            cecs::Txst,
2175            Cecs_SPEC,
2176            crate::common::R,
2177        >::from_register(self, 0)
2178    }
2179
2180    #[doc = "EOM Flag"]
2181    #[inline(always)]
2182    pub fn eomf(
2183        self,
2184    ) -> crate::common::RegisterField<
2185        3,
2186        0x1,
2187        1,
2188        0,
2189        cecs::Eomf,
2190        cecs::Eomf,
2191        Cecs_SPEC,
2192        crate::common::R,
2193    > {
2194        crate::common::RegisterField::<
2195            3,
2196            0x1,
2197            1,
2198            0,
2199            cecs::Eomf,
2200            cecs::Eomf,
2201            Cecs_SPEC,
2202            crate::common::R,
2203        >::from_register(self, 0)
2204    }
2205
2206    #[doc = "INTCE Generation Source Flag"]
2207    #[inline(always)]
2208    pub fn itcef(
2209        self,
2210    ) -> crate::common::RegisterField<
2211        4,
2212        0x1,
2213        1,
2214        0,
2215        cecs::Itcef,
2216        cecs::Itcef,
2217        Cecs_SPEC,
2218        crate::common::R,
2219    > {
2220        crate::common::RegisterField::<
2221            4,
2222            0x1,
2223            1,
2224            0,
2225            cecs::Itcef,
2226            cecs::Itcef,
2227            Cecs_SPEC,
2228            crate::common::R,
2229        >::from_register(self, 0)
2230    }
2231
2232    #[doc = "Signal-Free Time Rewrite Disable Report Flag"]
2233    #[inline(always)]
2234    pub fn sftst(
2235        self,
2236    ) -> crate::common::RegisterField<
2237        7,
2238        0x1,
2239        1,
2240        0,
2241        cecs::Sftst,
2242        cecs::Sftst,
2243        Cecs_SPEC,
2244        crate::common::R,
2245    > {
2246        crate::common::RegisterField::<
2247            7,
2248            0x1,
2249            1,
2250            0,
2251            cecs::Sftst,
2252            cecs::Sftst,
2253            Cecs_SPEC,
2254            crate::common::R,
2255        >::from_register(self, 0)
2256    }
2257}
2258impl ::core::default::Default for Cecs {
2259    #[inline(always)]
2260    fn default() -> Cecs {
2261        <crate::RegValueT<Cecs_SPEC> as RegisterValue<_>>::new(0)
2262    }
2263}
2264pub mod cecs {
2265
2266    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2267    pub struct Adrf_SPEC;
2268    pub type Adrf = crate::EnumBitfieldStruct<u8, Adrf_SPEC>;
2269    impl Adrf {
2270        #[doc = "During communication between other stations, while communication is stopped, or while the local station is transmitting"]
2271        pub const _0: Self = Self::new(0);
2272
2273        #[doc = "During local reception"]
2274        pub const _1: Self = Self::new(1);
2275    }
2276    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2277    pub struct Busst_SPEC;
2278    pub type Busst = crate::EnumBitfieldStruct<u8, Busst_SPEC>;
2279    impl Busst {
2280        #[doc = "Bus-free state"]
2281        pub const _0: Self = Self::new(0);
2282
2283        #[doc = "Bus-busy state"]
2284        pub const _1: Self = Self::new(1);
2285    }
2286    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2287    pub struct Txst_SPEC;
2288    pub type Txst = crate::EnumBitfieldStruct<u8, Txst_SPEC>;
2289    impl Txst {
2290        #[doc = "During communication standby state or reception (a follower is operating.)"]
2291        pub const _0: Self = Self::new(0);
2292
2293        #[doc = "During transmission (an initiator is operating.)"]
2294        pub const _1: Self = Self::new(1);
2295    }
2296    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2297    pub struct Eomf_SPEC;
2298    pub type Eomf = crate::EnumBitfieldStruct<u8, Eomf_SPEC>;
2299    impl Eomf {
2300        #[doc = "The EOM flag received immediately before is logically 0."]
2301        pub const _0: Self = Self::new(0);
2302
2303        #[doc = "The EOM flag received immediately before is logically 1."]
2304        pub const _1: Self = Self::new(1);
2305    }
2306    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2307    pub struct Itcef_SPEC;
2308    pub type Itcef = crate::EnumBitfieldStruct<u8, Itcef_SPEC>;
2309    impl Itcef {
2310        #[doc = "Generates a communication complete interrupt (INTCE) if the signal-free time is counted."]
2311        pub const _0: Self = Self::new(0);
2312
2313        #[doc = "Generates INTCE if communication is complete or an error is detected."]
2314        pub const _1: Self = Self::new(1);
2315    }
2316    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2317    pub struct Sftst_SPEC;
2318    pub type Sftst = crate::EnumBitfieldStruct<u8, Sftst_SPEC>;
2319    impl Sftst {
2320        #[doc = "Enables rewriting CECCTL1.SFT\\[1:0\\]."]
2321        pub const _0: Self = Self::new(0);
2322
2323        #[doc = "Disables rewriting CECCTL1.SFT\\[1:0\\]."]
2324        pub const _1: Self = Self::new(1);
2325    }
2326}
2327#[doc(hidden)]
2328#[derive(Copy, Clone, Eq, PartialEq)]
2329pub struct Cecfc_SPEC;
2330impl crate::sealed::RegSpec for Cecfc_SPEC {
2331    type DataType = u8;
2332}
2333
2334#[doc = "CEC Communication Error Flag Clear Trigger Register"]
2335pub type Cecfc = crate::RegValueT<Cecfc_SPEC>;
2336
2337impl Cecfc {
2338    #[doc = "Overrun Error Detection Flag Clear Trigger"]
2339    #[inline(always)]
2340    pub fn octrg(
2341        self,
2342    ) -> crate::common::RegisterField<
2343        0,
2344        0x1,
2345        1,
2346        0,
2347        cecfc::Octrg,
2348        cecfc::Octrg,
2349        Cecfc_SPEC,
2350        crate::common::W,
2351    > {
2352        crate::common::RegisterField::<
2353            0,
2354            0x1,
2355            1,
2356            0,
2357            cecfc::Octrg,
2358            cecfc::Octrg,
2359            Cecfc_SPEC,
2360            crate::common::W,
2361        >::from_register(self, 0)
2362    }
2363
2364    #[doc = "Underrun Error Detection Flag Clear Trigger"]
2365    #[inline(always)]
2366    pub fn uctrg(
2367        self,
2368    ) -> crate::common::RegisterField<
2369        1,
2370        0x1,
2371        1,
2372        0,
2373        cecfc::Uctrg,
2374        cecfc::Uctrg,
2375        Cecfc_SPEC,
2376        crate::common::W,
2377    > {
2378        crate::common::RegisterField::<
2379            1,
2380            0x1,
2381            1,
2382            0,
2383            cecfc::Uctrg,
2384            cecfc::Uctrg,
2385            Cecfc_SPEC,
2386            crate::common::W,
2387        >::from_register(self, 0)
2388    }
2389
2390    #[doc = "ACK Error Detection Flag Clear Trigger"]
2391    #[inline(always)]
2392    pub fn ackctrg(
2393        self,
2394    ) -> crate::common::RegisterField<
2395        2,
2396        0x1,
2397        1,
2398        0,
2399        cecfc::Ackctrg,
2400        cecfc::Ackctrg,
2401        Cecfc_SPEC,
2402        crate::common::W,
2403    > {
2404        crate::common::RegisterField::<
2405            2,
2406            0x1,
2407            1,
2408            0,
2409            cecfc::Ackctrg,
2410            cecfc::Ackctrg,
2411            Cecfc_SPEC,
2412            crate::common::W,
2413        >::from_register(self, 0)
2414    }
2415
2416    #[doc = "Timing Error Detection Flag Clear Trigger"]
2417    #[inline(always)]
2418    pub fn tctrg(
2419        self,
2420    ) -> crate::common::RegisterField<
2421        3,
2422        0x1,
2423        1,
2424        0,
2425        cecfc::Tctrg,
2426        cecfc::Tctrg,
2427        Cecfc_SPEC,
2428        crate::common::W,
2429    > {
2430        crate::common::RegisterField::<
2431            3,
2432            0x1,
2433            1,
2434            0,
2435            cecfc::Tctrg,
2436            cecfc::Tctrg,
2437            Cecfc_SPEC,
2438            crate::common::W,
2439        >::from_register(self, 0)
2440    }
2441
2442    #[doc = "Transmission Error Detection Flag Clear Trigger"]
2443    #[inline(always)]
2444    pub fn txctrg(
2445        self,
2446    ) -> crate::common::RegisterField<
2447        4,
2448        0x1,
2449        1,
2450        0,
2451        cecfc::Txctrg,
2452        cecfc::Txctrg,
2453        Cecfc_SPEC,
2454        crate::common::W,
2455    > {
2456        crate::common::RegisterField::<
2457            4,
2458            0x1,
2459            1,
2460            0,
2461            cecfc::Txctrg,
2462            cecfc::Txctrg,
2463            Cecfc_SPEC,
2464            crate::common::W,
2465        >::from_register(self, 0)
2466    }
2467
2468    #[doc = "Arbitration Loss Detection Flag Clear Trigger"]
2469    #[inline(always)]
2470    pub fn actrg(
2471        self,
2472    ) -> crate::common::RegisterField<
2473        5,
2474        0x1,
2475        1,
2476        0,
2477        cecfc::Actrg,
2478        cecfc::Actrg,
2479        Cecfc_SPEC,
2480        crate::common::W,
2481    > {
2482        crate::common::RegisterField::<
2483            5,
2484            0x1,
2485            1,
2486            0,
2487            cecfc::Actrg,
2488            cecfc::Actrg,
2489            Cecfc_SPEC,
2490            crate::common::W,
2491        >::from_register(self, 0)
2492    }
2493
2494    #[doc = "Bus Lock Error Detection Flag Clear Trigger"]
2495    #[inline(always)]
2496    pub fn blctrg(
2497        self,
2498    ) -> crate::common::RegisterField<
2499        6,
2500        0x1,
2501        1,
2502        0,
2503        cecfc::Blctrg,
2504        cecfc::Blctrg,
2505        Cecfc_SPEC,
2506        crate::common::W,
2507    > {
2508        crate::common::RegisterField::<
2509            6,
2510            0x1,
2511            1,
2512            0,
2513            cecfc::Blctrg,
2514            cecfc::Blctrg,
2515            Cecfc_SPEC,
2516            crate::common::W,
2517        >::from_register(self, 0)
2518    }
2519}
2520impl ::core::default::Default for Cecfc {
2521    #[inline(always)]
2522    fn default() -> Cecfc {
2523        <crate::RegValueT<Cecfc_SPEC> as RegisterValue<_>>::new(0)
2524    }
2525}
2526pub mod cecfc {
2527
2528    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2529    pub struct Octrg_SPEC;
2530    pub type Octrg = crate::EnumBitfieldStruct<u8, Octrg_SPEC>;
2531    impl Octrg {
2532        #[doc = "Does not clear overrun error detection flag."]
2533        pub const _0: Self = Self::new(0);
2534
2535        #[doc = "Clears overrun error detection flag."]
2536        pub const _1: Self = Self::new(1);
2537    }
2538    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2539    pub struct Uctrg_SPEC;
2540    pub type Uctrg = crate::EnumBitfieldStruct<u8, Uctrg_SPEC>;
2541    impl Uctrg {
2542        #[doc = "Does not clear underrun error detection flag."]
2543        pub const _0: Self = Self::new(0);
2544
2545        #[doc = "Clears underrun error detection flag."]
2546        pub const _1: Self = Self::new(1);
2547    }
2548    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2549    pub struct Ackctrg_SPEC;
2550    pub type Ackctrg = crate::EnumBitfieldStruct<u8, Ackctrg_SPEC>;
2551    impl Ackctrg {
2552        #[doc = "Does not clear ACK error detection flag."]
2553        pub const _0: Self = Self::new(0);
2554
2555        #[doc = "Clears ACK error detection flag."]
2556        pub const _1: Self = Self::new(1);
2557    }
2558    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2559    pub struct Tctrg_SPEC;
2560    pub type Tctrg = crate::EnumBitfieldStruct<u8, Tctrg_SPEC>;
2561    impl Tctrg {
2562        #[doc = "Does not clear timing error detection flag."]
2563        pub const _0: Self = Self::new(0);
2564
2565        #[doc = "Clears timing error detection flag."]
2566        pub const _1: Self = Self::new(1);
2567    }
2568    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2569    pub struct Txctrg_SPEC;
2570    pub type Txctrg = crate::EnumBitfieldStruct<u8, Txctrg_SPEC>;
2571    impl Txctrg {
2572        #[doc = "Does not clear transmission error detection flag."]
2573        pub const _0: Self = Self::new(0);
2574
2575        #[doc = "Clears transmission error detection flag."]
2576        pub const _1: Self = Self::new(1);
2577    }
2578    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2579    pub struct Actrg_SPEC;
2580    pub type Actrg = crate::EnumBitfieldStruct<u8, Actrg_SPEC>;
2581    impl Actrg {
2582        #[doc = "Does not clear arbitration loss detection flag."]
2583        pub const _0: Self = Self::new(0);
2584
2585        #[doc = "Clears arbitration loss detection flag."]
2586        pub const _1: Self = Self::new(1);
2587    }
2588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2589    pub struct Blctrg_SPEC;
2590    pub type Blctrg = crate::EnumBitfieldStruct<u8, Blctrg_SPEC>;
2591    impl Blctrg {
2592        #[doc = "Does not clear bus lock error detection flag."]
2593        pub const _0: Self = Self::new(0);
2594
2595        #[doc = "Clears bus lock error detection flag."]
2596        pub const _1: Self = Self::new(1);
2597    }
2598}
2599#[doc(hidden)]
2600#[derive(Copy, Clone, Eq, PartialEq)]
2601pub struct Cecctl0_SPEC;
2602impl crate::sealed::RegSpec for Cecctl0_SPEC {
2603    type DataType = u8;
2604}
2605
2606#[doc = "CEC Control Register 0"]
2607pub type Cecctl0 = crate::RegValueT<Cecctl0_SPEC>;
2608
2609impl Cecctl0 {
2610    #[doc = "EOM Setting"]
2611    #[inline(always)]
2612    pub fn eom(
2613        self,
2614    ) -> crate::common::RegisterField<
2615        0,
2616        0x1,
2617        1,
2618        0,
2619        cecctl0::Eom,
2620        cecctl0::Eom,
2621        Cecctl0_SPEC,
2622        crate::common::RW,
2623    > {
2624        crate::common::RegisterField::<
2625            0,
2626            0x1,
2627            1,
2628            0,
2629            cecctl0::Eom,
2630            cecctl0::Eom,
2631            Cecctl0_SPEC,
2632            crate::common::RW,
2633        >::from_register(self, 0)
2634    }
2635
2636    #[doc = "Reception Enable Control"]
2637    #[inline(always)]
2638    pub fn cecrxen(
2639        self,
2640    ) -> crate::common::RegisterField<
2641        1,
2642        0x1,
2643        1,
2644        0,
2645        cecctl0::Cecrxen,
2646        cecctl0::Cecrxen,
2647        Cecctl0_SPEC,
2648        crate::common::RW,
2649    > {
2650        crate::common::RegisterField::<
2651            1,
2652            0x1,
2653            1,
2654            0,
2655            cecctl0::Cecrxen,
2656            cecctl0::Cecrxen,
2657            Cecctl0_SPEC,
2658            crate::common::RW,
2659        >::from_register(self, 0)
2660    }
2661
2662    #[doc = "Transmission Start Trigger"]
2663    #[inline(always)]
2664    pub fn txtrg(
2665        self,
2666    ) -> crate::common::RegisterField<
2667        2,
2668        0x1,
2669        1,
2670        0,
2671        cecctl0::Txtrg,
2672        cecctl0::Txtrg,
2673        Cecctl0_SPEC,
2674        crate::common::W,
2675    > {
2676        crate::common::RegisterField::<
2677            2,
2678            0x1,
2679            1,
2680            0,
2681            cecctl0::Txtrg,
2682            cecctl0::Txtrg,
2683            Cecctl0_SPEC,
2684            crate::common::W,
2685        >::from_register(self, 0)
2686    }
2687
2688    #[doc = "CEC Clock Select"]
2689    #[inline(always)]
2690    pub fn ccl(
2691        self,
2692    ) -> crate::common::RegisterField<
2693        3,
2694        0x7,
2695        1,
2696        0,
2697        cecctl0::Ccl,
2698        cecctl0::Ccl,
2699        Cecctl0_SPEC,
2700        crate::common::RW,
2701    > {
2702        crate::common::RegisterField::<
2703            3,
2704            0x7,
2705            1,
2706            0,
2707            cecctl0::Ccl,
2708            cecctl0::Ccl,
2709            Cecctl0_SPEC,
2710            crate::common::RW,
2711        >::from_register(self, 0)
2712    }
2713
2714    #[doc = "ACK Bit Timing Error (Bit Width) Check Enable"]
2715    #[inline(always)]
2716    pub fn ackten(
2717        self,
2718    ) -> crate::common::RegisterField<
2719        6,
2720        0x1,
2721        1,
2722        0,
2723        cecctl0::Ackten,
2724        cecctl0::Ackten,
2725        Cecctl0_SPEC,
2726        crate::common::RW,
2727    > {
2728        crate::common::RegisterField::<
2729            6,
2730            0x1,
2731            1,
2732            0,
2733            cecctl0::Ackten,
2734            cecctl0::Ackten,
2735            Cecctl0_SPEC,
2736            crate::common::RW,
2737        >::from_register(self, 0)
2738    }
2739
2740    #[doc = "CEC Operation Enable Flag"]
2741    #[inline(always)]
2742    pub fn cece(
2743        self,
2744    ) -> crate::common::RegisterField<
2745        7,
2746        0x1,
2747        1,
2748        0,
2749        cecctl0::Cece,
2750        cecctl0::Cece,
2751        Cecctl0_SPEC,
2752        crate::common::RW,
2753    > {
2754        crate::common::RegisterField::<
2755            7,
2756            0x1,
2757            1,
2758            0,
2759            cecctl0::Cece,
2760            cecctl0::Cece,
2761            Cecctl0_SPEC,
2762            crate::common::RW,
2763        >::from_register(self, 0)
2764    }
2765}
2766impl ::core::default::Default for Cecctl0 {
2767    #[inline(always)]
2768    fn default() -> Cecctl0 {
2769        <crate::RegValueT<Cecctl0_SPEC> as RegisterValue<_>>::new(0)
2770    }
2771}
2772pub mod cecctl0 {
2773
2774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2775    pub struct Eom_SPEC;
2776    pub type Eom = crate::EnumBitfieldStruct<u8, Eom_SPEC>;
2777    impl Eom {
2778        #[doc = "Continues transmission."]
2779        pub const _0: Self = Self::new(0);
2780
2781        #[doc = "Last frame"]
2782        pub const _1: Self = Self::new(1);
2783    }
2784    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2785    pub struct Cecrxen_SPEC;
2786    pub type Cecrxen = crate::EnumBitfieldStruct<u8, Cecrxen_SPEC>;
2787    impl Cecrxen {
2788        #[doc = "Disables continuing reception or reports abnormal reception."]
2789        pub const _0: Self = Self::new(0);
2790
2791        #[doc = "Enables continuing reception or reports normal reception. lists the reception status and ACK/NACK timing output."]
2792        pub const _1: Self = Self::new(1);
2793    }
2794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2795    pub struct Txtrg_SPEC;
2796    pub type Txtrg = crate::EnumBitfieldStruct<u8, Txtrg_SPEC>;
2797    impl Txtrg {
2798        #[doc = "No effect"]
2799        pub const _0: Self = Self::new(0);
2800
2801        #[doc = "Starts CEC transmission."]
2802        pub const _1: Self = Self::new(1);
2803    }
2804    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2805    pub struct Ccl_SPEC;
2806    pub type Ccl = crate::EnumBitfieldStruct<u8, Ccl_SPEC>;
2807    impl Ccl {
2808        #[doc = "PCLKB/25"]
2809        pub const _000: Self = Self::new(0);
2810
2811        #[doc = "PCLKB/26"]
2812        pub const _001: Self = Self::new(1);
2813
2814        #[doc = "PCLKB/27"]
2815        pub const _010: Self = Self::new(2);
2816
2817        #[doc = "PCLKB/28"]
2818        pub const _011: Self = Self::new(3);
2819
2820        #[doc = "PCLKB/29"]
2821        pub const _100: Self = Self::new(4);
2822
2823        #[doc = "PCLKB/210"]
2824        pub const _101: Self = Self::new(5);
2825
2826        #[doc = "CECCLK (when using SOSC)"]
2827        pub const _110: Self = Self::new(6);
2828
2829        #[doc = "CECCLK/28 (when using MOSC)"]
2830        pub const _111: Self = Self::new(7);
2831    }
2832    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2833    pub struct Ackten_SPEC;
2834    pub type Ackten = crate::EnumBitfieldStruct<u8, Ackten_SPEC>;
2835    impl Ackten {
2836        #[doc = "Does not detect ACK bit timing errors."]
2837        pub const _0: Self = Self::new(0);
2838
2839        #[doc = "Detects ACK bit timing errors."]
2840        pub const _1: Self = Self::new(1);
2841    }
2842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2843    pub struct Cece_SPEC;
2844    pub type Cece = crate::EnumBitfieldStruct<u8, Cece_SPEC>;
2845    impl Cece {
2846        #[doc = "Disables CEC operation."]
2847        pub const _0: Self = Self::new(0);
2848
2849        #[doc = "Enables CEC operation."]
2850        pub const _1: Self = Self::new(1);
2851    }
2852}
ra4e2_pac/cec.rs

ra4e2_pac/
cec.rs
