1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Sound Interface Enhanced (SSIE)"]
28unsafe impl ::core::marker::Send for super::Ssie0 {}
29unsafe impl ::core::marker::Sync for super::Ssie0 {}
30impl super::Ssie0 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Control Register"]
38 #[inline(always)]
39 pub const fn ssicr(&self) -> &'static crate::common::Reg<self::Ssicr_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Ssicr_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Status Register"]
48 #[inline(always)]
49 pub const fn ssisr(&self) -> &'static crate::common::Reg<self::Ssisr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Ssisr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "FIFO Control Register"]
58 #[inline(always)]
59 pub const fn ssifcr(
60 &self,
61 ) -> &'static crate::common::Reg<self::Ssifcr_SPEC, crate::common::RW> {
62 unsafe {
63 crate::common::Reg::<self::Ssifcr_SPEC, crate::common::RW>::from_ptr(
64 self._svd2pac_as_ptr().add(16usize),
65 )
66 }
67 }
68
69 #[doc = "FIFO Status Register"]
70 #[inline(always)]
71 pub const fn ssifsr(
72 &self,
73 ) -> &'static crate::common::Reg<self::Ssifsr_SPEC, crate::common::RW> {
74 unsafe {
75 crate::common::Reg::<self::Ssifsr_SPEC, crate::common::RW>::from_ptr(
76 self._svd2pac_as_ptr().add(20usize),
77 )
78 }
79 }
80
81 #[doc = "Transmit FIFO Data Register"]
82 #[inline(always)]
83 pub const fn ssiftdr(
84 &self,
85 ) -> &'static crate::common::Reg<self::Ssiftdr_SPEC, crate::common::W> {
86 unsafe {
87 crate::common::Reg::<self::Ssiftdr_SPEC, crate::common::W>::from_ptr(
88 self._svd2pac_as_ptr().add(24usize),
89 )
90 }
91 }
92
93 #[doc = "Receive FIFO Data Register"]
94 #[inline(always)]
95 pub const fn ssifrdr(
96 &self,
97 ) -> &'static crate::common::Reg<self::Ssifrdr_SPEC, crate::common::R> {
98 unsafe {
99 crate::common::Reg::<self::Ssifrdr_SPEC, crate::common::R>::from_ptr(
100 self._svd2pac_as_ptr().add(28usize),
101 )
102 }
103 }
104
105 #[doc = "Audio Format Register"]
106 #[inline(always)]
107 pub const fn ssiofr(
108 &self,
109 ) -> &'static crate::common::Reg<self::Ssiofr_SPEC, crate::common::RW> {
110 unsafe {
111 crate::common::Reg::<self::Ssiofr_SPEC, crate::common::RW>::from_ptr(
112 self._svd2pac_as_ptr().add(32usize),
113 )
114 }
115 }
116
117 #[doc = "Status Control Register"]
118 #[inline(always)]
119 pub const fn ssiscr(
120 &self,
121 ) -> &'static crate::common::Reg<self::Ssiscr_SPEC, crate::common::RW> {
122 unsafe {
123 crate::common::Reg::<self::Ssiscr_SPEC, crate::common::RW>::from_ptr(
124 self._svd2pac_as_ptr().add(36usize),
125 )
126 }
127 }
128}
129#[doc(hidden)]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Ssicr_SPEC;
132impl crate::sealed::RegSpec for Ssicr_SPEC {
133 type DataType = u32;
134}
135
136#[doc = "Control Register"]
137pub type Ssicr = crate::RegValueT<Ssicr_SPEC>;
138
139impl Ssicr {
140 #[doc = "Reception Enable"]
141 #[inline(always)]
142 pub fn ren(
143 self,
144 ) -> crate::common::RegisterField<
145 0,
146 0x1,
147 1,
148 0,
149 ssicr::Ren,
150 ssicr::Ren,
151 Ssicr_SPEC,
152 crate::common::RW,
153 > {
154 crate::common::RegisterField::<
155 0,
156 0x1,
157 1,
158 0,
159 ssicr::Ren,
160 ssicr::Ren,
161 Ssicr_SPEC,
162 crate::common::RW,
163 >::from_register(self, 0)
164 }
165
166 #[doc = "Transmission Enable"]
167 #[inline(always)]
168 pub fn ten(
169 self,
170 ) -> crate::common::RegisterField<
171 1,
172 0x1,
173 1,
174 0,
175 ssicr::Ten,
176 ssicr::Ten,
177 Ssicr_SPEC,
178 crate::common::RW,
179 > {
180 crate::common::RegisterField::<
181 1,
182 0x1,
183 1,
184 0,
185 ssicr::Ten,
186 ssicr::Ten,
187 Ssicr_SPEC,
188 crate::common::RW,
189 >::from_register(self, 0)
190 }
191
192 #[doc = "Mute Enable"]
193 #[inline(always)]
194 pub fn muen(
195 self,
196 ) -> crate::common::RegisterField<
197 3,
198 0x1,
199 1,
200 0,
201 ssicr::Muen,
202 ssicr::Muen,
203 Ssicr_SPEC,
204 crate::common::RW,
205 > {
206 crate::common::RegisterField::<
207 3,
208 0x1,
209 1,
210 0,
211 ssicr::Muen,
212 ssicr::Muen,
213 Ssicr_SPEC,
214 crate::common::RW,
215 >::from_register(self, 0)
216 }
217
218 #[doc = "Selects Bit Clock Division Ratio"]
219 #[inline(always)]
220 pub fn ckdv(
221 self,
222 ) -> crate::common::RegisterField<
223 4,
224 0xf,
225 1,
226 0,
227 ssicr::Ckdv,
228 ssicr::Ckdv,
229 Ssicr_SPEC,
230 crate::common::RW,
231 > {
232 crate::common::RegisterField::<
233 4,
234 0xf,
235 1,
236 0,
237 ssicr::Ckdv,
238 ssicr::Ckdv,
239 Ssicr_SPEC,
240 crate::common::RW,
241 >::from_register(self, 0)
242 }
243
244 #[doc = "Selects Serial Data Delay"]
245 #[inline(always)]
246 pub fn del(
247 self,
248 ) -> crate::common::RegisterField<
249 8,
250 0x1,
251 1,
252 0,
253 ssicr::Del,
254 ssicr::Del,
255 Ssicr_SPEC,
256 crate::common::RW,
257 > {
258 crate::common::RegisterField::<
259 8,
260 0x1,
261 1,
262 0,
263 ssicr::Del,
264 ssicr::Del,
265 Ssicr_SPEC,
266 crate::common::RW,
267 >::from_register(self, 0)
268 }
269
270 #[doc = "Selects Placement Data Alignment"]
271 #[inline(always)]
272 pub fn pdta(
273 self,
274 ) -> crate::common::RegisterField<
275 9,
276 0x1,
277 1,
278 0,
279 ssicr::Pdta,
280 ssicr::Pdta,
281 Ssicr_SPEC,
282 crate::common::RW,
283 > {
284 crate::common::RegisterField::<
285 9,
286 0x1,
287 1,
288 0,
289 ssicr::Pdta,
290 ssicr::Pdta,
291 Ssicr_SPEC,
292 crate::common::RW,
293 >::from_register(self, 0)
294 }
295
296 #[doc = "Selects Serial Data Alignment"]
297 #[inline(always)]
298 pub fn sdta(
299 self,
300 ) -> crate::common::RegisterField<
301 10,
302 0x1,
303 1,
304 0,
305 ssicr::Sdta,
306 ssicr::Sdta,
307 Ssicr_SPEC,
308 crate::common::RW,
309 > {
310 crate::common::RegisterField::<
311 10,
312 0x1,
313 1,
314 0,
315 ssicr::Sdta,
316 ssicr::Sdta,
317 Ssicr_SPEC,
318 crate::common::RW,
319 >::from_register(self, 0)
320 }
321
322 #[doc = "Selects Serial Padding Polarity"]
323 #[inline(always)]
324 pub fn spdp(
325 self,
326 ) -> crate::common::RegisterField<
327 11,
328 0x1,
329 1,
330 0,
331 ssicr::Spdp,
332 ssicr::Spdp,
333 Ssicr_SPEC,
334 crate::common::RW,
335 > {
336 crate::common::RegisterField::<
337 11,
338 0x1,
339 1,
340 0,
341 ssicr::Spdp,
342 ssicr::Spdp,
343 Ssicr_SPEC,
344 crate::common::RW,
345 >::from_register(self, 0)
346 }
347
348 #[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
349 #[inline(always)]
350 pub fn lrckp(
351 self,
352 ) -> crate::common::RegisterField<
353 12,
354 0x1,
355 1,
356 0,
357 ssicr::Lrckp,
358 ssicr::Lrckp,
359 Ssicr_SPEC,
360 crate::common::RW,
361 > {
362 crate::common::RegisterField::<
363 12,
364 0x1,
365 1,
366 0,
367 ssicr::Lrckp,
368 ssicr::Lrckp,
369 Ssicr_SPEC,
370 crate::common::RW,
371 >::from_register(self, 0)
372 }
373
374 #[doc = "Selects Bit Clock Polarity"]
375 #[inline(always)]
376 pub fn bckp(
377 self,
378 ) -> crate::common::RegisterField<
379 13,
380 0x1,
381 1,
382 0,
383 ssicr::Bckp,
384 ssicr::Bckp,
385 Ssicr_SPEC,
386 crate::common::RW,
387 > {
388 crate::common::RegisterField::<
389 13,
390 0x1,
391 1,
392 0,
393 ssicr::Bckp,
394 ssicr::Bckp,
395 Ssicr_SPEC,
396 crate::common::RW,
397 >::from_register(self, 0)
398 }
399
400 #[doc = "Master Enable"]
401 #[inline(always)]
402 pub fn mst(
403 self,
404 ) -> crate::common::RegisterField<
405 14,
406 0x1,
407 1,
408 0,
409 ssicr::Mst,
410 ssicr::Mst,
411 Ssicr_SPEC,
412 crate::common::RW,
413 > {
414 crate::common::RegisterField::<
415 14,
416 0x1,
417 1,
418 0,
419 ssicr::Mst,
420 ssicr::Mst,
421 Ssicr_SPEC,
422 crate::common::RW,
423 >::from_register(self, 0)
424 }
425
426 #[doc = "Selects System Word Length"]
427 #[inline(always)]
428 pub fn swl(
429 self,
430 ) -> crate::common::RegisterField<
431 16,
432 0x7,
433 1,
434 0,
435 ssicr::Swl,
436 ssicr::Swl,
437 Ssicr_SPEC,
438 crate::common::RW,
439 > {
440 crate::common::RegisterField::<
441 16,
442 0x7,
443 1,
444 0,
445 ssicr::Swl,
446 ssicr::Swl,
447 Ssicr_SPEC,
448 crate::common::RW,
449 >::from_register(self, 0)
450 }
451
452 #[doc = "Selects Data Word Length"]
453 #[inline(always)]
454 pub fn dwl(
455 self,
456 ) -> crate::common::RegisterField<
457 19,
458 0x7,
459 1,
460 0,
461 ssicr::Dwl,
462 ssicr::Dwl,
463 Ssicr_SPEC,
464 crate::common::RW,
465 > {
466 crate::common::RegisterField::<
467 19,
468 0x7,
469 1,
470 0,
471 ssicr::Dwl,
472 ssicr::Dwl,
473 Ssicr_SPEC,
474 crate::common::RW,
475 >::from_register(self, 0)
476 }
477
478 #[doc = "Selects Frame Word Number"]
479 #[inline(always)]
480 pub fn frm(
481 self,
482 ) -> crate::common::RegisterField<22, 0x3, 1, 0, u8, u8, Ssicr_SPEC, crate::common::RW> {
483 crate::common::RegisterField::<22,0x3,1,0,u8,u8,Ssicr_SPEC,crate::common::RW>::from_register(self,0)
484 }
485
486 #[doc = "Idle Mode Interrupt Output Enable"]
487 #[inline(always)]
488 pub fn iien(
489 self,
490 ) -> crate::common::RegisterField<
491 25,
492 0x1,
493 1,
494 0,
495 ssicr::Iien,
496 ssicr::Iien,
497 Ssicr_SPEC,
498 crate::common::RW,
499 > {
500 crate::common::RegisterField::<
501 25,
502 0x1,
503 1,
504 0,
505 ssicr::Iien,
506 ssicr::Iien,
507 Ssicr_SPEC,
508 crate::common::RW,
509 >::from_register(self, 0)
510 }
511
512 #[doc = "Receive Overflow Interrupt Output Enable"]
513 #[inline(always)]
514 pub fn roien(
515 self,
516 ) -> crate::common::RegisterField<
517 26,
518 0x1,
519 1,
520 0,
521 ssicr::Roien,
522 ssicr::Roien,
523 Ssicr_SPEC,
524 crate::common::RW,
525 > {
526 crate::common::RegisterField::<
527 26,
528 0x1,
529 1,
530 0,
531 ssicr::Roien,
532 ssicr::Roien,
533 Ssicr_SPEC,
534 crate::common::RW,
535 >::from_register(self, 0)
536 }
537
538 #[doc = "Receive Underflow Interrupt Output Enable"]
539 #[inline(always)]
540 pub fn ruien(
541 self,
542 ) -> crate::common::RegisterField<
543 27,
544 0x1,
545 1,
546 0,
547 ssicr::Ruien,
548 ssicr::Ruien,
549 Ssicr_SPEC,
550 crate::common::RW,
551 > {
552 crate::common::RegisterField::<
553 27,
554 0x1,
555 1,
556 0,
557 ssicr::Ruien,
558 ssicr::Ruien,
559 Ssicr_SPEC,
560 crate::common::RW,
561 >::from_register(self, 0)
562 }
563
564 #[doc = "Transmit Overflow Interrupt Output Enable"]
565 #[inline(always)]
566 pub fn toien(
567 self,
568 ) -> crate::common::RegisterField<
569 28,
570 0x1,
571 1,
572 0,
573 ssicr::Toien,
574 ssicr::Toien,
575 Ssicr_SPEC,
576 crate::common::RW,
577 > {
578 crate::common::RegisterField::<
579 28,
580 0x1,
581 1,
582 0,
583 ssicr::Toien,
584 ssicr::Toien,
585 Ssicr_SPEC,
586 crate::common::RW,
587 >::from_register(self, 0)
588 }
589
590 #[doc = "Transmit Underflow Interrupt Output Enable"]
591 #[inline(always)]
592 pub fn tuien(
593 self,
594 ) -> crate::common::RegisterField<
595 29,
596 0x1,
597 1,
598 0,
599 ssicr::Tuien,
600 ssicr::Tuien,
601 Ssicr_SPEC,
602 crate::common::RW,
603 > {
604 crate::common::RegisterField::<
605 29,
606 0x1,
607 1,
608 0,
609 ssicr::Tuien,
610 ssicr::Tuien,
611 Ssicr_SPEC,
612 crate::common::RW,
613 >::from_register(self, 0)
614 }
615}
616impl ::core::default::Default for Ssicr {
617 #[inline(always)]
618 fn default() -> Ssicr {
619 <crate::RegValueT<Ssicr_SPEC> as RegisterValue<_>>::new(0)
620 }
621}
622pub mod ssicr {
623
624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625 pub struct Ren_SPEC;
626 pub type Ren = crate::EnumBitfieldStruct<u8, Ren_SPEC>;
627 impl Ren {
628 #[doc = "Disables reception"]
629 pub const _0: Self = Self::new(0);
630
631 #[doc = "Enables reception (starts reception)"]
632 pub const _1: Self = Self::new(1);
633 }
634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
635 pub struct Ten_SPEC;
636 pub type Ten = crate::EnumBitfieldStruct<u8, Ten_SPEC>;
637 impl Ten {
638 #[doc = "Disables transmission"]
639 pub const _0: Self = Self::new(0);
640
641 #[doc = "Enables transmission (starts transmission)"]
642 pub const _1: Self = Self::new(1);
643 }
644 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
645 pub struct Muen_SPEC;
646 pub type Muen = crate::EnumBitfieldStruct<u8, Muen_SPEC>;
647 impl Muen {
648 #[doc = "Disables muting on the next frame boundary"]
649 pub const _0: Self = Self::new(0);
650
651 #[doc = "Enables muting on the next frame boundary"]
652 pub const _1: Self = Self::new(1);
653 }
654 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
655 pub struct Ckdv_SPEC;
656 pub type Ckdv = crate::EnumBitfieldStruct<u8, Ckdv_SPEC>;
657 impl Ckdv {
658 #[doc = "AUDIO_MCK"]
659 pub const _0_X_0: Self = Self::new(0);
660
661 #[doc = "AUDIO_MCK/2"]
662 pub const _0_X_1: Self = Self::new(1);
663
664 #[doc = "AUDIO_MCK/4"]
665 pub const _0_X_2: Self = Self::new(2);
666
667 #[doc = "AUDIO_MCK/8"]
668 pub const _0_X_3: Self = Self::new(3);
669
670 #[doc = "AUDIO_MCK/16"]
671 pub const _0_X_4: Self = Self::new(4);
672
673 #[doc = "AUDIO_MCK/32"]
674 pub const _0_X_5: Self = Self::new(5);
675
676 #[doc = "AUDIO_MCK/64"]
677 pub const _0_X_6: Self = Self::new(6);
678
679 #[doc = "AUDIO_MCK/128"]
680 pub const _0_X_7: Self = Self::new(7);
681
682 #[doc = "AUDIO_MCK/6"]
683 pub const _0_X_8: Self = Self::new(8);
684
685 #[doc = "AUDIO_MCK/12"]
686 pub const _0_X_9: Self = Self::new(9);
687
688 #[doc = "AUDIO_MCK/24"]
689 pub const _0_X_A: Self = Self::new(10);
690
691 #[doc = "AUDIO_MCK/48"]
692 pub const _0_X_B: Self = Self::new(11);
693
694 #[doc = "AUDIO_MCK/96"]
695 pub const _0_X_C: Self = Self::new(12);
696 }
697 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
698 pub struct Del_SPEC;
699 pub type Del = crate::EnumBitfieldStruct<u8, Del_SPEC>;
700 impl Del {
701 #[doc = "Delay of 1 cycle of SSIBCK0 between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
702 pub const _0: Self = Self::new(0);
703
704 #[doc = "No delay between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
705 pub const _1: Self = Self::new(1);
706 }
707 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
708 pub struct Pdta_SPEC;
709 pub type Pdta = crate::EnumBitfieldStruct<u8, Pdta_SPEC>;
710 impl Pdta {
711 #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
712 pub const _0: Self = Self::new(0);
713
714 #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
715 pub const _1: Self = Self::new(1);
716 }
717 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
718 pub struct Sdta_SPEC;
719 pub type Sdta = crate::EnumBitfieldStruct<u8, Sdta_SPEC>;
720 impl Sdta {
721 #[doc = "Transmits and receives serial data first and then padding bits"]
722 pub const _0: Self = Self::new(0);
723
724 #[doc = "Transmit and receives padding bits first and then serial data"]
725 pub const _1: Self = Self::new(1);
726 }
727 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
728 pub struct Spdp_SPEC;
729 pub type Spdp = crate::EnumBitfieldStruct<u8, Spdp_SPEC>;
730 impl Spdp {
731 #[doc = "Padding data is at a low level"]
732 pub const _0: Self = Self::new(0);
733
734 #[doc = "Padding data is at a high level"]
735 pub const _1: Self = Self::new(1);
736 }
737 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
738 pub struct Lrckp_SPEC;
739 pub type Lrckp = crate::EnumBitfieldStruct<u8, Lrckp_SPEC>;
740 impl Lrckp {
741 #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK0/SSIFS0."]
742 pub const _0: Self = Self::new(0);
743
744 #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK0/SSIFS0."]
745 pub const _1: Self = Self::new(1);
746 }
747 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
748 pub struct Bckp_SPEC;
749 pub type Bckp = crate::EnumBitfieldStruct<u8, Bckp_SPEC>;
750 impl Bckp {
751 #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a falling edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a rising edge of SSIBCK0)."]
752 pub const _0: Self = Self::new(0);
753
754 #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a rising edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a falling edge of SSIBCK0)."]
755 pub const _1: Self = Self::new(1);
756 }
757 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
758 pub struct Mst_SPEC;
759 pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
760 impl Mst {
761 #[doc = "Slave-mode communication"]
762 pub const _0: Self = Self::new(0);
763
764 #[doc = "Master-mode communication"]
765 pub const _1: Self = Self::new(1);
766 }
767 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
768 pub struct Swl_SPEC;
769 pub type Swl = crate::EnumBitfieldStruct<u8, Swl_SPEC>;
770 impl Swl {
771 #[doc = "8 bits"]
772 pub const _000: Self = Self::new(0);
773
774 #[doc = "16 bits"]
775 pub const _001: Self = Self::new(1);
776
777 #[doc = "24 bits"]
778 pub const _010: Self = Self::new(2);
779
780 #[doc = "32 bits"]
781 pub const _011: Self = Self::new(3);
782
783 #[doc = "48 bits"]
784 pub const _100: Self = Self::new(4);
785
786 #[doc = "64 bits"]
787 pub const _101: Self = Self::new(5);
788
789 #[doc = "128 bits"]
790 pub const _110: Self = Self::new(6);
791
792 #[doc = "256 bits"]
793 pub const _111: Self = Self::new(7);
794 }
795 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
796 pub struct Dwl_SPEC;
797 pub type Dwl = crate::EnumBitfieldStruct<u8, Dwl_SPEC>;
798 impl Dwl {
799 #[doc = "8 bits"]
800 pub const _000: Self = Self::new(0);
801
802 #[doc = "16 bits"]
803 pub const _001: Self = Self::new(1);
804
805 #[doc = "18 bits"]
806 pub const _010: Self = Self::new(2);
807
808 #[doc = "20 bits"]
809 pub const _011: Self = Self::new(3);
810
811 #[doc = "22 bits"]
812 pub const _100: Self = Self::new(4);
813
814 #[doc = "24 bits"]
815 pub const _101: Self = Self::new(5);
816
817 #[doc = "32 bits"]
818 pub const _110: Self = Self::new(6);
819
820 #[doc = "Setting prohibited"]
821 pub const _111: Self = Self::new(7);
822 }
823 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
824 pub struct Iien_SPEC;
825 pub type Iien = crate::EnumBitfieldStruct<u8, Iien_SPEC>;
826 impl Iien {
827 #[doc = "Disables idle mode interrupt output"]
828 pub const _0: Self = Self::new(0);
829
830 #[doc = "Enables idle mode interrupt output"]
831 pub const _1: Self = Self::new(1);
832 }
833 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
834 pub struct Roien_SPEC;
835 pub type Roien = crate::EnumBitfieldStruct<u8, Roien_SPEC>;
836 impl Roien {
837 #[doc = "Disables receive overflow interrupt output"]
838 pub const _0: Self = Self::new(0);
839
840 #[doc = "Enables receive overflow interrupt output"]
841 pub const _1: Self = Self::new(1);
842 }
843 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
844 pub struct Ruien_SPEC;
845 pub type Ruien = crate::EnumBitfieldStruct<u8, Ruien_SPEC>;
846 impl Ruien {
847 #[doc = "Disables receive underflow interrupt output"]
848 pub const _0: Self = Self::new(0);
849
850 #[doc = "Enables receive underflow interrupt output"]
851 pub const _1: Self = Self::new(1);
852 }
853 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
854 pub struct Toien_SPEC;
855 pub type Toien = crate::EnumBitfieldStruct<u8, Toien_SPEC>;
856 impl Toien {
857 #[doc = "Disables transmit overflow interrupt output"]
858 pub const _0: Self = Self::new(0);
859
860 #[doc = "Enables transmit overflow interrupt output"]
861 pub const _1: Self = Self::new(1);
862 }
863 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
864 pub struct Tuien_SPEC;
865 pub type Tuien = crate::EnumBitfieldStruct<u8, Tuien_SPEC>;
866 impl Tuien {
867 #[doc = "Disables transmit underflow interrupt output"]
868 pub const _0: Self = Self::new(0);
869
870 #[doc = "Enables transmit underflow interrupt output"]
871 pub const _1: Self = Self::new(1);
872 }
873}
874#[doc(hidden)]
875#[derive(Copy, Clone, Eq, PartialEq)]
876pub struct Ssisr_SPEC;
877impl crate::sealed::RegSpec for Ssisr_SPEC {
878 type DataType = u32;
879}
880
881#[doc = "Status Register"]
882pub type Ssisr = crate::RegValueT<Ssisr_SPEC>;
883
884impl Ssisr {
885 #[doc = "Idle Mode Status Flag"]
886 #[inline(always)]
887 pub fn iirq(
888 self,
889 ) -> crate::common::RegisterField<
890 25,
891 0x1,
892 1,
893 0,
894 ssisr::Iirq,
895 ssisr::Iirq,
896 Ssisr_SPEC,
897 crate::common::R,
898 > {
899 crate::common::RegisterField::<
900 25,
901 0x1,
902 1,
903 0,
904 ssisr::Iirq,
905 ssisr::Iirq,
906 Ssisr_SPEC,
907 crate::common::R,
908 >::from_register(self, 0)
909 }
910
911 #[doc = "Receive Overflow Error Status Flag"]
912 #[inline(always)]
913 pub fn roirq(
914 self,
915 ) -> crate::common::RegisterField<
916 26,
917 0x1,
918 1,
919 0,
920 ssisr::Roirq,
921 ssisr::Roirq,
922 Ssisr_SPEC,
923 crate::common::RW,
924 > {
925 crate::common::RegisterField::<
926 26,
927 0x1,
928 1,
929 0,
930 ssisr::Roirq,
931 ssisr::Roirq,
932 Ssisr_SPEC,
933 crate::common::RW,
934 >::from_register(self, 0)
935 }
936
937 #[doc = "Receive Underflow Error Status Flag"]
938 #[inline(always)]
939 pub fn ruirq(
940 self,
941 ) -> crate::common::RegisterField<
942 27,
943 0x1,
944 1,
945 0,
946 ssisr::Ruirq,
947 ssisr::Ruirq,
948 Ssisr_SPEC,
949 crate::common::RW,
950 > {
951 crate::common::RegisterField::<
952 27,
953 0x1,
954 1,
955 0,
956 ssisr::Ruirq,
957 ssisr::Ruirq,
958 Ssisr_SPEC,
959 crate::common::RW,
960 >::from_register(self, 0)
961 }
962
963 #[doc = "Transmit Overflow Error Status Flag"]
964 #[inline(always)]
965 pub fn toirq(
966 self,
967 ) -> crate::common::RegisterField<
968 28,
969 0x1,
970 1,
971 0,
972 ssisr::Toirq,
973 ssisr::Toirq,
974 Ssisr_SPEC,
975 crate::common::RW,
976 > {
977 crate::common::RegisterField::<
978 28,
979 0x1,
980 1,
981 0,
982 ssisr::Toirq,
983 ssisr::Toirq,
984 Ssisr_SPEC,
985 crate::common::RW,
986 >::from_register(self, 0)
987 }
988
989 #[doc = "Transmit Underflow Error Status flag"]
990 #[inline(always)]
991 pub fn tuirq(
992 self,
993 ) -> crate::common::RegisterField<
994 29,
995 0x1,
996 1,
997 0,
998 ssisr::Tuirq,
999 ssisr::Tuirq,
1000 Ssisr_SPEC,
1001 crate::common::RW,
1002 > {
1003 crate::common::RegisterField::<
1004 29,
1005 0x1,
1006 1,
1007 0,
1008 ssisr::Tuirq,
1009 ssisr::Tuirq,
1010 Ssisr_SPEC,
1011 crate::common::RW,
1012 >::from_register(self, 0)
1013 }
1014}
1015impl ::core::default::Default for Ssisr {
1016 #[inline(always)]
1017 fn default() -> Ssisr {
1018 <crate::RegValueT<Ssisr_SPEC> as RegisterValue<_>>::new(33554432)
1019 }
1020}
1021pub mod ssisr {
1022
1023 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1024 pub struct Iirq_SPEC;
1025 pub type Iirq = crate::EnumBitfieldStruct<u8, Iirq_SPEC>;
1026 impl Iirq {
1027 #[doc = "In the communication state"]
1028 pub const _0: Self = Self::new(0);
1029
1030 #[doc = "In the idle state"]
1031 pub const _1: Self = Self::new(1);
1032 }
1033 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1034 pub struct Roirq_SPEC;
1035 pub type Roirq = crate::EnumBitfieldStruct<u8, Roirq_SPEC>;
1036 impl Roirq {
1037 #[doc = "No receive overflow error is generated."]
1038 pub const _0: Self = Self::new(0);
1039
1040 #[doc = "A receive overflow error is generated."]
1041 pub const _1: Self = Self::new(1);
1042 }
1043 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1044 pub struct Ruirq_SPEC;
1045 pub type Ruirq = crate::EnumBitfieldStruct<u8, Ruirq_SPEC>;
1046 impl Ruirq {
1047 #[doc = "No receive underflow error is generated."]
1048 pub const _0: Self = Self::new(0);
1049
1050 #[doc = "A receive underflow error is generated."]
1051 pub const _1: Self = Self::new(1);
1052 }
1053 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1054 pub struct Toirq_SPEC;
1055 pub type Toirq = crate::EnumBitfieldStruct<u8, Toirq_SPEC>;
1056 impl Toirq {
1057 #[doc = "No transmit overflow error is generated."]
1058 pub const _0: Self = Self::new(0);
1059
1060 #[doc = "A transmit overflow error is generated."]
1061 pub const _1: Self = Self::new(1);
1062 }
1063 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1064 pub struct Tuirq_SPEC;
1065 pub type Tuirq = crate::EnumBitfieldStruct<u8, Tuirq_SPEC>;
1066 impl Tuirq {
1067 #[doc = "No transmit underflow error is generated."]
1068 pub const _0: Self = Self::new(0);
1069
1070 #[doc = "A transmit underflow error is generated."]
1071 pub const _1: Self = Self::new(1);
1072 }
1073}
1074#[doc(hidden)]
1075#[derive(Copy, Clone, Eq, PartialEq)]
1076pub struct Ssifcr_SPEC;
1077impl crate::sealed::RegSpec for Ssifcr_SPEC {
1078 type DataType = u32;
1079}
1080
1081#[doc = "FIFO Control Register"]
1082pub type Ssifcr = crate::RegValueT<Ssifcr_SPEC>;
1083
1084impl Ssifcr {
1085 #[doc = "Receive FIFO Data Register Reset"]
1086 #[inline(always)]
1087 pub fn rfrst(
1088 self,
1089 ) -> crate::common::RegisterField<
1090 0,
1091 0x1,
1092 1,
1093 0,
1094 ssifcr::Rfrst,
1095 ssifcr::Rfrst,
1096 Ssifcr_SPEC,
1097 crate::common::RW,
1098 > {
1099 crate::common::RegisterField::<
1100 0,
1101 0x1,
1102 1,
1103 0,
1104 ssifcr::Rfrst,
1105 ssifcr::Rfrst,
1106 Ssifcr_SPEC,
1107 crate::common::RW,
1108 >::from_register(self, 0)
1109 }
1110
1111 #[doc = "Transmit FIFO Data Register Reset"]
1112 #[inline(always)]
1113 pub fn tfrst(
1114 self,
1115 ) -> crate::common::RegisterField<
1116 1,
1117 0x1,
1118 1,
1119 0,
1120 ssifcr::Tfrst,
1121 ssifcr::Tfrst,
1122 Ssifcr_SPEC,
1123 crate::common::RW,
1124 > {
1125 crate::common::RegisterField::<
1126 1,
1127 0x1,
1128 1,
1129 0,
1130 ssifcr::Tfrst,
1131 ssifcr::Tfrst,
1132 Ssifcr_SPEC,
1133 crate::common::RW,
1134 >::from_register(self, 0)
1135 }
1136
1137 #[doc = "Receive Data Full Interrupt Output Enable"]
1138 #[inline(always)]
1139 pub fn rie(
1140 self,
1141 ) -> crate::common::RegisterField<
1142 2,
1143 0x1,
1144 1,
1145 0,
1146 ssifcr::Rie,
1147 ssifcr::Rie,
1148 Ssifcr_SPEC,
1149 crate::common::RW,
1150 > {
1151 crate::common::RegisterField::<
1152 2,
1153 0x1,
1154 1,
1155 0,
1156 ssifcr::Rie,
1157 ssifcr::Rie,
1158 Ssifcr_SPEC,
1159 crate::common::RW,
1160 >::from_register(self, 0)
1161 }
1162
1163 #[doc = "Transmit Data Empty Interrupt Output Enable"]
1164 #[inline(always)]
1165 pub fn tie(
1166 self,
1167 ) -> crate::common::RegisterField<
1168 3,
1169 0x1,
1170 1,
1171 0,
1172 ssifcr::Tie,
1173 ssifcr::Tie,
1174 Ssifcr_SPEC,
1175 crate::common::RW,
1176 > {
1177 crate::common::RegisterField::<
1178 3,
1179 0x1,
1180 1,
1181 0,
1182 ssifcr::Tie,
1183 ssifcr::Tie,
1184 Ssifcr_SPEC,
1185 crate::common::RW,
1186 >::from_register(self, 0)
1187 }
1188
1189 #[doc = "Byte Swap Enable"]
1190 #[inline(always)]
1191 pub fn bsw(
1192 self,
1193 ) -> crate::common::RegisterField<
1194 11,
1195 0x1,
1196 1,
1197 0,
1198 ssifcr::Bsw,
1199 ssifcr::Bsw,
1200 Ssifcr_SPEC,
1201 crate::common::RW,
1202 > {
1203 crate::common::RegisterField::<
1204 11,
1205 0x1,
1206 1,
1207 0,
1208 ssifcr::Bsw,
1209 ssifcr::Bsw,
1210 Ssifcr_SPEC,
1211 crate::common::RW,
1212 >::from_register(self, 0)
1213 }
1214
1215 #[doc = "Software Reset"]
1216 #[inline(always)]
1217 pub fn ssirst(
1218 self,
1219 ) -> crate::common::RegisterField<
1220 16,
1221 0x1,
1222 1,
1223 0,
1224 ssifcr::Ssirst,
1225 ssifcr::Ssirst,
1226 Ssifcr_SPEC,
1227 crate::common::RW,
1228 > {
1229 crate::common::RegisterField::<
1230 16,
1231 0x1,
1232 1,
1233 0,
1234 ssifcr::Ssirst,
1235 ssifcr::Ssirst,
1236 Ssifcr_SPEC,
1237 crate::common::RW,
1238 >::from_register(self, 0)
1239 }
1240
1241 #[doc = "AUDIO_MCK Enable in Master-mode Communication"]
1242 #[inline(always)]
1243 pub fn aucke(
1244 self,
1245 ) -> crate::common::RegisterField<
1246 31,
1247 0x1,
1248 1,
1249 0,
1250 ssifcr::Aucke,
1251 ssifcr::Aucke,
1252 Ssifcr_SPEC,
1253 crate::common::RW,
1254 > {
1255 crate::common::RegisterField::<
1256 31,
1257 0x1,
1258 1,
1259 0,
1260 ssifcr::Aucke,
1261 ssifcr::Aucke,
1262 Ssifcr_SPEC,
1263 crate::common::RW,
1264 >::from_register(self, 0)
1265 }
1266}
1267impl ::core::default::Default for Ssifcr {
1268 #[inline(always)]
1269 fn default() -> Ssifcr {
1270 <crate::RegValueT<Ssifcr_SPEC> as RegisterValue<_>>::new(0)
1271 }
1272}
1273pub mod ssifcr {
1274
1275 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1276 pub struct Rfrst_SPEC;
1277 pub type Rfrst = crate::EnumBitfieldStruct<u8, Rfrst_SPEC>;
1278 impl Rfrst {
1279 #[doc = "Clears a receive data FIFO reset condition"]
1280 pub const _0: Self = Self::new(0);
1281
1282 #[doc = "Sets a receive data FIFO reset condition"]
1283 pub const _1: Self = Self::new(1);
1284 }
1285 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1286 pub struct Tfrst_SPEC;
1287 pub type Tfrst = crate::EnumBitfieldStruct<u8, Tfrst_SPEC>;
1288 impl Tfrst {
1289 #[doc = "Clears a transmit data FIFO reset condition"]
1290 pub const _0: Self = Self::new(0);
1291
1292 #[doc = "Sets a transmit data FIFO reset condition"]
1293 pub const _1: Self = Self::new(1);
1294 }
1295 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1296 pub struct Rie_SPEC;
1297 pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
1298 impl Rie {
1299 #[doc = "Disables receive data full interrupts"]
1300 pub const _0: Self = Self::new(0);
1301
1302 #[doc = "Enables receive data full interrupts"]
1303 pub const _1: Self = Self::new(1);
1304 }
1305 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1306 pub struct Tie_SPEC;
1307 pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
1308 impl Tie {
1309 #[doc = "Disables transmit data empty interrupts"]
1310 pub const _0: Self = Self::new(0);
1311
1312 #[doc = "Enables transmit data empty interrupts"]
1313 pub const _1: Self = Self::new(1);
1314 }
1315 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1316 pub struct Bsw_SPEC;
1317 pub type Bsw = crate::EnumBitfieldStruct<u8, Bsw_SPEC>;
1318 impl Bsw {
1319 #[doc = "Disables byte swap"]
1320 pub const _0: Self = Self::new(0);
1321
1322 #[doc = "Enables byte swap"]
1323 pub const _1: Self = Self::new(1);
1324 }
1325 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1326 pub struct Ssirst_SPEC;
1327 pub type Ssirst = crate::EnumBitfieldStruct<u8, Ssirst_SPEC>;
1328 impl Ssirst {
1329 #[doc = "Clears a software reset condition"]
1330 pub const _0: Self = Self::new(0);
1331
1332 #[doc = "Sets a software reset condition"]
1333 pub const _1: Self = Self::new(1);
1334 }
1335 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1336 pub struct Aucke_SPEC;
1337 pub type Aucke = crate::EnumBitfieldStruct<u8, Aucke_SPEC>;
1338 impl Aucke {
1339 #[doc = "Disables supply of AUDIO_MCK"]
1340 pub const _0: Self = Self::new(0);
1341
1342 #[doc = "Enables supply of AUDIO_MCK"]
1343 pub const _1: Self = Self::new(1);
1344 }
1345}
1346#[doc(hidden)]
1347#[derive(Copy, Clone, Eq, PartialEq)]
1348pub struct Ssifsr_SPEC;
1349impl crate::sealed::RegSpec for Ssifsr_SPEC {
1350 type DataType = u32;
1351}
1352
1353#[doc = "FIFO Status Register"]
1354pub type Ssifsr = crate::RegValueT<Ssifsr_SPEC>;
1355
1356impl Ssifsr {
1357 #[doc = "Receive Data Full Flag"]
1358 #[inline(always)]
1359 pub fn rdf(
1360 self,
1361 ) -> crate::common::RegisterField<
1362 0,
1363 0x1,
1364 1,
1365 0,
1366 ssifsr::Rdf,
1367 ssifsr::Rdf,
1368 Ssifsr_SPEC,
1369 crate::common::RW,
1370 > {
1371 crate::common::RegisterField::<
1372 0,
1373 0x1,
1374 1,
1375 0,
1376 ssifsr::Rdf,
1377 ssifsr::Rdf,
1378 Ssifsr_SPEC,
1379 crate::common::RW,
1380 >::from_register(self, 0)
1381 }
1382
1383 #[doc = "Receive Data Count"]
1384 #[inline(always)]
1385 pub fn rdc(
1386 self,
1387 ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1388 crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1389 }
1390
1391 #[doc = "Transmit Data Empty Flag"]
1392 #[inline(always)]
1393 pub fn tde(
1394 self,
1395 ) -> crate::common::RegisterField<
1396 16,
1397 0x1,
1398 1,
1399 0,
1400 ssifsr::Tde,
1401 ssifsr::Tde,
1402 Ssifsr_SPEC,
1403 crate::common::RW,
1404 > {
1405 crate::common::RegisterField::<
1406 16,
1407 0x1,
1408 1,
1409 0,
1410 ssifsr::Tde,
1411 ssifsr::Tde,
1412 Ssifsr_SPEC,
1413 crate::common::RW,
1414 >::from_register(self, 0)
1415 }
1416
1417 #[doc = "Transmit Data Count"]
1418 #[inline(always)]
1419 pub fn tdc(
1420 self,
1421 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1422 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1423 }
1424}
1425impl ::core::default::Default for Ssifsr {
1426 #[inline(always)]
1427 fn default() -> Ssifsr {
1428 <crate::RegValueT<Ssifsr_SPEC> as RegisterValue<_>>::new(65536)
1429 }
1430}
1431pub mod ssifsr {
1432
1433 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1434 pub struct Rdf_SPEC;
1435 pub type Rdf = crate::EnumBitfieldStruct<u8, Rdf_SPEC>;
1436 impl Rdf {
1437 #[doc = "The size of received data in SSIFRDR is not more than the value of SSISCR.RDFS."]
1438 pub const _0: Self = Self::new(0);
1439
1440 #[doc = "The size of received data in SSIFRDR is not less than the value of SSISCR.RDFS plus one."]
1441 pub const _1: Self = Self::new(1);
1442 }
1443 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1444 pub struct Tde_SPEC;
1445 pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
1446 impl Tde {
1447 #[doc = "The free space of SSIFTDR is not more than the value of SSISCR.TDES."]
1448 pub const _0: Self = Self::new(0);
1449
1450 #[doc = "The free space of SSIFTDR is not less than the value of SSISCR.TDES plus one."]
1451 pub const _1: Self = Self::new(1);
1452 }
1453}
1454#[doc(hidden)]
1455#[derive(Copy, Clone, Eq, PartialEq)]
1456pub struct Ssiftdr_SPEC;
1457impl crate::sealed::RegSpec for Ssiftdr_SPEC {
1458 type DataType = u32;
1459}
1460
1461#[doc = "Transmit FIFO Data Register"]
1462pub type Ssiftdr = crate::RegValueT<Ssiftdr_SPEC>;
1463
1464impl Ssiftdr {
1465 #[doc = "Transmit FIFO Data"]
1466 #[inline(always)]
1467 pub fn ssiftdr(
1468 self,
1469 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssiftdr_SPEC, crate::common::W>
1470 {
1471 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssiftdr_SPEC,crate::common::W>::from_register(self,0)
1472 }
1473}
1474impl ::core::default::Default for Ssiftdr {
1475 #[inline(always)]
1476 fn default() -> Ssiftdr {
1477 <crate::RegValueT<Ssiftdr_SPEC> as RegisterValue<_>>::new(0)
1478 }
1479}
1480
1481#[doc(hidden)]
1482#[derive(Copy, Clone, Eq, PartialEq)]
1483pub struct Ssifrdr_SPEC;
1484impl crate::sealed::RegSpec for Ssifrdr_SPEC {
1485 type DataType = u32;
1486}
1487
1488#[doc = "Receive FIFO Data Register"]
1489pub type Ssifrdr = crate::RegValueT<Ssifrdr_SPEC>;
1490
1491impl Ssifrdr {
1492 #[doc = "Receive FIFO Data"]
1493 #[inline(always)]
1494 pub fn ssifrdr(
1495 self,
1496 ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssifrdr_SPEC, crate::common::R>
1497 {
1498 crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssifrdr_SPEC,crate::common::R>::from_register(self,0)
1499 }
1500}
1501impl ::core::default::Default for Ssifrdr {
1502 #[inline(always)]
1503 fn default() -> Ssifrdr {
1504 <crate::RegValueT<Ssifrdr_SPEC> as RegisterValue<_>>::new(0)
1505 }
1506}
1507
1508#[doc(hidden)]
1509#[derive(Copy, Clone, Eq, PartialEq)]
1510pub struct Ssiofr_SPEC;
1511impl crate::sealed::RegSpec for Ssiofr_SPEC {
1512 type DataType = u32;
1513}
1514
1515#[doc = "Audio Format Register"]
1516pub type Ssiofr = crate::RegValueT<Ssiofr_SPEC>;
1517
1518impl Ssiofr {
1519 #[doc = "Audio Format Select"]
1520 #[inline(always)]
1521 pub fn omod(
1522 self,
1523 ) -> crate::common::RegisterField<
1524 0,
1525 0x3,
1526 1,
1527 0,
1528 ssiofr::Omod,
1529 ssiofr::Omod,
1530 Ssiofr_SPEC,
1531 crate::common::RW,
1532 > {
1533 crate::common::RegisterField::<
1534 0,
1535 0x3,
1536 1,
1537 0,
1538 ssiofr::Omod,
1539 ssiofr::Omod,
1540 Ssiofr_SPEC,
1541 crate::common::RW,
1542 >::from_register(self, 0)
1543 }
1544
1545 #[doc = "Whether to Enable LRCK/FS Continuation"]
1546 #[inline(always)]
1547 pub fn lrcont(
1548 self,
1549 ) -> crate::common::RegisterField<
1550 8,
1551 0x1,
1552 1,
1553 0,
1554 ssiofr::Lrcont,
1555 ssiofr::Lrcont,
1556 Ssiofr_SPEC,
1557 crate::common::RW,
1558 > {
1559 crate::common::RegisterField::<
1560 8,
1561 0x1,
1562 1,
1563 0,
1564 ssiofr::Lrcont,
1565 ssiofr::Lrcont,
1566 Ssiofr_SPEC,
1567 crate::common::RW,
1568 >::from_register(self, 0)
1569 }
1570
1571 #[doc = "Whether to Enable Stopping BCK Output When SSIE is in Idle Status"]
1572 #[inline(always)]
1573 pub fn bckastp(
1574 self,
1575 ) -> crate::common::RegisterField<
1576 9,
1577 0x1,
1578 1,
1579 0,
1580 ssiofr::Bckastp,
1581 ssiofr::Bckastp,
1582 Ssiofr_SPEC,
1583 crate::common::RW,
1584 > {
1585 crate::common::RegisterField::<
1586 9,
1587 0x1,
1588 1,
1589 0,
1590 ssiofr::Bckastp,
1591 ssiofr::Bckastp,
1592 Ssiofr_SPEC,
1593 crate::common::RW,
1594 >::from_register(self, 0)
1595 }
1596}
1597impl ::core::default::Default for Ssiofr {
1598 #[inline(always)]
1599 fn default() -> Ssiofr {
1600 <crate::RegValueT<Ssiofr_SPEC> as RegisterValue<_>>::new(0)
1601 }
1602}
1603pub mod ssiofr {
1604
1605 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1606 pub struct Omod_SPEC;
1607 pub type Omod = crate::EnumBitfieldStruct<u8, Omod_SPEC>;
1608 impl Omod {
1609 #[doc = "I2S format"]
1610 pub const _00: Self = Self::new(0);
1611
1612 #[doc = "TDM format"]
1613 pub const _01: Self = Self::new(1);
1614
1615 #[doc = "Monaural format"]
1616 pub const _10: Self = Self::new(2);
1617
1618 #[doc = "Setting prohibited"]
1619 pub const _11: Self = Self::new(3);
1620 }
1621 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1622 pub struct Lrcont_SPEC;
1623 pub type Lrcont = crate::EnumBitfieldStruct<u8, Lrcont_SPEC>;
1624 impl Lrcont {
1625 #[doc = "Disables LRCK/FS continuation"]
1626 pub const _0: Self = Self::new(0);
1627
1628 #[doc = "Enables LRCK/FS continuation"]
1629 pub const _1: Self = Self::new(1);
1630 }
1631 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1632 pub struct Bckastp_SPEC;
1633 pub type Bckastp = crate::EnumBitfieldStruct<u8, Bckastp_SPEC>;
1634 impl Bckastp {
1635 #[doc = "Always outputs BCK to the SSIBCK0 pin"]
1636 pub const _0: Self = Self::new(0);
1637
1638 #[doc = "Automatically controls output of BCK to the SSIBCK0 pin"]
1639 pub const _1: Self = Self::new(1);
1640 }
1641}
1642#[doc(hidden)]
1643#[derive(Copy, Clone, Eq, PartialEq)]
1644pub struct Ssiscr_SPEC;
1645impl crate::sealed::RegSpec for Ssiscr_SPEC {
1646 type DataType = u32;
1647}
1648
1649#[doc = "Status Control Register"]
1650pub type Ssiscr = crate::RegValueT<Ssiscr_SPEC>;
1651
1652impl Ssiscr {
1653 #[doc = "RDF Setting Condition Select"]
1654 #[inline(always)]
1655 pub fn rdfs(
1656 self,
1657 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1658 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1659 }
1660
1661 #[doc = "TDE Setting Condition Select"]
1662 #[inline(always)]
1663 pub fn tdes(
1664 self,
1665 ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1666 crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1667 }
1668}
1669impl ::core::default::Default for Ssiscr {
1670 #[inline(always)]
1671 fn default() -> Ssiscr {
1672 <crate::RegValueT<Ssiscr_SPEC> as RegisterValue<_>>::new(0)
1673 }
1674}