1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"I3C Bus Interface"]
28unsafe impl ::core::marker::Send for super::I3C {}
29unsafe impl ::core::marker::Sync for super::I3C {}
30impl super::I3C {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Protocol Selection Register"]
38 #[inline(always)]
39 pub const fn prts(&self) -> &'static crate::common::Reg<self::Prts_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Prts_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "Clock Enable Control Resisters"]
48 #[inline(always)]
49 pub const fn cectl(&self) -> &'static crate::common::Reg<self::Cectl_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Cectl_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(16usize),
53 )
54 }
55 }
56
57 #[doc = "Bus Control Register"]
58 #[inline(always)]
59 pub const fn bctl(&self) -> &'static crate::common::Reg<self::Bctl_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Bctl_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(20usize),
63 )
64 }
65 }
66
67 #[doc = "Master Device Address Register"]
68 #[inline(always)]
69 pub const fn msdvad(
70 &self,
71 ) -> &'static crate::common::Reg<self::Msdvad_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Msdvad_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(24usize),
75 )
76 }
77 }
78
79 #[doc = "Reset Control Register"]
80 #[inline(always)]
81 pub const fn rstctl(
82 &self,
83 ) -> &'static crate::common::Reg<self::Rstctl_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Rstctl_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(32usize),
87 )
88 }
89 }
90
91 #[doc = "Present State Register"]
92 #[inline(always)]
93 pub const fn prsst(&self) -> &'static crate::common::Reg<self::Prsst_SPEC, crate::common::RW> {
94 unsafe {
95 crate::common::Reg::<self::Prsst_SPEC, crate::common::RW>::from_ptr(
96 self._svd2pac_as_ptr().add(36usize),
97 )
98 }
99 }
100
101 #[doc = "Internal Status Register"]
102 #[inline(always)]
103 pub const fn inst(&self) -> &'static crate::common::Reg<self::Inst_SPEC, crate::common::RW> {
104 unsafe {
105 crate::common::Reg::<self::Inst_SPEC, crate::common::RW>::from_ptr(
106 self._svd2pac_as_ptr().add(48usize),
107 )
108 }
109 }
110
111 #[doc = "Internal Status Enable Register"]
112 #[inline(always)]
113 pub const fn inste(&self) -> &'static crate::common::Reg<self::Inste_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::Inste_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(52usize),
117 )
118 }
119 }
120
121 #[doc = "Internal Interrupt Enable Register"]
122 #[inline(always)]
123 pub const fn inie(&self) -> &'static crate::common::Reg<self::Inie_SPEC, crate::common::RW> {
124 unsafe {
125 crate::common::Reg::<self::Inie_SPEC, crate::common::RW>::from_ptr(
126 self._svd2pac_as_ptr().add(56usize),
127 )
128 }
129 }
130
131 #[doc = "Internal Status Force Register"]
132 #[inline(always)]
133 pub const fn instfc(&self) -> &'static crate::common::Reg<self::Instfc_SPEC, crate::common::W> {
134 unsafe {
135 crate::common::Reg::<self::Instfc_SPEC, crate::common::W>::from_ptr(
136 self._svd2pac_as_ptr().add(60usize),
137 )
138 }
139 }
140
141 #[doc = "Device Characteristic Table Register"]
142 #[inline(always)]
143 pub const fn dvct(&self) -> &'static crate::common::Reg<self::Dvct_SPEC, crate::common::R> {
144 unsafe {
145 crate::common::Reg::<self::Dvct_SPEC, crate::common::R>::from_ptr(
146 self._svd2pac_as_ptr().add(68usize),
147 )
148 }
149 }
150
151 #[doc = "IBI Notify Control Register"]
152 #[inline(always)]
153 pub const fn ibinctl(
154 &self,
155 ) -> &'static crate::common::Reg<self::Ibinctl_SPEC, crate::common::RW> {
156 unsafe {
157 crate::common::Reg::<self::Ibinctl_SPEC, crate::common::RW>::from_ptr(
158 self._svd2pac_as_ptr().add(88usize),
159 )
160 }
161 }
162
163 #[doc = "Bus Function Control Register"]
164 #[inline(always)]
165 pub const fn bfctl(&self) -> &'static crate::common::Reg<self::Bfctl_SPEC, crate::common::RW> {
166 unsafe {
167 crate::common::Reg::<self::Bfctl_SPEC, crate::common::RW>::from_ptr(
168 self._svd2pac_as_ptr().add(96usize),
169 )
170 }
171 }
172
173 #[doc = "Slave Control Register"]
174 #[inline(always)]
175 pub const fn svctl(&self) -> &'static crate::common::Reg<self::Svctl_SPEC, crate::common::RW> {
176 unsafe {
177 crate::common::Reg::<self::Svctl_SPEC, crate::common::RW>::from_ptr(
178 self._svd2pac_as_ptr().add(100usize),
179 )
180 }
181 }
182
183 #[doc = "Reference Clock Control Register"]
184 #[inline(always)]
185 pub const fn refckctl(
186 &self,
187 ) -> &'static crate::common::Reg<self::Refckctl_SPEC, crate::common::RW> {
188 unsafe {
189 crate::common::Reg::<self::Refckctl_SPEC, crate::common::RW>::from_ptr(
190 self._svd2pac_as_ptr().add(112usize),
191 )
192 }
193 }
194
195 #[doc = "Standard Bit Rate Register"]
196 #[inline(always)]
197 pub const fn stdbr(&self) -> &'static crate::common::Reg<self::Stdbr_SPEC, crate::common::RW> {
198 unsafe {
199 crate::common::Reg::<self::Stdbr_SPEC, crate::common::RW>::from_ptr(
200 self._svd2pac_as_ptr().add(116usize),
201 )
202 }
203 }
204
205 #[doc = "Extended Bit Rate Register"]
206 #[inline(always)]
207 pub const fn extbr(&self) -> &'static crate::common::Reg<self::Extbr_SPEC, crate::common::RW> {
208 unsafe {
209 crate::common::Reg::<self::Extbr_SPEC, crate::common::RW>::from_ptr(
210 self._svd2pac_as_ptr().add(120usize),
211 )
212 }
213 }
214
215 #[doc = "Bus Free Condition Detection Time Register"]
216 #[inline(always)]
217 pub const fn bfrecdt(
218 &self,
219 ) -> &'static crate::common::Reg<self::Bfrecdt_SPEC, crate::common::RW> {
220 unsafe {
221 crate::common::Reg::<self::Bfrecdt_SPEC, crate::common::RW>::from_ptr(
222 self._svd2pac_as_ptr().add(124usize),
223 )
224 }
225 }
226
227 #[doc = "Bus Available Condition Detection Time Register"]
228 #[inline(always)]
229 pub const fn bavlcdt(
230 &self,
231 ) -> &'static crate::common::Reg<self::Bavlcdt_SPEC, crate::common::RW> {
232 unsafe {
233 crate::common::Reg::<self::Bavlcdt_SPEC, crate::common::RW>::from_ptr(
234 self._svd2pac_as_ptr().add(128usize),
235 )
236 }
237 }
238
239 #[doc = "Bus Idle Condition Detection Time Register"]
240 #[inline(always)]
241 pub const fn bidlcdt(
242 &self,
243 ) -> &'static crate::common::Reg<self::Bidlcdt_SPEC, crate::common::RW> {
244 unsafe {
245 crate::common::Reg::<self::Bidlcdt_SPEC, crate::common::RW>::from_ptr(
246 self._svd2pac_as_ptr().add(132usize),
247 )
248 }
249 }
250
251 #[doc = "Output Control Register"]
252 #[inline(always)]
253 pub const fn outctl(
254 &self,
255 ) -> &'static crate::common::Reg<self::Outctl_SPEC, crate::common::RW> {
256 unsafe {
257 crate::common::Reg::<self::Outctl_SPEC, crate::common::RW>::from_ptr(
258 self._svd2pac_as_ptr().add(136usize),
259 )
260 }
261 }
262
263 #[doc = "Input Control Register"]
264 #[inline(always)]
265 pub const fn inctl(&self) -> &'static crate::common::Reg<self::Inctl_SPEC, crate::common::RW> {
266 unsafe {
267 crate::common::Reg::<self::Inctl_SPEC, crate::common::RW>::from_ptr(
268 self._svd2pac_as_ptr().add(140usize),
269 )
270 }
271 }
272
273 #[doc = "Timeout Control Register"]
274 #[inline(always)]
275 pub const fn tmoctl(
276 &self,
277 ) -> &'static crate::common::Reg<self::Tmoctl_SPEC, crate::common::RW> {
278 unsafe {
279 crate::common::Reg::<self::Tmoctl_SPEC, crate::common::RW>::from_ptr(
280 self._svd2pac_as_ptr().add(144usize),
281 )
282 }
283 }
284
285 #[doc = "Wake Up Unit Control Register"]
286 #[inline(always)]
287 pub const fn wuctl(&self) -> &'static crate::common::Reg<self::Wuctl_SPEC, crate::common::RW> {
288 unsafe {
289 crate::common::Reg::<self::Wuctl_SPEC, crate::common::RW>::from_ptr(
290 self._svd2pac_as_ptr().add(152usize),
291 )
292 }
293 }
294
295 #[doc = "Acknowledge Control Register"]
296 #[inline(always)]
297 pub const fn ackctl(
298 &self,
299 ) -> &'static crate::common::Reg<self::Ackctl_SPEC, crate::common::RW> {
300 unsafe {
301 crate::common::Reg::<self::Ackctl_SPEC, crate::common::RW>::from_ptr(
302 self._svd2pac_as_ptr().add(160usize),
303 )
304 }
305 }
306
307 #[doc = "SCL Stretch Control Register"]
308 #[inline(always)]
309 pub const fn scstrctl(
310 &self,
311 ) -> &'static crate::common::Reg<self::Scstrctl_SPEC, crate::common::RW> {
312 unsafe {
313 crate::common::Reg::<self::Scstrctl_SPEC, crate::common::RW>::from_ptr(
314 self._svd2pac_as_ptr().add(164usize),
315 )
316 }
317 }
318
319 #[doc = "SCL Stalling Control Register"]
320 #[inline(always)]
321 pub const fn scstlctl(
322 &self,
323 ) -> &'static crate::common::Reg<self::Scstlctl_SPEC, crate::common::RW> {
324 unsafe {
325 crate::common::Reg::<self::Scstlctl_SPEC, crate::common::RW>::from_ptr(
326 self._svd2pac_as_ptr().add(176usize),
327 )
328 }
329 }
330
331 #[doc = "Slave Transfer Data Length Register 0"]
332 #[inline(always)]
333 pub const fn svtdlg0(
334 &self,
335 ) -> &'static crate::common::Reg<self::Svtdlg0_SPEC, crate::common::RW> {
336 unsafe {
337 crate::common::Reg::<self::Svtdlg0_SPEC, crate::common::RW>::from_ptr(
338 self._svd2pac_as_ptr().add(192usize),
339 )
340 }
341 }
342
343 #[doc = "Synchronous Timing Control Register"]
344 #[inline(always)]
345 pub const fn stctl(&self) -> &'static crate::common::Reg<self::Stctl_SPEC, crate::common::RW> {
346 unsafe {
347 crate::common::Reg::<self::Stctl_SPEC, crate::common::RW>::from_ptr(
348 self._svd2pac_as_ptr().add(288usize),
349 )
350 }
351 }
352
353 #[doc = "Asynchronous Timing Control Register"]
354 #[inline(always)]
355 pub const fn atctl(&self) -> &'static crate::common::Reg<self::Atctl_SPEC, crate::common::RW> {
356 unsafe {
357 crate::common::Reg::<self::Atctl_SPEC, crate::common::RW>::from_ptr(
358 self._svd2pac_as_ptr().add(292usize),
359 )
360 }
361 }
362
363 #[doc = "Asynchronous Timing Trigger Register"]
364 #[inline(always)]
365 pub const fn attrg(&self) -> &'static crate::common::Reg<self::Attrg_SPEC, crate::common::RW> {
366 unsafe {
367 crate::common::Reg::<self::Attrg_SPEC, crate::common::RW>::from_ptr(
368 self._svd2pac_as_ptr().add(296usize),
369 )
370 }
371 }
372
373 #[doc = "Asynchronous Timing Contorol Counter enable Register"]
374 #[inline(always)]
375 pub const fn atccnte(
376 &self,
377 ) -> &'static crate::common::Reg<self::Atccnte_SPEC, crate::common::RW> {
378 unsafe {
379 crate::common::Reg::<self::Atccnte_SPEC, crate::common::RW>::from_ptr(
380 self._svd2pac_as_ptr().add(300usize),
381 )
382 }
383 }
384
385 #[doc = "Condition Control Register"]
386 #[inline(always)]
387 pub const fn cndctl(
388 &self,
389 ) -> &'static crate::common::Reg<self::Cndctl_SPEC, crate::common::RW> {
390 unsafe {
391 crate::common::Reg::<self::Cndctl_SPEC, crate::common::RW>::from_ptr(
392 self._svd2pac_as_ptr().add(320usize),
393 )
394 }
395 }
396
397 #[doc = "Normal Command Queue Port Register"]
398 #[inline(always)]
399 pub const fn ncmdqp(&self) -> &'static crate::common::Reg<self::Ncmdqp_SPEC, crate::common::W> {
400 unsafe {
401 crate::common::Reg::<self::Ncmdqp_SPEC, crate::common::W>::from_ptr(
402 self._svd2pac_as_ptr().add(336usize),
403 )
404 }
405 }
406
407 #[doc = "Normal Response Queue Port Register"]
408 #[inline(always)]
409 pub const fn nrspqp(&self) -> &'static crate::common::Reg<self::Nrspqp_SPEC, crate::common::R> {
410 unsafe {
411 crate::common::Reg::<self::Nrspqp_SPEC, crate::common::R>::from_ptr(
412 self._svd2pac_as_ptr().add(340usize),
413 )
414 }
415 }
416
417 #[doc = "Normal Transfer Data Buffer Port Register 0"]
418 #[inline(always)]
419 pub const fn ntdtbp0(
420 &self,
421 ) -> &'static crate::common::Reg<self::Ntdtbp0_SPEC, crate::common::RW> {
422 unsafe {
423 crate::common::Reg::<self::Ntdtbp0_SPEC, crate::common::RW>::from_ptr(
424 self._svd2pac_as_ptr().add(344usize),
425 )
426 }
427 }
428
429 #[doc = "Normal Transfer Data Buffer Port Register 0"]
430 #[inline(always)]
431 pub const fn ntdtbp0_by(
432 &self,
433 ) -> &'static crate::common::Reg<self::Ntdtbp0By_SPEC, crate::common::RW> {
434 unsafe {
435 crate::common::Reg::<self::Ntdtbp0By_SPEC, crate::common::RW>::from_ptr(
436 self._svd2pac_as_ptr().add(344usize),
437 )
438 }
439 }
440
441 #[doc = "Normal IBI Queue Port Register"]
442 #[inline(always)]
443 pub const fn nibiqp(
444 &self,
445 ) -> &'static crate::common::Reg<self::Nibiqp_SPEC, crate::common::RW> {
446 unsafe {
447 crate::common::Reg::<self::Nibiqp_SPEC, crate::common::RW>::from_ptr(
448 self._svd2pac_as_ptr().add(380usize),
449 )
450 }
451 }
452
453 #[doc = "Normal Receive Status Queue Port Register"]
454 #[inline(always)]
455 pub const fn nrsqp(&self) -> &'static crate::common::Reg<self::Nrsqp_SPEC, crate::common::R> {
456 unsafe {
457 crate::common::Reg::<self::Nrsqp_SPEC, crate::common::R>::from_ptr(
458 self._svd2pac_as_ptr().add(384usize),
459 )
460 }
461 }
462
463 #[doc = "High Priority Command Queue Port Register"]
464 #[inline(always)]
465 pub const fn hcmdqp(&self) -> &'static crate::common::Reg<self::Hcmdqp_SPEC, crate::common::W> {
466 unsafe {
467 crate::common::Reg::<self::Hcmdqp_SPEC, crate::common::W>::from_ptr(
468 self._svd2pac_as_ptr().add(388usize),
469 )
470 }
471 }
472
473 #[doc = "High Priority Response Queue Port Register"]
474 #[inline(always)]
475 pub const fn hrspqp(&self) -> &'static crate::common::Reg<self::Hrspqp_SPEC, crate::common::R> {
476 unsafe {
477 crate::common::Reg::<self::Hrspqp_SPEC, crate::common::R>::from_ptr(
478 self._svd2pac_as_ptr().add(392usize),
479 )
480 }
481 }
482
483 #[doc = "High Priority Transfer Data Buffer Port Register"]
484 #[inline(always)]
485 pub const fn htdtbp(
486 &self,
487 ) -> &'static crate::common::Reg<self::Htdtbp_SPEC, crate::common::RW> {
488 unsafe {
489 crate::common::Reg::<self::Htdtbp_SPEC, crate::common::RW>::from_ptr(
490 self._svd2pac_as_ptr().add(396usize),
491 )
492 }
493 }
494
495 #[doc = "Normal Queue Threshold Control Register"]
496 #[inline(always)]
497 pub const fn nqthctl(
498 &self,
499 ) -> &'static crate::common::Reg<self::Nqthctl_SPEC, crate::common::RW> {
500 unsafe {
501 crate::common::Reg::<self::Nqthctl_SPEC, crate::common::RW>::from_ptr(
502 self._svd2pac_as_ptr().add(400usize),
503 )
504 }
505 }
506
507 #[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
508 #[inline(always)]
509 pub const fn ntbthctl0(
510 &self,
511 ) -> &'static crate::common::Reg<self::Ntbthctl0_SPEC, crate::common::RW> {
512 unsafe {
513 crate::common::Reg::<self::Ntbthctl0_SPEC, crate::common::RW>::from_ptr(
514 self._svd2pac_as_ptr().add(404usize),
515 )
516 }
517 }
518
519 #[doc = "Normal Receive Status Queue Threshold Control Register"]
520 #[inline(always)]
521 pub const fn nrqthctl(
522 &self,
523 ) -> &'static crate::common::Reg<self::Nrqthctl_SPEC, crate::common::RW> {
524 unsafe {
525 crate::common::Reg::<self::Nrqthctl_SPEC, crate::common::RW>::from_ptr(
526 self._svd2pac_as_ptr().add(448usize),
527 )
528 }
529 }
530
531 #[doc = "High Priority Queue Threshold Control Register"]
532 #[inline(always)]
533 pub const fn hqthctl(
534 &self,
535 ) -> &'static crate::common::Reg<self::Hqthctl_SPEC, crate::common::RW> {
536 unsafe {
537 crate::common::Reg::<self::Hqthctl_SPEC, crate::common::RW>::from_ptr(
538 self._svd2pac_as_ptr().add(452usize),
539 )
540 }
541 }
542
543 #[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
544 #[inline(always)]
545 pub const fn htbthctl(
546 &self,
547 ) -> &'static crate::common::Reg<self::Htbthctl_SPEC, crate::common::RW> {
548 unsafe {
549 crate::common::Reg::<self::Htbthctl_SPEC, crate::common::RW>::from_ptr(
550 self._svd2pac_as_ptr().add(456usize),
551 )
552 }
553 }
554
555 #[doc = "Bus Status Register"]
556 #[inline(always)]
557 pub const fn bst(&self) -> &'static crate::common::Reg<self::Bst_SPEC, crate::common::RW> {
558 unsafe {
559 crate::common::Reg::<self::Bst_SPEC, crate::common::RW>::from_ptr(
560 self._svd2pac_as_ptr().add(464usize),
561 )
562 }
563 }
564
565 #[doc = "Bus Status Enable Register"]
566 #[inline(always)]
567 pub const fn bste(&self) -> &'static crate::common::Reg<self::Bste_SPEC, crate::common::RW> {
568 unsafe {
569 crate::common::Reg::<self::Bste_SPEC, crate::common::RW>::from_ptr(
570 self._svd2pac_as_ptr().add(468usize),
571 )
572 }
573 }
574
575 #[doc = "Bus Interrupt Enable Register"]
576 #[inline(always)]
577 pub const fn bie(&self) -> &'static crate::common::Reg<self::Bie_SPEC, crate::common::RW> {
578 unsafe {
579 crate::common::Reg::<self::Bie_SPEC, crate::common::RW>::from_ptr(
580 self._svd2pac_as_ptr().add(472usize),
581 )
582 }
583 }
584
585 #[doc = "Bus Status Force Register"]
586 #[inline(always)]
587 pub const fn bstfc(&self) -> &'static crate::common::Reg<self::Bstfc_SPEC, crate::common::RW> {
588 unsafe {
589 crate::common::Reg::<self::Bstfc_SPEC, crate::common::RW>::from_ptr(
590 self._svd2pac_as_ptr().add(476usize),
591 )
592 }
593 }
594
595 #[doc = "Normal Transfer Status Register"]
596 #[inline(always)]
597 pub const fn ntst(&self) -> &'static crate::common::Reg<self::Ntst_SPEC, crate::common::RW> {
598 unsafe {
599 crate::common::Reg::<self::Ntst_SPEC, crate::common::RW>::from_ptr(
600 self._svd2pac_as_ptr().add(480usize),
601 )
602 }
603 }
604
605 #[doc = "Normal Transfer Status Enable Register"]
606 #[inline(always)]
607 pub const fn ntste(&self) -> &'static crate::common::Reg<self::Ntste_SPEC, crate::common::RW> {
608 unsafe {
609 crate::common::Reg::<self::Ntste_SPEC, crate::common::RW>::from_ptr(
610 self._svd2pac_as_ptr().add(484usize),
611 )
612 }
613 }
614
615 #[doc = "Normal Transfer Interrupt Enable Register"]
616 #[inline(always)]
617 pub const fn ntie(&self) -> &'static crate::common::Reg<self::Ntie_SPEC, crate::common::RW> {
618 unsafe {
619 crate::common::Reg::<self::Ntie_SPEC, crate::common::RW>::from_ptr(
620 self._svd2pac_as_ptr().add(488usize),
621 )
622 }
623 }
624
625 #[doc = "Normal Transfer Status Force Register"]
626 #[inline(always)]
627 pub const fn ntstfc(
628 &self,
629 ) -> &'static crate::common::Reg<self::Ntstfc_SPEC, crate::common::RW> {
630 unsafe {
631 crate::common::Reg::<self::Ntstfc_SPEC, crate::common::RW>::from_ptr(
632 self._svd2pac_as_ptr().add(492usize),
633 )
634 }
635 }
636
637 #[doc = "High Priority Transfer Status Register"]
638 #[inline(always)]
639 pub const fn htst(&self) -> &'static crate::common::Reg<self::Htst_SPEC, crate::common::RW> {
640 unsafe {
641 crate::common::Reg::<self::Htst_SPEC, crate::common::RW>::from_ptr(
642 self._svd2pac_as_ptr().add(512usize),
643 )
644 }
645 }
646
647 #[doc = "High Priority Transfer Status Enable Register"]
648 #[inline(always)]
649 pub const fn htste(&self) -> &'static crate::common::Reg<self::Htste_SPEC, crate::common::RW> {
650 unsafe {
651 crate::common::Reg::<self::Htste_SPEC, crate::common::RW>::from_ptr(
652 self._svd2pac_as_ptr().add(516usize),
653 )
654 }
655 }
656
657 #[doc = "High Priority Transfer Interrupt Enable Register"]
658 #[inline(always)]
659 pub const fn htie(&self) -> &'static crate::common::Reg<self::Htie_SPEC, crate::common::RW> {
660 unsafe {
661 crate::common::Reg::<self::Htie_SPEC, crate::common::RW>::from_ptr(
662 self._svd2pac_as_ptr().add(520usize),
663 )
664 }
665 }
666
667 #[doc = "High Priority Transfer Status Force Register"]
668 #[inline(always)]
669 pub const fn htstfc(
670 &self,
671 ) -> &'static crate::common::Reg<self::Htstfc_SPEC, crate::common::RW> {
672 unsafe {
673 crate::common::Reg::<self::Htstfc_SPEC, crate::common::RW>::from_ptr(
674 self._svd2pac_as_ptr().add(524usize),
675 )
676 }
677 }
678
679 #[doc = "Bus Condition Status Register"]
680 #[inline(always)]
681 pub const fn bcst(&self) -> &'static crate::common::Reg<self::Bcst_SPEC, crate::common::R> {
682 unsafe {
683 crate::common::Reg::<self::Bcst_SPEC, crate::common::R>::from_ptr(
684 self._svd2pac_as_ptr().add(528usize),
685 )
686 }
687 }
688
689 #[doc = "Slave Status Register"]
690 #[inline(always)]
691 pub const fn svst(&self) -> &'static crate::common::Reg<self::Svst_SPEC, crate::common::RW> {
692 unsafe {
693 crate::common::Reg::<self::Svst_SPEC, crate::common::RW>::from_ptr(
694 self._svd2pac_as_ptr().add(532usize),
695 )
696 }
697 }
698
699 #[doc = "Wake Up Unit Operating Status Register"]
700 #[inline(always)]
701 pub const fn wust(&self) -> &'static crate::common::Reg<self::Wust_SPEC, crate::common::R> {
702 unsafe {
703 crate::common::Reg::<self::Wust_SPEC, crate::common::R>::from_ptr(
704 self._svd2pac_as_ptr().add(536usize),
705 )
706 }
707 }
708
709 #[doc = "MsyncCNT Counter Capture Register"]
710 #[inline(always)]
711 pub const fn mrccpt(&self) -> &'static crate::common::Reg<self::Mrccpt_SPEC, crate::common::R> {
712 unsafe {
713 crate::common::Reg::<self::Mrccpt_SPEC, crate::common::R>::from_ptr(
714 self._svd2pac_as_ptr().add(540usize),
715 )
716 }
717 }
718
719 #[doc = "Device Address Table Basic Register %s"]
720 #[inline(always)]
721 pub const fn datbas(
722 &self,
723 ) -> &'static crate::common::ClusterRegisterArray<
724 crate::common::Reg<self::Datbas_SPEC, crate::common::RW>,
725 8,
726 0x8,
727 > {
728 unsafe {
729 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x224usize))
730 }
731 }
732 #[inline(always)]
733 pub const fn datbas0(
734 &self,
735 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
736 unsafe {
737 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
738 self._svd2pac_as_ptr().add(0x224usize),
739 )
740 }
741 }
742 #[inline(always)]
743 pub const fn datbas1(
744 &self,
745 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
746 unsafe {
747 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
748 self._svd2pac_as_ptr().add(0x22cusize),
749 )
750 }
751 }
752 #[inline(always)]
753 pub const fn datbas2(
754 &self,
755 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
756 unsafe {
757 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
758 self._svd2pac_as_ptr().add(0x234usize),
759 )
760 }
761 }
762 #[inline(always)]
763 pub const fn datbas3(
764 &self,
765 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
766 unsafe {
767 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
768 self._svd2pac_as_ptr().add(0x23cusize),
769 )
770 }
771 }
772 #[inline(always)]
773 pub const fn datbas4(
774 &self,
775 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
776 unsafe {
777 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
778 self._svd2pac_as_ptr().add(0x244usize),
779 )
780 }
781 }
782 #[inline(always)]
783 pub const fn datbas5(
784 &self,
785 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
786 unsafe {
787 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
788 self._svd2pac_as_ptr().add(0x24cusize),
789 )
790 }
791 }
792 #[inline(always)]
793 pub const fn datbas6(
794 &self,
795 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
796 unsafe {
797 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
798 self._svd2pac_as_ptr().add(0x254usize),
799 )
800 }
801 }
802 #[inline(always)]
803 pub const fn datbas7(
804 &self,
805 ) -> &'static crate::common::Reg<self::Datbas_SPEC, crate::common::RW> {
806 unsafe {
807 crate::common::Reg::<self::Datbas_SPEC, crate::common::RW>::from_ptr(
808 self._svd2pac_as_ptr().add(0x25cusize),
809 )
810 }
811 }
812
813 #[doc = "Extended Device Address Table Basic Register"]
814 #[inline(always)]
815 pub const fn exdatbas(
816 &self,
817 ) -> &'static crate::common::Reg<self::Exdatbas_SPEC, crate::common::RW> {
818 unsafe {
819 crate::common::Reg::<self::Exdatbas_SPEC, crate::common::RW>::from_ptr(
820 self._svd2pac_as_ptr().add(672usize),
821 )
822 }
823 }
824
825 #[doc = "Slave Device Address Table Basic Register 0"]
826 #[inline(always)]
827 pub const fn sdatbas0(
828 &self,
829 ) -> &'static crate::common::Reg<self::Sdatbas0_SPEC, crate::common::RW> {
830 unsafe {
831 crate::common::Reg::<self::Sdatbas0_SPEC, crate::common::RW>::from_ptr(
832 self._svd2pac_as_ptr().add(688usize),
833 )
834 }
835 }
836
837 #[doc = "Slave Device Address Table Basic Register 1"]
838 #[inline(always)]
839 pub const fn sdatbas1(
840 &self,
841 ) -> &'static crate::common::Reg<self::Sdatbas1_SPEC, crate::common::RW> {
842 unsafe {
843 crate::common::Reg::<self::Sdatbas1_SPEC, crate::common::RW>::from_ptr(
844 self._svd2pac_as_ptr().add(688usize),
845 )
846 }
847 }
848
849 #[doc = "Slave Device Address Table Basic Register 2"]
850 #[inline(always)]
851 pub const fn sdatbas2(
852 &self,
853 ) -> &'static crate::common::Reg<self::Sdatbas2_SPEC, crate::common::RW> {
854 unsafe {
855 crate::common::Reg::<self::Sdatbas2_SPEC, crate::common::RW>::from_ptr(
856 self._svd2pac_as_ptr().add(688usize),
857 )
858 }
859 }
860
861 #[doc = "Master Device Characteristic Table Register %s"]
862 #[inline(always)]
863 pub const fn msdct(
864 &self,
865 ) -> &'static crate::common::ClusterRegisterArray<
866 crate::common::Reg<self::Msdct_SPEC, crate::common::RW>,
867 8,
868 0x4,
869 > {
870 unsafe {
871 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2d0usize))
872 }
873 }
874 #[inline(always)]
875 pub const fn msdct0(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
876 unsafe {
877 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
878 self._svd2pac_as_ptr().add(0x2d0usize),
879 )
880 }
881 }
882 #[inline(always)]
883 pub const fn msdct1(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
884 unsafe {
885 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
886 self._svd2pac_as_ptr().add(0x2d4usize),
887 )
888 }
889 }
890 #[inline(always)]
891 pub const fn msdct2(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
892 unsafe {
893 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
894 self._svd2pac_as_ptr().add(0x2d8usize),
895 )
896 }
897 }
898 #[inline(always)]
899 pub const fn msdct3(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
900 unsafe {
901 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
902 self._svd2pac_as_ptr().add(0x2dcusize),
903 )
904 }
905 }
906 #[inline(always)]
907 pub const fn msdct4(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
908 unsafe {
909 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
910 self._svd2pac_as_ptr().add(0x2e0usize),
911 )
912 }
913 }
914 #[inline(always)]
915 pub const fn msdct5(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
916 unsafe {
917 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
918 self._svd2pac_as_ptr().add(0x2e4usize),
919 )
920 }
921 }
922 #[inline(always)]
923 pub const fn msdct6(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
924 unsafe {
925 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
926 self._svd2pac_as_ptr().add(0x2e8usize),
927 )
928 }
929 }
930 #[inline(always)]
931 pub const fn msdct7(&self) -> &'static crate::common::Reg<self::Msdct_SPEC, crate::common::RW> {
932 unsafe {
933 crate::common::Reg::<self::Msdct_SPEC, crate::common::RW>::from_ptr(
934 self._svd2pac_as_ptr().add(0x2ecusize),
935 )
936 }
937 }
938
939 #[doc = "Slave Device Characteristic Table Register"]
940 #[inline(always)]
941 pub const fn svdct(&self) -> &'static crate::common::Reg<self::Svdct_SPEC, crate::common::RW> {
942 unsafe {
943 crate::common::Reg::<self::Svdct_SPEC, crate::common::RW>::from_ptr(
944 self._svd2pac_as_ptr().add(800usize),
945 )
946 }
947 }
948
949 #[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
950 #[inline(always)]
951 pub const fn sdctpidl(
952 &self,
953 ) -> &'static crate::common::Reg<self::Sdctpidl_SPEC, crate::common::RW> {
954 unsafe {
955 crate::common::Reg::<self::Sdctpidl_SPEC, crate::common::RW>::from_ptr(
956 self._svd2pac_as_ptr().add(804usize),
957 )
958 }
959 }
960
961 #[doc = "Slave Device Characteristic Table Provisional ID High Register"]
962 #[inline(always)]
963 pub const fn sdctpidh(
964 &self,
965 ) -> &'static crate::common::Reg<self::Sdctpidh_SPEC, crate::common::RW> {
966 unsafe {
967 crate::common::Reg::<self::Sdctpidh_SPEC, crate::common::RW>::from_ptr(
968 self._svd2pac_as_ptr().add(808usize),
969 )
970 }
971 }
972
973 #[doc = "Slave Device Address Register %s"]
974 #[inline(always)]
975 pub const fn svdvad(
976 &self,
977 ) -> &'static crate::common::ClusterRegisterArray<
978 crate::common::Reg<self::Svdvad_SPEC, crate::common::R>,
979 3,
980 0x4,
981 > {
982 unsafe {
983 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x330usize))
984 }
985 }
986 #[inline(always)]
987 pub const fn svdvad0(
988 &self,
989 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
990 unsafe {
991 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
992 self._svd2pac_as_ptr().add(0x330usize),
993 )
994 }
995 }
996 #[inline(always)]
997 pub const fn svdvad1(
998 &self,
999 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
1000 unsafe {
1001 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
1002 self._svd2pac_as_ptr().add(0x334usize),
1003 )
1004 }
1005 }
1006 #[inline(always)]
1007 pub const fn svdvad2(
1008 &self,
1009 ) -> &'static crate::common::Reg<self::Svdvad_SPEC, crate::common::R> {
1010 unsafe {
1011 crate::common::Reg::<self::Svdvad_SPEC, crate::common::R>::from_ptr(
1012 self._svd2pac_as_ptr().add(0x338usize),
1013 )
1014 }
1015 }
1016
1017 #[doc = "CCC Slave Events Command Register"]
1018 #[inline(always)]
1019 pub const fn csecmd(
1020 &self,
1021 ) -> &'static crate::common::Reg<self::Csecmd_SPEC, crate::common::RW> {
1022 unsafe {
1023 crate::common::Reg::<self::Csecmd_SPEC, crate::common::RW>::from_ptr(
1024 self._svd2pac_as_ptr().add(848usize),
1025 )
1026 }
1027 }
1028
1029 #[doc = "CCC Enter Activity State Register"]
1030 #[inline(always)]
1031 pub const fn ceactst(
1032 &self,
1033 ) -> &'static crate::common::Reg<self::Ceactst_SPEC, crate::common::RW> {
1034 unsafe {
1035 crate::common::Reg::<self::Ceactst_SPEC, crate::common::RW>::from_ptr(
1036 self._svd2pac_as_ptr().add(852usize),
1037 )
1038 }
1039 }
1040
1041 #[doc = "CCC Max Write Length Register"]
1042 #[inline(always)]
1043 pub const fn cmwlg(&self) -> &'static crate::common::Reg<self::Cmwlg_SPEC, crate::common::RW> {
1044 unsafe {
1045 crate::common::Reg::<self::Cmwlg_SPEC, crate::common::RW>::from_ptr(
1046 self._svd2pac_as_ptr().add(856usize),
1047 )
1048 }
1049 }
1050
1051 #[doc = "CCC Max Read Length Register"]
1052 #[inline(always)]
1053 pub const fn cmrlg(&self) -> &'static crate::common::Reg<self::Cmrlg_SPEC, crate::common::RW> {
1054 unsafe {
1055 crate::common::Reg::<self::Cmrlg_SPEC, crate::common::RW>::from_ptr(
1056 self._svd2pac_as_ptr().add(860usize),
1057 )
1058 }
1059 }
1060
1061 #[doc = "CCC Enter Test Mode Register"]
1062 #[inline(always)]
1063 pub const fn cetstmd(
1064 &self,
1065 ) -> &'static crate::common::Reg<self::Cetstmd_SPEC, crate::common::R> {
1066 unsafe {
1067 crate::common::Reg::<self::Cetstmd_SPEC, crate::common::R>::from_ptr(
1068 self._svd2pac_as_ptr().add(864usize),
1069 )
1070 }
1071 }
1072
1073 #[doc = "CCC Get Device Status Register"]
1074 #[inline(always)]
1075 pub const fn cgdvst(
1076 &self,
1077 ) -> &'static crate::common::Reg<self::Cgdvst_SPEC, crate::common::RW> {
1078 unsafe {
1079 crate::common::Reg::<self::Cgdvst_SPEC, crate::common::RW>::from_ptr(
1080 self._svd2pac_as_ptr().add(868usize),
1081 )
1082 }
1083 }
1084
1085 #[doc = "CCC Max Data Speed W (Write) Register"]
1086 #[inline(always)]
1087 pub const fn cmdspw(
1088 &self,
1089 ) -> &'static crate::common::Reg<self::Cmdspw_SPEC, crate::common::RW> {
1090 unsafe {
1091 crate::common::Reg::<self::Cmdspw_SPEC, crate::common::RW>::from_ptr(
1092 self._svd2pac_as_ptr().add(872usize),
1093 )
1094 }
1095 }
1096
1097 #[doc = "CCC Max Data Speed R (Read) Register"]
1098 #[inline(always)]
1099 pub const fn cmdspr(
1100 &self,
1101 ) -> &'static crate::common::Reg<self::Cmdspr_SPEC, crate::common::RW> {
1102 unsafe {
1103 crate::common::Reg::<self::Cmdspr_SPEC, crate::common::RW>::from_ptr(
1104 self._svd2pac_as_ptr().add(876usize),
1105 )
1106 }
1107 }
1108
1109 #[doc = "CCC Max Data Speed T (Turnaround) Register"]
1110 #[inline(always)]
1111 pub const fn cmdspt(
1112 &self,
1113 ) -> &'static crate::common::Reg<self::Cmdspt_SPEC, crate::common::RW> {
1114 unsafe {
1115 crate::common::Reg::<self::Cmdspt_SPEC, crate::common::RW>::from_ptr(
1116 self._svd2pac_as_ptr().add(880usize),
1117 )
1118 }
1119 }
1120
1121 #[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
1122 #[inline(always)]
1123 pub const fn cetsm(&self) -> &'static crate::common::Reg<self::Cetsm_SPEC, crate::common::RW> {
1124 unsafe {
1125 crate::common::Reg::<self::Cetsm_SPEC, crate::common::RW>::from_ptr(
1126 self._svd2pac_as_ptr().add(884usize),
1127 )
1128 }
1129 }
1130
1131 #[doc = "CCC Exchange Timing Support Information S (State) Register"]
1132 #[inline(always)]
1133 pub const fn cetss(&self) -> &'static crate::common::Reg<self::Cetss_SPEC, crate::common::RW> {
1134 unsafe {
1135 crate::common::Reg::<self::Cetss_SPEC, crate::common::RW>::from_ptr(
1136 self._svd2pac_as_ptr().add(888usize),
1137 )
1138 }
1139 }
1140
1141 #[doc = "Bit Count Register"]
1142 #[inline(always)]
1143 pub const fn bitcnt(&self) -> &'static crate::common::Reg<self::Bitcnt_SPEC, crate::common::R> {
1144 unsafe {
1145 crate::common::Reg::<self::Bitcnt_SPEC, crate::common::R>::from_ptr(
1146 self._svd2pac_as_ptr().add(896usize),
1147 )
1148 }
1149 }
1150
1151 #[doc = "Normal Queue Status Level Register"]
1152 #[inline(always)]
1153 pub const fn nqstlv(&self) -> &'static crate::common::Reg<self::Nqstlv_SPEC, crate::common::R> {
1154 unsafe {
1155 crate::common::Reg::<self::Nqstlv_SPEC, crate::common::R>::from_ptr(
1156 self._svd2pac_as_ptr().add(916usize),
1157 )
1158 }
1159 }
1160
1161 #[doc = "Normal Data Buffer Status Level Register 0"]
1162 #[inline(always)]
1163 pub const fn ndbstlv0(
1164 &self,
1165 ) -> &'static crate::common::Reg<self::Ndbstlv0_SPEC, crate::common::R> {
1166 unsafe {
1167 crate::common::Reg::<self::Ndbstlv0_SPEC, crate::common::R>::from_ptr(
1168 self._svd2pac_as_ptr().add(920usize),
1169 )
1170 }
1171 }
1172
1173 #[doc = "Normal Receive Status Queue Status Level Register"]
1174 #[inline(always)]
1175 pub const fn nrsqstlv(
1176 &self,
1177 ) -> &'static crate::common::Reg<self::Nrsqstlv_SPEC, crate::common::R> {
1178 unsafe {
1179 crate::common::Reg::<self::Nrsqstlv_SPEC, crate::common::R>::from_ptr(
1180 self._svd2pac_as_ptr().add(960usize),
1181 )
1182 }
1183 }
1184
1185 #[doc = "High Priority Queue Status Level Register"]
1186 #[inline(always)]
1187 pub const fn hqstlv(&self) -> &'static crate::common::Reg<self::Hqstlv_SPEC, crate::common::R> {
1188 unsafe {
1189 crate::common::Reg::<self::Hqstlv_SPEC, crate::common::R>::from_ptr(
1190 self._svd2pac_as_ptr().add(964usize),
1191 )
1192 }
1193 }
1194
1195 #[doc = "High Priority Data Buffer Status Level Register"]
1196 #[inline(always)]
1197 pub const fn hdbstlv(
1198 &self,
1199 ) -> &'static crate::common::Reg<self::Hdbstlv_SPEC, crate::common::R> {
1200 unsafe {
1201 crate::common::Reg::<self::Hdbstlv_SPEC, crate::common::R>::from_ptr(
1202 self._svd2pac_as_ptr().add(968usize),
1203 )
1204 }
1205 }
1206
1207 #[doc = "Present State Debug Register"]
1208 #[inline(always)]
1209 pub const fn prstdbg(
1210 &self,
1211 ) -> &'static crate::common::Reg<self::Prstdbg_SPEC, crate::common::R> {
1212 unsafe {
1213 crate::common::Reg::<self::Prstdbg_SPEC, crate::common::R>::from_ptr(
1214 self._svd2pac_as_ptr().add(972usize),
1215 )
1216 }
1217 }
1218
1219 #[doc = "Master Error Counters Register"]
1220 #[inline(always)]
1221 pub const fn mserrcnt(
1222 &self,
1223 ) -> &'static crate::common::Reg<self::Mserrcnt_SPEC, crate::common::R> {
1224 unsafe {
1225 crate::common::Reg::<self::Mserrcnt_SPEC, crate::common::R>::from_ptr(
1226 self._svd2pac_as_ptr().add(976usize),
1227 )
1228 }
1229 }
1230
1231 #[doc = "SC1 Capture monitor Register"]
1232 #[inline(always)]
1233 pub const fn sc1cpt(&self) -> &'static crate::common::Reg<self::Sc1Cpt_SPEC, crate::common::R> {
1234 unsafe {
1235 crate::common::Reg::<self::Sc1Cpt_SPEC, crate::common::R>::from_ptr(
1236 self._svd2pac_as_ptr().add(992usize),
1237 )
1238 }
1239 }
1240
1241 #[doc = "SC2 Capture monitor Register"]
1242 #[inline(always)]
1243 pub const fn sc2cpt(&self) -> &'static crate::common::Reg<self::Sc2Cpt_SPEC, crate::common::R> {
1244 unsafe {
1245 crate::common::Reg::<self::Sc2Cpt_SPEC, crate::common::R>::from_ptr(
1246 self._svd2pac_as_ptr().add(996usize),
1247 )
1248 }
1249 }
1250}
1251#[doc(hidden)]
1252#[derive(Copy, Clone, Eq, PartialEq)]
1253pub struct Prts_SPEC;
1254impl crate::sealed::RegSpec for Prts_SPEC {
1255 type DataType = u32;
1256}
1257
1258#[doc = "Protocol Selection Register"]
1259pub type Prts = crate::RegValueT<Prts_SPEC>;
1260
1261impl Prts {
1262 #[doc = "Protocol Mode"]
1263 #[inline(always)]
1264 pub fn prtmd(
1265 self,
1266 ) -> crate::common::RegisterField<
1267 0,
1268 0x1,
1269 1,
1270 0,
1271 prts::Prtmd,
1272 prts::Prtmd,
1273 Prts_SPEC,
1274 crate::common::RW,
1275 > {
1276 crate::common::RegisterField::<
1277 0,
1278 0x1,
1279 1,
1280 0,
1281 prts::Prtmd,
1282 prts::Prtmd,
1283 Prts_SPEC,
1284 crate::common::RW,
1285 >::from_register(self, 0)
1286 }
1287}
1288impl ::core::default::Default for Prts {
1289 #[inline(always)]
1290 fn default() -> Prts {
1291 <crate::RegValueT<Prts_SPEC> as RegisterValue<_>>::new(1)
1292 }
1293}
1294pub mod prts {
1295
1296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1297 pub struct Prtmd_SPEC;
1298 pub type Prtmd = crate::EnumBitfieldStruct<u8, Prtmd_SPEC>;
1299 impl Prtmd {
1300 #[doc = "I3C protocol mode"]
1301 pub const _0: Self = Self::new(0);
1302
1303 #[doc = "I2C protocol mode"]
1304 pub const _1: Self = Self::new(1);
1305 }
1306}
1307#[doc(hidden)]
1308#[derive(Copy, Clone, Eq, PartialEq)]
1309pub struct Cectl_SPEC;
1310impl crate::sealed::RegSpec for Cectl_SPEC {
1311 type DataType = u32;
1312}
1313
1314#[doc = "Clock Enable Control Resisters"]
1315pub type Cectl = crate::RegValueT<Cectl_SPEC>;
1316
1317impl Cectl {
1318 #[doc = "Clock Enable"]
1319 #[inline(always)]
1320 pub fn clke(
1321 self,
1322 ) -> crate::common::RegisterField<
1323 0,
1324 0x1,
1325 1,
1326 0,
1327 cectl::Clke,
1328 cectl::Clke,
1329 Cectl_SPEC,
1330 crate::common::RW,
1331 > {
1332 crate::common::RegisterField::<
1333 0,
1334 0x1,
1335 1,
1336 0,
1337 cectl::Clke,
1338 cectl::Clke,
1339 Cectl_SPEC,
1340 crate::common::RW,
1341 >::from_register(self, 0)
1342 }
1343}
1344impl ::core::default::Default for Cectl {
1345 #[inline(always)]
1346 fn default() -> Cectl {
1347 <crate::RegValueT<Cectl_SPEC> as RegisterValue<_>>::new(0)
1348 }
1349}
1350pub mod cectl {
1351
1352 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1353 pub struct Clke_SPEC;
1354 pub type Clke = crate::EnumBitfieldStruct<u8, Clke_SPEC>;
1355 impl Clke {
1356 #[doc = "Clock disable"]
1357 pub const _0: Self = Self::new(0);
1358
1359 #[doc = "Clock enable"]
1360 pub const _1: Self = Self::new(1);
1361 }
1362}
1363#[doc(hidden)]
1364#[derive(Copy, Clone, Eq, PartialEq)]
1365pub struct Bctl_SPEC;
1366impl crate::sealed::RegSpec for Bctl_SPEC {
1367 type DataType = u32;
1368}
1369
1370#[doc = "Bus Control Register"]
1371pub type Bctl = crate::RegValueT<Bctl_SPEC>;
1372
1373impl Bctl {
1374 #[doc = "Include I3C Broadcast Address"]
1375 #[inline(always)]
1376 pub fn incba(
1377 self,
1378 ) -> crate::common::RegisterField<
1379 0,
1380 0x1,
1381 1,
1382 0,
1383 bctl::Incba,
1384 bctl::Incba,
1385 Bctl_SPEC,
1386 crate::common::RW,
1387 > {
1388 crate::common::RegisterField::<
1389 0,
1390 0x1,
1391 1,
1392 0,
1393 bctl::Incba,
1394 bctl::Incba,
1395 Bctl_SPEC,
1396 crate::common::RW,
1397 >::from_register(self, 0)
1398 }
1399
1400 #[doc = "Abort"]
1401 #[inline(always)]
1402 pub fn abt(
1403 self,
1404 ) -> crate::common::RegisterField<
1405 29,
1406 0x1,
1407 1,
1408 0,
1409 bctl::Abt,
1410 bctl::Abt,
1411 Bctl_SPEC,
1412 crate::common::RW,
1413 > {
1414 crate::common::RegisterField::<
1415 29,
1416 0x1,
1417 1,
1418 0,
1419 bctl::Abt,
1420 bctl::Abt,
1421 Bctl_SPEC,
1422 crate::common::RW,
1423 >::from_register(self, 0)
1424 }
1425
1426 #[doc = "Resume"]
1427 #[inline(always)]
1428 pub fn rsm(
1429 self,
1430 ) -> crate::common::RegisterField<
1431 30,
1432 0x1,
1433 1,
1434 0,
1435 bctl::Rsm,
1436 bctl::Rsm,
1437 Bctl_SPEC,
1438 crate::common::RW,
1439 > {
1440 crate::common::RegisterField::<
1441 30,
1442 0x1,
1443 1,
1444 0,
1445 bctl::Rsm,
1446 bctl::Rsm,
1447 Bctl_SPEC,
1448 crate::common::RW,
1449 >::from_register(self, 0)
1450 }
1451
1452 #[doc = "Bus Enable"]
1453 #[inline(always)]
1454 pub fn buse(
1455 self,
1456 ) -> crate::common::RegisterField<
1457 31,
1458 0x1,
1459 1,
1460 0,
1461 bctl::Buse,
1462 bctl::Buse,
1463 Bctl_SPEC,
1464 crate::common::RW,
1465 > {
1466 crate::common::RegisterField::<
1467 31,
1468 0x1,
1469 1,
1470 0,
1471 bctl::Buse,
1472 bctl::Buse,
1473 Bctl_SPEC,
1474 crate::common::RW,
1475 >::from_register(self, 0)
1476 }
1477}
1478impl ::core::default::Default for Bctl {
1479 #[inline(always)]
1480 fn default() -> Bctl {
1481 <crate::RegValueT<Bctl_SPEC> as RegisterValue<_>>::new(0)
1482 }
1483}
1484pub mod bctl {
1485
1486 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1487 pub struct Incba_SPEC;
1488 pub type Incba = crate::EnumBitfieldStruct<u8, Incba_SPEC>;
1489 impl Incba {
1490 #[doc = "Do not include I3C broadcast address for private transfers"]
1491 pub const _0: Self = Self::new(0);
1492
1493 #[doc = "Include I3C broadcast address for private transfers"]
1494 pub const _1: Self = Self::new(1);
1495 }
1496 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1497 pub struct Abt_SPEC;
1498 pub type Abt = crate::EnumBitfieldStruct<u8, Abt_SPEC>;
1499 impl Abt {
1500 #[doc = "I3C is running."]
1501 pub const _0: Self = Self::new(0);
1502
1503 #[doc = "I3C has aborted a transfer."]
1504 pub const _1: Self = Self::new(1);
1505 }
1506 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1507 pub struct Rsm_SPEC;
1508 pub type Rsm = crate::EnumBitfieldStruct<u8, Rsm_SPEC>;
1509 impl Rsm {
1510 #[doc = "I3C is running."]
1511 pub const _0: Self = Self::new(0);
1512
1513 #[doc = "I3C is suspended."]
1514 pub const _1: Self = Self::new(1);
1515 }
1516 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1517 pub struct Buse_SPEC;
1518 pub type Buse = crate::EnumBitfieldStruct<u8, Buse_SPEC>;
1519 impl Buse {
1520 #[doc = "I3C bus operation is disabled."]
1521 pub const _0: Self = Self::new(0);
1522
1523 #[doc = "I3C bus operation is enabled."]
1524 pub const _1: Self = Self::new(1);
1525 }
1526}
1527#[doc(hidden)]
1528#[derive(Copy, Clone, Eq, PartialEq)]
1529pub struct Msdvad_SPEC;
1530impl crate::sealed::RegSpec for Msdvad_SPEC {
1531 type DataType = u32;
1532}
1533
1534#[doc = "Master Device Address Register"]
1535pub type Msdvad = crate::RegValueT<Msdvad_SPEC>;
1536
1537impl Msdvad {
1538 #[doc = "Master Dynamic Address"]
1539 #[inline(always)]
1540 pub fn mdyad(
1541 self,
1542 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Msdvad_SPEC, crate::common::RW> {
1543 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Msdvad_SPEC,crate::common::RW>::from_register(self,0)
1544 }
1545
1546 #[doc = "Master Dynamic Address Valid"]
1547 #[inline(always)]
1548 pub fn mdyadv(
1549 self,
1550 ) -> crate::common::RegisterField<
1551 31,
1552 0x1,
1553 1,
1554 0,
1555 msdvad::Mdyadv,
1556 msdvad::Mdyadv,
1557 Msdvad_SPEC,
1558 crate::common::RW,
1559 > {
1560 crate::common::RegisterField::<
1561 31,
1562 0x1,
1563 1,
1564 0,
1565 msdvad::Mdyadv,
1566 msdvad::Mdyadv,
1567 Msdvad_SPEC,
1568 crate::common::RW,
1569 >::from_register(self, 0)
1570 }
1571}
1572impl ::core::default::Default for Msdvad {
1573 #[inline(always)]
1574 fn default() -> Msdvad {
1575 <crate::RegValueT<Msdvad_SPEC> as RegisterValue<_>>::new(0)
1576 }
1577}
1578pub mod msdvad {
1579
1580 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1581 pub struct Mdyadv_SPEC;
1582 pub type Mdyadv = crate::EnumBitfieldStruct<u8, Mdyadv_SPEC>;
1583 impl Mdyadv {
1584 #[doc = "The master dynamic address field is not valid."]
1585 pub const _0: Self = Self::new(0);
1586
1587 #[doc = "The master dynamic address field is valid."]
1588 pub const _1: Self = Self::new(1);
1589 }
1590}
1591#[doc(hidden)]
1592#[derive(Copy, Clone, Eq, PartialEq)]
1593pub struct Rstctl_SPEC;
1594impl crate::sealed::RegSpec for Rstctl_SPEC {
1595 type DataType = u32;
1596}
1597
1598#[doc = "Reset Control Register"]
1599pub type Rstctl = crate::RegValueT<Rstctl_SPEC>;
1600
1601impl Rstctl {
1602 #[doc = "I3C Software Reset"]
1603 #[inline(always)]
1604 pub fn ri3crst(
1605 self,
1606 ) -> crate::common::RegisterField<
1607 0,
1608 0x1,
1609 1,
1610 0,
1611 rstctl::Ri3Crst,
1612 rstctl::Ri3Crst,
1613 Rstctl_SPEC,
1614 crate::common::RW,
1615 > {
1616 crate::common::RegisterField::<
1617 0,
1618 0x1,
1619 1,
1620 0,
1621 rstctl::Ri3Crst,
1622 rstctl::Ri3Crst,
1623 Rstctl_SPEC,
1624 crate::common::RW,
1625 >::from_register(self, 0)
1626 }
1627
1628 #[doc = "Command Queue Software Reset"]
1629 #[inline(always)]
1630 pub fn cmdqrst(
1631 self,
1632 ) -> crate::common::RegisterField<
1633 1,
1634 0x1,
1635 1,
1636 0,
1637 rstctl::Cmdqrst,
1638 rstctl::Cmdqrst,
1639 Rstctl_SPEC,
1640 crate::common::RW,
1641 > {
1642 crate::common::RegisterField::<
1643 1,
1644 0x1,
1645 1,
1646 0,
1647 rstctl::Cmdqrst,
1648 rstctl::Cmdqrst,
1649 Rstctl_SPEC,
1650 crate::common::RW,
1651 >::from_register(self, 0)
1652 }
1653
1654 #[doc = "Response Queue Software Reset"]
1655 #[inline(always)]
1656 pub fn rspqrst(
1657 self,
1658 ) -> crate::common::RegisterField<
1659 2,
1660 0x1,
1661 1,
1662 0,
1663 rstctl::Rspqrst,
1664 rstctl::Rspqrst,
1665 Rstctl_SPEC,
1666 crate::common::RW,
1667 > {
1668 crate::common::RegisterField::<
1669 2,
1670 0x1,
1671 1,
1672 0,
1673 rstctl::Rspqrst,
1674 rstctl::Rspqrst,
1675 Rstctl_SPEC,
1676 crate::common::RW,
1677 >::from_register(self, 0)
1678 }
1679
1680 #[doc = "Transmit Data Buffer Software Reset"]
1681 #[inline(always)]
1682 pub fn tdbrst(
1683 self,
1684 ) -> crate::common::RegisterField<
1685 3,
1686 0x1,
1687 1,
1688 0,
1689 rstctl::Tdbrst,
1690 rstctl::Tdbrst,
1691 Rstctl_SPEC,
1692 crate::common::RW,
1693 > {
1694 crate::common::RegisterField::<
1695 3,
1696 0x1,
1697 1,
1698 0,
1699 rstctl::Tdbrst,
1700 rstctl::Tdbrst,
1701 Rstctl_SPEC,
1702 crate::common::RW,
1703 >::from_register(self, 0)
1704 }
1705
1706 #[doc = "Receive Data Buffer Software Reset"]
1707 #[inline(always)]
1708 pub fn rdbrst(
1709 self,
1710 ) -> crate::common::RegisterField<
1711 4,
1712 0x1,
1713 1,
1714 0,
1715 rstctl::Rdbrst,
1716 rstctl::Rdbrst,
1717 Rstctl_SPEC,
1718 crate::common::RW,
1719 > {
1720 crate::common::RegisterField::<
1721 4,
1722 0x1,
1723 1,
1724 0,
1725 rstctl::Rdbrst,
1726 rstctl::Rdbrst,
1727 Rstctl_SPEC,
1728 crate::common::RW,
1729 >::from_register(self, 0)
1730 }
1731
1732 #[doc = "IBI Queue Software Reset"]
1733 #[inline(always)]
1734 pub fn ibiqrst(
1735 self,
1736 ) -> crate::common::RegisterField<
1737 5,
1738 0x1,
1739 1,
1740 0,
1741 rstctl::Ibiqrst,
1742 rstctl::Ibiqrst,
1743 Rstctl_SPEC,
1744 crate::common::RW,
1745 > {
1746 crate::common::RegisterField::<
1747 5,
1748 0x1,
1749 1,
1750 0,
1751 rstctl::Ibiqrst,
1752 rstctl::Ibiqrst,
1753 Rstctl_SPEC,
1754 crate::common::RW,
1755 >::from_register(self, 0)
1756 }
1757
1758 #[doc = "Receive Status Queue Software Reset"]
1759 #[inline(always)]
1760 pub fn rsqrst(
1761 self,
1762 ) -> crate::common::RegisterField<
1763 6,
1764 0x1,
1765 1,
1766 0,
1767 rstctl::Rsqrst,
1768 rstctl::Rsqrst,
1769 Rstctl_SPEC,
1770 crate::common::RW,
1771 > {
1772 crate::common::RegisterField::<
1773 6,
1774 0x1,
1775 1,
1776 0,
1777 rstctl::Rsqrst,
1778 rstctl::Rsqrst,
1779 Rstctl_SPEC,
1780 crate::common::RW,
1781 >::from_register(self, 0)
1782 }
1783
1784 #[doc = "High Priority Command Queue Software Reset"]
1785 #[inline(always)]
1786 pub fn hcmdqrst(
1787 self,
1788 ) -> crate::common::RegisterField<
1789 9,
1790 0x1,
1791 1,
1792 0,
1793 rstctl::Hcmdqrst,
1794 rstctl::Hcmdqrst,
1795 Rstctl_SPEC,
1796 crate::common::RW,
1797 > {
1798 crate::common::RegisterField::<
1799 9,
1800 0x1,
1801 1,
1802 0,
1803 rstctl::Hcmdqrst,
1804 rstctl::Hcmdqrst,
1805 Rstctl_SPEC,
1806 crate::common::RW,
1807 >::from_register(self, 0)
1808 }
1809
1810 #[doc = "High Priority Response Queue Software Reset"]
1811 #[inline(always)]
1812 pub fn hrspqrst(
1813 self,
1814 ) -> crate::common::RegisterField<
1815 10,
1816 0x1,
1817 1,
1818 0,
1819 rstctl::Hrspqrst,
1820 rstctl::Hrspqrst,
1821 Rstctl_SPEC,
1822 crate::common::RW,
1823 > {
1824 crate::common::RegisterField::<
1825 10,
1826 0x1,
1827 1,
1828 0,
1829 rstctl::Hrspqrst,
1830 rstctl::Hrspqrst,
1831 Rstctl_SPEC,
1832 crate::common::RW,
1833 >::from_register(self, 0)
1834 }
1835
1836 #[doc = "High Priority Transmit Data Buffer Software Reset"]
1837 #[inline(always)]
1838 pub fn htdbrst(
1839 self,
1840 ) -> crate::common::RegisterField<
1841 11,
1842 0x1,
1843 1,
1844 0,
1845 rstctl::Htdbrst,
1846 rstctl::Htdbrst,
1847 Rstctl_SPEC,
1848 crate::common::RW,
1849 > {
1850 crate::common::RegisterField::<
1851 11,
1852 0x1,
1853 1,
1854 0,
1855 rstctl::Htdbrst,
1856 rstctl::Htdbrst,
1857 Rstctl_SPEC,
1858 crate::common::RW,
1859 >::from_register(self, 0)
1860 }
1861
1862 #[doc = "High Priority Receive Data Buffer Software Reset"]
1863 #[inline(always)]
1864 pub fn hrdbrst(
1865 self,
1866 ) -> crate::common::RegisterField<
1867 12,
1868 0x1,
1869 1,
1870 0,
1871 rstctl::Hrdbrst,
1872 rstctl::Hrdbrst,
1873 Rstctl_SPEC,
1874 crate::common::RW,
1875 > {
1876 crate::common::RegisterField::<
1877 12,
1878 0x1,
1879 1,
1880 0,
1881 rstctl::Hrdbrst,
1882 rstctl::Hrdbrst,
1883 Rstctl_SPEC,
1884 crate::common::RW,
1885 >::from_register(self, 0)
1886 }
1887
1888 #[doc = "Internal Software Reset"]
1889 #[inline(always)]
1890 pub fn intlrst(
1891 self,
1892 ) -> crate::common::RegisterField<
1893 16,
1894 0x1,
1895 1,
1896 0,
1897 rstctl::Intlrst,
1898 rstctl::Intlrst,
1899 Rstctl_SPEC,
1900 crate::common::RW,
1901 > {
1902 crate::common::RegisterField::<
1903 16,
1904 0x1,
1905 1,
1906 0,
1907 rstctl::Intlrst,
1908 rstctl::Intlrst,
1909 Rstctl_SPEC,
1910 crate::common::RW,
1911 >::from_register(self, 0)
1912 }
1913}
1914impl ::core::default::Default for Rstctl {
1915 #[inline(always)]
1916 fn default() -> Rstctl {
1917 <crate::RegValueT<Rstctl_SPEC> as RegisterValue<_>>::new(0)
1918 }
1919}
1920pub mod rstctl {
1921
1922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1923 pub struct Ri3Crst_SPEC;
1924 pub type Ri3Crst = crate::EnumBitfieldStruct<u8, Ri3Crst_SPEC>;
1925 impl Ri3Crst {
1926 #[doc = "Release I3C reset."]
1927 pub const _0: Self = Self::new(0);
1928
1929 #[doc = "Initiate I3C reset."]
1930 pub const _1: Self = Self::new(1);
1931 }
1932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1933 pub struct Cmdqrst_SPEC;
1934 pub type Cmdqrst = crate::EnumBitfieldStruct<u8, Cmdqrst_SPEC>;
1935 impl Cmdqrst {
1936 #[doc = "The Command Queues in I3C is not flushed."]
1937 pub const _0: Self = Self::new(0);
1938
1939 #[doc = "The Command Queues in I3C is flushed."]
1940 pub const _1: Self = Self::new(1);
1941 }
1942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1943 pub struct Rspqrst_SPEC;
1944 pub type Rspqrst = crate::EnumBitfieldStruct<u8, Rspqrst_SPEC>;
1945 impl Rspqrst {
1946 #[doc = "The Response Queues in I3C is not flushed."]
1947 pub const _0: Self = Self::new(0);
1948
1949 #[doc = "The Response Queues in I3C is flushed."]
1950 pub const _1: Self = Self::new(1);
1951 }
1952 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1953 pub struct Tdbrst_SPEC;
1954 pub type Tdbrst = crate::EnumBitfieldStruct<u8, Tdbrst_SPEC>;
1955 impl Tdbrst {
1956 #[doc = "The Transmit Queues in I3C is not flushed."]
1957 pub const _0: Self = Self::new(0);
1958
1959 #[doc = "The Transmit Queues in I3C is flushed."]
1960 pub const _1: Self = Self::new(1);
1961 }
1962 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1963 pub struct Rdbrst_SPEC;
1964 pub type Rdbrst = crate::EnumBitfieldStruct<u8, Rdbrst_SPEC>;
1965 impl Rdbrst {
1966 #[doc = "The Receive Queues in I3C is not flushed."]
1967 pub const _0: Self = Self::new(0);
1968
1969 #[doc = "The Receive Queues in I3C is flushed."]
1970 pub const _1: Self = Self::new(1);
1971 }
1972 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1973 pub struct Ibiqrst_SPEC;
1974 pub type Ibiqrst = crate::EnumBitfieldStruct<u8, Ibiqrst_SPEC>;
1975 impl Ibiqrst {
1976 #[doc = "The IBI Queues in I3C is not flushed."]
1977 pub const _0: Self = Self::new(0);
1978
1979 #[doc = "The IBI Queues in I3C is flushed."]
1980 pub const _1: Self = Self::new(1);
1981 }
1982 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1983 pub struct Rsqrst_SPEC;
1984 pub type Rsqrst = crate::EnumBitfieldStruct<u8, Rsqrst_SPEC>;
1985 impl Rsqrst {
1986 #[doc = "The Receive Status Queue in I3C is not flushed."]
1987 pub const _0: Self = Self::new(0);
1988
1989 #[doc = "The Receive Status Queue in I3C is flushed."]
1990 pub const _1: Self = Self::new(1);
1991 }
1992 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1993 pub struct Hcmdqrst_SPEC;
1994 pub type Hcmdqrst = crate::EnumBitfieldStruct<u8, Hcmdqrst_SPEC>;
1995 impl Hcmdqrst {
1996 #[doc = "The High Priority Command Queues in I3C is not flushed."]
1997 pub const _0: Self = Self::new(0);
1998
1999 #[doc = "The High Priority Command Queues in I3C is flushed."]
2000 pub const _1: Self = Self::new(1);
2001 }
2002 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2003 pub struct Hrspqrst_SPEC;
2004 pub type Hrspqrst = crate::EnumBitfieldStruct<u8, Hrspqrst_SPEC>;
2005 impl Hrspqrst {
2006 #[doc = "The High Priority Response Queues in I3C is not flushed."]
2007 pub const _0: Self = Self::new(0);
2008
2009 #[doc = "The High Priority Response Queues in I3C is flushed."]
2010 pub const _1: Self = Self::new(1);
2011 }
2012 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2013 pub struct Htdbrst_SPEC;
2014 pub type Htdbrst = crate::EnumBitfieldStruct<u8, Htdbrst_SPEC>;
2015 impl Htdbrst {
2016 #[doc = "The High Priority Transmit Queues in I3C is not flushed."]
2017 pub const _0: Self = Self::new(0);
2018
2019 #[doc = "The High Priority Transmit Queues in I3C is flushed."]
2020 pub const _1: Self = Self::new(1);
2021 }
2022 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2023 pub struct Hrdbrst_SPEC;
2024 pub type Hrdbrst = crate::EnumBitfieldStruct<u8, Hrdbrst_SPEC>;
2025 impl Hrdbrst {
2026 #[doc = "The High Priority Receive Queues in I3C is not flushed."]
2027 pub const _0: Self = Self::new(0);
2028
2029 #[doc = "The High Priority Receive Queues in I3C is flushed."]
2030 pub const _1: Self = Self::new(1);
2031 }
2032 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2033 pub struct Intlrst_SPEC;
2034 pub type Intlrst = crate::EnumBitfieldStruct<u8, Intlrst_SPEC>;
2035 impl Intlrst {
2036 #[doc = "Releases of some registers and internal state."]
2037 pub const _0: Self = Self::new(0);
2038
2039 #[doc = "Resets of some registers and internal state."]
2040 pub const _1: Self = Self::new(1);
2041 }
2042}
2043#[doc(hidden)]
2044#[derive(Copy, Clone, Eq, PartialEq)]
2045pub struct Prsst_SPEC;
2046impl crate::sealed::RegSpec for Prsst_SPEC {
2047 type DataType = u32;
2048}
2049
2050#[doc = "Present State Register"]
2051pub type Prsst = crate::RegValueT<Prsst_SPEC>;
2052
2053impl Prsst {
2054 #[doc = "Current Master"]
2055 #[inline(always)]
2056 pub fn crms(
2057 self,
2058 ) -> crate::common::RegisterField<
2059 2,
2060 0x1,
2061 1,
2062 0,
2063 prsst::Crms,
2064 prsst::Crms,
2065 Prsst_SPEC,
2066 crate::common::RW,
2067 > {
2068 crate::common::RegisterField::<
2069 2,
2070 0x1,
2071 1,
2072 0,
2073 prsst::Crms,
2074 prsst::Crms,
2075 Prsst_SPEC,
2076 crate::common::RW,
2077 >::from_register(self, 0)
2078 }
2079
2080 #[doc = "Transmit/Receive Mode"]
2081 #[inline(always)]
2082 pub fn trmd(
2083 self,
2084 ) -> crate::common::RegisterField<
2085 4,
2086 0x1,
2087 1,
2088 0,
2089 prsst::Trmd,
2090 prsst::Trmd,
2091 Prsst_SPEC,
2092 crate::common::R,
2093 > {
2094 crate::common::RegisterField::<
2095 4,
2096 0x1,
2097 1,
2098 0,
2099 prsst::Trmd,
2100 prsst::Trmd,
2101 Prsst_SPEC,
2102 crate::common::R,
2103 >::from_register(self, 0)
2104 }
2105
2106 #[doc = "Present State Write Protect"]
2107 #[inline(always)]
2108 pub fn prsstwp(
2109 self,
2110 ) -> crate::common::RegisterField<
2111 7,
2112 0x1,
2113 1,
2114 0,
2115 prsst::Prsstwp,
2116 prsst::Prsstwp,
2117 Prsst_SPEC,
2118 crate::common::W,
2119 > {
2120 crate::common::RegisterField::<
2121 7,
2122 0x1,
2123 1,
2124 0,
2125 prsst::Prsstwp,
2126 prsst::Prsstwp,
2127 Prsst_SPEC,
2128 crate::common::W,
2129 >::from_register(self, 0)
2130 }
2131}
2132impl ::core::default::Default for Prsst {
2133 #[inline(always)]
2134 fn default() -> Prsst {
2135 <crate::RegValueT<Prsst_SPEC> as RegisterValue<_>>::new(0)
2136 }
2137}
2138pub mod prsst {
2139
2140 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2141 pub struct Crms_SPEC;
2142 pub type Crms = crate::EnumBitfieldStruct<u8, Crms_SPEC>;
2143 impl Crms {
2144 #[doc = "The Master is not the Current Master, and must request and acquire bus ownership before initiating any transfer."]
2145 pub const _0: Self = Self::new(0);
2146
2147 #[doc = "The Master is the Current Master, and as a result can initiate transfers."]
2148 pub const _1: Self = Self::new(1);
2149 }
2150 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2151 pub struct Trmd_SPEC;
2152 pub type Trmd = crate::EnumBitfieldStruct<u8, Trmd_SPEC>;
2153 impl Trmd {
2154 #[doc = "Receive mode"]
2155 pub const _0: Self = Self::new(0);
2156
2157 #[doc = "Transmit mode"]
2158 pub const _1: Self = Self::new(1);
2159 }
2160 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2161 pub struct Prsstwp_SPEC;
2162 pub type Prsstwp = crate::EnumBitfieldStruct<u8, Prsstwp_SPEC>;
2163 impl Prsstwp {
2164 #[doc = "CRMS bit is protected."]
2165 pub const _0: Self = Self::new(0);
2166
2167 #[doc = "CRMS bit can be written when writing simultaneously with the value of the target bit."]
2168 pub const _1: Self = Self::new(1);
2169 }
2170}
2171#[doc(hidden)]
2172#[derive(Copy, Clone, Eq, PartialEq)]
2173pub struct Inst_SPEC;
2174impl crate::sealed::RegSpec for Inst_SPEC {
2175 type DataType = u32;
2176}
2177
2178#[doc = "Internal Status Register"]
2179pub type Inst = crate::RegValueT<Inst_SPEC>;
2180
2181impl Inst {
2182 #[doc = "Internal Error Flag"]
2183 #[inline(always)]
2184 pub fn inef(
2185 self,
2186 ) -> crate::common::RegisterField<
2187 10,
2188 0x1,
2189 1,
2190 0,
2191 inst::Inef,
2192 inst::Inef,
2193 Inst_SPEC,
2194 crate::common::RW,
2195 > {
2196 crate::common::RegisterField::<
2197 10,
2198 0x1,
2199 1,
2200 0,
2201 inst::Inef,
2202 inst::Inef,
2203 Inst_SPEC,
2204 crate::common::RW,
2205 >::from_register(self, 0)
2206 }
2207}
2208impl ::core::default::Default for Inst {
2209 #[inline(always)]
2210 fn default() -> Inst {
2211 <crate::RegValueT<Inst_SPEC> as RegisterValue<_>>::new(0)
2212 }
2213}
2214pub mod inst {
2215
2216 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2217 pub struct Inef_SPEC;
2218 pub type Inef = crate::EnumBitfieldStruct<u8, Inef_SPEC>;
2219 impl Inef {
2220 #[doc = "I3C Internal Error has not detected."]
2221 pub const _0: Self = Self::new(0);
2222
2223 #[doc = "I3C Internal Error has detected."]
2224 pub const _1: Self = Self::new(1);
2225 }
2226}
2227#[doc(hidden)]
2228#[derive(Copy, Clone, Eq, PartialEq)]
2229pub struct Inste_SPEC;
2230impl crate::sealed::RegSpec for Inste_SPEC {
2231 type DataType = u32;
2232}
2233
2234#[doc = "Internal Status Enable Register"]
2235pub type Inste = crate::RegValueT<Inste_SPEC>;
2236
2237impl Inste {
2238 #[doc = "Internal Error Enable"]
2239 #[inline(always)]
2240 pub fn inee(
2241 self,
2242 ) -> crate::common::RegisterField<
2243 10,
2244 0x1,
2245 1,
2246 0,
2247 inste::Inee,
2248 inste::Inee,
2249 Inste_SPEC,
2250 crate::common::RW,
2251 > {
2252 crate::common::RegisterField::<
2253 10,
2254 0x1,
2255 1,
2256 0,
2257 inste::Inee,
2258 inste::Inee,
2259 Inste_SPEC,
2260 crate::common::RW,
2261 >::from_register(self, 0)
2262 }
2263}
2264impl ::core::default::Default for Inste {
2265 #[inline(always)]
2266 fn default() -> Inste {
2267 <crate::RegValueT<Inste_SPEC> as RegisterValue<_>>::new(0)
2268 }
2269}
2270pub mod inste {
2271
2272 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2273 pub struct Inee_SPEC;
2274 pub type Inee = crate::EnumBitfieldStruct<u8, Inee_SPEC>;
2275 impl Inee {
2276 #[doc = "Disable INST.INEF"]
2277 pub const _0: Self = Self::new(0);
2278
2279 #[doc = "Enable INST.INEF"]
2280 pub const _1: Self = Self::new(1);
2281 }
2282}
2283#[doc(hidden)]
2284#[derive(Copy, Clone, Eq, PartialEq)]
2285pub struct Inie_SPEC;
2286impl crate::sealed::RegSpec for Inie_SPEC {
2287 type DataType = u32;
2288}
2289
2290#[doc = "Internal Interrupt Enable Register"]
2291pub type Inie = crate::RegValueT<Inie_SPEC>;
2292
2293impl Inie {
2294 #[doc = "Internal Error Interrupt Enable"]
2295 #[inline(always)]
2296 pub fn ineie(
2297 self,
2298 ) -> crate::common::RegisterField<
2299 10,
2300 0x1,
2301 1,
2302 0,
2303 inie::Ineie,
2304 inie::Ineie,
2305 Inie_SPEC,
2306 crate::common::RW,
2307 > {
2308 crate::common::RegisterField::<
2309 10,
2310 0x1,
2311 1,
2312 0,
2313 inie::Ineie,
2314 inie::Ineie,
2315 Inie_SPEC,
2316 crate::common::RW,
2317 >::from_register(self, 0)
2318 }
2319}
2320impl ::core::default::Default for Inie {
2321 #[inline(always)]
2322 fn default() -> Inie {
2323 <crate::RegValueT<Inie_SPEC> as RegisterValue<_>>::new(0)
2324 }
2325}
2326pub mod inie {
2327
2328 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2329 pub struct Ineie_SPEC;
2330 pub type Ineie = crate::EnumBitfieldStruct<u8, Ineie_SPEC>;
2331 impl Ineie {
2332 #[doc = "Disables Non-recoverable Internal Error Interrupt Signal."]
2333 pub const _0: Self = Self::new(0);
2334
2335 #[doc = "Enables Non-recoverable Internal Error Interrupt Signal."]
2336 pub const _1: Self = Self::new(1);
2337 }
2338}
2339#[doc(hidden)]
2340#[derive(Copy, Clone, Eq, PartialEq)]
2341pub struct Instfc_SPEC;
2342impl crate::sealed::RegSpec for Instfc_SPEC {
2343 type DataType = u32;
2344}
2345
2346#[doc = "Internal Status Force Register"]
2347pub type Instfc = crate::RegValueT<Instfc_SPEC>;
2348
2349impl Instfc {
2350 #[doc = "Internal Error Force"]
2351 #[inline(always)]
2352 pub fn inefc(
2353 self,
2354 ) -> crate::common::RegisterField<
2355 10,
2356 0x1,
2357 1,
2358 0,
2359 instfc::Inefc,
2360 instfc::Inefc,
2361 Instfc_SPEC,
2362 crate::common::W,
2363 > {
2364 crate::common::RegisterField::<
2365 10,
2366 0x1,
2367 1,
2368 0,
2369 instfc::Inefc,
2370 instfc::Inefc,
2371 Instfc_SPEC,
2372 crate::common::W,
2373 >::from_register(self, 0)
2374 }
2375}
2376impl ::core::default::Default for Instfc {
2377 #[inline(always)]
2378 fn default() -> Instfc {
2379 <crate::RegValueT<Instfc_SPEC> as RegisterValue<_>>::new(0)
2380 }
2381}
2382pub mod instfc {
2383
2384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2385 pub struct Inefc_SPEC;
2386 pub type Inefc = crate::EnumBitfieldStruct<u8, Inefc_SPEC>;
2387 impl Inefc {
2388 #[doc = "Not force a specific interrupt"]
2389 pub const _0: Self = Self::new(0);
2390
2391 #[doc = "Force a specific interrupt"]
2392 pub const _1: Self = Self::new(1);
2393 }
2394}
2395#[doc(hidden)]
2396#[derive(Copy, Clone, Eq, PartialEq)]
2397pub struct Dvct_SPEC;
2398impl crate::sealed::RegSpec for Dvct_SPEC {
2399 type DataType = u32;
2400}
2401
2402#[doc = "Device Characteristic Table Register"]
2403pub type Dvct = crate::RegValueT<Dvct_SPEC>;
2404
2405impl Dvct {
2406 #[doc = "DCT Table Index"]
2407 #[inline(always)]
2408 pub fn idx(
2409 self,
2410 ) -> crate::common::RegisterField<19, 0x1f, 1, 0, u8, u8, Dvct_SPEC, crate::common::R> {
2411 crate::common::RegisterField::<19,0x1f,1,0,u8,u8,Dvct_SPEC,crate::common::R>::from_register(self,0)
2412 }
2413}
2414impl ::core::default::Default for Dvct {
2415 #[inline(always)]
2416 fn default() -> Dvct {
2417 <crate::RegValueT<Dvct_SPEC> as RegisterValue<_>>::new(0)
2418 }
2419}
2420
2421#[doc(hidden)]
2422#[derive(Copy, Clone, Eq, PartialEq)]
2423pub struct Ibinctl_SPEC;
2424impl crate::sealed::RegSpec for Ibinctl_SPEC {
2425 type DataType = u32;
2426}
2427
2428#[doc = "IBI Notify Control Register"]
2429pub type Ibinctl = crate::RegValueT<Ibinctl_SPEC>;
2430
2431impl Ibinctl {
2432 #[doc = "Notify Rejected Master Request Control"]
2433 #[inline(always)]
2434 pub fn nrmrctl(
2435 self,
2436 ) -> crate::common::RegisterField<
2437 1,
2438 0x1,
2439 1,
2440 0,
2441 ibinctl::Nrmrctl,
2442 ibinctl::Nrmrctl,
2443 Ibinctl_SPEC,
2444 crate::common::RW,
2445 > {
2446 crate::common::RegisterField::<
2447 1,
2448 0x1,
2449 1,
2450 0,
2451 ibinctl::Nrmrctl,
2452 ibinctl::Nrmrctl,
2453 Ibinctl_SPEC,
2454 crate::common::RW,
2455 >::from_register(self, 0)
2456 }
2457
2458 #[doc = "Notify Rejected Slave Interrupt Request Control"]
2459 #[inline(always)]
2460 pub fn nrsirctl(
2461 self,
2462 ) -> crate::common::RegisterField<
2463 3,
2464 0x1,
2465 1,
2466 0,
2467 ibinctl::Nrsirctl,
2468 ibinctl::Nrsirctl,
2469 Ibinctl_SPEC,
2470 crate::common::RW,
2471 > {
2472 crate::common::RegisterField::<
2473 3,
2474 0x1,
2475 1,
2476 0,
2477 ibinctl::Nrsirctl,
2478 ibinctl::Nrsirctl,
2479 Ibinctl_SPEC,
2480 crate::common::RW,
2481 >::from_register(self, 0)
2482 }
2483}
2484impl ::core::default::Default for Ibinctl {
2485 #[inline(always)]
2486 fn default() -> Ibinctl {
2487 <crate::RegValueT<Ibinctl_SPEC> as RegisterValue<_>>::new(0)
2488 }
2489}
2490pub mod ibinctl {
2491
2492 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2493 pub struct Nrmrctl_SPEC;
2494 pub type Nrmrctl = crate::EnumBitfieldStruct<u8, Nrmrctl_SPEC>;
2495 impl Nrmrctl {
2496 #[doc = "Do not pass rejected IBI Status to IBI Queue/Ring, if the incoming Master Request is NACKed and is auto-disabled based on DVMRRJ field in relevant DAT entry."]
2497 pub const _0: Self = Self::new(0);
2498
2499 #[doc = "Pass rejected IBI Status to the IBI Queue, if the incoming Master Request is NACKed and is autodisabled based on DVMRRJ field in relevant DAT entry."]
2500 pub const _1: Self = Self::new(1);
2501 }
2502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2503 pub struct Nrsirctl_SPEC;
2504 pub type Nrsirctl = crate::EnumBitfieldStruct<u8, Nrsirctl_SPEC>;
2505 impl Nrsirctl {
2506 #[doc = "Do not pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2507 pub const _0: Self = Self::new(0);
2508
2509 #[doc = "Pass rejected IBI Status to the IBI Queue/Rings, if the incoming SIR is NACKed and is auto-disabled based on DVSIRRJ field in relevant DAT entry."]
2510 pub const _1: Self = Self::new(1);
2511 }
2512}
2513#[doc(hidden)]
2514#[derive(Copy, Clone, Eq, PartialEq)]
2515pub struct Bfctl_SPEC;
2516impl crate::sealed::RegSpec for Bfctl_SPEC {
2517 type DataType = u32;
2518}
2519
2520#[doc = "Bus Function Control Register"]
2521pub type Bfctl = crate::RegValueT<Bfctl_SPEC>;
2522
2523impl Bfctl {
2524 #[doc = "Master Arbitration-Lost Detection Enable"]
2525 #[inline(always)]
2526 pub fn male(
2527 self,
2528 ) -> crate::common::RegisterField<
2529 0,
2530 0x1,
2531 1,
2532 0,
2533 bfctl::Male,
2534 bfctl::Male,
2535 Bfctl_SPEC,
2536 crate::common::RW,
2537 > {
2538 crate::common::RegisterField::<
2539 0,
2540 0x1,
2541 1,
2542 0,
2543 bfctl::Male,
2544 bfctl::Male,
2545 Bfctl_SPEC,
2546 crate::common::RW,
2547 >::from_register(self, 0)
2548 }
2549
2550 #[doc = "NACK Transmission Arbitration-Lost Detection Enable"]
2551 #[inline(always)]
2552 pub fn nale(
2553 self,
2554 ) -> crate::common::RegisterField<
2555 1,
2556 0x1,
2557 1,
2558 0,
2559 bfctl::Nale,
2560 bfctl::Nale,
2561 Bfctl_SPEC,
2562 crate::common::RW,
2563 > {
2564 crate::common::RegisterField::<
2565 1,
2566 0x1,
2567 1,
2568 0,
2569 bfctl::Nale,
2570 bfctl::Nale,
2571 Bfctl_SPEC,
2572 crate::common::RW,
2573 >::from_register(self, 0)
2574 }
2575
2576 #[doc = "Slave Arbitration-Lost Detection Enable"]
2577 #[inline(always)]
2578 pub fn sale(
2579 self,
2580 ) -> crate::common::RegisterField<
2581 2,
2582 0x1,
2583 1,
2584 0,
2585 bfctl::Sale,
2586 bfctl::Sale,
2587 Bfctl_SPEC,
2588 crate::common::RW,
2589 > {
2590 crate::common::RegisterField::<
2591 2,
2592 0x1,
2593 1,
2594 0,
2595 bfctl::Sale,
2596 bfctl::Sale,
2597 Bfctl_SPEC,
2598 crate::common::RW,
2599 >::from_register(self, 0)
2600 }
2601
2602 #[doc = "SCL Synchronous Circuit Enable"]
2603 #[inline(always)]
2604 pub fn scsyne(
2605 self,
2606 ) -> crate::common::RegisterField<
2607 8,
2608 0x1,
2609 1,
2610 0,
2611 bfctl::Scsyne,
2612 bfctl::Scsyne,
2613 Bfctl_SPEC,
2614 crate::common::RW,
2615 > {
2616 crate::common::RegisterField::<
2617 8,
2618 0x1,
2619 1,
2620 0,
2621 bfctl::Scsyne,
2622 bfctl::Scsyne,
2623 Bfctl_SPEC,
2624 crate::common::RW,
2625 >::from_register(self, 0)
2626 }
2627
2628 #[doc = "SMBus/I2C Bus Selection"]
2629 #[inline(always)]
2630 pub fn smbs(
2631 self,
2632 ) -> crate::common::RegisterField<
2633 12,
2634 0x1,
2635 1,
2636 0,
2637 bfctl::Smbs,
2638 bfctl::Smbs,
2639 Bfctl_SPEC,
2640 crate::common::RW,
2641 > {
2642 crate::common::RegisterField::<
2643 12,
2644 0x1,
2645 1,
2646 0,
2647 bfctl::Smbs,
2648 bfctl::Smbs,
2649 Bfctl_SPEC,
2650 crate::common::RW,
2651 >::from_register(self, 0)
2652 }
2653
2654 #[doc = "Fast-mode Plus Enable"]
2655 #[inline(always)]
2656 pub fn fmpe(
2657 self,
2658 ) -> crate::common::RegisterField<
2659 14,
2660 0x1,
2661 1,
2662 0,
2663 bfctl::Fmpe,
2664 bfctl::Fmpe,
2665 Bfctl_SPEC,
2666 crate::common::RW,
2667 > {
2668 crate::common::RegisterField::<
2669 14,
2670 0x1,
2671 1,
2672 0,
2673 bfctl::Fmpe,
2674 bfctl::Fmpe,
2675 Bfctl_SPEC,
2676 crate::common::RW,
2677 >::from_register(self, 0)
2678 }
2679
2680 #[doc = "High Speed Mode Enable"]
2681 #[inline(always)]
2682 pub fn hsme(
2683 self,
2684 ) -> crate::common::RegisterField<
2685 15,
2686 0x1,
2687 1,
2688 0,
2689 bfctl::Hsme,
2690 bfctl::Hsme,
2691 Bfctl_SPEC,
2692 crate::common::RW,
2693 > {
2694 crate::common::RegisterField::<
2695 15,
2696 0x1,
2697 1,
2698 0,
2699 bfctl::Hsme,
2700 bfctl::Hsme,
2701 Bfctl_SPEC,
2702 crate::common::RW,
2703 >::from_register(self, 0)
2704 }
2705}
2706impl ::core::default::Default for Bfctl {
2707 #[inline(always)]
2708 fn default() -> Bfctl {
2709 <crate::RegValueT<Bfctl_SPEC> as RegisterValue<_>>::new(257)
2710 }
2711}
2712pub mod bfctl {
2713
2714 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2715 pub struct Male_SPEC;
2716 pub type Male = crate::EnumBitfieldStruct<u8, Male_SPEC>;
2717 impl Male {
2718 #[doc = "Master arbitration-lost detection disables. Disables the arbitration-lost detection function and does not clear the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2719 pub const _0: Self = Self::new(0);
2720
2721 #[doc = "Master arbitration-lost detection enables. Enables the arbitration-lost detection function and clears the CRMS and TRMD bits in PRSST automatically when arbitration is lost."]
2722 pub const _1: Self = Self::new(1);
2723 }
2724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2725 pub struct Nale_SPEC;
2726 pub type Nale = crate::EnumBitfieldStruct<u8, Nale_SPEC>;
2727 impl Nale {
2728 #[doc = "NACK transmission arbitration-lost detection disables."]
2729 pub const _0: Self = Self::new(0);
2730
2731 #[doc = "NACK transmission arbitration-lost detection enables."]
2732 pub const _1: Self = Self::new(1);
2733 }
2734 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2735 pub struct Sale_SPEC;
2736 pub type Sale = crate::EnumBitfieldStruct<u8, Sale_SPEC>;
2737 impl Sale {
2738 #[doc = "Slave arbitration-lost detection disables."]
2739 pub const _0: Self = Self::new(0);
2740
2741 #[doc = "Slave arbitration-lost detection enables."]
2742 pub const _1: Self = Self::new(1);
2743 }
2744 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2745 pub struct Scsyne_SPEC;
2746 pub type Scsyne = crate::EnumBitfieldStruct<u8, Scsyne_SPEC>;
2747 impl Scsyne {
2748 #[doc = "No SCL synchronous circuit uses."]
2749 pub const _0: Self = Self::new(0);
2750
2751 #[doc = "An SCL synchronous circuit uses."]
2752 pub const _1: Self = Self::new(1);
2753 }
2754 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2755 pub struct Smbs_SPEC;
2756 pub type Smbs = crate::EnumBitfieldStruct<u8, Smbs_SPEC>;
2757 impl Smbs {
2758 #[doc = "The I2C bus select."]
2759 pub const _0: Self = Self::new(0);
2760
2761 #[doc = "The SMBus select."]
2762 pub const _1: Self = Self::new(1);
2763 }
2764 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2765 pub struct Fmpe_SPEC;
2766 pub type Fmpe = crate::EnumBitfieldStruct<u8, Fmpe_SPEC>;
2767 impl Fmpe {
2768 #[doc = "No Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
2769 pub const _0: Self = Self::new(0);
2770
2771 #[doc = "An Fm+ slope control circuit uses for the I3C_SCL pin and I3C_SDA pin. (n = 0)"]
2772 pub const _1: Self = Self::new(1);
2773 }
2774 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2775 pub struct Hsme_SPEC;
2776 pub type Hsme = crate::EnumBitfieldStruct<u8, Hsme_SPEC>;
2777 impl Hsme {
2778 #[doc = "Disable High Speed Mode."]
2779 pub const _0: Self = Self::new(0);
2780
2781 #[doc = "Enable High Speed Mode."]
2782 pub const _1: Self = Self::new(1);
2783 }
2784}
2785#[doc(hidden)]
2786#[derive(Copy, Clone, Eq, PartialEq)]
2787pub struct Svctl_SPEC;
2788impl crate::sealed::RegSpec for Svctl_SPEC {
2789 type DataType = u32;
2790}
2791
2792#[doc = "Slave Control Register"]
2793pub type Svctl = crate::RegValueT<Svctl_SPEC>;
2794
2795impl Svctl {
2796 #[doc = "General Call Address Enable"]
2797 #[inline(always)]
2798 pub fn gcae(
2799 self,
2800 ) -> crate::common::RegisterField<
2801 0,
2802 0x1,
2803 1,
2804 0,
2805 svctl::Gcae,
2806 svctl::Gcae,
2807 Svctl_SPEC,
2808 crate::common::RW,
2809 > {
2810 crate::common::RegisterField::<
2811 0,
2812 0x1,
2813 1,
2814 0,
2815 svctl::Gcae,
2816 svctl::Gcae,
2817 Svctl_SPEC,
2818 crate::common::RW,
2819 >::from_register(self, 0)
2820 }
2821
2822 #[doc = "Hs-mode Master Code Enable"]
2823 #[inline(always)]
2824 pub fn hsmce(
2825 self,
2826 ) -> crate::common::RegisterField<
2827 5,
2828 0x1,
2829 1,
2830 0,
2831 svctl::Hsmce,
2832 svctl::Hsmce,
2833 Svctl_SPEC,
2834 crate::common::RW,
2835 > {
2836 crate::common::RegisterField::<
2837 5,
2838 0x1,
2839 1,
2840 0,
2841 svctl::Hsmce,
2842 svctl::Hsmce,
2843 Svctl_SPEC,
2844 crate::common::RW,
2845 >::from_register(self, 0)
2846 }
2847
2848 #[doc = "Device-ID Address Enable"]
2849 #[inline(always)]
2850 pub fn dvide(
2851 self,
2852 ) -> crate::common::RegisterField<
2853 6,
2854 0x1,
2855 1,
2856 0,
2857 svctl::Dvide,
2858 svctl::Dvide,
2859 Svctl_SPEC,
2860 crate::common::RW,
2861 > {
2862 crate::common::RegisterField::<
2863 6,
2864 0x1,
2865 1,
2866 0,
2867 svctl::Dvide,
2868 svctl::Dvide,
2869 Svctl_SPEC,
2870 crate::common::RW,
2871 >::from_register(self, 0)
2872 }
2873
2874 #[doc = "Host Address Enable"]
2875 #[inline(always)]
2876 pub fn hoae(
2877 self,
2878 ) -> crate::common::RegisterField<
2879 15,
2880 0x1,
2881 1,
2882 0,
2883 svctl::Hoae,
2884 svctl::Hoae,
2885 Svctl_SPEC,
2886 crate::common::RW,
2887 > {
2888 crate::common::RegisterField::<
2889 15,
2890 0x1,
2891 1,
2892 0,
2893 svctl::Hoae,
2894 svctl::Hoae,
2895 Svctl_SPEC,
2896 crate::common::RW,
2897 >::from_register(self, 0)
2898 }
2899
2900 #[doc = "Slave Address Enable n ( n = 0 to 2 )"]
2901 #[inline(always)]
2902 pub fn svae(
2903 self,
2904 ) -> crate::common::RegisterField<
2905 16,
2906 0x7,
2907 1,
2908 0,
2909 svctl::Svae,
2910 svctl::Svae,
2911 Svctl_SPEC,
2912 crate::common::RW,
2913 > {
2914 crate::common::RegisterField::<
2915 16,
2916 0x7,
2917 1,
2918 0,
2919 svctl::Svae,
2920 svctl::Svae,
2921 Svctl_SPEC,
2922 crate::common::RW,
2923 >::from_register(self, 0)
2924 }
2925}
2926impl ::core::default::Default for Svctl {
2927 #[inline(always)]
2928 fn default() -> Svctl {
2929 <crate::RegValueT<Svctl_SPEC> as RegisterValue<_>>::new(0)
2930 }
2931}
2932pub mod svctl {
2933
2934 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2935 pub struct Gcae_SPEC;
2936 pub type Gcae = crate::EnumBitfieldStruct<u8, Gcae_SPEC>;
2937 impl Gcae {
2938 #[doc = "General call address detection disables."]
2939 pub const _0: Self = Self::new(0);
2940
2941 #[doc = "General call address detection enables."]
2942 pub const _1: Self = Self::new(1);
2943 }
2944 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2945 pub struct Hsmce_SPEC;
2946 pub type Hsmce = crate::EnumBitfieldStruct<u8, Hsmce_SPEC>;
2947 impl Hsmce {
2948 #[doc = "Hs-mode Master Code Detection disables."]
2949 pub const _0: Self = Self::new(0);
2950
2951 #[doc = "Hs-mode Master Code Detection enables."]
2952 pub const _1: Self = Self::new(1);
2953 }
2954 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2955 pub struct Dvide_SPEC;
2956 pub type Dvide = crate::EnumBitfieldStruct<u8, Dvide_SPEC>;
2957 impl Dvide {
2958 #[doc = "Device-ID address detection disables."]
2959 pub const _0: Self = Self::new(0);
2960
2961 #[doc = "Device-ID address detection enables."]
2962 pub const _1: Self = Self::new(1);
2963 }
2964 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2965 pub struct Hoae_SPEC;
2966 pub type Hoae = crate::EnumBitfieldStruct<u8, Hoae_SPEC>;
2967 impl Hoae {
2968 #[doc = "Host address detection disables."]
2969 pub const _0: Self = Self::new(0);
2970
2971 #[doc = "Host address detection enables."]
2972 pub const _1: Self = Self::new(1);
2973 }
2974 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2975 pub struct Svae_SPEC;
2976 pub type Svae = crate::EnumBitfieldStruct<u8, Svae_SPEC>;
2977 impl Svae {
2978 #[doc = "Slave n disables"]
2979 pub const _0: Self = Self::new(0);
2980
2981 #[doc = "Slave n enables"]
2982 pub const _1: Self = Self::new(1);
2983 }
2984}
2985#[doc(hidden)]
2986#[derive(Copy, Clone, Eq, PartialEq)]
2987pub struct Refckctl_SPEC;
2988impl crate::sealed::RegSpec for Refckctl_SPEC {
2989 type DataType = u32;
2990}
2991
2992#[doc = "Reference Clock Control Register"]
2993pub type Refckctl = crate::RegValueT<Refckctl_SPEC>;
2994
2995impl Refckctl {
2996 #[doc = "Internal Reference Clock Selection"]
2997 #[inline(always)]
2998 pub fn irefcks(
2999 self,
3000 ) -> crate::common::RegisterField<
3001 0,
3002 0x7,
3003 1,
3004 0,
3005 refckctl::Irefcks,
3006 refckctl::Irefcks,
3007 Refckctl_SPEC,
3008 crate::common::RW,
3009 > {
3010 crate::common::RegisterField::<
3011 0,
3012 0x7,
3013 1,
3014 0,
3015 refckctl::Irefcks,
3016 refckctl::Irefcks,
3017 Refckctl_SPEC,
3018 crate::common::RW,
3019 >::from_register(self, 0)
3020 }
3021}
3022impl ::core::default::Default for Refckctl {
3023 #[inline(always)]
3024 fn default() -> Refckctl {
3025 <crate::RegValueT<Refckctl_SPEC> as RegisterValue<_>>::new(0)
3026 }
3027}
3028pub mod refckctl {
3029
3030 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3031 pub struct Irefcks_SPEC;
3032 pub type Irefcks = crate::EnumBitfieldStruct<u8, Irefcks_SPEC>;
3033 impl Irefcks {
3034 #[doc = "TCLK/1 clock"]
3035 pub const _000: Self = Self::new(0);
3036
3037 #[doc = "TCLK/2 clock"]
3038 pub const _001: Self = Self::new(1);
3039
3040 #[doc = "TCLK/4 clock"]
3041 pub const _010: Self = Self::new(2);
3042
3043 #[doc = "TCLK/8 clock"]
3044 pub const _011: Self = Self::new(3);
3045
3046 #[doc = "TCLK/16 clock"]
3047 pub const _100: Self = Self::new(4);
3048
3049 #[doc = "TCLK/32 clock"]
3050 pub const _101: Self = Self::new(5);
3051
3052 #[doc = "TCLK/64 clock"]
3053 pub const _110: Self = Self::new(6);
3054
3055 #[doc = "TCLK/128 clock"]
3056 pub const _111: Self = Self::new(7);
3057 }
3058}
3059#[doc(hidden)]
3060#[derive(Copy, Clone, Eq, PartialEq)]
3061pub struct Stdbr_SPEC;
3062impl crate::sealed::RegSpec for Stdbr_SPEC {
3063 type DataType = u32;
3064}
3065
3066#[doc = "Standard Bit Rate Register"]
3067pub type Stdbr = crate::RegValueT<Stdbr_SPEC>;
3068
3069impl Stdbr {
3070 #[doc = "Standard Bit Rate Low-level Period Open-Drain"]
3071 #[inline(always)]
3072 pub fn sbrlo(
3073 self,
3074 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3075 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3076 }
3077
3078 #[doc = "Standard Bit Rate High-level Period Open-Drain"]
3079 #[inline(always)]
3080 pub fn sbrho(
3081 self,
3082 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3083 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3084 }
3085
3086 #[doc = "Standard Bit Rate Low-level Period Push-Pull"]
3087 #[inline(always)]
3088 pub fn sbrlp(
3089 self,
3090 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3091 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3092 }
3093
3094 #[doc = "Standard Bit Rate High-level Period Push-Pull"]
3095 #[inline(always)]
3096 pub fn sbrhp(
3097 self,
3098 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Stdbr_SPEC, crate::common::RW> {
3099 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Stdbr_SPEC,crate::common::RW>::from_register(self,0)
3100 }
3101
3102 #[doc = "Double the Standard Bit Rate Period for Open-Drain"]
3103 #[inline(always)]
3104 pub fn dsbrpo(
3105 self,
3106 ) -> crate::common::RegisterField<
3107 31,
3108 0x1,
3109 1,
3110 0,
3111 stdbr::Dsbrpo,
3112 stdbr::Dsbrpo,
3113 Stdbr_SPEC,
3114 crate::common::RW,
3115 > {
3116 crate::common::RegisterField::<
3117 31,
3118 0x1,
3119 1,
3120 0,
3121 stdbr::Dsbrpo,
3122 stdbr::Dsbrpo,
3123 Stdbr_SPEC,
3124 crate::common::RW,
3125 >::from_register(self, 0)
3126 }
3127}
3128impl ::core::default::Default for Stdbr {
3129 #[inline(always)]
3130 fn default() -> Stdbr {
3131 <crate::RegValueT<Stdbr_SPEC> as RegisterValue<_>>::new(1061158911)
3132 }
3133}
3134pub mod stdbr {
3135
3136 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3137 pub struct Dsbrpo_SPEC;
3138 pub type Dsbrpo = crate::EnumBitfieldStruct<u8, Dsbrpo_SPEC>;
3139 impl Dsbrpo {
3140 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is not doubled."]
3141 pub const _0: Self = Self::new(0);
3142
3143 #[doc = "The time period set for SBRHO\\[7:0\\] and SBRLO\\[7:0\\] is doubled."]
3144 pub const _1: Self = Self::new(1);
3145 }
3146}
3147#[doc(hidden)]
3148#[derive(Copy, Clone, Eq, PartialEq)]
3149pub struct Extbr_SPEC;
3150impl crate::sealed::RegSpec for Extbr_SPEC {
3151 type DataType = u32;
3152}
3153
3154#[doc = "Extended Bit Rate Register"]
3155pub type Extbr = crate::RegValueT<Extbr_SPEC>;
3156
3157impl Extbr {
3158 #[doc = "Extended Bit Rate Low-level Period Open-Drain"]
3159 #[inline(always)]
3160 pub fn ebrlo(
3161 self,
3162 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3163 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3164 }
3165
3166 #[doc = "Extended Bit Rate High-level Period Open-Drain"]
3167 #[inline(always)]
3168 pub fn ebrho(
3169 self,
3170 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3171 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3172 }
3173
3174 #[doc = "Extended Bit Rate Low-level Period Push-Pull"]
3175 #[inline(always)]
3176 pub fn ebrlp(
3177 self,
3178 ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3179 crate::common::RegisterField::<16,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3180 }
3181
3182 #[doc = "Extended Bit Rate High-level Period Push-Pull"]
3183 #[inline(always)]
3184 pub fn ebrhp(
3185 self,
3186 ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Extbr_SPEC, crate::common::RW> {
3187 crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Extbr_SPEC,crate::common::RW>::from_register(self,0)
3188 }
3189}
3190impl ::core::default::Default for Extbr {
3191 #[inline(always)]
3192 fn default() -> Extbr {
3193 <crate::RegValueT<Extbr_SPEC> as RegisterValue<_>>::new(1061158911)
3194 }
3195}
3196
3197#[doc(hidden)]
3198#[derive(Copy, Clone, Eq, PartialEq)]
3199pub struct Bfrecdt_SPEC;
3200impl crate::sealed::RegSpec for Bfrecdt_SPEC {
3201 type DataType = u32;
3202}
3203
3204#[doc = "Bus Free Condition Detection Time Register"]
3205pub type Bfrecdt = crate::RegValueT<Bfrecdt_SPEC>;
3206
3207impl Bfrecdt {
3208 #[doc = "Bus Free Condition Detection Cycle"]
3209 #[inline(always)]
3210 pub fn frecyc(
3211 self,
3212 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bfrecdt_SPEC, crate::common::RW>
3213 {
3214 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bfrecdt_SPEC,crate::common::RW>::from_register(self,0)
3215 }
3216}
3217impl ::core::default::Default for Bfrecdt {
3218 #[inline(always)]
3219 fn default() -> Bfrecdt {
3220 <crate::RegValueT<Bfrecdt_SPEC> as RegisterValue<_>>::new(0)
3221 }
3222}
3223
3224#[doc(hidden)]
3225#[derive(Copy, Clone, Eq, PartialEq)]
3226pub struct Bavlcdt_SPEC;
3227impl crate::sealed::RegSpec for Bavlcdt_SPEC {
3228 type DataType = u32;
3229}
3230
3231#[doc = "Bus Available Condition Detection Time Register"]
3232pub type Bavlcdt = crate::RegValueT<Bavlcdt_SPEC>;
3233
3234impl Bavlcdt {
3235 #[doc = "Bus Available Condition Detection Cycle"]
3236 #[inline(always)]
3237 pub fn avlcyc(
3238 self,
3239 ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Bavlcdt_SPEC, crate::common::RW>
3240 {
3241 crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Bavlcdt_SPEC,crate::common::RW>::from_register(self,0)
3242 }
3243}
3244impl ::core::default::Default for Bavlcdt {
3245 #[inline(always)]
3246 fn default() -> Bavlcdt {
3247 <crate::RegValueT<Bavlcdt_SPEC> as RegisterValue<_>>::new(0)
3248 }
3249}
3250
3251#[doc(hidden)]
3252#[derive(Copy, Clone, Eq, PartialEq)]
3253pub struct Bidlcdt_SPEC;
3254impl crate::sealed::RegSpec for Bidlcdt_SPEC {
3255 type DataType = u32;
3256}
3257
3258#[doc = "Bus Idle Condition Detection Time Register"]
3259pub type Bidlcdt = crate::RegValueT<Bidlcdt_SPEC>;
3260
3261impl Bidlcdt {
3262 #[doc = "Bus Idle Condition Detection Cycle"]
3263 #[inline(always)]
3264 pub fn idlcyc(
3265 self,
3266 ) -> crate::common::RegisterField<0, 0x3ffff, 1, 0, u32, u32, Bidlcdt_SPEC, crate::common::RW>
3267 {
3268 crate::common::RegisterField::<0,0x3ffff,1,0,u32,u32,Bidlcdt_SPEC,crate::common::RW>::from_register(self,0)
3269 }
3270}
3271impl ::core::default::Default for Bidlcdt {
3272 #[inline(always)]
3273 fn default() -> Bidlcdt {
3274 <crate::RegValueT<Bidlcdt_SPEC> as RegisterValue<_>>::new(0)
3275 }
3276}
3277
3278#[doc(hidden)]
3279#[derive(Copy, Clone, Eq, PartialEq)]
3280pub struct Outctl_SPEC;
3281impl crate::sealed::RegSpec for Outctl_SPEC {
3282 type DataType = u32;
3283}
3284
3285#[doc = "Output Control Register"]
3286pub type Outctl = crate::RegValueT<Outctl_SPEC>;
3287
3288impl Outctl {
3289 #[doc = "SDA Output Control"]
3290 #[inline(always)]
3291 pub fn sdoc(
3292 self,
3293 ) -> crate::common::RegisterField<
3294 0,
3295 0x1,
3296 1,
3297 0,
3298 outctl::Sdoc,
3299 outctl::Sdoc,
3300 Outctl_SPEC,
3301 crate::common::RW,
3302 > {
3303 crate::common::RegisterField::<
3304 0,
3305 0x1,
3306 1,
3307 0,
3308 outctl::Sdoc,
3309 outctl::Sdoc,
3310 Outctl_SPEC,
3311 crate::common::RW,
3312 >::from_register(self, 0)
3313 }
3314
3315 #[doc = "SCL Output Control"]
3316 #[inline(always)]
3317 pub fn scoc(
3318 self,
3319 ) -> crate::common::RegisterField<
3320 1,
3321 0x1,
3322 1,
3323 0,
3324 outctl::Scoc,
3325 outctl::Scoc,
3326 Outctl_SPEC,
3327 crate::common::RW,
3328 > {
3329 crate::common::RegisterField::<
3330 1,
3331 0x1,
3332 1,
3333 0,
3334 outctl::Scoc,
3335 outctl::Scoc,
3336 Outctl_SPEC,
3337 crate::common::RW,
3338 >::from_register(self, 0)
3339 }
3340
3341 #[doc = "SCL/SDA Output Control Write Protect"]
3342 #[inline(always)]
3343 pub fn socwp(
3344 self,
3345 ) -> crate::common::RegisterField<
3346 2,
3347 0x1,
3348 1,
3349 0,
3350 outctl::Socwp,
3351 outctl::Socwp,
3352 Outctl_SPEC,
3353 crate::common::W,
3354 > {
3355 crate::common::RegisterField::<
3356 2,
3357 0x1,
3358 1,
3359 0,
3360 outctl::Socwp,
3361 outctl::Socwp,
3362 Outctl_SPEC,
3363 crate::common::W,
3364 >::from_register(self, 0)
3365 }
3366
3367 #[doc = "Extra SCL Clock Cycle Output"]
3368 #[inline(always)]
3369 pub fn excyc(
3370 self,
3371 ) -> crate::common::RegisterField<
3372 4,
3373 0x1,
3374 1,
3375 0,
3376 outctl::Excyc,
3377 outctl::Excyc,
3378 Outctl_SPEC,
3379 crate::common::RW,
3380 > {
3381 crate::common::RegisterField::<
3382 4,
3383 0x1,
3384 1,
3385 0,
3386 outctl::Excyc,
3387 outctl::Excyc,
3388 Outctl_SPEC,
3389 crate::common::RW,
3390 >::from_register(self, 0)
3391 }
3392
3393 #[doc = "SDA Output Delay"]
3394 #[inline(always)]
3395 pub fn sdod(
3396 self,
3397 ) -> crate::common::RegisterField<
3398 8,
3399 0x7,
3400 1,
3401 0,
3402 outctl::Sdod,
3403 outctl::Sdod,
3404 Outctl_SPEC,
3405 crate::common::RW,
3406 > {
3407 crate::common::RegisterField::<
3408 8,
3409 0x7,
3410 1,
3411 0,
3412 outctl::Sdod,
3413 outctl::Sdod,
3414 Outctl_SPEC,
3415 crate::common::RW,
3416 >::from_register(self, 0)
3417 }
3418
3419 #[doc = "SDA Output Delay Clock Source Selection"]
3420 #[inline(always)]
3421 pub fn sdodcs(
3422 self,
3423 ) -> crate::common::RegisterField<
3424 15,
3425 0x1,
3426 1,
3427 0,
3428 outctl::Sdodcs,
3429 outctl::Sdodcs,
3430 Outctl_SPEC,
3431 crate::common::RW,
3432 > {
3433 crate::common::RegisterField::<
3434 15,
3435 0x1,
3436 1,
3437 0,
3438 outctl::Sdodcs,
3439 outctl::Sdodcs,
3440 Outctl_SPEC,
3441 crate::common::RW,
3442 >::from_register(self, 0)
3443 }
3444}
3445impl ::core::default::Default for Outctl {
3446 #[inline(always)]
3447 fn default() -> Outctl {
3448 <crate::RegValueT<Outctl_SPEC> as RegisterValue<_>>::new(3)
3449 }
3450}
3451pub mod outctl {
3452
3453 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3454 pub struct Sdoc_SPEC;
3455 pub type Sdoc = crate::EnumBitfieldStruct<u8, Sdoc_SPEC>;
3456 impl Sdoc {
3457 #[doc = "I3C drives the I3C_SDA pin low."]
3458 pub const _0: Self = Self::new(0);
3459
3460 #[doc = "I3C releases the I3C_SDA pin."]
3461 pub const _1: Self = Self::new(1);
3462 }
3463 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3464 pub struct Scoc_SPEC;
3465 pub type Scoc = crate::EnumBitfieldStruct<u8, Scoc_SPEC>;
3466 impl Scoc {
3467 #[doc = "I3C drives the I3C_SCL pin low."]
3468 pub const _0: Self = Self::new(0);
3469
3470 #[doc = "I3C releases the I3C_SCL pin."]
3471 pub const _1: Self = Self::new(1);
3472 }
3473 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3474 pub struct Socwp_SPEC;
3475 pub type Socwp = crate::EnumBitfieldStruct<u8, Socwp_SPEC>;
3476 impl Socwp {
3477 #[doc = "Bits SCOC and SDOC are protected."]
3478 pub const _0: Self = Self::new(0);
3479
3480 #[doc = "Bits SCOC and SDOC can be written (When writing simultaneously with the value of the target bit). This bit is read as 0."]
3481 pub const _1: Self = Self::new(1);
3482 }
3483 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3484 pub struct Excyc_SPEC;
3485 pub type Excyc = crate::EnumBitfieldStruct<u8, Excyc_SPEC>;
3486 impl Excyc {
3487 #[doc = "Does not output an extra SCL clock cycle (default)."]
3488 pub const _0: Self = Self::new(0);
3489
3490 #[doc = "Outputs an extra SCL clock cycle."]
3491 pub const _1: Self = Self::new(1);
3492 }
3493 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3494 pub struct Sdod_SPEC;
3495 pub type Sdod = crate::EnumBitfieldStruct<u8, Sdod_SPEC>;
3496 impl Sdod {
3497 #[doc = "No output delay"]
3498 pub const _000: Self = Self::new(0);
3499
3500 #[doc = "1 I3Cφ cycle (When OUTCTL.SDODCS = 0 (I3Cφ)) 1 or 2 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3501 pub const _001: Self = Self::new(1);
3502
3503 #[doc = "2 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 3 or 4 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3504 pub const _010: Self = Self::new(2);
3505
3506 #[doc = "3 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 5 or 6 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3507 pub const _011: Self = Self::new(3);
3508
3509 #[doc = "4 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 7 or 8 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3510 pub const _100: Self = Self::new(4);
3511
3512 #[doc = "5 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 9 or 10 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3513 pub const _101: Self = Self::new(5);
3514
3515 #[doc = "6 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 11 or 12 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3516 pub const _110: Self = Self::new(6);
3517
3518 #[doc = "7 I3Cφ cycles (When OUTCTL.SDODCS = 0 (I3Cφ)) 13 or 14 I3Cφ cycles (When OUTCTL.SDODCS = 1 (I3Cφ/2))"]
3519 pub const _111: Self = Self::new(7);
3520 }
3521 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3522 pub struct Sdodcs_SPEC;
3523 pub type Sdodcs = crate::EnumBitfieldStruct<u8, Sdodcs_SPEC>;
3524 impl Sdodcs {
3525 #[doc = "The internal reference clock (I3Cφ) is selected as the clock source of the SDA output delay counter."]
3526 pub const _0: Self = Self::new(0);
3527
3528 #[doc = "The internal reference clock divided by 2 (I3Cφ/2) is selected as the clock source of the SDA output delay counter."]
3529 pub const _1: Self = Self::new(1);
3530 }
3531}
3532#[doc(hidden)]
3533#[derive(Copy, Clone, Eq, PartialEq)]
3534pub struct Inctl_SPEC;
3535impl crate::sealed::RegSpec for Inctl_SPEC {
3536 type DataType = u32;
3537}
3538
3539#[doc = "Input Control Register"]
3540pub type Inctl = crate::RegValueT<Inctl_SPEC>;
3541
3542impl Inctl {
3543 #[doc = "Digital Noise Filter Stage Selection"]
3544 #[inline(always)]
3545 pub fn dnfs(
3546 self,
3547 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Inctl_SPEC, crate::common::RW> {
3548 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Inctl_SPEC,crate::common::RW>::from_register(self,0)
3549 }
3550
3551 #[doc = "Digital Noise Filter Circuit Enable"]
3552 #[inline(always)]
3553 pub fn dnfe(
3554 self,
3555 ) -> crate::common::RegisterField<
3556 4,
3557 0x1,
3558 1,
3559 0,
3560 inctl::Dnfe,
3561 inctl::Dnfe,
3562 Inctl_SPEC,
3563 crate::common::RW,
3564 > {
3565 crate::common::RegisterField::<
3566 4,
3567 0x1,
3568 1,
3569 0,
3570 inctl::Dnfe,
3571 inctl::Dnfe,
3572 Inctl_SPEC,
3573 crate::common::RW,
3574 >::from_register(self, 0)
3575 }
3576}
3577impl ::core::default::Default for Inctl {
3578 #[inline(always)]
3579 fn default() -> Inctl {
3580 <crate::RegValueT<Inctl_SPEC> as RegisterValue<_>>::new(208)
3581 }
3582}
3583pub mod inctl {
3584
3585 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3586 pub struct Dnfe_SPEC;
3587 pub type Dnfe = crate::EnumBitfieldStruct<u8, Dnfe_SPEC>;
3588 impl Dnfe {
3589 #[doc = "No digital noise filter circuit is used."]
3590 pub const _0: Self = Self::new(0);
3591
3592 #[doc = "A digital noise filter circuit is used."]
3593 pub const _1: Self = Self::new(1);
3594 }
3595}
3596#[doc(hidden)]
3597#[derive(Copy, Clone, Eq, PartialEq)]
3598pub struct Tmoctl_SPEC;
3599impl crate::sealed::RegSpec for Tmoctl_SPEC {
3600 type DataType = u32;
3601}
3602
3603#[doc = "Timeout Control Register"]
3604pub type Tmoctl = crate::RegValueT<Tmoctl_SPEC>;
3605
3606impl Tmoctl {
3607 #[doc = "Timeout Detection Time Selection"]
3608 #[inline(always)]
3609 pub fn todts(
3610 self,
3611 ) -> crate::common::RegisterField<
3612 0,
3613 0x3,
3614 1,
3615 0,
3616 tmoctl::Todts,
3617 tmoctl::Todts,
3618 Tmoctl_SPEC,
3619 crate::common::RW,
3620 > {
3621 crate::common::RegisterField::<
3622 0,
3623 0x3,
3624 1,
3625 0,
3626 tmoctl::Todts,
3627 tmoctl::Todts,
3628 Tmoctl_SPEC,
3629 crate::common::RW,
3630 >::from_register(self, 0)
3631 }
3632
3633 #[doc = "Timeout L Count Control"]
3634 #[inline(always)]
3635 pub fn tolctl(
3636 self,
3637 ) -> crate::common::RegisterField<
3638 4,
3639 0x1,
3640 1,
3641 0,
3642 tmoctl::Tolctl,
3643 tmoctl::Tolctl,
3644 Tmoctl_SPEC,
3645 crate::common::RW,
3646 > {
3647 crate::common::RegisterField::<
3648 4,
3649 0x1,
3650 1,
3651 0,
3652 tmoctl::Tolctl,
3653 tmoctl::Tolctl,
3654 Tmoctl_SPEC,
3655 crate::common::RW,
3656 >::from_register(self, 0)
3657 }
3658
3659 #[doc = "Timeout H Count Control"]
3660 #[inline(always)]
3661 pub fn tohctl(
3662 self,
3663 ) -> crate::common::RegisterField<
3664 5,
3665 0x1,
3666 1,
3667 0,
3668 tmoctl::Tohctl,
3669 tmoctl::Tohctl,
3670 Tmoctl_SPEC,
3671 crate::common::RW,
3672 > {
3673 crate::common::RegisterField::<
3674 5,
3675 0x1,
3676 1,
3677 0,
3678 tmoctl::Tohctl,
3679 tmoctl::Tohctl,
3680 Tmoctl_SPEC,
3681 crate::common::RW,
3682 >::from_register(self, 0)
3683 }
3684
3685 #[doc = "Timeout Operation Mode Selection"]
3686 #[inline(always)]
3687 pub fn tomds(
3688 self,
3689 ) -> crate::common::RegisterField<
3690 6,
3691 0x3,
3692 1,
3693 0,
3694 tmoctl::Tomds,
3695 tmoctl::Tomds,
3696 Tmoctl_SPEC,
3697 crate::common::RW,
3698 > {
3699 crate::common::RegisterField::<
3700 6,
3701 0x3,
3702 1,
3703 0,
3704 tmoctl::Tomds,
3705 tmoctl::Tomds,
3706 Tmoctl_SPEC,
3707 crate::common::RW,
3708 >::from_register(self, 0)
3709 }
3710}
3711impl ::core::default::Default for Tmoctl {
3712 #[inline(always)]
3713 fn default() -> Tmoctl {
3714 <crate::RegValueT<Tmoctl_SPEC> as RegisterValue<_>>::new(48)
3715 }
3716}
3717pub mod tmoctl {
3718
3719 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3720 pub struct Todts_SPEC;
3721 pub type Todts = crate::EnumBitfieldStruct<u8, Todts_SPEC>;
3722 impl Todts {
3723 #[doc = "16bit-timeout"]
3724 pub const _00: Self = Self::new(0);
3725
3726 #[doc = "14bit-timeout"]
3727 pub const _01: Self = Self::new(1);
3728
3729 #[doc = "8bit-timeout"]
3730 pub const _10: Self = Self::new(2);
3731
3732 #[doc = "6bit-timeout"]
3733 pub const _11: Self = Self::new(3);
3734 }
3735 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3736 pub struct Tolctl_SPEC;
3737 pub type Tolctl = crate::EnumBitfieldStruct<u8, Tolctl_SPEC>;
3738 impl Tolctl {
3739 #[doc = "Count is disabled while the I3C_SCL line is at a low level."]
3740 pub const _0: Self = Self::new(0);
3741
3742 #[doc = "Count is enabled while the I3C_SCL line is at a low level."]
3743 pub const _1: Self = Self::new(1);
3744 }
3745 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3746 pub struct Tohctl_SPEC;
3747 pub type Tohctl = crate::EnumBitfieldStruct<u8, Tohctl_SPEC>;
3748 impl Tohctl {
3749 #[doc = "Count is disabled while the I3C_SCL line is at a high level."]
3750 pub const _0: Self = Self::new(0);
3751
3752 #[doc = "Count is enabled while the I3C_SCL line is at a high level."]
3753 pub const _1: Self = Self::new(1);
3754 }
3755 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3756 pub struct Tomds_SPEC;
3757 pub type Tomds = crate::EnumBitfieldStruct<u8, Tomds_SPEC>;
3758 impl Tomds {
3759 #[doc = "Timeout is detected during the following conditions: The bus is busy (BCST.BFREF = 0) in master mode.I3C’s own slave address is detected and the bus is busy in slave mode.The bus is free (BCST.BFREF = 1) while generation of a START condition is requested (CNDCTL.STCND = 1)."]
3760 pub const _00: Self = Self::new(0);
3761
3762 #[doc = "Timeout is detected while the bus is busy."]
3763 pub const _01: Self = Self::new(1);
3764
3765 #[doc = "Timeout is detected while the bus is free."]
3766 pub const _10: Self = Self::new(2);
3767
3768 #[doc = "Setting prohibited"]
3769 pub const _11: Self = Self::new(3);
3770 }
3771}
3772#[doc(hidden)]
3773#[derive(Copy, Clone, Eq, PartialEq)]
3774pub struct Wuctl_SPEC;
3775impl crate::sealed::RegSpec for Wuctl_SPEC {
3776 type DataType = u32;
3777}
3778
3779#[doc = "Wake Up Unit Control Register"]
3780pub type Wuctl = crate::RegValueT<Wuctl_SPEC>;
3781
3782impl Wuctl {
3783 #[doc = "Wake-Up Acknowledge Selection"]
3784 #[inline(always)]
3785 pub fn wuacks(
3786 self,
3787 ) -> crate::common::RegisterFieldBool<0, 1, 0, Wuctl_SPEC, crate::common::RW> {
3788 crate::common::RegisterFieldBool::<0, 1, 0, Wuctl_SPEC, crate::common::RW>::from_register(
3789 self, 0,
3790 )
3791 }
3792
3793 #[doc = "Wake-Up Analog Noise Filter Selection"]
3794 #[inline(always)]
3795 pub fn wuanfs(
3796 self,
3797 ) -> crate::common::RegisterField<
3798 4,
3799 0x1,
3800 1,
3801 0,
3802 wuctl::Wuanfs,
3803 wuctl::Wuanfs,
3804 Wuctl_SPEC,
3805 crate::common::RW,
3806 > {
3807 crate::common::RegisterField::<
3808 4,
3809 0x1,
3810 1,
3811 0,
3812 wuctl::Wuanfs,
3813 wuctl::Wuanfs,
3814 Wuctl_SPEC,
3815 crate::common::RW,
3816 >::from_register(self, 0)
3817 }
3818
3819 #[doc = "Wake-Up function PCLK Synchronous Enable"]
3820 #[inline(always)]
3821 pub fn wufsyne(
3822 self,
3823 ) -> crate::common::RegisterField<
3824 6,
3825 0x1,
3826 1,
3827 0,
3828 wuctl::Wufsyne,
3829 wuctl::Wufsyne,
3830 Wuctl_SPEC,
3831 crate::common::RW,
3832 > {
3833 crate::common::RegisterField::<
3834 6,
3835 0x1,
3836 1,
3837 0,
3838 wuctl::Wufsyne,
3839 wuctl::Wufsyne,
3840 Wuctl_SPEC,
3841 crate::common::RW,
3842 >::from_register(self, 0)
3843 }
3844
3845 #[doc = "Wake-Up function Enable"]
3846 #[inline(always)]
3847 pub fn wufe(
3848 self,
3849 ) -> crate::common::RegisterField<
3850 7,
3851 0x1,
3852 1,
3853 0,
3854 wuctl::Wufe,
3855 wuctl::Wufe,
3856 Wuctl_SPEC,
3857 crate::common::RW,
3858 > {
3859 crate::common::RegisterField::<
3860 7,
3861 0x1,
3862 1,
3863 0,
3864 wuctl::Wufe,
3865 wuctl::Wufe,
3866 Wuctl_SPEC,
3867 crate::common::RW,
3868 >::from_register(self, 0)
3869 }
3870}
3871impl ::core::default::Default for Wuctl {
3872 #[inline(always)]
3873 fn default() -> Wuctl {
3874 <crate::RegValueT<Wuctl_SPEC> as RegisterValue<_>>::new(65)
3875 }
3876}
3877pub mod wuctl {
3878
3879 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3880 pub struct Wuanfs_SPEC;
3881 pub type Wuanfs = crate::EnumBitfieldStruct<u8, Wuanfs_SPEC>;
3882 impl Wuanfs {
3883 #[doc = "Do not add the Wake Up analog filter."]
3884 pub const _0: Self = Self::new(0);
3885
3886 #[doc = "Add the Wake Up analog filter."]
3887 pub const _1: Self = Self::new(1);
3888 }
3889 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3890 pub struct Wufsyne_SPEC;
3891 pub type Wufsyne = crate::EnumBitfieldStruct<u8, Wufsyne_SPEC>;
3892 impl Wufsyne {
3893 #[doc = "I3C asynchronous circuit enable"]
3894 pub const _0: Self = Self::new(0);
3895
3896 #[doc = "I3C synchronous circuit enable"]
3897 pub const _1: Self = Self::new(1);
3898 }
3899 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3900 pub struct Wufe_SPEC;
3901 pub type Wufe = crate::EnumBitfieldStruct<u8, Wufe_SPEC>;
3902 impl Wufe {
3903 #[doc = "Wake-up function disables"]
3904 pub const _0: Self = Self::new(0);
3905
3906 #[doc = "Wake-up function enables"]
3907 pub const _1: Self = Self::new(1);
3908 }
3909}
3910#[doc(hidden)]
3911#[derive(Copy, Clone, Eq, PartialEq)]
3912pub struct Ackctl_SPEC;
3913impl crate::sealed::RegSpec for Ackctl_SPEC {
3914 type DataType = u32;
3915}
3916
3917#[doc = "Acknowledge Control Register"]
3918pub type Ackctl = crate::RegValueT<Ackctl_SPEC>;
3919
3920impl Ackctl {
3921 #[doc = "Acknowledge Reception"]
3922 #[inline(always)]
3923 pub fn ackr(
3924 self,
3925 ) -> crate::common::RegisterField<
3926 0,
3927 0x1,
3928 1,
3929 0,
3930 ackctl::Ackr,
3931 ackctl::Ackr,
3932 Ackctl_SPEC,
3933 crate::common::R,
3934 > {
3935 crate::common::RegisterField::<
3936 0,
3937 0x1,
3938 1,
3939 0,
3940 ackctl::Ackr,
3941 ackctl::Ackr,
3942 Ackctl_SPEC,
3943 crate::common::R,
3944 >::from_register(self, 0)
3945 }
3946
3947 #[doc = "Acknowledge Transmission"]
3948 #[inline(always)]
3949 pub fn ackt(
3950 self,
3951 ) -> crate::common::RegisterField<
3952 1,
3953 0x1,
3954 1,
3955 0,
3956 ackctl::Ackt,
3957 ackctl::Ackt,
3958 Ackctl_SPEC,
3959 crate::common::RW,
3960 > {
3961 crate::common::RegisterField::<
3962 1,
3963 0x1,
3964 1,
3965 0,
3966 ackctl::Ackt,
3967 ackctl::Ackt,
3968 Ackctl_SPEC,
3969 crate::common::RW,
3970 >::from_register(self, 0)
3971 }
3972
3973 #[doc = "ACKT Write Protect"]
3974 #[inline(always)]
3975 pub fn acktwp(
3976 self,
3977 ) -> crate::common::RegisterField<
3978 2,
3979 0x1,
3980 1,
3981 0,
3982 ackctl::Acktwp,
3983 ackctl::Acktwp,
3984 Ackctl_SPEC,
3985 crate::common::W,
3986 > {
3987 crate::common::RegisterField::<
3988 2,
3989 0x1,
3990 1,
3991 0,
3992 ackctl::Acktwp,
3993 ackctl::Acktwp,
3994 Ackctl_SPEC,
3995 crate::common::W,
3996 >::from_register(self, 0)
3997 }
3998}
3999impl ::core::default::Default for Ackctl {
4000 #[inline(always)]
4001 fn default() -> Ackctl {
4002 <crate::RegValueT<Ackctl_SPEC> as RegisterValue<_>>::new(0)
4003 }
4004}
4005pub mod ackctl {
4006
4007 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4008 pub struct Ackr_SPEC;
4009 pub type Ackr = crate::EnumBitfieldStruct<u8, Ackr_SPEC>;
4010 impl Ackr {
4011 #[doc = "A 0 is received as the acknowledge bit (ACK reception)."]
4012 pub const _0: Self = Self::new(0);
4013
4014 #[doc = "A 1 is received as the acknowledge bit (NACK reception)."]
4015 pub const _1: Self = Self::new(1);
4016 }
4017 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4018 pub struct Ackt_SPEC;
4019 pub type Ackt = crate::EnumBitfieldStruct<u8, Ackt_SPEC>;
4020 impl Ackt {
4021 #[doc = "A 0 is sent as the acknowledge bit (ACK transmission)."]
4022 pub const _0: Self = Self::new(0);
4023
4024 #[doc = "A 1 is sent as the acknowledge bit (NACK transmission)."]
4025 pub const _1: Self = Self::new(1);
4026 }
4027 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4028 pub struct Acktwp_SPEC;
4029 pub type Acktwp = crate::EnumBitfieldStruct<u8, Acktwp_SPEC>;
4030 impl Acktwp {
4031 #[doc = "The ACKT bit are protected."]
4032 pub const _0: Self = Self::new(0);
4033
4034 #[doc = "The ACKT bit can be written (when writing simultaneously with the value of the target bit). This bit is read as 0."]
4035 pub const _1: Self = Self::new(1);
4036 }
4037}
4038#[doc(hidden)]
4039#[derive(Copy, Clone, Eq, PartialEq)]
4040pub struct Scstrctl_SPEC;
4041impl crate::sealed::RegSpec for Scstrctl_SPEC {
4042 type DataType = u32;
4043}
4044
4045#[doc = "SCL Stretch Control Register"]
4046pub type Scstrctl = crate::RegValueT<Scstrctl_SPEC>;
4047
4048impl Scstrctl {
4049 #[doc = "Acknowledge Transmission Wait Enable"]
4050 #[inline(always)]
4051 pub fn acktwe(
4052 self,
4053 ) -> crate::common::RegisterField<
4054 0,
4055 0x1,
4056 1,
4057 0,
4058 scstrctl::Acktwe,
4059 scstrctl::Acktwe,
4060 Scstrctl_SPEC,
4061 crate::common::RW,
4062 > {
4063 crate::common::RegisterField::<
4064 0,
4065 0x1,
4066 1,
4067 0,
4068 scstrctl::Acktwe,
4069 scstrctl::Acktwe,
4070 Scstrctl_SPEC,
4071 crate::common::RW,
4072 >::from_register(self, 0)
4073 }
4074
4075 #[doc = "Receive Wait Enable"]
4076 #[inline(always)]
4077 pub fn rwe(
4078 self,
4079 ) -> crate::common::RegisterField<
4080 1,
4081 0x1,
4082 1,
4083 0,
4084 scstrctl::Rwe,
4085 scstrctl::Rwe,
4086 Scstrctl_SPEC,
4087 crate::common::RW,
4088 > {
4089 crate::common::RegisterField::<
4090 1,
4091 0x1,
4092 1,
4093 0,
4094 scstrctl::Rwe,
4095 scstrctl::Rwe,
4096 Scstrctl_SPEC,
4097 crate::common::RW,
4098 >::from_register(self, 0)
4099 }
4100}
4101impl ::core::default::Default for Scstrctl {
4102 #[inline(always)]
4103 fn default() -> Scstrctl {
4104 <crate::RegValueT<Scstrctl_SPEC> as RegisterValue<_>>::new(0)
4105 }
4106}
4107pub mod scstrctl {
4108
4109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4110 pub struct Acktwe_SPEC;
4111 pub type Acktwe = crate::EnumBitfieldStruct<u8, Acktwe_SPEC>;
4112 impl Acktwe {
4113 #[doc = "NTST.RDBFF0 is set at the rising edge of the ninth SCL clock cycle. (The I3C_SCL line is not held low at the falling edge of the eighth clock cycle.)"]
4114 pub const _0: Self = Self::new(0);
4115
4116 #[doc = "NTST.RDBFF0 is set at the rising edge of the eighth SCL clock cycle. (The I3C_SCL line is held low at the falling edge of the eighth clock cycle.) Low-hold is released by writing a value to the ACKCTL.ACKT bit."]
4117 pub const _1: Self = Self::new(1);
4118 }
4119 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4120 pub struct Rwe_SPEC;
4121 pub type Rwe = crate::EnumBitfieldStruct<u8, Rwe_SPEC>;
4122 impl Rwe {
4123 #[doc = "No WAIT (The period between ninth clock cycle and first clock cycle is not held low.)"]
4124 pub const _0: Self = Self::new(0);
4125
4126 #[doc = "WAIT (The period between ninth clock cycle and first clock cycle is held low.) Low-hold is released by reading NTDTBP0."]
4127 pub const _1: Self = Self::new(1);
4128 }
4129}
4130#[doc(hidden)]
4131#[derive(Copy, Clone, Eq, PartialEq)]
4132pub struct Scstlctl_SPEC;
4133impl crate::sealed::RegSpec for Scstlctl_SPEC {
4134 type DataType = u32;
4135}
4136
4137#[doc = "SCL Stalling Control Register"]
4138pub type Scstlctl = crate::RegValueT<Scstlctl_SPEC>;
4139
4140impl Scstlctl {
4141 #[doc = "Stalling Cycle"]
4142 #[inline(always)]
4143 pub fn stlcyc(
4144 self,
4145 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Scstlctl_SPEC, crate::common::RW>
4146 {
4147 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Scstlctl_SPEC,crate::common::RW>::from_register(self,0)
4148 }
4149
4150 #[doc = "Assigned Address Phase Enable"]
4151 #[inline(always)]
4152 pub fn aape(
4153 self,
4154 ) -> crate::common::RegisterField<
4155 28,
4156 0x1,
4157 1,
4158 0,
4159 scstlctl::Aape,
4160 scstlctl::Aape,
4161 Scstlctl_SPEC,
4162 crate::common::RW,
4163 > {
4164 crate::common::RegisterField::<
4165 28,
4166 0x1,
4167 1,
4168 0,
4169 scstlctl::Aape,
4170 scstlctl::Aape,
4171 Scstlctl_SPEC,
4172 crate::common::RW,
4173 >::from_register(self, 0)
4174 }
4175
4176 #[doc = "Parity Phase Enable"]
4177 #[inline(always)]
4178 pub fn parpe(
4179 self,
4180 ) -> crate::common::RegisterField<
4181 30,
4182 0x1,
4183 1,
4184 0,
4185 scstlctl::Parpe,
4186 scstlctl::Parpe,
4187 Scstlctl_SPEC,
4188 crate::common::RW,
4189 > {
4190 crate::common::RegisterField::<
4191 30,
4192 0x1,
4193 1,
4194 0,
4195 scstlctl::Parpe,
4196 scstlctl::Parpe,
4197 Scstlctl_SPEC,
4198 crate::common::RW,
4199 >::from_register(self, 0)
4200 }
4201
4202 #[doc = "ACK phase Enable"]
4203 #[inline(always)]
4204 pub fn ackpe(
4205 self,
4206 ) -> crate::common::RegisterField<
4207 31,
4208 0x1,
4209 1,
4210 0,
4211 scstlctl::Ackpe,
4212 scstlctl::Ackpe,
4213 Scstlctl_SPEC,
4214 crate::common::RW,
4215 > {
4216 crate::common::RegisterField::<
4217 31,
4218 0x1,
4219 1,
4220 0,
4221 scstlctl::Ackpe,
4222 scstlctl::Ackpe,
4223 Scstlctl_SPEC,
4224 crate::common::RW,
4225 >::from_register(self, 0)
4226 }
4227}
4228impl ::core::default::Default for Scstlctl {
4229 #[inline(always)]
4230 fn default() -> Scstlctl {
4231 <crate::RegValueT<Scstlctl_SPEC> as RegisterValue<_>>::new(0)
4232 }
4233}
4234pub mod scstlctl {
4235
4236 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4237 pub struct Aape_SPEC;
4238 pub type Aape = crate::EnumBitfieldStruct<u8, Aape_SPEC>;
4239 impl Aape {
4240 #[doc = "Does not stall the SCL clock during the address assignment phase."]
4241 pub const _0: Self = Self::new(0);
4242
4243 #[doc = "Stall the SCL clock during address assignment phase."]
4244 pub const _1: Self = Self::new(1);
4245 }
4246 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4247 pub struct Parpe_SPEC;
4248 pub type Parpe = crate::EnumBitfieldStruct<u8, Parpe_SPEC>;
4249 impl Parpe {
4250 #[doc = "Does not stall the SCL clock during the parity bit period."]
4251 pub const _0: Self = Self::new(0);
4252
4253 #[doc = "Stall the SCL clock during the parity bit period."]
4254 pub const _1: Self = Self::new(1);
4255 }
4256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4257 pub struct Ackpe_SPEC;
4258 pub type Ackpe = crate::EnumBitfieldStruct<u8, Ackpe_SPEC>;
4259 impl Ackpe {
4260 #[doc = "Does not stall the SCL clock during the ACK/NACK phase."]
4261 pub const _0: Self = Self::new(0);
4262
4263 #[doc = "Stall the SCL clock during the ACK/NACK phase."]
4264 pub const _1: Self = Self::new(1);
4265 }
4266}
4267#[doc(hidden)]
4268#[derive(Copy, Clone, Eq, PartialEq)]
4269pub struct Svtdlg0_SPEC;
4270impl crate::sealed::RegSpec for Svtdlg0_SPEC {
4271 type DataType = u32;
4272}
4273
4274#[doc = "Slave Transfer Data Length Register 0"]
4275pub type Svtdlg0 = crate::RegValueT<Svtdlg0_SPEC>;
4276
4277impl Svtdlg0 {
4278 #[doc = "Slave Transfer Data Length"]
4279 #[inline(always)]
4280 pub fn stdlg(
4281 self,
4282 ) -> crate::common::RegisterField<16, 0xffff, 1, 0, u16, u16, Svtdlg0_SPEC, crate::common::RW>
4283 {
4284 crate::common::RegisterField::<16,0xffff,1,0,u16,u16,Svtdlg0_SPEC,crate::common::RW>::from_register(self,0)
4285 }
4286}
4287impl ::core::default::Default for Svtdlg0 {
4288 #[inline(always)]
4289 fn default() -> Svtdlg0 {
4290 <crate::RegValueT<Svtdlg0_SPEC> as RegisterValue<_>>::new(0)
4291 }
4292}
4293
4294#[doc(hidden)]
4295#[derive(Copy, Clone, Eq, PartialEq)]
4296pub struct Stctl_SPEC;
4297impl crate::sealed::RegSpec for Stctl_SPEC {
4298 type DataType = u32;
4299}
4300
4301#[doc = "Synchronous Timing Control Register"]
4302pub type Stctl = crate::RegValueT<Stctl_SPEC>;
4303
4304impl Stctl {
4305 #[doc = "Synchronous Timing output Enable"]
4306 #[inline(always)]
4307 pub fn stoe(
4308 self,
4309 ) -> crate::common::RegisterField<
4310 0,
4311 0x1,
4312 1,
4313 0,
4314 stctl::Stoe,
4315 stctl::Stoe,
4316 Stctl_SPEC,
4317 crate::common::RW,
4318 > {
4319 crate::common::RegisterField::<
4320 0,
4321 0x1,
4322 1,
4323 0,
4324 stctl::Stoe,
4325 stctl::Stoe,
4326 Stctl_SPEC,
4327 crate::common::RW,
4328 >::from_register(self, 0)
4329 }
4330}
4331impl ::core::default::Default for Stctl {
4332 #[inline(always)]
4333 fn default() -> Stctl {
4334 <crate::RegValueT<Stctl_SPEC> as RegisterValue<_>>::new(0)
4335 }
4336}
4337pub mod stctl {
4338
4339 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4340 pub struct Stoe_SPEC;
4341 pub type Stoe = crate::EnumBitfieldStruct<u8, Stoe_SPEC>;
4342 impl Stoe {
4343 #[doc = "Disable"]
4344 pub const _0: Self = Self::new(0);
4345
4346 #[doc = "Enable"]
4347 pub const _1: Self = Self::new(1);
4348 }
4349}
4350#[doc(hidden)]
4351#[derive(Copy, Clone, Eq, PartialEq)]
4352pub struct Atctl_SPEC;
4353impl crate::sealed::RegSpec for Atctl_SPEC {
4354 type DataType = u32;
4355}
4356
4357#[doc = "Asynchronous Timing Control Register"]
4358pub type Atctl = crate::RegValueT<Atctl_SPEC>;
4359
4360impl Atctl {
4361 #[doc = "Asynchronous Timing Trigger Select"]
4362 #[inline(always)]
4363 pub fn attrgs(
4364 self,
4365 ) -> crate::common::RegisterField<
4366 0,
4367 0x1,
4368 1,
4369 0,
4370 atctl::Attrgs,
4371 atctl::Attrgs,
4372 Atctl_SPEC,
4373 crate::common::RW,
4374 > {
4375 crate::common::RegisterField::<
4376 0,
4377 0x1,
4378 1,
4379 0,
4380 atctl::Attrgs,
4381 atctl::Attrgs,
4382 Atctl_SPEC,
4383 crate::common::RW,
4384 >::from_register(self, 0)
4385 }
4386
4387 #[doc = "MREF Output Enable (Capture Event / Counter Overflow)"]
4388 #[inline(always)]
4389 pub fn mrefoe(
4390 self,
4391 ) -> crate::common::RegisterField<
4392 1,
4393 0x1,
4394 1,
4395 0,
4396 atctl::Mrefoe,
4397 atctl::Mrefoe,
4398 Atctl_SPEC,
4399 crate::common::RW,
4400 > {
4401 crate::common::RegisterField::<
4402 1,
4403 0x1,
4404 1,
4405 0,
4406 atctl::Mrefoe,
4407 atctl::Mrefoe,
4408 Atctl_SPEC,
4409 crate::common::RW,
4410 >::from_register(self, 0)
4411 }
4412
4413 #[doc = "Additional Master-initiated bus Event Output Enable"]
4414 #[inline(always)]
4415 pub fn ameoe(
4416 self,
4417 ) -> crate::common::RegisterField<
4418 2,
4419 0x1,
4420 1,
4421 0,
4422 atctl::Ameoe,
4423 atctl::Ameoe,
4424 Atctl_SPEC,
4425 crate::common::RW,
4426 > {
4427 crate::common::RegisterField::<
4428 2,
4429 0x1,
4430 1,
4431 0,
4432 atctl::Ameoe,
4433 atctl::Ameoe,
4434 Atctl_SPEC,
4435 crate::common::RW,
4436 >::from_register(self, 0)
4437 }
4438
4439 #[doc = "TCLK Counter Divide Setting"]
4440 #[inline(always)]
4441 pub fn cdiv(
4442 self,
4443 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Atctl_SPEC, crate::common::RW> {
4444 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Atctl_SPEC,crate::common::RW>::from_register(self,0)
4445 }
4446}
4447impl ::core::default::Default for Atctl {
4448 #[inline(always)]
4449 fn default() -> Atctl {
4450 <crate::RegValueT<Atctl_SPEC> as RegisterValue<_>>::new(0)
4451 }
4452}
4453pub mod atctl {
4454
4455 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4456 pub struct Attrgs_SPEC;
4457 pub type Attrgs = crate::EnumBitfieldStruct<u8, Attrgs_SPEC>;
4458 impl Attrgs {
4459 #[doc = "Software trigger"]
4460 pub const _0: Self = Self::new(0);
4461
4462 #[doc = "Hardware trigger"]
4463 pub const _1: Self = Self::new(1);
4464 }
4465 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4466 pub struct Mrefoe_SPEC;
4467 pub type Mrefoe = crate::EnumBitfieldStruct<u8, Mrefoe_SPEC>;
4468 impl Mrefoe {
4469 #[doc = "Disable"]
4470 pub const _0: Self = Self::new(0);
4471
4472 #[doc = "Enable"]
4473 pub const _1: Self = Self::new(1);
4474 }
4475 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4476 pub struct Ameoe_SPEC;
4477 pub type Ameoe = crate::EnumBitfieldStruct<u8, Ameoe_SPEC>;
4478 impl Ameoe {
4479 #[doc = "Disable"]
4480 pub const _0: Self = Self::new(0);
4481
4482 #[doc = "Enable"]
4483 pub const _1: Self = Self::new(1);
4484 }
4485}
4486#[doc(hidden)]
4487#[derive(Copy, Clone, Eq, PartialEq)]
4488pub struct Attrg_SPEC;
4489impl crate::sealed::RegSpec for Attrg_SPEC {
4490 type DataType = u32;
4491}
4492
4493#[doc = "Asynchronous Timing Trigger Register"]
4494pub type Attrg = crate::RegValueT<Attrg_SPEC>;
4495
4496impl Attrg {
4497 #[doc = "Asynchronous Timing Software Trigger"]
4498 #[inline(always)]
4499 pub fn atstrg(
4500 self,
4501 ) -> crate::common::RegisterField<
4502 0,
4503 0x1,
4504 1,
4505 0,
4506 attrg::Atstrg,
4507 attrg::Atstrg,
4508 Attrg_SPEC,
4509 crate::common::W,
4510 > {
4511 crate::common::RegisterField::<
4512 0,
4513 0x1,
4514 1,
4515 0,
4516 attrg::Atstrg,
4517 attrg::Atstrg,
4518 Attrg_SPEC,
4519 crate::common::W,
4520 >::from_register(self, 0)
4521 }
4522}
4523impl ::core::default::Default for Attrg {
4524 #[inline(always)]
4525 fn default() -> Attrg {
4526 <crate::RegValueT<Attrg_SPEC> as RegisterValue<_>>::new(0)
4527 }
4528}
4529pub mod attrg {
4530
4531 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4532 pub struct Atstrg_SPEC;
4533 pub type Atstrg = crate::EnumBitfieldStruct<u8, Atstrg_SPEC>;
4534 impl Atstrg {
4535 #[doc = "Do nothing"]
4536 pub const _0: Self = Self::new(0);
4537
4538 #[doc = "Software trigger (one-shot pulse) output This bit is always read as 0."]
4539 pub const _1: Self = Self::new(1);
4540 }
4541}
4542#[doc(hidden)]
4543#[derive(Copy, Clone, Eq, PartialEq)]
4544pub struct Atccnte_SPEC;
4545impl crate::sealed::RegSpec for Atccnte_SPEC {
4546 type DataType = u32;
4547}
4548
4549#[doc = "Asynchronous Timing Contorol Counter enable Register"]
4550pub type Atccnte = crate::RegValueT<Atccnte_SPEC>;
4551
4552impl Atccnte {
4553 #[doc = "Asynchronous Timing Counter Enable for MREF, MC2, SC1, SC2."]
4554 #[inline(always)]
4555 pub fn atce(
4556 self,
4557 ) -> crate::common::RegisterField<
4558 0,
4559 0x1,
4560 1,
4561 0,
4562 atccnte::Atce,
4563 atccnte::Atce,
4564 Atccnte_SPEC,
4565 crate::common::RW,
4566 > {
4567 crate::common::RegisterField::<
4568 0,
4569 0x1,
4570 1,
4571 0,
4572 atccnte::Atce,
4573 atccnte::Atce,
4574 Atccnte_SPEC,
4575 crate::common::RW,
4576 >::from_register(self, 0)
4577 }
4578}
4579impl ::core::default::Default for Atccnte {
4580 #[inline(always)]
4581 fn default() -> Atccnte {
4582 <crate::RegValueT<Atccnte_SPEC> as RegisterValue<_>>::new(0)
4583 }
4584}
4585pub mod atccnte {
4586
4587 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4588 pub struct Atce_SPEC;
4589 pub type Atce = crate::EnumBitfieldStruct<u8, Atce_SPEC>;
4590 impl Atce {
4591 #[doc = "Disable"]
4592 pub const _0: Self = Self::new(0);
4593
4594 #[doc = "Enable"]
4595 pub const _1: Self = Self::new(1);
4596 }
4597}
4598#[doc(hidden)]
4599#[derive(Copy, Clone, Eq, PartialEq)]
4600pub struct Cndctl_SPEC;
4601impl crate::sealed::RegSpec for Cndctl_SPEC {
4602 type DataType = u32;
4603}
4604
4605#[doc = "Condition Control Register"]
4606pub type Cndctl = crate::RegValueT<Cndctl_SPEC>;
4607
4608impl Cndctl {
4609 #[doc = "START (S) Condition Issuance"]
4610 #[inline(always)]
4611 pub fn stcnd(
4612 self,
4613 ) -> crate::common::RegisterField<
4614 0,
4615 0x1,
4616 1,
4617 0,
4618 cndctl::Stcnd,
4619 cndctl::Stcnd,
4620 Cndctl_SPEC,
4621 crate::common::RW,
4622 > {
4623 crate::common::RegisterField::<
4624 0,
4625 0x1,
4626 1,
4627 0,
4628 cndctl::Stcnd,
4629 cndctl::Stcnd,
4630 Cndctl_SPEC,
4631 crate::common::RW,
4632 >::from_register(self, 0)
4633 }
4634
4635 #[doc = "Repeated START (Sr) Condition Issuance"]
4636 #[inline(always)]
4637 pub fn srcnd(
4638 self,
4639 ) -> crate::common::RegisterField<
4640 1,
4641 0x1,
4642 1,
4643 0,
4644 cndctl::Srcnd,
4645 cndctl::Srcnd,
4646 Cndctl_SPEC,
4647 crate::common::RW,
4648 > {
4649 crate::common::RegisterField::<
4650 1,
4651 0x1,
4652 1,
4653 0,
4654 cndctl::Srcnd,
4655 cndctl::Srcnd,
4656 Cndctl_SPEC,
4657 crate::common::RW,
4658 >::from_register(self, 0)
4659 }
4660
4661 #[doc = "STOP (P) Condition Issuance"]
4662 #[inline(always)]
4663 pub fn spcnd(
4664 self,
4665 ) -> crate::common::RegisterField<
4666 2,
4667 0x1,
4668 1,
4669 0,
4670 cndctl::Spcnd,
4671 cndctl::Spcnd,
4672 Cndctl_SPEC,
4673 crate::common::RW,
4674 > {
4675 crate::common::RegisterField::<
4676 2,
4677 0x1,
4678 1,
4679 0,
4680 cndctl::Spcnd,
4681 cndctl::Spcnd,
4682 Cndctl_SPEC,
4683 crate::common::RW,
4684 >::from_register(self, 0)
4685 }
4686}
4687impl ::core::default::Default for Cndctl {
4688 #[inline(always)]
4689 fn default() -> Cndctl {
4690 <crate::RegValueT<Cndctl_SPEC> as RegisterValue<_>>::new(0)
4691 }
4692}
4693pub mod cndctl {
4694
4695 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4696 pub struct Stcnd_SPEC;
4697 pub type Stcnd = crate::EnumBitfieldStruct<u8, Stcnd_SPEC>;
4698 impl Stcnd {
4699 #[doc = "Does not request to issue a START condition."]
4700 pub const _0: Self = Self::new(0);
4701
4702 #[doc = "Requests to issue a START condition."]
4703 pub const _1: Self = Self::new(1);
4704 }
4705 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4706 pub struct Srcnd_SPEC;
4707 pub type Srcnd = crate::EnumBitfieldStruct<u8, Srcnd_SPEC>;
4708 impl Srcnd {
4709 #[doc = "Does not request to issue a Repeated START condition."]
4710 pub const _0: Self = Self::new(0);
4711
4712 #[doc = "Requests to issue a Repeated START condition."]
4713 pub const _1: Self = Self::new(1);
4714 }
4715 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4716 pub struct Spcnd_SPEC;
4717 pub type Spcnd = crate::EnumBitfieldStruct<u8, Spcnd_SPEC>;
4718 impl Spcnd {
4719 #[doc = "Does not request to issue a STOP condition."]
4720 pub const _0: Self = Self::new(0);
4721
4722 #[doc = "Requests to issue a STOP condition."]
4723 pub const _1: Self = Self::new(1);
4724 }
4725}
4726#[doc(hidden)]
4727#[derive(Copy, Clone, Eq, PartialEq)]
4728pub struct Ncmdqp_SPEC;
4729impl crate::sealed::RegSpec for Ncmdqp_SPEC {
4730 type DataType = u32;
4731}
4732
4733#[doc = "Normal Command Queue Port Register"]
4734pub type Ncmdqp = crate::RegValueT<Ncmdqp_SPEC>;
4735
4736impl NoBitfieldReg<Ncmdqp_SPEC> for Ncmdqp {}
4737impl ::core::default::Default for Ncmdqp {
4738 #[inline(always)]
4739 fn default() -> Ncmdqp {
4740 <crate::RegValueT<Ncmdqp_SPEC> as RegisterValue<_>>::new(0)
4741 }
4742}
4743
4744#[doc(hidden)]
4745#[derive(Copy, Clone, Eq, PartialEq)]
4746pub struct Nrspqp_SPEC;
4747impl crate::sealed::RegSpec for Nrspqp_SPEC {
4748 type DataType = u32;
4749}
4750
4751#[doc = "Normal Response Queue Port Register"]
4752pub type Nrspqp = crate::RegValueT<Nrspqp_SPEC>;
4753
4754impl NoBitfieldReg<Nrspqp_SPEC> for Nrspqp {}
4755impl ::core::default::Default for Nrspqp {
4756 #[inline(always)]
4757 fn default() -> Nrspqp {
4758 <crate::RegValueT<Nrspqp_SPEC> as RegisterValue<_>>::new(0)
4759 }
4760}
4761
4762#[doc(hidden)]
4763#[derive(Copy, Clone, Eq, PartialEq)]
4764pub struct Ntdtbp0_SPEC;
4765impl crate::sealed::RegSpec for Ntdtbp0_SPEC {
4766 type DataType = u32;
4767}
4768
4769#[doc = "Normal Transfer Data Buffer Port Register 0"]
4770pub type Ntdtbp0 = crate::RegValueT<Ntdtbp0_SPEC>;
4771
4772impl NoBitfieldReg<Ntdtbp0_SPEC> for Ntdtbp0 {}
4773impl ::core::default::Default for Ntdtbp0 {
4774 #[inline(always)]
4775 fn default() -> Ntdtbp0 {
4776 <crate::RegValueT<Ntdtbp0_SPEC> as RegisterValue<_>>::new(0)
4777 }
4778}
4779
4780#[doc(hidden)]
4781#[derive(Copy, Clone, Eq, PartialEq)]
4782pub struct Ntdtbp0By_SPEC;
4783impl crate::sealed::RegSpec for Ntdtbp0By_SPEC {
4784 type DataType = u8;
4785}
4786
4787#[doc = "Normal Transfer Data Buffer Port Register 0"]
4788pub type Ntdtbp0By = crate::RegValueT<Ntdtbp0By_SPEC>;
4789
4790impl NoBitfieldReg<Ntdtbp0By_SPEC> for Ntdtbp0By {}
4791impl ::core::default::Default for Ntdtbp0By {
4792 #[inline(always)]
4793 fn default() -> Ntdtbp0By {
4794 <crate::RegValueT<Ntdtbp0By_SPEC> as RegisterValue<_>>::new(0)
4795 }
4796}
4797
4798#[doc(hidden)]
4799#[derive(Copy, Clone, Eq, PartialEq)]
4800pub struct Nibiqp_SPEC;
4801impl crate::sealed::RegSpec for Nibiqp_SPEC {
4802 type DataType = u32;
4803}
4804
4805#[doc = "Normal IBI Queue Port Register"]
4806pub type Nibiqp = crate::RegValueT<Nibiqp_SPEC>;
4807
4808impl NoBitfieldReg<Nibiqp_SPEC> for Nibiqp {}
4809impl ::core::default::Default for Nibiqp {
4810 #[inline(always)]
4811 fn default() -> Nibiqp {
4812 <crate::RegValueT<Nibiqp_SPEC> as RegisterValue<_>>::new(0)
4813 }
4814}
4815
4816#[doc(hidden)]
4817#[derive(Copy, Clone, Eq, PartialEq)]
4818pub struct Nrsqp_SPEC;
4819impl crate::sealed::RegSpec for Nrsqp_SPEC {
4820 type DataType = u32;
4821}
4822
4823#[doc = "Normal Receive Status Queue Port Register"]
4824pub type Nrsqp = crate::RegValueT<Nrsqp_SPEC>;
4825
4826impl NoBitfieldReg<Nrsqp_SPEC> for Nrsqp {}
4827impl ::core::default::Default for Nrsqp {
4828 #[inline(always)]
4829 fn default() -> Nrsqp {
4830 <crate::RegValueT<Nrsqp_SPEC> as RegisterValue<_>>::new(0)
4831 }
4832}
4833
4834#[doc(hidden)]
4835#[derive(Copy, Clone, Eq, PartialEq)]
4836pub struct Hcmdqp_SPEC;
4837impl crate::sealed::RegSpec for Hcmdqp_SPEC {
4838 type DataType = u32;
4839}
4840
4841#[doc = "High Priority Command Queue Port Register"]
4842pub type Hcmdqp = crate::RegValueT<Hcmdqp_SPEC>;
4843
4844impl NoBitfieldReg<Hcmdqp_SPEC> for Hcmdqp {}
4845impl ::core::default::Default for Hcmdqp {
4846 #[inline(always)]
4847 fn default() -> Hcmdqp {
4848 <crate::RegValueT<Hcmdqp_SPEC> as RegisterValue<_>>::new(0)
4849 }
4850}
4851
4852#[doc(hidden)]
4853#[derive(Copy, Clone, Eq, PartialEq)]
4854pub struct Hrspqp_SPEC;
4855impl crate::sealed::RegSpec for Hrspqp_SPEC {
4856 type DataType = u32;
4857}
4858
4859#[doc = "High Priority Response Queue Port Register"]
4860pub type Hrspqp = crate::RegValueT<Hrspqp_SPEC>;
4861
4862impl NoBitfieldReg<Hrspqp_SPEC> for Hrspqp {}
4863impl ::core::default::Default for Hrspqp {
4864 #[inline(always)]
4865 fn default() -> Hrspqp {
4866 <crate::RegValueT<Hrspqp_SPEC> as RegisterValue<_>>::new(0)
4867 }
4868}
4869
4870#[doc(hidden)]
4871#[derive(Copy, Clone, Eq, PartialEq)]
4872pub struct Htdtbp_SPEC;
4873impl crate::sealed::RegSpec for Htdtbp_SPEC {
4874 type DataType = u32;
4875}
4876
4877#[doc = "High Priority Transfer Data Buffer Port Register"]
4878pub type Htdtbp = crate::RegValueT<Htdtbp_SPEC>;
4879
4880impl NoBitfieldReg<Htdtbp_SPEC> for Htdtbp {}
4881impl ::core::default::Default for Htdtbp {
4882 #[inline(always)]
4883 fn default() -> Htdtbp {
4884 <crate::RegValueT<Htdtbp_SPEC> as RegisterValue<_>>::new(0)
4885 }
4886}
4887
4888#[doc(hidden)]
4889#[derive(Copy, Clone, Eq, PartialEq)]
4890pub struct Nqthctl_SPEC;
4891impl crate::sealed::RegSpec for Nqthctl_SPEC {
4892 type DataType = u32;
4893}
4894
4895#[doc = "Normal Queue Threshold Control Register"]
4896pub type Nqthctl = crate::RegValueT<Nqthctl_SPEC>;
4897
4898impl Nqthctl {
4899 #[doc = "Normal Command Ready Queue Threshold"]
4900 #[inline(always)]
4901 pub fn cmdqth(
4902 self,
4903 ) -> crate::common::RegisterField<
4904 0,
4905 0xff,
4906 1,
4907 0,
4908 nqthctl::Cmdqth,
4909 nqthctl::Cmdqth,
4910 Nqthctl_SPEC,
4911 crate::common::RW,
4912 > {
4913 crate::common::RegisterField::<
4914 0,
4915 0xff,
4916 1,
4917 0,
4918 nqthctl::Cmdqth,
4919 nqthctl::Cmdqth,
4920 Nqthctl_SPEC,
4921 crate::common::RW,
4922 >::from_register(self, 0)
4923 }
4924
4925 #[doc = "Normal Response Queue Threshold"]
4926 #[inline(always)]
4927 pub fn rspqth(
4928 self,
4929 ) -> crate::common::RegisterField<
4930 8,
4931 0xff,
4932 1,
4933 0,
4934 nqthctl::Rspqth,
4935 nqthctl::Rspqth,
4936 Nqthctl_SPEC,
4937 crate::common::RW,
4938 > {
4939 crate::common::RegisterField::<
4940 8,
4941 0xff,
4942 1,
4943 0,
4944 nqthctl::Rspqth,
4945 nqthctl::Rspqth,
4946 Nqthctl_SPEC,
4947 crate::common::RW,
4948 >::from_register(self, 0)
4949 }
4950
4951 #[doc = "Normal IBI Data Segment Size"]
4952 #[inline(always)]
4953 pub fn ibidssz(
4954 self,
4955 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqthctl_SPEC, crate::common::RW> {
4956 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqthctl_SPEC,crate::common::RW>::from_register(self,0)
4957 }
4958
4959 #[doc = "Normal IBI Queue Threshold"]
4960 #[inline(always)]
4961 pub fn ibiqth(
4962 self,
4963 ) -> crate::common::RegisterField<
4964 24,
4965 0xff,
4966 1,
4967 0,
4968 nqthctl::Ibiqth,
4969 nqthctl::Ibiqth,
4970 Nqthctl_SPEC,
4971 crate::common::RW,
4972 > {
4973 crate::common::RegisterField::<
4974 24,
4975 0xff,
4976 1,
4977 0,
4978 nqthctl::Ibiqth,
4979 nqthctl::Ibiqth,
4980 Nqthctl_SPEC,
4981 crate::common::RW,
4982 >::from_register(self, 0)
4983 }
4984}
4985impl ::core::default::Default for Nqthctl {
4986 #[inline(always)]
4987 fn default() -> Nqthctl {
4988 <crate::RegValueT<Nqthctl_SPEC> as RegisterValue<_>>::new(16843009)
4989 }
4990}
4991pub mod nqthctl {
4992
4993 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4994 pub struct Cmdqth_SPEC;
4995 pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
4996 impl Cmdqth {
4997 #[doc = "Interrupt is issued when Command Queue is completely empty."]
4998 pub const _0_X_00: Self = Self::new(0);
4999 }
5000 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5001 pub struct Rspqth_SPEC;
5002 pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
5003 impl Rspqth {
5004 #[doc = "Interrupt is issued when Response Queue contains 1 entry (DWORD)."]
5005 pub const _0_X_00: Self = Self::new(0);
5006 }
5007 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5008 pub struct Ibiqth_SPEC;
5009 pub type Ibiqth = crate::EnumBitfieldStruct<u8, Ibiqth_SPEC>;
5010 impl Ibiqth {
5011 #[doc = "I3C Protocol mode (Master): Interrupt is generated when the Outstanding IBI Status count is 1 or more. I3C Protocol mode (Slave): Interrupt is issued when IBI Data Buffer is completely empty."]
5012 pub const _0_X_00: Self = Self::new(0);
5013 }
5014}
5015#[doc(hidden)]
5016#[derive(Copy, Clone, Eq, PartialEq)]
5017pub struct Ntbthctl0_SPEC;
5018impl crate::sealed::RegSpec for Ntbthctl0_SPEC {
5019 type DataType = u32;
5020}
5021
5022#[doc = "Normal Transfer Data Buffer Threshold Control Register 0"]
5023pub type Ntbthctl0 = crate::RegValueT<Ntbthctl0_SPEC>;
5024
5025impl Ntbthctl0 {
5026 #[doc = "Normal Transmit Data Buffer Threshold"]
5027 #[inline(always)]
5028 pub fn txdbth(
5029 self,
5030 ) -> crate::common::RegisterField<
5031 0,
5032 0x7,
5033 1,
5034 0,
5035 ntbthctl0::Txdbth,
5036 ntbthctl0::Txdbth,
5037 Ntbthctl0_SPEC,
5038 crate::common::RW,
5039 > {
5040 crate::common::RegisterField::<
5041 0,
5042 0x7,
5043 1,
5044 0,
5045 ntbthctl0::Txdbth,
5046 ntbthctl0::Txdbth,
5047 Ntbthctl0_SPEC,
5048 crate::common::RW,
5049 >::from_register(self, 0)
5050 }
5051
5052 #[doc = "Normal Receive Data Buffer Threshold"]
5053 #[inline(always)]
5054 pub fn rxdbth(
5055 self,
5056 ) -> crate::common::RegisterField<
5057 8,
5058 0x7,
5059 1,
5060 0,
5061 ntbthctl0::Rxdbth,
5062 ntbthctl0::Rxdbth,
5063 Ntbthctl0_SPEC,
5064 crate::common::RW,
5065 > {
5066 crate::common::RegisterField::<
5067 8,
5068 0x7,
5069 1,
5070 0,
5071 ntbthctl0::Rxdbth,
5072 ntbthctl0::Rxdbth,
5073 Ntbthctl0_SPEC,
5074 crate::common::RW,
5075 >::from_register(self, 0)
5076 }
5077
5078 #[doc = "Normal Tx Start Threshold"]
5079 #[inline(always)]
5080 pub fn txstth(
5081 self,
5082 ) -> crate::common::RegisterField<
5083 16,
5084 0x7,
5085 1,
5086 0,
5087 ntbthctl0::Txstth,
5088 ntbthctl0::Txstth,
5089 Ntbthctl0_SPEC,
5090 crate::common::RW,
5091 > {
5092 crate::common::RegisterField::<
5093 16,
5094 0x7,
5095 1,
5096 0,
5097 ntbthctl0::Txstth,
5098 ntbthctl0::Txstth,
5099 Ntbthctl0_SPEC,
5100 crate::common::RW,
5101 >::from_register(self, 0)
5102 }
5103
5104 #[doc = "Normal Rx Start Threshold"]
5105 #[inline(always)]
5106 pub fn rxstth(
5107 self,
5108 ) -> crate::common::RegisterField<
5109 24,
5110 0x7,
5111 1,
5112 0,
5113 ntbthctl0::Rxstth,
5114 ntbthctl0::Rxstth,
5115 Ntbthctl0_SPEC,
5116 crate::common::RW,
5117 > {
5118 crate::common::RegisterField::<
5119 24,
5120 0x7,
5121 1,
5122 0,
5123 ntbthctl0::Rxstth,
5124 ntbthctl0::Rxstth,
5125 Ntbthctl0_SPEC,
5126 crate::common::RW,
5127 >::from_register(self, 0)
5128 }
5129}
5130impl ::core::default::Default for Ntbthctl0 {
5131 #[inline(always)]
5132 fn default() -> Ntbthctl0 {
5133 <crate::RegValueT<Ntbthctl0_SPEC> as RegisterValue<_>>::new(16843009)
5134 }
5135}
5136pub mod ntbthctl0 {
5137
5138 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5139 pub struct Txdbth_SPEC;
5140 pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
5141 impl Txdbth {
5142 #[doc = "Interrupt triggers at 2 Tx Buffer empties, DWORDs"]
5143 pub const _000: Self = Self::new(0);
5144
5145 #[doc = "Interrupt triggers at 4 Tx Buffer empties, DWORDs"]
5146 pub const _001: Self = Self::new(1);
5147
5148 #[doc = "Interrupt triggers at 8 Tx Buffer empties, DWORDs"]
5149 pub const _010: Self = Self::new(2);
5150
5151 #[doc = "Interrupt triggers at 16 Tx Buffer empties, DWORDs"]
5152 pub const _011: Self = Self::new(3);
5153 }
5154 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5155 pub struct Rxdbth_SPEC;
5156 pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
5157 impl Rxdbth {
5158 #[doc = "Interrupt triggers at 2 Rx Buffer entries, DWORDs"]
5159 pub const _000: Self = Self::new(0);
5160
5161 #[doc = "Interrupt triggers at 4 Rx Buffer entries, DWORDs"]
5162 pub const _001: Self = Self::new(1);
5163
5164 #[doc = "Interrupt triggers at 8 Rx Buffer entries, DWORDs"]
5165 pub const _010: Self = Self::new(2);
5166
5167 #[doc = "Interrupt triggers at 16 Rx Buffer entries, DWORDs"]
5168 pub const _011: Self = Self::new(3);
5169 }
5170 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5171 pub struct Txstth_SPEC;
5172 pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
5173 impl Txstth {
5174 #[doc = "Wait for 2 entry DWORDs"]
5175 pub const _000: Self = Self::new(0);
5176
5177 #[doc = "Wait for 4 entry DWORDs"]
5178 pub const _001: Self = Self::new(1);
5179
5180 #[doc = "Wait for 8 entry DWORDs"]
5181 pub const _010: Self = Self::new(2);
5182
5183 #[doc = "Wait for 16 entry DWORDs"]
5184 pub const _011: Self = Self::new(3);
5185 }
5186 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5187 pub struct Rxstth_SPEC;
5188 pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
5189 impl Rxstth {
5190 #[doc = "Wait for 2 empty DWORDs"]
5191 pub const _000: Self = Self::new(0);
5192
5193 #[doc = "Wait for 4 empty DWORDs"]
5194 pub const _001: Self = Self::new(1);
5195
5196 #[doc = "Wait for 8 empty DWORDs"]
5197 pub const _010: Self = Self::new(2);
5198
5199 #[doc = "Wait for 16 empty DWORDs"]
5200 pub const _011: Self = Self::new(3);
5201 }
5202}
5203#[doc(hidden)]
5204#[derive(Copy, Clone, Eq, PartialEq)]
5205pub struct Nrqthctl_SPEC;
5206impl crate::sealed::RegSpec for Nrqthctl_SPEC {
5207 type DataType = u32;
5208}
5209
5210#[doc = "Normal Receive Status Queue Threshold Control Register"]
5211pub type Nrqthctl = crate::RegValueT<Nrqthctl_SPEC>;
5212
5213impl Nrqthctl {
5214 #[doc = "Normal Receive Status Queue Threshold"]
5215 #[inline(always)]
5216 pub fn rsqth(
5217 self,
5218 ) -> crate::common::RegisterField<
5219 0,
5220 0xff,
5221 1,
5222 0,
5223 nrqthctl::Rsqth,
5224 nrqthctl::Rsqth,
5225 Nrqthctl_SPEC,
5226 crate::common::RW,
5227 > {
5228 crate::common::RegisterField::<
5229 0,
5230 0xff,
5231 1,
5232 0,
5233 nrqthctl::Rsqth,
5234 nrqthctl::Rsqth,
5235 Nrqthctl_SPEC,
5236 crate::common::RW,
5237 >::from_register(self, 0)
5238 }
5239}
5240impl ::core::default::Default for Nrqthctl {
5241 #[inline(always)]
5242 fn default() -> Nrqthctl {
5243 <crate::RegValueT<Nrqthctl_SPEC> as RegisterValue<_>>::new(1)
5244 }
5245}
5246pub mod nrqthctl {
5247
5248 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5249 pub struct Rsqth_SPEC;
5250 pub type Rsqth = crate::EnumBitfieldStruct<u8, Rsqth_SPEC>;
5251 impl Rsqth {
5252 #[doc = "Interrupt is issued when Receive Status Queue contains 1 entry (DWORD)."]
5253 pub const _0_X_00: Self = Self::new(0);
5254 }
5255}
5256#[doc(hidden)]
5257#[derive(Copy, Clone, Eq, PartialEq)]
5258pub struct Hqthctl_SPEC;
5259impl crate::sealed::RegSpec for Hqthctl_SPEC {
5260 type DataType = u32;
5261}
5262
5263#[doc = "High Priority Queue Threshold Control Register"]
5264pub type Hqthctl = crate::RegValueT<Hqthctl_SPEC>;
5265
5266impl Hqthctl {
5267 #[doc = "High Priority Command Ready Queue Threshold"]
5268 #[inline(always)]
5269 pub fn cmdqth(
5270 self,
5271 ) -> crate::common::RegisterField<
5272 0,
5273 0xff,
5274 1,
5275 0,
5276 hqthctl::Cmdqth,
5277 hqthctl::Cmdqth,
5278 Hqthctl_SPEC,
5279 crate::common::RW,
5280 > {
5281 crate::common::RegisterField::<
5282 0,
5283 0xff,
5284 1,
5285 0,
5286 hqthctl::Cmdqth,
5287 hqthctl::Cmdqth,
5288 Hqthctl_SPEC,
5289 crate::common::RW,
5290 >::from_register(self, 0)
5291 }
5292
5293 #[doc = "High Priority Response Ready Queue Threshold"]
5294 #[inline(always)]
5295 pub fn rspqth(
5296 self,
5297 ) -> crate::common::RegisterField<
5298 8,
5299 0xff,
5300 1,
5301 0,
5302 hqthctl::Rspqth,
5303 hqthctl::Rspqth,
5304 Hqthctl_SPEC,
5305 crate::common::RW,
5306 > {
5307 crate::common::RegisterField::<
5308 8,
5309 0xff,
5310 1,
5311 0,
5312 hqthctl::Rspqth,
5313 hqthctl::Rspqth,
5314 Hqthctl_SPEC,
5315 crate::common::RW,
5316 >::from_register(self, 0)
5317 }
5318}
5319impl ::core::default::Default for Hqthctl {
5320 #[inline(always)]
5321 fn default() -> Hqthctl {
5322 <crate::RegValueT<Hqthctl_SPEC> as RegisterValue<_>>::new(257)
5323 }
5324}
5325pub mod hqthctl {
5326
5327 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5328 pub struct Cmdqth_SPEC;
5329 pub type Cmdqth = crate::EnumBitfieldStruct<u8, Cmdqth_SPEC>;
5330 impl Cmdqth {
5331 #[doc = "Interrupt is issued when High Priority Command Queue is completely empty."]
5332 pub const _0_X_00: Self = Self::new(0);
5333 }
5334 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5335 pub struct Rspqth_SPEC;
5336 pub type Rspqth = crate::EnumBitfieldStruct<u8, Rspqth_SPEC>;
5337 impl Rspqth {
5338 #[doc = "Interrupt is issued when High Priority Response Queue contains 1 entry (DWORD)."]
5339 pub const _0_X_00: Self = Self::new(0);
5340 }
5341}
5342#[doc(hidden)]
5343#[derive(Copy, Clone, Eq, PartialEq)]
5344pub struct Htbthctl_SPEC;
5345impl crate::sealed::RegSpec for Htbthctl_SPEC {
5346 type DataType = u32;
5347}
5348
5349#[doc = "High Priority Transfer Data Buffer Threshold Control Register"]
5350pub type Htbthctl = crate::RegValueT<Htbthctl_SPEC>;
5351
5352impl Htbthctl {
5353 #[doc = "High Priority Transmit Data Buffer Threshold"]
5354 #[inline(always)]
5355 pub fn txdbth(
5356 self,
5357 ) -> crate::common::RegisterField<
5358 0,
5359 0x7,
5360 1,
5361 0,
5362 htbthctl::Txdbth,
5363 htbthctl::Txdbth,
5364 Htbthctl_SPEC,
5365 crate::common::RW,
5366 > {
5367 crate::common::RegisterField::<
5368 0,
5369 0x7,
5370 1,
5371 0,
5372 htbthctl::Txdbth,
5373 htbthctl::Txdbth,
5374 Htbthctl_SPEC,
5375 crate::common::RW,
5376 >::from_register(self, 0)
5377 }
5378
5379 #[doc = "High Priority Receive Data Buffer Threshold"]
5380 #[inline(always)]
5381 pub fn rxdbth(
5382 self,
5383 ) -> crate::common::RegisterField<
5384 8,
5385 0x7,
5386 1,
5387 0,
5388 htbthctl::Rxdbth,
5389 htbthctl::Rxdbth,
5390 Htbthctl_SPEC,
5391 crate::common::RW,
5392 > {
5393 crate::common::RegisterField::<
5394 8,
5395 0x7,
5396 1,
5397 0,
5398 htbthctl::Rxdbth,
5399 htbthctl::Rxdbth,
5400 Htbthctl_SPEC,
5401 crate::common::RW,
5402 >::from_register(self, 0)
5403 }
5404
5405 #[doc = "High Priority Tx Start Threshold"]
5406 #[inline(always)]
5407 pub fn txstth(
5408 self,
5409 ) -> crate::common::RegisterField<
5410 16,
5411 0x7,
5412 1,
5413 0,
5414 htbthctl::Txstth,
5415 htbthctl::Txstth,
5416 Htbthctl_SPEC,
5417 crate::common::RW,
5418 > {
5419 crate::common::RegisterField::<
5420 16,
5421 0x7,
5422 1,
5423 0,
5424 htbthctl::Txstth,
5425 htbthctl::Txstth,
5426 Htbthctl_SPEC,
5427 crate::common::RW,
5428 >::from_register(self, 0)
5429 }
5430
5431 #[doc = "High Priority Rx Start Threshold"]
5432 #[inline(always)]
5433 pub fn rxstth(
5434 self,
5435 ) -> crate::common::RegisterField<
5436 24,
5437 0x7,
5438 1,
5439 0,
5440 htbthctl::Rxstth,
5441 htbthctl::Rxstth,
5442 Htbthctl_SPEC,
5443 crate::common::RW,
5444 > {
5445 crate::common::RegisterField::<
5446 24,
5447 0x7,
5448 1,
5449 0,
5450 htbthctl::Rxstth,
5451 htbthctl::Rxstth,
5452 Htbthctl_SPEC,
5453 crate::common::RW,
5454 >::from_register(self, 0)
5455 }
5456}
5457impl ::core::default::Default for Htbthctl {
5458 #[inline(always)]
5459 fn default() -> Htbthctl {
5460 <crate::RegValueT<Htbthctl_SPEC> as RegisterValue<_>>::new(16843009)
5461 }
5462}
5463pub mod htbthctl {
5464
5465 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5466 pub struct Txdbth_SPEC;
5467 pub type Txdbth = crate::EnumBitfieldStruct<u8, Txdbth_SPEC>;
5468 impl Txdbth {
5469 #[doc = "Interrupt triggers at 2 High Priority Tx Buffer empties, DWORDs"]
5470 pub const _000: Self = Self::new(0);
5471
5472 #[doc = "Reserved"]
5473 pub const _001: Self = Self::new(1);
5474 }
5475 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5476 pub struct Rxdbth_SPEC;
5477 pub type Rxdbth = crate::EnumBitfieldStruct<u8, Rxdbth_SPEC>;
5478 impl Rxdbth {
5479 #[doc = "Interrupt triggers at 2 High Priority Rx Buffer entries, DWORDs"]
5480 pub const _000: Self = Self::new(0);
5481
5482 #[doc = "Reserved"]
5483 pub const _001: Self = Self::new(1);
5484 }
5485 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5486 pub struct Txstth_SPEC;
5487 pub type Txstth = crate::EnumBitfieldStruct<u8, Txstth_SPEC>;
5488 impl Txstth {
5489 #[doc = "Wait for 2 entry DWORDs"]
5490 pub const _000: Self = Self::new(0);
5491
5492 #[doc = "Reserved"]
5493 pub const _001: Self = Self::new(1);
5494 }
5495 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5496 pub struct Rxstth_SPEC;
5497 pub type Rxstth = crate::EnumBitfieldStruct<u8, Rxstth_SPEC>;
5498 impl Rxstth {
5499 #[doc = "Wait for 2 empty DWORDs"]
5500 pub const _000: Self = Self::new(0);
5501
5502 #[doc = "Reserved"]
5503 pub const _001: Self = Self::new(1);
5504 }
5505}
5506#[doc(hidden)]
5507#[derive(Copy, Clone, Eq, PartialEq)]
5508pub struct Bst_SPEC;
5509impl crate::sealed::RegSpec for Bst_SPEC {
5510 type DataType = u32;
5511}
5512
5513#[doc = "Bus Status Register"]
5514pub type Bst = crate::RegValueT<Bst_SPEC>;
5515
5516impl Bst {
5517 #[doc = "START Condition Detection Flag"]
5518 #[inline(always)]
5519 pub fn stcnddf(
5520 self,
5521 ) -> crate::common::RegisterField<
5522 0,
5523 0x1,
5524 1,
5525 0,
5526 bst::Stcnddf,
5527 bst::Stcnddf,
5528 Bst_SPEC,
5529 crate::common::RW,
5530 > {
5531 crate::common::RegisterField::<
5532 0,
5533 0x1,
5534 1,
5535 0,
5536 bst::Stcnddf,
5537 bst::Stcnddf,
5538 Bst_SPEC,
5539 crate::common::RW,
5540 >::from_register(self, 0)
5541 }
5542
5543 #[doc = "STOP Condition Detection Flag"]
5544 #[inline(always)]
5545 pub fn spcnddf(
5546 self,
5547 ) -> crate::common::RegisterField<
5548 1,
5549 0x1,
5550 1,
5551 0,
5552 bst::Spcnddf,
5553 bst::Spcnddf,
5554 Bst_SPEC,
5555 crate::common::RW,
5556 > {
5557 crate::common::RegisterField::<
5558 1,
5559 0x1,
5560 1,
5561 0,
5562 bst::Spcnddf,
5563 bst::Spcnddf,
5564 Bst_SPEC,
5565 crate::common::RW,
5566 >::from_register(self, 0)
5567 }
5568
5569 #[doc = "HDR Exit Pattern Detection Flag"]
5570 #[inline(always)]
5571 pub fn hdrexdf(
5572 self,
5573 ) -> crate::common::RegisterField<
5574 2,
5575 0x1,
5576 1,
5577 0,
5578 bst::Hdrexdf,
5579 bst::Hdrexdf,
5580 Bst_SPEC,
5581 crate::common::RW,
5582 > {
5583 crate::common::RegisterField::<
5584 2,
5585 0x1,
5586 1,
5587 0,
5588 bst::Hdrexdf,
5589 bst::Hdrexdf,
5590 Bst_SPEC,
5591 crate::common::RW,
5592 >::from_register(self, 0)
5593 }
5594
5595 #[doc = "NACK Detection Flag"]
5596 #[inline(always)]
5597 pub fn nackdf(
5598 self,
5599 ) -> crate::common::RegisterField<
5600 4,
5601 0x1,
5602 1,
5603 0,
5604 bst::Nackdf,
5605 bst::Nackdf,
5606 Bst_SPEC,
5607 crate::common::RW,
5608 > {
5609 crate::common::RegisterField::<
5610 4,
5611 0x1,
5612 1,
5613 0,
5614 bst::Nackdf,
5615 bst::Nackdf,
5616 Bst_SPEC,
5617 crate::common::RW,
5618 >::from_register(self, 0)
5619 }
5620
5621 #[doc = "Transmit End Flag"]
5622 #[inline(always)]
5623 pub fn tendf(
5624 self,
5625 ) -> crate::common::RegisterField<
5626 8,
5627 0x1,
5628 1,
5629 0,
5630 bst::Tendf,
5631 bst::Tendf,
5632 Bst_SPEC,
5633 crate::common::RW,
5634 > {
5635 crate::common::RegisterField::<
5636 8,
5637 0x1,
5638 1,
5639 0,
5640 bst::Tendf,
5641 bst::Tendf,
5642 Bst_SPEC,
5643 crate::common::RW,
5644 >::from_register(self, 0)
5645 }
5646
5647 #[doc = "Arbitration Lost Flag"]
5648 #[inline(always)]
5649 pub fn alf(
5650 self,
5651 ) -> crate::common::RegisterField<16, 0x1, 1, 0, bst::Alf, bst::Alf, Bst_SPEC, crate::common::RW>
5652 {
5653 crate::common::RegisterField::<16,0x1,1,0,bst::Alf,bst::Alf,Bst_SPEC,crate::common::RW>::from_register(self,0)
5654 }
5655
5656 #[doc = "Timeout Detection Flag"]
5657 #[inline(always)]
5658 pub fn todf(
5659 self,
5660 ) -> crate::common::RegisterField<
5661 20,
5662 0x1,
5663 1,
5664 0,
5665 bst::Todf,
5666 bst::Todf,
5667 Bst_SPEC,
5668 crate::common::RW,
5669 > {
5670 crate::common::RegisterField::<
5671 20,
5672 0x1,
5673 1,
5674 0,
5675 bst::Todf,
5676 bst::Todf,
5677 Bst_SPEC,
5678 crate::common::RW,
5679 >::from_register(self, 0)
5680 }
5681
5682 #[doc = "Wake-Up Condition Detection Flag"]
5683 #[inline(always)]
5684 pub fn wucnddf(
5685 self,
5686 ) -> crate::common::RegisterField<
5687 24,
5688 0x1,
5689 1,
5690 0,
5691 bst::Wucnddf,
5692 bst::Wucnddf,
5693 Bst_SPEC,
5694 crate::common::RW,
5695 > {
5696 crate::common::RegisterField::<
5697 24,
5698 0x1,
5699 1,
5700 0,
5701 bst::Wucnddf,
5702 bst::Wucnddf,
5703 Bst_SPEC,
5704 crate::common::RW,
5705 >::from_register(self, 0)
5706 }
5707}
5708impl ::core::default::Default for Bst {
5709 #[inline(always)]
5710 fn default() -> Bst {
5711 <crate::RegValueT<Bst_SPEC> as RegisterValue<_>>::new(0)
5712 }
5713}
5714pub mod bst {
5715
5716 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5717 pub struct Stcnddf_SPEC;
5718 pub type Stcnddf = crate::EnumBitfieldStruct<u8, Stcnddf_SPEC>;
5719 impl Stcnddf {
5720 #[doc = "START condition is not detected."]
5721 pub const _0: Self = Self::new(0);
5722
5723 #[doc = "START condition is detected."]
5724 pub const _1: Self = Self::new(1);
5725 }
5726 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5727 pub struct Spcnddf_SPEC;
5728 pub type Spcnddf = crate::EnumBitfieldStruct<u8, Spcnddf_SPEC>;
5729 impl Spcnddf {
5730 #[doc = "STOP condition is not detected."]
5731 pub const _0: Self = Self::new(0);
5732
5733 #[doc = "STOP condition is detected."]
5734 pub const _1: Self = Self::new(1);
5735 }
5736 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5737 pub struct Hdrexdf_SPEC;
5738 pub type Hdrexdf = crate::EnumBitfieldStruct<u8, Hdrexdf_SPEC>;
5739 impl Hdrexdf {
5740 #[doc = "HDR Exit Pattern is not detected"]
5741 pub const _0: Self = Self::new(0);
5742
5743 #[doc = "HDR Exit Pattern is detected."]
5744 pub const _1: Self = Self::new(1);
5745 }
5746 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5747 pub struct Nackdf_SPEC;
5748 pub type Nackdf = crate::EnumBitfieldStruct<u8, Nackdf_SPEC>;
5749 impl Nackdf {
5750 #[doc = "NACK is not detected."]
5751 pub const _0: Self = Self::new(0);
5752
5753 #[doc = "NACK is detected."]
5754 pub const _1: Self = Self::new(1);
5755 }
5756 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5757 pub struct Tendf_SPEC;
5758 pub type Tendf = crate::EnumBitfieldStruct<u8, Tendf_SPEC>;
5759 impl Tendf {
5760 #[doc = "Data is being transmitted."]
5761 pub const _0: Self = Self::new(0);
5762
5763 #[doc = "Data has been transmitted."]
5764 pub const _1: Self = Self::new(1);
5765 }
5766 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5767 pub struct Alf_SPEC;
5768 pub type Alf = crate::EnumBitfieldStruct<u8, Alf_SPEC>;
5769 impl Alf {
5770 #[doc = "Arbitration is not lost"]
5771 pub const _0: Self = Self::new(0);
5772
5773 #[doc = "Arbitration is lost."]
5774 pub const _1: Self = Self::new(1);
5775 }
5776 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5777 pub struct Todf_SPEC;
5778 pub type Todf = crate::EnumBitfieldStruct<u8, Todf_SPEC>;
5779 impl Todf {
5780 #[doc = "Timeout is not detected."]
5781 pub const _0: Self = Self::new(0);
5782
5783 #[doc = "Timeout is detected."]
5784 pub const _1: Self = Self::new(1);
5785 }
5786 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5787 pub struct Wucnddf_SPEC;
5788 pub type Wucnddf = crate::EnumBitfieldStruct<u8, Wucnddf_SPEC>;
5789 impl Wucnddf {
5790 #[doc = "Wake-Up is not detected."]
5791 pub const _0: Self = Self::new(0);
5792
5793 #[doc = "Wake-Up is detected."]
5794 pub const _1: Self = Self::new(1);
5795 }
5796}
5797#[doc(hidden)]
5798#[derive(Copy, Clone, Eq, PartialEq)]
5799pub struct Bste_SPEC;
5800impl crate::sealed::RegSpec for Bste_SPEC {
5801 type DataType = u32;
5802}
5803
5804#[doc = "Bus Status Enable Register"]
5805pub type Bste = crate::RegValueT<Bste_SPEC>;
5806
5807impl Bste {
5808 #[doc = "START Condition Detection Enable"]
5809 #[inline(always)]
5810 pub fn stcndde(
5811 self,
5812 ) -> crate::common::RegisterField<
5813 0,
5814 0x1,
5815 1,
5816 0,
5817 bste::Stcndde,
5818 bste::Stcndde,
5819 Bste_SPEC,
5820 crate::common::RW,
5821 > {
5822 crate::common::RegisterField::<
5823 0,
5824 0x1,
5825 1,
5826 0,
5827 bste::Stcndde,
5828 bste::Stcndde,
5829 Bste_SPEC,
5830 crate::common::RW,
5831 >::from_register(self, 0)
5832 }
5833
5834 #[doc = "STOP Condition Detection Enable"]
5835 #[inline(always)]
5836 pub fn spcndde(
5837 self,
5838 ) -> crate::common::RegisterField<
5839 1,
5840 0x1,
5841 1,
5842 0,
5843 bste::Spcndde,
5844 bste::Spcndde,
5845 Bste_SPEC,
5846 crate::common::RW,
5847 > {
5848 crate::common::RegisterField::<
5849 1,
5850 0x1,
5851 1,
5852 0,
5853 bste::Spcndde,
5854 bste::Spcndde,
5855 Bste_SPEC,
5856 crate::common::RW,
5857 >::from_register(self, 0)
5858 }
5859
5860 #[doc = "HDR Exit Pattern Detection Enable"]
5861 #[inline(always)]
5862 pub fn hdrexde(
5863 self,
5864 ) -> crate::common::RegisterField<
5865 2,
5866 0x1,
5867 1,
5868 0,
5869 bste::Hdrexde,
5870 bste::Hdrexde,
5871 Bste_SPEC,
5872 crate::common::RW,
5873 > {
5874 crate::common::RegisterField::<
5875 2,
5876 0x1,
5877 1,
5878 0,
5879 bste::Hdrexde,
5880 bste::Hdrexde,
5881 Bste_SPEC,
5882 crate::common::RW,
5883 >::from_register(self, 0)
5884 }
5885
5886 #[doc = "NACK Detection Enable"]
5887 #[inline(always)]
5888 pub fn nackde(
5889 self,
5890 ) -> crate::common::RegisterField<
5891 4,
5892 0x1,
5893 1,
5894 0,
5895 bste::Nackde,
5896 bste::Nackde,
5897 Bste_SPEC,
5898 crate::common::RW,
5899 > {
5900 crate::common::RegisterField::<
5901 4,
5902 0x1,
5903 1,
5904 0,
5905 bste::Nackde,
5906 bste::Nackde,
5907 Bste_SPEC,
5908 crate::common::RW,
5909 >::from_register(self, 0)
5910 }
5911
5912 #[doc = "Transmit End Enable"]
5913 #[inline(always)]
5914 pub fn tende(
5915 self,
5916 ) -> crate::common::RegisterField<
5917 8,
5918 0x1,
5919 1,
5920 0,
5921 bste::Tende,
5922 bste::Tende,
5923 Bste_SPEC,
5924 crate::common::RW,
5925 > {
5926 crate::common::RegisterField::<
5927 8,
5928 0x1,
5929 1,
5930 0,
5931 bste::Tende,
5932 bste::Tende,
5933 Bste_SPEC,
5934 crate::common::RW,
5935 >::from_register(self, 0)
5936 }
5937
5938 #[doc = "Arbitration Lost Enable"]
5939 #[inline(always)]
5940 pub fn ale(
5941 self,
5942 ) -> crate::common::RegisterField<
5943 16,
5944 0x1,
5945 1,
5946 0,
5947 bste::Ale,
5948 bste::Ale,
5949 Bste_SPEC,
5950 crate::common::RW,
5951 > {
5952 crate::common::RegisterField::<
5953 16,
5954 0x1,
5955 1,
5956 0,
5957 bste::Ale,
5958 bste::Ale,
5959 Bste_SPEC,
5960 crate::common::RW,
5961 >::from_register(self, 0)
5962 }
5963
5964 #[doc = "Timeout Detection Enable"]
5965 #[inline(always)]
5966 pub fn tode(
5967 self,
5968 ) -> crate::common::RegisterField<
5969 20,
5970 0x1,
5971 1,
5972 0,
5973 bste::Tode,
5974 bste::Tode,
5975 Bste_SPEC,
5976 crate::common::RW,
5977 > {
5978 crate::common::RegisterField::<
5979 20,
5980 0x1,
5981 1,
5982 0,
5983 bste::Tode,
5984 bste::Tode,
5985 Bste_SPEC,
5986 crate::common::RW,
5987 >::from_register(self, 0)
5988 }
5989
5990 #[doc = "Wake-up Condition Detection Enable"]
5991 #[inline(always)]
5992 pub fn wucndde(
5993 self,
5994 ) -> crate::common::RegisterField<
5995 24,
5996 0x1,
5997 1,
5998 0,
5999 bste::Wucndde,
6000 bste::Wucndde,
6001 Bste_SPEC,
6002 crate::common::RW,
6003 > {
6004 crate::common::RegisterField::<
6005 24,
6006 0x1,
6007 1,
6008 0,
6009 bste::Wucndde,
6010 bste::Wucndde,
6011 Bste_SPEC,
6012 crate::common::RW,
6013 >::from_register(self, 0)
6014 }
6015}
6016impl ::core::default::Default for Bste {
6017 #[inline(always)]
6018 fn default() -> Bste {
6019 <crate::RegValueT<Bste_SPEC> as RegisterValue<_>>::new(0)
6020 }
6021}
6022pub mod bste {
6023
6024 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6025 pub struct Stcndde_SPEC;
6026 pub type Stcndde = crate::EnumBitfieldStruct<u8, Stcndde_SPEC>;
6027 impl Stcndde {
6028 #[doc = "Disables START condition Detection Interrupt Status logging."]
6029 pub const _0: Self = Self::new(0);
6030
6031 #[doc = "Enables START condition Detection Interrupt Status logging."]
6032 pub const _1: Self = Self::new(1);
6033 }
6034 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6035 pub struct Spcndde_SPEC;
6036 pub type Spcndde = crate::EnumBitfieldStruct<u8, Spcndde_SPEC>;
6037 impl Spcndde {
6038 #[doc = "Disables STOP condition Detection Interrupt Status logging."]
6039 pub const _0: Self = Self::new(0);
6040
6041 #[doc = "Enables STOP condition Detection Interrupt Status logging."]
6042 pub const _1: Self = Self::new(1);
6043 }
6044 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6045 pub struct Hdrexde_SPEC;
6046 pub type Hdrexde = crate::EnumBitfieldStruct<u8, Hdrexde_SPEC>;
6047 impl Hdrexde {
6048 #[doc = "Disables HDR Exit Pattern Detection Interrupt Status logging."]
6049 pub const _0: Self = Self::new(0);
6050
6051 #[doc = "Enables HDR Exit Pattern Detection Interrupt Status logging."]
6052 pub const _1: Self = Self::new(1);
6053 }
6054 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6055 pub struct Nackde_SPEC;
6056 pub type Nackde = crate::EnumBitfieldStruct<u8, Nackde_SPEC>;
6057 impl Nackde {
6058 #[doc = "Disables NACK Detection Interrupt Status logging."]
6059 pub const _0: Self = Self::new(0);
6060
6061 #[doc = "Enables NACK Detection Interrupt Status logging."]
6062 pub const _1: Self = Self::new(1);
6063 }
6064 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6065 pub struct Tende_SPEC;
6066 pub type Tende = crate::EnumBitfieldStruct<u8, Tende_SPEC>;
6067 impl Tende {
6068 #[doc = "Disables Transmit End Interrupt Status logging."]
6069 pub const _0: Self = Self::new(0);
6070
6071 #[doc = "Enables Transmit End Interrupt Status logging."]
6072 pub const _1: Self = Self::new(1);
6073 }
6074 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6075 pub struct Ale_SPEC;
6076 pub type Ale = crate::EnumBitfieldStruct<u8, Ale_SPEC>;
6077 impl Ale {
6078 #[doc = "Disables Arbitration Lost Interrupt Status logging."]
6079 pub const _0: Self = Self::new(0);
6080
6081 #[doc = "Enables Arbitration Lost Interrupt Status logging."]
6082 pub const _1: Self = Self::new(1);
6083 }
6084 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6085 pub struct Tode_SPEC;
6086 pub type Tode = crate::EnumBitfieldStruct<u8, Tode_SPEC>;
6087 impl Tode {
6088 #[doc = "Disables Timeout Detection Interrupt Status logging."]
6089 pub const _0: Self = Self::new(0);
6090
6091 #[doc = "Enables Timeout Detection Interrupt Status logging."]
6092 pub const _1: Self = Self::new(1);
6093 }
6094 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6095 pub struct Wucndde_SPEC;
6096 pub type Wucndde = crate::EnumBitfieldStruct<u8, Wucndde_SPEC>;
6097 impl Wucndde {
6098 #[doc = "Disables Wake-up Condition Detection Status logging."]
6099 pub const _0: Self = Self::new(0);
6100
6101 #[doc = "Enables Wake-up Condition Detection Status logging."]
6102 pub const _1: Self = Self::new(1);
6103 }
6104}
6105#[doc(hidden)]
6106#[derive(Copy, Clone, Eq, PartialEq)]
6107pub struct Bie_SPEC;
6108impl crate::sealed::RegSpec for Bie_SPEC {
6109 type DataType = u32;
6110}
6111
6112#[doc = "Bus Interrupt Enable Register"]
6113pub type Bie = crate::RegValueT<Bie_SPEC>;
6114
6115impl Bie {
6116 #[doc = "START Condition Detection Interrupt Enable"]
6117 #[inline(always)]
6118 pub fn stcnddie(
6119 self,
6120 ) -> crate::common::RegisterField<
6121 0,
6122 0x1,
6123 1,
6124 0,
6125 bie::Stcnddie,
6126 bie::Stcnddie,
6127 Bie_SPEC,
6128 crate::common::RW,
6129 > {
6130 crate::common::RegisterField::<
6131 0,
6132 0x1,
6133 1,
6134 0,
6135 bie::Stcnddie,
6136 bie::Stcnddie,
6137 Bie_SPEC,
6138 crate::common::RW,
6139 >::from_register(self, 0)
6140 }
6141
6142 #[doc = "STOP Condition Detection Interrupt Enable"]
6143 #[inline(always)]
6144 pub fn spcnddie(
6145 self,
6146 ) -> crate::common::RegisterField<
6147 1,
6148 0x1,
6149 1,
6150 0,
6151 bie::Spcnddie,
6152 bie::Spcnddie,
6153 Bie_SPEC,
6154 crate::common::RW,
6155 > {
6156 crate::common::RegisterField::<
6157 1,
6158 0x1,
6159 1,
6160 0,
6161 bie::Spcnddie,
6162 bie::Spcnddie,
6163 Bie_SPEC,
6164 crate::common::RW,
6165 >::from_register(self, 0)
6166 }
6167
6168 #[doc = "HDR Exit Pattern Detection Interrupt Enable"]
6169 #[inline(always)]
6170 pub fn hdrexdie(
6171 self,
6172 ) -> crate::common::RegisterField<
6173 2,
6174 0x1,
6175 1,
6176 0,
6177 bie::Hdrexdie,
6178 bie::Hdrexdie,
6179 Bie_SPEC,
6180 crate::common::RW,
6181 > {
6182 crate::common::RegisterField::<
6183 2,
6184 0x1,
6185 1,
6186 0,
6187 bie::Hdrexdie,
6188 bie::Hdrexdie,
6189 Bie_SPEC,
6190 crate::common::RW,
6191 >::from_register(self, 0)
6192 }
6193
6194 #[doc = "NACK Detection Interrupt Enable"]
6195 #[inline(always)]
6196 pub fn nackdie(
6197 self,
6198 ) -> crate::common::RegisterField<
6199 4,
6200 0x1,
6201 1,
6202 0,
6203 bie::Nackdie,
6204 bie::Nackdie,
6205 Bie_SPEC,
6206 crate::common::RW,
6207 > {
6208 crate::common::RegisterField::<
6209 4,
6210 0x1,
6211 1,
6212 0,
6213 bie::Nackdie,
6214 bie::Nackdie,
6215 Bie_SPEC,
6216 crate::common::RW,
6217 >::from_register(self, 0)
6218 }
6219
6220 #[doc = "Transmit End Interrupt Enable"]
6221 #[inline(always)]
6222 pub fn tendie(
6223 self,
6224 ) -> crate::common::RegisterField<
6225 8,
6226 0x1,
6227 1,
6228 0,
6229 bie::Tendie,
6230 bie::Tendie,
6231 Bie_SPEC,
6232 crate::common::RW,
6233 > {
6234 crate::common::RegisterField::<
6235 8,
6236 0x1,
6237 1,
6238 0,
6239 bie::Tendie,
6240 bie::Tendie,
6241 Bie_SPEC,
6242 crate::common::RW,
6243 >::from_register(self, 0)
6244 }
6245
6246 #[doc = "Arbitration Lost Interrupt Enable"]
6247 #[inline(always)]
6248 pub fn alie(
6249 self,
6250 ) -> crate::common::RegisterField<
6251 16,
6252 0x1,
6253 1,
6254 0,
6255 bie::Alie,
6256 bie::Alie,
6257 Bie_SPEC,
6258 crate::common::RW,
6259 > {
6260 crate::common::RegisterField::<
6261 16,
6262 0x1,
6263 1,
6264 0,
6265 bie::Alie,
6266 bie::Alie,
6267 Bie_SPEC,
6268 crate::common::RW,
6269 >::from_register(self, 0)
6270 }
6271
6272 #[doc = "Timeout Detection Interrupt Enable"]
6273 #[inline(always)]
6274 pub fn todie(
6275 self,
6276 ) -> crate::common::RegisterField<
6277 20,
6278 0x1,
6279 1,
6280 0,
6281 bie::Todie,
6282 bie::Todie,
6283 Bie_SPEC,
6284 crate::common::RW,
6285 > {
6286 crate::common::RegisterField::<
6287 20,
6288 0x1,
6289 1,
6290 0,
6291 bie::Todie,
6292 bie::Todie,
6293 Bie_SPEC,
6294 crate::common::RW,
6295 >::from_register(self, 0)
6296 }
6297
6298 #[doc = "Wake-Up Condition Detection Interrupt Enable"]
6299 #[inline(always)]
6300 pub fn wucnddie(
6301 self,
6302 ) -> crate::common::RegisterField<
6303 24,
6304 0x1,
6305 1,
6306 0,
6307 bie::Wucnddie,
6308 bie::Wucnddie,
6309 Bie_SPEC,
6310 crate::common::RW,
6311 > {
6312 crate::common::RegisterField::<
6313 24,
6314 0x1,
6315 1,
6316 0,
6317 bie::Wucnddie,
6318 bie::Wucnddie,
6319 Bie_SPEC,
6320 crate::common::RW,
6321 >::from_register(self, 0)
6322 }
6323}
6324impl ::core::default::Default for Bie {
6325 #[inline(always)]
6326 fn default() -> Bie {
6327 <crate::RegValueT<Bie_SPEC> as RegisterValue<_>>::new(0)
6328 }
6329}
6330pub mod bie {
6331
6332 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6333 pub struct Stcnddie_SPEC;
6334 pub type Stcnddie = crate::EnumBitfieldStruct<u8, Stcnddie_SPEC>;
6335 impl Stcnddie {
6336 #[doc = "Disables START condition Detection Interrupt Signal."]
6337 pub const _0: Self = Self::new(0);
6338
6339 #[doc = "Enables START condition Detection Interrupt Signal."]
6340 pub const _1: Self = Self::new(1);
6341 }
6342 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6343 pub struct Spcnddie_SPEC;
6344 pub type Spcnddie = crate::EnumBitfieldStruct<u8, Spcnddie_SPEC>;
6345 impl Spcnddie {
6346 #[doc = "Disables STOP condition Detection Interrupt Signal."]
6347 pub const _0: Self = Self::new(0);
6348
6349 #[doc = "Enables STOP condition Detection Interrupt Signal."]
6350 pub const _1: Self = Self::new(1);
6351 }
6352 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6353 pub struct Hdrexdie_SPEC;
6354 pub type Hdrexdie = crate::EnumBitfieldStruct<u8, Hdrexdie_SPEC>;
6355 impl Hdrexdie {
6356 #[doc = "Disables HDR Exit Pattern Detection Interrupt Signal."]
6357 pub const _0: Self = Self::new(0);
6358
6359 #[doc = "Enables HDR Exit Pattern Detection Interrupt Signal."]
6360 pub const _1: Self = Self::new(1);
6361 }
6362 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6363 pub struct Nackdie_SPEC;
6364 pub type Nackdie = crate::EnumBitfieldStruct<u8, Nackdie_SPEC>;
6365 impl Nackdie {
6366 #[doc = "Disables NACK Detection Interrupt Signal."]
6367 pub const _0: Self = Self::new(0);
6368
6369 #[doc = "Enables NACK Detection Interrupt Signal."]
6370 pub const _1: Self = Self::new(1);
6371 }
6372 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6373 pub struct Tendie_SPEC;
6374 pub type Tendie = crate::EnumBitfieldStruct<u8, Tendie_SPEC>;
6375 impl Tendie {
6376 #[doc = "Disables Transmit End Interrupt Signal."]
6377 pub const _0: Self = Self::new(0);
6378
6379 #[doc = "Enables Transmit End Interrupt Signal."]
6380 pub const _1: Self = Self::new(1);
6381 }
6382 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6383 pub struct Alie_SPEC;
6384 pub type Alie = crate::EnumBitfieldStruct<u8, Alie_SPEC>;
6385 impl Alie {
6386 #[doc = "Disables Arbitration Lost Interrupt Signal."]
6387 pub const _0: Self = Self::new(0);
6388
6389 #[doc = "Enables Arbitration Lost Interrupt Signal."]
6390 pub const _1: Self = Self::new(1);
6391 }
6392 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6393 pub struct Todie_SPEC;
6394 pub type Todie = crate::EnumBitfieldStruct<u8, Todie_SPEC>;
6395 impl Todie {
6396 #[doc = "Disables Timeout Detection Interrupt Signal."]
6397 pub const _0: Self = Self::new(0);
6398
6399 #[doc = "Enables Timeout Detection Interrupt Signal."]
6400 pub const _1: Self = Self::new(1);
6401 }
6402 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6403 pub struct Wucnddie_SPEC;
6404 pub type Wucnddie = crate::EnumBitfieldStruct<u8, Wucnddie_SPEC>;
6405 impl Wucnddie {
6406 #[doc = "Disables Wake-Up Condition Detection Interrupt Signal."]
6407 pub const _0: Self = Self::new(0);
6408
6409 #[doc = "Enables Wake-Up Condition Detection Interrupt Signal."]
6410 pub const _1: Self = Self::new(1);
6411 }
6412}
6413#[doc(hidden)]
6414#[derive(Copy, Clone, Eq, PartialEq)]
6415pub struct Bstfc_SPEC;
6416impl crate::sealed::RegSpec for Bstfc_SPEC {
6417 type DataType = u32;
6418}
6419
6420#[doc = "Bus Status Force Register"]
6421pub type Bstfc = crate::RegValueT<Bstfc_SPEC>;
6422
6423impl Bstfc {
6424 #[doc = "START condition Detection Force"]
6425 #[inline(always)]
6426 pub fn stcnddfc(
6427 self,
6428 ) -> crate::common::RegisterField<
6429 0,
6430 0x1,
6431 1,
6432 0,
6433 bstfc::Stcnddfc,
6434 bstfc::Stcnddfc,
6435 Bstfc_SPEC,
6436 crate::common::W,
6437 > {
6438 crate::common::RegisterField::<
6439 0,
6440 0x1,
6441 1,
6442 0,
6443 bstfc::Stcnddfc,
6444 bstfc::Stcnddfc,
6445 Bstfc_SPEC,
6446 crate::common::W,
6447 >::from_register(self, 0)
6448 }
6449
6450 #[doc = "STOP condition Detection Force"]
6451 #[inline(always)]
6452 pub fn spcnddfc(
6453 self,
6454 ) -> crate::common::RegisterField<
6455 1,
6456 0x1,
6457 1,
6458 0,
6459 bstfc::Spcnddfc,
6460 bstfc::Spcnddfc,
6461 Bstfc_SPEC,
6462 crate::common::W,
6463 > {
6464 crate::common::RegisterField::<
6465 1,
6466 0x1,
6467 1,
6468 0,
6469 bstfc::Spcnddfc,
6470 bstfc::Spcnddfc,
6471 Bstfc_SPEC,
6472 crate::common::W,
6473 >::from_register(self, 0)
6474 }
6475
6476 #[doc = "HDR Exit Pattern Detection Force"]
6477 #[inline(always)]
6478 pub fn hdrexdfc(
6479 self,
6480 ) -> crate::common::RegisterField<
6481 2,
6482 0x1,
6483 1,
6484 0,
6485 bstfc::Hdrexdfc,
6486 bstfc::Hdrexdfc,
6487 Bstfc_SPEC,
6488 crate::common::W,
6489 > {
6490 crate::common::RegisterField::<
6491 2,
6492 0x1,
6493 1,
6494 0,
6495 bstfc::Hdrexdfc,
6496 bstfc::Hdrexdfc,
6497 Bstfc_SPEC,
6498 crate::common::W,
6499 >::from_register(self, 0)
6500 }
6501
6502 #[doc = "NACK Detection Force"]
6503 #[inline(always)]
6504 pub fn nackdfc(
6505 self,
6506 ) -> crate::common::RegisterField<
6507 4,
6508 0x1,
6509 1,
6510 0,
6511 bstfc::Nackdfc,
6512 bstfc::Nackdfc,
6513 Bstfc_SPEC,
6514 crate::common::W,
6515 > {
6516 crate::common::RegisterField::<
6517 4,
6518 0x1,
6519 1,
6520 0,
6521 bstfc::Nackdfc,
6522 bstfc::Nackdfc,
6523 Bstfc_SPEC,
6524 crate::common::W,
6525 >::from_register(self, 0)
6526 }
6527
6528 #[doc = "Transmit End Force"]
6529 #[inline(always)]
6530 pub fn tendfc(
6531 self,
6532 ) -> crate::common::RegisterField<
6533 8,
6534 0x1,
6535 1,
6536 0,
6537 bstfc::Tendfc,
6538 bstfc::Tendfc,
6539 Bstfc_SPEC,
6540 crate::common::W,
6541 > {
6542 crate::common::RegisterField::<
6543 8,
6544 0x1,
6545 1,
6546 0,
6547 bstfc::Tendfc,
6548 bstfc::Tendfc,
6549 Bstfc_SPEC,
6550 crate::common::W,
6551 >::from_register(self, 0)
6552 }
6553
6554 #[doc = "Arbitration Lost Force"]
6555 #[inline(always)]
6556 pub fn alfc(
6557 self,
6558 ) -> crate::common::RegisterField<
6559 16,
6560 0x1,
6561 1,
6562 0,
6563 bstfc::Alfc,
6564 bstfc::Alfc,
6565 Bstfc_SPEC,
6566 crate::common::W,
6567 > {
6568 crate::common::RegisterField::<
6569 16,
6570 0x1,
6571 1,
6572 0,
6573 bstfc::Alfc,
6574 bstfc::Alfc,
6575 Bstfc_SPEC,
6576 crate::common::W,
6577 >::from_register(self, 0)
6578 }
6579
6580 #[doc = "Timeout Detection Force"]
6581 #[inline(always)]
6582 pub fn todfc(
6583 self,
6584 ) -> crate::common::RegisterField<
6585 20,
6586 0x1,
6587 1,
6588 0,
6589 bstfc::Todfc,
6590 bstfc::Todfc,
6591 Bstfc_SPEC,
6592 crate::common::W,
6593 > {
6594 crate::common::RegisterField::<
6595 20,
6596 0x1,
6597 1,
6598 0,
6599 bstfc::Todfc,
6600 bstfc::Todfc,
6601 Bstfc_SPEC,
6602 crate::common::W,
6603 >::from_register(self, 0)
6604 }
6605
6606 #[doc = "Wake-Up Condition Detection Force"]
6607 #[inline(always)]
6608 pub fn wucnddfc(
6609 self,
6610 ) -> crate::common::RegisterField<
6611 24,
6612 0x1,
6613 1,
6614 0,
6615 bstfc::Wucnddfc,
6616 bstfc::Wucnddfc,
6617 Bstfc_SPEC,
6618 crate::common::W,
6619 > {
6620 crate::common::RegisterField::<
6621 24,
6622 0x1,
6623 1,
6624 0,
6625 bstfc::Wucnddfc,
6626 bstfc::Wucnddfc,
6627 Bstfc_SPEC,
6628 crate::common::W,
6629 >::from_register(self, 0)
6630 }
6631}
6632impl ::core::default::Default for Bstfc {
6633 #[inline(always)]
6634 fn default() -> Bstfc {
6635 <crate::RegValueT<Bstfc_SPEC> as RegisterValue<_>>::new(0)
6636 }
6637}
6638pub mod bstfc {
6639
6640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6641 pub struct Stcnddfc_SPEC;
6642 pub type Stcnddfc = crate::EnumBitfieldStruct<u8, Stcnddfc_SPEC>;
6643 impl Stcnddfc {
6644 #[doc = "Not Force START condition Detection Interrupt for software testing."]
6645 pub const _0: Self = Self::new(0);
6646
6647 #[doc = "Force START condition Detection Interrupt for software testing."]
6648 pub const _1: Self = Self::new(1);
6649 }
6650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6651 pub struct Spcnddfc_SPEC;
6652 pub type Spcnddfc = crate::EnumBitfieldStruct<u8, Spcnddfc_SPEC>;
6653 impl Spcnddfc {
6654 #[doc = "Not Force STOP condition Detection Interrupt for software testing."]
6655 pub const _0: Self = Self::new(0);
6656
6657 #[doc = "Force STOP condition Detection Interrupt for software testing."]
6658 pub const _1: Self = Self::new(1);
6659 }
6660 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6661 pub struct Hdrexdfc_SPEC;
6662 pub type Hdrexdfc = crate::EnumBitfieldStruct<u8, Hdrexdfc_SPEC>;
6663 impl Hdrexdfc {
6664 #[doc = "Not Force HDR Exit Pattern Detection Interrupt for software testing."]
6665 pub const _0: Self = Self::new(0);
6666
6667 #[doc = "Force HDR Exit Pattern Detection Interrupt for software testing."]
6668 pub const _1: Self = Self::new(1);
6669 }
6670 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6671 pub struct Nackdfc_SPEC;
6672 pub type Nackdfc = crate::EnumBitfieldStruct<u8, Nackdfc_SPEC>;
6673 impl Nackdfc {
6674 #[doc = "Not Force NACK Detection Interrupt for software testing."]
6675 pub const _0: Self = Self::new(0);
6676
6677 #[doc = "Force NACK Detection Interrupt for software testing."]
6678 pub const _1: Self = Self::new(1);
6679 }
6680 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6681 pub struct Tendfc_SPEC;
6682 pub type Tendfc = crate::EnumBitfieldStruct<u8, Tendfc_SPEC>;
6683 impl Tendfc {
6684 #[doc = "Not Force Transmit End Interrupt for software testing."]
6685 pub const _0: Self = Self::new(0);
6686
6687 #[doc = "Force Transmit End Interrupt for software testing."]
6688 pub const _1: Self = Self::new(1);
6689 }
6690 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6691 pub struct Alfc_SPEC;
6692 pub type Alfc = crate::EnumBitfieldStruct<u8, Alfc_SPEC>;
6693 impl Alfc {
6694 #[doc = "Not Force Arbitration Lost Interrupt for software testing."]
6695 pub const _0: Self = Self::new(0);
6696
6697 #[doc = "Force Arbitration Lost Interrupt for software testing."]
6698 pub const _1: Self = Self::new(1);
6699 }
6700 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6701 pub struct Todfc_SPEC;
6702 pub type Todfc = crate::EnumBitfieldStruct<u8, Todfc_SPEC>;
6703 impl Todfc {
6704 #[doc = "Not Force Timeout Detection Interrupt for software testing."]
6705 pub const _0: Self = Self::new(0);
6706
6707 #[doc = "Force Timeout Detection Interrupt for software testing."]
6708 pub const _1: Self = Self::new(1);
6709 }
6710 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6711 pub struct Wucnddfc_SPEC;
6712 pub type Wucnddfc = crate::EnumBitfieldStruct<u8, Wucnddfc_SPEC>;
6713 impl Wucnddfc {
6714 #[doc = "Not Force Wake-Up Condition Detection Interrupt for software testing."]
6715 pub const _0: Self = Self::new(0);
6716
6717 #[doc = "Force Wake-Up Condition Detection Interrupt for software testing."]
6718 pub const _1: Self = Self::new(1);
6719 }
6720}
6721#[doc(hidden)]
6722#[derive(Copy, Clone, Eq, PartialEq)]
6723pub struct Ntst_SPEC;
6724impl crate::sealed::RegSpec for Ntst_SPEC {
6725 type DataType = u32;
6726}
6727
6728#[doc = "Normal Transfer Status Register"]
6729pub type Ntst = crate::RegValueT<Ntst_SPEC>;
6730
6731impl Ntst {
6732 #[doc = "Normal Transmit Data Buffer Empty Flag 0"]
6733 #[inline(always)]
6734 pub fn tdbef0(
6735 self,
6736 ) -> crate::common::RegisterField<
6737 0,
6738 0x1,
6739 1,
6740 0,
6741 ntst::Tdbef0,
6742 ntst::Tdbef0,
6743 Ntst_SPEC,
6744 crate::common::RW,
6745 > {
6746 crate::common::RegisterField::<
6747 0,
6748 0x1,
6749 1,
6750 0,
6751 ntst::Tdbef0,
6752 ntst::Tdbef0,
6753 Ntst_SPEC,
6754 crate::common::RW,
6755 >::from_register(self, 0)
6756 }
6757
6758 #[doc = "Normal Receive Data Buffer Full Flag 0"]
6759 #[inline(always)]
6760 pub fn rdbff0(
6761 self,
6762 ) -> crate::common::RegisterField<
6763 1,
6764 0x1,
6765 1,
6766 0,
6767 ntst::Rdbff0,
6768 ntst::Rdbff0,
6769 Ntst_SPEC,
6770 crate::common::RW,
6771 > {
6772 crate::common::RegisterField::<
6773 1,
6774 0x1,
6775 1,
6776 0,
6777 ntst::Rdbff0,
6778 ntst::Rdbff0,
6779 Ntst_SPEC,
6780 crate::common::RW,
6781 >::from_register(self, 0)
6782 }
6783
6784 #[doc = "Normal IBI Queue Empty/Full Flag"]
6785 #[inline(always)]
6786 pub fn ibiqeff(
6787 self,
6788 ) -> crate::common::RegisterField<
6789 2,
6790 0x1,
6791 1,
6792 0,
6793 ntst::Ibiqeff,
6794 ntst::Ibiqeff,
6795 Ntst_SPEC,
6796 crate::common::RW,
6797 > {
6798 crate::common::RegisterField::<
6799 2,
6800 0x1,
6801 1,
6802 0,
6803 ntst::Ibiqeff,
6804 ntst::Ibiqeff,
6805 Ntst_SPEC,
6806 crate::common::RW,
6807 >::from_register(self, 0)
6808 }
6809
6810 #[doc = "Normal Command Queue Empty Flag"]
6811 #[inline(always)]
6812 pub fn cmdqef(
6813 self,
6814 ) -> crate::common::RegisterField<
6815 3,
6816 0x1,
6817 1,
6818 0,
6819 ntst::Cmdqef,
6820 ntst::Cmdqef,
6821 Ntst_SPEC,
6822 crate::common::RW,
6823 > {
6824 crate::common::RegisterField::<
6825 3,
6826 0x1,
6827 1,
6828 0,
6829 ntst::Cmdqef,
6830 ntst::Cmdqef,
6831 Ntst_SPEC,
6832 crate::common::RW,
6833 >::from_register(self, 0)
6834 }
6835
6836 #[doc = "Normal Response Queue Full Flag"]
6837 #[inline(always)]
6838 pub fn rspqff(
6839 self,
6840 ) -> crate::common::RegisterField<
6841 4,
6842 0x1,
6843 1,
6844 0,
6845 ntst::Rspqff,
6846 ntst::Rspqff,
6847 Ntst_SPEC,
6848 crate::common::RW,
6849 > {
6850 crate::common::RegisterField::<
6851 4,
6852 0x1,
6853 1,
6854 0,
6855 ntst::Rspqff,
6856 ntst::Rspqff,
6857 Ntst_SPEC,
6858 crate::common::RW,
6859 >::from_register(self, 0)
6860 }
6861
6862 #[doc = "Normal Transfer Abort Flag"]
6863 #[inline(always)]
6864 pub fn tabtf(
6865 self,
6866 ) -> crate::common::RegisterField<
6867 5,
6868 0x1,
6869 1,
6870 0,
6871 ntst::Tabtf,
6872 ntst::Tabtf,
6873 Ntst_SPEC,
6874 crate::common::RW,
6875 > {
6876 crate::common::RegisterField::<
6877 5,
6878 0x1,
6879 1,
6880 0,
6881 ntst::Tabtf,
6882 ntst::Tabtf,
6883 Ntst_SPEC,
6884 crate::common::RW,
6885 >::from_register(self, 0)
6886 }
6887
6888 #[doc = "Normal Transfer Error Flag"]
6889 #[inline(always)]
6890 pub fn tef(
6891 self,
6892 ) -> crate::common::RegisterField<
6893 9,
6894 0x1,
6895 1,
6896 0,
6897 ntst::Tef,
6898 ntst::Tef,
6899 Ntst_SPEC,
6900 crate::common::RW,
6901 > {
6902 crate::common::RegisterField::<
6903 9,
6904 0x1,
6905 1,
6906 0,
6907 ntst::Tef,
6908 ntst::Tef,
6909 Ntst_SPEC,
6910 crate::common::RW,
6911 >::from_register(self, 0)
6912 }
6913
6914 #[doc = "Normal Receive Status Queue Full Flag"]
6915 #[inline(always)]
6916 pub fn rsqff(
6917 self,
6918 ) -> crate::common::RegisterField<
6919 20,
6920 0x1,
6921 1,
6922 0,
6923 ntst::Rsqff,
6924 ntst::Rsqff,
6925 Ntst_SPEC,
6926 crate::common::RW,
6927 > {
6928 crate::common::RegisterField::<
6929 20,
6930 0x1,
6931 1,
6932 0,
6933 ntst::Rsqff,
6934 ntst::Rsqff,
6935 Ntst_SPEC,
6936 crate::common::RW,
6937 >::from_register(self, 0)
6938 }
6939}
6940impl ::core::default::Default for Ntst {
6941 #[inline(always)]
6942 fn default() -> Ntst {
6943 <crate::RegValueT<Ntst_SPEC> as RegisterValue<_>>::new(0)
6944 }
6945}
6946pub mod ntst {
6947
6948 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6949 pub struct Tdbef0_SPEC;
6950 pub type Tdbef0 = crate::EnumBitfieldStruct<u8, Tdbef0_SPEC>;
6951 impl Tdbef0 {
6952 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is less than the NTBTHCTL0.TXDBTH\\[2:0\\] threshold."]
6953 pub const _0: Self = Self::new(0);
6954
6955 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Transmit Data Buffer 0 contains no transmit data. For I3C protocol mode: PRTS.PRTMD bit = 0. The number of empties in the Normal Transmit Data Buffer 0 is the NTBTHCTL0.TXDBTH\\[2:0\\] threshold or more."]
6956 pub const _1: Self = Self::new(1);
6957 }
6958 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6959 pub struct Rdbff0_SPEC;
6960 pub type Rdbff0 = crate::EnumBitfieldStruct<u8, Rdbff0_SPEC>;
6961 impl Rdbff0 {
6962 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains no receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is less than the NTBTHCTL0.RXDBTH\\[2:0\\] threshold."]
6963 pub const _0: Self = Self::new(0);
6964
6965 #[doc = "For I2C protocol mode: PRTS.PRTMD bit = 1. Normal Receive Data Buffer0 contains receive data. For I3C Protocol mode: PRTS.PRTMD bit = 0. The number of entries in the Normal Receive Data Buffer 0 is the NTBTHCTL0.RXDBTH\\[2:0\\] threshold or more."]
6966 pub const _1: Self = Self::new(1);
6967 }
6968 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6969 pub struct Ibiqeff_SPEC;
6970 pub type Ibiqeff = crate::EnumBitfieldStruct<u8, Ibiqeff_SPEC>;
6971 impl Ibiqeff {
6972 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is the NQTHCTL.IBIQTH threshold or less. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is less than the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is less than the NQTHCTL.IBIQTH threshold."]
6973 pub const _0: Self = Self::new(0);
6974
6975 #[doc = "For I3C protocol mode (Master): PRTS.PRTMD bit = 0, PRSST.CRMS bit = 1. The number of IBI Status Queue entries is more than the NQTHCTL.IBIQTH threshold. For I3C protocol mode (Slave) : PRTS.PRTMD bit = 0, PRSST.CRMS bit = 0. If the NQTHCTL.IBIQTH = 0: The number of IBI Data Buffer empties is the IBI Data Buffer size. If the NQTHCTL.IBIQTH is other than 0: The number of IBI Data Buffer empties is the NQTHCTL.IBIQTH threshold or more."]
6976 pub const _1: Self = Self::new(1);
6977 }
6978 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6979 pub struct Cmdqef_SPEC;
6980 pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
6981 impl Cmdqef {
6982 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is less than the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: The number of Command Queue empties is less than the NQTHCTL.CMDQTH threshold."]
6983 pub const _0: Self = Self::new(0);
6984
6985 #[doc = "If the NQTHCTL.CMDQTH = 0: The number of Command Queue empties is the Command Queue size. If the NQTHCTL.CMDQTH is other than 0: 1: The number of Command Queue empties is the NQTHCTL.CMDQTH threshold or more."]
6986 pub const _1: Self = Self::new(1);
6987 }
6988 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6989 pub struct Rspqff_SPEC;
6990 pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
6991 impl Rspqff {
6992 #[doc = "The number of Response Queue entries is the NQTHCTL.RSPQTH threshold or less."]
6993 pub const _0: Self = Self::new(0);
6994
6995 #[doc = "The number of Response Queue entries is more than the NQTHCTL.RSPQTH threshold."]
6996 pub const _1: Self = Self::new(1);
6997 }
6998 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6999 pub struct Tabtf_SPEC;
7000 pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
7001 impl Tabtf {
7002 #[doc = "Transfer Abort does not occur."]
7003 pub const _0: Self = Self::new(0);
7004
7005 #[doc = "Transfer Abort occur. To clear, write 0 to this bit after 1 state is read."]
7006 pub const _1: Self = Self::new(1);
7007 }
7008 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7009 pub struct Tef_SPEC;
7010 pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
7011 impl Tef {
7012 #[doc = "Transfer Error does not occur."]
7013 pub const _0: Self = Self::new(0);
7014
7015 #[doc = "Transfer Error occurs. To clear, write 0 to this bit after 1 state is read."]
7016 pub const _1: Self = Self::new(1);
7017 }
7018 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7019 pub struct Rsqff_SPEC;
7020 pub type Rsqff = crate::EnumBitfieldStruct<u8, Rsqff_SPEC>;
7021 impl Rsqff {
7022 #[doc = "The number of Receive Status Queue entries is the NRQTHCTL.RSQTH threshold or less."]
7023 pub const _0: Self = Self::new(0);
7024
7025 #[doc = "The number of Receive Status Queue entries is more than the NRQTHCTL.RSQTH threshold."]
7026 pub const _1: Self = Self::new(1);
7027 }
7028}
7029#[doc(hidden)]
7030#[derive(Copy, Clone, Eq, PartialEq)]
7031pub struct Ntste_SPEC;
7032impl crate::sealed::RegSpec for Ntste_SPEC {
7033 type DataType = u32;
7034}
7035
7036#[doc = "Normal Transfer Status Enable Register"]
7037pub type Ntste = crate::RegValueT<Ntste_SPEC>;
7038
7039impl Ntste {
7040 #[doc = "Normal Transmit Data Buffer Empty Enable 0"]
7041 #[inline(always)]
7042 pub fn tdbee0(
7043 self,
7044 ) -> crate::common::RegisterField<
7045 0,
7046 0x1,
7047 1,
7048 0,
7049 ntste::Tdbee0,
7050 ntste::Tdbee0,
7051 Ntste_SPEC,
7052 crate::common::RW,
7053 > {
7054 crate::common::RegisterField::<
7055 0,
7056 0x1,
7057 1,
7058 0,
7059 ntste::Tdbee0,
7060 ntste::Tdbee0,
7061 Ntste_SPEC,
7062 crate::common::RW,
7063 >::from_register(self, 0)
7064 }
7065
7066 #[doc = "Normal Receive Data Buffer Full Enable 0"]
7067 #[inline(always)]
7068 pub fn rdbfe0(
7069 self,
7070 ) -> crate::common::RegisterField<
7071 1,
7072 0x1,
7073 1,
7074 0,
7075 ntste::Rdbfe0,
7076 ntste::Rdbfe0,
7077 Ntste_SPEC,
7078 crate::common::RW,
7079 > {
7080 crate::common::RegisterField::<
7081 1,
7082 0x1,
7083 1,
7084 0,
7085 ntste::Rdbfe0,
7086 ntste::Rdbfe0,
7087 Ntste_SPEC,
7088 crate::common::RW,
7089 >::from_register(self, 0)
7090 }
7091
7092 #[doc = "Normal IBI Queue Empty/Full Enable"]
7093 #[inline(always)]
7094 pub fn ibiqefe(
7095 self,
7096 ) -> crate::common::RegisterField<
7097 2,
7098 0x1,
7099 1,
7100 0,
7101 ntste::Ibiqefe,
7102 ntste::Ibiqefe,
7103 Ntste_SPEC,
7104 crate::common::RW,
7105 > {
7106 crate::common::RegisterField::<
7107 2,
7108 0x1,
7109 1,
7110 0,
7111 ntste::Ibiqefe,
7112 ntste::Ibiqefe,
7113 Ntste_SPEC,
7114 crate::common::RW,
7115 >::from_register(self, 0)
7116 }
7117
7118 #[doc = "Normal Command Queue Empty Enable"]
7119 #[inline(always)]
7120 pub fn cmdqee(
7121 self,
7122 ) -> crate::common::RegisterField<
7123 3,
7124 0x1,
7125 1,
7126 0,
7127 ntste::Cmdqee,
7128 ntste::Cmdqee,
7129 Ntste_SPEC,
7130 crate::common::RW,
7131 > {
7132 crate::common::RegisterField::<
7133 3,
7134 0x1,
7135 1,
7136 0,
7137 ntste::Cmdqee,
7138 ntste::Cmdqee,
7139 Ntste_SPEC,
7140 crate::common::RW,
7141 >::from_register(self, 0)
7142 }
7143
7144 #[doc = "Normal Response Queue Full Enable"]
7145 #[inline(always)]
7146 pub fn rspqfe(
7147 self,
7148 ) -> crate::common::RegisterField<
7149 4,
7150 0x1,
7151 1,
7152 0,
7153 ntste::Rspqfe,
7154 ntste::Rspqfe,
7155 Ntste_SPEC,
7156 crate::common::RW,
7157 > {
7158 crate::common::RegisterField::<
7159 4,
7160 0x1,
7161 1,
7162 0,
7163 ntste::Rspqfe,
7164 ntste::Rspqfe,
7165 Ntste_SPEC,
7166 crate::common::RW,
7167 >::from_register(self, 0)
7168 }
7169
7170 #[doc = "Normal Transfer Abort Enable"]
7171 #[inline(always)]
7172 pub fn tabte(
7173 self,
7174 ) -> crate::common::RegisterField<
7175 5,
7176 0x1,
7177 1,
7178 0,
7179 ntste::Tabte,
7180 ntste::Tabte,
7181 Ntste_SPEC,
7182 crate::common::RW,
7183 > {
7184 crate::common::RegisterField::<
7185 5,
7186 0x1,
7187 1,
7188 0,
7189 ntste::Tabte,
7190 ntste::Tabte,
7191 Ntste_SPEC,
7192 crate::common::RW,
7193 >::from_register(self, 0)
7194 }
7195
7196 #[doc = "Normal Transfer Error Enable"]
7197 #[inline(always)]
7198 pub fn tee(
7199 self,
7200 ) -> crate::common::RegisterField<
7201 9,
7202 0x1,
7203 1,
7204 0,
7205 ntste::Tee,
7206 ntste::Tee,
7207 Ntste_SPEC,
7208 crate::common::RW,
7209 > {
7210 crate::common::RegisterField::<
7211 9,
7212 0x1,
7213 1,
7214 0,
7215 ntste::Tee,
7216 ntste::Tee,
7217 Ntste_SPEC,
7218 crate::common::RW,
7219 >::from_register(self, 0)
7220 }
7221
7222 #[doc = "Normal Receive Status Queue Full Enable"]
7223 #[inline(always)]
7224 pub fn rsqfe(
7225 self,
7226 ) -> crate::common::RegisterField<
7227 20,
7228 0x1,
7229 1,
7230 0,
7231 ntste::Rsqfe,
7232 ntste::Rsqfe,
7233 Ntste_SPEC,
7234 crate::common::RW,
7235 > {
7236 crate::common::RegisterField::<
7237 20,
7238 0x1,
7239 1,
7240 0,
7241 ntste::Rsqfe,
7242 ntste::Rsqfe,
7243 Ntste_SPEC,
7244 crate::common::RW,
7245 >::from_register(self, 0)
7246 }
7247}
7248impl ::core::default::Default for Ntste {
7249 #[inline(always)]
7250 fn default() -> Ntste {
7251 <crate::RegValueT<Ntste_SPEC> as RegisterValue<_>>::new(0)
7252 }
7253}
7254pub mod ntste {
7255
7256 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7257 pub struct Tdbee0_SPEC;
7258 pub type Tdbee0 = crate::EnumBitfieldStruct<u8, Tdbee0_SPEC>;
7259 impl Tdbee0 {
7260 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Status logging."]
7261 pub const _0: Self = Self::new(0);
7262
7263 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Status logging."]
7264 pub const _1: Self = Self::new(1);
7265 }
7266 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7267 pub struct Rdbfe0_SPEC;
7268 pub type Rdbfe0 = crate::EnumBitfieldStruct<u8, Rdbfe0_SPEC>;
7269 impl Rdbfe0 {
7270 #[doc = "Disables Rx0 Data Buffer Full Interrupt Status logging."]
7271 pub const _0: Self = Self::new(0);
7272
7273 #[doc = "Enables Rx0 Data Buffer Full Interrupt Status logging."]
7274 pub const _1: Self = Self::new(1);
7275 }
7276 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7277 pub struct Ibiqefe_SPEC;
7278 pub type Ibiqefe = crate::EnumBitfieldStruct<u8, Ibiqefe_SPEC>;
7279 impl Ibiqefe {
7280 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Status logging."]
7281 pub const _0: Self = Self::new(0);
7282
7283 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Status logging."]
7284 pub const _1: Self = Self::new(1);
7285 }
7286 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7287 pub struct Cmdqee_SPEC;
7288 pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
7289 impl Cmdqee {
7290 #[doc = "Disables Command Buffer Empty Interrupt Status logging."]
7291 pub const _0: Self = Self::new(0);
7292
7293 #[doc = "Enables Command Buffer Empty Interrupt Status logging."]
7294 pub const _1: Self = Self::new(1);
7295 }
7296 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7297 pub struct Rspqfe_SPEC;
7298 pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
7299 impl Rspqfe {
7300 #[doc = "Disables Response Buffer Full Interrupt Status logging."]
7301 pub const _0: Self = Self::new(0);
7302
7303 #[doc = "Enables Response Buffer Full Interrupt Status logging."]
7304 pub const _1: Self = Self::new(1);
7305 }
7306 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7307 pub struct Tabte_SPEC;
7308 pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
7309 impl Tabte {
7310 #[doc = "Disables Transfer Abort Interrupt Status logging."]
7311 pub const _0: Self = Self::new(0);
7312
7313 #[doc = "Enables Transfer Abort Interrupt Status logging."]
7314 pub const _1: Self = Self::new(1);
7315 }
7316 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7317 pub struct Tee_SPEC;
7318 pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
7319 impl Tee {
7320 #[doc = "Disables Transfer Error Interrupt Status logging."]
7321 pub const _0: Self = Self::new(0);
7322
7323 #[doc = "Enables Transfer Error Interrupt Status logging."]
7324 pub const _1: Self = Self::new(1);
7325 }
7326 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7327 pub struct Rsqfe_SPEC;
7328 pub type Rsqfe = crate::EnumBitfieldStruct<u8, Rsqfe_SPEC>;
7329 impl Rsqfe {
7330 #[doc = "Disables Receive Status Buffer Full Interrupt Status logging."]
7331 pub const _0: Self = Self::new(0);
7332
7333 #[doc = "Enables Receive Status Buffer Full Interrupt Status logging."]
7334 pub const _1: Self = Self::new(1);
7335 }
7336}
7337#[doc(hidden)]
7338#[derive(Copy, Clone, Eq, PartialEq)]
7339pub struct Ntie_SPEC;
7340impl crate::sealed::RegSpec for Ntie_SPEC {
7341 type DataType = u32;
7342}
7343
7344#[doc = "Normal Transfer Interrupt Enable Register"]
7345pub type Ntie = crate::RegValueT<Ntie_SPEC>;
7346
7347impl Ntie {
7348 #[doc = "Normal Transmit Data Buffer Empty Interrupt Enable 0"]
7349 #[inline(always)]
7350 pub fn tdbeie0(
7351 self,
7352 ) -> crate::common::RegisterField<
7353 0,
7354 0x1,
7355 1,
7356 0,
7357 ntie::Tdbeie0,
7358 ntie::Tdbeie0,
7359 Ntie_SPEC,
7360 crate::common::RW,
7361 > {
7362 crate::common::RegisterField::<
7363 0,
7364 0x1,
7365 1,
7366 0,
7367 ntie::Tdbeie0,
7368 ntie::Tdbeie0,
7369 Ntie_SPEC,
7370 crate::common::RW,
7371 >::from_register(self, 0)
7372 }
7373
7374 #[doc = "Normal Receive Data Buffer Full Interrupt Enable 0"]
7375 #[inline(always)]
7376 pub fn rdbfie0(
7377 self,
7378 ) -> crate::common::RegisterField<
7379 1,
7380 0x1,
7381 1,
7382 0,
7383 ntie::Rdbfie0,
7384 ntie::Rdbfie0,
7385 Ntie_SPEC,
7386 crate::common::RW,
7387 > {
7388 crate::common::RegisterField::<
7389 1,
7390 0x1,
7391 1,
7392 0,
7393 ntie::Rdbfie0,
7394 ntie::Rdbfie0,
7395 Ntie_SPEC,
7396 crate::common::RW,
7397 >::from_register(self, 0)
7398 }
7399
7400 #[doc = "Normal IBI Queue Empty/Full Interrupt Enable"]
7401 #[inline(always)]
7402 pub fn ibiqefie(
7403 self,
7404 ) -> crate::common::RegisterField<
7405 2,
7406 0x1,
7407 1,
7408 0,
7409 ntie::Ibiqefie,
7410 ntie::Ibiqefie,
7411 Ntie_SPEC,
7412 crate::common::RW,
7413 > {
7414 crate::common::RegisterField::<
7415 2,
7416 0x1,
7417 1,
7418 0,
7419 ntie::Ibiqefie,
7420 ntie::Ibiqefie,
7421 Ntie_SPEC,
7422 crate::common::RW,
7423 >::from_register(self, 0)
7424 }
7425
7426 #[doc = "Normal Command Queue Empty Interrupt Enable"]
7427 #[inline(always)]
7428 pub fn cmdqeie(
7429 self,
7430 ) -> crate::common::RegisterField<
7431 3,
7432 0x1,
7433 1,
7434 0,
7435 ntie::Cmdqeie,
7436 ntie::Cmdqeie,
7437 Ntie_SPEC,
7438 crate::common::RW,
7439 > {
7440 crate::common::RegisterField::<
7441 3,
7442 0x1,
7443 1,
7444 0,
7445 ntie::Cmdqeie,
7446 ntie::Cmdqeie,
7447 Ntie_SPEC,
7448 crate::common::RW,
7449 >::from_register(self, 0)
7450 }
7451
7452 #[doc = "Normal Response Queue Full Interrupt Enable"]
7453 #[inline(always)]
7454 pub fn rspqfie(
7455 self,
7456 ) -> crate::common::RegisterField<
7457 4,
7458 0x1,
7459 1,
7460 0,
7461 ntie::Rspqfie,
7462 ntie::Rspqfie,
7463 Ntie_SPEC,
7464 crate::common::RW,
7465 > {
7466 crate::common::RegisterField::<
7467 4,
7468 0x1,
7469 1,
7470 0,
7471 ntie::Rspqfie,
7472 ntie::Rspqfie,
7473 Ntie_SPEC,
7474 crate::common::RW,
7475 >::from_register(self, 0)
7476 }
7477
7478 #[doc = "Normal Transfer Abort Interrupt Enable"]
7479 #[inline(always)]
7480 pub fn tabtie(
7481 self,
7482 ) -> crate::common::RegisterField<
7483 5,
7484 0x1,
7485 1,
7486 0,
7487 ntie::Tabtie,
7488 ntie::Tabtie,
7489 Ntie_SPEC,
7490 crate::common::RW,
7491 > {
7492 crate::common::RegisterField::<
7493 5,
7494 0x1,
7495 1,
7496 0,
7497 ntie::Tabtie,
7498 ntie::Tabtie,
7499 Ntie_SPEC,
7500 crate::common::RW,
7501 >::from_register(self, 0)
7502 }
7503
7504 #[doc = "Normal Transfer Error Interrupt Enable"]
7505 #[inline(always)]
7506 pub fn teie(
7507 self,
7508 ) -> crate::common::RegisterField<
7509 9,
7510 0x1,
7511 1,
7512 0,
7513 ntie::Teie,
7514 ntie::Teie,
7515 Ntie_SPEC,
7516 crate::common::RW,
7517 > {
7518 crate::common::RegisterField::<
7519 9,
7520 0x1,
7521 1,
7522 0,
7523 ntie::Teie,
7524 ntie::Teie,
7525 Ntie_SPEC,
7526 crate::common::RW,
7527 >::from_register(self, 0)
7528 }
7529
7530 #[doc = "Normal Receive Status Queue Full Interrupt Enable"]
7531 #[inline(always)]
7532 pub fn rsqfie(
7533 self,
7534 ) -> crate::common::RegisterField<
7535 20,
7536 0x1,
7537 1,
7538 0,
7539 ntie::Rsqfie,
7540 ntie::Rsqfie,
7541 Ntie_SPEC,
7542 crate::common::RW,
7543 > {
7544 crate::common::RegisterField::<
7545 20,
7546 0x1,
7547 1,
7548 0,
7549 ntie::Rsqfie,
7550 ntie::Rsqfie,
7551 Ntie_SPEC,
7552 crate::common::RW,
7553 >::from_register(self, 0)
7554 }
7555}
7556impl ::core::default::Default for Ntie {
7557 #[inline(always)]
7558 fn default() -> Ntie {
7559 <crate::RegValueT<Ntie_SPEC> as RegisterValue<_>>::new(0)
7560 }
7561}
7562pub mod ntie {
7563
7564 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7565 pub struct Tdbeie0_SPEC;
7566 pub type Tdbeie0 = crate::EnumBitfieldStruct<u8, Tdbeie0_SPEC>;
7567 impl Tdbeie0 {
7568 #[doc = "Disables Tx0 Data Buffer Empty Interrupt Signal."]
7569 pub const _0: Self = Self::new(0);
7570
7571 #[doc = "Enables Tx0 Data Buffer Empty Interrupt Signal."]
7572 pub const _1: Self = Self::new(1);
7573 }
7574 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7575 pub struct Rdbfie0_SPEC;
7576 pub type Rdbfie0 = crate::EnumBitfieldStruct<u8, Rdbfie0_SPEC>;
7577 impl Rdbfie0 {
7578 #[doc = "Disables Rx0 Data Buffer Full Interrupt Signal."]
7579 pub const _0: Self = Self::new(0);
7580
7581 #[doc = "Enables Rx0 Data Buffer Full Interrupt Signal."]
7582 pub const _1: Self = Self::new(1);
7583 }
7584 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7585 pub struct Ibiqefie_SPEC;
7586 pub type Ibiqefie = crate::EnumBitfieldStruct<u8, Ibiqefie_SPEC>;
7587 impl Ibiqefie {
7588 #[doc = "Disables IBI Status Buffer Empty/Full Interrupt Signal."]
7589 pub const _0: Self = Self::new(0);
7590
7591 #[doc = "Enables IBI Status Buffer Empty/Full Interrupt Signal."]
7592 pub const _1: Self = Self::new(1);
7593 }
7594 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7595 pub struct Cmdqeie_SPEC;
7596 pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
7597 impl Cmdqeie {
7598 #[doc = "Disables Command Buffer Empty Interrupt Signal."]
7599 pub const _0: Self = Self::new(0);
7600
7601 #[doc = "Enables Command Buffer Empty Interrupt Signal."]
7602 pub const _1: Self = Self::new(1);
7603 }
7604 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7605 pub struct Rspqfie_SPEC;
7606 pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
7607 impl Rspqfie {
7608 #[doc = "Disables Response Buffer Full Interrupt Signal."]
7609 pub const _0: Self = Self::new(0);
7610
7611 #[doc = "Enables Response Buffer Full Interrupt Signal."]
7612 pub const _1: Self = Self::new(1);
7613 }
7614 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7615 pub struct Tabtie_SPEC;
7616 pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
7617 impl Tabtie {
7618 #[doc = "Disables Transfer Abort Interrupt Signal."]
7619 pub const _0: Self = Self::new(0);
7620
7621 #[doc = "Enables Transfer Abort Interrupt Signal."]
7622 pub const _1: Self = Self::new(1);
7623 }
7624 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7625 pub struct Teie_SPEC;
7626 pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
7627 impl Teie {
7628 #[doc = "Disables Transfer Error Interrupt Signal."]
7629 pub const _0: Self = Self::new(0);
7630
7631 #[doc = "Enables Transfer Error Interrupt Signal."]
7632 pub const _1: Self = Self::new(1);
7633 }
7634 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7635 pub struct Rsqfie_SPEC;
7636 pub type Rsqfie = crate::EnumBitfieldStruct<u8, Rsqfie_SPEC>;
7637 impl Rsqfie {
7638 #[doc = "Disables Receive Status Buffer Full Interrupt Signal."]
7639 pub const _0: Self = Self::new(0);
7640
7641 #[doc = "Enables Receive Status Buffer Full Interrupt Signal."]
7642 pub const _1: Self = Self::new(1);
7643 }
7644}
7645#[doc(hidden)]
7646#[derive(Copy, Clone, Eq, PartialEq)]
7647pub struct Ntstfc_SPEC;
7648impl crate::sealed::RegSpec for Ntstfc_SPEC {
7649 type DataType = u32;
7650}
7651
7652#[doc = "Normal Transfer Status Force Register"]
7653pub type Ntstfc = crate::RegValueT<Ntstfc_SPEC>;
7654
7655impl Ntstfc {
7656 #[doc = "Normal Transmit Data Buffer Empty Force 0"]
7657 #[inline(always)]
7658 pub fn tdbefc0(
7659 self,
7660 ) -> crate::common::RegisterField<
7661 0,
7662 0x1,
7663 1,
7664 0,
7665 ntstfc::Tdbefc0,
7666 ntstfc::Tdbefc0,
7667 Ntstfc_SPEC,
7668 crate::common::W,
7669 > {
7670 crate::common::RegisterField::<
7671 0,
7672 0x1,
7673 1,
7674 0,
7675 ntstfc::Tdbefc0,
7676 ntstfc::Tdbefc0,
7677 Ntstfc_SPEC,
7678 crate::common::W,
7679 >::from_register(self, 0)
7680 }
7681
7682 #[doc = "Normal Receive Data Buffer Full Force 0"]
7683 #[inline(always)]
7684 pub fn rdbffc0(
7685 self,
7686 ) -> crate::common::RegisterField<
7687 1,
7688 0x1,
7689 1,
7690 0,
7691 ntstfc::Rdbffc0,
7692 ntstfc::Rdbffc0,
7693 Ntstfc_SPEC,
7694 crate::common::W,
7695 > {
7696 crate::common::RegisterField::<
7697 1,
7698 0x1,
7699 1,
7700 0,
7701 ntstfc::Rdbffc0,
7702 ntstfc::Rdbffc0,
7703 Ntstfc_SPEC,
7704 crate::common::W,
7705 >::from_register(self, 0)
7706 }
7707
7708 #[doc = "Normal IBI Queue Empty/Full Force"]
7709 #[inline(always)]
7710 pub fn ibiqeffc(
7711 self,
7712 ) -> crate::common::RegisterField<
7713 2,
7714 0x1,
7715 1,
7716 0,
7717 ntstfc::Ibiqeffc,
7718 ntstfc::Ibiqeffc,
7719 Ntstfc_SPEC,
7720 crate::common::W,
7721 > {
7722 crate::common::RegisterField::<
7723 2,
7724 0x1,
7725 1,
7726 0,
7727 ntstfc::Ibiqeffc,
7728 ntstfc::Ibiqeffc,
7729 Ntstfc_SPEC,
7730 crate::common::W,
7731 >::from_register(self, 0)
7732 }
7733
7734 #[doc = "Normal Command Queue Empty Force"]
7735 #[inline(always)]
7736 pub fn cmdqefc(
7737 self,
7738 ) -> crate::common::RegisterField<
7739 3,
7740 0x1,
7741 1,
7742 0,
7743 ntstfc::Cmdqefc,
7744 ntstfc::Cmdqefc,
7745 Ntstfc_SPEC,
7746 crate::common::W,
7747 > {
7748 crate::common::RegisterField::<
7749 3,
7750 0x1,
7751 1,
7752 0,
7753 ntstfc::Cmdqefc,
7754 ntstfc::Cmdqefc,
7755 Ntstfc_SPEC,
7756 crate::common::W,
7757 >::from_register(self, 0)
7758 }
7759
7760 #[doc = "Normal Response Queue Full Force"]
7761 #[inline(always)]
7762 pub fn rspqffc(
7763 self,
7764 ) -> crate::common::RegisterField<
7765 4,
7766 0x1,
7767 1,
7768 0,
7769 ntstfc::Rspqffc,
7770 ntstfc::Rspqffc,
7771 Ntstfc_SPEC,
7772 crate::common::W,
7773 > {
7774 crate::common::RegisterField::<
7775 4,
7776 0x1,
7777 1,
7778 0,
7779 ntstfc::Rspqffc,
7780 ntstfc::Rspqffc,
7781 Ntstfc_SPEC,
7782 crate::common::W,
7783 >::from_register(self, 0)
7784 }
7785
7786 #[doc = "Normal Transfer Abort Force"]
7787 #[inline(always)]
7788 pub fn tabtfc(
7789 self,
7790 ) -> crate::common::RegisterField<
7791 5,
7792 0x1,
7793 1,
7794 0,
7795 ntstfc::Tabtfc,
7796 ntstfc::Tabtfc,
7797 Ntstfc_SPEC,
7798 crate::common::W,
7799 > {
7800 crate::common::RegisterField::<
7801 5,
7802 0x1,
7803 1,
7804 0,
7805 ntstfc::Tabtfc,
7806 ntstfc::Tabtfc,
7807 Ntstfc_SPEC,
7808 crate::common::W,
7809 >::from_register(self, 0)
7810 }
7811
7812 #[doc = "Normal Transfer Error Force"]
7813 #[inline(always)]
7814 pub fn tefc(
7815 self,
7816 ) -> crate::common::RegisterField<
7817 9,
7818 0x1,
7819 1,
7820 0,
7821 ntstfc::Tefc,
7822 ntstfc::Tefc,
7823 Ntstfc_SPEC,
7824 crate::common::W,
7825 > {
7826 crate::common::RegisterField::<
7827 9,
7828 0x1,
7829 1,
7830 0,
7831 ntstfc::Tefc,
7832 ntstfc::Tefc,
7833 Ntstfc_SPEC,
7834 crate::common::W,
7835 >::from_register(self, 0)
7836 }
7837
7838 #[doc = "Normal Receive Status Queue Full Force"]
7839 #[inline(always)]
7840 pub fn rsqffc(
7841 self,
7842 ) -> crate::common::RegisterField<
7843 20,
7844 0x1,
7845 1,
7846 0,
7847 ntstfc::Rsqffc,
7848 ntstfc::Rsqffc,
7849 Ntstfc_SPEC,
7850 crate::common::W,
7851 > {
7852 crate::common::RegisterField::<
7853 20,
7854 0x1,
7855 1,
7856 0,
7857 ntstfc::Rsqffc,
7858 ntstfc::Rsqffc,
7859 Ntstfc_SPEC,
7860 crate::common::W,
7861 >::from_register(self, 0)
7862 }
7863}
7864impl ::core::default::Default for Ntstfc {
7865 #[inline(always)]
7866 fn default() -> Ntstfc {
7867 <crate::RegValueT<Ntstfc_SPEC> as RegisterValue<_>>::new(0)
7868 }
7869}
7870pub mod ntstfc {
7871
7872 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7873 pub struct Tdbefc0_SPEC;
7874 pub type Tdbefc0 = crate::EnumBitfieldStruct<u8, Tdbefc0_SPEC>;
7875 impl Tdbefc0 {
7876 #[doc = "Not Force Tx0 Data Buffer Empty Interrupt for software testing."]
7877 pub const _0: Self = Self::new(0);
7878
7879 #[doc = "Force Tx0 Data Buffer Empty Interrupt for software testing."]
7880 pub const _1: Self = Self::new(1);
7881 }
7882 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7883 pub struct Rdbffc0_SPEC;
7884 pub type Rdbffc0 = crate::EnumBitfieldStruct<u8, Rdbffc0_SPEC>;
7885 impl Rdbffc0 {
7886 #[doc = "Not Force Rx0 Data Buffer Full Interrupt for software testing."]
7887 pub const _0: Self = Self::new(0);
7888
7889 #[doc = "Force Rx0 Data Buffer Full Interrupt for software testing."]
7890 pub const _1: Self = Self::new(1);
7891 }
7892 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7893 pub struct Ibiqeffc_SPEC;
7894 pub type Ibiqeffc = crate::EnumBitfieldStruct<u8, Ibiqeffc_SPEC>;
7895 impl Ibiqeffc {
7896 #[doc = "Not Force IBI Status Buffer Full Interrupt for software testing."]
7897 pub const _0: Self = Self::new(0);
7898
7899 #[doc = "Force IBI Status Buffer Full Interrupt for software testing."]
7900 pub const _1: Self = Self::new(1);
7901 }
7902 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7903 pub struct Cmdqefc_SPEC;
7904 pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
7905 impl Cmdqefc {
7906 #[doc = "Not Force Command Buffer Empty Interrupt for software testing."]
7907 pub const _0: Self = Self::new(0);
7908
7909 #[doc = "Force Command Buffer Empty Interrupt for software testing."]
7910 pub const _1: Self = Self::new(1);
7911 }
7912 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7913 pub struct Rspqffc_SPEC;
7914 pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
7915 impl Rspqffc {
7916 #[doc = "Not Force Response Buffer Full Interrupt for software testing."]
7917 pub const _0: Self = Self::new(0);
7918
7919 #[doc = "Force Response Buffer Full Interrupt for software testing."]
7920 pub const _1: Self = Self::new(1);
7921 }
7922 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7923 pub struct Tabtfc_SPEC;
7924 pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
7925 impl Tabtfc {
7926 #[doc = "Not Force Transfer Abort Interrupt for software testing."]
7927 pub const _0: Self = Self::new(0);
7928
7929 #[doc = "Force Transfer Abort Interrupt for software testing."]
7930 pub const _1: Self = Self::new(1);
7931 }
7932 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7933 pub struct Tefc_SPEC;
7934 pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
7935 impl Tefc {
7936 #[doc = "Not Force Transfer Error Interrupt for software testing."]
7937 pub const _0: Self = Self::new(0);
7938
7939 #[doc = "Force Transfer Error Interrupt for software testing."]
7940 pub const _1: Self = Self::new(1);
7941 }
7942 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7943 pub struct Rsqffc_SPEC;
7944 pub type Rsqffc = crate::EnumBitfieldStruct<u8, Rsqffc_SPEC>;
7945 impl Rsqffc {
7946 #[doc = "Not Force Receive Status Buffer Full Interrupt for software testing."]
7947 pub const _0: Self = Self::new(0);
7948
7949 #[doc = "Force Receive Status Buffer Full Interrupt for software testing."]
7950 pub const _1: Self = Self::new(1);
7951 }
7952}
7953#[doc(hidden)]
7954#[derive(Copy, Clone, Eq, PartialEq)]
7955pub struct Htst_SPEC;
7956impl crate::sealed::RegSpec for Htst_SPEC {
7957 type DataType = u32;
7958}
7959
7960#[doc = "High Priority Transfer Status Register"]
7961pub type Htst = crate::RegValueT<Htst_SPEC>;
7962
7963impl Htst {
7964 #[doc = "High Priority Transmit Data Buffer Empty Flag"]
7965 #[inline(always)]
7966 pub fn tdbef(
7967 self,
7968 ) -> crate::common::RegisterField<
7969 0,
7970 0x1,
7971 1,
7972 0,
7973 htst::Tdbef,
7974 htst::Tdbef,
7975 Htst_SPEC,
7976 crate::common::RW,
7977 > {
7978 crate::common::RegisterField::<
7979 0,
7980 0x1,
7981 1,
7982 0,
7983 htst::Tdbef,
7984 htst::Tdbef,
7985 Htst_SPEC,
7986 crate::common::RW,
7987 >::from_register(self, 0)
7988 }
7989
7990 #[doc = "High Priority Receive Data Buffer Full Flag"]
7991 #[inline(always)]
7992 pub fn rdbff(
7993 self,
7994 ) -> crate::common::RegisterField<
7995 1,
7996 0x1,
7997 1,
7998 0,
7999 htst::Rdbff,
8000 htst::Rdbff,
8001 Htst_SPEC,
8002 crate::common::RW,
8003 > {
8004 crate::common::RegisterField::<
8005 1,
8006 0x1,
8007 1,
8008 0,
8009 htst::Rdbff,
8010 htst::Rdbff,
8011 Htst_SPEC,
8012 crate::common::RW,
8013 >::from_register(self, 0)
8014 }
8015
8016 #[doc = "High Priority Command Queue Empty Flag"]
8017 #[inline(always)]
8018 pub fn cmdqef(
8019 self,
8020 ) -> crate::common::RegisterField<
8021 3,
8022 0x1,
8023 1,
8024 0,
8025 htst::Cmdqef,
8026 htst::Cmdqef,
8027 Htst_SPEC,
8028 crate::common::RW,
8029 > {
8030 crate::common::RegisterField::<
8031 3,
8032 0x1,
8033 1,
8034 0,
8035 htst::Cmdqef,
8036 htst::Cmdqef,
8037 Htst_SPEC,
8038 crate::common::RW,
8039 >::from_register(self, 0)
8040 }
8041
8042 #[doc = "High Priority Response Queue Full Flag"]
8043 #[inline(always)]
8044 pub fn rspqff(
8045 self,
8046 ) -> crate::common::RegisterField<
8047 4,
8048 0x1,
8049 1,
8050 0,
8051 htst::Rspqff,
8052 htst::Rspqff,
8053 Htst_SPEC,
8054 crate::common::RW,
8055 > {
8056 crate::common::RegisterField::<
8057 4,
8058 0x1,
8059 1,
8060 0,
8061 htst::Rspqff,
8062 htst::Rspqff,
8063 Htst_SPEC,
8064 crate::common::RW,
8065 >::from_register(self, 0)
8066 }
8067
8068 #[doc = "High Priority Transfer Abort Flag"]
8069 #[inline(always)]
8070 pub fn tabtf(
8071 self,
8072 ) -> crate::common::RegisterField<
8073 5,
8074 0x1,
8075 1,
8076 0,
8077 htst::Tabtf,
8078 htst::Tabtf,
8079 Htst_SPEC,
8080 crate::common::RW,
8081 > {
8082 crate::common::RegisterField::<
8083 5,
8084 0x1,
8085 1,
8086 0,
8087 htst::Tabtf,
8088 htst::Tabtf,
8089 Htst_SPEC,
8090 crate::common::RW,
8091 >::from_register(self, 0)
8092 }
8093
8094 #[doc = "High Priority Transfer Error Flag"]
8095 #[inline(always)]
8096 pub fn tef(
8097 self,
8098 ) -> crate::common::RegisterField<
8099 9,
8100 0x1,
8101 1,
8102 0,
8103 htst::Tef,
8104 htst::Tef,
8105 Htst_SPEC,
8106 crate::common::RW,
8107 > {
8108 crate::common::RegisterField::<
8109 9,
8110 0x1,
8111 1,
8112 0,
8113 htst::Tef,
8114 htst::Tef,
8115 Htst_SPEC,
8116 crate::common::RW,
8117 >::from_register(self, 0)
8118 }
8119}
8120impl ::core::default::Default for Htst {
8121 #[inline(always)]
8122 fn default() -> Htst {
8123 <crate::RegValueT<Htst_SPEC> as RegisterValue<_>>::new(0)
8124 }
8125}
8126pub mod htst {
8127
8128 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8129 pub struct Tdbef_SPEC;
8130 pub type Tdbef = crate::EnumBitfieldStruct<u8, Tdbef_SPEC>;
8131 impl Tdbef {
8132 #[doc = "The number of empties in the High Priority Transmit Data Buffer is less than the HTBTHCTL.TXDBTH\\[2:0\\] threshold."]
8133 pub const _0: Self = Self::new(0);
8134
8135 #[doc = "The number of empties in the High Priority Transmit Data Buffer is the HTBTHCTL.TXDBTH\\[2:0\\] threshold or more."]
8136 pub const _1: Self = Self::new(1);
8137 }
8138 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8139 pub struct Rdbff_SPEC;
8140 pub type Rdbff = crate::EnumBitfieldStruct<u8, Rdbff_SPEC>;
8141 impl Rdbff {
8142 #[doc = "The number of entries in the High Priority Receive Data Buffer is less than the HTBTHCTL.RXDBTH\\[2:0\\] threshold."]
8143 pub const _0: Self = Self::new(0);
8144
8145 #[doc = "The number of entries in the High Priority Receive Data Buffer is the HTBTHCTL.RXDBTH\\[2:0\\] threshold or more."]
8146 pub const _1: Self = Self::new(1);
8147 }
8148 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8149 pub struct Cmdqef_SPEC;
8150 pub type Cmdqef = crate::EnumBitfieldStruct<u8, Cmdqef_SPEC>;
8151 impl Cmdqef {
8152 #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is less than the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is less than the HQTHCTL.CMDQTH threshold."]
8153 pub const _0: Self = Self::new(0);
8154
8155 #[doc = "If HQTHCTL.CMDQTH is 0, the number of Command Queue empties is the Command Queue size. If HQTHCTL.CMDQTH is other than 0, the number of High Priority Command Queue empties is the HQTHCTL.CMDQTH threshold or more."]
8156 pub const _1: Self = Self::new(1);
8157 }
8158 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8159 pub struct Rspqff_SPEC;
8160 pub type Rspqff = crate::EnumBitfieldStruct<u8, Rspqff_SPEC>;
8161 impl Rspqff {
8162 #[doc = "The number of High Priority Response Queue entries is less than the HQTHCTL .RSPQTH threshold."]
8163 pub const _0: Self = Self::new(0);
8164
8165 #[doc = "The number of High Priority Response Queue entries is the HQTHCTL .RSPQTH threshold or more."]
8166 pub const _1: Self = Self::new(1);
8167 }
8168 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8169 pub struct Tabtf_SPEC;
8170 pub type Tabtf = crate::EnumBitfieldStruct<u8, Tabtf_SPEC>;
8171 impl Tabtf {
8172 #[doc = "High Priority Transfer Abort does not occur."]
8173 pub const _0: Self = Self::new(0);
8174
8175 #[doc = "High Priority Transfer Abort occurs. To clear, write 0 to this bit after 1 is read."]
8176 pub const _1: Self = Self::new(1);
8177 }
8178 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8179 pub struct Tef_SPEC;
8180 pub type Tef = crate::EnumBitfieldStruct<u8, Tef_SPEC>;
8181 impl Tef {
8182 #[doc = "High Priority Transfer Error does not occur."]
8183 pub const _0: Self = Self::new(0);
8184
8185 #[doc = "High Priority Transfer Error occurs. To clear, write 0 to this bit after 1 is read."]
8186 pub const _1: Self = Self::new(1);
8187 }
8188}
8189#[doc(hidden)]
8190#[derive(Copy, Clone, Eq, PartialEq)]
8191pub struct Htste_SPEC;
8192impl crate::sealed::RegSpec for Htste_SPEC {
8193 type DataType = u32;
8194}
8195
8196#[doc = "High Priority Transfer Status Enable Register"]
8197pub type Htste = crate::RegValueT<Htste_SPEC>;
8198
8199impl Htste {
8200 #[doc = "High Priority Transmit Data Buffer Empty Enable"]
8201 #[inline(always)]
8202 pub fn tdbee(
8203 self,
8204 ) -> crate::common::RegisterField<
8205 0,
8206 0x1,
8207 1,
8208 0,
8209 htste::Tdbee,
8210 htste::Tdbee,
8211 Htste_SPEC,
8212 crate::common::RW,
8213 > {
8214 crate::common::RegisterField::<
8215 0,
8216 0x1,
8217 1,
8218 0,
8219 htste::Tdbee,
8220 htste::Tdbee,
8221 Htste_SPEC,
8222 crate::common::RW,
8223 >::from_register(self, 0)
8224 }
8225
8226 #[doc = "High Priority Receive Data Buffer Full Enable"]
8227 #[inline(always)]
8228 pub fn rdbfe(
8229 self,
8230 ) -> crate::common::RegisterField<
8231 1,
8232 0x1,
8233 1,
8234 0,
8235 htste::Rdbfe,
8236 htste::Rdbfe,
8237 Htste_SPEC,
8238 crate::common::RW,
8239 > {
8240 crate::common::RegisterField::<
8241 1,
8242 0x1,
8243 1,
8244 0,
8245 htste::Rdbfe,
8246 htste::Rdbfe,
8247 Htste_SPEC,
8248 crate::common::RW,
8249 >::from_register(self, 0)
8250 }
8251
8252 #[doc = "High Priority Command Queue Empty Enable"]
8253 #[inline(always)]
8254 pub fn cmdqee(
8255 self,
8256 ) -> crate::common::RegisterField<
8257 3,
8258 0x1,
8259 1,
8260 0,
8261 htste::Cmdqee,
8262 htste::Cmdqee,
8263 Htste_SPEC,
8264 crate::common::RW,
8265 > {
8266 crate::common::RegisterField::<
8267 3,
8268 0x1,
8269 1,
8270 0,
8271 htste::Cmdqee,
8272 htste::Cmdqee,
8273 Htste_SPEC,
8274 crate::common::RW,
8275 >::from_register(self, 0)
8276 }
8277
8278 #[doc = "High Priority Response Queue Full Enable"]
8279 #[inline(always)]
8280 pub fn rspqfe(
8281 self,
8282 ) -> crate::common::RegisterField<
8283 4,
8284 0x1,
8285 1,
8286 0,
8287 htste::Rspqfe,
8288 htste::Rspqfe,
8289 Htste_SPEC,
8290 crate::common::RW,
8291 > {
8292 crate::common::RegisterField::<
8293 4,
8294 0x1,
8295 1,
8296 0,
8297 htste::Rspqfe,
8298 htste::Rspqfe,
8299 Htste_SPEC,
8300 crate::common::RW,
8301 >::from_register(self, 0)
8302 }
8303
8304 #[doc = "High Priority Transfer Abort Enable"]
8305 #[inline(always)]
8306 pub fn tabte(
8307 self,
8308 ) -> crate::common::RegisterField<
8309 5,
8310 0x1,
8311 1,
8312 0,
8313 htste::Tabte,
8314 htste::Tabte,
8315 Htste_SPEC,
8316 crate::common::RW,
8317 > {
8318 crate::common::RegisterField::<
8319 5,
8320 0x1,
8321 1,
8322 0,
8323 htste::Tabte,
8324 htste::Tabte,
8325 Htste_SPEC,
8326 crate::common::RW,
8327 >::from_register(self, 0)
8328 }
8329
8330 #[doc = "High Priority Transfer Error Enable"]
8331 #[inline(always)]
8332 pub fn tee(
8333 self,
8334 ) -> crate::common::RegisterField<
8335 9,
8336 0x1,
8337 1,
8338 0,
8339 htste::Tee,
8340 htste::Tee,
8341 Htste_SPEC,
8342 crate::common::RW,
8343 > {
8344 crate::common::RegisterField::<
8345 9,
8346 0x1,
8347 1,
8348 0,
8349 htste::Tee,
8350 htste::Tee,
8351 Htste_SPEC,
8352 crate::common::RW,
8353 >::from_register(self, 0)
8354 }
8355}
8356impl ::core::default::Default for Htste {
8357 #[inline(always)]
8358 fn default() -> Htste {
8359 <crate::RegValueT<Htste_SPEC> as RegisterValue<_>>::new(0)
8360 }
8361}
8362pub mod htste {
8363
8364 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8365 pub struct Tdbee_SPEC;
8366 pub type Tdbee = crate::EnumBitfieldStruct<u8, Tdbee_SPEC>;
8367 impl Tdbee {
8368 #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
8369 pub const _0: Self = Self::new(0);
8370
8371 #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Status logging."]
8372 pub const _1: Self = Self::new(1);
8373 }
8374 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8375 pub struct Rdbfe_SPEC;
8376 pub type Rdbfe = crate::EnumBitfieldStruct<u8, Rdbfe_SPEC>;
8377 impl Rdbfe {
8378 #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Status logging."]
8379 pub const _0: Self = Self::new(0);
8380
8381 #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Status logging."]
8382 pub const _1: Self = Self::new(1);
8383 }
8384 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8385 pub struct Cmdqee_SPEC;
8386 pub type Cmdqee = crate::EnumBitfieldStruct<u8, Cmdqee_SPEC>;
8387 impl Cmdqee {
8388 #[doc = "Disables High Priority Command Buffer Empty Interrupt Status logging."]
8389 pub const _0: Self = Self::new(0);
8390
8391 #[doc = "Enables High Priority Command Buffer Empty Interrupt Status logging."]
8392 pub const _1: Self = Self::new(1);
8393 }
8394 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8395 pub struct Rspqfe_SPEC;
8396 pub type Rspqfe = crate::EnumBitfieldStruct<u8, Rspqfe_SPEC>;
8397 impl Rspqfe {
8398 #[doc = "Disables High Priority Response Buffer Full Interrupt Status logging."]
8399 pub const _0: Self = Self::new(0);
8400
8401 #[doc = "Enables High Priority Response Buffer Full Interrupt Status logging."]
8402 pub const _1: Self = Self::new(1);
8403 }
8404 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8405 pub struct Tabte_SPEC;
8406 pub type Tabte = crate::EnumBitfieldStruct<u8, Tabte_SPEC>;
8407 impl Tabte {
8408 #[doc = "Disables High PriorityTransfer Abort Interrupt Status logging."]
8409 pub const _0: Self = Self::new(0);
8410
8411 #[doc = "Enables High Priority Transfer Abort Interrupt Status logging."]
8412 pub const _1: Self = Self::new(1);
8413 }
8414 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8415 pub struct Tee_SPEC;
8416 pub type Tee = crate::EnumBitfieldStruct<u8, Tee_SPEC>;
8417 impl Tee {
8418 #[doc = "Disables High Priority Transfer Error interrupt Stats logging."]
8419 pub const _0: Self = Self::new(0);
8420
8421 #[doc = "Enables High Priority Transfer Error interrupt Stats logging."]
8422 pub const _1: Self = Self::new(1);
8423 }
8424}
8425#[doc(hidden)]
8426#[derive(Copy, Clone, Eq, PartialEq)]
8427pub struct Htie_SPEC;
8428impl crate::sealed::RegSpec for Htie_SPEC {
8429 type DataType = u32;
8430}
8431
8432#[doc = "High Priority Transfer Interrupt Enable Register"]
8433pub type Htie = crate::RegValueT<Htie_SPEC>;
8434
8435impl Htie {
8436 #[doc = "High Priority Transmit Data Buffer Empty Interrupt Enable"]
8437 #[inline(always)]
8438 pub fn tdbeie(
8439 self,
8440 ) -> crate::common::RegisterField<
8441 0,
8442 0x1,
8443 1,
8444 0,
8445 htie::Tdbeie,
8446 htie::Tdbeie,
8447 Htie_SPEC,
8448 crate::common::RW,
8449 > {
8450 crate::common::RegisterField::<
8451 0,
8452 0x1,
8453 1,
8454 0,
8455 htie::Tdbeie,
8456 htie::Tdbeie,
8457 Htie_SPEC,
8458 crate::common::RW,
8459 >::from_register(self, 0)
8460 }
8461
8462 #[doc = "High Priority Receive Data Buffer Full Interrupt Enable"]
8463 #[inline(always)]
8464 pub fn rdbfie(
8465 self,
8466 ) -> crate::common::RegisterField<
8467 1,
8468 0x1,
8469 1,
8470 0,
8471 htie::Rdbfie,
8472 htie::Rdbfie,
8473 Htie_SPEC,
8474 crate::common::RW,
8475 > {
8476 crate::common::RegisterField::<
8477 1,
8478 0x1,
8479 1,
8480 0,
8481 htie::Rdbfie,
8482 htie::Rdbfie,
8483 Htie_SPEC,
8484 crate::common::RW,
8485 >::from_register(self, 0)
8486 }
8487
8488 #[doc = "High Priority Command Queue Empty Interrupt Enable"]
8489 #[inline(always)]
8490 pub fn cmdqeie(
8491 self,
8492 ) -> crate::common::RegisterField<
8493 3,
8494 0x1,
8495 1,
8496 0,
8497 htie::Cmdqeie,
8498 htie::Cmdqeie,
8499 Htie_SPEC,
8500 crate::common::RW,
8501 > {
8502 crate::common::RegisterField::<
8503 3,
8504 0x1,
8505 1,
8506 0,
8507 htie::Cmdqeie,
8508 htie::Cmdqeie,
8509 Htie_SPEC,
8510 crate::common::RW,
8511 >::from_register(self, 0)
8512 }
8513
8514 #[doc = "High Priority Response Queue Full Interrupt Enable"]
8515 #[inline(always)]
8516 pub fn rspqfie(
8517 self,
8518 ) -> crate::common::RegisterField<
8519 4,
8520 0x1,
8521 1,
8522 0,
8523 htie::Rspqfie,
8524 htie::Rspqfie,
8525 Htie_SPEC,
8526 crate::common::RW,
8527 > {
8528 crate::common::RegisterField::<
8529 4,
8530 0x1,
8531 1,
8532 0,
8533 htie::Rspqfie,
8534 htie::Rspqfie,
8535 Htie_SPEC,
8536 crate::common::RW,
8537 >::from_register(self, 0)
8538 }
8539
8540 #[doc = "High Priority Transfer Abort Interrupt Enable"]
8541 #[inline(always)]
8542 pub fn tabtie(
8543 self,
8544 ) -> crate::common::RegisterField<
8545 5,
8546 0x1,
8547 1,
8548 0,
8549 htie::Tabtie,
8550 htie::Tabtie,
8551 Htie_SPEC,
8552 crate::common::RW,
8553 > {
8554 crate::common::RegisterField::<
8555 5,
8556 0x1,
8557 1,
8558 0,
8559 htie::Tabtie,
8560 htie::Tabtie,
8561 Htie_SPEC,
8562 crate::common::RW,
8563 >::from_register(self, 0)
8564 }
8565
8566 #[doc = "High Priority Transfer Error Interrupt Enable"]
8567 #[inline(always)]
8568 pub fn teie(
8569 self,
8570 ) -> crate::common::RegisterField<
8571 9,
8572 0x1,
8573 1,
8574 0,
8575 htie::Teie,
8576 htie::Teie,
8577 Htie_SPEC,
8578 crate::common::RW,
8579 > {
8580 crate::common::RegisterField::<
8581 9,
8582 0x1,
8583 1,
8584 0,
8585 htie::Teie,
8586 htie::Teie,
8587 Htie_SPEC,
8588 crate::common::RW,
8589 >::from_register(self, 0)
8590 }
8591}
8592impl ::core::default::Default for Htie {
8593 #[inline(always)]
8594 fn default() -> Htie {
8595 <crate::RegValueT<Htie_SPEC> as RegisterValue<_>>::new(0)
8596 }
8597}
8598pub mod htie {
8599
8600 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8601 pub struct Tdbeie_SPEC;
8602 pub type Tdbeie = crate::EnumBitfieldStruct<u8, Tdbeie_SPEC>;
8603 impl Tdbeie {
8604 #[doc = "Disables High Priority Transmit Data Buffer Empty Interrupt Signal."]
8605 pub const _0: Self = Self::new(0);
8606
8607 #[doc = "Enables High Priority Transmit Data Buffer Empty Interrupt Signal."]
8608 pub const _1: Self = Self::new(1);
8609 }
8610 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8611 pub struct Rdbfie_SPEC;
8612 pub type Rdbfie = crate::EnumBitfieldStruct<u8, Rdbfie_SPEC>;
8613 impl Rdbfie {
8614 #[doc = "Disables High Priority Receive Data Buffer Full Interrupt Signal."]
8615 pub const _0: Self = Self::new(0);
8616
8617 #[doc = "Enables High Priority Receive Data Buffer Full Interrupt Signal."]
8618 pub const _1: Self = Self::new(1);
8619 }
8620 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8621 pub struct Cmdqeie_SPEC;
8622 pub type Cmdqeie = crate::EnumBitfieldStruct<u8, Cmdqeie_SPEC>;
8623 impl Cmdqeie {
8624 #[doc = "Disables High Priority Command Buffer Empty Interrupt Signal."]
8625 pub const _0: Self = Self::new(0);
8626
8627 #[doc = "Enables High Priority Command Buffer Empty Interrupt Signal."]
8628 pub const _1: Self = Self::new(1);
8629 }
8630 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8631 pub struct Rspqfie_SPEC;
8632 pub type Rspqfie = crate::EnumBitfieldStruct<u8, Rspqfie_SPEC>;
8633 impl Rspqfie {
8634 #[doc = "Disables High Priority Response Buffer Full Interrupt Signal."]
8635 pub const _0: Self = Self::new(0);
8636
8637 #[doc = "Enables High Priority Response Buffer Full Interrupt Signal."]
8638 pub const _1: Self = Self::new(1);
8639 }
8640 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8641 pub struct Tabtie_SPEC;
8642 pub type Tabtie = crate::EnumBitfieldStruct<u8, Tabtie_SPEC>;
8643 impl Tabtie {
8644 #[doc = "Disables High Priority Transfer Abort interrupt Signal."]
8645 pub const _0: Self = Self::new(0);
8646
8647 #[doc = "Enables High Priority Transfer Abort interrupt Signal."]
8648 pub const _1: Self = Self::new(1);
8649 }
8650 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8651 pub struct Teie_SPEC;
8652 pub type Teie = crate::EnumBitfieldStruct<u8, Teie_SPEC>;
8653 impl Teie {
8654 #[doc = "Disables High Priority Transfer Error Interrupt Signal."]
8655 pub const _0: Self = Self::new(0);
8656
8657 #[doc = "Enables High Priority Transfer Error Interrupt Signal."]
8658 pub const _1: Self = Self::new(1);
8659 }
8660}
8661#[doc(hidden)]
8662#[derive(Copy, Clone, Eq, PartialEq)]
8663pub struct Htstfc_SPEC;
8664impl crate::sealed::RegSpec for Htstfc_SPEC {
8665 type DataType = u32;
8666}
8667
8668#[doc = "High Priority Transfer Status Force Register"]
8669pub type Htstfc = crate::RegValueT<Htstfc_SPEC>;
8670
8671impl Htstfc {
8672 #[doc = "High Priority Transmit Data Buffer Empty Force"]
8673 #[inline(always)]
8674 pub fn tdbefc(
8675 self,
8676 ) -> crate::common::RegisterField<
8677 0,
8678 0x1,
8679 1,
8680 0,
8681 htstfc::Tdbefc,
8682 htstfc::Tdbefc,
8683 Htstfc_SPEC,
8684 crate::common::W,
8685 > {
8686 crate::common::RegisterField::<
8687 0,
8688 0x1,
8689 1,
8690 0,
8691 htstfc::Tdbefc,
8692 htstfc::Tdbefc,
8693 Htstfc_SPEC,
8694 crate::common::W,
8695 >::from_register(self, 0)
8696 }
8697
8698 #[doc = "High Priority Receive Data Buffer Full Force"]
8699 #[inline(always)]
8700 pub fn rdbffc(
8701 self,
8702 ) -> crate::common::RegisterField<
8703 1,
8704 0x1,
8705 1,
8706 0,
8707 htstfc::Rdbffc,
8708 htstfc::Rdbffc,
8709 Htstfc_SPEC,
8710 crate::common::W,
8711 > {
8712 crate::common::RegisterField::<
8713 1,
8714 0x1,
8715 1,
8716 0,
8717 htstfc::Rdbffc,
8718 htstfc::Rdbffc,
8719 Htstfc_SPEC,
8720 crate::common::W,
8721 >::from_register(self, 0)
8722 }
8723
8724 #[doc = "High Priority Command Queue Empty Force"]
8725 #[inline(always)]
8726 pub fn cmdqefc(
8727 self,
8728 ) -> crate::common::RegisterField<
8729 3,
8730 0x1,
8731 1,
8732 0,
8733 htstfc::Cmdqefc,
8734 htstfc::Cmdqefc,
8735 Htstfc_SPEC,
8736 crate::common::W,
8737 > {
8738 crate::common::RegisterField::<
8739 3,
8740 0x1,
8741 1,
8742 0,
8743 htstfc::Cmdqefc,
8744 htstfc::Cmdqefc,
8745 Htstfc_SPEC,
8746 crate::common::W,
8747 >::from_register(self, 0)
8748 }
8749
8750 #[doc = "High Priority Response Queue Full Force"]
8751 #[inline(always)]
8752 pub fn rspqffc(
8753 self,
8754 ) -> crate::common::RegisterField<
8755 4,
8756 0x1,
8757 1,
8758 0,
8759 htstfc::Rspqffc,
8760 htstfc::Rspqffc,
8761 Htstfc_SPEC,
8762 crate::common::W,
8763 > {
8764 crate::common::RegisterField::<
8765 4,
8766 0x1,
8767 1,
8768 0,
8769 htstfc::Rspqffc,
8770 htstfc::Rspqffc,
8771 Htstfc_SPEC,
8772 crate::common::W,
8773 >::from_register(self, 0)
8774 }
8775
8776 #[doc = "High Priority Transfer Abort Force"]
8777 #[inline(always)]
8778 pub fn tabtfc(
8779 self,
8780 ) -> crate::common::RegisterField<
8781 5,
8782 0x1,
8783 1,
8784 0,
8785 htstfc::Tabtfc,
8786 htstfc::Tabtfc,
8787 Htstfc_SPEC,
8788 crate::common::W,
8789 > {
8790 crate::common::RegisterField::<
8791 5,
8792 0x1,
8793 1,
8794 0,
8795 htstfc::Tabtfc,
8796 htstfc::Tabtfc,
8797 Htstfc_SPEC,
8798 crate::common::W,
8799 >::from_register(self, 0)
8800 }
8801
8802 #[doc = "High Priority Transfer Error Force"]
8803 #[inline(always)]
8804 pub fn tefc(
8805 self,
8806 ) -> crate::common::RegisterField<
8807 9,
8808 0x1,
8809 1,
8810 0,
8811 htstfc::Tefc,
8812 htstfc::Tefc,
8813 Htstfc_SPEC,
8814 crate::common::W,
8815 > {
8816 crate::common::RegisterField::<
8817 9,
8818 0x1,
8819 1,
8820 0,
8821 htstfc::Tefc,
8822 htstfc::Tefc,
8823 Htstfc_SPEC,
8824 crate::common::W,
8825 >::from_register(self, 0)
8826 }
8827}
8828impl ::core::default::Default for Htstfc {
8829 #[inline(always)]
8830 fn default() -> Htstfc {
8831 <crate::RegValueT<Htstfc_SPEC> as RegisterValue<_>>::new(0)
8832 }
8833}
8834pub mod htstfc {
8835
8836 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8837 pub struct Tdbefc_SPEC;
8838 pub type Tdbefc = crate::EnumBitfieldStruct<u8, Tdbefc_SPEC>;
8839 impl Tdbefc {
8840 #[doc = "Not Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
8841 pub const _0: Self = Self::new(0);
8842
8843 #[doc = "Force High Priority Transmit Data Buffer Empty Interrupt for software testing."]
8844 pub const _1: Self = Self::new(1);
8845 }
8846 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8847 pub struct Rdbffc_SPEC;
8848 pub type Rdbffc = crate::EnumBitfieldStruct<u8, Rdbffc_SPEC>;
8849 impl Rdbffc {
8850 #[doc = "Not Force High Priority Receive Data Buffer Full Interrupt for software testing."]
8851 pub const _0: Self = Self::new(0);
8852
8853 #[doc = "Force High Priority Receive Data Buffer Full Interrupt for software testing."]
8854 pub const _1: Self = Self::new(1);
8855 }
8856 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8857 pub struct Cmdqefc_SPEC;
8858 pub type Cmdqefc = crate::EnumBitfieldStruct<u8, Cmdqefc_SPEC>;
8859 impl Cmdqefc {
8860 #[doc = "Not Force High Priority Command Buffer Empty Interrupt for software testing."]
8861 pub const _0: Self = Self::new(0);
8862
8863 #[doc = "Force High Priority Command Buffer Empty Interrupt for software testing."]
8864 pub const _1: Self = Self::new(1);
8865 }
8866 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8867 pub struct Rspqffc_SPEC;
8868 pub type Rspqffc = crate::EnumBitfieldStruct<u8, Rspqffc_SPEC>;
8869 impl Rspqffc {
8870 #[doc = "Not Force High Priority Response Buffer Full Interrupt for software testing."]
8871 pub const _0: Self = Self::new(0);
8872
8873 #[doc = "Force High Priority Response Buffer Full Interrupt for software testing."]
8874 pub const _1: Self = Self::new(1);
8875 }
8876 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8877 pub struct Tabtfc_SPEC;
8878 pub type Tabtfc = crate::EnumBitfieldStruct<u8, Tabtfc_SPEC>;
8879 impl Tabtfc {
8880 #[doc = "Not Force High Priority Transfer Abort Interrupt for software testing."]
8881 pub const _0: Self = Self::new(0);
8882
8883 #[doc = "Force High Priority Transfer Abort Interrupt for software testing."]
8884 pub const _1: Self = Self::new(1);
8885 }
8886 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8887 pub struct Tefc_SPEC;
8888 pub type Tefc = crate::EnumBitfieldStruct<u8, Tefc_SPEC>;
8889 impl Tefc {
8890 #[doc = "Not Force High Priority Transfer Error Interrupt for software testing."]
8891 pub const _0: Self = Self::new(0);
8892
8893 #[doc = "Force High Priority Transfer Error Interrupt for software testing."]
8894 pub const _1: Self = Self::new(1);
8895 }
8896}
8897#[doc(hidden)]
8898#[derive(Copy, Clone, Eq, PartialEq)]
8899pub struct Bcst_SPEC;
8900impl crate::sealed::RegSpec for Bcst_SPEC {
8901 type DataType = u32;
8902}
8903
8904#[doc = "Bus Condition Status Register"]
8905pub type Bcst = crate::RegValueT<Bcst_SPEC>;
8906
8907impl Bcst {
8908 #[doc = "Bus Free Detection Flag"]
8909 #[inline(always)]
8910 pub fn bfref(
8911 self,
8912 ) -> crate::common::RegisterField<
8913 0,
8914 0x1,
8915 1,
8916 0,
8917 bcst::Bfref,
8918 bcst::Bfref,
8919 Bcst_SPEC,
8920 crate::common::R,
8921 > {
8922 crate::common::RegisterField::<
8923 0,
8924 0x1,
8925 1,
8926 0,
8927 bcst::Bfref,
8928 bcst::Bfref,
8929 Bcst_SPEC,
8930 crate::common::R,
8931 >::from_register(self, 0)
8932 }
8933
8934 #[doc = "Bus Available Detection Flag"]
8935 #[inline(always)]
8936 pub fn bavlf(
8937 self,
8938 ) -> crate::common::RegisterField<
8939 1,
8940 0x1,
8941 1,
8942 0,
8943 bcst::Bavlf,
8944 bcst::Bavlf,
8945 Bcst_SPEC,
8946 crate::common::R,
8947 > {
8948 crate::common::RegisterField::<
8949 1,
8950 0x1,
8951 1,
8952 0,
8953 bcst::Bavlf,
8954 bcst::Bavlf,
8955 Bcst_SPEC,
8956 crate::common::R,
8957 >::from_register(self, 0)
8958 }
8959
8960 #[doc = "Bus Idle Detection Flag"]
8961 #[inline(always)]
8962 pub fn bidlf(
8963 self,
8964 ) -> crate::common::RegisterField<
8965 2,
8966 0x1,
8967 1,
8968 0,
8969 bcst::Bidlf,
8970 bcst::Bidlf,
8971 Bcst_SPEC,
8972 crate::common::R,
8973 > {
8974 crate::common::RegisterField::<
8975 2,
8976 0x1,
8977 1,
8978 0,
8979 bcst::Bidlf,
8980 bcst::Bidlf,
8981 Bcst_SPEC,
8982 crate::common::R,
8983 >::from_register(self, 0)
8984 }
8985}
8986impl ::core::default::Default for Bcst {
8987 #[inline(always)]
8988 fn default() -> Bcst {
8989 <crate::RegValueT<Bcst_SPEC> as RegisterValue<_>>::new(0)
8990 }
8991}
8992pub mod bcst {
8993
8994 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8995 pub struct Bfref_SPEC;
8996 pub type Bfref = crate::EnumBitfieldStruct<u8, Bfref_SPEC>;
8997 impl Bfref {
8998 #[doc = "Have not Detected Bus Free"]
8999 pub const _0: Self = Self::new(0);
9000
9001 #[doc = "Have Detected Bus Free"]
9002 pub const _1: Self = Self::new(1);
9003 }
9004 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9005 pub struct Bavlf_SPEC;
9006 pub type Bavlf = crate::EnumBitfieldStruct<u8, Bavlf_SPEC>;
9007 impl Bavlf {
9008 #[doc = "Have not Detected Bus Available"]
9009 pub const _0: Self = Self::new(0);
9010
9011 #[doc = "Have Detected Bus Available"]
9012 pub const _1: Self = Self::new(1);
9013 }
9014 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9015 pub struct Bidlf_SPEC;
9016 pub type Bidlf = crate::EnumBitfieldStruct<u8, Bidlf_SPEC>;
9017 impl Bidlf {
9018 #[doc = "Have not Detected Bus Idle"]
9019 pub const _0: Self = Self::new(0);
9020
9021 #[doc = "Have Detected Bus Idle"]
9022 pub const _1: Self = Self::new(1);
9023 }
9024}
9025#[doc(hidden)]
9026#[derive(Copy, Clone, Eq, PartialEq)]
9027pub struct Svst_SPEC;
9028impl crate::sealed::RegSpec for Svst_SPEC {
9029 type DataType = u32;
9030}
9031
9032#[doc = "Slave Status Register"]
9033pub type Svst = crate::RegValueT<Svst_SPEC>;
9034
9035impl Svst {
9036 #[doc = "General Call Address Detection Flag"]
9037 #[inline(always)]
9038 pub fn gcaf(
9039 self,
9040 ) -> crate::common::RegisterField<
9041 0,
9042 0x1,
9043 1,
9044 0,
9045 svst::Gcaf,
9046 svst::Gcaf,
9047 Svst_SPEC,
9048 crate::common::RW,
9049 > {
9050 crate::common::RegisterField::<
9051 0,
9052 0x1,
9053 1,
9054 0,
9055 svst::Gcaf,
9056 svst::Gcaf,
9057 Svst_SPEC,
9058 crate::common::RW,
9059 >::from_register(self, 0)
9060 }
9061
9062 #[doc = "Hs-mode Master Code Detection Flag"]
9063 #[inline(always)]
9064 pub fn hsmcf(
9065 self,
9066 ) -> crate::common::RegisterField<
9067 5,
9068 0x1,
9069 1,
9070 0,
9071 svst::Hsmcf,
9072 svst::Hsmcf,
9073 Svst_SPEC,
9074 crate::common::RW,
9075 > {
9076 crate::common::RegisterField::<
9077 5,
9078 0x1,
9079 1,
9080 0,
9081 svst::Hsmcf,
9082 svst::Hsmcf,
9083 Svst_SPEC,
9084 crate::common::RW,
9085 >::from_register(self, 0)
9086 }
9087
9088 #[doc = "Device-ID Address Detection Flag"]
9089 #[inline(always)]
9090 pub fn dvidf(
9091 self,
9092 ) -> crate::common::RegisterField<
9093 6,
9094 0x1,
9095 1,
9096 0,
9097 svst::Dvidf,
9098 svst::Dvidf,
9099 Svst_SPEC,
9100 crate::common::RW,
9101 > {
9102 crate::common::RegisterField::<
9103 6,
9104 0x1,
9105 1,
9106 0,
9107 svst::Dvidf,
9108 svst::Dvidf,
9109 Svst_SPEC,
9110 crate::common::RW,
9111 >::from_register(self, 0)
9112 }
9113
9114 #[doc = "Host Address Detection Flag"]
9115 #[inline(always)]
9116 pub fn hoaf(
9117 self,
9118 ) -> crate::common::RegisterField<
9119 15,
9120 0x1,
9121 1,
9122 0,
9123 svst::Hoaf,
9124 svst::Hoaf,
9125 Svst_SPEC,
9126 crate::common::RW,
9127 > {
9128 crate::common::RegisterField::<
9129 15,
9130 0x1,
9131 1,
9132 0,
9133 svst::Hoaf,
9134 svst::Hoaf,
9135 Svst_SPEC,
9136 crate::common::RW,
9137 >::from_register(self, 0)
9138 }
9139
9140 #[doc = "Slave Address Detection Flag n ( n = 0 to 2 )"]
9141 #[inline(always)]
9142 pub fn svaf(
9143 self,
9144 ) -> crate::common::RegisterField<
9145 16,
9146 0x7,
9147 1,
9148 0,
9149 svst::Svaf,
9150 svst::Svaf,
9151 Svst_SPEC,
9152 crate::common::RW,
9153 > {
9154 crate::common::RegisterField::<
9155 16,
9156 0x7,
9157 1,
9158 0,
9159 svst::Svaf,
9160 svst::Svaf,
9161 Svst_SPEC,
9162 crate::common::RW,
9163 >::from_register(self, 0)
9164 }
9165}
9166impl ::core::default::Default for Svst {
9167 #[inline(always)]
9168 fn default() -> Svst {
9169 <crate::RegValueT<Svst_SPEC> as RegisterValue<_>>::new(0)
9170 }
9171}
9172pub mod svst {
9173
9174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9175 pub struct Gcaf_SPEC;
9176 pub type Gcaf = crate::EnumBitfieldStruct<u8, Gcaf_SPEC>;
9177 impl Gcaf {
9178 #[doc = "General call address does not detect."]
9179 pub const _0: Self = Self::new(0);
9180
9181 #[doc = "General call address detects."]
9182 pub const _1: Self = Self::new(1);
9183 }
9184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9185 pub struct Hsmcf_SPEC;
9186 pub type Hsmcf = crate::EnumBitfieldStruct<u8, Hsmcf_SPEC>;
9187 impl Hsmcf {
9188 #[doc = "Hs-mode Master Code does not detect."]
9189 pub const _0: Self = Self::new(0);
9190
9191 #[doc = "Hs-mode Master Code detects."]
9192 pub const _1: Self = Self::new(1);
9193 }
9194 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9195 pub struct Dvidf_SPEC;
9196 pub type Dvidf = crate::EnumBitfieldStruct<u8, Dvidf_SPEC>;
9197 impl Dvidf {
9198 #[doc = "Device-ID command does not detect."]
9199 pub const _0: Self = Self::new(0);
9200
9201 #[doc = "Device-ID command detects. This bit set to 1 when the first frame received immediately after a START condition is detected matches a value of (device ID (1111 100) + 0\\[W\\])."]
9202 pub const _1: Self = Self::new(1);
9203 }
9204 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9205 pub struct Hoaf_SPEC;
9206 pub type Hoaf = crate::EnumBitfieldStruct<u8, Hoaf_SPEC>;
9207 impl Hoaf {
9208 #[doc = "Host address does not detect."]
9209 pub const _0: Self = Self::new(0);
9210
9211 #[doc = "Host address detects. This bit set to 1 when the received slave address matches the host address (0001 000)."]
9212 pub const _1: Self = Self::new(1);
9213 }
9214 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9215 pub struct Svaf_SPEC;
9216 pub type Svaf = crate::EnumBitfieldStruct<u8, Svaf_SPEC>;
9217 impl Svaf {
9218 #[doc = "Slave n does not detect"]
9219 pub const _0: Self = Self::new(0);
9220
9221 #[doc = "Slave n detect"]
9222 pub const _1: Self = Self::new(1);
9223 }
9224}
9225#[doc(hidden)]
9226#[derive(Copy, Clone, Eq, PartialEq)]
9227pub struct Wust_SPEC;
9228impl crate::sealed::RegSpec for Wust_SPEC {
9229 type DataType = u32;
9230}
9231
9232#[doc = "Wake Up Unit Operating Status Register"]
9233pub type Wust = crate::RegValueT<Wust_SPEC>;
9234
9235impl Wust {
9236 #[doc = "Wake-up function asynchronous operation status flag"]
9237 #[inline(always)]
9238 pub fn wuasynf(
9239 self,
9240 ) -> crate::common::RegisterField<
9241 0,
9242 0x1,
9243 1,
9244 0,
9245 wust::Wuasynf,
9246 wust::Wuasynf,
9247 Wust_SPEC,
9248 crate::common::R,
9249 > {
9250 crate::common::RegisterField::<
9251 0,
9252 0x1,
9253 1,
9254 0,
9255 wust::Wuasynf,
9256 wust::Wuasynf,
9257 Wust_SPEC,
9258 crate::common::R,
9259 >::from_register(self, 0)
9260 }
9261}
9262impl ::core::default::Default for Wust {
9263 #[inline(always)]
9264 fn default() -> Wust {
9265 <crate::RegValueT<Wust_SPEC> as RegisterValue<_>>::new(0)
9266 }
9267}
9268pub mod wust {
9269
9270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9271 pub struct Wuasynf_SPEC;
9272 pub type Wuasynf = crate::EnumBitfieldStruct<u8, Wuasynf_SPEC>;
9273 impl Wuasynf {
9274 #[doc = "I3C synchronous circuit enable condition."]
9275 pub const _0: Self = Self::new(0);
9276
9277 #[doc = "I3C asynchronous circuit enable condition."]
9278 pub const _1: Self = Self::new(1);
9279 }
9280}
9281#[doc(hidden)]
9282#[derive(Copy, Clone, Eq, PartialEq)]
9283pub struct Mrccpt_SPEC;
9284impl crate::sealed::RegSpec for Mrccpt_SPEC {
9285 type DataType = u32;
9286}
9287
9288#[doc = "MsyncCNT Counter Capture Register"]
9289pub type Mrccpt = crate::RegValueT<Mrccpt_SPEC>;
9290
9291impl NoBitfieldReg<Mrccpt_SPEC> for Mrccpt {}
9292impl ::core::default::Default for Mrccpt {
9293 #[inline(always)]
9294 fn default() -> Mrccpt {
9295 <crate::RegValueT<Mrccpt_SPEC> as RegisterValue<_>>::new(0)
9296 }
9297}
9298
9299#[doc(hidden)]
9300#[derive(Copy, Clone, Eq, PartialEq)]
9301pub struct Datbas_SPEC;
9302impl crate::sealed::RegSpec for Datbas_SPEC {
9303 type DataType = u32;
9304}
9305
9306#[doc = "Device Address Table Basic Register %s"]
9307pub type Datbas = crate::RegValueT<Datbas_SPEC>;
9308
9309impl Datbas {
9310 #[doc = "Device Static Address"]
9311 #[inline(always)]
9312 pub fn dvstad(
9313 self,
9314 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9315 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9316 }
9317
9318 #[doc = "Device IBI Payload"]
9319 #[inline(always)]
9320 pub fn dvibipl(
9321 self,
9322 ) -> crate::common::RegisterField<
9323 12,
9324 0x1,
9325 1,
9326 0,
9327 datbas::Dvibipl,
9328 datbas::Dvibipl,
9329 Datbas_SPEC,
9330 crate::common::RW,
9331 > {
9332 crate::common::RegisterField::<
9333 12,
9334 0x1,
9335 1,
9336 0,
9337 datbas::Dvibipl,
9338 datbas::Dvibipl,
9339 Datbas_SPEC,
9340 crate::common::RW,
9341 >::from_register(self, 0)
9342 }
9343
9344 #[doc = "Device In-Band Slave Interrupt Request Reject"]
9345 #[inline(always)]
9346 pub fn dvsirrj(
9347 self,
9348 ) -> crate::common::RegisterField<
9349 13,
9350 0x1,
9351 1,
9352 0,
9353 datbas::Dvsirrj,
9354 datbas::Dvsirrj,
9355 Datbas_SPEC,
9356 crate::common::RW,
9357 > {
9358 crate::common::RegisterField::<
9359 13,
9360 0x1,
9361 1,
9362 0,
9363 datbas::Dvsirrj,
9364 datbas::Dvsirrj,
9365 Datbas_SPEC,
9366 crate::common::RW,
9367 >::from_register(self, 0)
9368 }
9369
9370 #[doc = "Device In-Band Master Request Reject"]
9371 #[inline(always)]
9372 pub fn dvmrrj(
9373 self,
9374 ) -> crate::common::RegisterField<
9375 14,
9376 0x1,
9377 1,
9378 0,
9379 datbas::Dvmrrj,
9380 datbas::Dvmrrj,
9381 Datbas_SPEC,
9382 crate::common::RW,
9383 > {
9384 crate::common::RegisterField::<
9385 14,
9386 0x1,
9387 1,
9388 0,
9389 datbas::Dvmrrj,
9390 datbas::Dvmrrj,
9391 Datbas_SPEC,
9392 crate::common::RW,
9393 >::from_register(self, 0)
9394 }
9395
9396 #[doc = "Device IBI Time-stamp"]
9397 #[inline(always)]
9398 pub fn dvibits(
9399 self,
9400 ) -> crate::common::RegisterField<
9401 15,
9402 0x1,
9403 1,
9404 0,
9405 datbas::Dvibits,
9406 datbas::Dvibits,
9407 Datbas_SPEC,
9408 crate::common::RW,
9409 > {
9410 crate::common::RegisterField::<
9411 15,
9412 0x1,
9413 1,
9414 0,
9415 datbas::Dvibits,
9416 datbas::Dvibits,
9417 Datbas_SPEC,
9418 crate::common::RW,
9419 >::from_register(self, 0)
9420 }
9421
9422 #[doc = "Device I3C Dynamic Address"]
9423 #[inline(always)]
9424 pub fn dvdyad(
9425 self,
9426 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9427 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9428 }
9429
9430 #[doc = "Device NACK Retry Count"]
9431 #[inline(always)]
9432 pub fn dvnack(
9433 self,
9434 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Datbas_SPEC, crate::common::RW> {
9435 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Datbas_SPEC,crate::common::RW>::from_register(self,0)
9436 }
9437
9438 #[doc = "Device Type"]
9439 #[inline(always)]
9440 pub fn dvtyp(
9441 self,
9442 ) -> crate::common::RegisterField<
9443 31,
9444 0x1,
9445 1,
9446 0,
9447 datbas::Dvtyp,
9448 datbas::Dvtyp,
9449 Datbas_SPEC,
9450 crate::common::RW,
9451 > {
9452 crate::common::RegisterField::<
9453 31,
9454 0x1,
9455 1,
9456 0,
9457 datbas::Dvtyp,
9458 datbas::Dvtyp,
9459 Datbas_SPEC,
9460 crate::common::RW,
9461 >::from_register(self, 0)
9462 }
9463}
9464impl ::core::default::Default for Datbas {
9465 #[inline(always)]
9466 fn default() -> Datbas {
9467 <crate::RegValueT<Datbas_SPEC> as RegisterValue<_>>::new(0)
9468 }
9469}
9470pub mod datbas {
9471
9472 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9473 pub struct Dvibipl_SPEC;
9474 pub type Dvibipl = crate::EnumBitfieldStruct<u8, Dvibipl_SPEC>;
9475 impl Dvibipl {
9476 #[doc = "IBIs from this Device do not carry a Data Payload."]
9477 pub const _0: Self = Self::new(0);
9478
9479 #[doc = "IBIs from this Device do carry a Data Payload."]
9480 pub const _1: Self = Self::new(1);
9481 }
9482 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9483 pub struct Dvsirrj_SPEC;
9484 pub type Dvsirrj = crate::EnumBitfieldStruct<u8, Dvsirrj_SPEC>;
9485 impl Dvsirrj {
9486 #[doc = "This Device shall ACK the SIR."]
9487 pub const _0: Self = Self::new(0);
9488
9489 #[doc = "This Device shall NACK the SIR and send the auto-disable CCC."]
9490 pub const _1: Self = Self::new(1);
9491 }
9492 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9493 pub struct Dvmrrj_SPEC;
9494 pub type Dvmrrj = crate::EnumBitfieldStruct<u8, Dvmrrj_SPEC>;
9495 impl Dvmrrj {
9496 #[doc = "This Device shall ACK Master Requests."]
9497 pub const _0: Self = Self::new(0);
9498
9499 #[doc = "This Device shall NACK Master Requests and send the auto-disable command."]
9500 pub const _1: Self = Self::new(1);
9501 }
9502 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9503 pub struct Dvibits_SPEC;
9504 pub type Dvibits = crate::EnumBitfieldStruct<u8, Dvibits_SPEC>;
9505 impl Dvibits {
9506 #[doc = "The Master shall not time-stamp IBIs from this Device with Master Time-stamps."]
9507 pub const _0: Self = Self::new(0);
9508
9509 #[doc = "The Master shall time-stamp IBIs for this Device with Master Time-stamps."]
9510 pub const _1: Self = Self::new(1);
9511 }
9512 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9513 pub struct Dvtyp_SPEC;
9514 pub type Dvtyp = crate::EnumBitfieldStruct<u8, Dvtyp_SPEC>;
9515 impl Dvtyp {
9516 #[doc = "I3C Device"]
9517 pub const _0: Self = Self::new(0);
9518
9519 #[doc = "I2C Device"]
9520 pub const _1: Self = Self::new(1);
9521 }
9522}
9523#[doc(hidden)]
9524#[derive(Copy, Clone, Eq, PartialEq)]
9525pub struct Exdatbas_SPEC;
9526impl crate::sealed::RegSpec for Exdatbas_SPEC {
9527 type DataType = u32;
9528}
9529
9530#[doc = "Extended Device Address Table Basic Register"]
9531pub type Exdatbas = crate::RegValueT<Exdatbas_SPEC>;
9532
9533impl Exdatbas {
9534 #[doc = "Extended Device Static Address"]
9535 #[inline(always)]
9536 pub fn edstad(
9537 self,
9538 ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
9539 crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9540 }
9541
9542 #[doc = "Extended Device I3C Dynamic Address"]
9543 #[inline(always)]
9544 pub fn eddyad(
9545 self,
9546 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW>
9547 {
9548 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9549 }
9550
9551 #[doc = "Extended Device NACK Retry Count"]
9552 #[inline(always)]
9553 pub fn ednack(
9554 self,
9555 ) -> crate::common::RegisterField<29, 0x3, 1, 0, u8, u8, Exdatbas_SPEC, crate::common::RW> {
9556 crate::common::RegisterField::<29,0x3,1,0,u8,u8,Exdatbas_SPEC,crate::common::RW>::from_register(self,0)
9557 }
9558
9559 #[doc = "Extended Device Type"]
9560 #[inline(always)]
9561 pub fn edtyp(
9562 self,
9563 ) -> crate::common::RegisterField<
9564 31,
9565 0x1,
9566 1,
9567 0,
9568 exdatbas::Edtyp,
9569 exdatbas::Edtyp,
9570 Exdatbas_SPEC,
9571 crate::common::RW,
9572 > {
9573 crate::common::RegisterField::<
9574 31,
9575 0x1,
9576 1,
9577 0,
9578 exdatbas::Edtyp,
9579 exdatbas::Edtyp,
9580 Exdatbas_SPEC,
9581 crate::common::RW,
9582 >::from_register(self, 0)
9583 }
9584}
9585impl ::core::default::Default for Exdatbas {
9586 #[inline(always)]
9587 fn default() -> Exdatbas {
9588 <crate::RegValueT<Exdatbas_SPEC> as RegisterValue<_>>::new(0)
9589 }
9590}
9591pub mod exdatbas {
9592
9593 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9594 pub struct Edtyp_SPEC;
9595 pub type Edtyp = crate::EnumBitfieldStruct<u8, Edtyp_SPEC>;
9596 impl Edtyp {
9597 #[doc = "I3C Device"]
9598 pub const _0: Self = Self::new(0);
9599
9600 #[doc = "I2C Device"]
9601 pub const _1: Self = Self::new(1);
9602 }
9603}
9604#[doc(hidden)]
9605#[derive(Copy, Clone, Eq, PartialEq)]
9606pub struct Sdatbas0_SPEC;
9607impl crate::sealed::RegSpec for Sdatbas0_SPEC {
9608 type DataType = u32;
9609}
9610
9611#[doc = "Slave Device Address Table Basic Register 0"]
9612pub type Sdatbas0 = crate::RegValueT<Sdatbas0_SPEC>;
9613
9614impl Sdatbas0 {
9615 #[doc = "Slave Device Static Address"]
9616 #[inline(always)]
9617 pub fn sdstad(
9618 self,
9619 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas0_SPEC, crate::common::RW>
9620 {
9621 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
9622 }
9623
9624 #[doc = "Slave Device Address Length Selection"]
9625 #[inline(always)]
9626 pub fn sdadls(
9627 self,
9628 ) -> crate::common::RegisterField<
9629 10,
9630 0x1,
9631 1,
9632 0,
9633 sdatbas0::Sdadls,
9634 sdatbas0::Sdadls,
9635 Sdatbas0_SPEC,
9636 crate::common::RW,
9637 > {
9638 crate::common::RegisterField::<
9639 10,
9640 0x1,
9641 1,
9642 0,
9643 sdatbas0::Sdadls,
9644 sdatbas0::Sdadls,
9645 Sdatbas0_SPEC,
9646 crate::common::RW,
9647 >::from_register(self, 0)
9648 }
9649
9650 #[doc = "Slave Device IBI Payload"]
9651 #[inline(always)]
9652 pub fn sdibipl(
9653 self,
9654 ) -> crate::common::RegisterField<
9655 12,
9656 0x1,
9657 1,
9658 0,
9659 sdatbas0::Sdibipl,
9660 sdatbas0::Sdibipl,
9661 Sdatbas0_SPEC,
9662 crate::common::RW,
9663 > {
9664 crate::common::RegisterField::<
9665 12,
9666 0x1,
9667 1,
9668 0,
9669 sdatbas0::Sdibipl,
9670 sdatbas0::Sdibipl,
9671 Sdatbas0_SPEC,
9672 crate::common::RW,
9673 >::from_register(self, 0)
9674 }
9675
9676 #[doc = "Slave Device I3C Dynamic Address"]
9677 #[inline(always)]
9678 pub fn sddyad(
9679 self,
9680 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas0_SPEC, crate::common::RW>
9681 {
9682 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas0_SPEC,crate::common::RW>::from_register(self,0)
9683 }
9684}
9685impl ::core::default::Default for Sdatbas0 {
9686 #[inline(always)]
9687 fn default() -> Sdatbas0 {
9688 <crate::RegValueT<Sdatbas0_SPEC> as RegisterValue<_>>::new(0)
9689 }
9690}
9691pub mod sdatbas0 {
9692
9693 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9694 pub struct Sdadls_SPEC;
9695 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9696 impl Sdadls {
9697 #[doc = "Slave device address length 7 bits selected."]
9698 pub const _0: Self = Self::new(0);
9699
9700 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9701 pub const _1: Self = Self::new(1);
9702 }
9703 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9704 pub struct Sdibipl_SPEC;
9705 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9706 impl Sdibipl {
9707 #[doc = "IBIs from this device do not carry a data payload."]
9708 pub const _0: Self = Self::new(0);
9709
9710 #[doc = "IBIs from this device carry a data payload."]
9711 pub const _1: Self = Self::new(1);
9712 }
9713}
9714#[doc(hidden)]
9715#[derive(Copy, Clone, Eq, PartialEq)]
9716pub struct Sdatbas1_SPEC;
9717impl crate::sealed::RegSpec for Sdatbas1_SPEC {
9718 type DataType = u32;
9719}
9720
9721#[doc = "Slave Device Address Table Basic Register 1"]
9722pub type Sdatbas1 = crate::RegValueT<Sdatbas1_SPEC>;
9723
9724impl Sdatbas1 {
9725 #[doc = "Slave Device Static Address"]
9726 #[inline(always)]
9727 pub fn sdstad(
9728 self,
9729 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas1_SPEC, crate::common::RW>
9730 {
9731 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
9732 }
9733
9734 #[doc = "Slave Device Address Length Selection"]
9735 #[inline(always)]
9736 pub fn sdadls(
9737 self,
9738 ) -> crate::common::RegisterField<
9739 10,
9740 0x1,
9741 1,
9742 0,
9743 sdatbas1::Sdadls,
9744 sdatbas1::Sdadls,
9745 Sdatbas1_SPEC,
9746 crate::common::RW,
9747 > {
9748 crate::common::RegisterField::<
9749 10,
9750 0x1,
9751 1,
9752 0,
9753 sdatbas1::Sdadls,
9754 sdatbas1::Sdadls,
9755 Sdatbas1_SPEC,
9756 crate::common::RW,
9757 >::from_register(self, 0)
9758 }
9759
9760 #[doc = "Slave Device IBI Payload"]
9761 #[inline(always)]
9762 pub fn sdibipl(
9763 self,
9764 ) -> crate::common::RegisterField<
9765 12,
9766 0x1,
9767 1,
9768 0,
9769 sdatbas1::Sdibipl,
9770 sdatbas1::Sdibipl,
9771 Sdatbas1_SPEC,
9772 crate::common::RW,
9773 > {
9774 crate::common::RegisterField::<
9775 12,
9776 0x1,
9777 1,
9778 0,
9779 sdatbas1::Sdibipl,
9780 sdatbas1::Sdibipl,
9781 Sdatbas1_SPEC,
9782 crate::common::RW,
9783 >::from_register(self, 0)
9784 }
9785
9786 #[doc = "Slave Device I3C Dynamic Address"]
9787 #[inline(always)]
9788 pub fn sddyad(
9789 self,
9790 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas1_SPEC, crate::common::RW>
9791 {
9792 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas1_SPEC,crate::common::RW>::from_register(self,0)
9793 }
9794}
9795impl ::core::default::Default for Sdatbas1 {
9796 #[inline(always)]
9797 fn default() -> Sdatbas1 {
9798 <crate::RegValueT<Sdatbas1_SPEC> as RegisterValue<_>>::new(0)
9799 }
9800}
9801pub mod sdatbas1 {
9802
9803 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9804 pub struct Sdadls_SPEC;
9805 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9806 impl Sdadls {
9807 #[doc = "Slave device address length 7 bits selected."]
9808 pub const _0: Self = Self::new(0);
9809
9810 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9811 pub const _1: Self = Self::new(1);
9812 }
9813 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9814 pub struct Sdibipl_SPEC;
9815 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9816 impl Sdibipl {
9817 #[doc = "IBIs from this device do not carry a data payload."]
9818 pub const _0: Self = Self::new(0);
9819
9820 #[doc = "IBIs from this device carry a data payload."]
9821 pub const _1: Self = Self::new(1);
9822 }
9823}
9824#[doc(hidden)]
9825#[derive(Copy, Clone, Eq, PartialEq)]
9826pub struct Sdatbas2_SPEC;
9827impl crate::sealed::RegSpec for Sdatbas2_SPEC {
9828 type DataType = u32;
9829}
9830
9831#[doc = "Slave Device Address Table Basic Register 2"]
9832pub type Sdatbas2 = crate::RegValueT<Sdatbas2_SPEC>;
9833
9834impl Sdatbas2 {
9835 #[doc = "Slave Device Static Address"]
9836 #[inline(always)]
9837 pub fn sdstad(
9838 self,
9839 ) -> crate::common::RegisterField<0, 0x3ff, 1, 0, u16, u16, Sdatbas2_SPEC, crate::common::RW>
9840 {
9841 crate::common::RegisterField::<0,0x3ff,1,0,u16,u16,Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
9842 }
9843
9844 #[doc = "Slave Device Address Length Selection"]
9845 #[inline(always)]
9846 pub fn sdadls(
9847 self,
9848 ) -> crate::common::RegisterField<
9849 10,
9850 0x1,
9851 1,
9852 0,
9853 sdatbas2::Sdadls,
9854 sdatbas2::Sdadls,
9855 Sdatbas2_SPEC,
9856 crate::common::RW,
9857 > {
9858 crate::common::RegisterField::<
9859 10,
9860 0x1,
9861 1,
9862 0,
9863 sdatbas2::Sdadls,
9864 sdatbas2::Sdadls,
9865 Sdatbas2_SPEC,
9866 crate::common::RW,
9867 >::from_register(self, 0)
9868 }
9869
9870 #[doc = "Slave Device IBI Payload"]
9871 #[inline(always)]
9872 pub fn sdibipl(
9873 self,
9874 ) -> crate::common::RegisterField<
9875 12,
9876 0x1,
9877 1,
9878 0,
9879 sdatbas2::Sdibipl,
9880 sdatbas2::Sdibipl,
9881 Sdatbas2_SPEC,
9882 crate::common::RW,
9883 > {
9884 crate::common::RegisterField::<
9885 12,
9886 0x1,
9887 1,
9888 0,
9889 sdatbas2::Sdibipl,
9890 sdatbas2::Sdibipl,
9891 Sdatbas2_SPEC,
9892 crate::common::RW,
9893 >::from_register(self, 0)
9894 }
9895
9896 #[doc = "Slave Device I3C Dynamic Address"]
9897 #[inline(always)]
9898 pub fn sddyad(
9899 self,
9900 ) -> crate::common::RegisterField<16, 0x7f, 1, 0, u8, u8, Sdatbas2_SPEC, crate::common::RW>
9901 {
9902 crate::common::RegisterField::<16,0x7f,1,0,u8,u8,Sdatbas2_SPEC,crate::common::RW>::from_register(self,0)
9903 }
9904}
9905impl ::core::default::Default for Sdatbas2 {
9906 #[inline(always)]
9907 fn default() -> Sdatbas2 {
9908 <crate::RegValueT<Sdatbas2_SPEC> as RegisterValue<_>>::new(0)
9909 }
9910}
9911pub mod sdatbas2 {
9912
9913 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9914 pub struct Sdadls_SPEC;
9915 pub type Sdadls = crate::EnumBitfieldStruct<u8, Sdadls_SPEC>;
9916 impl Sdadls {
9917 #[doc = "Slave device address length 7 bits selected."]
9918 pub const _0: Self = Self::new(0);
9919
9920 #[doc = "Slave device address length 10 bits selected. (I2C device only)"]
9921 pub const _1: Self = Self::new(1);
9922 }
9923 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9924 pub struct Sdibipl_SPEC;
9925 pub type Sdibipl = crate::EnumBitfieldStruct<u8, Sdibipl_SPEC>;
9926 impl Sdibipl {
9927 #[doc = "IBIs from this device do not carry a data payload."]
9928 pub const _0: Self = Self::new(0);
9929
9930 #[doc = "IBIs from this device carry a data payload."]
9931 pub const _1: Self = Self::new(1);
9932 }
9933}
9934#[doc(hidden)]
9935#[derive(Copy, Clone, Eq, PartialEq)]
9936pub struct Msdct_SPEC;
9937impl crate::sealed::RegSpec for Msdct_SPEC {
9938 type DataType = u32;
9939}
9940
9941#[doc = "Master Device Characteristic Table Register %s"]
9942pub type Msdct = crate::RegValueT<Msdct_SPEC>;
9943
9944impl Msdct {
9945 #[doc = "Max Data Speed Limitation"]
9946 #[inline(always)]
9947 pub fn rbcr0(
9948 self,
9949 ) -> crate::common::RegisterField<
9950 8,
9951 0x1,
9952 1,
9953 0,
9954 msdct::Rbcr0,
9955 msdct::Rbcr0,
9956 Msdct_SPEC,
9957 crate::common::RW,
9958 > {
9959 crate::common::RegisterField::<
9960 8,
9961 0x1,
9962 1,
9963 0,
9964 msdct::Rbcr0,
9965 msdct::Rbcr0,
9966 Msdct_SPEC,
9967 crate::common::RW,
9968 >::from_register(self, 0)
9969 }
9970
9971 #[doc = "IBI Request Capable"]
9972 #[inline(always)]
9973 pub fn rbcr1(
9974 self,
9975 ) -> crate::common::RegisterField<
9976 9,
9977 0x1,
9978 1,
9979 0,
9980 msdct::Rbcr1,
9981 msdct::Rbcr1,
9982 Msdct_SPEC,
9983 crate::common::RW,
9984 > {
9985 crate::common::RegisterField::<
9986 9,
9987 0x1,
9988 1,
9989 0,
9990 msdct::Rbcr1,
9991 msdct::Rbcr1,
9992 Msdct_SPEC,
9993 crate::common::RW,
9994 >::from_register(self, 0)
9995 }
9996
9997 #[doc = "IBI Payload"]
9998 #[inline(always)]
9999 pub fn rbcr2(
10000 self,
10001 ) -> crate::common::RegisterField<
10002 10,
10003 0x1,
10004 1,
10005 0,
10006 msdct::Rbcr2,
10007 msdct::Rbcr2,
10008 Msdct_SPEC,
10009 crate::common::RW,
10010 > {
10011 crate::common::RegisterField::<
10012 10,
10013 0x1,
10014 1,
10015 0,
10016 msdct::Rbcr2,
10017 msdct::Rbcr2,
10018 Msdct_SPEC,
10019 crate::common::RW,
10020 >::from_register(self, 0)
10021 }
10022
10023 #[doc = "Offline Capable"]
10024 #[inline(always)]
10025 pub fn rbcr3(
10026 self,
10027 ) -> crate::common::RegisterField<
10028 11,
10029 0x1,
10030 1,
10031 0,
10032 msdct::Rbcr3,
10033 msdct::Rbcr3,
10034 Msdct_SPEC,
10035 crate::common::RW,
10036 > {
10037 crate::common::RegisterField::<
10038 11,
10039 0x1,
10040 1,
10041 0,
10042 msdct::Rbcr3,
10043 msdct::Rbcr3,
10044 Msdct_SPEC,
10045 crate::common::RW,
10046 >::from_register(self, 0)
10047 }
10048
10049 #[doc = "Bridge Identifier"]
10050 #[inline(always)]
10051 pub fn rbcr4(
10052 self,
10053 ) -> crate::common::RegisterField<
10054 12,
10055 0x1,
10056 1,
10057 0,
10058 msdct::Rbcr4,
10059 msdct::Rbcr4,
10060 Msdct_SPEC,
10061 crate::common::RW,
10062 > {
10063 crate::common::RegisterField::<
10064 12,
10065 0x1,
10066 1,
10067 0,
10068 msdct::Rbcr4,
10069 msdct::Rbcr4,
10070 Msdct_SPEC,
10071 crate::common::RW,
10072 >::from_register(self, 0)
10073 }
10074
10075 #[doc = "Device Role"]
10076 #[inline(always)]
10077 pub fn rbcr76(
10078 self,
10079 ) -> crate::common::RegisterField<
10080 14,
10081 0x3,
10082 1,
10083 0,
10084 msdct::Rbcr76,
10085 msdct::Rbcr76,
10086 Msdct_SPEC,
10087 crate::common::RW,
10088 > {
10089 crate::common::RegisterField::<
10090 14,
10091 0x3,
10092 1,
10093 0,
10094 msdct::Rbcr76,
10095 msdct::Rbcr76,
10096 Msdct_SPEC,
10097 crate::common::RW,
10098 >::from_register(self, 0)
10099 }
10100}
10101impl ::core::default::Default for Msdct {
10102 #[inline(always)]
10103 fn default() -> Msdct {
10104 <crate::RegValueT<Msdct_SPEC> as RegisterValue<_>>::new(0)
10105 }
10106}
10107pub mod msdct {
10108
10109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10110 pub struct Rbcr0_SPEC;
10111 pub type Rbcr0 = crate::EnumBitfieldStruct<u8, Rbcr0_SPEC>;
10112 impl Rbcr0 {
10113 #[doc = "No Limitation"]
10114 pub const _0: Self = Self::new(0);
10115
10116 #[doc = "Limitation"]
10117 pub const _1: Self = Self::new(1);
10118 }
10119 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10120 pub struct Rbcr1_SPEC;
10121 pub type Rbcr1 = crate::EnumBitfieldStruct<u8, Rbcr1_SPEC>;
10122 impl Rbcr1 {
10123 #[doc = "Not Capable"]
10124 pub const _0: Self = Self::new(0);
10125
10126 #[doc = "Capable"]
10127 pub const _1: Self = Self::new(1);
10128 }
10129 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10130 pub struct Rbcr2_SPEC;
10131 pub type Rbcr2 = crate::EnumBitfieldStruct<u8, Rbcr2_SPEC>;
10132 impl Rbcr2 {
10133 #[doc = "No data byte follows the accepted IBI."]
10134 pub const _0: Self = Self::new(0);
10135
10136 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
10137 pub const _1: Self = Self::new(1);
10138 }
10139 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10140 pub struct Rbcr3_SPEC;
10141 pub type Rbcr3 = crate::EnumBitfieldStruct<u8, Rbcr3_SPEC>;
10142 impl Rbcr3 {
10143 #[doc = "Device will always respond to I3C bus commands."]
10144 pub const _0: Self = Self::new(0);
10145
10146 #[doc = "Device will not always respond to I3C bus commands."]
10147 pub const _1: Self = Self::new(1);
10148 }
10149 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10150 pub struct Rbcr4_SPEC;
10151 pub type Rbcr4 = crate::EnumBitfieldStruct<u8, Rbcr4_SPEC>;
10152 impl Rbcr4 {
10153 #[doc = "Not a Bridge Device"]
10154 pub const _0: Self = Self::new(0);
10155
10156 #[doc = "A Bridge Device"]
10157 pub const _1: Self = Self::new(1);
10158 }
10159 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10160 pub struct Rbcr76_SPEC;
10161 pub type Rbcr76 = crate::EnumBitfieldStruct<u8, Rbcr76_SPEC>;
10162 impl Rbcr76 {
10163 #[doc = "I3C Slave"]
10164 pub const _00: Self = Self::new(0);
10165
10166 #[doc = "I3C Master"]
10167 pub const _01: Self = Self::new(1);
10168 }
10169}
10170#[doc(hidden)]
10171#[derive(Copy, Clone, Eq, PartialEq)]
10172pub struct Svdct_SPEC;
10173impl crate::sealed::RegSpec for Svdct_SPEC {
10174 type DataType = u32;
10175}
10176
10177#[doc = "Slave Device Characteristic Table Register"]
10178pub type Svdct = crate::RegValueT<Svdct_SPEC>;
10179
10180impl Svdct {
10181 #[doc = "Transfar Device Characteristic Register"]
10182 #[inline(always)]
10183 pub fn tdcr(
10184 self,
10185 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Svdct_SPEC, crate::common::RW> {
10186 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Svdct_SPEC,crate::common::RW>::from_register(self,0)
10187 }
10188
10189 #[doc = "Max Data Speed Limitation"]
10190 #[inline(always)]
10191 pub fn tbcr0(
10192 self,
10193 ) -> crate::common::RegisterField<
10194 8,
10195 0x1,
10196 1,
10197 0,
10198 svdct::Tbcr0,
10199 svdct::Tbcr0,
10200 Svdct_SPEC,
10201 crate::common::RW,
10202 > {
10203 crate::common::RegisterField::<
10204 8,
10205 0x1,
10206 1,
10207 0,
10208 svdct::Tbcr0,
10209 svdct::Tbcr0,
10210 Svdct_SPEC,
10211 crate::common::RW,
10212 >::from_register(self, 0)
10213 }
10214
10215 #[doc = "IBI Request Capable"]
10216 #[inline(always)]
10217 pub fn tbcr1(
10218 self,
10219 ) -> crate::common::RegisterField<
10220 9,
10221 0x1,
10222 1,
10223 0,
10224 svdct::Tbcr1,
10225 svdct::Tbcr1,
10226 Svdct_SPEC,
10227 crate::common::RW,
10228 > {
10229 crate::common::RegisterField::<
10230 9,
10231 0x1,
10232 1,
10233 0,
10234 svdct::Tbcr1,
10235 svdct::Tbcr1,
10236 Svdct_SPEC,
10237 crate::common::RW,
10238 >::from_register(self, 0)
10239 }
10240
10241 #[doc = "IBI Payload"]
10242 #[inline(always)]
10243 pub fn tbcr2(
10244 self,
10245 ) -> crate::common::RegisterField<
10246 10,
10247 0x1,
10248 1,
10249 0,
10250 svdct::Tbcr2,
10251 svdct::Tbcr2,
10252 Svdct_SPEC,
10253 crate::common::RW,
10254 > {
10255 crate::common::RegisterField::<
10256 10,
10257 0x1,
10258 1,
10259 0,
10260 svdct::Tbcr2,
10261 svdct::Tbcr2,
10262 Svdct_SPEC,
10263 crate::common::RW,
10264 >::from_register(self, 0)
10265 }
10266
10267 #[doc = "Offline Capable"]
10268 #[inline(always)]
10269 pub fn tbcr3(
10270 self,
10271 ) -> crate::common::RegisterField<
10272 11,
10273 0x1,
10274 1,
10275 0,
10276 svdct::Tbcr3,
10277 svdct::Tbcr3,
10278 Svdct_SPEC,
10279 crate::common::RW,
10280 > {
10281 crate::common::RegisterField::<
10282 11,
10283 0x1,
10284 1,
10285 0,
10286 svdct::Tbcr3,
10287 svdct::Tbcr3,
10288 Svdct_SPEC,
10289 crate::common::RW,
10290 >::from_register(self, 0)
10291 }
10292
10293 #[doc = "Bridge Identifier"]
10294 #[inline(always)]
10295 pub fn tbcr4(
10296 self,
10297 ) -> crate::common::RegisterField<
10298 12,
10299 0x1,
10300 1,
10301 0,
10302 svdct::Tbcr4,
10303 svdct::Tbcr4,
10304 Svdct_SPEC,
10305 crate::common::RW,
10306 > {
10307 crate::common::RegisterField::<
10308 12,
10309 0x1,
10310 1,
10311 0,
10312 svdct::Tbcr4,
10313 svdct::Tbcr4,
10314 Svdct_SPEC,
10315 crate::common::RW,
10316 >::from_register(self, 0)
10317 }
10318
10319 #[doc = "Device Role"]
10320 #[inline(always)]
10321 pub fn tbcr76(
10322 self,
10323 ) -> crate::common::RegisterField<
10324 14,
10325 0x3,
10326 1,
10327 0,
10328 svdct::Tbcr76,
10329 svdct::Tbcr76,
10330 Svdct_SPEC,
10331 crate::common::RW,
10332 > {
10333 crate::common::RegisterField::<
10334 14,
10335 0x3,
10336 1,
10337 0,
10338 svdct::Tbcr76,
10339 svdct::Tbcr76,
10340 Svdct_SPEC,
10341 crate::common::RW,
10342 >::from_register(self, 0)
10343 }
10344}
10345impl ::core::default::Default for Svdct {
10346 #[inline(always)]
10347 fn default() -> Svdct {
10348 <crate::RegValueT<Svdct_SPEC> as RegisterValue<_>>::new(0)
10349 }
10350}
10351pub mod svdct {
10352
10353 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10354 pub struct Tbcr0_SPEC;
10355 pub type Tbcr0 = crate::EnumBitfieldStruct<u8, Tbcr0_SPEC>;
10356 impl Tbcr0 {
10357 #[doc = "No Limitation"]
10358 pub const _0: Self = Self::new(0);
10359
10360 #[doc = "Limitation"]
10361 pub const _1: Self = Self::new(1);
10362 }
10363 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10364 pub struct Tbcr1_SPEC;
10365 pub type Tbcr1 = crate::EnumBitfieldStruct<u8, Tbcr1_SPEC>;
10366 impl Tbcr1 {
10367 #[doc = "Not Capable"]
10368 pub const _0: Self = Self::new(0);
10369
10370 #[doc = "Capable"]
10371 pub const _1: Self = Self::new(1);
10372 }
10373 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10374 pub struct Tbcr2_SPEC;
10375 pub type Tbcr2 = crate::EnumBitfieldStruct<u8, Tbcr2_SPEC>;
10376 impl Tbcr2 {
10377 #[doc = "No data byte follows the accepted IBI."]
10378 pub const _0: Self = Self::new(0);
10379
10380 #[doc = "Mandatory one or more data bytes follow the accepted IBI. Data byte continuation is indicated by T-Bit."]
10381 pub const _1: Self = Self::new(1);
10382 }
10383 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10384 pub struct Tbcr3_SPEC;
10385 pub type Tbcr3 = crate::EnumBitfieldStruct<u8, Tbcr3_SPEC>;
10386 impl Tbcr3 {
10387 #[doc = "Device will always respond to I3C bus commands."]
10388 pub const _0: Self = Self::new(0);
10389
10390 #[doc = "Device will not always respond to I3C bus commands."]
10391 pub const _1: Self = Self::new(1);
10392 }
10393 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10394 pub struct Tbcr4_SPEC;
10395 pub type Tbcr4 = crate::EnumBitfieldStruct<u8, Tbcr4_SPEC>;
10396 impl Tbcr4 {
10397 #[doc = "Not a Bridge Device"]
10398 pub const _0: Self = Self::new(0);
10399
10400 #[doc = "A Bridge Device"]
10401 pub const _1: Self = Self::new(1);
10402 }
10403 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10404 pub struct Tbcr76_SPEC;
10405 pub type Tbcr76 = crate::EnumBitfieldStruct<u8, Tbcr76_SPEC>;
10406 impl Tbcr76 {
10407 #[doc = "I3C Slave"]
10408 pub const _00: Self = Self::new(0);
10409
10410 #[doc = "I3C Master"]
10411 pub const _01: Self = Self::new(1);
10412 }
10413}
10414#[doc(hidden)]
10415#[derive(Copy, Clone, Eq, PartialEq)]
10416pub struct Sdctpidl_SPEC;
10417impl crate::sealed::RegSpec for Sdctpidl_SPEC {
10418 type DataType = u32;
10419}
10420
10421#[doc = "Slave Device Characteristic Table Provisional ID Low Register"]
10422pub type Sdctpidl = crate::RegValueT<Sdctpidl_SPEC>;
10423
10424impl NoBitfieldReg<Sdctpidl_SPEC> for Sdctpidl {}
10425impl ::core::default::Default for Sdctpidl {
10426 #[inline(always)]
10427 fn default() -> Sdctpidl {
10428 <crate::RegValueT<Sdctpidl_SPEC> as RegisterValue<_>>::new(0)
10429 }
10430}
10431
10432#[doc(hidden)]
10433#[derive(Copy, Clone, Eq, PartialEq)]
10434pub struct Sdctpidh_SPEC;
10435impl crate::sealed::RegSpec for Sdctpidh_SPEC {
10436 type DataType = u32;
10437}
10438
10439#[doc = "Slave Device Characteristic Table Provisional ID High Register"]
10440pub type Sdctpidh = crate::RegValueT<Sdctpidh_SPEC>;
10441
10442impl NoBitfieldReg<Sdctpidh_SPEC> for Sdctpidh {}
10443impl ::core::default::Default for Sdctpidh {
10444 #[inline(always)]
10445 fn default() -> Sdctpidh {
10446 <crate::RegValueT<Sdctpidh_SPEC> as RegisterValue<_>>::new(0)
10447 }
10448}
10449
10450#[doc(hidden)]
10451#[derive(Copy, Clone, Eq, PartialEq)]
10452pub struct Svdvad_SPEC;
10453impl crate::sealed::RegSpec for Svdvad_SPEC {
10454 type DataType = u32;
10455}
10456
10457#[doc = "Slave Device Address Register %s"]
10458pub type Svdvad = crate::RegValueT<Svdvad_SPEC>;
10459
10460impl Svdvad {
10461 #[doc = "Slave Address"]
10462 #[inline(always)]
10463 pub fn svad(
10464 self,
10465 ) -> crate::common::RegisterField<16, 0x3ff, 1, 0, u16, u16, Svdvad_SPEC, crate::common::R>
10466 {
10467 crate::common::RegisterField::<16,0x3ff,1,0,u16,u16,Svdvad_SPEC,crate::common::R>::from_register(self,0)
10468 }
10469
10470 #[doc = "Slave Address Length"]
10471 #[inline(always)]
10472 pub fn sadlg(
10473 self,
10474 ) -> crate::common::RegisterField<
10475 27,
10476 0x1,
10477 1,
10478 0,
10479 svdvad::Sadlg,
10480 svdvad::Sadlg,
10481 Svdvad_SPEC,
10482 crate::common::R,
10483 > {
10484 crate::common::RegisterField::<
10485 27,
10486 0x1,
10487 1,
10488 0,
10489 svdvad::Sadlg,
10490 svdvad::Sadlg,
10491 Svdvad_SPEC,
10492 crate::common::R,
10493 >::from_register(self, 0)
10494 }
10495
10496 #[doc = "Slave Static Address Valid"]
10497 #[inline(always)]
10498 pub fn sstadv(
10499 self,
10500 ) -> crate::common::RegisterField<
10501 30,
10502 0x1,
10503 1,
10504 0,
10505 svdvad::Sstadv,
10506 svdvad::Sstadv,
10507 Svdvad_SPEC,
10508 crate::common::R,
10509 > {
10510 crate::common::RegisterField::<
10511 30,
10512 0x1,
10513 1,
10514 0,
10515 svdvad::Sstadv,
10516 svdvad::Sstadv,
10517 Svdvad_SPEC,
10518 crate::common::R,
10519 >::from_register(self, 0)
10520 }
10521
10522 #[doc = "Slave Dynamic Address Valid"]
10523 #[inline(always)]
10524 pub fn sdyadv(
10525 self,
10526 ) -> crate::common::RegisterField<
10527 31,
10528 0x1,
10529 1,
10530 0,
10531 svdvad::Sdyadv,
10532 svdvad::Sdyadv,
10533 Svdvad_SPEC,
10534 crate::common::R,
10535 > {
10536 crate::common::RegisterField::<
10537 31,
10538 0x1,
10539 1,
10540 0,
10541 svdvad::Sdyadv,
10542 svdvad::Sdyadv,
10543 Svdvad_SPEC,
10544 crate::common::R,
10545 >::from_register(self, 0)
10546 }
10547}
10548impl ::core::default::Default for Svdvad {
10549 #[inline(always)]
10550 fn default() -> Svdvad {
10551 <crate::RegValueT<Svdvad_SPEC> as RegisterValue<_>>::new(0)
10552 }
10553}
10554pub mod svdvad {
10555
10556 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10557 pub struct Sadlg_SPEC;
10558 pub type Sadlg = crate::EnumBitfieldStruct<u8, Sadlg_SPEC>;
10559 impl Sadlg {
10560 #[doc = "The 7-bit address format is selected."]
10561 pub const _0: Self = Self::new(0);
10562
10563 #[doc = "The 10-bit address format is selected."]
10564 pub const _1: Self = Self::new(1);
10565 }
10566 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10567 pub struct Sstadv_SPEC;
10568 pub type Sstadv = crate::EnumBitfieldStruct<u8, Sstadv_SPEC>;
10569 impl Sstadv {
10570 #[doc = "Slave address is disabled."]
10571 pub const _0: Self = Self::new(0);
10572
10573 #[doc = "Slave address is enabled."]
10574 pub const _1: Self = Self::new(1);
10575 }
10576 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10577 pub struct Sdyadv_SPEC;
10578 pub type Sdyadv = crate::EnumBitfieldStruct<u8, Sdyadv_SPEC>;
10579 impl Sdyadv {
10580 #[doc = "Dynamic Address is disabled."]
10581 pub const _0: Self = Self::new(0);
10582
10583 #[doc = "Dynamic Address is enabled."]
10584 pub const _1: Self = Self::new(1);
10585 }
10586}
10587#[doc(hidden)]
10588#[derive(Copy, Clone, Eq, PartialEq)]
10589pub struct Csecmd_SPEC;
10590impl crate::sealed::RegSpec for Csecmd_SPEC {
10591 type DataType = u32;
10592}
10593
10594#[doc = "CCC Slave Events Command Register"]
10595pub type Csecmd = crate::RegValueT<Csecmd_SPEC>;
10596
10597impl Csecmd {
10598 #[doc = "Slave Interrupt Requests Enable"]
10599 #[inline(always)]
10600 pub fn svirqe(
10601 self,
10602 ) -> crate::common::RegisterField<
10603 0,
10604 0x1,
10605 1,
10606 0,
10607 csecmd::Svirqe,
10608 csecmd::Svirqe,
10609 Csecmd_SPEC,
10610 crate::common::RW,
10611 > {
10612 crate::common::RegisterField::<
10613 0,
10614 0x1,
10615 1,
10616 0,
10617 csecmd::Svirqe,
10618 csecmd::Svirqe,
10619 Csecmd_SPEC,
10620 crate::common::RW,
10621 >::from_register(self, 0)
10622 }
10623
10624 #[doc = "Mastership Requests Enable"]
10625 #[inline(always)]
10626 pub fn msrqe(
10627 self,
10628 ) -> crate::common::RegisterField<
10629 1,
10630 0x1,
10631 1,
10632 0,
10633 csecmd::Msrqe,
10634 csecmd::Msrqe,
10635 Csecmd_SPEC,
10636 crate::common::RW,
10637 > {
10638 crate::common::RegisterField::<
10639 1,
10640 0x1,
10641 1,
10642 0,
10643 csecmd::Msrqe,
10644 csecmd::Msrqe,
10645 Csecmd_SPEC,
10646 crate::common::RW,
10647 >::from_register(self, 0)
10648 }
10649}
10650impl ::core::default::Default for Csecmd {
10651 #[inline(always)]
10652 fn default() -> Csecmd {
10653 <crate::RegValueT<Csecmd_SPEC> as RegisterValue<_>>::new(0)
10654 }
10655}
10656pub mod csecmd {
10657
10658 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10659 pub struct Svirqe_SPEC;
10660 pub type Svirqe = crate::EnumBitfieldStruct<u8, Svirqe_SPEC>;
10661 impl Svirqe {
10662 #[doc = "DISABLED: Slave-initiated Interrupts is Disabled by the Master to control."]
10663 pub const _0: Self = Self::new(0);
10664
10665 #[doc = "ENABLED: Slave-initiated Interrupts is Enabled by the Master to control."]
10666 pub const _1: Self = Self::new(1);
10667 }
10668 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10669 pub struct Msrqe_SPEC;
10670 pub type Msrqe = crate::EnumBitfieldStruct<u8, Msrqe_SPEC>;
10671 impl Msrqe {
10672 #[doc = "DISABLED: Mastership requests from Secondary Masters is Disabled by the Current Master to control."]
10673 pub const _0: Self = Self::new(0);
10674
10675 #[doc = "ENABLED: Mastership requests from Secondary Masters is Enabled by the Current Master to control."]
10676 pub const _1: Self = Self::new(1);
10677 }
10678}
10679#[doc(hidden)]
10680#[derive(Copy, Clone, Eq, PartialEq)]
10681pub struct Ceactst_SPEC;
10682impl crate::sealed::RegSpec for Ceactst_SPEC {
10683 type DataType = u32;
10684}
10685
10686#[doc = "CCC Enter Activity State Register"]
10687pub type Ceactst = crate::RegValueT<Ceactst_SPEC>;
10688
10689impl Ceactst {
10690 #[doc = "Activity State"]
10691 #[inline(always)]
10692 pub fn actst(
10693 self,
10694 ) -> crate::common::RegisterField<
10695 0,
10696 0xf,
10697 1,
10698 0,
10699 ceactst::Actst,
10700 ceactst::Actst,
10701 Ceactst_SPEC,
10702 crate::common::RW,
10703 > {
10704 crate::common::RegisterField::<
10705 0,
10706 0xf,
10707 1,
10708 0,
10709 ceactst::Actst,
10710 ceactst::Actst,
10711 Ceactst_SPEC,
10712 crate::common::RW,
10713 >::from_register(self, 0)
10714 }
10715}
10716impl ::core::default::Default for Ceactst {
10717 #[inline(always)]
10718 fn default() -> Ceactst {
10719 <crate::RegValueT<Ceactst_SPEC> as RegisterValue<_>>::new(0)
10720 }
10721}
10722pub mod ceactst {
10723
10724 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10725 pub struct Actst_SPEC;
10726 pub type Actst = crate::EnumBitfieldStruct<u8, Actst_SPEC>;
10727 impl Actst {
10728 #[doc = "ENTAS0 (1µs: Latency-free operation)"]
10729 pub const _0_X_1: Self = Self::new(1);
10730
10731 #[doc = "ENTAS1 (100 µs)"]
10732 pub const _0_X_2: Self = Self::new(2);
10733
10734 #[doc = "ENTAS2 (2 ms)"]
10735 pub const _0_X_4: Self = Self::new(4);
10736
10737 #[doc = "ENTAS3 (50 ms: Lowest-activity operation)"]
10738 pub const _0_X_8: Self = Self::new(8);
10739 }
10740}
10741#[doc(hidden)]
10742#[derive(Copy, Clone, Eq, PartialEq)]
10743pub struct Cmwlg_SPEC;
10744impl crate::sealed::RegSpec for Cmwlg_SPEC {
10745 type DataType = u32;
10746}
10747
10748#[doc = "CCC Max Write Length Register"]
10749pub type Cmwlg = crate::RegValueT<Cmwlg_SPEC>;
10750
10751impl Cmwlg {
10752 #[doc = "Max Write Length"]
10753 #[inline(always)]
10754 pub fn mwlg(
10755 self,
10756 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmwlg_SPEC, crate::common::RW>
10757 {
10758 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmwlg_SPEC,crate::common::RW>::from_register(self,0)
10759 }
10760}
10761impl ::core::default::Default for Cmwlg {
10762 #[inline(always)]
10763 fn default() -> Cmwlg {
10764 <crate::RegValueT<Cmwlg_SPEC> as RegisterValue<_>>::new(0)
10765 }
10766}
10767
10768#[doc(hidden)]
10769#[derive(Copy, Clone, Eq, PartialEq)]
10770pub struct Cmrlg_SPEC;
10771impl crate::sealed::RegSpec for Cmrlg_SPEC {
10772 type DataType = u32;
10773}
10774
10775#[doc = "CCC Max Read Length Register"]
10776pub type Cmrlg = crate::RegValueT<Cmrlg_SPEC>;
10777
10778impl Cmrlg {
10779 #[doc = "Max Read Length"]
10780 #[inline(always)]
10781 pub fn mrlg(
10782 self,
10783 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cmrlg_SPEC, crate::common::RW>
10784 {
10785 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
10786 }
10787
10788 #[doc = "IBI Payload Size"]
10789 #[inline(always)]
10790 pub fn ibipsz(
10791 self,
10792 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Cmrlg_SPEC, crate::common::RW> {
10793 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Cmrlg_SPEC,crate::common::RW>::from_register(self,0)
10794 }
10795}
10796impl ::core::default::Default for Cmrlg {
10797 #[inline(always)]
10798 fn default() -> Cmrlg {
10799 <crate::RegValueT<Cmrlg_SPEC> as RegisterValue<_>>::new(0)
10800 }
10801}
10802
10803#[doc(hidden)]
10804#[derive(Copy, Clone, Eq, PartialEq)]
10805pub struct Cetstmd_SPEC;
10806impl crate::sealed::RegSpec for Cetstmd_SPEC {
10807 type DataType = u32;
10808}
10809
10810#[doc = "CCC Enter Test Mode Register"]
10811pub type Cetstmd = crate::RegValueT<Cetstmd_SPEC>;
10812
10813impl Cetstmd {
10814 #[doc = "Test Mode"]
10815 #[inline(always)]
10816 pub fn tstmd(
10817 self,
10818 ) -> crate::common::RegisterField<
10819 0,
10820 0xff,
10821 1,
10822 0,
10823 cetstmd::Tstmd,
10824 cetstmd::Tstmd,
10825 Cetstmd_SPEC,
10826 crate::common::R,
10827 > {
10828 crate::common::RegisterField::<
10829 0,
10830 0xff,
10831 1,
10832 0,
10833 cetstmd::Tstmd,
10834 cetstmd::Tstmd,
10835 Cetstmd_SPEC,
10836 crate::common::R,
10837 >::from_register(self, 0)
10838 }
10839}
10840impl ::core::default::Default for Cetstmd {
10841 #[inline(always)]
10842 fn default() -> Cetstmd {
10843 <crate::RegValueT<Cetstmd_SPEC> as RegisterValue<_>>::new(0)
10844 }
10845}
10846pub mod cetstmd {
10847
10848 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10849 pub struct Tstmd_SPEC;
10850 pub type Tstmd = crate::EnumBitfieldStruct<u8, Tstmd_SPEC>;
10851 impl Tstmd {
10852 #[doc = "Exit Test Mode This value removes all I3C devices from Test Mode."]
10853 pub const _0_X_00: Self = Self::new(0);
10854
10855 #[doc = "Vendor Test Mode This value indicates that I3C devices shall return a random 32bit value in the provisional ID during the Dynamic Address Assignment procedure."]
10856 pub const _0_X_01: Self = Self::new(1);
10857 }
10858}
10859#[doc(hidden)]
10860#[derive(Copy, Clone, Eq, PartialEq)]
10861pub struct Cgdvst_SPEC;
10862impl crate::sealed::RegSpec for Cgdvst_SPEC {
10863 type DataType = u32;
10864}
10865
10866#[doc = "CCC Get Device Status Register"]
10867pub type Cgdvst = crate::RegValueT<Cgdvst_SPEC>;
10868
10869impl Cgdvst {
10870 #[doc = "Pending Interrupt"]
10871 #[inline(always)]
10872 pub fn pndint(
10873 self,
10874 ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
10875 crate::common::RegisterField::<0,0xf,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
10876 }
10877
10878 #[doc = "Protocol Error"]
10879 #[inline(always)]
10880 pub fn prte(
10881 self,
10882 ) -> crate::common::RegisterField<
10883 5,
10884 0x1,
10885 1,
10886 0,
10887 cgdvst::Prte,
10888 cgdvst::Prte,
10889 Cgdvst_SPEC,
10890 crate::common::RW,
10891 > {
10892 crate::common::RegisterField::<
10893 5,
10894 0x1,
10895 1,
10896 0,
10897 cgdvst::Prte,
10898 cgdvst::Prte,
10899 Cgdvst_SPEC,
10900 crate::common::RW,
10901 >::from_register(self, 0)
10902 }
10903
10904 #[doc = "Slave Device’s current Activity Mode"]
10905 #[inline(always)]
10906 pub fn actmd(
10907 self,
10908 ) -> crate::common::RegisterField<
10909 6,
10910 0x3,
10911 1,
10912 0,
10913 cgdvst::Actmd,
10914 cgdvst::Actmd,
10915 Cgdvst_SPEC,
10916 crate::common::RW,
10917 > {
10918 crate::common::RegisterField::<
10919 6,
10920 0x3,
10921 1,
10922 0,
10923 cgdvst::Actmd,
10924 cgdvst::Actmd,
10925 Cgdvst_SPEC,
10926 crate::common::RW,
10927 >::from_register(self, 0)
10928 }
10929
10930 #[doc = "Vendor Reserved"]
10931 #[inline(always)]
10932 pub fn vdrsv(
10933 self,
10934 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Cgdvst_SPEC, crate::common::RW> {
10935 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Cgdvst_SPEC,crate::common::RW>::from_register(self,0)
10936 }
10937}
10938impl ::core::default::Default for Cgdvst {
10939 #[inline(always)]
10940 fn default() -> Cgdvst {
10941 <crate::RegValueT<Cgdvst_SPEC> as RegisterValue<_>>::new(0)
10942 }
10943}
10944pub mod cgdvst {
10945
10946 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10947 pub struct Prte_SPEC;
10948 pub type Prte = crate::EnumBitfieldStruct<u8, Prte_SPEC>;
10949 impl Prte {
10950 #[doc = "The Slave has not detected a protocol error since the last Status read."]
10951 pub const _0: Self = Self::new(0);
10952
10953 #[doc = "The Slave has detected a protocol error since the last Status read."]
10954 pub const _1: Self = Self::new(1);
10955 }
10956 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10957 pub struct Actmd_SPEC;
10958 pub type Actmd = crate::EnumBitfieldStruct<u8, Actmd_SPEC>;
10959 impl Actmd {
10960 #[doc = "Activity Mode 0"]
10961 pub const _00: Self = Self::new(0);
10962
10963 #[doc = "Activity Mode 1"]
10964 pub const _01: Self = Self::new(1);
10965
10966 #[doc = "Activity Mode 2"]
10967 pub const _10: Self = Self::new(2);
10968
10969 #[doc = "Activity Mode 3"]
10970 pub const _11: Self = Self::new(3);
10971 }
10972}
10973#[doc(hidden)]
10974#[derive(Copy, Clone, Eq, PartialEq)]
10975pub struct Cmdspw_SPEC;
10976impl crate::sealed::RegSpec for Cmdspw_SPEC {
10977 type DataType = u32;
10978}
10979
10980#[doc = "CCC Max Data Speed W (Write) Register"]
10981pub type Cmdspw = crate::RegValueT<Cmdspw_SPEC>;
10982
10983impl Cmdspw {
10984 #[doc = "Maximum Sustained Write Data Rate"]
10985 #[inline(always)]
10986 pub fn mswdr(
10987 self,
10988 ) -> crate::common::RegisterField<
10989 0,
10990 0x7,
10991 1,
10992 0,
10993 cmdspw::Mswdr,
10994 cmdspw::Mswdr,
10995 Cmdspw_SPEC,
10996 crate::common::RW,
10997 > {
10998 crate::common::RegisterField::<
10999 0,
11000 0x7,
11001 1,
11002 0,
11003 cmdspw::Mswdr,
11004 cmdspw::Mswdr,
11005 Cmdspw_SPEC,
11006 crate::common::RW,
11007 >::from_register(self, 0)
11008 }
11009}
11010impl ::core::default::Default for Cmdspw {
11011 #[inline(always)]
11012 fn default() -> Cmdspw {
11013 <crate::RegValueT<Cmdspw_SPEC> as RegisterValue<_>>::new(0)
11014 }
11015}
11016pub mod cmdspw {
11017
11018 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11019 pub struct Mswdr_SPEC;
11020 pub type Mswdr = crate::EnumBitfieldStruct<u8, Mswdr_SPEC>;
11021 impl Mswdr {
11022 #[doc = "fscl Max (default value)"]
11023 pub const _000: Self = Self::new(0);
11024
11025 #[doc = "8 MHz"]
11026 pub const _001: Self = Self::new(1);
11027
11028 #[doc = "6 MHz"]
11029 pub const _010: Self = Self::new(2);
11030
11031 #[doc = "4 MHz"]
11032 pub const _011: Self = Self::new(3);
11033
11034 #[doc = "2 MHz"]
11035 pub const _100: Self = Self::new(4);
11036 }
11037}
11038#[doc(hidden)]
11039#[derive(Copy, Clone, Eq, PartialEq)]
11040pub struct Cmdspr_SPEC;
11041impl crate::sealed::RegSpec for Cmdspr_SPEC {
11042 type DataType = u32;
11043}
11044
11045#[doc = "CCC Max Data Speed R (Read) Register"]
11046pub type Cmdspr = crate::RegValueT<Cmdspr_SPEC>;
11047
11048impl Cmdspr {
11049 #[doc = "Maximum Sustained Read Data Rate"]
11050 #[inline(always)]
11051 pub fn msrdr(
11052 self,
11053 ) -> crate::common::RegisterField<
11054 0,
11055 0x7,
11056 1,
11057 0,
11058 cmdspr::Msrdr,
11059 cmdspr::Msrdr,
11060 Cmdspr_SPEC,
11061 crate::common::RW,
11062 > {
11063 crate::common::RegisterField::<
11064 0,
11065 0x7,
11066 1,
11067 0,
11068 cmdspr::Msrdr,
11069 cmdspr::Msrdr,
11070 Cmdspr_SPEC,
11071 crate::common::RW,
11072 >::from_register(self, 0)
11073 }
11074
11075 #[doc = "Clock to Data Turnaround Time (TSCO)"]
11076 #[inline(always)]
11077 pub fn cdttim(
11078 self,
11079 ) -> crate::common::RegisterField<
11080 3,
11081 0x7,
11082 1,
11083 0,
11084 cmdspr::Cdttim,
11085 cmdspr::Cdttim,
11086 Cmdspr_SPEC,
11087 crate::common::RW,
11088 > {
11089 crate::common::RegisterField::<
11090 3,
11091 0x7,
11092 1,
11093 0,
11094 cmdspr::Cdttim,
11095 cmdspr::Cdttim,
11096 Cmdspr_SPEC,
11097 crate::common::RW,
11098 >::from_register(self, 0)
11099 }
11100}
11101impl ::core::default::Default for Cmdspr {
11102 #[inline(always)]
11103 fn default() -> Cmdspr {
11104 <crate::RegValueT<Cmdspr_SPEC> as RegisterValue<_>>::new(0)
11105 }
11106}
11107pub mod cmdspr {
11108
11109 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11110 pub struct Msrdr_SPEC;
11111 pub type Msrdr = crate::EnumBitfieldStruct<u8, Msrdr_SPEC>;
11112 impl Msrdr {
11113 #[doc = "fscl Max (default value)"]
11114 pub const _000: Self = Self::new(0);
11115
11116 #[doc = "8 MHz"]
11117 pub const _001: Self = Self::new(1);
11118
11119 #[doc = "6 MHz"]
11120 pub const _010: Self = Self::new(2);
11121
11122 #[doc = "4 MHz"]
11123 pub const _011: Self = Self::new(3);
11124
11125 #[doc = "2 MHz"]
11126 pub const _100: Self = Self::new(4);
11127 }
11128 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11129 pub struct Cdttim_SPEC;
11130 pub type Cdttim = crate::EnumBitfieldStruct<u8, Cdttim_SPEC>;
11131 impl Cdttim {
11132 #[doc = "8 ns or less (default value)"]
11133 pub const _000: Self = Self::new(0);
11134
11135 #[doc = "9 ns or less"]
11136 pub const _001: Self = Self::new(1);
11137
11138 #[doc = "10 ns or less"]
11139 pub const _010: Self = Self::new(2);
11140
11141 #[doc = "11 ns or less"]
11142 pub const _011: Self = Self::new(3);
11143
11144 #[doc = "12 ns or less"]
11145 pub const _100: Self = Self::new(4);
11146
11147 #[doc = "TSCO is more than 12 ns, and is reported by private agreement."]
11148 pub const _111: Self = Self::new(7);
11149 }
11150}
11151#[doc(hidden)]
11152#[derive(Copy, Clone, Eq, PartialEq)]
11153pub struct Cmdspt_SPEC;
11154impl crate::sealed::RegSpec for Cmdspt_SPEC {
11155 type DataType = u32;
11156}
11157
11158#[doc = "CCC Max Data Speed T (Turnaround) Register"]
11159pub type Cmdspt = crate::RegValueT<Cmdspt_SPEC>;
11160
11161impl Cmdspt {
11162 #[doc = "Maximum Read Turnaround Time"]
11163 #[inline(always)]
11164 pub fn mrttim(
11165 self,
11166 ) -> crate::common::RegisterField<0, 0xffffff, 1, 0, u32, u32, Cmdspt_SPEC, crate::common::RW>
11167 {
11168 crate::common::RegisterField::<0,0xffffff,1,0,u32,u32,Cmdspt_SPEC,crate::common::RW>::from_register(self,0)
11169 }
11170
11171 #[doc = "Maximum Read Turnaround Time Enable"]
11172 #[inline(always)]
11173 pub fn mrte(
11174 self,
11175 ) -> crate::common::RegisterField<
11176 31,
11177 0x1,
11178 1,
11179 0,
11180 cmdspt::Mrte,
11181 cmdspt::Mrte,
11182 Cmdspt_SPEC,
11183 crate::common::RW,
11184 > {
11185 crate::common::RegisterField::<
11186 31,
11187 0x1,
11188 1,
11189 0,
11190 cmdspt::Mrte,
11191 cmdspt::Mrte,
11192 Cmdspt_SPEC,
11193 crate::common::RW,
11194 >::from_register(self, 0)
11195 }
11196}
11197impl ::core::default::Default for Cmdspt {
11198 #[inline(always)]
11199 fn default() -> Cmdspt {
11200 <crate::RegValueT<Cmdspt_SPEC> as RegisterValue<_>>::new(0)
11201 }
11202}
11203pub mod cmdspt {
11204
11205 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11206 pub struct Mrte_SPEC;
11207 pub type Mrte = crate::EnumBitfieldStruct<u8, Mrte_SPEC>;
11208 impl Mrte {
11209 #[doc = "Disables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 1: Without Turnaround)"]
11210 pub const _0: Self = Self::new(0);
11211
11212 #[doc = "Enables transmission of the Maximum Read Turnaround Time. (GETMXDS Format 2: With Turnaround)"]
11213 pub const _1: Self = Self::new(1);
11214 }
11215}
11216#[doc(hidden)]
11217#[derive(Copy, Clone, Eq, PartialEq)]
11218pub struct Cetsm_SPEC;
11219impl crate::sealed::RegSpec for Cetsm_SPEC {
11220 type DataType = u32;
11221}
11222
11223#[doc = "CCC Exchange Timing Support Information M (Mode) Register"]
11224pub type Cetsm = crate::RegValueT<Cetsm_SPEC>;
11225
11226impl Cetsm {
11227 #[doc = "Supports Sync Mode"]
11228 #[inline(always)]
11229 pub fn sptsyn(
11230 self,
11231 ) -> crate::common::RegisterField<
11232 0,
11233 0x1,
11234 1,
11235 0,
11236 cetsm::Sptsyn,
11237 cetsm::Sptsyn,
11238 Cetsm_SPEC,
11239 crate::common::RW,
11240 > {
11241 crate::common::RegisterField::<
11242 0,
11243 0x1,
11244 1,
11245 0,
11246 cetsm::Sptsyn,
11247 cetsm::Sptsyn,
11248 Cetsm_SPEC,
11249 crate::common::RW,
11250 >::from_register(self, 0)
11251 }
11252
11253 #[doc = "Support Async Mode 0"]
11254 #[inline(always)]
11255 pub fn sptasyn0(
11256 self,
11257 ) -> crate::common::RegisterField<
11258 1,
11259 0x1,
11260 1,
11261 0,
11262 cetsm::Sptasyn0,
11263 cetsm::Sptasyn0,
11264 Cetsm_SPEC,
11265 crate::common::RW,
11266 > {
11267 crate::common::RegisterField::<
11268 1,
11269 0x1,
11270 1,
11271 0,
11272 cetsm::Sptasyn0,
11273 cetsm::Sptasyn0,
11274 Cetsm_SPEC,
11275 crate::common::RW,
11276 >::from_register(self, 0)
11277 }
11278
11279 #[doc = "Support Async Mode 1"]
11280 #[inline(always)]
11281 pub fn sptasyn1(
11282 self,
11283 ) -> crate::common::RegisterField<
11284 2,
11285 0x1,
11286 1,
11287 0,
11288 cetsm::Sptasyn1,
11289 cetsm::Sptasyn1,
11290 Cetsm_SPEC,
11291 crate::common::RW,
11292 > {
11293 crate::common::RegisterField::<
11294 2,
11295 0x1,
11296 1,
11297 0,
11298 cetsm::Sptasyn1,
11299 cetsm::Sptasyn1,
11300 Cetsm_SPEC,
11301 crate::common::RW,
11302 >::from_register(self, 0)
11303 }
11304
11305 #[doc = "Frequency Byte"]
11306 #[inline(always)]
11307 pub fn freq(
11308 self,
11309 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Cetsm_SPEC, crate::common::RW> {
11310 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Cetsm_SPEC,crate::common::RW>::from_register(self,0)
11311 }
11312
11313 #[doc = "Inaccuracy Byte"]
11314 #[inline(always)]
11315 pub fn inac(
11316 self,
11317 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Cetsm_SPEC, crate::common::RW> {
11318 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Cetsm_SPEC,crate::common::RW>::from_register(self,0)
11319 }
11320}
11321impl ::core::default::Default for Cetsm {
11322 #[inline(always)]
11323 fn default() -> Cetsm {
11324 <crate::RegValueT<Cetsm_SPEC> as RegisterValue<_>>::new(0)
11325 }
11326}
11327pub mod cetsm {
11328
11329 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11330 pub struct Sptsyn_SPEC;
11331 pub type Sptsyn = crate::EnumBitfieldStruct<u8, Sptsyn_SPEC>;
11332 impl Sptsyn {
11333 #[doc = "Sync Mode is not supported."]
11334 pub const _0: Self = Self::new(0);
11335
11336 #[doc = "Sync Mode is supported."]
11337 pub const _1: Self = Self::new(1);
11338 }
11339 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11340 pub struct Sptasyn0_SPEC;
11341 pub type Sptasyn0 = crate::EnumBitfieldStruct<u8, Sptasyn0_SPEC>;
11342 impl Sptasyn0 {
11343 #[doc = "Async Mode 0 is not supported."]
11344 pub const _0: Self = Self::new(0);
11345
11346 #[doc = "Async Mode 0 is supported."]
11347 pub const _1: Self = Self::new(1);
11348 }
11349 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11350 pub struct Sptasyn1_SPEC;
11351 pub type Sptasyn1 = crate::EnumBitfieldStruct<u8, Sptasyn1_SPEC>;
11352 impl Sptasyn1 {
11353 #[doc = "Async Mode 1 is not supported."]
11354 pub const _0: Self = Self::new(0);
11355
11356 #[doc = "Async Mode 1 is supported."]
11357 pub const _1: Self = Self::new(1);
11358 }
11359}
11360#[doc(hidden)]
11361#[derive(Copy, Clone, Eq, PartialEq)]
11362pub struct Cetss_SPEC;
11363impl crate::sealed::RegSpec for Cetss_SPEC {
11364 type DataType = u32;
11365}
11366
11367#[doc = "CCC Exchange Timing Support Information S (State) Register"]
11368pub type Cetss = crate::RegValueT<Cetss_SPEC>;
11369
11370impl Cetss {
11371 #[doc = "Sync Mode Enabled"]
11372 #[inline(always)]
11373 pub fn syne(
11374 self,
11375 ) -> crate::common::RegisterField<
11376 0,
11377 0x1,
11378 1,
11379 0,
11380 cetss::Syne,
11381 cetss::Syne,
11382 Cetss_SPEC,
11383 crate::common::RW,
11384 > {
11385 crate::common::RegisterField::<
11386 0,
11387 0x1,
11388 1,
11389 0,
11390 cetss::Syne,
11391 cetss::Syne,
11392 Cetss_SPEC,
11393 crate::common::RW,
11394 >::from_register(self, 0)
11395 }
11396
11397 #[doc = "Async Mode Enabled"]
11398 #[inline(always)]
11399 pub fn asyne(
11400 self,
11401 ) -> crate::common::RegisterField<
11402 1,
11403 0x3,
11404 1,
11405 0,
11406 cetss::Asyne,
11407 cetss::Asyne,
11408 Cetss_SPEC,
11409 crate::common::RW,
11410 > {
11411 crate::common::RegisterField::<
11412 1,
11413 0x3,
11414 1,
11415 0,
11416 cetss::Asyne,
11417 cetss::Asyne,
11418 Cetss_SPEC,
11419 crate::common::RW,
11420 >::from_register(self, 0)
11421 }
11422
11423 #[doc = "Internal Counter Overflow"]
11424 #[inline(always)]
11425 pub fn icovf(
11426 self,
11427 ) -> crate::common::RegisterField<
11428 7,
11429 0x1,
11430 1,
11431 0,
11432 cetss::Icovf,
11433 cetss::Icovf,
11434 Cetss_SPEC,
11435 crate::common::RW,
11436 > {
11437 crate::common::RegisterField::<
11438 7,
11439 0x1,
11440 1,
11441 0,
11442 cetss::Icovf,
11443 cetss::Icovf,
11444 Cetss_SPEC,
11445 crate::common::RW,
11446 >::from_register(self, 0)
11447 }
11448}
11449impl ::core::default::Default for Cetss {
11450 #[inline(always)]
11451 fn default() -> Cetss {
11452 <crate::RegValueT<Cetss_SPEC> as RegisterValue<_>>::new(0)
11453 }
11454}
11455pub mod cetss {
11456
11457 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11458 pub struct Syne_SPEC;
11459 pub type Syne = crate::EnumBitfieldStruct<u8, Syne_SPEC>;
11460 impl Syne {
11461 #[doc = "Sync Mode Disabled"]
11462 pub const _0: Self = Self::new(0);
11463
11464 #[doc = "Sync Mode Enabled"]
11465 pub const _1: Self = Self::new(1);
11466 }
11467 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11468 pub struct Asyne_SPEC;
11469 pub type Asyne = crate::EnumBitfieldStruct<u8, Asyne_SPEC>;
11470 impl Asyne {
11471 #[doc = "All Mode Disable"]
11472 pub const _00: Self = Self::new(0);
11473
11474 #[doc = "Async Mode 0 Enabled"]
11475 pub const _01: Self = Self::new(1);
11476
11477 #[doc = "Async Mode 1 Enabled"]
11478 pub const _10: Self = Self::new(2);
11479 }
11480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11481 pub struct Icovf_SPEC;
11482 pub type Icovf = crate::EnumBitfieldStruct<u8, Icovf_SPEC>;
11483 impl Icovf {
11484 #[doc = "Slave has not experienced a counter overflow since the most recent previous check."]
11485 pub const _0: Self = Self::new(0);
11486
11487 #[doc = "Slave experienced a counter overflow since the most recent previous check."]
11488 pub const _1: Self = Self::new(1);
11489 }
11490}
11491#[doc(hidden)]
11492#[derive(Copy, Clone, Eq, PartialEq)]
11493pub struct Bitcnt_SPEC;
11494impl crate::sealed::RegSpec for Bitcnt_SPEC {
11495 type DataType = u32;
11496}
11497
11498#[doc = "Bit Count Register"]
11499pub type Bitcnt = crate::RegValueT<Bitcnt_SPEC>;
11500
11501impl Bitcnt {
11502 #[doc = "Bit Counter"]
11503 #[inline(always)]
11504 pub fn bcnt(
11505 self,
11506 ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Bitcnt_SPEC, crate::common::R> {
11507 crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Bitcnt_SPEC,crate::common::R>::from_register(self,0)
11508 }
11509}
11510impl ::core::default::Default for Bitcnt {
11511 #[inline(always)]
11512 fn default() -> Bitcnt {
11513 <crate::RegValueT<Bitcnt_SPEC> as RegisterValue<_>>::new(0)
11514 }
11515}
11516
11517#[doc(hidden)]
11518#[derive(Copy, Clone, Eq, PartialEq)]
11519pub struct Nqstlv_SPEC;
11520impl crate::sealed::RegSpec for Nqstlv_SPEC {
11521 type DataType = u32;
11522}
11523
11524#[doc = "Normal Queue Status Level Register"]
11525pub type Nqstlv = crate::RegValueT<Nqstlv_SPEC>;
11526
11527impl Nqstlv {
11528 #[doc = "Normal Command Queue Free Level"]
11529 #[inline(always)]
11530 pub fn cmdqflv(
11531 self,
11532 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11533 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11534 }
11535
11536 #[doc = "Normal Response Queue Level"]
11537 #[inline(always)]
11538 pub fn rspqlv(
11539 self,
11540 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11541 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11542 }
11543
11544 #[doc = "Normal IBI Queue Level"]
11545 #[inline(always)]
11546 pub fn ibiqlv(
11547 self,
11548 ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11549 crate::common::RegisterField::<16,0xff,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11550 }
11551
11552 #[doc = "Normal IBI Status Count"]
11553 #[inline(always)]
11554 pub fn ibiscnt(
11555 self,
11556 ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Nqstlv_SPEC, crate::common::R> {
11557 crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Nqstlv_SPEC,crate::common::R>::from_register(self,0)
11558 }
11559}
11560impl ::core::default::Default for Nqstlv {
11561 #[inline(always)]
11562 fn default() -> Nqstlv {
11563 <crate::RegValueT<Nqstlv_SPEC> as RegisterValue<_>>::new(4)
11564 }
11565}
11566
11567#[doc(hidden)]
11568#[derive(Copy, Clone, Eq, PartialEq)]
11569pub struct Ndbstlv0_SPEC;
11570impl crate::sealed::RegSpec for Ndbstlv0_SPEC {
11571 type DataType = u32;
11572}
11573
11574#[doc = "Normal Data Buffer Status Level Register 0"]
11575pub type Ndbstlv0 = crate::RegValueT<Ndbstlv0_SPEC>;
11576
11577impl Ndbstlv0 {
11578 #[doc = "Normal Transmit Data Buffer Free Level"]
11579 #[inline(always)]
11580 pub fn tdbflv(
11581 self,
11582 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
11583 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
11584 }
11585
11586 #[doc = "Normal Receive Data Buffer Level"]
11587 #[inline(always)]
11588 pub fn rdblv(
11589 self,
11590 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ndbstlv0_SPEC, crate::common::R> {
11591 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ndbstlv0_SPEC,crate::common::R>::from_register(self,0)
11592 }
11593}
11594impl ::core::default::Default for Ndbstlv0 {
11595 #[inline(always)]
11596 fn default() -> Ndbstlv0 {
11597 <crate::RegValueT<Ndbstlv0_SPEC> as RegisterValue<_>>::new(1)
11598 }
11599}
11600
11601#[doc(hidden)]
11602#[derive(Copy, Clone, Eq, PartialEq)]
11603pub struct Nrsqstlv_SPEC;
11604impl crate::sealed::RegSpec for Nrsqstlv_SPEC {
11605 type DataType = u32;
11606}
11607
11608#[doc = "Normal Receive Status Queue Status Level Register"]
11609pub type Nrsqstlv = crate::RegValueT<Nrsqstlv_SPEC>;
11610
11611impl Nrsqstlv {
11612 #[doc = "Normal Receive Status Queue Level"]
11613 #[inline(always)]
11614 pub fn rsqlv(
11615 self,
11616 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Nrsqstlv_SPEC, crate::common::R> {
11617 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Nrsqstlv_SPEC,crate::common::R>::from_register(self,0)
11618 }
11619}
11620impl ::core::default::Default for Nrsqstlv {
11621 #[inline(always)]
11622 fn default() -> Nrsqstlv {
11623 <crate::RegValueT<Nrsqstlv_SPEC> as RegisterValue<_>>::new(0)
11624 }
11625}
11626
11627#[doc(hidden)]
11628#[derive(Copy, Clone, Eq, PartialEq)]
11629pub struct Hqstlv_SPEC;
11630impl crate::sealed::RegSpec for Hqstlv_SPEC {
11631 type DataType = u32;
11632}
11633
11634#[doc = "High Priority Queue Status Level Register"]
11635pub type Hqstlv = crate::RegValueT<Hqstlv_SPEC>;
11636
11637impl Hqstlv {
11638 #[doc = "High Priority Command Queue Level"]
11639 #[inline(always)]
11640 pub fn cmdqlv(
11641 self,
11642 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hqstlv_SPEC, crate::common::R> {
11643 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hqstlv_SPEC,crate::common::R>::from_register(self,0)
11644 }
11645
11646 #[doc = "High Priority Response Queue Level"]
11647 #[inline(always)]
11648 pub fn rspqlv(
11649 self,
11650 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Hqstlv_SPEC, crate::common::R> {
11651 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Hqstlv_SPEC,crate::common::R>::from_register(self,0)
11652 }
11653}
11654impl ::core::default::Default for Hqstlv {
11655 #[inline(always)]
11656 fn default() -> Hqstlv {
11657 <crate::RegValueT<Hqstlv_SPEC> as RegisterValue<_>>::new(2)
11658 }
11659}
11660
11661#[doc(hidden)]
11662#[derive(Copy, Clone, Eq, PartialEq)]
11663pub struct Hdbstlv_SPEC;
11664impl crate::sealed::RegSpec for Hdbstlv_SPEC {
11665 type DataType = u32;
11666}
11667
11668#[doc = "High Priority Data Buffer Status Level Register"]
11669pub type Hdbstlv = crate::RegValueT<Hdbstlv_SPEC>;
11670
11671impl Hdbstlv {
11672 #[doc = "High Priority Transmit Data Buffer Free Level"]
11673 #[inline(always)]
11674 pub fn tdbflv(
11675 self,
11676 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hdbstlv_SPEC, crate::common::R> {
11677 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
11678 }
11679
11680 #[doc = "High Priority Receive Data Buffer Level"]
11681 #[inline(always)]
11682 pub fn rdblv(
11683 self,
11684 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Hdbstlv_SPEC, crate::common::R> {
11685 crate::common::RegisterField::<8,0xff,1,0,u8,u8,Hdbstlv_SPEC,crate::common::R>::from_register(self,0)
11686 }
11687}
11688impl ::core::default::Default for Hdbstlv {
11689 #[inline(always)]
11690 fn default() -> Hdbstlv {
11691 <crate::RegValueT<Hdbstlv_SPEC> as RegisterValue<_>>::new(2)
11692 }
11693}
11694
11695#[doc(hidden)]
11696#[derive(Copy, Clone, Eq, PartialEq)]
11697pub struct Prstdbg_SPEC;
11698impl crate::sealed::RegSpec for Prstdbg_SPEC {
11699 type DataType = u32;
11700}
11701
11702#[doc = "Present State Debug Register"]
11703pub type Prstdbg = crate::RegValueT<Prstdbg_SPEC>;
11704
11705impl Prstdbg {
11706 #[doc = "SCL Line Signal Level"]
11707 #[inline(always)]
11708 pub fn scilv(
11709 self,
11710 ) -> crate::common::RegisterFieldBool<0, 1, 0, Prstdbg_SPEC, crate::common::R> {
11711 crate::common::RegisterFieldBool::<0, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
11712 self, 0,
11713 )
11714 }
11715
11716 #[doc = "SDA Line Signal Level"]
11717 #[inline(always)]
11718 pub fn sdilv(
11719 self,
11720 ) -> crate::common::RegisterFieldBool<1, 1, 0, Prstdbg_SPEC, crate::common::R> {
11721 crate::common::RegisterFieldBool::<1, 1, 0, Prstdbg_SPEC, crate::common::R>::from_register(
11722 self, 0,
11723 )
11724 }
11725
11726 #[doc = "SCL Output Level"]
11727 #[inline(always)]
11728 pub fn scolv(
11729 self,
11730 ) -> crate::common::RegisterField<
11731 2,
11732 0x1,
11733 1,
11734 0,
11735 prstdbg::Scolv,
11736 prstdbg::Scolv,
11737 Prstdbg_SPEC,
11738 crate::common::R,
11739 > {
11740 crate::common::RegisterField::<
11741 2,
11742 0x1,
11743 1,
11744 0,
11745 prstdbg::Scolv,
11746 prstdbg::Scolv,
11747 Prstdbg_SPEC,
11748 crate::common::R,
11749 >::from_register(self, 0)
11750 }
11751
11752 #[doc = "SDA Output Level"]
11753 #[inline(always)]
11754 pub fn sdolv(
11755 self,
11756 ) -> crate::common::RegisterField<
11757 3,
11758 0x1,
11759 1,
11760 0,
11761 prstdbg::Sdolv,
11762 prstdbg::Sdolv,
11763 Prstdbg_SPEC,
11764 crate::common::R,
11765 > {
11766 crate::common::RegisterField::<
11767 3,
11768 0x1,
11769 1,
11770 0,
11771 prstdbg::Sdolv,
11772 prstdbg::Sdolv,
11773 Prstdbg_SPEC,
11774 crate::common::R,
11775 >::from_register(self, 0)
11776 }
11777}
11778impl ::core::default::Default for Prstdbg {
11779 #[inline(always)]
11780 fn default() -> Prstdbg {
11781 <crate::RegValueT<Prstdbg_SPEC> as RegisterValue<_>>::new(15)
11782 }
11783}
11784pub mod prstdbg {
11785
11786 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11787 pub struct Scolv_SPEC;
11788 pub type Scolv = crate::EnumBitfieldStruct<u8, Scolv_SPEC>;
11789 impl Scolv {
11790 #[doc = "I3C has driven the SCL pin low."]
11791 pub const _0: Self = Self::new(0);
11792
11793 #[doc = "I3C has released the SCL pin."]
11794 pub const _1: Self = Self::new(1);
11795 }
11796 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11797 pub struct Sdolv_SPEC;
11798 pub type Sdolv = crate::EnumBitfieldStruct<u8, Sdolv_SPEC>;
11799 impl Sdolv {
11800 #[doc = "I3C has driven the SDA pin low."]
11801 pub const _0: Self = Self::new(0);
11802
11803 #[doc = "I3C has released the SDA pin."]
11804 pub const _1: Self = Self::new(1);
11805 }
11806}
11807#[doc(hidden)]
11808#[derive(Copy, Clone, Eq, PartialEq)]
11809pub struct Mserrcnt_SPEC;
11810impl crate::sealed::RegSpec for Mserrcnt_SPEC {
11811 type DataType = u32;
11812}
11813
11814#[doc = "Master Error Counters Register"]
11815pub type Mserrcnt = crate::RegValueT<Mserrcnt_SPEC>;
11816
11817impl Mserrcnt {
11818 #[doc = "M2 Error Counter"]
11819 #[inline(always)]
11820 pub fn m2ecnt(
11821 self,
11822 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mserrcnt_SPEC, crate::common::R> {
11823 crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mserrcnt_SPEC,crate::common::R>::from_register(self,0)
11824 }
11825}
11826impl ::core::default::Default for Mserrcnt {
11827 #[inline(always)]
11828 fn default() -> Mserrcnt {
11829 <crate::RegValueT<Mserrcnt_SPEC> as RegisterValue<_>>::new(0)
11830 }
11831}
11832
11833#[doc(hidden)]
11834#[derive(Copy, Clone, Eq, PartialEq)]
11835pub struct Sc1Cpt_SPEC;
11836impl crate::sealed::RegSpec for Sc1Cpt_SPEC {
11837 type DataType = u32;
11838}
11839
11840#[doc = "SC1 Capture monitor Register"]
11841pub type Sc1Cpt = crate::RegValueT<Sc1Cpt_SPEC>;
11842
11843impl Sc1Cpt {
11844 #[doc = "SC1 Capture"]
11845 #[inline(always)]
11846 pub fn sc1c(
11847 self,
11848 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Sc1Cpt_SPEC, crate::common::R>
11849 {
11850 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Sc1Cpt_SPEC,crate::common::R>::from_register(self,0)
11851 }
11852}
11853impl ::core::default::Default for Sc1Cpt {
11854 #[inline(always)]
11855 fn default() -> Sc1Cpt {
11856 <crate::RegValueT<Sc1Cpt_SPEC> as RegisterValue<_>>::new(0)
11857 }
11858}
11859
11860#[doc(hidden)]
11861#[derive(Copy, Clone, Eq, PartialEq)]
11862pub struct Sc2Cpt_SPEC;
11863impl crate::sealed::RegSpec for Sc2Cpt_SPEC {
11864 type DataType = u32;
11865}
11866
11867#[doc = "SC2 Capture monitor Register"]
11868pub type Sc2Cpt = crate::RegValueT<Sc2Cpt_SPEC>;
11869
11870impl Sc2Cpt {
11871 #[doc = "SC2 Capture"]
11872 #[inline(always)]
11873 pub fn sc2c(
11874 self,
11875 ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Sc2Cpt_SPEC, crate::common::R>
11876 {
11877 crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Sc2Cpt_SPEC,crate::common::R>::from_register(self,0)
11878 }
11879}
11880impl ::core::default::Default for Sc2Cpt {
11881 #[inline(always)]
11882 fn default() -> Sc2Cpt {
11883 <crate::RegValueT<Sc2Cpt_SPEC> as RegisterValue<_>>::new(0)
11884 }
11885}