ra4e2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:48:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "System Clock Division Control Register"]
48    #[inline(always)]
49    pub const fn sckdivcr(
50        &self,
51    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(32usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Source Control Register"]
60    #[inline(always)]
61    pub const fn sckscr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(38usize),
67            )
68        }
69    }
70
71    #[doc = "PLL Clock Control Register"]
72    #[inline(always)]
73    pub const fn pllccr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(40usize),
79            )
80        }
81    }
82
83    #[doc = "PLL Control Register"]
84    #[inline(always)]
85    pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(42usize),
89            )
90        }
91    }
92
93    #[doc = "Main Clock Oscillator Control Register"]
94    #[inline(always)]
95    pub const fn mosccr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(50usize),
101            )
102        }
103    }
104
105    #[doc = "High-Speed On-Chip Oscillator Control Register"]
106    #[inline(always)]
107    pub const fn hococr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(54usize),
113            )
114        }
115    }
116
117    #[doc = "High-Speed On-Chip Oscillator Control Register 2"]
118    #[inline(always)]
119    pub const fn hococr2(
120        &self,
121    ) -> &'static crate::common::Reg<self::Hococr2_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Hococr2_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(55usize),
125            )
126        }
127    }
128
129    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
130    #[inline(always)]
131    pub const fn mococr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(56usize),
137            )
138        }
139    }
140
141    #[doc = "FLL Control Register1"]
142    #[inline(always)]
143    pub const fn fllcr1(
144        &self,
145    ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(57usize),
149            )
150        }
151    }
152
153    #[doc = "FLL Control Register2"]
154    #[inline(always)]
155    pub const fn fllcr2(
156        &self,
157    ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(58usize),
161            )
162        }
163    }
164
165    #[doc = "Oscillation Stabilization Flag Register"]
166    #[inline(always)]
167    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
168        unsafe {
169            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
170                self._svd2pac_as_ptr().add(60usize),
171            )
172        }
173    }
174
175    #[doc = "Clock Out Control Register"]
176    #[inline(always)]
177    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
178        unsafe {
179            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
180                self._svd2pac_as_ptr().add(62usize),
181            )
182        }
183    }
184
185    #[doc = "Oscillation Stop Detection Control Register"]
186    #[inline(always)]
187    pub const fn ostdcr(
188        &self,
189    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(64usize),
193            )
194        }
195    }
196
197    #[doc = "Oscillation Stop Detection Status Register"]
198    #[inline(always)]
199    pub const fn ostdsr(
200        &self,
201    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(65usize),
205            )
206        }
207    }
208
209    #[doc = "MOCO User Trimming Control Register"]
210    #[inline(always)]
211    pub const fn mocoutcr(
212        &self,
213    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
214        unsafe {
215            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
216                self._svd2pac_as_ptr().add(97usize),
217            )
218        }
219    }
220
221    #[doc = "HOCO User Trimming Control Register"]
222    #[inline(always)]
223    pub const fn hocoutcr(
224        &self,
225    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(98usize),
229            )
230        }
231    }
232
233    #[doc = "USB Clock Division Control Register"]
234    #[inline(always)]
235    pub const fn usbckdivcr(
236        &self,
237    ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
238        unsafe {
239            crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
240                self._svd2pac_as_ptr().add(108usize),
241            )
242        }
243    }
244
245    #[doc = "CANFD Clock Division Control Register"]
246    #[inline(always)]
247    pub const fn canfdckdivcr(
248        &self,
249    ) -> &'static crate::common::Reg<self::Canfdckdivcr_SPEC, crate::common::RW> {
250        unsafe {
251            crate::common::Reg::<self::Canfdckdivcr_SPEC, crate::common::RW>::from_ptr(
252                self._svd2pac_as_ptr().add(110usize),
253            )
254        }
255    }
256
257    #[doc = "CEC Clock Division Control Register"]
258    #[inline(always)]
259    pub const fn cecckdivcr(
260        &self,
261    ) -> &'static crate::common::Reg<self::Cecckdivcr_SPEC, crate::common::RW> {
262        unsafe {
263            crate::common::Reg::<self::Cecckdivcr_SPEC, crate::common::RW>::from_ptr(
264                self._svd2pac_as_ptr().add(112usize),
265            )
266        }
267    }
268
269    #[doc = "I3C Clock Division Control Register"]
270    #[inline(always)]
271    pub const fn i3cckdivcr(
272        &self,
273    ) -> &'static crate::common::Reg<self::I3Cckdivcr_SPEC, crate::common::RW> {
274        unsafe {
275            crate::common::Reg::<self::I3Cckdivcr_SPEC, crate::common::RW>::from_ptr(
276                self._svd2pac_as_ptr().add(113usize),
277            )
278        }
279    }
280
281    #[doc = "USB Clock Control Register"]
282    #[inline(always)]
283    pub const fn usbckcr(
284        &self,
285    ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
286        unsafe {
287            crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
288                self._svd2pac_as_ptr().add(116usize),
289            )
290        }
291    }
292
293    #[doc = "CANFD Clock Control Register"]
294    #[inline(always)]
295    pub const fn canfdckcr(
296        &self,
297    ) -> &'static crate::common::Reg<self::Canfdckcr_SPEC, crate::common::RW> {
298        unsafe {
299            crate::common::Reg::<self::Canfdckcr_SPEC, crate::common::RW>::from_ptr(
300                self._svd2pac_as_ptr().add(118usize),
301            )
302        }
303    }
304
305    #[doc = "CEC Clock Control Register"]
306    #[inline(always)]
307    pub const fn cecckcr(
308        &self,
309    ) -> &'static crate::common::Reg<self::Cecckcr_SPEC, crate::common::RW> {
310        unsafe {
311            crate::common::Reg::<self::Cecckcr_SPEC, crate::common::RW>::from_ptr(
312                self._svd2pac_as_ptr().add(120usize),
313            )
314        }
315    }
316
317    #[doc = "I3C Clock Control Register"]
318    #[inline(always)]
319    pub const fn i3cckcr(
320        &self,
321    ) -> &'static crate::common::Reg<self::I3Cckcr_SPEC, crate::common::RW> {
322        unsafe {
323            crate::common::Reg::<self::I3Cckcr_SPEC, crate::common::RW>::from_ptr(
324                self._svd2pac_as_ptr().add(121usize),
325            )
326        }
327    }
328
329    #[doc = "Snooze Control Register"]
330    #[inline(always)]
331    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
332        unsafe {
333            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
334                self._svd2pac_as_ptr().add(146usize),
335            )
336        }
337    }
338
339    #[doc = "Snooze End Control Register 0"]
340    #[inline(always)]
341    pub const fn snzedcr0(
342        &self,
343    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
344        unsafe {
345            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
346                self._svd2pac_as_ptr().add(148usize),
347            )
348        }
349    }
350
351    #[doc = "Snooze Request Control Register 0"]
352    #[inline(always)]
353    pub const fn snzreqcr0(
354        &self,
355    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
356        unsafe {
357            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
358                self._svd2pac_as_ptr().add(152usize),
359            )
360        }
361    }
362
363    #[doc = "Operating Power Control Register"]
364    #[inline(always)]
365    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(160usize),
369            )
370        }
371    }
372
373    #[doc = "Main Clock Oscillator Wait Control Register"]
374    #[inline(always)]
375    pub const fn moscwtcr(
376        &self,
377    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(162usize),
381            )
382        }
383    }
384
385    #[doc = "Sub Operating Power Control Register"]
386    #[inline(always)]
387    pub const fn sopccr(
388        &self,
389    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(170usize),
393            )
394        }
395    }
396
397    #[doc = "Reset Status Register 1"]
398    #[inline(always)]
399    pub const fn rstsr1(
400        &self,
401    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(192usize),
405            )
406        }
407    }
408
409    #[doc = "Voltage Monitor 1 Circuit Control Register"]
410    #[inline(always)]
411    pub const fn lvd1cr1(
412        &self,
413    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(224usize),
417            )
418        }
419    }
420
421    #[doc = "Voltage Monitor 1 Circuit Status Register"]
422    #[inline(always)]
423    pub const fn lvd1sr(
424        &self,
425    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
426        unsafe {
427            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
428                self._svd2pac_as_ptr().add(225usize),
429            )
430        }
431    }
432
433    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
434    #[inline(always)]
435    pub const fn lvd2cr1(
436        &self,
437    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(226usize),
441            )
442        }
443    }
444
445    #[doc = "Voltage Monitor 2 Circuit Status Register"]
446    #[inline(always)]
447    pub const fn lvd2sr(
448        &self,
449    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(227usize),
453            )
454        }
455    }
456
457    #[doc = "Clock Generation Function Security Attribute Register"]
458    #[inline(always)]
459    pub const fn cgfsar(
460        &self,
461    ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
462        unsafe {
463            crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
464                self._svd2pac_as_ptr().add(960usize),
465            )
466        }
467    }
468
469    #[doc = "Reset Security Attribution Register"]
470    #[inline(always)]
471    pub const fn rstsar(
472        &self,
473    ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(964usize),
477            )
478        }
479    }
480
481    #[doc = "Low Power Mode Security Attribution Register"]
482    #[inline(always)]
483    pub const fn lpmsar(
484        &self,
485    ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
486        unsafe {
487            crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
488                self._svd2pac_as_ptr().add(968usize),
489            )
490        }
491    }
492
493    #[doc = "Low Voltage Detection Security Attribution Register"]
494    #[inline(always)]
495    pub const fn lvdsar(
496        &self,
497    ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(972usize),
501            )
502        }
503    }
504
505    #[doc = "Deep Standby Interrupt Factor Security Attribution Register"]
506    #[inline(always)]
507    pub const fn dpfsar(
508        &self,
509    ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
510        unsafe {
511            crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
512                self._svd2pac_as_ptr().add(992usize),
513            )
514        }
515    }
516
517    #[doc = "Protect Register"]
518    #[inline(always)]
519    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
520        unsafe {
521            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
522                self._svd2pac_as_ptr().add(1022usize),
523            )
524        }
525    }
526
527    #[doc = "Deep Standby Control Register"]
528    #[inline(always)]
529    pub const fn dpsbycr(
530        &self,
531    ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
532        unsafe {
533            crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
534                self._svd2pac_as_ptr().add(1024usize),
535            )
536        }
537    }
538
539    #[doc = "Deep Standby Wait Control Register"]
540    #[inline(always)]
541    pub const fn dpswcr(
542        &self,
543    ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(1025usize),
547            )
548        }
549    }
550
551    #[doc = "Deep Standby Interrupt Enable Register 0"]
552    #[inline(always)]
553    pub const fn dpsier0(
554        &self,
555    ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
556        unsafe {
557            crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
558                self._svd2pac_as_ptr().add(1026usize),
559            )
560        }
561    }
562
563    #[doc = "Deep Standby Interrupt Enable Register 1"]
564    #[inline(always)]
565    pub const fn dpsier1(
566        &self,
567    ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
568        unsafe {
569            crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
570                self._svd2pac_as_ptr().add(1027usize),
571            )
572        }
573    }
574
575    #[doc = "Deep Software Standby Interrupt Enable Register 2"]
576    #[inline(always)]
577    pub const fn dpsier2(
578        &self,
579    ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
580        unsafe {
581            crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
582                self._svd2pac_as_ptr().add(1028usize),
583            )
584        }
585    }
586
587    #[doc = "Deep Standby Interrupt Enable Register 3"]
588    #[inline(always)]
589    pub const fn dpsier3(
590        &self,
591    ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
592        unsafe {
593            crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
594                self._svd2pac_as_ptr().add(1029usize),
595            )
596        }
597    }
598
599    #[doc = "Deep Standby Interrupt Flag Register 0"]
600    #[inline(always)]
601    pub const fn dpsifr0(
602        &self,
603    ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
604        unsafe {
605            crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
606                self._svd2pac_as_ptr().add(1030usize),
607            )
608        }
609    }
610
611    #[doc = "Deep Standby Interrupt Flag Register 1"]
612    #[inline(always)]
613    pub const fn dpsifr1(
614        &self,
615    ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
616        unsafe {
617            crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
618                self._svd2pac_as_ptr().add(1031usize),
619            )
620        }
621    }
622
623    #[doc = "Deep Software Standby Interrupt Flag Register 2"]
624    #[inline(always)]
625    pub const fn dpsifr2(
626        &self,
627    ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
628        unsafe {
629            crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
630                self._svd2pac_as_ptr().add(1032usize),
631            )
632        }
633    }
634
635    #[doc = "Deep Standby Interrupt Flag Register 3"]
636    #[inline(always)]
637    pub const fn dpsifr3(
638        &self,
639    ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
640        unsafe {
641            crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
642                self._svd2pac_as_ptr().add(1033usize),
643            )
644        }
645    }
646
647    #[doc = "Deep Standby Interrupt Edge Register 0"]
648    #[inline(always)]
649    pub const fn dpsiegr0(
650        &self,
651    ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
652        unsafe {
653            crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
654                self._svd2pac_as_ptr().add(1034usize),
655            )
656        }
657    }
658
659    #[doc = "Deep Standby Interrupt Edge Register 1"]
660    #[inline(always)]
661    pub const fn dpsiegr1(
662        &self,
663    ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(1035usize),
667            )
668        }
669    }
670
671    #[doc = "Deep Software Standby Interrupt Edge Register 2"]
672    #[inline(always)]
673    pub const fn dpsiegr2(
674        &self,
675    ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
676        unsafe {
677            crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
678                self._svd2pac_as_ptr().add(1036usize),
679            )
680        }
681    }
682
683    #[doc = "System Control OCD Control Register"]
684    #[inline(always)]
685    pub const fn syocdcr(
686        &self,
687    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
688        unsafe {
689            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
690                self._svd2pac_as_ptr().add(1038usize),
691            )
692        }
693    }
694
695    #[doc = "Reset Status Register 0"]
696    #[inline(always)]
697    pub const fn rstsr0(
698        &self,
699    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
700        unsafe {
701            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
702                self._svd2pac_as_ptr().add(1040usize),
703            )
704        }
705    }
706
707    #[doc = "Reset Status Register 2"]
708    #[inline(always)]
709    pub const fn rstsr2(
710        &self,
711    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
712        unsafe {
713            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
714                self._svd2pac_as_ptr().add(1041usize),
715            )
716        }
717    }
718
719    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
720    #[inline(always)]
721    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
722        unsafe {
723            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
724                self._svd2pac_as_ptr().add(1043usize),
725            )
726        }
727    }
728
729    #[doc = "Flash P/E Protect Register"]
730    #[inline(always)]
731    pub const fn fwepror(
732        &self,
733    ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
734        unsafe {
735            crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
736                self._svd2pac_as_ptr().add(1046usize),
737            )
738        }
739    }
740
741    #[doc = "Voltage Monitoring 1 Comparator Control Register"]
742    #[inline(always)]
743    pub const fn lvd1cmpcr(
744        &self,
745    ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
746        unsafe {
747            crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
748                self._svd2pac_as_ptr().add(1047usize),
749            )
750        }
751    }
752
753    #[doc = "Voltage Monitoring 2 Comparator Control Register"]
754    #[inline(always)]
755    pub const fn lvd2cmpcr(
756        &self,
757    ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
758        unsafe {
759            crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
760                self._svd2pac_as_ptr().add(1048usize),
761            )
762        }
763    }
764
765    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
766    #[inline(always)]
767    pub const fn lvd1cr0(
768        &self,
769    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
770        unsafe {
771            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
772                self._svd2pac_as_ptr().add(1050usize),
773            )
774        }
775    }
776
777    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
778    #[inline(always)]
779    pub const fn lvd2cr0(
780        &self,
781    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
782        unsafe {
783            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
784                self._svd2pac_as_ptr().add(1051usize),
785            )
786        }
787    }
788
789    #[doc = "Sub-Clock Oscillator Control Register"]
790    #[inline(always)]
791    pub const fn sosccr(
792        &self,
793    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(1152usize),
797            )
798        }
799    }
800
801    #[doc = "Sub-Clock Oscillator Mode Control Register"]
802    #[inline(always)]
803    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
804        unsafe {
805            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
806                self._svd2pac_as_ptr().add(1153usize),
807            )
808        }
809    }
810
811    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
812    #[inline(always)]
813    pub const fn lococr(
814        &self,
815    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
816        unsafe {
817            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
818                self._svd2pac_as_ptr().add(1168usize),
819            )
820        }
821    }
822
823    #[doc = "LOCO User Trimming Control Register"]
824    #[inline(always)]
825    pub const fn locoutcr(
826        &self,
827    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
828        unsafe {
829            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
830                self._svd2pac_as_ptr().add(1170usize),
831            )
832        }
833    }
834}
835#[doc(hidden)]
836#[derive(Copy, Clone, Eq, PartialEq)]
837pub struct Sbycr_SPEC;
838impl crate::sealed::RegSpec for Sbycr_SPEC {
839    type DataType = u16;
840}
841
842#[doc = "Standby Control Register"]
843pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
844
845impl Sbycr {
846    #[doc = "Software Standby Mode Select"]
847    #[inline(always)]
848    pub fn ssby(
849        self,
850    ) -> crate::common::RegisterField<
851        15,
852        0x1,
853        1,
854        0,
855        sbycr::Ssby,
856        sbycr::Ssby,
857        Sbycr_SPEC,
858        crate::common::RW,
859    > {
860        crate::common::RegisterField::<
861            15,
862            0x1,
863            1,
864            0,
865            sbycr::Ssby,
866            sbycr::Ssby,
867            Sbycr_SPEC,
868            crate::common::RW,
869        >::from_register(self, 0)
870    }
871}
872impl ::core::default::Default for Sbycr {
873    #[inline(always)]
874    fn default() -> Sbycr {
875        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
876    }
877}
878pub mod sbycr {
879
880    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
881    pub struct Ssby_SPEC;
882    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
883    impl Ssby {
884        #[doc = "Sleep mode"]
885        pub const _0: Self = Self::new(0);
886
887        #[doc = "Software Standby mode."]
888        pub const _1: Self = Self::new(1);
889    }
890}
891#[doc(hidden)]
892#[derive(Copy, Clone, Eq, PartialEq)]
893pub struct Sckdivcr_SPEC;
894impl crate::sealed::RegSpec for Sckdivcr_SPEC {
895    type DataType = u32;
896}
897
898#[doc = "System Clock Division Control Register"]
899pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
900
901impl Sckdivcr {
902    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
903    #[inline(always)]
904    pub fn pckd(
905        self,
906    ) -> crate::common::RegisterField<
907        0,
908        0x7,
909        1,
910        0,
911        sckdivcr::Pckd,
912        sckdivcr::Pckd,
913        Sckdivcr_SPEC,
914        crate::common::RW,
915    > {
916        crate::common::RegisterField::<
917            0,
918            0x7,
919            1,
920            0,
921            sckdivcr::Pckd,
922            sckdivcr::Pckd,
923            Sckdivcr_SPEC,
924            crate::common::RW,
925        >::from_register(self, 0)
926    }
927
928    #[doc = "Peripheral Module Clock C (PCLKC) Select"]
929    #[inline(always)]
930    pub fn pckc(
931        self,
932    ) -> crate::common::RegisterField<
933        4,
934        0x7,
935        1,
936        0,
937        sckdivcr::Pckc,
938        sckdivcr::Pckc,
939        Sckdivcr_SPEC,
940        crate::common::RW,
941    > {
942        crate::common::RegisterField::<
943            4,
944            0x7,
945            1,
946            0,
947            sckdivcr::Pckc,
948            sckdivcr::Pckc,
949            Sckdivcr_SPEC,
950            crate::common::RW,
951        >::from_register(self, 0)
952    }
953
954    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
955    #[inline(always)]
956    pub fn pckb(
957        self,
958    ) -> crate::common::RegisterField<
959        8,
960        0x7,
961        1,
962        0,
963        sckdivcr::Pckb,
964        sckdivcr::Pckb,
965        Sckdivcr_SPEC,
966        crate::common::RW,
967    > {
968        crate::common::RegisterField::<
969            8,
970            0x7,
971            1,
972            0,
973            sckdivcr::Pckb,
974            sckdivcr::Pckb,
975            Sckdivcr_SPEC,
976            crate::common::RW,
977        >::from_register(self, 0)
978    }
979
980    #[doc = "Peripheral Module Clock A (PCLKA) Select"]
981    #[inline(always)]
982    pub fn pcka(
983        self,
984    ) -> crate::common::RegisterField<
985        12,
986        0x7,
987        1,
988        0,
989        sckdivcr::Pcka,
990        sckdivcr::Pcka,
991        Sckdivcr_SPEC,
992        crate::common::RW,
993    > {
994        crate::common::RegisterField::<
995            12,
996            0x7,
997            1,
998            0,
999            sckdivcr::Pcka,
1000            sckdivcr::Pcka,
1001            Sckdivcr_SPEC,
1002            crate::common::RW,
1003        >::from_register(self, 0)
1004    }
1005
1006    #[doc = "System Clock (ICLK) Select"]
1007    #[inline(always)]
1008    pub fn ick(
1009        self,
1010    ) -> crate::common::RegisterField<
1011        24,
1012        0x7,
1013        1,
1014        0,
1015        sckdivcr::Ick,
1016        sckdivcr::Ick,
1017        Sckdivcr_SPEC,
1018        crate::common::RW,
1019    > {
1020        crate::common::RegisterField::<
1021            24,
1022            0x7,
1023            1,
1024            0,
1025            sckdivcr::Ick,
1026            sckdivcr::Ick,
1027            Sckdivcr_SPEC,
1028            crate::common::RW,
1029        >::from_register(self, 0)
1030    }
1031
1032    #[doc = "FlashIF Clock (FCLK) Select"]
1033    #[inline(always)]
1034    pub fn fck(
1035        self,
1036    ) -> crate::common::RegisterField<
1037        28,
1038        0x7,
1039        1,
1040        0,
1041        sckdivcr::Fck,
1042        sckdivcr::Fck,
1043        Sckdivcr_SPEC,
1044        crate::common::RW,
1045    > {
1046        crate::common::RegisterField::<
1047            28,
1048            0x7,
1049            1,
1050            0,
1051            sckdivcr::Fck,
1052            sckdivcr::Fck,
1053            Sckdivcr_SPEC,
1054            crate::common::RW,
1055        >::from_register(self, 0)
1056    }
1057}
1058impl ::core::default::Default for Sckdivcr {
1059    #[inline(always)]
1060    fn default() -> Sckdivcr {
1061        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570434082)
1062    }
1063}
1064pub mod sckdivcr {
1065
1066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1067    pub struct Pckd_SPEC;
1068    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1069    impl Pckd {
1070        #[doc = "x 1/1"]
1071        pub const _000: Self = Self::new(0);
1072
1073        #[doc = "x 1/2"]
1074        pub const _001: Self = Self::new(1);
1075
1076        #[doc = "x 1/4"]
1077        pub const _010: Self = Self::new(2);
1078
1079        #[doc = "x 1/8"]
1080        pub const _011: Self = Self::new(3);
1081
1082        #[doc = "x 1/16"]
1083        pub const _100: Self = Self::new(4);
1084
1085        #[doc = "x 1/32"]
1086        pub const _101: Self = Self::new(5);
1087
1088        #[doc = "x 1/64"]
1089        pub const _110: Self = Self::new(6);
1090
1091        #[doc = "Setting prohibited."]
1092        pub const OTHERS: Self = Self::new(0);
1093    }
1094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1095    pub struct Pckc_SPEC;
1096    pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1097    impl Pckc {
1098        #[doc = "x 1/1"]
1099        pub const _000: Self = Self::new(0);
1100
1101        #[doc = "x 1/2"]
1102        pub const _001: Self = Self::new(1);
1103
1104        #[doc = "x 1/4"]
1105        pub const _010: Self = Self::new(2);
1106
1107        #[doc = "x 1/8"]
1108        pub const _011: Self = Self::new(3);
1109
1110        #[doc = "x 1/16"]
1111        pub const _100: Self = Self::new(4);
1112
1113        #[doc = "x 1/32"]
1114        pub const _101: Self = Self::new(5);
1115
1116        #[doc = "x 1/64"]
1117        pub const _110: Self = Self::new(6);
1118
1119        #[doc = "Setting prohibited."]
1120        pub const OTHERS: Self = Self::new(0);
1121    }
1122    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1123    pub struct Pckb_SPEC;
1124    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1125    impl Pckb {
1126        #[doc = "x 1/1"]
1127        pub const _000: Self = Self::new(0);
1128
1129        #[doc = "x 1/2"]
1130        pub const _001: Self = Self::new(1);
1131
1132        #[doc = "x 1/4"]
1133        pub const _010: Self = Self::new(2);
1134
1135        #[doc = "x 1/8"]
1136        pub const _011: Self = Self::new(3);
1137
1138        #[doc = "x 1/16"]
1139        pub const _100: Self = Self::new(4);
1140
1141        #[doc = "x 1/32"]
1142        pub const _101: Self = Self::new(5);
1143
1144        #[doc = "x 1/64"]
1145        pub const _110: Self = Self::new(6);
1146
1147        #[doc = "Setting prohibited."]
1148        pub const OTHERS: Self = Self::new(0);
1149    }
1150    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1151    pub struct Pcka_SPEC;
1152    pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1153    impl Pcka {
1154        #[doc = "x 1/1"]
1155        pub const _000: Self = Self::new(0);
1156
1157        #[doc = "x 1/2"]
1158        pub const _001: Self = Self::new(1);
1159
1160        #[doc = "x 1/4"]
1161        pub const _010: Self = Self::new(2);
1162
1163        #[doc = "x 1/8"]
1164        pub const _011: Self = Self::new(3);
1165
1166        #[doc = "x 1/16"]
1167        pub const _100: Self = Self::new(4);
1168
1169        #[doc = "x 1/32"]
1170        pub const _101: Self = Self::new(5);
1171
1172        #[doc = "x 1/64"]
1173        pub const _110: Self = Self::new(6);
1174
1175        #[doc = "Setting prohibited."]
1176        pub const OTHERS: Self = Self::new(0);
1177    }
1178    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1179    pub struct Ick_SPEC;
1180    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1181    impl Ick {
1182        #[doc = "x 1/1"]
1183        pub const _000: Self = Self::new(0);
1184
1185        #[doc = "x 1/2"]
1186        pub const _001: Self = Self::new(1);
1187
1188        #[doc = "x 1/4"]
1189        pub const _010: Self = Self::new(2);
1190
1191        #[doc = "x 1/8"]
1192        pub const _011: Self = Self::new(3);
1193
1194        #[doc = "x 1/16"]
1195        pub const _100: Self = Self::new(4);
1196
1197        #[doc = "x 1/32"]
1198        pub const _101: Self = Self::new(5);
1199
1200        #[doc = "x 1/64"]
1201        pub const _110: Self = Self::new(6);
1202
1203        #[doc = "Setting prohibited."]
1204        pub const OTHERS: Self = Self::new(0);
1205    }
1206    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1207    pub struct Fck_SPEC;
1208    pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1209    impl Fck {
1210        #[doc = "x 1/1"]
1211        pub const _000: Self = Self::new(0);
1212
1213        #[doc = "x 1/2"]
1214        pub const _001: Self = Self::new(1);
1215
1216        #[doc = "x 1/4"]
1217        pub const _010: Self = Self::new(2);
1218
1219        #[doc = "x 1/8"]
1220        pub const _011: Self = Self::new(3);
1221
1222        #[doc = "x 1/16"]
1223        pub const _100: Self = Self::new(4);
1224
1225        #[doc = "x 1/32"]
1226        pub const _101: Self = Self::new(5);
1227
1228        #[doc = "x 1/64"]
1229        pub const _110: Self = Self::new(6);
1230
1231        #[doc = "Setting prohibited."]
1232        pub const OTHERS: Self = Self::new(0);
1233    }
1234}
1235#[doc(hidden)]
1236#[derive(Copy, Clone, Eq, PartialEq)]
1237pub struct Sckscr_SPEC;
1238impl crate::sealed::RegSpec for Sckscr_SPEC {
1239    type DataType = u8;
1240}
1241
1242#[doc = "System Clock Source Control Register"]
1243pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1244
1245impl Sckscr {
1246    #[doc = "Clock Source Select"]
1247    #[inline(always)]
1248    pub fn cksel(
1249        self,
1250    ) -> crate::common::RegisterField<
1251        0,
1252        0x7,
1253        1,
1254        0,
1255        sckscr::Cksel,
1256        sckscr::Cksel,
1257        Sckscr_SPEC,
1258        crate::common::RW,
1259    > {
1260        crate::common::RegisterField::<
1261            0,
1262            0x7,
1263            1,
1264            0,
1265            sckscr::Cksel,
1266            sckscr::Cksel,
1267            Sckscr_SPEC,
1268            crate::common::RW,
1269        >::from_register(self, 0)
1270    }
1271}
1272impl ::core::default::Default for Sckscr {
1273    #[inline(always)]
1274    fn default() -> Sckscr {
1275        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1276    }
1277}
1278pub mod sckscr {
1279
1280    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1281    pub struct Cksel_SPEC;
1282    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1283    impl Cksel {
1284        #[doc = "HOCO"]
1285        pub const _000: Self = Self::new(0);
1286
1287        #[doc = "MOCO"]
1288        pub const _001: Self = Self::new(1);
1289
1290        #[doc = "LOCO"]
1291        pub const _010: Self = Self::new(2);
1292
1293        #[doc = "Main clock oscillator (MOSC)"]
1294        pub const _011: Self = Self::new(3);
1295
1296        #[doc = "Sub-clock oscillator (SOSC)"]
1297        pub const _100: Self = Self::new(4);
1298
1299        #[doc = "PLL"]
1300        pub const _101: Self = Self::new(5);
1301
1302        #[doc = "Setting prohibited"]
1303        pub const _110: Self = Self::new(6);
1304
1305        #[doc = "Setting prohibited"]
1306        pub const _111: Self = Self::new(7);
1307    }
1308}
1309#[doc(hidden)]
1310#[derive(Copy, Clone, Eq, PartialEq)]
1311pub struct Pllccr_SPEC;
1312impl crate::sealed::RegSpec for Pllccr_SPEC {
1313    type DataType = u16;
1314}
1315
1316#[doc = "PLL Clock Control Register"]
1317pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1318
1319impl Pllccr {
1320    #[doc = "PLL Input Frequency Division Ratio Select"]
1321    #[inline(always)]
1322    pub fn plidiv(
1323        self,
1324    ) -> crate::common::RegisterField<
1325        0,
1326        0x3,
1327        1,
1328        0,
1329        pllccr::Plidiv,
1330        pllccr::Plidiv,
1331        Pllccr_SPEC,
1332        crate::common::RW,
1333    > {
1334        crate::common::RegisterField::<
1335            0,
1336            0x3,
1337            1,
1338            0,
1339            pllccr::Plidiv,
1340            pllccr::Plidiv,
1341            Pllccr_SPEC,
1342            crate::common::RW,
1343        >::from_register(self, 0)
1344    }
1345
1346    #[doc = "PLL Clock Source Select"]
1347    #[inline(always)]
1348    pub fn plsrcsel(
1349        self,
1350    ) -> crate::common::RegisterField<
1351        4,
1352        0x1,
1353        1,
1354        0,
1355        pllccr::Plsrcsel,
1356        pllccr::Plsrcsel,
1357        Pllccr_SPEC,
1358        crate::common::RW,
1359    > {
1360        crate::common::RegisterField::<
1361            4,
1362            0x1,
1363            1,
1364            0,
1365            pllccr::Plsrcsel,
1366            pllccr::Plsrcsel,
1367            Pllccr_SPEC,
1368            crate::common::RW,
1369        >::from_register(self, 0)
1370    }
1371
1372    #[doc = "PLL Frequency Multiplication Factor Select"]
1373    #[inline(always)]
1374    pub fn pllmul(
1375        self,
1376    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
1377        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1378    }
1379}
1380impl ::core::default::Default for Pllccr {
1381    #[inline(always)]
1382    fn default() -> Pllccr {
1383        <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1384    }
1385}
1386pub mod pllccr {
1387
1388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1389    pub struct Plidiv_SPEC;
1390    pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1391    impl Plidiv {
1392        #[doc = "/1"]
1393        pub const _00: Self = Self::new(0);
1394
1395        #[doc = "/2"]
1396        pub const _01: Self = Self::new(1);
1397
1398        #[doc = "/3"]
1399        pub const _10: Self = Self::new(2);
1400
1401        #[doc = "Setting prohibited."]
1402        pub const OTHERS: Self = Self::new(0);
1403    }
1404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1405    pub struct Plsrcsel_SPEC;
1406    pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1407    impl Plsrcsel {
1408        #[doc = "Main clock oscillator"]
1409        pub const _0: Self = Self::new(0);
1410
1411        #[doc = "HOCO"]
1412        pub const _1: Self = Self::new(1);
1413    }
1414}
1415#[doc(hidden)]
1416#[derive(Copy, Clone, Eq, PartialEq)]
1417pub struct Pllcr_SPEC;
1418impl crate::sealed::RegSpec for Pllcr_SPEC {
1419    type DataType = u8;
1420}
1421
1422#[doc = "PLL Control Register"]
1423pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1424
1425impl Pllcr {
1426    #[doc = "PLL Stop Control"]
1427    #[inline(always)]
1428    pub fn pllstp(
1429        self,
1430    ) -> crate::common::RegisterField<
1431        0,
1432        0x1,
1433        1,
1434        0,
1435        pllcr::Pllstp,
1436        pllcr::Pllstp,
1437        Pllcr_SPEC,
1438        crate::common::RW,
1439    > {
1440        crate::common::RegisterField::<
1441            0,
1442            0x1,
1443            1,
1444            0,
1445            pllcr::Pllstp,
1446            pllcr::Pllstp,
1447            Pllcr_SPEC,
1448            crate::common::RW,
1449        >::from_register(self, 0)
1450    }
1451}
1452impl ::core::default::Default for Pllcr {
1453    #[inline(always)]
1454    fn default() -> Pllcr {
1455        <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1456    }
1457}
1458pub mod pllcr {
1459
1460    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1461    pub struct Pllstp_SPEC;
1462    pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1463    impl Pllstp {
1464        #[doc = "PLL is operating"]
1465        pub const _0: Self = Self::new(0);
1466
1467        #[doc = "PLL is stopped."]
1468        pub const _1: Self = Self::new(1);
1469    }
1470}
1471#[doc(hidden)]
1472#[derive(Copy, Clone, Eq, PartialEq)]
1473pub struct Mosccr_SPEC;
1474impl crate::sealed::RegSpec for Mosccr_SPEC {
1475    type DataType = u8;
1476}
1477
1478#[doc = "Main Clock Oscillator Control Register"]
1479pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1480
1481impl Mosccr {
1482    #[doc = "Main Clock Oscillator Stop"]
1483    #[inline(always)]
1484    pub fn mostp(
1485        self,
1486    ) -> crate::common::RegisterField<
1487        0,
1488        0x1,
1489        1,
1490        0,
1491        mosccr::Mostp,
1492        mosccr::Mostp,
1493        Mosccr_SPEC,
1494        crate::common::RW,
1495    > {
1496        crate::common::RegisterField::<
1497            0,
1498            0x1,
1499            1,
1500            0,
1501            mosccr::Mostp,
1502            mosccr::Mostp,
1503            Mosccr_SPEC,
1504            crate::common::RW,
1505        >::from_register(self, 0)
1506    }
1507}
1508impl ::core::default::Default for Mosccr {
1509    #[inline(always)]
1510    fn default() -> Mosccr {
1511        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1512    }
1513}
1514pub mod mosccr {
1515
1516    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1517    pub struct Mostp_SPEC;
1518    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1519    impl Mostp {
1520        #[doc = "Operate the main clock oscillator"]
1521        pub const _0: Self = Self::new(0);
1522
1523        #[doc = "Stop the main clock oscillator"]
1524        pub const _1: Self = Self::new(1);
1525    }
1526}
1527#[doc(hidden)]
1528#[derive(Copy, Clone, Eq, PartialEq)]
1529pub struct Hococr_SPEC;
1530impl crate::sealed::RegSpec for Hococr_SPEC {
1531    type DataType = u8;
1532}
1533
1534#[doc = "High-Speed On-Chip Oscillator Control Register"]
1535pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1536
1537impl Hococr {
1538    #[doc = "HOCO Stop"]
1539    #[inline(always)]
1540    pub fn hcstp(
1541        self,
1542    ) -> crate::common::RegisterField<
1543        0,
1544        0x1,
1545        1,
1546        0,
1547        hococr::Hcstp,
1548        hococr::Hcstp,
1549        Hococr_SPEC,
1550        crate::common::RW,
1551    > {
1552        crate::common::RegisterField::<
1553            0,
1554            0x1,
1555            1,
1556            0,
1557            hococr::Hcstp,
1558            hococr::Hcstp,
1559            Hococr_SPEC,
1560            crate::common::RW,
1561        >::from_register(self, 0)
1562    }
1563}
1564impl ::core::default::Default for Hococr {
1565    #[inline(always)]
1566    fn default() -> Hococr {
1567        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1568    }
1569}
1570pub mod hococr {
1571
1572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1573    pub struct Hcstp_SPEC;
1574    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1575    impl Hcstp {
1576        #[doc = "Operate the HOCO clock"]
1577        pub const _0: Self = Self::new(0);
1578
1579        #[doc = "Stop the HOCO clock"]
1580        pub const _1: Self = Self::new(1);
1581    }
1582}
1583#[doc(hidden)]
1584#[derive(Copy, Clone, Eq, PartialEq)]
1585pub struct Hococr2_SPEC;
1586impl crate::sealed::RegSpec for Hococr2_SPEC {
1587    type DataType = u8;
1588}
1589
1590#[doc = "High-Speed On-Chip Oscillator Control Register 2"]
1591pub type Hococr2 = crate::RegValueT<Hococr2_SPEC>;
1592
1593impl Hococr2 {
1594    #[doc = "HOCO Frequency Setting 0"]
1595    #[inline(always)]
1596    pub fn hcfrq0(
1597        self,
1598    ) -> crate::common::RegisterField<
1599        0,
1600        0x3,
1601        1,
1602        0,
1603        hococr2::Hcfrq0,
1604        hococr2::Hcfrq0,
1605        Hococr2_SPEC,
1606        crate::common::RW,
1607    > {
1608        crate::common::RegisterField::<
1609            0,
1610            0x3,
1611            1,
1612            0,
1613            hococr2::Hcfrq0,
1614            hococr2::Hcfrq0,
1615            Hococr2_SPEC,
1616            crate::common::RW,
1617        >::from_register(self, 0)
1618    }
1619}
1620impl ::core::default::Default for Hococr2 {
1621    #[inline(always)]
1622    fn default() -> Hococr2 {
1623        <crate::RegValueT<Hococr2_SPEC> as RegisterValue<_>>::new(0)
1624    }
1625}
1626pub mod hococr2 {
1627
1628    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1629    pub struct Hcfrq0_SPEC;
1630    pub type Hcfrq0 = crate::EnumBitfieldStruct<u8, Hcfrq0_SPEC>;
1631    impl Hcfrq0 {
1632        #[doc = "16 MHz"]
1633        pub const _00: Self = Self::new(0);
1634
1635        #[doc = "18 MHz"]
1636        pub const _01: Self = Self::new(1);
1637
1638        #[doc = "20 MHz"]
1639        pub const _10: Self = Self::new(2);
1640
1641        #[doc = "Setting prohibited"]
1642        pub const _11: Self = Self::new(3);
1643    }
1644}
1645#[doc(hidden)]
1646#[derive(Copy, Clone, Eq, PartialEq)]
1647pub struct Mococr_SPEC;
1648impl crate::sealed::RegSpec for Mococr_SPEC {
1649    type DataType = u8;
1650}
1651
1652#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1653pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1654
1655impl Mococr {
1656    #[doc = "MOCO Stop"]
1657    #[inline(always)]
1658    pub fn mcstp(
1659        self,
1660    ) -> crate::common::RegisterField<
1661        0,
1662        0x1,
1663        1,
1664        0,
1665        mococr::Mcstp,
1666        mococr::Mcstp,
1667        Mococr_SPEC,
1668        crate::common::RW,
1669    > {
1670        crate::common::RegisterField::<
1671            0,
1672            0x1,
1673            1,
1674            0,
1675            mococr::Mcstp,
1676            mococr::Mcstp,
1677            Mococr_SPEC,
1678            crate::common::RW,
1679        >::from_register(self, 0)
1680    }
1681}
1682impl ::core::default::Default for Mococr {
1683    #[inline(always)]
1684    fn default() -> Mococr {
1685        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1686    }
1687}
1688pub mod mococr {
1689
1690    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1691    pub struct Mcstp_SPEC;
1692    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1693    impl Mcstp {
1694        #[doc = "MOCO clock is operating"]
1695        pub const _0: Self = Self::new(0);
1696
1697        #[doc = "MOCO clock is stopped"]
1698        pub const _1: Self = Self::new(1);
1699    }
1700}
1701#[doc(hidden)]
1702#[derive(Copy, Clone, Eq, PartialEq)]
1703pub struct Fllcr1_SPEC;
1704impl crate::sealed::RegSpec for Fllcr1_SPEC {
1705    type DataType = u8;
1706}
1707
1708#[doc = "FLL Control Register1"]
1709pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1710
1711impl Fllcr1 {
1712    #[doc = "FLL Enable"]
1713    #[inline(always)]
1714    pub fn fllen(
1715        self,
1716    ) -> crate::common::RegisterField<
1717        0,
1718        0x1,
1719        1,
1720        0,
1721        fllcr1::Fllen,
1722        fllcr1::Fllen,
1723        Fllcr1_SPEC,
1724        crate::common::RW,
1725    > {
1726        crate::common::RegisterField::<
1727            0,
1728            0x1,
1729            1,
1730            0,
1731            fllcr1::Fllen,
1732            fllcr1::Fllen,
1733            Fllcr1_SPEC,
1734            crate::common::RW,
1735        >::from_register(self, 0)
1736    }
1737}
1738impl ::core::default::Default for Fllcr1 {
1739    #[inline(always)]
1740    fn default() -> Fllcr1 {
1741        <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1742    }
1743}
1744pub mod fllcr1 {
1745
1746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1747    pub struct Fllen_SPEC;
1748    pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1749    impl Fllen {
1750        #[doc = "FLL function is disabled"]
1751        pub const _0: Self = Self::new(0);
1752
1753        #[doc = "FLL function is enabled."]
1754        pub const _1: Self = Self::new(1);
1755    }
1756}
1757#[doc(hidden)]
1758#[derive(Copy, Clone, Eq, PartialEq)]
1759pub struct Fllcr2_SPEC;
1760impl crate::sealed::RegSpec for Fllcr2_SPEC {
1761    type DataType = u16;
1762}
1763
1764#[doc = "FLL Control Register2"]
1765pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1766
1767impl Fllcr2 {
1768    #[doc = "FLL Multiplication Control"]
1769    #[inline(always)]
1770    pub fn fllcntl(
1771        self,
1772    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
1773    {
1774        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1775    }
1776}
1777impl ::core::default::Default for Fllcr2 {
1778    #[inline(always)]
1779    fn default() -> Fllcr2 {
1780        <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1781    }
1782}
1783
1784#[doc(hidden)]
1785#[derive(Copy, Clone, Eq, PartialEq)]
1786pub struct Oscsf_SPEC;
1787impl crate::sealed::RegSpec for Oscsf_SPEC {
1788    type DataType = u8;
1789}
1790
1791#[doc = "Oscillation Stabilization Flag Register"]
1792pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1793
1794impl Oscsf {
1795    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1796    #[inline(always)]
1797    pub fn hocosf(
1798        self,
1799    ) -> crate::common::RegisterField<
1800        0,
1801        0x1,
1802        1,
1803        0,
1804        oscsf::Hocosf,
1805        oscsf::Hocosf,
1806        Oscsf_SPEC,
1807        crate::common::R,
1808    > {
1809        crate::common::RegisterField::<
1810            0,
1811            0x1,
1812            1,
1813            0,
1814            oscsf::Hocosf,
1815            oscsf::Hocosf,
1816            Oscsf_SPEC,
1817            crate::common::R,
1818        >::from_register(self, 0)
1819    }
1820
1821    #[doc = "Main Clock Oscillation Stabilization Flag"]
1822    #[inline(always)]
1823    pub fn moscsf(
1824        self,
1825    ) -> crate::common::RegisterField<
1826        3,
1827        0x1,
1828        1,
1829        0,
1830        oscsf::Moscsf,
1831        oscsf::Moscsf,
1832        Oscsf_SPEC,
1833        crate::common::R,
1834    > {
1835        crate::common::RegisterField::<
1836            3,
1837            0x1,
1838            1,
1839            0,
1840            oscsf::Moscsf,
1841            oscsf::Moscsf,
1842            Oscsf_SPEC,
1843            crate::common::R,
1844        >::from_register(self, 0)
1845    }
1846
1847    #[doc = "PLL Clock Oscillation Stabilization Flag"]
1848    #[inline(always)]
1849    pub fn pllsf(
1850        self,
1851    ) -> crate::common::RegisterField<
1852        5,
1853        0x1,
1854        1,
1855        0,
1856        oscsf::Pllsf,
1857        oscsf::Pllsf,
1858        Oscsf_SPEC,
1859        crate::common::R,
1860    > {
1861        crate::common::RegisterField::<
1862            5,
1863            0x1,
1864            1,
1865            0,
1866            oscsf::Pllsf,
1867            oscsf::Pllsf,
1868            Oscsf_SPEC,
1869            crate::common::R,
1870        >::from_register(self, 0)
1871    }
1872}
1873impl ::core::default::Default for Oscsf {
1874    #[inline(always)]
1875    fn default() -> Oscsf {
1876        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1877    }
1878}
1879pub mod oscsf {
1880
1881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1882    pub struct Hocosf_SPEC;
1883    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1884    impl Hocosf {
1885        #[doc = "The HOCO clock is stopped or is not yet stable"]
1886        pub const _0: Self = Self::new(0);
1887
1888        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1889        pub const _1: Self = Self::new(1);
1890    }
1891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1892    pub struct Moscsf_SPEC;
1893    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1894    impl Moscsf {
1895        #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1896        pub const _0: Self = Self::new(0);
1897
1898        #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1899        pub const _1: Self = Self::new(1);
1900    }
1901    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1902    pub struct Pllsf_SPEC;
1903    pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
1904    impl Pllsf {
1905        #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
1906        pub const _0: Self = Self::new(0);
1907
1908        #[doc = "The PLL clock is stable, so is available for use as the system clock"]
1909        pub const _1: Self = Self::new(1);
1910    }
1911}
1912#[doc(hidden)]
1913#[derive(Copy, Clone, Eq, PartialEq)]
1914pub struct Ckocr_SPEC;
1915impl crate::sealed::RegSpec for Ckocr_SPEC {
1916    type DataType = u8;
1917}
1918
1919#[doc = "Clock Out Control Register"]
1920pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1921
1922impl Ckocr {
1923    #[doc = "Clock Out Source Select"]
1924    #[inline(always)]
1925    pub fn ckosel(
1926        self,
1927    ) -> crate::common::RegisterField<
1928        0,
1929        0x7,
1930        1,
1931        0,
1932        ckocr::Ckosel,
1933        ckocr::Ckosel,
1934        Ckocr_SPEC,
1935        crate::common::RW,
1936    > {
1937        crate::common::RegisterField::<
1938            0,
1939            0x7,
1940            1,
1941            0,
1942            ckocr::Ckosel,
1943            ckocr::Ckosel,
1944            Ckocr_SPEC,
1945            crate::common::RW,
1946        >::from_register(self, 0)
1947    }
1948
1949    #[doc = "Clock Output Frequency Division Ratio"]
1950    #[inline(always)]
1951    pub fn ckodiv(
1952        self,
1953    ) -> crate::common::RegisterField<
1954        4,
1955        0x7,
1956        1,
1957        0,
1958        ckocr::Ckodiv,
1959        ckocr::Ckodiv,
1960        Ckocr_SPEC,
1961        crate::common::RW,
1962    > {
1963        crate::common::RegisterField::<
1964            4,
1965            0x7,
1966            1,
1967            0,
1968            ckocr::Ckodiv,
1969            ckocr::Ckodiv,
1970            Ckocr_SPEC,
1971            crate::common::RW,
1972        >::from_register(self, 0)
1973    }
1974
1975    #[doc = "Clock Out Enable"]
1976    #[inline(always)]
1977    pub fn ckoen(
1978        self,
1979    ) -> crate::common::RegisterField<
1980        7,
1981        0x1,
1982        1,
1983        0,
1984        ckocr::Ckoen,
1985        ckocr::Ckoen,
1986        Ckocr_SPEC,
1987        crate::common::RW,
1988    > {
1989        crate::common::RegisterField::<
1990            7,
1991            0x1,
1992            1,
1993            0,
1994            ckocr::Ckoen,
1995            ckocr::Ckoen,
1996            Ckocr_SPEC,
1997            crate::common::RW,
1998        >::from_register(self, 0)
1999    }
2000}
2001impl ::core::default::Default for Ckocr {
2002    #[inline(always)]
2003    fn default() -> Ckocr {
2004        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
2005    }
2006}
2007pub mod ckocr {
2008
2009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2010    pub struct Ckosel_SPEC;
2011    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2012    impl Ckosel {
2013        #[doc = "HOCO (value after reset)"]
2014        pub const _000: Self = Self::new(0);
2015
2016        #[doc = "MOCO"]
2017        pub const _001: Self = Self::new(1);
2018
2019        #[doc = "LOCO"]
2020        pub const _010: Self = Self::new(2);
2021
2022        #[doc = "MOSC"]
2023        pub const _011: Self = Self::new(3);
2024
2025        #[doc = "SOSC"]
2026        pub const _100: Self = Self::new(4);
2027
2028        #[doc = "Setting prohibited"]
2029        pub const _101: Self = Self::new(5);
2030
2031        #[doc = "Setting prohibited"]
2032        pub const OTHERS: Self = Self::new(0);
2033    }
2034    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2035    pub struct Ckodiv_SPEC;
2036    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2037    impl Ckodiv {
2038        #[doc = "x 1/1"]
2039        pub const _000: Self = Self::new(0);
2040
2041        #[doc = "x 1/2"]
2042        pub const _001: Self = Self::new(1);
2043
2044        #[doc = "x 1/4"]
2045        pub const _010: Self = Self::new(2);
2046
2047        #[doc = "x 1/8"]
2048        pub const _011: Self = Self::new(3);
2049
2050        #[doc = "x 1/16"]
2051        pub const _100: Self = Self::new(4);
2052
2053        #[doc = "x 1/32"]
2054        pub const _101: Self = Self::new(5);
2055
2056        #[doc = "x 1/64"]
2057        pub const _110: Self = Self::new(6);
2058
2059        #[doc = "x 1/128"]
2060        pub const _111: Self = Self::new(7);
2061    }
2062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2063    pub struct Ckoen_SPEC;
2064    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2065    impl Ckoen {
2066        #[doc = "Disable clock out"]
2067        pub const _0: Self = Self::new(0);
2068
2069        #[doc = "Enable clock out"]
2070        pub const _1: Self = Self::new(1);
2071    }
2072}
2073#[doc(hidden)]
2074#[derive(Copy, Clone, Eq, PartialEq)]
2075pub struct Ostdcr_SPEC;
2076impl crate::sealed::RegSpec for Ostdcr_SPEC {
2077    type DataType = u8;
2078}
2079
2080#[doc = "Oscillation Stop Detection Control Register"]
2081pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
2082
2083impl Ostdcr {
2084    #[doc = "Oscillation Stop Detection Interrupt Enable"]
2085    #[inline(always)]
2086    pub fn ostdie(
2087        self,
2088    ) -> crate::common::RegisterField<
2089        0,
2090        0x1,
2091        1,
2092        0,
2093        ostdcr::Ostdie,
2094        ostdcr::Ostdie,
2095        Ostdcr_SPEC,
2096        crate::common::RW,
2097    > {
2098        crate::common::RegisterField::<
2099            0,
2100            0x1,
2101            1,
2102            0,
2103            ostdcr::Ostdie,
2104            ostdcr::Ostdie,
2105            Ostdcr_SPEC,
2106            crate::common::RW,
2107        >::from_register(self, 0)
2108    }
2109
2110    #[doc = "Oscillation Stop Detection Function Enable"]
2111    #[inline(always)]
2112    pub fn ostde(
2113        self,
2114    ) -> crate::common::RegisterField<
2115        7,
2116        0x1,
2117        1,
2118        0,
2119        ostdcr::Ostde,
2120        ostdcr::Ostde,
2121        Ostdcr_SPEC,
2122        crate::common::RW,
2123    > {
2124        crate::common::RegisterField::<
2125            7,
2126            0x1,
2127            1,
2128            0,
2129            ostdcr::Ostde,
2130            ostdcr::Ostde,
2131            Ostdcr_SPEC,
2132            crate::common::RW,
2133        >::from_register(self, 0)
2134    }
2135}
2136impl ::core::default::Default for Ostdcr {
2137    #[inline(always)]
2138    fn default() -> Ostdcr {
2139        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
2140    }
2141}
2142pub mod ostdcr {
2143
2144    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2145    pub struct Ostdie_SPEC;
2146    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
2147    impl Ostdie {
2148        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
2149        pub const _0: Self = Self::new(0);
2150
2151        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
2152        pub const _1: Self = Self::new(1);
2153    }
2154    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2155    pub struct Ostde_SPEC;
2156    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
2157    impl Ostde {
2158        #[doc = "Disable oscillation stop detection function"]
2159        pub const _0: Self = Self::new(0);
2160
2161        #[doc = "Enable oscillation stop detection function"]
2162        pub const _1: Self = Self::new(1);
2163    }
2164}
2165#[doc(hidden)]
2166#[derive(Copy, Clone, Eq, PartialEq)]
2167pub struct Ostdsr_SPEC;
2168impl crate::sealed::RegSpec for Ostdsr_SPEC {
2169    type DataType = u8;
2170}
2171
2172#[doc = "Oscillation Stop Detection Status Register"]
2173pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
2174
2175impl Ostdsr {
2176    #[doc = "Oscillation Stop Detection Flag"]
2177    #[inline(always)]
2178    pub fn ostdf(
2179        self,
2180    ) -> crate::common::RegisterField<
2181        0,
2182        0x1,
2183        1,
2184        0,
2185        ostdsr::Ostdf,
2186        ostdsr::Ostdf,
2187        Ostdsr_SPEC,
2188        crate::common::RW,
2189    > {
2190        crate::common::RegisterField::<
2191            0,
2192            0x1,
2193            1,
2194            0,
2195            ostdsr::Ostdf,
2196            ostdsr::Ostdf,
2197            Ostdsr_SPEC,
2198            crate::common::RW,
2199        >::from_register(self, 0)
2200    }
2201}
2202impl ::core::default::Default for Ostdsr {
2203    #[inline(always)]
2204    fn default() -> Ostdsr {
2205        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
2206    }
2207}
2208pub mod ostdsr {
2209
2210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2211    pub struct Ostdf_SPEC;
2212    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
2213    impl Ostdf {
2214        #[doc = "Main clock oscillation stop not detected"]
2215        pub const _0: Self = Self::new(0);
2216
2217        #[doc = "Main clock oscillation stop detected"]
2218        pub const _1: Self = Self::new(1);
2219    }
2220}
2221#[doc(hidden)]
2222#[derive(Copy, Clone, Eq, PartialEq)]
2223pub struct Mocoutcr_SPEC;
2224impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2225    type DataType = u8;
2226}
2227
2228#[doc = "MOCO User Trimming Control Register"]
2229pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2230
2231impl Mocoutcr {
2232    #[doc = "MOCO User Trimming"]
2233    #[inline(always)]
2234    pub fn mocoutrm(
2235        self,
2236    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2237        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2238    }
2239}
2240impl ::core::default::Default for Mocoutcr {
2241    #[inline(always)]
2242    fn default() -> Mocoutcr {
2243        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2244    }
2245}
2246
2247#[doc(hidden)]
2248#[derive(Copy, Clone, Eq, PartialEq)]
2249pub struct Hocoutcr_SPEC;
2250impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2251    type DataType = u8;
2252}
2253
2254#[doc = "HOCO User Trimming Control Register"]
2255pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2256
2257impl Hocoutcr {
2258    #[doc = "HOCO User Trimming"]
2259    #[inline(always)]
2260    pub fn hocoutrm(
2261        self,
2262    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2263        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2264    }
2265}
2266impl ::core::default::Default for Hocoutcr {
2267    #[inline(always)]
2268    fn default() -> Hocoutcr {
2269        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2270    }
2271}
2272
2273#[doc(hidden)]
2274#[derive(Copy, Clone, Eq, PartialEq)]
2275pub struct Usbckdivcr_SPEC;
2276impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
2277    type DataType = u8;
2278}
2279
2280#[doc = "USB Clock Division Control Register"]
2281pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
2282
2283impl Usbckdivcr {
2284    #[doc = "USB Clock (USBCLK) Division Select"]
2285    #[inline(always)]
2286    pub fn usbckdiv(
2287        self,
2288    ) -> crate::common::RegisterField<
2289        0,
2290        0x7,
2291        1,
2292        0,
2293        usbckdivcr::Usbckdiv,
2294        usbckdivcr::Usbckdiv,
2295        Usbckdivcr_SPEC,
2296        crate::common::RW,
2297    > {
2298        crate::common::RegisterField::<
2299            0,
2300            0x7,
2301            1,
2302            0,
2303            usbckdivcr::Usbckdiv,
2304            usbckdivcr::Usbckdiv,
2305            Usbckdivcr_SPEC,
2306            crate::common::RW,
2307        >::from_register(self, 0)
2308    }
2309}
2310impl ::core::default::Default for Usbckdivcr {
2311    #[inline(always)]
2312    fn default() -> Usbckdivcr {
2313        <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
2314    }
2315}
2316pub mod usbckdivcr {
2317
2318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2319    pub struct Usbckdiv_SPEC;
2320    pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
2321    impl Usbckdiv {
2322        #[doc = "∕ 4"]
2323        pub const _010: Self = Self::new(2);
2324
2325        #[doc = "∕ 3"]
2326        pub const _101: Self = Self::new(5);
2327
2328        #[doc = "∕ 5"]
2329        pub const _110: Self = Self::new(6);
2330
2331        #[doc = "Setting prohibited."]
2332        pub const OTHERS: Self = Self::new(0);
2333    }
2334}
2335#[doc(hidden)]
2336#[derive(Copy, Clone, Eq, PartialEq)]
2337pub struct Canfdckdivcr_SPEC;
2338impl crate::sealed::RegSpec for Canfdckdivcr_SPEC {
2339    type DataType = u8;
2340}
2341
2342#[doc = "CANFD Clock Division Control Register"]
2343pub type Canfdckdivcr = crate::RegValueT<Canfdckdivcr_SPEC>;
2344
2345impl Canfdckdivcr {
2346    #[doc = "CANFD clock (CANFDCLK) Division Select"]
2347    #[inline(always)]
2348    pub fn canfdckdiv(
2349        self,
2350    ) -> crate::common::RegisterField<
2351        0,
2352        0x7,
2353        1,
2354        0,
2355        canfdckdivcr::Canfdckdiv,
2356        canfdckdivcr::Canfdckdiv,
2357        Canfdckdivcr_SPEC,
2358        crate::common::RW,
2359    > {
2360        crate::common::RegisterField::<
2361            0,
2362            0x7,
2363            1,
2364            0,
2365            canfdckdivcr::Canfdckdiv,
2366            canfdckdivcr::Canfdckdiv,
2367            Canfdckdivcr_SPEC,
2368            crate::common::RW,
2369        >::from_register(self, 0)
2370    }
2371}
2372impl ::core::default::Default for Canfdckdivcr {
2373    #[inline(always)]
2374    fn default() -> Canfdckdivcr {
2375        <crate::RegValueT<Canfdckdivcr_SPEC> as RegisterValue<_>>::new(0)
2376    }
2377}
2378pub mod canfdckdivcr {
2379
2380    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2381    pub struct Canfdckdiv_SPEC;
2382    pub type Canfdckdiv = crate::EnumBitfieldStruct<u8, Canfdckdiv_SPEC>;
2383    impl Canfdckdiv {
2384        #[doc = "/1 (value after reset) /2 /4 /6 /8 /3 /5"]
2385        pub const _000: Self = Self::new(0);
2386    }
2387}
2388#[doc(hidden)]
2389#[derive(Copy, Clone, Eq, PartialEq)]
2390pub struct Cecckdivcr_SPEC;
2391impl crate::sealed::RegSpec for Cecckdivcr_SPEC {
2392    type DataType = u8;
2393}
2394
2395#[doc = "CEC Clock Division Control Register"]
2396pub type Cecckdivcr = crate::RegValueT<Cecckdivcr_SPEC>;
2397
2398impl Cecckdivcr {
2399    #[doc = "CEC clock (CECCLK) Division Select"]
2400    #[inline(always)]
2401    pub fn cecckdiv(
2402        self,
2403    ) -> crate::common::RegisterField<
2404        0,
2405        0x7,
2406        1,
2407        0,
2408        cecckdivcr::Cecckdiv,
2409        cecckdivcr::Cecckdiv,
2410        Cecckdivcr_SPEC,
2411        crate::common::RW,
2412    > {
2413        crate::common::RegisterField::<
2414            0,
2415            0x7,
2416            1,
2417            0,
2418            cecckdivcr::Cecckdiv,
2419            cecckdivcr::Cecckdiv,
2420            Cecckdivcr_SPEC,
2421            crate::common::RW,
2422        >::from_register(self, 0)
2423    }
2424}
2425impl ::core::default::Default for Cecckdivcr {
2426    #[inline(always)]
2427    fn default() -> Cecckdivcr {
2428        <crate::RegValueT<Cecckdivcr_SPEC> as RegisterValue<_>>::new(1)
2429    }
2430}
2431pub mod cecckdivcr {
2432
2433    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2434    pub struct Cecckdiv_SPEC;
2435    pub type Cecckdiv = crate::EnumBitfieldStruct<u8, Cecckdiv_SPEC>;
2436    impl Cecckdiv {
2437        #[doc = "/1 (value after reset)"]
2438        pub const _000: Self = Self::new(0);
2439
2440        #[doc = "/2"]
2441        pub const _001: Self = Self::new(1);
2442
2443        #[doc = "Setting prohibited"]
2444        pub const OTHERS: Self = Self::new(0);
2445    }
2446}
2447#[doc(hidden)]
2448#[derive(Copy, Clone, Eq, PartialEq)]
2449pub struct I3Cckdivcr_SPEC;
2450impl crate::sealed::RegSpec for I3Cckdivcr_SPEC {
2451    type DataType = u8;
2452}
2453
2454#[doc = "I3C Clock Division Control Register"]
2455pub type I3Cckdivcr = crate::RegValueT<I3Cckdivcr_SPEC>;
2456
2457impl I3Cckdivcr {
2458    #[doc = "I3C clock (I3CCLK) division select"]
2459    #[inline(always)]
2460    pub fn i3cckdiv(
2461        self,
2462    ) -> crate::common::RegisterField<
2463        0,
2464        0x7,
2465        1,
2466        0,
2467        i3cckdivcr::I3Cckdiv,
2468        i3cckdivcr::I3Cckdiv,
2469        I3Cckdivcr_SPEC,
2470        crate::common::RW,
2471    > {
2472        crate::common::RegisterField::<
2473            0,
2474            0x7,
2475            1,
2476            0,
2477            i3cckdivcr::I3Cckdiv,
2478            i3cckdivcr::I3Cckdiv,
2479            I3Cckdivcr_SPEC,
2480            crate::common::RW,
2481        >::from_register(self, 0)
2482    }
2483}
2484impl ::core::default::Default for I3Cckdivcr {
2485    #[inline(always)]
2486    fn default() -> I3Cckdivcr {
2487        <crate::RegValueT<I3Cckdivcr_SPEC> as RegisterValue<_>>::new(0)
2488    }
2489}
2490pub mod i3cckdivcr {
2491
2492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2493    pub struct I3Cckdiv_SPEC;
2494    pub type I3Cckdiv = crate::EnumBitfieldStruct<u8, I3Cckdiv_SPEC>;
2495    impl I3Cckdiv {
2496        #[doc = "/1 (value after reset)"]
2497        pub const _000: Self = Self::new(0);
2498
2499        #[doc = "/2"]
2500        pub const _001: Self = Self::new(1);
2501
2502        #[doc = "/4"]
2503        pub const _010: Self = Self::new(2);
2504
2505        #[doc = "/6"]
2506        pub const _011: Self = Self::new(3);
2507
2508        #[doc = "/8"]
2509        pub const _100: Self = Self::new(4);
2510
2511        #[doc = "Setting prohibited"]
2512        pub const OTHERS: Self = Self::new(0);
2513    }
2514}
2515#[doc(hidden)]
2516#[derive(Copy, Clone, Eq, PartialEq)]
2517pub struct Usbckcr_SPEC;
2518impl crate::sealed::RegSpec for Usbckcr_SPEC {
2519    type DataType = u8;
2520}
2521
2522#[doc = "USB Clock Control Register"]
2523pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
2524
2525impl Usbckcr {
2526    #[doc = "USB Clock (USBCLK) Source Select"]
2527    #[inline(always)]
2528    pub fn usbcksel(
2529        self,
2530    ) -> crate::common::RegisterField<
2531        0,
2532        0x7,
2533        1,
2534        0,
2535        usbckcr::Usbcksel,
2536        usbckcr::Usbcksel,
2537        Usbckcr_SPEC,
2538        crate::common::RW,
2539    > {
2540        crate::common::RegisterField::<
2541            0,
2542            0x7,
2543            1,
2544            0,
2545            usbckcr::Usbcksel,
2546            usbckcr::Usbcksel,
2547            Usbckcr_SPEC,
2548            crate::common::RW,
2549        >::from_register(self, 0)
2550    }
2551
2552    #[doc = "USB Clock (USBCLK) Switching Request"]
2553    #[inline(always)]
2554    pub fn usbcksreq(
2555        self,
2556    ) -> crate::common::RegisterField<
2557        6,
2558        0x1,
2559        1,
2560        0,
2561        usbckcr::Usbcksreq,
2562        usbckcr::Usbcksreq,
2563        Usbckcr_SPEC,
2564        crate::common::RW,
2565    > {
2566        crate::common::RegisterField::<
2567            6,
2568            0x1,
2569            1,
2570            0,
2571            usbckcr::Usbcksreq,
2572            usbckcr::Usbcksreq,
2573            Usbckcr_SPEC,
2574            crate::common::RW,
2575        >::from_register(self, 0)
2576    }
2577
2578    #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2579    #[inline(always)]
2580    pub fn usbcksrdy(
2581        self,
2582    ) -> crate::common::RegisterField<
2583        7,
2584        0x1,
2585        1,
2586        0,
2587        usbckcr::Usbcksrdy,
2588        usbckcr::Usbcksrdy,
2589        Usbckcr_SPEC,
2590        crate::common::R,
2591    > {
2592        crate::common::RegisterField::<
2593            7,
2594            0x1,
2595            1,
2596            0,
2597            usbckcr::Usbcksrdy,
2598            usbckcr::Usbcksrdy,
2599            Usbckcr_SPEC,
2600            crate::common::R,
2601        >::from_register(self, 0)
2602    }
2603}
2604impl ::core::default::Default for Usbckcr {
2605    #[inline(always)]
2606    fn default() -> Usbckcr {
2607        <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2608    }
2609}
2610pub mod usbckcr {
2611
2612    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2613    pub struct Usbcksel_SPEC;
2614    pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2615    impl Usbcksel {
2616        #[doc = "PLL"]
2617        pub const _101: Self = Self::new(5);
2618
2619        #[doc = "Setting prohibited."]
2620        pub const OTHERS: Self = Self::new(0);
2621    }
2622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2623    pub struct Usbcksreq_SPEC;
2624    pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2625    impl Usbcksreq {
2626        #[doc = "No request"]
2627        pub const _0: Self = Self::new(0);
2628
2629        #[doc = "Request switching."]
2630        pub const _1: Self = Self::new(1);
2631    }
2632    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2633    pub struct Usbcksrdy_SPEC;
2634    pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2635    impl Usbcksrdy {
2636        #[doc = "Impossible to Switch"]
2637        pub const _0: Self = Self::new(0);
2638
2639        #[doc = "Possible to Switch"]
2640        pub const _1: Self = Self::new(1);
2641    }
2642}
2643#[doc(hidden)]
2644#[derive(Copy, Clone, Eq, PartialEq)]
2645pub struct Canfdckcr_SPEC;
2646impl crate::sealed::RegSpec for Canfdckcr_SPEC {
2647    type DataType = u8;
2648}
2649
2650#[doc = "CANFD Clock Control Register"]
2651pub type Canfdckcr = crate::RegValueT<Canfdckcr_SPEC>;
2652
2653impl Canfdckcr {
2654    #[doc = "CANFD clock (CANFDCLK) Source Select"]
2655    #[inline(always)]
2656    pub fn canfdcksel(
2657        self,
2658    ) -> crate::common::RegisterField<
2659        0,
2660        0x7,
2661        1,
2662        0,
2663        canfdckcr::Canfdcksel,
2664        canfdckcr::Canfdcksel,
2665        Canfdckcr_SPEC,
2666        crate::common::RW,
2667    > {
2668        crate::common::RegisterField::<
2669            0,
2670            0x7,
2671            1,
2672            0,
2673            canfdckcr::Canfdcksel,
2674            canfdckcr::Canfdcksel,
2675            Canfdckcr_SPEC,
2676            crate::common::RW,
2677        >::from_register(self, 0)
2678    }
2679
2680    #[doc = "CANFD clock (CANFDCLK) Switching Request"]
2681    #[inline(always)]
2682    pub fn canfdcksreq(
2683        self,
2684    ) -> crate::common::RegisterField<
2685        6,
2686        0x1,
2687        1,
2688        0,
2689        canfdckcr::Canfdcksreq,
2690        canfdckcr::Canfdcksreq,
2691        Canfdckcr_SPEC,
2692        crate::common::RW,
2693    > {
2694        crate::common::RegisterField::<
2695            6,
2696            0x1,
2697            1,
2698            0,
2699            canfdckcr::Canfdcksreq,
2700            canfdckcr::Canfdcksreq,
2701            Canfdckcr_SPEC,
2702            crate::common::RW,
2703        >::from_register(self, 0)
2704    }
2705
2706    #[doc = "CANFD clock (CANFDCLK) Switching Ready state flag"]
2707    #[inline(always)]
2708    pub fn canfdcksrdy(
2709        self,
2710    ) -> crate::common::RegisterField<
2711        7,
2712        0x1,
2713        1,
2714        0,
2715        canfdckcr::Canfdcksrdy,
2716        canfdckcr::Canfdcksrdy,
2717        Canfdckcr_SPEC,
2718        crate::common::R,
2719    > {
2720        crate::common::RegisterField::<
2721            7,
2722            0x1,
2723            1,
2724            0,
2725            canfdckcr::Canfdcksrdy,
2726            canfdckcr::Canfdcksrdy,
2727            Canfdckcr_SPEC,
2728            crate::common::R,
2729        >::from_register(self, 0)
2730    }
2731}
2732impl ::core::default::Default for Canfdckcr {
2733    #[inline(always)]
2734    fn default() -> Canfdckcr {
2735        <crate::RegValueT<Canfdckcr_SPEC> as RegisterValue<_>>::new(1)
2736    }
2737}
2738pub mod canfdckcr {
2739
2740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2741    pub struct Canfdcksel_SPEC;
2742    pub type Canfdcksel = crate::EnumBitfieldStruct<u8, Canfdcksel_SPEC>;
2743    impl Canfdcksel {
2744        #[doc = "PLL"]
2745        pub const _101: Self = Self::new(5);
2746
2747        #[doc = "Setting prohibited"]
2748        pub const OTHERS: Self = Self::new(0);
2749    }
2750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2751    pub struct Canfdcksreq_SPEC;
2752    pub type Canfdcksreq = crate::EnumBitfieldStruct<u8, Canfdcksreq_SPEC>;
2753    impl Canfdcksreq {
2754        #[doc = "No request"]
2755        pub const _0: Self = Self::new(0);
2756
2757        #[doc = "Request switching"]
2758        pub const _1: Self = Self::new(1);
2759    }
2760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2761    pub struct Canfdcksrdy_SPEC;
2762    pub type Canfdcksrdy = crate::EnumBitfieldStruct<u8, Canfdcksrdy_SPEC>;
2763    impl Canfdcksrdy {
2764        #[doc = "Impossible to Switch"]
2765        pub const _0: Self = Self::new(0);
2766
2767        #[doc = "Possible to Switch"]
2768        pub const _1: Self = Self::new(1);
2769    }
2770}
2771#[doc(hidden)]
2772#[derive(Copy, Clone, Eq, PartialEq)]
2773pub struct Cecckcr_SPEC;
2774impl crate::sealed::RegSpec for Cecckcr_SPEC {
2775    type DataType = u8;
2776}
2777
2778#[doc = "CEC Clock Control Register"]
2779pub type Cecckcr = crate::RegValueT<Cecckcr_SPEC>;
2780
2781impl Cecckcr {
2782    #[doc = "CEC clock (CECCLK) Source Select"]
2783    #[inline(always)]
2784    pub fn ceccksel(
2785        self,
2786    ) -> crate::common::RegisterField<
2787        0,
2788        0x7,
2789        1,
2790        0,
2791        cecckcr::Ceccksel,
2792        cecckcr::Ceccksel,
2793        Cecckcr_SPEC,
2794        crate::common::RW,
2795    > {
2796        crate::common::RegisterField::<
2797            0,
2798            0x7,
2799            1,
2800            0,
2801            cecckcr::Ceccksel,
2802            cecckcr::Ceccksel,
2803            Cecckcr_SPEC,
2804            crate::common::RW,
2805        >::from_register(self, 0)
2806    }
2807
2808    #[doc = "CEC clock (CECCLK) Switching Request"]
2809    #[inline(always)]
2810    pub fn ceccksreq(
2811        self,
2812    ) -> crate::common::RegisterField<
2813        6,
2814        0x1,
2815        1,
2816        0,
2817        cecckcr::Ceccksreq,
2818        cecckcr::Ceccksreq,
2819        Cecckcr_SPEC,
2820        crate::common::RW,
2821    > {
2822        crate::common::RegisterField::<
2823            6,
2824            0x1,
2825            1,
2826            0,
2827            cecckcr::Ceccksreq,
2828            cecckcr::Ceccksreq,
2829            Cecckcr_SPEC,
2830            crate::common::RW,
2831        >::from_register(self, 0)
2832    }
2833
2834    #[doc = "CEC clock (CECCLK) Switching Ready state flag"]
2835    #[inline(always)]
2836    pub fn ceccksrdy(
2837        self,
2838    ) -> crate::common::RegisterField<
2839        7,
2840        0x1,
2841        1,
2842        0,
2843        cecckcr::Ceccksrdy,
2844        cecckcr::Ceccksrdy,
2845        Cecckcr_SPEC,
2846        crate::common::R,
2847    > {
2848        crate::common::RegisterField::<
2849            7,
2850            0x1,
2851            1,
2852            0,
2853            cecckcr::Ceccksrdy,
2854            cecckcr::Ceccksrdy,
2855            Cecckcr_SPEC,
2856            crate::common::R,
2857        >::from_register(self, 0)
2858    }
2859}
2860impl ::core::default::Default for Cecckcr {
2861    #[inline(always)]
2862    fn default() -> Cecckcr {
2863        <crate::RegValueT<Cecckcr_SPEC> as RegisterValue<_>>::new(1)
2864    }
2865}
2866pub mod cecckcr {
2867
2868    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2869    pub struct Ceccksel_SPEC;
2870    pub type Ceccksel = crate::EnumBitfieldStruct<u8, Ceccksel_SPEC>;
2871    impl Ceccksel {
2872        #[doc = "Main clock oscillator"]
2873        pub const _011: Self = Self::new(3);
2874
2875        #[doc = "Sub-clock oscillator"]
2876        pub const _100: Self = Self::new(4);
2877
2878        #[doc = "Setting prohibited"]
2879        pub const OTHERS: Self = Self::new(0);
2880    }
2881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2882    pub struct Ceccksreq_SPEC;
2883    pub type Ceccksreq = crate::EnumBitfieldStruct<u8, Ceccksreq_SPEC>;
2884    impl Ceccksreq {
2885        #[doc = "No request"]
2886        pub const _0: Self = Self::new(0);
2887
2888        #[doc = "Request switching"]
2889        pub const _1: Self = Self::new(1);
2890    }
2891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2892    pub struct Ceccksrdy_SPEC;
2893    pub type Ceccksrdy = crate::EnumBitfieldStruct<u8, Ceccksrdy_SPEC>;
2894    impl Ceccksrdy {
2895        #[doc = "Impossible to Switch"]
2896        pub const _0: Self = Self::new(0);
2897
2898        #[doc = "Possible to Switch"]
2899        pub const _1: Self = Self::new(1);
2900    }
2901}
2902#[doc(hidden)]
2903#[derive(Copy, Clone, Eq, PartialEq)]
2904pub struct I3Cckcr_SPEC;
2905impl crate::sealed::RegSpec for I3Cckcr_SPEC {
2906    type DataType = u8;
2907}
2908
2909#[doc = "I3C Clock Control Register"]
2910pub type I3Cckcr = crate::RegValueT<I3Cckcr_SPEC>;
2911
2912impl I3Cckcr {
2913    #[doc = "I3C clock (I3CCLK) source select"]
2914    #[inline(always)]
2915    pub fn i3ccksel(
2916        self,
2917    ) -> crate::common::RegisterField<
2918        0,
2919        0x7,
2920        1,
2921        0,
2922        i3cckcr::I3Ccksel,
2923        i3cckcr::I3Ccksel,
2924        I3Cckcr_SPEC,
2925        crate::common::RW,
2926    > {
2927        crate::common::RegisterField::<
2928            0,
2929            0x7,
2930            1,
2931            0,
2932            i3cckcr::I3Ccksel,
2933            i3cckcr::I3Ccksel,
2934            I3Cckcr_SPEC,
2935            crate::common::RW,
2936        >::from_register(self, 0)
2937    }
2938
2939    #[doc = "I3C clock (I3CCLK) switching request"]
2940    #[inline(always)]
2941    pub fn i3ccksreq(
2942        self,
2943    ) -> crate::common::RegisterField<
2944        6,
2945        0x1,
2946        1,
2947        0,
2948        i3cckcr::I3Ccksreq,
2949        i3cckcr::I3Ccksreq,
2950        I3Cckcr_SPEC,
2951        crate::common::RW,
2952    > {
2953        crate::common::RegisterField::<
2954            6,
2955            0x1,
2956            1,
2957            0,
2958            i3cckcr::I3Ccksreq,
2959            i3cckcr::I3Ccksreq,
2960            I3Cckcr_SPEC,
2961            crate::common::RW,
2962        >::from_register(self, 0)
2963    }
2964
2965    #[doc = "I3C clock (I3CCLK) switching ready state flag"]
2966    #[inline(always)]
2967    pub fn i3ccksrdy(
2968        self,
2969    ) -> crate::common::RegisterField<
2970        7,
2971        0x1,
2972        1,
2973        0,
2974        i3cckcr::I3Ccksrdy,
2975        i3cckcr::I3Ccksrdy,
2976        I3Cckcr_SPEC,
2977        crate::common::R,
2978    > {
2979        crate::common::RegisterField::<
2980            7,
2981            0x1,
2982            1,
2983            0,
2984            i3cckcr::I3Ccksrdy,
2985            i3cckcr::I3Ccksrdy,
2986            I3Cckcr_SPEC,
2987            crate::common::R,
2988        >::from_register(self, 0)
2989    }
2990}
2991impl ::core::default::Default for I3Cckcr {
2992    #[inline(always)]
2993    fn default() -> I3Cckcr {
2994        <crate::RegValueT<I3Cckcr_SPEC> as RegisterValue<_>>::new(0)
2995    }
2996}
2997pub mod i3cckcr {
2998
2999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3000    pub struct I3Ccksel_SPEC;
3001    pub type I3Ccksel = crate::EnumBitfieldStruct<u8, I3Ccksel_SPEC>;
3002    impl I3Ccksel {
3003        #[doc = "HOCO"]
3004        pub const _000: Self = Self::new(0);
3005
3006        #[doc = "MOCO (value after reset)"]
3007        pub const _001: Self = Self::new(1);
3008
3009        #[doc = "LOCO"]
3010        pub const _010: Self = Self::new(2);
3011
3012        #[doc = "Main clock oscillator"]
3013        pub const _011: Self = Self::new(3);
3014
3015        #[doc = "Sub-clock oscillator"]
3016        pub const _100: Self = Self::new(4);
3017
3018        #[doc = "PLL"]
3019        pub const _101: Self = Self::new(5);
3020
3021        #[doc = "Setting prohibited"]
3022        pub const OTHERS: Self = Self::new(0);
3023    }
3024    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3025    pub struct I3Ccksreq_SPEC;
3026    pub type I3Ccksreq = crate::EnumBitfieldStruct<u8, I3Ccksreq_SPEC>;
3027    impl I3Ccksreq {
3028        #[doc = "No request"]
3029        pub const _0: Self = Self::new(0);
3030
3031        #[doc = "Request switching"]
3032        pub const _1: Self = Self::new(1);
3033    }
3034    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3035    pub struct I3Ccksrdy_SPEC;
3036    pub type I3Ccksrdy = crate::EnumBitfieldStruct<u8, I3Ccksrdy_SPEC>;
3037    impl I3Ccksrdy {
3038        #[doc = "Impossible to Switch"]
3039        pub const _0: Self = Self::new(0);
3040
3041        #[doc = "Possible to Switch"]
3042        pub const _1: Self = Self::new(1);
3043    }
3044}
3045#[doc(hidden)]
3046#[derive(Copy, Clone, Eq, PartialEq)]
3047pub struct Snzcr_SPEC;
3048impl crate::sealed::RegSpec for Snzcr_SPEC {
3049    type DataType = u8;
3050}
3051
3052#[doc = "Snooze Control Register"]
3053pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
3054
3055impl Snzcr {
3056    #[doc = "RXD0 Snooze Request Enable"]
3057    #[inline(always)]
3058    pub fn rxdreqen(
3059        self,
3060    ) -> crate::common::RegisterField<
3061        0,
3062        0x1,
3063        1,
3064        0,
3065        snzcr::Rxdreqen,
3066        snzcr::Rxdreqen,
3067        Snzcr_SPEC,
3068        crate::common::RW,
3069    > {
3070        crate::common::RegisterField::<
3071            0,
3072            0x1,
3073            1,
3074            0,
3075            snzcr::Rxdreqen,
3076            snzcr::Rxdreqen,
3077            Snzcr_SPEC,
3078            crate::common::RW,
3079        >::from_register(self, 0)
3080    }
3081
3082    #[doc = "DTC Enable in Snooze mode"]
3083    #[inline(always)]
3084    pub fn snzdtcen(
3085        self,
3086    ) -> crate::common::RegisterField<
3087        1,
3088        0x1,
3089        1,
3090        0,
3091        snzcr::Snzdtcen,
3092        snzcr::Snzdtcen,
3093        Snzcr_SPEC,
3094        crate::common::RW,
3095    > {
3096        crate::common::RegisterField::<
3097            1,
3098            0x1,
3099            1,
3100            0,
3101            snzcr::Snzdtcen,
3102            snzcr::Snzdtcen,
3103            Snzcr_SPEC,
3104            crate::common::RW,
3105        >::from_register(self, 0)
3106    }
3107
3108    #[doc = "Snooze mode Enable"]
3109    #[inline(always)]
3110    pub fn snze(
3111        self,
3112    ) -> crate::common::RegisterField<
3113        7,
3114        0x1,
3115        1,
3116        0,
3117        snzcr::Snze,
3118        snzcr::Snze,
3119        Snzcr_SPEC,
3120        crate::common::RW,
3121    > {
3122        crate::common::RegisterField::<
3123            7,
3124            0x1,
3125            1,
3126            0,
3127            snzcr::Snze,
3128            snzcr::Snze,
3129            Snzcr_SPEC,
3130            crate::common::RW,
3131        >::from_register(self, 0)
3132    }
3133}
3134impl ::core::default::Default for Snzcr {
3135    #[inline(always)]
3136    fn default() -> Snzcr {
3137        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
3138    }
3139}
3140pub mod snzcr {
3141
3142    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3143    pub struct Rxdreqen_SPEC;
3144    pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
3145    impl Rxdreqen {
3146        #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
3147        pub const _0: Self = Self::new(0);
3148
3149        #[doc = "Detect RXD0 falling edge in Software Standby mode"]
3150        pub const _1: Self = Self::new(1);
3151    }
3152    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3153    pub struct Snzdtcen_SPEC;
3154    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
3155    impl Snzdtcen {
3156        #[doc = "Disable DTC operation"]
3157        pub const _0: Self = Self::new(0);
3158
3159        #[doc = "Enable DTC operation"]
3160        pub const _1: Self = Self::new(1);
3161    }
3162    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3163    pub struct Snze_SPEC;
3164    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
3165    impl Snze {
3166        #[doc = "Disable Snooze mode"]
3167        pub const _0: Self = Self::new(0);
3168
3169        #[doc = "Enable Snooze mode"]
3170        pub const _1: Self = Self::new(1);
3171    }
3172}
3173#[doc(hidden)]
3174#[derive(Copy, Clone, Eq, PartialEq)]
3175pub struct Snzedcr0_SPEC;
3176impl crate::sealed::RegSpec for Snzedcr0_SPEC {
3177    type DataType = u8;
3178}
3179
3180#[doc = "Snooze End Control Register 0"]
3181pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
3182
3183impl Snzedcr0 {
3184    #[doc = "AGT1 Underflow Snooze End Enable"]
3185    #[inline(always)]
3186    pub fn agtunfed(
3187        self,
3188    ) -> crate::common::RegisterField<
3189        0,
3190        0x1,
3191        1,
3192        0,
3193        snzedcr0::Agtunfed,
3194        snzedcr0::Agtunfed,
3195        Snzedcr0_SPEC,
3196        crate::common::RW,
3197    > {
3198        crate::common::RegisterField::<
3199            0,
3200            0x1,
3201            1,
3202            0,
3203            snzedcr0::Agtunfed,
3204            snzedcr0::Agtunfed,
3205            Snzedcr0_SPEC,
3206            crate::common::RW,
3207        >::from_register(self, 0)
3208    }
3209
3210    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
3211    #[inline(always)]
3212    pub fn dtczred(
3213        self,
3214    ) -> crate::common::RegisterField<
3215        1,
3216        0x1,
3217        1,
3218        0,
3219        snzedcr0::Dtczred,
3220        snzedcr0::Dtczred,
3221        Snzedcr0_SPEC,
3222        crate::common::RW,
3223    > {
3224        crate::common::RegisterField::<
3225            1,
3226            0x1,
3227            1,
3228            0,
3229            snzedcr0::Dtczred,
3230            snzedcr0::Dtczred,
3231            Snzedcr0_SPEC,
3232            crate::common::RW,
3233        >::from_register(self, 0)
3234    }
3235
3236    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
3237    #[inline(always)]
3238    pub fn dtcnzred(
3239        self,
3240    ) -> crate::common::RegisterField<
3241        2,
3242        0x1,
3243        1,
3244        0,
3245        snzedcr0::Dtcnzred,
3246        snzedcr0::Dtcnzred,
3247        Snzedcr0_SPEC,
3248        crate::common::RW,
3249    > {
3250        crate::common::RegisterField::<
3251            2,
3252            0x1,
3253            1,
3254            0,
3255            snzedcr0::Dtcnzred,
3256            snzedcr0::Dtcnzred,
3257            Snzedcr0_SPEC,
3258            crate::common::RW,
3259        >::from_register(self, 0)
3260    }
3261
3262    #[doc = "ADC120 Compare Match Snooze End Enable"]
3263    #[inline(always)]
3264    pub fn ad0mated(
3265        self,
3266    ) -> crate::common::RegisterField<
3267        3,
3268        0x1,
3269        1,
3270        0,
3271        snzedcr0::Ad0Mated,
3272        snzedcr0::Ad0Mated,
3273        Snzedcr0_SPEC,
3274        crate::common::RW,
3275    > {
3276        crate::common::RegisterField::<
3277            3,
3278            0x1,
3279            1,
3280            0,
3281            snzedcr0::Ad0Mated,
3282            snzedcr0::Ad0Mated,
3283            Snzedcr0_SPEC,
3284            crate::common::RW,
3285        >::from_register(self, 0)
3286    }
3287
3288    #[doc = "ADC120 Compare Mismatch Snooze End Enable"]
3289    #[inline(always)]
3290    pub fn ad0umted(
3291        self,
3292    ) -> crate::common::RegisterField<
3293        4,
3294        0x1,
3295        1,
3296        0,
3297        snzedcr0::Ad0Umted,
3298        snzedcr0::Ad0Umted,
3299        Snzedcr0_SPEC,
3300        crate::common::RW,
3301    > {
3302        crate::common::RegisterField::<
3303            4,
3304            0x1,
3305            1,
3306            0,
3307            snzedcr0::Ad0Umted,
3308            snzedcr0::Ad0Umted,
3309            Snzedcr0_SPEC,
3310            crate::common::RW,
3311        >::from_register(self, 0)
3312    }
3313
3314    #[doc = "SCI0 Address Mismatch Snooze End Enable"]
3315    #[inline(always)]
3316    pub fn sci0umted(
3317        self,
3318    ) -> crate::common::RegisterField<
3319        7,
3320        0x1,
3321        1,
3322        0,
3323        snzedcr0::Sci0Umted,
3324        snzedcr0::Sci0Umted,
3325        Snzedcr0_SPEC,
3326        crate::common::RW,
3327    > {
3328        crate::common::RegisterField::<
3329            7,
3330            0x1,
3331            1,
3332            0,
3333            snzedcr0::Sci0Umted,
3334            snzedcr0::Sci0Umted,
3335            Snzedcr0_SPEC,
3336            crate::common::RW,
3337        >::from_register(self, 0)
3338    }
3339}
3340impl ::core::default::Default for Snzedcr0 {
3341    #[inline(always)]
3342    fn default() -> Snzedcr0 {
3343        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
3344    }
3345}
3346pub mod snzedcr0 {
3347
3348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3349    pub struct Agtunfed_SPEC;
3350    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
3351    impl Agtunfed {
3352        #[doc = "Disable the snooze end request"]
3353        pub const _0: Self = Self::new(0);
3354
3355        #[doc = "Enable the snooze end request"]
3356        pub const _1: Self = Self::new(1);
3357    }
3358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3359    pub struct Dtczred_SPEC;
3360    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
3361    impl Dtczred {
3362        #[doc = "Disable the snooze end request"]
3363        pub const _0: Self = Self::new(0);
3364
3365        #[doc = "Enable the snooze end request"]
3366        pub const _1: Self = Self::new(1);
3367    }
3368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3369    pub struct Dtcnzred_SPEC;
3370    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
3371    impl Dtcnzred {
3372        #[doc = "Disable the snooze end request"]
3373        pub const _0: Self = Self::new(0);
3374
3375        #[doc = "Enable the snooze end request"]
3376        pub const _1: Self = Self::new(1);
3377    }
3378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3379    pub struct Ad0Mated_SPEC;
3380    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
3381    impl Ad0Mated {
3382        #[doc = "Disable the snooze end request"]
3383        pub const _0: Self = Self::new(0);
3384
3385        #[doc = "Enable the snooze end request"]
3386        pub const _1: Self = Self::new(1);
3387    }
3388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3389    pub struct Ad0Umted_SPEC;
3390    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
3391    impl Ad0Umted {
3392        #[doc = "Disable the snooze end request"]
3393        pub const _0: Self = Self::new(0);
3394
3395        #[doc = "Enable the snooze end request"]
3396        pub const _1: Self = Self::new(1);
3397    }
3398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3399    pub struct Sci0Umted_SPEC;
3400    pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
3401    impl Sci0Umted {
3402        #[doc = "Disable the snooze end request"]
3403        pub const _0: Self = Self::new(0);
3404
3405        #[doc = "Enable the snooze end request"]
3406        pub const _1: Self = Self::new(1);
3407    }
3408}
3409#[doc(hidden)]
3410#[derive(Copy, Clone, Eq, PartialEq)]
3411pub struct Snzreqcr0_SPEC;
3412impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
3413    type DataType = u32;
3414}
3415
3416#[doc = "Snooze Request Control Register 0"]
3417pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
3418
3419impl Snzreqcr0 {
3420    #[doc = "Enable IRQ0 pin snooze request"]
3421    #[inline(always)]
3422    pub fn snzreqen0(
3423        self,
3424    ) -> crate::common::RegisterField<
3425        0,
3426        0x1,
3427        1,
3428        0,
3429        snzreqcr0::Snzreqen0,
3430        snzreqcr0::Snzreqen0,
3431        Snzreqcr0_SPEC,
3432        crate::common::RW,
3433    > {
3434        crate::common::RegisterField::<
3435            0,
3436            0x1,
3437            1,
3438            0,
3439            snzreqcr0::Snzreqen0,
3440            snzreqcr0::Snzreqen0,
3441            Snzreqcr0_SPEC,
3442            crate::common::RW,
3443        >::from_register(self, 0)
3444    }
3445
3446    #[doc = "Enable IRQ1 pin snooze request"]
3447    #[inline(always)]
3448    pub fn snzreqen1(
3449        self,
3450    ) -> crate::common::RegisterField<
3451        1,
3452        0x1,
3453        1,
3454        0,
3455        snzreqcr0::Snzreqen1,
3456        snzreqcr0::Snzreqen1,
3457        Snzreqcr0_SPEC,
3458        crate::common::RW,
3459    > {
3460        crate::common::RegisterField::<
3461            1,
3462            0x1,
3463            1,
3464            0,
3465            snzreqcr0::Snzreqen1,
3466            snzreqcr0::Snzreqen1,
3467            Snzreqcr0_SPEC,
3468            crate::common::RW,
3469        >::from_register(self, 0)
3470    }
3471
3472    #[doc = "Enable IRQ2 pin snooze request"]
3473    #[inline(always)]
3474    pub fn snzreqen2(
3475        self,
3476    ) -> crate::common::RegisterField<
3477        2,
3478        0x1,
3479        1,
3480        0,
3481        snzreqcr0::Snzreqen2,
3482        snzreqcr0::Snzreqen2,
3483        Snzreqcr0_SPEC,
3484        crate::common::RW,
3485    > {
3486        crate::common::RegisterField::<
3487            2,
3488            0x1,
3489            1,
3490            0,
3491            snzreqcr0::Snzreqen2,
3492            snzreqcr0::Snzreqen2,
3493            Snzreqcr0_SPEC,
3494            crate::common::RW,
3495        >::from_register(self, 0)
3496    }
3497
3498    #[doc = "Enable IRQ3 pin snooze request"]
3499    #[inline(always)]
3500    pub fn snzreqen3(
3501        self,
3502    ) -> crate::common::RegisterField<
3503        3,
3504        0x1,
3505        1,
3506        0,
3507        snzreqcr0::Snzreqen3,
3508        snzreqcr0::Snzreqen3,
3509        Snzreqcr0_SPEC,
3510        crate::common::RW,
3511    > {
3512        crate::common::RegisterField::<
3513            3,
3514            0x1,
3515            1,
3516            0,
3517            snzreqcr0::Snzreqen3,
3518            snzreqcr0::Snzreqen3,
3519            Snzreqcr0_SPEC,
3520            crate::common::RW,
3521        >::from_register(self, 0)
3522    }
3523
3524    #[doc = "Enable IRQ4 pin snooze request"]
3525    #[inline(always)]
3526    pub fn snzreqen4(
3527        self,
3528    ) -> crate::common::RegisterField<
3529        4,
3530        0x1,
3531        1,
3532        0,
3533        snzreqcr0::Snzreqen4,
3534        snzreqcr0::Snzreqen4,
3535        Snzreqcr0_SPEC,
3536        crate::common::RW,
3537    > {
3538        crate::common::RegisterField::<
3539            4,
3540            0x1,
3541            1,
3542            0,
3543            snzreqcr0::Snzreqen4,
3544            snzreqcr0::Snzreqen4,
3545            Snzreqcr0_SPEC,
3546            crate::common::RW,
3547        >::from_register(self, 0)
3548    }
3549
3550    #[doc = "Enable IRQ5 pin snooze request"]
3551    #[inline(always)]
3552    pub fn snzreqen5(
3553        self,
3554    ) -> crate::common::RegisterField<
3555        5,
3556        0x1,
3557        1,
3558        0,
3559        snzreqcr0::Snzreqen5,
3560        snzreqcr0::Snzreqen5,
3561        Snzreqcr0_SPEC,
3562        crate::common::RW,
3563    > {
3564        crate::common::RegisterField::<
3565            5,
3566            0x1,
3567            1,
3568            0,
3569            snzreqcr0::Snzreqen5,
3570            snzreqcr0::Snzreqen5,
3571            Snzreqcr0_SPEC,
3572            crate::common::RW,
3573        >::from_register(self, 0)
3574    }
3575
3576    #[doc = "Enable IRQ6 pin snooze request"]
3577    #[inline(always)]
3578    pub fn snzreqen6(
3579        self,
3580    ) -> crate::common::RegisterField<
3581        6,
3582        0x1,
3583        1,
3584        0,
3585        snzreqcr0::Snzreqen6,
3586        snzreqcr0::Snzreqen6,
3587        Snzreqcr0_SPEC,
3588        crate::common::RW,
3589    > {
3590        crate::common::RegisterField::<
3591            6,
3592            0x1,
3593            1,
3594            0,
3595            snzreqcr0::Snzreqen6,
3596            snzreqcr0::Snzreqen6,
3597            Snzreqcr0_SPEC,
3598            crate::common::RW,
3599        >::from_register(self, 0)
3600    }
3601
3602    #[doc = "Enable IRQ7 pin snooze request"]
3603    #[inline(always)]
3604    pub fn snzreqen7(
3605        self,
3606    ) -> crate::common::RegisterField<
3607        7,
3608        0x1,
3609        1,
3610        0,
3611        snzreqcr0::Snzreqen7,
3612        snzreqcr0::Snzreqen7,
3613        Snzreqcr0_SPEC,
3614        crate::common::RW,
3615    > {
3616        crate::common::RegisterField::<
3617            7,
3618            0x1,
3619            1,
3620            0,
3621            snzreqcr0::Snzreqen7,
3622            snzreqcr0::Snzreqen7,
3623            Snzreqcr0_SPEC,
3624            crate::common::RW,
3625        >::from_register(self, 0)
3626    }
3627
3628    #[doc = "Enable IRQ8 pin snooze request"]
3629    #[inline(always)]
3630    pub fn snzreqen8(
3631        self,
3632    ) -> crate::common::RegisterField<
3633        8,
3634        0x1,
3635        1,
3636        0,
3637        snzreqcr0::Snzreqen8,
3638        snzreqcr0::Snzreqen8,
3639        Snzreqcr0_SPEC,
3640        crate::common::RW,
3641    > {
3642        crate::common::RegisterField::<
3643            8,
3644            0x1,
3645            1,
3646            0,
3647            snzreqcr0::Snzreqen8,
3648            snzreqcr0::Snzreqen8,
3649            Snzreqcr0_SPEC,
3650            crate::common::RW,
3651        >::from_register(self, 0)
3652    }
3653
3654    #[doc = "Enable IRQ9 pin snooze request"]
3655    #[inline(always)]
3656    pub fn snzreqen9(
3657        self,
3658    ) -> crate::common::RegisterField<
3659        9,
3660        0x1,
3661        1,
3662        0,
3663        snzreqcr0::Snzreqen9,
3664        snzreqcr0::Snzreqen9,
3665        Snzreqcr0_SPEC,
3666        crate::common::RW,
3667    > {
3668        crate::common::RegisterField::<
3669            9,
3670            0x1,
3671            1,
3672            0,
3673            snzreqcr0::Snzreqen9,
3674            snzreqcr0::Snzreqen9,
3675            Snzreqcr0_SPEC,
3676            crate::common::RW,
3677        >::from_register(self, 0)
3678    }
3679
3680    #[doc = "Enable IRQ10 pin snooze request"]
3681    #[inline(always)]
3682    pub fn snzreqen10(
3683        self,
3684    ) -> crate::common::RegisterField<
3685        10,
3686        0x1,
3687        1,
3688        0,
3689        snzreqcr0::Snzreqen10,
3690        snzreqcr0::Snzreqen10,
3691        Snzreqcr0_SPEC,
3692        crate::common::RW,
3693    > {
3694        crate::common::RegisterField::<
3695            10,
3696            0x1,
3697            1,
3698            0,
3699            snzreqcr0::Snzreqen10,
3700            snzreqcr0::Snzreqen10,
3701            Snzreqcr0_SPEC,
3702            crate::common::RW,
3703        >::from_register(self, 0)
3704    }
3705
3706    #[doc = "Enable IRQ11 pin snooze request"]
3707    #[inline(always)]
3708    pub fn snzreqen11(
3709        self,
3710    ) -> crate::common::RegisterField<
3711        11,
3712        0x1,
3713        1,
3714        0,
3715        snzreqcr0::Snzreqen11,
3716        snzreqcr0::Snzreqen11,
3717        Snzreqcr0_SPEC,
3718        crate::common::RW,
3719    > {
3720        crate::common::RegisterField::<
3721            11,
3722            0x1,
3723            1,
3724            0,
3725            snzreqcr0::Snzreqen11,
3726            snzreqcr0::Snzreqen11,
3727            Snzreqcr0_SPEC,
3728            crate::common::RW,
3729        >::from_register(self, 0)
3730    }
3731
3732    #[doc = "Enable IRQ12 pin snooze request"]
3733    #[inline(always)]
3734    pub fn snzreqen12(
3735        self,
3736    ) -> crate::common::RegisterField<
3737        12,
3738        0x1,
3739        1,
3740        0,
3741        snzreqcr0::Snzreqen12,
3742        snzreqcr0::Snzreqen12,
3743        Snzreqcr0_SPEC,
3744        crate::common::RW,
3745    > {
3746        crate::common::RegisterField::<
3747            12,
3748            0x1,
3749            1,
3750            0,
3751            snzreqcr0::Snzreqen12,
3752            snzreqcr0::Snzreqen12,
3753            Snzreqcr0_SPEC,
3754            crate::common::RW,
3755        >::from_register(self, 0)
3756    }
3757
3758    #[doc = "Enable IRQ13 pin snooze request"]
3759    #[inline(always)]
3760    pub fn snzreqen13(
3761        self,
3762    ) -> crate::common::RegisterField<
3763        13,
3764        0x1,
3765        1,
3766        0,
3767        snzreqcr0::Snzreqen13,
3768        snzreqcr0::Snzreqen13,
3769        Snzreqcr0_SPEC,
3770        crate::common::RW,
3771    > {
3772        crate::common::RegisterField::<
3773            13,
3774            0x1,
3775            1,
3776            0,
3777            snzreqcr0::Snzreqen13,
3778            snzreqcr0::Snzreqen13,
3779            Snzreqcr0_SPEC,
3780            crate::common::RW,
3781        >::from_register(self, 0)
3782    }
3783
3784    #[doc = "Enable IRQ14 pin snooze request"]
3785    #[inline(always)]
3786    pub fn snzreqen14(
3787        self,
3788    ) -> crate::common::RegisterField<
3789        14,
3790        0x1,
3791        1,
3792        0,
3793        snzreqcr0::Snzreqen14,
3794        snzreqcr0::Snzreqen14,
3795        Snzreqcr0_SPEC,
3796        crate::common::RW,
3797    > {
3798        crate::common::RegisterField::<
3799            14,
3800            0x1,
3801            1,
3802            0,
3803            snzreqcr0::Snzreqen14,
3804            snzreqcr0::Snzreqen14,
3805            Snzreqcr0_SPEC,
3806            crate::common::RW,
3807        >::from_register(self, 0)
3808    }
3809
3810    #[doc = "Enable RTC alarm snooze request"]
3811    #[inline(always)]
3812    pub fn snzreqen24(
3813        self,
3814    ) -> crate::common::RegisterField<
3815        24,
3816        0x1,
3817        1,
3818        0,
3819        snzreqcr0::Snzreqen24,
3820        snzreqcr0::Snzreqen24,
3821        Snzreqcr0_SPEC,
3822        crate::common::RW,
3823    > {
3824        crate::common::RegisterField::<
3825            24,
3826            0x1,
3827            1,
3828            0,
3829            snzreqcr0::Snzreqen24,
3830            snzreqcr0::Snzreqen24,
3831            Snzreqcr0_SPEC,
3832            crate::common::RW,
3833        >::from_register(self, 0)
3834    }
3835
3836    #[doc = "Enable RTC period snooze request"]
3837    #[inline(always)]
3838    pub fn snzreqen25(
3839        self,
3840    ) -> crate::common::RegisterField<
3841        25,
3842        0x1,
3843        1,
3844        0,
3845        snzreqcr0::Snzreqen25,
3846        snzreqcr0::Snzreqen25,
3847        Snzreqcr0_SPEC,
3848        crate::common::RW,
3849    > {
3850        crate::common::RegisterField::<
3851            25,
3852            0x1,
3853            1,
3854            0,
3855            snzreqcr0::Snzreqen25,
3856            snzreqcr0::Snzreqen25,
3857            Snzreqcr0_SPEC,
3858            crate::common::RW,
3859        >::from_register(self, 0)
3860    }
3861
3862    #[doc = "Enable AGT1 underflow snooze request"]
3863    #[inline(always)]
3864    pub fn snzreqen28(
3865        self,
3866    ) -> crate::common::RegisterField<
3867        28,
3868        0x1,
3869        1,
3870        0,
3871        snzreqcr0::Snzreqen28,
3872        snzreqcr0::Snzreqen28,
3873        Snzreqcr0_SPEC,
3874        crate::common::RW,
3875    > {
3876        crate::common::RegisterField::<
3877            28,
3878            0x1,
3879            1,
3880            0,
3881            snzreqcr0::Snzreqen28,
3882            snzreqcr0::Snzreqen28,
3883            Snzreqcr0_SPEC,
3884            crate::common::RW,
3885        >::from_register(self, 0)
3886    }
3887
3888    #[doc = "Enable AGT1 compare match A snooze request"]
3889    #[inline(always)]
3890    pub fn snzreqen29(
3891        self,
3892    ) -> crate::common::RegisterField<
3893        29,
3894        0x1,
3895        1,
3896        0,
3897        snzreqcr0::Snzreqen29,
3898        snzreqcr0::Snzreqen29,
3899        Snzreqcr0_SPEC,
3900        crate::common::RW,
3901    > {
3902        crate::common::RegisterField::<
3903            29,
3904            0x1,
3905            1,
3906            0,
3907            snzreqcr0::Snzreqen29,
3908            snzreqcr0::Snzreqen29,
3909            Snzreqcr0_SPEC,
3910            crate::common::RW,
3911        >::from_register(self, 0)
3912    }
3913
3914    #[doc = "Enable AGT1 compare match B snooze request"]
3915    #[inline(always)]
3916    pub fn snzreqen30(
3917        self,
3918    ) -> crate::common::RegisterField<
3919        30,
3920        0x1,
3921        1,
3922        0,
3923        snzreqcr0::Snzreqen30,
3924        snzreqcr0::Snzreqen30,
3925        Snzreqcr0_SPEC,
3926        crate::common::RW,
3927    > {
3928        crate::common::RegisterField::<
3929            30,
3930            0x1,
3931            1,
3932            0,
3933            snzreqcr0::Snzreqen30,
3934            snzreqcr0::Snzreqen30,
3935            Snzreqcr0_SPEC,
3936            crate::common::RW,
3937        >::from_register(self, 0)
3938    }
3939}
3940impl ::core::default::Default for Snzreqcr0 {
3941    #[inline(always)]
3942    fn default() -> Snzreqcr0 {
3943        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3944    }
3945}
3946pub mod snzreqcr0 {
3947
3948    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3949    pub struct Snzreqen0_SPEC;
3950    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3951    impl Snzreqen0 {
3952        #[doc = "Disable the snooze request"]
3953        pub const _0: Self = Self::new(0);
3954
3955        #[doc = "Enable the snooze request"]
3956        pub const _1: Self = Self::new(1);
3957    }
3958    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3959    pub struct Snzreqen1_SPEC;
3960    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3961    impl Snzreqen1 {
3962        #[doc = "Disable the snooze request"]
3963        pub const _0: Self = Self::new(0);
3964
3965        #[doc = "Enable the snooze request"]
3966        pub const _1: Self = Self::new(1);
3967    }
3968    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3969    pub struct Snzreqen2_SPEC;
3970    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3971    impl Snzreqen2 {
3972        #[doc = "Disable the snooze request"]
3973        pub const _0: Self = Self::new(0);
3974
3975        #[doc = "Enable the snooze request"]
3976        pub const _1: Self = Self::new(1);
3977    }
3978    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3979    pub struct Snzreqen3_SPEC;
3980    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3981    impl Snzreqen3 {
3982        #[doc = "Disable the snooze request"]
3983        pub const _0: Self = Self::new(0);
3984
3985        #[doc = "Enable the snooze request"]
3986        pub const _1: Self = Self::new(1);
3987    }
3988    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3989    pub struct Snzreqen4_SPEC;
3990    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3991    impl Snzreqen4 {
3992        #[doc = "Disable the snooze request"]
3993        pub const _0: Self = Self::new(0);
3994
3995        #[doc = "Enable the snooze request"]
3996        pub const _1: Self = Self::new(1);
3997    }
3998    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3999    pub struct Snzreqen5_SPEC;
4000    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
4001    impl Snzreqen5 {
4002        #[doc = "Disable the snooze request"]
4003        pub const _0: Self = Self::new(0);
4004
4005        #[doc = "Enable the snooze request"]
4006        pub const _1: Self = Self::new(1);
4007    }
4008    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4009    pub struct Snzreqen6_SPEC;
4010    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
4011    impl Snzreqen6 {
4012        #[doc = "Disable the snooze request"]
4013        pub const _0: Self = Self::new(0);
4014
4015        #[doc = "Enable the snooze request"]
4016        pub const _1: Self = Self::new(1);
4017    }
4018    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4019    pub struct Snzreqen7_SPEC;
4020    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
4021    impl Snzreqen7 {
4022        #[doc = "Disable the snooze request"]
4023        pub const _0: Self = Self::new(0);
4024
4025        #[doc = "Enable the snooze request"]
4026        pub const _1: Self = Self::new(1);
4027    }
4028    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4029    pub struct Snzreqen8_SPEC;
4030    pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
4031    impl Snzreqen8 {
4032        #[doc = "Disable the snooze request"]
4033        pub const _0: Self = Self::new(0);
4034
4035        #[doc = "Enable the snooze request"]
4036        pub const _1: Self = Self::new(1);
4037    }
4038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4039    pub struct Snzreqen9_SPEC;
4040    pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
4041    impl Snzreqen9 {
4042        #[doc = "Disable the snooze request"]
4043        pub const _0: Self = Self::new(0);
4044
4045        #[doc = "Enable the snooze request"]
4046        pub const _1: Self = Self::new(1);
4047    }
4048    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4049    pub struct Snzreqen10_SPEC;
4050    pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
4051    impl Snzreqen10 {
4052        #[doc = "Disable the snooze request"]
4053        pub const _0: Self = Self::new(0);
4054
4055        #[doc = "Enable the snooze request"]
4056        pub const _1: Self = Self::new(1);
4057    }
4058    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4059    pub struct Snzreqen11_SPEC;
4060    pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
4061    impl Snzreqen11 {
4062        #[doc = "Disable the snooze request"]
4063        pub const _0: Self = Self::new(0);
4064
4065        #[doc = "Enable the snooze request"]
4066        pub const _1: Self = Self::new(1);
4067    }
4068    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4069    pub struct Snzreqen12_SPEC;
4070    pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
4071    impl Snzreqen12 {
4072        #[doc = "Disable the snooze request"]
4073        pub const _0: Self = Self::new(0);
4074
4075        #[doc = "Enable the snooze request"]
4076        pub const _1: Self = Self::new(1);
4077    }
4078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4079    pub struct Snzreqen13_SPEC;
4080    pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
4081    impl Snzreqen13 {
4082        #[doc = "Disable the snooze request"]
4083        pub const _0: Self = Self::new(0);
4084
4085        #[doc = "Enable the snooze request"]
4086        pub const _1: Self = Self::new(1);
4087    }
4088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4089    pub struct Snzreqen14_SPEC;
4090    pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
4091    impl Snzreqen14 {
4092        #[doc = "Disable the snooze request"]
4093        pub const _0: Self = Self::new(0);
4094
4095        #[doc = "Enable the snooze request"]
4096        pub const _1: Self = Self::new(1);
4097    }
4098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4099    pub struct Snzreqen24_SPEC;
4100    pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
4101    impl Snzreqen24 {
4102        #[doc = "Disable the snooze request"]
4103        pub const _0: Self = Self::new(0);
4104
4105        #[doc = "Enable the snooze request"]
4106        pub const _1: Self = Self::new(1);
4107    }
4108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4109    pub struct Snzreqen25_SPEC;
4110    pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
4111    impl Snzreqen25 {
4112        #[doc = "Disable the snooze request"]
4113        pub const _0: Self = Self::new(0);
4114
4115        #[doc = "Enable the snooze request"]
4116        pub const _1: Self = Self::new(1);
4117    }
4118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4119    pub struct Snzreqen28_SPEC;
4120    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
4121    impl Snzreqen28 {
4122        #[doc = "Disable the snooze request"]
4123        pub const _0: Self = Self::new(0);
4124
4125        #[doc = "Enable the snooze request"]
4126        pub const _1: Self = Self::new(1);
4127    }
4128    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4129    pub struct Snzreqen29_SPEC;
4130    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
4131    impl Snzreqen29 {
4132        #[doc = "Disable the snooze request"]
4133        pub const _0: Self = Self::new(0);
4134
4135        #[doc = "Enable the snooze request"]
4136        pub const _1: Self = Self::new(1);
4137    }
4138    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4139    pub struct Snzreqen30_SPEC;
4140    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
4141    impl Snzreqen30 {
4142        #[doc = "Disable the snooze request"]
4143        pub const _0: Self = Self::new(0);
4144
4145        #[doc = "Enable the snooze request"]
4146        pub const _1: Self = Self::new(1);
4147    }
4148}
4149#[doc(hidden)]
4150#[derive(Copy, Clone, Eq, PartialEq)]
4151pub struct Opccr_SPEC;
4152impl crate::sealed::RegSpec for Opccr_SPEC {
4153    type DataType = u8;
4154}
4155
4156#[doc = "Operating Power Control Register"]
4157pub type Opccr = crate::RegValueT<Opccr_SPEC>;
4158
4159impl Opccr {
4160    #[doc = "Operating Power Control Mode Select"]
4161    #[inline(always)]
4162    pub fn opcm(
4163        self,
4164    ) -> crate::common::RegisterField<
4165        0,
4166        0x3,
4167        1,
4168        0,
4169        opccr::Opcm,
4170        opccr::Opcm,
4171        Opccr_SPEC,
4172        crate::common::RW,
4173    > {
4174        crate::common::RegisterField::<
4175            0,
4176            0x3,
4177            1,
4178            0,
4179            opccr::Opcm,
4180            opccr::Opcm,
4181            Opccr_SPEC,
4182            crate::common::RW,
4183        >::from_register(self, 0)
4184    }
4185
4186    #[doc = "Operating Power Control Mode Transition Status Flag"]
4187    #[inline(always)]
4188    pub fn opcmtsf(
4189        self,
4190    ) -> crate::common::RegisterField<
4191        4,
4192        0x1,
4193        1,
4194        0,
4195        opccr::Opcmtsf,
4196        opccr::Opcmtsf,
4197        Opccr_SPEC,
4198        crate::common::R,
4199    > {
4200        crate::common::RegisterField::<
4201            4,
4202            0x1,
4203            1,
4204            0,
4205            opccr::Opcmtsf,
4206            opccr::Opcmtsf,
4207            Opccr_SPEC,
4208            crate::common::R,
4209        >::from_register(self, 0)
4210    }
4211}
4212impl ::core::default::Default for Opccr {
4213    #[inline(always)]
4214    fn default() -> Opccr {
4215        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
4216    }
4217}
4218pub mod opccr {
4219
4220    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4221    pub struct Opcm_SPEC;
4222    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
4223    impl Opcm {
4224        #[doc = "High-speed mode"]
4225        pub const _00: Self = Self::new(0);
4226
4227        #[doc = "Setting prohibited"]
4228        pub const _01: Self = Self::new(1);
4229
4230        #[doc = "Setting prohibited"]
4231        pub const _10: Self = Self::new(2);
4232
4233        #[doc = "Low-speed mode"]
4234        pub const _11: Self = Self::new(3);
4235    }
4236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4237    pub struct Opcmtsf_SPEC;
4238    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
4239    impl Opcmtsf {
4240        #[doc = "Transition completed"]
4241        pub const _0: Self = Self::new(0);
4242
4243        #[doc = "During transition"]
4244        pub const _1: Self = Self::new(1);
4245    }
4246}
4247#[doc(hidden)]
4248#[derive(Copy, Clone, Eq, PartialEq)]
4249pub struct Moscwtcr_SPEC;
4250impl crate::sealed::RegSpec for Moscwtcr_SPEC {
4251    type DataType = u8;
4252}
4253
4254#[doc = "Main Clock Oscillator Wait Control Register"]
4255pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
4256
4257impl Moscwtcr {
4258    #[doc = "Main Clock Oscillator Wait Time Setting"]
4259    #[inline(always)]
4260    pub fn msts(
4261        self,
4262    ) -> crate::common::RegisterField<
4263        0,
4264        0xf,
4265        1,
4266        0,
4267        moscwtcr::Msts,
4268        moscwtcr::Msts,
4269        Moscwtcr_SPEC,
4270        crate::common::RW,
4271    > {
4272        crate::common::RegisterField::<
4273            0,
4274            0xf,
4275            1,
4276            0,
4277            moscwtcr::Msts,
4278            moscwtcr::Msts,
4279            Moscwtcr_SPEC,
4280            crate::common::RW,
4281        >::from_register(self, 0)
4282    }
4283}
4284impl ::core::default::Default for Moscwtcr {
4285    #[inline(always)]
4286    fn default() -> Moscwtcr {
4287        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
4288    }
4289}
4290pub mod moscwtcr {
4291
4292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4293    pub struct Msts_SPEC;
4294    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
4295    impl Msts {
4296        #[doc = "Wait time = 3 cycles (11.4 us)"]
4297        pub const _0_X_0: Self = Self::new(0);
4298
4299        #[doc = "Wait time = 35 cycles (133.5 us)"]
4300        pub const _0_X_1: Self = Self::new(1);
4301
4302        #[doc = "Wait time = 67 cycles (255.6 us)"]
4303        pub const _0_X_2: Self = Self::new(2);
4304
4305        #[doc = "Wait time = 131 cycles (499.7 us)"]
4306        pub const _0_X_3: Self = Self::new(3);
4307
4308        #[doc = "Wait time = 259 cycles (988.0 us)"]
4309        pub const _0_X_4: Self = Self::new(4);
4310
4311        #[doc = "Wait time = 547 cycles (2086.6 us)"]
4312        pub const _0_X_5: Self = Self::new(5);
4313
4314        #[doc = "Wait time = 1059 cycles (4039.8 us)"]
4315        pub const _0_X_6: Self = Self::new(6);
4316
4317        #[doc = "Wait time = 2147 cycles (8190.2 us)"]
4318        pub const _0_X_7: Self = Self::new(7);
4319
4320        #[doc = "Wait time = 4291 cycles (16368.9 us)"]
4321        pub const _0_X_8: Self = Self::new(8);
4322
4323        #[doc = "Wait time = 8163 cycles (31139.4 us)"]
4324        pub const _0_X_9: Self = Self::new(9);
4325
4326        #[doc = "Setting prohibited"]
4327        pub const OTHERS: Self = Self::new(0);
4328    }
4329}
4330#[doc(hidden)]
4331#[derive(Copy, Clone, Eq, PartialEq)]
4332pub struct Sopccr_SPEC;
4333impl crate::sealed::RegSpec for Sopccr_SPEC {
4334    type DataType = u8;
4335}
4336
4337#[doc = "Sub Operating Power Control Register"]
4338pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
4339
4340impl Sopccr {
4341    #[doc = "Sub Operating Power Control Mode Select"]
4342    #[inline(always)]
4343    pub fn sopcm(
4344        self,
4345    ) -> crate::common::RegisterField<
4346        0,
4347        0x1,
4348        1,
4349        0,
4350        sopccr::Sopcm,
4351        sopccr::Sopcm,
4352        Sopccr_SPEC,
4353        crate::common::RW,
4354    > {
4355        crate::common::RegisterField::<
4356            0,
4357            0x1,
4358            1,
4359            0,
4360            sopccr::Sopcm,
4361            sopccr::Sopcm,
4362            Sopccr_SPEC,
4363            crate::common::RW,
4364        >::from_register(self, 0)
4365    }
4366
4367    #[doc = "Operating Power Control Mode Transition Status Flag"]
4368    #[inline(always)]
4369    pub fn sopcmtsf(
4370        self,
4371    ) -> crate::common::RegisterField<
4372        4,
4373        0x1,
4374        1,
4375        0,
4376        sopccr::Sopcmtsf,
4377        sopccr::Sopcmtsf,
4378        Sopccr_SPEC,
4379        crate::common::R,
4380    > {
4381        crate::common::RegisterField::<
4382            4,
4383            0x1,
4384            1,
4385            0,
4386            sopccr::Sopcmtsf,
4387            sopccr::Sopcmtsf,
4388            Sopccr_SPEC,
4389            crate::common::R,
4390        >::from_register(self, 0)
4391    }
4392}
4393impl ::core::default::Default for Sopccr {
4394    #[inline(always)]
4395    fn default() -> Sopccr {
4396        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
4397    }
4398}
4399pub mod sopccr {
4400
4401    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4402    pub struct Sopcm_SPEC;
4403    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
4404    impl Sopcm {
4405        #[doc = "Other than Subosc-speed mode"]
4406        pub const _0: Self = Self::new(0);
4407
4408        #[doc = "Subosc-speed mode"]
4409        pub const _1: Self = Self::new(1);
4410    }
4411    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4412    pub struct Sopcmtsf_SPEC;
4413    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
4414    impl Sopcmtsf {
4415        #[doc = "Transition completed"]
4416        pub const _0: Self = Self::new(0);
4417
4418        #[doc = "During transition"]
4419        pub const _1: Self = Self::new(1);
4420    }
4421}
4422#[doc(hidden)]
4423#[derive(Copy, Clone, Eq, PartialEq)]
4424pub struct Rstsr1_SPEC;
4425impl crate::sealed::RegSpec for Rstsr1_SPEC {
4426    type DataType = u16;
4427}
4428
4429#[doc = "Reset Status Register 1"]
4430pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
4431
4432impl Rstsr1 {
4433    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
4434    #[inline(always)]
4435    pub fn iwdtrf(
4436        self,
4437    ) -> crate::common::RegisterField<
4438        0,
4439        0x1,
4440        1,
4441        0,
4442        rstsr1::Iwdtrf,
4443        rstsr1::Iwdtrf,
4444        Rstsr1_SPEC,
4445        crate::common::RW,
4446    > {
4447        crate::common::RegisterField::<
4448            0,
4449            0x1,
4450            1,
4451            0,
4452            rstsr1::Iwdtrf,
4453            rstsr1::Iwdtrf,
4454            Rstsr1_SPEC,
4455            crate::common::RW,
4456        >::from_register(self, 0)
4457    }
4458
4459    #[doc = "Watchdog Timer Reset Detect Flag"]
4460    #[inline(always)]
4461    pub fn wdtrf(
4462        self,
4463    ) -> crate::common::RegisterField<
4464        1,
4465        0x1,
4466        1,
4467        0,
4468        rstsr1::Wdtrf,
4469        rstsr1::Wdtrf,
4470        Rstsr1_SPEC,
4471        crate::common::RW,
4472    > {
4473        crate::common::RegisterField::<
4474            1,
4475            0x1,
4476            1,
4477            0,
4478            rstsr1::Wdtrf,
4479            rstsr1::Wdtrf,
4480            Rstsr1_SPEC,
4481            crate::common::RW,
4482        >::from_register(self, 0)
4483    }
4484
4485    #[doc = "Software Reset Detect Flag"]
4486    #[inline(always)]
4487    pub fn swrf(
4488        self,
4489    ) -> crate::common::RegisterField<
4490        2,
4491        0x1,
4492        1,
4493        0,
4494        rstsr1::Swrf,
4495        rstsr1::Swrf,
4496        Rstsr1_SPEC,
4497        crate::common::RW,
4498    > {
4499        crate::common::RegisterField::<
4500            2,
4501            0x1,
4502            1,
4503            0,
4504            rstsr1::Swrf,
4505            rstsr1::Swrf,
4506            Rstsr1_SPEC,
4507            crate::common::RW,
4508        >::from_register(self, 0)
4509    }
4510
4511    #[doc = "SRAM Parity Error Reset Detect Flag"]
4512    #[inline(always)]
4513    pub fn rperf(
4514        self,
4515    ) -> crate::common::RegisterField<
4516        8,
4517        0x1,
4518        1,
4519        0,
4520        rstsr1::Rperf,
4521        rstsr1::Rperf,
4522        Rstsr1_SPEC,
4523        crate::common::RW,
4524    > {
4525        crate::common::RegisterField::<
4526            8,
4527            0x1,
4528            1,
4529            0,
4530            rstsr1::Rperf,
4531            rstsr1::Rperf,
4532            Rstsr1_SPEC,
4533            crate::common::RW,
4534        >::from_register(self, 0)
4535    }
4536
4537    #[doc = "SRAM ECC Error Reset Detect Flag"]
4538    #[inline(always)]
4539    pub fn reerf(
4540        self,
4541    ) -> crate::common::RegisterField<
4542        9,
4543        0x1,
4544        1,
4545        0,
4546        rstsr1::Reerf,
4547        rstsr1::Reerf,
4548        Rstsr1_SPEC,
4549        crate::common::RW,
4550    > {
4551        crate::common::RegisterField::<
4552            9,
4553            0x1,
4554            1,
4555            0,
4556            rstsr1::Reerf,
4557            rstsr1::Reerf,
4558            Rstsr1_SPEC,
4559            crate::common::RW,
4560        >::from_register(self, 0)
4561    }
4562
4563    #[doc = "Bus Master MPU Error Reset Detect Flag"]
4564    #[inline(always)]
4565    pub fn busmrf(
4566        self,
4567    ) -> crate::common::RegisterField<
4568        11,
4569        0x1,
4570        1,
4571        0,
4572        rstsr1::Busmrf,
4573        rstsr1::Busmrf,
4574        Rstsr1_SPEC,
4575        crate::common::RW,
4576    > {
4577        crate::common::RegisterField::<
4578            11,
4579            0x1,
4580            1,
4581            0,
4582            rstsr1::Busmrf,
4583            rstsr1::Busmrf,
4584            Rstsr1_SPEC,
4585            crate::common::RW,
4586        >::from_register(self, 0)
4587    }
4588
4589    #[doc = "TrustZone Error Reset Detect Flag"]
4590    #[inline(always)]
4591    pub fn tzerf(
4592        self,
4593    ) -> crate::common::RegisterField<
4594        13,
4595        0x1,
4596        1,
4597        0,
4598        rstsr1::Tzerf,
4599        rstsr1::Tzerf,
4600        Rstsr1_SPEC,
4601        crate::common::RW,
4602    > {
4603        crate::common::RegisterField::<
4604            13,
4605            0x1,
4606            1,
4607            0,
4608            rstsr1::Tzerf,
4609            rstsr1::Tzerf,
4610            Rstsr1_SPEC,
4611            crate::common::RW,
4612        >::from_register(self, 0)
4613    }
4614
4615    #[doc = "Cache Parity Error Reset Detect Flag"]
4616    #[inline(always)]
4617    pub fn cperf(
4618        self,
4619    ) -> crate::common::RegisterField<
4620        15,
4621        0x1,
4622        1,
4623        0,
4624        rstsr1::Cperf,
4625        rstsr1::Cperf,
4626        Rstsr1_SPEC,
4627        crate::common::RW,
4628    > {
4629        crate::common::RegisterField::<
4630            15,
4631            0x1,
4632            1,
4633            0,
4634            rstsr1::Cperf,
4635            rstsr1::Cperf,
4636            Rstsr1_SPEC,
4637            crate::common::RW,
4638        >::from_register(self, 0)
4639    }
4640}
4641impl ::core::default::Default for Rstsr1 {
4642    #[inline(always)]
4643    fn default() -> Rstsr1 {
4644        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
4645    }
4646}
4647pub mod rstsr1 {
4648
4649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4650    pub struct Iwdtrf_SPEC;
4651    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
4652    impl Iwdtrf {
4653        #[doc = "Independent watchdog timer reset not detected"]
4654        pub const _0: Self = Self::new(0);
4655
4656        #[doc = "Independent watchdog timer reset detected"]
4657        pub const _1: Self = Self::new(1);
4658    }
4659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4660    pub struct Wdtrf_SPEC;
4661    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
4662    impl Wdtrf {
4663        #[doc = "Watchdog timer reset not detected"]
4664        pub const _0: Self = Self::new(0);
4665
4666        #[doc = "Watchdog timer reset detected"]
4667        pub const _1: Self = Self::new(1);
4668    }
4669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4670    pub struct Swrf_SPEC;
4671    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
4672    impl Swrf {
4673        #[doc = "Software reset not detected"]
4674        pub const _0: Self = Self::new(0);
4675
4676        #[doc = "Software reset detected"]
4677        pub const _1: Self = Self::new(1);
4678    }
4679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4680    pub struct Rperf_SPEC;
4681    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
4682    impl Rperf {
4683        #[doc = "SRAM parity error reset not detected"]
4684        pub const _0: Self = Self::new(0);
4685
4686        #[doc = "SRAM parity error reset detected"]
4687        pub const _1: Self = Self::new(1);
4688    }
4689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4690    pub struct Reerf_SPEC;
4691    pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
4692    impl Reerf {
4693        #[doc = "SRAM ECC error reset not detected"]
4694        pub const _0: Self = Self::new(0);
4695
4696        #[doc = "SRAM ECC error reset detected"]
4697        pub const _1: Self = Self::new(1);
4698    }
4699    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4700    pub struct Busmrf_SPEC;
4701    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
4702    impl Busmrf {
4703        #[doc = "Bus master MPU error reset not detected"]
4704        pub const _0: Self = Self::new(0);
4705
4706        #[doc = "Bus master MPU error reset detected"]
4707        pub const _1: Self = Self::new(1);
4708    }
4709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4710    pub struct Tzerf_SPEC;
4711    pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
4712    impl Tzerf {
4713        #[doc = "TrustZone error reset not detected."]
4714        pub const _0: Self = Self::new(0);
4715
4716        #[doc = "TrustZone error reset detected."]
4717        pub const _1: Self = Self::new(1);
4718    }
4719    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4720    pub struct Cperf_SPEC;
4721    pub type Cperf = crate::EnumBitfieldStruct<u8, Cperf_SPEC>;
4722    impl Cperf {
4723        #[doc = "Cache Parity error reset not detected."]
4724        pub const _0: Self = Self::new(0);
4725
4726        #[doc = "Cache Parity error reset detected."]
4727        pub const _1: Self = Self::new(1);
4728    }
4729}
4730#[doc(hidden)]
4731#[derive(Copy, Clone, Eq, PartialEq)]
4732pub struct Lvd1Cr1_SPEC;
4733impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4734    type DataType = u8;
4735}
4736
4737#[doc = "Voltage Monitor 1 Circuit Control Register"]
4738pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4739
4740impl Lvd1Cr1 {
4741    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4742    #[inline(always)]
4743    pub fn idtsel(
4744        self,
4745    ) -> crate::common::RegisterField<
4746        0,
4747        0x3,
4748        1,
4749        0,
4750        lvd1cr1::Idtsel,
4751        lvd1cr1::Idtsel,
4752        Lvd1Cr1_SPEC,
4753        crate::common::RW,
4754    > {
4755        crate::common::RegisterField::<
4756            0,
4757            0x3,
4758            1,
4759            0,
4760            lvd1cr1::Idtsel,
4761            lvd1cr1::Idtsel,
4762            Lvd1Cr1_SPEC,
4763            crate::common::RW,
4764        >::from_register(self, 0)
4765    }
4766
4767    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4768    #[inline(always)]
4769    pub fn irqsel(
4770        self,
4771    ) -> crate::common::RegisterField<
4772        2,
4773        0x1,
4774        1,
4775        0,
4776        lvd1cr1::Irqsel,
4777        lvd1cr1::Irqsel,
4778        Lvd1Cr1_SPEC,
4779        crate::common::RW,
4780    > {
4781        crate::common::RegisterField::<
4782            2,
4783            0x1,
4784            1,
4785            0,
4786            lvd1cr1::Irqsel,
4787            lvd1cr1::Irqsel,
4788            Lvd1Cr1_SPEC,
4789            crate::common::RW,
4790        >::from_register(self, 0)
4791    }
4792}
4793impl ::core::default::Default for Lvd1Cr1 {
4794    #[inline(always)]
4795    fn default() -> Lvd1Cr1 {
4796        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4797    }
4798}
4799pub mod lvd1cr1 {
4800
4801    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4802    pub struct Idtsel_SPEC;
4803    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4804    impl Idtsel {
4805        #[doc = "When VCC >= Vdet1 (rise) is detected"]
4806        pub const _00: Self = Self::new(0);
4807
4808        #[doc = "When VCC < Vdet1 (fall) is detected"]
4809        pub const _01: Self = Self::new(1);
4810
4811        #[doc = "When fall and rise are detected"]
4812        pub const _10: Self = Self::new(2);
4813
4814        #[doc = "Settings prohibited"]
4815        pub const _11: Self = Self::new(3);
4816    }
4817    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4818    pub struct Irqsel_SPEC;
4819    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4820    impl Irqsel {
4821        #[doc = "Non-maskable interrupt"]
4822        pub const _0: Self = Self::new(0);
4823
4824        #[doc = "Maskable interrupt"]
4825        pub const _1: Self = Self::new(1);
4826    }
4827}
4828#[doc(hidden)]
4829#[derive(Copy, Clone, Eq, PartialEq)]
4830pub struct Lvd1Sr_SPEC;
4831impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4832    type DataType = u8;
4833}
4834
4835#[doc = "Voltage Monitor 1 Circuit Status Register"]
4836pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4837
4838impl Lvd1Sr {
4839    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4840    #[inline(always)]
4841    pub fn det(
4842        self,
4843    ) -> crate::common::RegisterField<
4844        0,
4845        0x1,
4846        1,
4847        0,
4848        lvd1sr::Det,
4849        lvd1sr::Det,
4850        Lvd1Sr_SPEC,
4851        crate::common::RW,
4852    > {
4853        crate::common::RegisterField::<
4854            0,
4855            0x1,
4856            1,
4857            0,
4858            lvd1sr::Det,
4859            lvd1sr::Det,
4860            Lvd1Sr_SPEC,
4861            crate::common::RW,
4862        >::from_register(self, 0)
4863    }
4864
4865    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4866    #[inline(always)]
4867    pub fn mon(
4868        self,
4869    ) -> crate::common::RegisterField<
4870        1,
4871        0x1,
4872        1,
4873        0,
4874        lvd1sr::Mon,
4875        lvd1sr::Mon,
4876        Lvd1Sr_SPEC,
4877        crate::common::R,
4878    > {
4879        crate::common::RegisterField::<
4880            1,
4881            0x1,
4882            1,
4883            0,
4884            lvd1sr::Mon,
4885            lvd1sr::Mon,
4886            Lvd1Sr_SPEC,
4887            crate::common::R,
4888        >::from_register(self, 0)
4889    }
4890}
4891impl ::core::default::Default for Lvd1Sr {
4892    #[inline(always)]
4893    fn default() -> Lvd1Sr {
4894        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4895    }
4896}
4897pub mod lvd1sr {
4898
4899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4900    pub struct Det_SPEC;
4901    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4902    impl Det {
4903        #[doc = "Not detected"]
4904        pub const _0: Self = Self::new(0);
4905
4906        #[doc = "Vdet1 crossing is detected"]
4907        pub const _1: Self = Self::new(1);
4908    }
4909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4910    pub struct Mon_SPEC;
4911    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4912    impl Mon {
4913        #[doc = "VCC < Vdet1"]
4914        pub const _0: Self = Self::new(0);
4915
4916        #[doc = "VCC >= Vdet1 or MON is disabled"]
4917        pub const _1: Self = Self::new(1);
4918    }
4919}
4920#[doc(hidden)]
4921#[derive(Copy, Clone, Eq, PartialEq)]
4922pub struct Lvd2Cr1_SPEC;
4923impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4924    type DataType = u8;
4925}
4926
4927#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4928pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4929
4930impl Lvd2Cr1 {
4931    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4932    #[inline(always)]
4933    pub fn idtsel(
4934        self,
4935    ) -> crate::common::RegisterField<
4936        0,
4937        0x3,
4938        1,
4939        0,
4940        lvd2cr1::Idtsel,
4941        lvd2cr1::Idtsel,
4942        Lvd2Cr1_SPEC,
4943        crate::common::RW,
4944    > {
4945        crate::common::RegisterField::<
4946            0,
4947            0x3,
4948            1,
4949            0,
4950            lvd2cr1::Idtsel,
4951            lvd2cr1::Idtsel,
4952            Lvd2Cr1_SPEC,
4953            crate::common::RW,
4954        >::from_register(self, 0)
4955    }
4956
4957    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4958    #[inline(always)]
4959    pub fn irqsel(
4960        self,
4961    ) -> crate::common::RegisterField<
4962        2,
4963        0x1,
4964        1,
4965        0,
4966        lvd2cr1::Irqsel,
4967        lvd2cr1::Irqsel,
4968        Lvd2Cr1_SPEC,
4969        crate::common::RW,
4970    > {
4971        crate::common::RegisterField::<
4972            2,
4973            0x1,
4974            1,
4975            0,
4976            lvd2cr1::Irqsel,
4977            lvd2cr1::Irqsel,
4978            Lvd2Cr1_SPEC,
4979            crate::common::RW,
4980        >::from_register(self, 0)
4981    }
4982}
4983impl ::core::default::Default for Lvd2Cr1 {
4984    #[inline(always)]
4985    fn default() -> Lvd2Cr1 {
4986        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
4987    }
4988}
4989pub mod lvd2cr1 {
4990
4991    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4992    pub struct Idtsel_SPEC;
4993    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4994    impl Idtsel {
4995        #[doc = "When VCC>= Vdet2 (rise) is detected"]
4996        pub const _00: Self = Self::new(0);
4997
4998        #[doc = "When VCC < Vdet2 (fall) is detected"]
4999        pub const _01: Self = Self::new(1);
5000
5001        #[doc = "When fall and rise are detected"]
5002        pub const _10: Self = Self::new(2);
5003
5004        #[doc = "Settings prohibited"]
5005        pub const _11: Self = Self::new(3);
5006    }
5007    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5008    pub struct Irqsel_SPEC;
5009    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
5010    impl Irqsel {
5011        #[doc = "Non-maskable interrupt"]
5012        pub const _0: Self = Self::new(0);
5013
5014        #[doc = "Maskable interrupt"]
5015        pub const _1: Self = Self::new(1);
5016    }
5017}
5018#[doc(hidden)]
5019#[derive(Copy, Clone, Eq, PartialEq)]
5020pub struct Lvd2Sr_SPEC;
5021impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
5022    type DataType = u8;
5023}
5024
5025#[doc = "Voltage Monitor 2 Circuit Status Register"]
5026pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
5027
5028impl Lvd2Sr {
5029    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
5030    #[inline(always)]
5031    pub fn det(
5032        self,
5033    ) -> crate::common::RegisterField<
5034        0,
5035        0x1,
5036        1,
5037        0,
5038        lvd2sr::Det,
5039        lvd2sr::Det,
5040        Lvd2Sr_SPEC,
5041        crate::common::RW,
5042    > {
5043        crate::common::RegisterField::<
5044            0,
5045            0x1,
5046            1,
5047            0,
5048            lvd2sr::Det,
5049            lvd2sr::Det,
5050            Lvd2Sr_SPEC,
5051            crate::common::RW,
5052        >::from_register(self, 0)
5053    }
5054
5055    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
5056    #[inline(always)]
5057    pub fn mon(
5058        self,
5059    ) -> crate::common::RegisterField<
5060        1,
5061        0x1,
5062        1,
5063        0,
5064        lvd2sr::Mon,
5065        lvd2sr::Mon,
5066        Lvd2Sr_SPEC,
5067        crate::common::R,
5068    > {
5069        crate::common::RegisterField::<
5070            1,
5071            0x1,
5072            1,
5073            0,
5074            lvd2sr::Mon,
5075            lvd2sr::Mon,
5076            Lvd2Sr_SPEC,
5077            crate::common::R,
5078        >::from_register(self, 0)
5079    }
5080}
5081impl ::core::default::Default for Lvd2Sr {
5082    #[inline(always)]
5083    fn default() -> Lvd2Sr {
5084        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
5085    }
5086}
5087pub mod lvd2sr {
5088
5089    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5090    pub struct Det_SPEC;
5091    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
5092    impl Det {
5093        #[doc = "Not detected"]
5094        pub const _0: Self = Self::new(0);
5095
5096        #[doc = "Vdet2 crossing is detected"]
5097        pub const _1: Self = Self::new(1);
5098    }
5099    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5100    pub struct Mon_SPEC;
5101    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
5102    impl Mon {
5103        #[doc = "VCC < Vdet2"]
5104        pub const _0: Self = Self::new(0);
5105
5106        #[doc = "VCC>= Vdet2 or MON is disabled"]
5107        pub const _1: Self = Self::new(1);
5108    }
5109}
5110#[doc(hidden)]
5111#[derive(Copy, Clone, Eq, PartialEq)]
5112pub struct Cgfsar_SPEC;
5113impl crate::sealed::RegSpec for Cgfsar_SPEC {
5114    type DataType = u32;
5115}
5116
5117#[doc = "Clock Generation Function Security Attribute Register"]
5118pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
5119
5120impl Cgfsar {
5121    #[doc = "Non Secure Attribute bit 00"]
5122    #[inline(always)]
5123    pub fn nonsec00(
5124        self,
5125    ) -> crate::common::RegisterField<
5126        0,
5127        0x1,
5128        1,
5129        0,
5130        cgfsar::Nonsec00,
5131        cgfsar::Nonsec00,
5132        Cgfsar_SPEC,
5133        crate::common::RW,
5134    > {
5135        crate::common::RegisterField::<
5136            0,
5137            0x1,
5138            1,
5139            0,
5140            cgfsar::Nonsec00,
5141            cgfsar::Nonsec00,
5142            Cgfsar_SPEC,
5143            crate::common::RW,
5144        >::from_register(self, 0)
5145    }
5146
5147    #[doc = "Non Secure Attribute bit 02"]
5148    #[inline(always)]
5149    pub fn nonsec02(
5150        self,
5151    ) -> crate::common::RegisterField<
5152        2,
5153        0x1,
5154        1,
5155        0,
5156        cgfsar::Nonsec02,
5157        cgfsar::Nonsec02,
5158        Cgfsar_SPEC,
5159        crate::common::RW,
5160    > {
5161        crate::common::RegisterField::<
5162            2,
5163            0x1,
5164            1,
5165            0,
5166            cgfsar::Nonsec02,
5167            cgfsar::Nonsec02,
5168            Cgfsar_SPEC,
5169            crate::common::RW,
5170        >::from_register(self, 0)
5171    }
5172
5173    #[doc = "Non Secure Attribute bit 03"]
5174    #[inline(always)]
5175    pub fn nonsec03(
5176        self,
5177    ) -> crate::common::RegisterField<
5178        3,
5179        0x1,
5180        1,
5181        0,
5182        cgfsar::Nonsec03,
5183        cgfsar::Nonsec03,
5184        Cgfsar_SPEC,
5185        crate::common::RW,
5186    > {
5187        crate::common::RegisterField::<
5188            3,
5189            0x1,
5190            1,
5191            0,
5192            cgfsar::Nonsec03,
5193            cgfsar::Nonsec03,
5194            Cgfsar_SPEC,
5195            crate::common::RW,
5196        >::from_register(self, 0)
5197    }
5198
5199    #[doc = "Non Secure Attribute bit 04"]
5200    #[inline(always)]
5201    pub fn nonsec04(
5202        self,
5203    ) -> crate::common::RegisterField<
5204        4,
5205        0x1,
5206        1,
5207        0,
5208        cgfsar::Nonsec04,
5209        cgfsar::Nonsec04,
5210        Cgfsar_SPEC,
5211        crate::common::RW,
5212    > {
5213        crate::common::RegisterField::<
5214            4,
5215            0x1,
5216            1,
5217            0,
5218            cgfsar::Nonsec04,
5219            cgfsar::Nonsec04,
5220            Cgfsar_SPEC,
5221            crate::common::RW,
5222        >::from_register(self, 0)
5223    }
5224
5225    #[doc = "Non Secure Attribute bit 05"]
5226    #[inline(always)]
5227    pub fn nonsec05(
5228        self,
5229    ) -> crate::common::RegisterField<
5230        5,
5231        0x1,
5232        1,
5233        0,
5234        cgfsar::Nonsec05,
5235        cgfsar::Nonsec05,
5236        Cgfsar_SPEC,
5237        crate::common::RW,
5238    > {
5239        crate::common::RegisterField::<
5240            5,
5241            0x1,
5242            1,
5243            0,
5244            cgfsar::Nonsec05,
5245            cgfsar::Nonsec05,
5246            Cgfsar_SPEC,
5247            crate::common::RW,
5248        >::from_register(self, 0)
5249    }
5250
5251    #[doc = "Non Secure Attribute bit 06"]
5252    #[inline(always)]
5253    pub fn nonsec06(
5254        self,
5255    ) -> crate::common::RegisterField<
5256        6,
5257        0x1,
5258        1,
5259        0,
5260        cgfsar::Nonsec06,
5261        cgfsar::Nonsec06,
5262        Cgfsar_SPEC,
5263        crate::common::RW,
5264    > {
5265        crate::common::RegisterField::<
5266            6,
5267            0x1,
5268            1,
5269            0,
5270            cgfsar::Nonsec06,
5271            cgfsar::Nonsec06,
5272            Cgfsar_SPEC,
5273            crate::common::RW,
5274        >::from_register(self, 0)
5275    }
5276
5277    #[doc = "Non Secure Attribute bit 07"]
5278    #[inline(always)]
5279    pub fn nonsec07(
5280        self,
5281    ) -> crate::common::RegisterField<
5282        7,
5283        0x1,
5284        1,
5285        0,
5286        cgfsar::Nonsec07,
5287        cgfsar::Nonsec07,
5288        Cgfsar_SPEC,
5289        crate::common::RW,
5290    > {
5291        crate::common::RegisterField::<
5292            7,
5293            0x1,
5294            1,
5295            0,
5296            cgfsar::Nonsec07,
5297            cgfsar::Nonsec07,
5298            Cgfsar_SPEC,
5299            crate::common::RW,
5300        >::from_register(self, 0)
5301    }
5302
5303    #[doc = "Non Secure Attribute bit 08"]
5304    #[inline(always)]
5305    pub fn nonsec08(
5306        self,
5307    ) -> crate::common::RegisterField<
5308        8,
5309        0x1,
5310        1,
5311        0,
5312        cgfsar::Nonsec08,
5313        cgfsar::Nonsec08,
5314        Cgfsar_SPEC,
5315        crate::common::RW,
5316    > {
5317        crate::common::RegisterField::<
5318            8,
5319            0x1,
5320            1,
5321            0,
5322            cgfsar::Nonsec08,
5323            cgfsar::Nonsec08,
5324            Cgfsar_SPEC,
5325            crate::common::RW,
5326        >::from_register(self, 0)
5327    }
5328
5329    #[doc = "Non Secure Attribute bit 11"]
5330    #[inline(always)]
5331    pub fn nonsec11(
5332        self,
5333    ) -> crate::common::RegisterField<
5334        11,
5335        0x1,
5336        1,
5337        0,
5338        cgfsar::Nonsec11,
5339        cgfsar::Nonsec11,
5340        Cgfsar_SPEC,
5341        crate::common::RW,
5342    > {
5343        crate::common::RegisterField::<
5344            11,
5345            0x1,
5346            1,
5347            0,
5348            cgfsar::Nonsec11,
5349            cgfsar::Nonsec11,
5350            Cgfsar_SPEC,
5351            crate::common::RW,
5352        >::from_register(self, 0)
5353    }
5354
5355    #[doc = "Non Secure Attribute bit 16"]
5356    #[inline(always)]
5357    pub fn nonsec16(
5358        self,
5359    ) -> crate::common::RegisterField<
5360        16,
5361        0x1,
5362        1,
5363        0,
5364        cgfsar::Nonsec16,
5365        cgfsar::Nonsec16,
5366        Cgfsar_SPEC,
5367        crate::common::RW,
5368    > {
5369        crate::common::RegisterField::<
5370            16,
5371            0x1,
5372            1,
5373            0,
5374            cgfsar::Nonsec16,
5375            cgfsar::Nonsec16,
5376            Cgfsar_SPEC,
5377            crate::common::RW,
5378        >::from_register(self, 0)
5379    }
5380
5381    #[doc = "Non Secure Attribute bit 18"]
5382    #[inline(always)]
5383    pub fn nonsec18(
5384        self,
5385    ) -> crate::common::RegisterField<
5386        18,
5387        0x1,
5388        1,
5389        0,
5390        cgfsar::Nonsec18,
5391        cgfsar::Nonsec18,
5392        Cgfsar_SPEC,
5393        crate::common::RW,
5394    > {
5395        crate::common::RegisterField::<
5396            18,
5397            0x1,
5398            1,
5399            0,
5400            cgfsar::Nonsec18,
5401            cgfsar::Nonsec18,
5402            Cgfsar_SPEC,
5403            crate::common::RW,
5404        >::from_register(self, 0)
5405    }
5406
5407    #[doc = "Non Secure Attribute bit 20"]
5408    #[inline(always)]
5409    pub fn nonsec20(
5410        self,
5411    ) -> crate::common::RegisterField<
5412        20,
5413        0x1,
5414        1,
5415        0,
5416        cgfsar::Nonsec20,
5417        cgfsar::Nonsec20,
5418        Cgfsar_SPEC,
5419        crate::common::RW,
5420    > {
5421        crate::common::RegisterField::<
5422            20,
5423            0x1,
5424            1,
5425            0,
5426            cgfsar::Nonsec20,
5427            cgfsar::Nonsec20,
5428            Cgfsar_SPEC,
5429            crate::common::RW,
5430        >::from_register(self, 0)
5431    }
5432}
5433impl ::core::default::Default for Cgfsar {
5434    #[inline(always)]
5435    fn default() -> Cgfsar {
5436        <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
5437    }
5438}
5439pub mod cgfsar {
5440
5441    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5442    pub struct Nonsec00_SPEC;
5443    pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
5444    impl Nonsec00 {
5445        #[doc = "Secure"]
5446        pub const _0: Self = Self::new(0);
5447
5448        #[doc = "Non Secure"]
5449        pub const _1: Self = Self::new(1);
5450    }
5451    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5452    pub struct Nonsec02_SPEC;
5453    pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
5454    impl Nonsec02 {
5455        #[doc = "Secure"]
5456        pub const _0: Self = Self::new(0);
5457
5458        #[doc = "Non Secure"]
5459        pub const _1: Self = Self::new(1);
5460    }
5461    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5462    pub struct Nonsec03_SPEC;
5463    pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
5464    impl Nonsec03 {
5465        #[doc = "Secure"]
5466        pub const _0: Self = Self::new(0);
5467
5468        #[doc = "Non Secure"]
5469        pub const _1: Self = Self::new(1);
5470    }
5471    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5472    pub struct Nonsec04_SPEC;
5473    pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
5474    impl Nonsec04 {
5475        #[doc = "Secure"]
5476        pub const _0: Self = Self::new(0);
5477
5478        #[doc = "Non Secure"]
5479        pub const _1: Self = Self::new(1);
5480    }
5481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5482    pub struct Nonsec05_SPEC;
5483    pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
5484    impl Nonsec05 {
5485        #[doc = "Secure"]
5486        pub const _0: Self = Self::new(0);
5487
5488        #[doc = "Non Secure"]
5489        pub const _1: Self = Self::new(1);
5490    }
5491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5492    pub struct Nonsec06_SPEC;
5493    pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
5494    impl Nonsec06 {
5495        #[doc = "Secure"]
5496        pub const _0: Self = Self::new(0);
5497
5498        #[doc = "Non Secure"]
5499        pub const _1: Self = Self::new(1);
5500    }
5501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5502    pub struct Nonsec07_SPEC;
5503    pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
5504    impl Nonsec07 {
5505        #[doc = "Secure"]
5506        pub const _0: Self = Self::new(0);
5507
5508        #[doc = "Non Secure"]
5509        pub const _1: Self = Self::new(1);
5510    }
5511    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5512    pub struct Nonsec08_SPEC;
5513    pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
5514    impl Nonsec08 {
5515        #[doc = "Secure"]
5516        pub const _0: Self = Self::new(0);
5517
5518        #[doc = "Non Secure"]
5519        pub const _1: Self = Self::new(1);
5520    }
5521    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5522    pub struct Nonsec11_SPEC;
5523    pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
5524    impl Nonsec11 {
5525        #[doc = "Secure"]
5526        pub const _0: Self = Self::new(0);
5527
5528        #[doc = "Non Secure"]
5529        pub const _1: Self = Self::new(1);
5530    }
5531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5532    pub struct Nonsec16_SPEC;
5533    pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
5534    impl Nonsec16 {
5535        #[doc = "Secure"]
5536        pub const _0: Self = Self::new(0);
5537
5538        #[doc = "Non Secure"]
5539        pub const _1: Self = Self::new(1);
5540    }
5541    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5542    pub struct Nonsec18_SPEC;
5543    pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
5544    impl Nonsec18 {
5545        #[doc = "Secure"]
5546        pub const _0: Self = Self::new(0);
5547
5548        #[doc = "Non Secure"]
5549        pub const _1: Self = Self::new(1);
5550    }
5551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5552    pub struct Nonsec20_SPEC;
5553    pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
5554    impl Nonsec20 {
5555        #[doc = "Secure"]
5556        pub const _0: Self = Self::new(0);
5557
5558        #[doc = "Non Secure"]
5559        pub const _1: Self = Self::new(1);
5560    }
5561}
5562#[doc(hidden)]
5563#[derive(Copy, Clone, Eq, PartialEq)]
5564pub struct Rstsar_SPEC;
5565impl crate::sealed::RegSpec for Rstsar_SPEC {
5566    type DataType = u32;
5567}
5568
5569#[doc = "Reset Security Attribution Register"]
5570pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
5571
5572impl Rstsar {
5573    #[doc = "Non Secure Attribute bit 0"]
5574    #[inline(always)]
5575    pub fn nonsec0(
5576        self,
5577    ) -> crate::common::RegisterField<
5578        0,
5579        0x1,
5580        1,
5581        0,
5582        rstsar::Nonsec0,
5583        rstsar::Nonsec0,
5584        Rstsar_SPEC,
5585        crate::common::RW,
5586    > {
5587        crate::common::RegisterField::<
5588            0,
5589            0x1,
5590            1,
5591            0,
5592            rstsar::Nonsec0,
5593            rstsar::Nonsec0,
5594            Rstsar_SPEC,
5595            crate::common::RW,
5596        >::from_register(self, 0)
5597    }
5598
5599    #[doc = "Non Secure Attribute bit 1"]
5600    #[inline(always)]
5601    pub fn nonsec1(
5602        self,
5603    ) -> crate::common::RegisterField<
5604        1,
5605        0x1,
5606        1,
5607        0,
5608        rstsar::Nonsec1,
5609        rstsar::Nonsec1,
5610        Rstsar_SPEC,
5611        crate::common::RW,
5612    > {
5613        crate::common::RegisterField::<
5614            1,
5615            0x1,
5616            1,
5617            0,
5618            rstsar::Nonsec1,
5619            rstsar::Nonsec1,
5620            Rstsar_SPEC,
5621            crate::common::RW,
5622        >::from_register(self, 0)
5623    }
5624
5625    #[doc = "Non Secure Attribute bit 2"]
5626    #[inline(always)]
5627    pub fn nonsec2(
5628        self,
5629    ) -> crate::common::RegisterField<
5630        2,
5631        0x1,
5632        1,
5633        0,
5634        rstsar::Nonsec2,
5635        rstsar::Nonsec2,
5636        Rstsar_SPEC,
5637        crate::common::RW,
5638    > {
5639        crate::common::RegisterField::<
5640            2,
5641            0x1,
5642            1,
5643            0,
5644            rstsar::Nonsec2,
5645            rstsar::Nonsec2,
5646            Rstsar_SPEC,
5647            crate::common::RW,
5648        >::from_register(self, 0)
5649    }
5650}
5651impl ::core::default::Default for Rstsar {
5652    #[inline(always)]
5653    fn default() -> Rstsar {
5654        <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
5655    }
5656}
5657pub mod rstsar {
5658
5659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5660    pub struct Nonsec0_SPEC;
5661    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5662    impl Nonsec0 {
5663        #[doc = "Secure"]
5664        pub const _0: Self = Self::new(0);
5665
5666        #[doc = "Non Secure"]
5667        pub const _1: Self = Self::new(1);
5668    }
5669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5670    pub struct Nonsec1_SPEC;
5671    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5672    impl Nonsec1 {
5673        #[doc = "Secure"]
5674        pub const _0: Self = Self::new(0);
5675
5676        #[doc = "Non Secure"]
5677        pub const _1: Self = Self::new(1);
5678    }
5679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5680    pub struct Nonsec2_SPEC;
5681    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5682    impl Nonsec2 {
5683        #[doc = "Secure"]
5684        pub const _0: Self = Self::new(0);
5685
5686        #[doc = "Non Secure"]
5687        pub const _1: Self = Self::new(1);
5688    }
5689}
5690#[doc(hidden)]
5691#[derive(Copy, Clone, Eq, PartialEq)]
5692pub struct Lpmsar_SPEC;
5693impl crate::sealed::RegSpec for Lpmsar_SPEC {
5694    type DataType = u32;
5695}
5696
5697#[doc = "Low Power Mode Security Attribution Register"]
5698pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
5699
5700impl Lpmsar {
5701    #[doc = "Non Secure Attribute bit 0"]
5702    #[inline(always)]
5703    pub fn nonsec0(
5704        self,
5705    ) -> crate::common::RegisterField<
5706        0,
5707        0x1,
5708        1,
5709        0,
5710        lpmsar::Nonsec0,
5711        lpmsar::Nonsec0,
5712        Lpmsar_SPEC,
5713        crate::common::RW,
5714    > {
5715        crate::common::RegisterField::<
5716            0,
5717            0x1,
5718            1,
5719            0,
5720            lpmsar::Nonsec0,
5721            lpmsar::Nonsec0,
5722            Lpmsar_SPEC,
5723            crate::common::RW,
5724        >::from_register(self, 0)
5725    }
5726
5727    #[doc = "Non Secure Attribute bit 2"]
5728    #[inline(always)]
5729    pub fn nonsec2(
5730        self,
5731    ) -> crate::common::RegisterField<
5732        2,
5733        0x1,
5734        1,
5735        0,
5736        lpmsar::Nonsec2,
5737        lpmsar::Nonsec2,
5738        Lpmsar_SPEC,
5739        crate::common::RW,
5740    > {
5741        crate::common::RegisterField::<
5742            2,
5743            0x1,
5744            1,
5745            0,
5746            lpmsar::Nonsec2,
5747            lpmsar::Nonsec2,
5748            Lpmsar_SPEC,
5749            crate::common::RW,
5750        >::from_register(self, 0)
5751    }
5752
5753    #[doc = "Non Secure Attribute bit 4"]
5754    #[inline(always)]
5755    pub fn nonsec4(
5756        self,
5757    ) -> crate::common::RegisterField<
5758        4,
5759        0x1,
5760        1,
5761        0,
5762        lpmsar::Nonsec4,
5763        lpmsar::Nonsec4,
5764        Lpmsar_SPEC,
5765        crate::common::RW,
5766    > {
5767        crate::common::RegisterField::<
5768            4,
5769            0x1,
5770            1,
5771            0,
5772            lpmsar::Nonsec4,
5773            lpmsar::Nonsec4,
5774            Lpmsar_SPEC,
5775            crate::common::RW,
5776        >::from_register(self, 0)
5777    }
5778
5779    #[doc = "Non Secure Attribute bit 8"]
5780    #[inline(always)]
5781    pub fn nonsec8(
5782        self,
5783    ) -> crate::common::RegisterField<
5784        8,
5785        0x1,
5786        1,
5787        0,
5788        lpmsar::Nonsec8,
5789        lpmsar::Nonsec8,
5790        Lpmsar_SPEC,
5791        crate::common::RW,
5792    > {
5793        crate::common::RegisterField::<
5794            8,
5795            0x1,
5796            1,
5797            0,
5798            lpmsar::Nonsec8,
5799            lpmsar::Nonsec8,
5800            Lpmsar_SPEC,
5801            crate::common::RW,
5802        >::from_register(self, 0)
5803    }
5804
5805    #[doc = "Non Secure Attribute bit 9"]
5806    #[inline(always)]
5807    pub fn nonsec9(
5808        self,
5809    ) -> crate::common::RegisterField<
5810        9,
5811        0x1,
5812        1,
5813        0,
5814        lpmsar::Nonsec9,
5815        lpmsar::Nonsec9,
5816        Lpmsar_SPEC,
5817        crate::common::RW,
5818    > {
5819        crate::common::RegisterField::<
5820            9,
5821            0x1,
5822            1,
5823            0,
5824            lpmsar::Nonsec9,
5825            lpmsar::Nonsec9,
5826            Lpmsar_SPEC,
5827            crate::common::RW,
5828        >::from_register(self, 0)
5829    }
5830}
5831impl ::core::default::Default for Lpmsar {
5832    #[inline(always)]
5833    fn default() -> Lpmsar {
5834        <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
5835    }
5836}
5837pub mod lpmsar {
5838
5839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5840    pub struct Nonsec0_SPEC;
5841    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5842    impl Nonsec0 {
5843        #[doc = "Secure"]
5844        pub const _0: Self = Self::new(0);
5845
5846        #[doc = "Non Secure"]
5847        pub const _1: Self = Self::new(1);
5848    }
5849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5850    pub struct Nonsec2_SPEC;
5851    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5852    impl Nonsec2 {
5853        #[doc = "Secure"]
5854        pub const _0: Self = Self::new(0);
5855
5856        #[doc = "Non Secure"]
5857        pub const _1: Self = Self::new(1);
5858    }
5859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5860    pub struct Nonsec4_SPEC;
5861    pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
5862    impl Nonsec4 {
5863        #[doc = "Secure"]
5864        pub const _0: Self = Self::new(0);
5865
5866        #[doc = "Non Secure"]
5867        pub const _1: Self = Self::new(1);
5868    }
5869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5870    pub struct Nonsec8_SPEC;
5871    pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
5872    impl Nonsec8 {
5873        #[doc = "Secure"]
5874        pub const _0: Self = Self::new(0);
5875
5876        #[doc = "Non Secure"]
5877        pub const _1: Self = Self::new(1);
5878    }
5879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5880    pub struct Nonsec9_SPEC;
5881    pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
5882    impl Nonsec9 {
5883        #[doc = "Secure"]
5884        pub const _0: Self = Self::new(0);
5885
5886        #[doc = "Non Secure"]
5887        pub const _1: Self = Self::new(1);
5888    }
5889}
5890#[doc(hidden)]
5891#[derive(Copy, Clone, Eq, PartialEq)]
5892pub struct Lvdsar_SPEC;
5893impl crate::sealed::RegSpec for Lvdsar_SPEC {
5894    type DataType = u32;
5895}
5896
5897#[doc = "Low Voltage Detection Security Attribution Register"]
5898pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
5899
5900impl Lvdsar {
5901    #[doc = "Non Secure Attribute bit 0"]
5902    #[inline(always)]
5903    pub fn nonsec0(
5904        self,
5905    ) -> crate::common::RegisterField<
5906        0,
5907        0x1,
5908        1,
5909        0,
5910        lvdsar::Nonsec0,
5911        lvdsar::Nonsec0,
5912        Lvdsar_SPEC,
5913        crate::common::RW,
5914    > {
5915        crate::common::RegisterField::<
5916            0,
5917            0x1,
5918            1,
5919            0,
5920            lvdsar::Nonsec0,
5921            lvdsar::Nonsec0,
5922            Lvdsar_SPEC,
5923            crate::common::RW,
5924        >::from_register(self, 0)
5925    }
5926
5927    #[doc = "Non Secure Attribute bit 1"]
5928    #[inline(always)]
5929    pub fn nonsec1(
5930        self,
5931    ) -> crate::common::RegisterField<
5932        1,
5933        0x1,
5934        1,
5935        0,
5936        lvdsar::Nonsec1,
5937        lvdsar::Nonsec1,
5938        Lvdsar_SPEC,
5939        crate::common::RW,
5940    > {
5941        crate::common::RegisterField::<
5942            1,
5943            0x1,
5944            1,
5945            0,
5946            lvdsar::Nonsec1,
5947            lvdsar::Nonsec1,
5948            Lvdsar_SPEC,
5949            crate::common::RW,
5950        >::from_register(self, 0)
5951    }
5952}
5953impl ::core::default::Default for Lvdsar {
5954    #[inline(always)]
5955    fn default() -> Lvdsar {
5956        <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
5957    }
5958}
5959pub mod lvdsar {
5960
5961    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5962    pub struct Nonsec0_SPEC;
5963    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5964    impl Nonsec0 {
5965        #[doc = "Secure"]
5966        pub const _0: Self = Self::new(0);
5967
5968        #[doc = "Non Secure"]
5969        pub const _1: Self = Self::new(1);
5970    }
5971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5972    pub struct Nonsec1_SPEC;
5973    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5974    impl Nonsec1 {
5975        #[doc = "Secure"]
5976        pub const _0: Self = Self::new(0);
5977
5978        #[doc = "Non Secure"]
5979        pub const _1: Self = Self::new(1);
5980    }
5981}
5982#[doc(hidden)]
5983#[derive(Copy, Clone, Eq, PartialEq)]
5984pub struct Dpfsar_SPEC;
5985impl crate::sealed::RegSpec for Dpfsar_SPEC {
5986    type DataType = u32;
5987}
5988
5989#[doc = "Deep Standby Interrupt Factor Security Attribution Register"]
5990pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
5991
5992impl Dpfsar {
5993    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 0"]
5994    #[inline(always)]
5995    pub fn dpfsa0(
5996        self,
5997    ) -> crate::common::RegisterField<
5998        0,
5999        0x1,
6000        1,
6001        0,
6002        dpfsar::Dpfsa0,
6003        dpfsar::Dpfsa0,
6004        Dpfsar_SPEC,
6005        crate::common::RW,
6006    > {
6007        crate::common::RegisterField::<
6008            0,
6009            0x1,
6010            1,
6011            0,
6012            dpfsar::Dpfsa0,
6013            dpfsar::Dpfsa0,
6014            Dpfsar_SPEC,
6015            crate::common::RW,
6016        >::from_register(self, 0)
6017    }
6018
6019    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 1"]
6020    #[inline(always)]
6021    pub fn dpfsa1(
6022        self,
6023    ) -> crate::common::RegisterField<
6024        1,
6025        0x1,
6026        1,
6027        0,
6028        dpfsar::Dpfsa1,
6029        dpfsar::Dpfsa1,
6030        Dpfsar_SPEC,
6031        crate::common::RW,
6032    > {
6033        crate::common::RegisterField::<
6034            1,
6035            0x1,
6036            1,
6037            0,
6038            dpfsar::Dpfsa1,
6039            dpfsar::Dpfsa1,
6040            Dpfsar_SPEC,
6041            crate::common::RW,
6042        >::from_register(self, 0)
6043    }
6044
6045    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6046    #[inline(always)]
6047    pub fn dpfsa04(
6048        self,
6049    ) -> crate::common::RegisterField<
6050        4,
6051        0x1,
6052        1,
6053        0,
6054        dpfsar::Dpfsa04,
6055        dpfsar::Dpfsa04,
6056        Dpfsar_SPEC,
6057        crate::common::RW,
6058    > {
6059        crate::common::RegisterField::<
6060            4,
6061            0x1,
6062            1,
6063            0,
6064            dpfsar::Dpfsa04,
6065            dpfsar::Dpfsa04,
6066            Dpfsar_SPEC,
6067            crate::common::RW,
6068        >::from_register(self, 0)
6069    }
6070
6071    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6072    #[inline(always)]
6073    pub fn dpfsa05(
6074        self,
6075    ) -> crate::common::RegisterField<
6076        5,
6077        0x1,
6078        1,
6079        0,
6080        dpfsar::Dpfsa05,
6081        dpfsar::Dpfsa05,
6082        Dpfsar_SPEC,
6083        crate::common::RW,
6084    > {
6085        crate::common::RegisterField::<
6086            5,
6087            0x1,
6088            1,
6089            0,
6090            dpfsar::Dpfsa05,
6091            dpfsar::Dpfsa05,
6092            Dpfsar_SPEC,
6093            crate::common::RW,
6094        >::from_register(self, 0)
6095    }
6096
6097    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6098    #[inline(always)]
6099    pub fn dpfsa06(
6100        self,
6101    ) -> crate::common::RegisterField<
6102        6,
6103        0x1,
6104        1,
6105        0,
6106        dpfsar::Dpfsa06,
6107        dpfsar::Dpfsa06,
6108        Dpfsar_SPEC,
6109        crate::common::RW,
6110    > {
6111        crate::common::RegisterField::<
6112            6,
6113            0x1,
6114            1,
6115            0,
6116            dpfsar::Dpfsa06,
6117            dpfsar::Dpfsa06,
6118            Dpfsar_SPEC,
6119            crate::common::RW,
6120        >::from_register(self, 0)
6121    }
6122
6123    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6124    #[inline(always)]
6125    pub fn dpfsa07(
6126        self,
6127    ) -> crate::common::RegisterField<
6128        7,
6129        0x1,
6130        1,
6131        0,
6132        dpfsar::Dpfsa07,
6133        dpfsar::Dpfsa07,
6134        Dpfsar_SPEC,
6135        crate::common::RW,
6136    > {
6137        crate::common::RegisterField::<
6138            7,
6139            0x1,
6140            1,
6141            0,
6142            dpfsar::Dpfsa07,
6143            dpfsar::Dpfsa07,
6144            Dpfsar_SPEC,
6145            crate::common::RW,
6146        >::from_register(self, 0)
6147    }
6148
6149    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6150    #[inline(always)]
6151    pub fn dpfsa08(
6152        self,
6153    ) -> crate::common::RegisterField<
6154        8,
6155        0x1,
6156        1,
6157        0,
6158        dpfsar::Dpfsa08,
6159        dpfsar::Dpfsa08,
6160        Dpfsar_SPEC,
6161        crate::common::RW,
6162    > {
6163        crate::common::RegisterField::<
6164            8,
6165            0x1,
6166            1,
6167            0,
6168            dpfsar::Dpfsa08,
6169            dpfsar::Dpfsa08,
6170            Dpfsar_SPEC,
6171            crate::common::RW,
6172        >::from_register(self, 0)
6173    }
6174
6175    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6176    #[inline(always)]
6177    pub fn dpfsa09(
6178        self,
6179    ) -> crate::common::RegisterField<
6180        9,
6181        0x1,
6182        1,
6183        0,
6184        dpfsar::Dpfsa09,
6185        dpfsar::Dpfsa09,
6186        Dpfsar_SPEC,
6187        crate::common::RW,
6188    > {
6189        crate::common::RegisterField::<
6190            9,
6191            0x1,
6192            1,
6193            0,
6194            dpfsar::Dpfsa09,
6195            dpfsar::Dpfsa09,
6196            Dpfsar_SPEC,
6197            crate::common::RW,
6198        >::from_register(self, 0)
6199    }
6200
6201    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6202    #[inline(always)]
6203    pub fn dpfsa10(
6204        self,
6205    ) -> crate::common::RegisterField<
6206        10,
6207        0x1,
6208        1,
6209        0,
6210        dpfsar::Dpfsa10,
6211        dpfsar::Dpfsa10,
6212        Dpfsar_SPEC,
6213        crate::common::RW,
6214    > {
6215        crate::common::RegisterField::<
6216            10,
6217            0x1,
6218            1,
6219            0,
6220            dpfsar::Dpfsa10,
6221            dpfsar::Dpfsa10,
6222            Dpfsar_SPEC,
6223            crate::common::RW,
6224        >::from_register(self, 0)
6225    }
6226
6227    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6228    #[inline(always)]
6229    pub fn dpfsa11(
6230        self,
6231    ) -> crate::common::RegisterField<
6232        11,
6233        0x1,
6234        1,
6235        0,
6236        dpfsar::Dpfsa11,
6237        dpfsar::Dpfsa11,
6238        Dpfsar_SPEC,
6239        crate::common::RW,
6240    > {
6241        crate::common::RegisterField::<
6242            11,
6243            0x1,
6244            1,
6245            0,
6246            dpfsar::Dpfsa11,
6247            dpfsar::Dpfsa11,
6248            Dpfsar_SPEC,
6249            crate::common::RW,
6250        >::from_register(self, 0)
6251    }
6252
6253    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
6254    #[inline(always)]
6255    pub fn dpfsa12(
6256        self,
6257    ) -> crate::common::RegisterField<
6258        12,
6259        0x1,
6260        1,
6261        0,
6262        dpfsar::Dpfsa12,
6263        dpfsar::Dpfsa12,
6264        Dpfsar_SPEC,
6265        crate::common::RW,
6266    > {
6267        crate::common::RegisterField::<
6268            12,
6269            0x1,
6270            1,
6271            0,
6272            dpfsar::Dpfsa12,
6273            dpfsar::Dpfsa12,
6274            Dpfsar_SPEC,
6275            crate::common::RW,
6276        >::from_register(self, 0)
6277    }
6278
6279    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 14"]
6280    #[inline(always)]
6281    pub fn dpfsa14(
6282        self,
6283    ) -> crate::common::RegisterField<
6284        14,
6285        0x1,
6286        1,
6287        0,
6288        dpfsar::Dpfsa14,
6289        dpfsar::Dpfsa14,
6290        Dpfsar_SPEC,
6291        crate::common::RW,
6292    > {
6293        crate::common::RegisterField::<
6294            14,
6295            0x1,
6296            1,
6297            0,
6298            dpfsar::Dpfsa14,
6299            dpfsar::Dpfsa14,
6300            Dpfsar_SPEC,
6301            crate::common::RW,
6302        >::from_register(self, 0)
6303    }
6304
6305    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 16"]
6306    #[inline(always)]
6307    pub fn dpfsa16(
6308        self,
6309    ) -> crate::common::RegisterField<
6310        16,
6311        0x1,
6312        1,
6313        0,
6314        dpfsar::Dpfsa16,
6315        dpfsar::Dpfsa16,
6316        Dpfsar_SPEC,
6317        crate::common::RW,
6318    > {
6319        crate::common::RegisterField::<
6320            16,
6321            0x1,
6322            1,
6323            0,
6324            dpfsar::Dpfsa16,
6325            dpfsar::Dpfsa16,
6326            Dpfsar_SPEC,
6327            crate::common::RW,
6328        >::from_register(self, 0)
6329    }
6330
6331    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 17"]
6332    #[inline(always)]
6333    pub fn dpfsa17(
6334        self,
6335    ) -> crate::common::RegisterField<
6336        17,
6337        0x1,
6338        1,
6339        0,
6340        dpfsar::Dpfsa17,
6341        dpfsar::Dpfsa17,
6342        Dpfsar_SPEC,
6343        crate::common::RW,
6344    > {
6345        crate::common::RegisterField::<
6346            17,
6347            0x1,
6348            1,
6349            0,
6350            dpfsar::Dpfsa17,
6351            dpfsar::Dpfsa17,
6352            Dpfsar_SPEC,
6353            crate::common::RW,
6354        >::from_register(self, 0)
6355    }
6356
6357    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 18"]
6358    #[inline(always)]
6359    pub fn dpfsa18(
6360        self,
6361    ) -> crate::common::RegisterField<
6362        18,
6363        0x1,
6364        1,
6365        0,
6366        dpfsar::Dpfsa18,
6367        dpfsar::Dpfsa18,
6368        Dpfsar_SPEC,
6369        crate::common::RW,
6370    > {
6371        crate::common::RegisterField::<
6372            18,
6373            0x1,
6374            1,
6375            0,
6376            dpfsar::Dpfsa18,
6377            dpfsar::Dpfsa18,
6378            Dpfsar_SPEC,
6379            crate::common::RW,
6380        >::from_register(self, 0)
6381    }
6382
6383    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 19"]
6384    #[inline(always)]
6385    pub fn dpfsa19(
6386        self,
6387    ) -> crate::common::RegisterField<
6388        19,
6389        0x1,
6390        1,
6391        0,
6392        dpfsar::Dpfsa19,
6393        dpfsar::Dpfsa19,
6394        Dpfsar_SPEC,
6395        crate::common::RW,
6396    > {
6397        crate::common::RegisterField::<
6398            19,
6399            0x1,
6400            1,
6401            0,
6402            dpfsar::Dpfsa19,
6403            dpfsar::Dpfsa19,
6404            Dpfsar_SPEC,
6405            crate::common::RW,
6406        >::from_register(self, 0)
6407    }
6408
6409    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 20"]
6410    #[inline(always)]
6411    pub fn dpfsa20(
6412        self,
6413    ) -> crate::common::RegisterField<
6414        20,
6415        0x1,
6416        1,
6417        0,
6418        dpfsar::Dpfsa20,
6419        dpfsar::Dpfsa20,
6420        Dpfsar_SPEC,
6421        crate::common::RW,
6422    > {
6423        crate::common::RegisterField::<
6424            20,
6425            0x1,
6426            1,
6427            0,
6428            dpfsar::Dpfsa20,
6429            dpfsar::Dpfsa20,
6430            Dpfsar_SPEC,
6431            crate::common::RW,
6432        >::from_register(self, 0)
6433    }
6434
6435    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 24"]
6436    #[inline(always)]
6437    pub fn dpfsa24(
6438        self,
6439    ) -> crate::common::RegisterField<
6440        24,
6441        0x1,
6442        1,
6443        0,
6444        dpfsar::Dpfsa24,
6445        dpfsar::Dpfsa24,
6446        Dpfsar_SPEC,
6447        crate::common::RW,
6448    > {
6449        crate::common::RegisterField::<
6450            24,
6451            0x1,
6452            1,
6453            0,
6454            dpfsar::Dpfsa24,
6455            dpfsar::Dpfsa24,
6456            Dpfsar_SPEC,
6457            crate::common::RW,
6458        >::from_register(self, 0)
6459    }
6460
6461    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 26"]
6462    #[inline(always)]
6463    pub fn dpfsa26(
6464        self,
6465    ) -> crate::common::RegisterField<
6466        26,
6467        0x1,
6468        1,
6469        0,
6470        dpfsar::Dpfsa26,
6471        dpfsar::Dpfsa26,
6472        Dpfsar_SPEC,
6473        crate::common::RW,
6474    > {
6475        crate::common::RegisterField::<
6476            26,
6477            0x1,
6478            1,
6479            0,
6480            dpfsar::Dpfsa26,
6481            dpfsar::Dpfsa26,
6482            Dpfsar_SPEC,
6483            crate::common::RW,
6484        >::from_register(self, 0)
6485    }
6486}
6487impl ::core::default::Default for Dpfsar {
6488    #[inline(always)]
6489    fn default() -> Dpfsar {
6490        <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
6491    }
6492}
6493pub mod dpfsar {
6494
6495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6496    pub struct Dpfsa0_SPEC;
6497    pub type Dpfsa0 = crate::EnumBitfieldStruct<u8, Dpfsa0_SPEC>;
6498    impl Dpfsa0 {
6499        #[doc = "Secure"]
6500        pub const _0: Self = Self::new(0);
6501
6502        #[doc = "Non Secure"]
6503        pub const _1: Self = Self::new(1);
6504    }
6505    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6506    pub struct Dpfsa1_SPEC;
6507    pub type Dpfsa1 = crate::EnumBitfieldStruct<u8, Dpfsa1_SPEC>;
6508    impl Dpfsa1 {
6509        #[doc = "Secure"]
6510        pub const _0: Self = Self::new(0);
6511
6512        #[doc = "Non Secure"]
6513        pub const _1: Self = Self::new(1);
6514    }
6515    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6516    pub struct Dpfsa04_SPEC;
6517    pub type Dpfsa04 = crate::EnumBitfieldStruct<u8, Dpfsa04_SPEC>;
6518    impl Dpfsa04 {
6519        #[doc = "Secure"]
6520        pub const _0: Self = Self::new(0);
6521
6522        #[doc = "Non Secure"]
6523        pub const _1: Self = Self::new(1);
6524    }
6525    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6526    pub struct Dpfsa05_SPEC;
6527    pub type Dpfsa05 = crate::EnumBitfieldStruct<u8, Dpfsa05_SPEC>;
6528    impl Dpfsa05 {
6529        #[doc = "Secure"]
6530        pub const _0: Self = Self::new(0);
6531
6532        #[doc = "Non Secure"]
6533        pub const _1: Self = Self::new(1);
6534    }
6535    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6536    pub struct Dpfsa06_SPEC;
6537    pub type Dpfsa06 = crate::EnumBitfieldStruct<u8, Dpfsa06_SPEC>;
6538    impl Dpfsa06 {
6539        #[doc = "Secure"]
6540        pub const _0: Self = Self::new(0);
6541
6542        #[doc = "Non Secure"]
6543        pub const _1: Self = Self::new(1);
6544    }
6545    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6546    pub struct Dpfsa07_SPEC;
6547    pub type Dpfsa07 = crate::EnumBitfieldStruct<u8, Dpfsa07_SPEC>;
6548    impl Dpfsa07 {
6549        #[doc = "Secure"]
6550        pub const _0: Self = Self::new(0);
6551
6552        #[doc = "Non Secure"]
6553        pub const _1: Self = Self::new(1);
6554    }
6555    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6556    pub struct Dpfsa08_SPEC;
6557    pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
6558    impl Dpfsa08 {
6559        #[doc = "Secure"]
6560        pub const _0: Self = Self::new(0);
6561
6562        #[doc = "Non Secure"]
6563        pub const _1: Self = Self::new(1);
6564    }
6565    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6566    pub struct Dpfsa09_SPEC;
6567    pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
6568    impl Dpfsa09 {
6569        #[doc = "Secure"]
6570        pub const _0: Self = Self::new(0);
6571
6572        #[doc = "Non Secure"]
6573        pub const _1: Self = Self::new(1);
6574    }
6575    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6576    pub struct Dpfsa10_SPEC;
6577    pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
6578    impl Dpfsa10 {
6579        #[doc = "Secure"]
6580        pub const _0: Self = Self::new(0);
6581
6582        #[doc = "Non Secure"]
6583        pub const _1: Self = Self::new(1);
6584    }
6585    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6586    pub struct Dpfsa11_SPEC;
6587    pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
6588    impl Dpfsa11 {
6589        #[doc = "Secure"]
6590        pub const _0: Self = Self::new(0);
6591
6592        #[doc = "Non Secure"]
6593        pub const _1: Self = Self::new(1);
6594    }
6595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6596    pub struct Dpfsa12_SPEC;
6597    pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
6598    impl Dpfsa12 {
6599        #[doc = "Secure"]
6600        pub const _0: Self = Self::new(0);
6601
6602        #[doc = "Non Secure"]
6603        pub const _1: Self = Self::new(1);
6604    }
6605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6606    pub struct Dpfsa14_SPEC;
6607    pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
6608    impl Dpfsa14 {
6609        #[doc = "Secure"]
6610        pub const _0: Self = Self::new(0);
6611
6612        #[doc = "Non Secure"]
6613        pub const _1: Self = Self::new(1);
6614    }
6615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6616    pub struct Dpfsa16_SPEC;
6617    pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
6618    impl Dpfsa16 {
6619        #[doc = "Secure"]
6620        pub const _0: Self = Self::new(0);
6621
6622        #[doc = "Non Secure"]
6623        pub const _1: Self = Self::new(1);
6624    }
6625    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6626    pub struct Dpfsa17_SPEC;
6627    pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
6628    impl Dpfsa17 {
6629        #[doc = "Secure"]
6630        pub const _0: Self = Self::new(0);
6631
6632        #[doc = "Non Secure"]
6633        pub const _1: Self = Self::new(1);
6634    }
6635    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6636    pub struct Dpfsa18_SPEC;
6637    pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
6638    impl Dpfsa18 {
6639        #[doc = "Secure"]
6640        pub const _0: Self = Self::new(0);
6641
6642        #[doc = "Non Secure"]
6643        pub const _1: Self = Self::new(1);
6644    }
6645    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6646    pub struct Dpfsa19_SPEC;
6647    pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
6648    impl Dpfsa19 {
6649        #[doc = "Secure"]
6650        pub const _0: Self = Self::new(0);
6651
6652        #[doc = "Non Secure"]
6653        pub const _1: Self = Self::new(1);
6654    }
6655    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6656    pub struct Dpfsa20_SPEC;
6657    pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
6658    impl Dpfsa20 {
6659        #[doc = "Secure"]
6660        pub const _0: Self = Self::new(0);
6661
6662        #[doc = "Non Secure"]
6663        pub const _1: Self = Self::new(1);
6664    }
6665    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6666    pub struct Dpfsa24_SPEC;
6667    pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
6668    impl Dpfsa24 {
6669        #[doc = "Secure"]
6670        pub const _0: Self = Self::new(0);
6671
6672        #[doc = "Non Secure"]
6673        pub const _1: Self = Self::new(1);
6674    }
6675    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6676    pub struct Dpfsa26_SPEC;
6677    pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
6678    impl Dpfsa26 {
6679        #[doc = "Secure"]
6680        pub const _0: Self = Self::new(0);
6681
6682        #[doc = "Non Secure"]
6683        pub const _1: Self = Self::new(1);
6684    }
6685}
6686#[doc(hidden)]
6687#[derive(Copy, Clone, Eq, PartialEq)]
6688pub struct Prcr_SPEC;
6689impl crate::sealed::RegSpec for Prcr_SPEC {
6690    type DataType = u16;
6691}
6692
6693#[doc = "Protect Register"]
6694pub type Prcr = crate::RegValueT<Prcr_SPEC>;
6695
6696impl Prcr {
6697    #[doc = "Enable writing to the registers related to the clock generation circuit"]
6698    #[inline(always)]
6699    pub fn prc0(
6700        self,
6701    ) -> crate::common::RegisterField<
6702        0,
6703        0x1,
6704        1,
6705        0,
6706        prcr::Prc0,
6707        prcr::Prc0,
6708        Prcr_SPEC,
6709        crate::common::RW,
6710    > {
6711        crate::common::RegisterField::<
6712            0,
6713            0x1,
6714            1,
6715            0,
6716            prcr::Prc0,
6717            prcr::Prc0,
6718            Prcr_SPEC,
6719            crate::common::RW,
6720        >::from_register(self, 0)
6721    }
6722
6723    #[doc = "Enable writing to the registers related to the low power modes"]
6724    #[inline(always)]
6725    pub fn prc1(
6726        self,
6727    ) -> crate::common::RegisterField<
6728        1,
6729        0x1,
6730        1,
6731        0,
6732        prcr::Prc1,
6733        prcr::Prc1,
6734        Prcr_SPEC,
6735        crate::common::RW,
6736    > {
6737        crate::common::RegisterField::<
6738            1,
6739            0x1,
6740            1,
6741            0,
6742            prcr::Prc1,
6743            prcr::Prc1,
6744            Prcr_SPEC,
6745            crate::common::RW,
6746        >::from_register(self, 0)
6747    }
6748
6749    #[doc = "Enable writing to the registers related to the LVD"]
6750    #[inline(always)]
6751    pub fn prc3(
6752        self,
6753    ) -> crate::common::RegisterField<
6754        3,
6755        0x1,
6756        1,
6757        0,
6758        prcr::Prc3,
6759        prcr::Prc3,
6760        Prcr_SPEC,
6761        crate::common::RW,
6762    > {
6763        crate::common::RegisterField::<
6764            3,
6765            0x1,
6766            1,
6767            0,
6768            prcr::Prc3,
6769            prcr::Prc3,
6770            Prcr_SPEC,
6771            crate::common::RW,
6772        >::from_register(self, 0)
6773    }
6774
6775    #[inline(always)]
6776    pub fn prc4(
6777        self,
6778    ) -> crate::common::RegisterField<
6779        4,
6780        0x1,
6781        1,
6782        0,
6783        prcr::Prc4,
6784        prcr::Prc4,
6785        Prcr_SPEC,
6786        crate::common::RW,
6787    > {
6788        crate::common::RegisterField::<
6789            4,
6790            0x1,
6791            1,
6792            0,
6793            prcr::Prc4,
6794            prcr::Prc4,
6795            Prcr_SPEC,
6796            crate::common::RW,
6797        >::from_register(self, 0)
6798    }
6799
6800    #[doc = "PRC Key Code"]
6801    #[inline(always)]
6802    pub fn prkey(
6803        self,
6804    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
6805        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
6806    }
6807}
6808impl ::core::default::Default for Prcr {
6809    #[inline(always)]
6810    fn default() -> Prcr {
6811        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
6812    }
6813}
6814pub mod prcr {
6815
6816    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6817    pub struct Prc0_SPEC;
6818    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
6819    impl Prc0 {
6820        #[doc = "Disable writes"]
6821        pub const _0: Self = Self::new(0);
6822
6823        #[doc = "Enable writes"]
6824        pub const _1: Self = Self::new(1);
6825    }
6826    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6827    pub struct Prc1_SPEC;
6828    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
6829    impl Prc1 {
6830        #[doc = "Disable writes"]
6831        pub const _0: Self = Self::new(0);
6832
6833        #[doc = "Enable writes"]
6834        pub const _1: Self = Self::new(1);
6835    }
6836    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6837    pub struct Prc3_SPEC;
6838    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
6839    impl Prc3 {
6840        #[doc = "Disable writes"]
6841        pub const _0: Self = Self::new(0);
6842
6843        #[doc = "Enable writes"]
6844        pub const _1: Self = Self::new(1);
6845    }
6846    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6847    pub struct Prc4_SPEC;
6848    pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
6849    impl Prc4 {
6850        #[doc = "Disable writes"]
6851        pub const _0: Self = Self::new(0);
6852
6853        #[doc = "Enable writes"]
6854        pub const _1: Self = Self::new(1);
6855    }
6856}
6857#[doc(hidden)]
6858#[derive(Copy, Clone, Eq, PartialEq)]
6859pub struct Dpsbycr_SPEC;
6860impl crate::sealed::RegSpec for Dpsbycr_SPEC {
6861    type DataType = u8;
6862}
6863
6864#[doc = "Deep Standby Control Register"]
6865pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
6866
6867impl Dpsbycr {
6868    #[doc = "Power-Supply Control"]
6869    #[inline(always)]
6870    pub fn deepcut(
6871        self,
6872    ) -> crate::common::RegisterField<
6873        0,
6874        0x3,
6875        1,
6876        0,
6877        dpsbycr::Deepcut,
6878        dpsbycr::Deepcut,
6879        Dpsbycr_SPEC,
6880        crate::common::RW,
6881    > {
6882        crate::common::RegisterField::<
6883            0,
6884            0x3,
6885            1,
6886            0,
6887            dpsbycr::Deepcut,
6888            dpsbycr::Deepcut,
6889            Dpsbycr_SPEC,
6890            crate::common::RW,
6891        >::from_register(self, 0)
6892    }
6893
6894    #[doc = "I/O Port Rentention"]
6895    #[inline(always)]
6896    pub fn iokeep(
6897        self,
6898    ) -> crate::common::RegisterField<
6899        6,
6900        0x1,
6901        1,
6902        0,
6903        dpsbycr::Iokeep,
6904        dpsbycr::Iokeep,
6905        Dpsbycr_SPEC,
6906        crate::common::RW,
6907    > {
6908        crate::common::RegisterField::<
6909            6,
6910            0x1,
6911            1,
6912            0,
6913            dpsbycr::Iokeep,
6914            dpsbycr::Iokeep,
6915            Dpsbycr_SPEC,
6916            crate::common::RW,
6917        >::from_register(self, 0)
6918    }
6919
6920    #[doc = "Deep Software Standby"]
6921    #[inline(always)]
6922    pub fn dpsby(
6923        self,
6924    ) -> crate::common::RegisterField<
6925        7,
6926        0x1,
6927        1,
6928        0,
6929        dpsbycr::Dpsby,
6930        dpsbycr::Dpsby,
6931        Dpsbycr_SPEC,
6932        crate::common::RW,
6933    > {
6934        crate::common::RegisterField::<
6935            7,
6936            0x1,
6937            1,
6938            0,
6939            dpsbycr::Dpsby,
6940            dpsbycr::Dpsby,
6941            Dpsbycr_SPEC,
6942            crate::common::RW,
6943        >::from_register(self, 0)
6944    }
6945}
6946impl ::core::default::Default for Dpsbycr {
6947    #[inline(always)]
6948    fn default() -> Dpsbycr {
6949        <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
6950    }
6951}
6952pub mod dpsbycr {
6953
6954    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6955    pub struct Deepcut_SPEC;
6956    pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
6957    impl Deepcut {
6958        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0, 1), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
6959        pub const _00: Self = Self::new(0);
6960
6961        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
6962        pub const _01: Self = Self::new(1);
6963
6964        #[doc = "Setting prohibited"]
6965        pub const _10: Self = Self::new(2);
6966
6967        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
6968        pub const _11: Self = Self::new(3);
6969    }
6970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6971    pub struct Iokeep_SPEC;
6972    pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
6973    impl Iokeep {
6974        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
6975        pub const _0: Self = Self::new(0);
6976
6977        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
6978        pub const _1: Self = Self::new(1);
6979    }
6980    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6981    pub struct Dpsby_SPEC;
6982    pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
6983    impl Dpsby {
6984        #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
6985        pub const _0: Self = Self::new(0);
6986
6987        #[doc = "Sleep mode (SBYCR.SSBY=0)  / Deep Software Standby mode (SBYCR.SSBY=1)"]
6988        pub const _1: Self = Self::new(1);
6989    }
6990}
6991#[doc(hidden)]
6992#[derive(Copy, Clone, Eq, PartialEq)]
6993pub struct Dpswcr_SPEC;
6994impl crate::sealed::RegSpec for Dpswcr_SPEC {
6995    type DataType = u8;
6996}
6997
6998#[doc = "Deep Standby Wait Control Register"]
6999pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
7000
7001impl Dpswcr {
7002    #[doc = "Deep Software Wait Standby Time Setting Bit"]
7003    #[inline(always)]
7004    pub fn wtsts(
7005        self,
7006    ) -> crate::common::RegisterField<
7007        0,
7008        0x3f,
7009        1,
7010        0,
7011        dpswcr::Wtsts,
7012        dpswcr::Wtsts,
7013        Dpswcr_SPEC,
7014        crate::common::RW,
7015    > {
7016        crate::common::RegisterField::<
7017            0,
7018            0x3f,
7019            1,
7020            0,
7021            dpswcr::Wtsts,
7022            dpswcr::Wtsts,
7023            Dpswcr_SPEC,
7024            crate::common::RW,
7025        >::from_register(self, 0)
7026    }
7027}
7028impl ::core::default::Default for Dpswcr {
7029    #[inline(always)]
7030    fn default() -> Dpswcr {
7031        <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
7032    }
7033}
7034pub mod dpswcr {
7035
7036    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7037    pub struct Wtsts_SPEC;
7038    pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
7039    impl Wtsts {
7040        #[doc = "Wait cycle for fast recovery"]
7041        pub const _0_X_0_E: Self = Self::new(14);
7042
7043        #[doc = "Wait cycle for slow recovery"]
7044        pub const _0_X_19: Self = Self::new(25);
7045
7046        #[doc = "Setting prohibited"]
7047        pub const OTHERS: Self = Self::new(0);
7048    }
7049}
7050#[doc(hidden)]
7051#[derive(Copy, Clone, Eq, PartialEq)]
7052pub struct Dpsier0_SPEC;
7053impl crate::sealed::RegSpec for Dpsier0_SPEC {
7054    type DataType = u8;
7055}
7056
7057#[doc = "Deep Standby Interrupt Enable Register 0"]
7058pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
7059
7060impl Dpsier0 {
7061    #[doc = "IRQ0-DS Pin Enable"]
7062    #[inline(always)]
7063    pub fn dirq0e(
7064        self,
7065    ) -> crate::common::RegisterField<
7066        0,
7067        0x1,
7068        1,
7069        0,
7070        dpsier0::Dirq0E,
7071        dpsier0::Dirq0E,
7072        Dpsier0_SPEC,
7073        crate::common::RW,
7074    > {
7075        crate::common::RegisterField::<
7076            0,
7077            0x1,
7078            1,
7079            0,
7080            dpsier0::Dirq0E,
7081            dpsier0::Dirq0E,
7082            Dpsier0_SPEC,
7083            crate::common::RW,
7084        >::from_register(self, 0)
7085    }
7086
7087    #[doc = "IRQ1-DS Pin Enable"]
7088    #[inline(always)]
7089    pub fn dirq1e(
7090        self,
7091    ) -> crate::common::RegisterField<
7092        1,
7093        0x1,
7094        1,
7095        0,
7096        dpsier0::Dirq1E,
7097        dpsier0::Dirq1E,
7098        Dpsier0_SPEC,
7099        crate::common::RW,
7100    > {
7101        crate::common::RegisterField::<
7102            1,
7103            0x1,
7104            1,
7105            0,
7106            dpsier0::Dirq1E,
7107            dpsier0::Dirq1E,
7108            Dpsier0_SPEC,
7109            crate::common::RW,
7110        >::from_register(self, 0)
7111    }
7112
7113    #[doc = "IRQ4-DS Pin Enable"]
7114    #[inline(always)]
7115    pub fn dirq4e(
7116        self,
7117    ) -> crate::common::RegisterField<
7118        4,
7119        0x1,
7120        1,
7121        0,
7122        dpsier0::Dirq4E,
7123        dpsier0::Dirq4E,
7124        Dpsier0_SPEC,
7125        crate::common::RW,
7126    > {
7127        crate::common::RegisterField::<
7128            4,
7129            0x1,
7130            1,
7131            0,
7132            dpsier0::Dirq4E,
7133            dpsier0::Dirq4E,
7134            Dpsier0_SPEC,
7135            crate::common::RW,
7136        >::from_register(self, 0)
7137    }
7138
7139    #[doc = "IRQ5-DS Pin Enable"]
7140    #[inline(always)]
7141    pub fn dirq5e(
7142        self,
7143    ) -> crate::common::RegisterField<
7144        5,
7145        0x1,
7146        1,
7147        0,
7148        dpsier0::Dirq5E,
7149        dpsier0::Dirq5E,
7150        Dpsier0_SPEC,
7151        crate::common::RW,
7152    > {
7153        crate::common::RegisterField::<
7154            5,
7155            0x1,
7156            1,
7157            0,
7158            dpsier0::Dirq5E,
7159            dpsier0::Dirq5E,
7160            Dpsier0_SPEC,
7161            crate::common::RW,
7162        >::from_register(self, 0)
7163    }
7164
7165    #[doc = "IRQ6-DS Pin Enable"]
7166    #[inline(always)]
7167    pub fn dirq6e(
7168        self,
7169    ) -> crate::common::RegisterField<
7170        6,
7171        0x1,
7172        1,
7173        0,
7174        dpsier0::Dirq6E,
7175        dpsier0::Dirq6E,
7176        Dpsier0_SPEC,
7177        crate::common::RW,
7178    > {
7179        crate::common::RegisterField::<
7180            6,
7181            0x1,
7182            1,
7183            0,
7184            dpsier0::Dirq6E,
7185            dpsier0::Dirq6E,
7186            Dpsier0_SPEC,
7187            crate::common::RW,
7188        >::from_register(self, 0)
7189    }
7190
7191    #[doc = "IRQ7-DS Pin Enable"]
7192    #[inline(always)]
7193    pub fn dirq7e(
7194        self,
7195    ) -> crate::common::RegisterField<
7196        7,
7197        0x1,
7198        1,
7199        0,
7200        dpsier0::Dirq7E,
7201        dpsier0::Dirq7E,
7202        Dpsier0_SPEC,
7203        crate::common::RW,
7204    > {
7205        crate::common::RegisterField::<
7206            7,
7207            0x1,
7208            1,
7209            0,
7210            dpsier0::Dirq7E,
7211            dpsier0::Dirq7E,
7212            Dpsier0_SPEC,
7213            crate::common::RW,
7214        >::from_register(self, 0)
7215    }
7216}
7217impl ::core::default::Default for Dpsier0 {
7218    #[inline(always)]
7219    fn default() -> Dpsier0 {
7220        <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
7221    }
7222}
7223pub mod dpsier0 {
7224
7225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7226    pub struct Dirq0E_SPEC;
7227    pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
7228    impl Dirq0E {
7229        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7230        pub const _0: Self = Self::new(0);
7231
7232        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7233        pub const _1: Self = Self::new(1);
7234    }
7235    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7236    pub struct Dirq1E_SPEC;
7237    pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
7238    impl Dirq1E {
7239        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7240        pub const _0: Self = Self::new(0);
7241
7242        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7243        pub const _1: Self = Self::new(1);
7244    }
7245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7246    pub struct Dirq4E_SPEC;
7247    pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
7248    impl Dirq4E {
7249        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7250        pub const _0: Self = Self::new(0);
7251
7252        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7253        pub const _1: Self = Self::new(1);
7254    }
7255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7256    pub struct Dirq5E_SPEC;
7257    pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
7258    impl Dirq5E {
7259        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7260        pub const _0: Self = Self::new(0);
7261
7262        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7263        pub const _1: Self = Self::new(1);
7264    }
7265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7266    pub struct Dirq6E_SPEC;
7267    pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
7268    impl Dirq6E {
7269        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7270        pub const _0: Self = Self::new(0);
7271
7272        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7273        pub const _1: Self = Self::new(1);
7274    }
7275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7276    pub struct Dirq7E_SPEC;
7277    pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
7278    impl Dirq7E {
7279        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7280        pub const _0: Self = Self::new(0);
7281
7282        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7283        pub const _1: Self = Self::new(1);
7284    }
7285}
7286#[doc(hidden)]
7287#[derive(Copy, Clone, Eq, PartialEq)]
7288pub struct Dpsier1_SPEC;
7289impl crate::sealed::RegSpec for Dpsier1_SPEC {
7290    type DataType = u8;
7291}
7292
7293#[doc = "Deep Standby Interrupt Enable Register 1"]
7294pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
7295
7296impl Dpsier1 {
7297    #[doc = "IRQ8-DS Pin Enable"]
7298    #[inline(always)]
7299    pub fn dirq8e(
7300        self,
7301    ) -> crate::common::RegisterField<
7302        0,
7303        0x1,
7304        1,
7305        0,
7306        dpsier1::Dirq8E,
7307        dpsier1::Dirq8E,
7308        Dpsier1_SPEC,
7309        crate::common::RW,
7310    > {
7311        crate::common::RegisterField::<
7312            0,
7313            0x1,
7314            1,
7315            0,
7316            dpsier1::Dirq8E,
7317            dpsier1::Dirq8E,
7318            Dpsier1_SPEC,
7319            crate::common::RW,
7320        >::from_register(self, 0)
7321    }
7322
7323    #[doc = "IRQ9-DS Pin Enable"]
7324    #[inline(always)]
7325    pub fn dirq9e(
7326        self,
7327    ) -> crate::common::RegisterField<
7328        1,
7329        0x1,
7330        1,
7331        0,
7332        dpsier1::Dirq9E,
7333        dpsier1::Dirq9E,
7334        Dpsier1_SPEC,
7335        crate::common::RW,
7336    > {
7337        crate::common::RegisterField::<
7338            1,
7339            0x1,
7340            1,
7341            0,
7342            dpsier1::Dirq9E,
7343            dpsier1::Dirq9E,
7344            Dpsier1_SPEC,
7345            crate::common::RW,
7346        >::from_register(self, 0)
7347    }
7348
7349    #[doc = "IRQ10-DS Pin Enable"]
7350    #[inline(always)]
7351    pub fn dirq10e(
7352        self,
7353    ) -> crate::common::RegisterField<
7354        2,
7355        0x1,
7356        1,
7357        0,
7358        dpsier1::Dirq10E,
7359        dpsier1::Dirq10E,
7360        Dpsier1_SPEC,
7361        crate::common::RW,
7362    > {
7363        crate::common::RegisterField::<
7364            2,
7365            0x1,
7366            1,
7367            0,
7368            dpsier1::Dirq10E,
7369            dpsier1::Dirq10E,
7370            Dpsier1_SPEC,
7371            crate::common::RW,
7372        >::from_register(self, 0)
7373    }
7374
7375    #[doc = "IRQ11-DS Pin Enable"]
7376    #[inline(always)]
7377    pub fn dirq11e(
7378        self,
7379    ) -> crate::common::RegisterField<
7380        3,
7381        0x1,
7382        1,
7383        0,
7384        dpsier1::Dirq11E,
7385        dpsier1::Dirq11E,
7386        Dpsier1_SPEC,
7387        crate::common::RW,
7388    > {
7389        crate::common::RegisterField::<
7390            3,
7391            0x1,
7392            1,
7393            0,
7394            dpsier1::Dirq11E,
7395            dpsier1::Dirq11E,
7396            Dpsier1_SPEC,
7397            crate::common::RW,
7398        >::from_register(self, 0)
7399    }
7400
7401    #[doc = "IRQ12-DS Pin Enable"]
7402    #[inline(always)]
7403    pub fn dirq12e(
7404        self,
7405    ) -> crate::common::RegisterField<
7406        4,
7407        0x1,
7408        1,
7409        0,
7410        dpsier1::Dirq12E,
7411        dpsier1::Dirq12E,
7412        Dpsier1_SPEC,
7413        crate::common::RW,
7414    > {
7415        crate::common::RegisterField::<
7416            4,
7417            0x1,
7418            1,
7419            0,
7420            dpsier1::Dirq12E,
7421            dpsier1::Dirq12E,
7422            Dpsier1_SPEC,
7423            crate::common::RW,
7424        >::from_register(self, 0)
7425    }
7426
7427    #[doc = "IRQ14-DS Pin Enable"]
7428    #[inline(always)]
7429    pub fn dirq14e(
7430        self,
7431    ) -> crate::common::RegisterField<
7432        6,
7433        0x1,
7434        1,
7435        0,
7436        dpsier1::Dirq14E,
7437        dpsier1::Dirq14E,
7438        Dpsier1_SPEC,
7439        crate::common::RW,
7440    > {
7441        crate::common::RegisterField::<
7442            6,
7443            0x1,
7444            1,
7445            0,
7446            dpsier1::Dirq14E,
7447            dpsier1::Dirq14E,
7448            Dpsier1_SPEC,
7449            crate::common::RW,
7450        >::from_register(self, 0)
7451    }
7452}
7453impl ::core::default::Default for Dpsier1 {
7454    #[inline(always)]
7455    fn default() -> Dpsier1 {
7456        <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
7457    }
7458}
7459pub mod dpsier1 {
7460
7461    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7462    pub struct Dirq8E_SPEC;
7463    pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
7464    impl Dirq8E {
7465        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7466        pub const _0: Self = Self::new(0);
7467
7468        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7469        pub const _1: Self = Self::new(1);
7470    }
7471    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7472    pub struct Dirq9E_SPEC;
7473    pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
7474    impl Dirq9E {
7475        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7476        pub const _0: Self = Self::new(0);
7477
7478        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7479        pub const _1: Self = Self::new(1);
7480    }
7481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7482    pub struct Dirq10E_SPEC;
7483    pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
7484    impl Dirq10E {
7485        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7486        pub const _0: Self = Self::new(0);
7487
7488        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7489        pub const _1: Self = Self::new(1);
7490    }
7491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7492    pub struct Dirq11E_SPEC;
7493    pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
7494    impl Dirq11E {
7495        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7496        pub const _0: Self = Self::new(0);
7497
7498        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7499        pub const _1: Self = Self::new(1);
7500    }
7501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7502    pub struct Dirq12E_SPEC;
7503    pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
7504    impl Dirq12E {
7505        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7506        pub const _0: Self = Self::new(0);
7507
7508        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7509        pub const _1: Self = Self::new(1);
7510    }
7511    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7512    pub struct Dirq14E_SPEC;
7513    pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
7514    impl Dirq14E {
7515        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7516        pub const _0: Self = Self::new(0);
7517
7518        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7519        pub const _1: Self = Self::new(1);
7520    }
7521}
7522#[doc(hidden)]
7523#[derive(Copy, Clone, Eq, PartialEq)]
7524pub struct Dpsier2_SPEC;
7525impl crate::sealed::RegSpec for Dpsier2_SPEC {
7526    type DataType = u8;
7527}
7528
7529#[doc = "Deep Software Standby Interrupt Enable Register 2"]
7530pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
7531
7532impl Dpsier2 {
7533    #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
7534    #[inline(always)]
7535    pub fn dlvd1ie(
7536        self,
7537    ) -> crate::common::RegisterField<
7538        0,
7539        0x1,
7540        1,
7541        0,
7542        dpsier2::Dlvd1Ie,
7543        dpsier2::Dlvd1Ie,
7544        Dpsier2_SPEC,
7545        crate::common::RW,
7546    > {
7547        crate::common::RegisterField::<
7548            0,
7549            0x1,
7550            1,
7551            0,
7552            dpsier2::Dlvd1Ie,
7553            dpsier2::Dlvd1Ie,
7554            Dpsier2_SPEC,
7555            crate::common::RW,
7556        >::from_register(self, 0)
7557    }
7558
7559    #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
7560    #[inline(always)]
7561    pub fn dlvd2ie(
7562        self,
7563    ) -> crate::common::RegisterField<
7564        1,
7565        0x1,
7566        1,
7567        0,
7568        dpsier2::Dlvd2Ie,
7569        dpsier2::Dlvd2Ie,
7570        Dpsier2_SPEC,
7571        crate::common::RW,
7572    > {
7573        crate::common::RegisterField::<
7574            1,
7575            0x1,
7576            1,
7577            0,
7578            dpsier2::Dlvd2Ie,
7579            dpsier2::Dlvd2Ie,
7580            Dpsier2_SPEC,
7581            crate::common::RW,
7582        >::from_register(self, 0)
7583    }
7584
7585    #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
7586    #[inline(always)]
7587    pub fn drtciie(
7588        self,
7589    ) -> crate::common::RegisterField<
7590        2,
7591        0x1,
7592        1,
7593        0,
7594        dpsier2::Drtciie,
7595        dpsier2::Drtciie,
7596        Dpsier2_SPEC,
7597        crate::common::RW,
7598    > {
7599        crate::common::RegisterField::<
7600            2,
7601            0x1,
7602            1,
7603            0,
7604            dpsier2::Drtciie,
7605            dpsier2::Drtciie,
7606            Dpsier2_SPEC,
7607            crate::common::RW,
7608        >::from_register(self, 0)
7609    }
7610
7611    #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
7612    #[inline(always)]
7613    pub fn drtcaie(
7614        self,
7615    ) -> crate::common::RegisterField<
7616        3,
7617        0x1,
7618        1,
7619        0,
7620        dpsier2::Drtcaie,
7621        dpsier2::Drtcaie,
7622        Dpsier2_SPEC,
7623        crate::common::RW,
7624    > {
7625        crate::common::RegisterField::<
7626            3,
7627            0x1,
7628            1,
7629            0,
7630            dpsier2::Drtcaie,
7631            dpsier2::Drtcaie,
7632            Dpsier2_SPEC,
7633            crate::common::RW,
7634        >::from_register(self, 0)
7635    }
7636
7637    #[doc = "NMI Pin Enable"]
7638    #[inline(always)]
7639    pub fn dnmie(
7640        self,
7641    ) -> crate::common::RegisterField<
7642        4,
7643        0x1,
7644        1,
7645        0,
7646        dpsier2::Dnmie,
7647        dpsier2::Dnmie,
7648        Dpsier2_SPEC,
7649        crate::common::RW,
7650    > {
7651        crate::common::RegisterField::<
7652            4,
7653            0x1,
7654            1,
7655            0,
7656            dpsier2::Dnmie,
7657            dpsier2::Dnmie,
7658            Dpsier2_SPEC,
7659            crate::common::RW,
7660        >::from_register(self, 0)
7661    }
7662}
7663impl ::core::default::Default for Dpsier2 {
7664    #[inline(always)]
7665    fn default() -> Dpsier2 {
7666        <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
7667    }
7668}
7669pub mod dpsier2 {
7670
7671    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7672    pub struct Dlvd1Ie_SPEC;
7673    pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
7674    impl Dlvd1Ie {
7675        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7676        pub const _0: Self = Self::new(0);
7677
7678        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7679        pub const _1: Self = Self::new(1);
7680    }
7681    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7682    pub struct Dlvd2Ie_SPEC;
7683    pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
7684    impl Dlvd2Ie {
7685        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7686        pub const _0: Self = Self::new(0);
7687
7688        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7689        pub const _1: Self = Self::new(1);
7690    }
7691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7692    pub struct Drtciie_SPEC;
7693    pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
7694    impl Drtciie {
7695        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7696        pub const _0: Self = Self::new(0);
7697
7698        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7699        pub const _1: Self = Self::new(1);
7700    }
7701    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7702    pub struct Drtcaie_SPEC;
7703    pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
7704    impl Drtcaie {
7705        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7706        pub const _0: Self = Self::new(0);
7707
7708        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7709        pub const _1: Self = Self::new(1);
7710    }
7711    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7712    pub struct Dnmie_SPEC;
7713    pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
7714    impl Dnmie {
7715        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7716        pub const _0: Self = Self::new(0);
7717
7718        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7719        pub const _1: Self = Self::new(1);
7720    }
7721}
7722#[doc(hidden)]
7723#[derive(Copy, Clone, Eq, PartialEq)]
7724pub struct Dpsier3_SPEC;
7725impl crate::sealed::RegSpec for Dpsier3_SPEC {
7726    type DataType = u8;
7727}
7728
7729#[doc = "Deep Standby Interrupt Enable Register 3"]
7730pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
7731
7732impl Dpsier3 {
7733    #[doc = "USBFS0 Suspend/Resume Deep Standby Cancel Signal Enable"]
7734    #[inline(always)]
7735    pub fn dusbfs0ie(
7736        self,
7737    ) -> crate::common::RegisterField<
7738        0,
7739        0x1,
7740        1,
7741        0,
7742        dpsier3::Dusbfs0Ie,
7743        dpsier3::Dusbfs0Ie,
7744        Dpsier3_SPEC,
7745        crate::common::RW,
7746    > {
7747        crate::common::RegisterField::<
7748            0,
7749            0x1,
7750            1,
7751            0,
7752            dpsier3::Dusbfs0Ie,
7753            dpsier3::Dusbfs0Ie,
7754            Dpsier3_SPEC,
7755            crate::common::RW,
7756        >::from_register(self, 0)
7757    }
7758
7759    #[doc = "AGT1 Underflow Deep Standby Cancel Signal Enable"]
7760    #[inline(always)]
7761    pub fn dagt1ie(
7762        self,
7763    ) -> crate::common::RegisterField<
7764        2,
7765        0x1,
7766        1,
7767        0,
7768        dpsier3::Dagt1Ie,
7769        dpsier3::Dagt1Ie,
7770        Dpsier3_SPEC,
7771        crate::common::RW,
7772    > {
7773        crate::common::RegisterField::<
7774            2,
7775            0x1,
7776            1,
7777            0,
7778            dpsier3::Dagt1Ie,
7779            dpsier3::Dagt1Ie,
7780            Dpsier3_SPEC,
7781            crate::common::RW,
7782        >::from_register(self, 0)
7783    }
7784}
7785impl ::core::default::Default for Dpsier3 {
7786    #[inline(always)]
7787    fn default() -> Dpsier3 {
7788        <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
7789    }
7790}
7791pub mod dpsier3 {
7792
7793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7794    pub struct Dusbfs0Ie_SPEC;
7795    pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
7796    impl Dusbfs0Ie {
7797        #[doc = "Cancelling deep standby mode is disabled"]
7798        pub const _0: Self = Self::new(0);
7799
7800        #[doc = "Cancelling deep standby mode is enabled"]
7801        pub const _1: Self = Self::new(1);
7802    }
7803    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7804    pub struct Dagt1Ie_SPEC;
7805    pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
7806    impl Dagt1Ie {
7807        #[doc = "Cancelling deep standby mode is disabled"]
7808        pub const _0: Self = Self::new(0);
7809
7810        #[doc = "Cancelling deep standby mode is enabled"]
7811        pub const _1: Self = Self::new(1);
7812    }
7813}
7814#[doc(hidden)]
7815#[derive(Copy, Clone, Eq, PartialEq)]
7816pub struct Dpsifr0_SPEC;
7817impl crate::sealed::RegSpec for Dpsifr0_SPEC {
7818    type DataType = u8;
7819}
7820
7821#[doc = "Deep Standby Interrupt Flag Register 0"]
7822pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
7823
7824impl Dpsifr0 {
7825    #[doc = "IRQ0-DS Pin Deep Standby Cancel Flag"]
7826    #[inline(always)]
7827    pub fn dirq0f(
7828        self,
7829    ) -> crate::common::RegisterField<
7830        0,
7831        0x1,
7832        1,
7833        0,
7834        dpsifr0::Dirq0F,
7835        dpsifr0::Dirq0F,
7836        Dpsifr0_SPEC,
7837        crate::common::RW,
7838    > {
7839        crate::common::RegisterField::<
7840            0,
7841            0x1,
7842            1,
7843            0,
7844            dpsifr0::Dirq0F,
7845            dpsifr0::Dirq0F,
7846            Dpsifr0_SPEC,
7847            crate::common::RW,
7848        >::from_register(self, 0)
7849    }
7850
7851    #[doc = "IRQ1-DS Pin Deep Standby Cancel Flag"]
7852    #[inline(always)]
7853    pub fn dirq1f(
7854        self,
7855    ) -> crate::common::RegisterField<
7856        1,
7857        0x1,
7858        1,
7859        0,
7860        dpsifr0::Dirq1F,
7861        dpsifr0::Dirq1F,
7862        Dpsifr0_SPEC,
7863        crate::common::RW,
7864    > {
7865        crate::common::RegisterField::<
7866            1,
7867            0x1,
7868            1,
7869            0,
7870            dpsifr0::Dirq1F,
7871            dpsifr0::Dirq1F,
7872            Dpsifr0_SPEC,
7873            crate::common::RW,
7874        >::from_register(self, 0)
7875    }
7876
7877    #[doc = "IRQ4-DS Pin Deep Standby Cancel Flag"]
7878    #[inline(always)]
7879    pub fn dirq4f(
7880        self,
7881    ) -> crate::common::RegisterField<
7882        4,
7883        0x1,
7884        1,
7885        0,
7886        dpsifr0::Dirq4F,
7887        dpsifr0::Dirq4F,
7888        Dpsifr0_SPEC,
7889        crate::common::RW,
7890    > {
7891        crate::common::RegisterField::<
7892            4,
7893            0x1,
7894            1,
7895            0,
7896            dpsifr0::Dirq4F,
7897            dpsifr0::Dirq4F,
7898            Dpsifr0_SPEC,
7899            crate::common::RW,
7900        >::from_register(self, 0)
7901    }
7902
7903    #[doc = "IRQ5-DS Pin Deep Standby Cancel Flag"]
7904    #[inline(always)]
7905    pub fn dirq5f(
7906        self,
7907    ) -> crate::common::RegisterField<
7908        5,
7909        0x1,
7910        1,
7911        0,
7912        dpsifr0::Dirq5F,
7913        dpsifr0::Dirq5F,
7914        Dpsifr0_SPEC,
7915        crate::common::RW,
7916    > {
7917        crate::common::RegisterField::<
7918            5,
7919            0x1,
7920            1,
7921            0,
7922            dpsifr0::Dirq5F,
7923            dpsifr0::Dirq5F,
7924            Dpsifr0_SPEC,
7925            crate::common::RW,
7926        >::from_register(self, 0)
7927    }
7928
7929    #[doc = "IRQ6-DS Pin Deep Standby Cancel Flag"]
7930    #[inline(always)]
7931    pub fn dirq6f(
7932        self,
7933    ) -> crate::common::RegisterField<
7934        6,
7935        0x1,
7936        1,
7937        0,
7938        dpsifr0::Dirq6F,
7939        dpsifr0::Dirq6F,
7940        Dpsifr0_SPEC,
7941        crate::common::RW,
7942    > {
7943        crate::common::RegisterField::<
7944            6,
7945            0x1,
7946            1,
7947            0,
7948            dpsifr0::Dirq6F,
7949            dpsifr0::Dirq6F,
7950            Dpsifr0_SPEC,
7951            crate::common::RW,
7952        >::from_register(self, 0)
7953    }
7954
7955    #[doc = "IRQ7-DS Pin Deep Standby Cancel Flag"]
7956    #[inline(always)]
7957    pub fn dirq7f(
7958        self,
7959    ) -> crate::common::RegisterField<
7960        7,
7961        0x1,
7962        1,
7963        0,
7964        dpsifr0::Dirq7F,
7965        dpsifr0::Dirq7F,
7966        Dpsifr0_SPEC,
7967        crate::common::RW,
7968    > {
7969        crate::common::RegisterField::<
7970            7,
7971            0x1,
7972            1,
7973            0,
7974            dpsifr0::Dirq7F,
7975            dpsifr0::Dirq7F,
7976            Dpsifr0_SPEC,
7977            crate::common::RW,
7978        >::from_register(self, 0)
7979    }
7980}
7981impl ::core::default::Default for Dpsifr0 {
7982    #[inline(always)]
7983    fn default() -> Dpsifr0 {
7984        <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
7985    }
7986}
7987pub mod dpsifr0 {
7988
7989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7990    pub struct Dirq0F_SPEC;
7991    pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
7992    impl Dirq0F {
7993        #[doc = "The cancel request is not generated"]
7994        pub const _0: Self = Self::new(0);
7995
7996        #[doc = "The cancel request is generated"]
7997        pub const _1: Self = Self::new(1);
7998    }
7999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8000    pub struct Dirq1F_SPEC;
8001    pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
8002    impl Dirq1F {
8003        #[doc = "The cancel request is not generated"]
8004        pub const _0: Self = Self::new(0);
8005
8006        #[doc = "The cancel request is generated"]
8007        pub const _1: Self = Self::new(1);
8008    }
8009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8010    pub struct Dirq4F_SPEC;
8011    pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
8012    impl Dirq4F {
8013        #[doc = "The cancel request is not generated"]
8014        pub const _0: Self = Self::new(0);
8015
8016        #[doc = "The cancel request is generated"]
8017        pub const _1: Self = Self::new(1);
8018    }
8019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8020    pub struct Dirq5F_SPEC;
8021    pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
8022    impl Dirq5F {
8023        #[doc = "The cancel request is not generated"]
8024        pub const _0: Self = Self::new(0);
8025
8026        #[doc = "The cancel request is generated"]
8027        pub const _1: Self = Self::new(1);
8028    }
8029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8030    pub struct Dirq6F_SPEC;
8031    pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
8032    impl Dirq6F {
8033        #[doc = "The cancel request is not generated"]
8034        pub const _0: Self = Self::new(0);
8035
8036        #[doc = "The cancel request is generated"]
8037        pub const _1: Self = Self::new(1);
8038    }
8039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8040    pub struct Dirq7F_SPEC;
8041    pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
8042    impl Dirq7F {
8043        #[doc = "The cancel request is not generated"]
8044        pub const _0: Self = Self::new(0);
8045
8046        #[doc = "The cancel request is generated"]
8047        pub const _1: Self = Self::new(1);
8048    }
8049}
8050#[doc(hidden)]
8051#[derive(Copy, Clone, Eq, PartialEq)]
8052pub struct Dpsifr1_SPEC;
8053impl crate::sealed::RegSpec for Dpsifr1_SPEC {
8054    type DataType = u8;
8055}
8056
8057#[doc = "Deep Standby Interrupt Flag Register 1"]
8058pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
8059
8060impl Dpsifr1 {
8061    #[doc = "IRQ8-DS Pin Deep Standby Cancel Flag"]
8062    #[inline(always)]
8063    pub fn dirq8f(
8064        self,
8065    ) -> crate::common::RegisterField<
8066        0,
8067        0x1,
8068        1,
8069        0,
8070        dpsifr1::Dirq8F,
8071        dpsifr1::Dirq8F,
8072        Dpsifr1_SPEC,
8073        crate::common::RW,
8074    > {
8075        crate::common::RegisterField::<
8076            0,
8077            0x1,
8078            1,
8079            0,
8080            dpsifr1::Dirq8F,
8081            dpsifr1::Dirq8F,
8082            Dpsifr1_SPEC,
8083            crate::common::RW,
8084        >::from_register(self, 0)
8085    }
8086
8087    #[doc = "IRQ9-DS Pin Deep Standby Cancel Flag"]
8088    #[inline(always)]
8089    pub fn dirq9f(
8090        self,
8091    ) -> crate::common::RegisterField<
8092        1,
8093        0x1,
8094        1,
8095        0,
8096        dpsifr1::Dirq9F,
8097        dpsifr1::Dirq9F,
8098        Dpsifr1_SPEC,
8099        crate::common::RW,
8100    > {
8101        crate::common::RegisterField::<
8102            1,
8103            0x1,
8104            1,
8105            0,
8106            dpsifr1::Dirq9F,
8107            dpsifr1::Dirq9F,
8108            Dpsifr1_SPEC,
8109            crate::common::RW,
8110        >::from_register(self, 0)
8111    }
8112
8113    #[doc = "IRQ10-DS Pin Deep Standby Cancel Flag"]
8114    #[inline(always)]
8115    pub fn dirq10f(
8116        self,
8117    ) -> crate::common::RegisterField<
8118        2,
8119        0x1,
8120        1,
8121        0,
8122        dpsifr1::Dirq10F,
8123        dpsifr1::Dirq10F,
8124        Dpsifr1_SPEC,
8125        crate::common::RW,
8126    > {
8127        crate::common::RegisterField::<
8128            2,
8129            0x1,
8130            1,
8131            0,
8132            dpsifr1::Dirq10F,
8133            dpsifr1::Dirq10F,
8134            Dpsifr1_SPEC,
8135            crate::common::RW,
8136        >::from_register(self, 0)
8137    }
8138
8139    #[doc = "IRQ11-DS Pin Deep Standby Cancel Flag"]
8140    #[inline(always)]
8141    pub fn dirq11f(
8142        self,
8143    ) -> crate::common::RegisterField<
8144        3,
8145        0x1,
8146        1,
8147        0,
8148        dpsifr1::Dirq11F,
8149        dpsifr1::Dirq11F,
8150        Dpsifr1_SPEC,
8151        crate::common::RW,
8152    > {
8153        crate::common::RegisterField::<
8154            3,
8155            0x1,
8156            1,
8157            0,
8158            dpsifr1::Dirq11F,
8159            dpsifr1::Dirq11F,
8160            Dpsifr1_SPEC,
8161            crate::common::RW,
8162        >::from_register(self, 0)
8163    }
8164
8165    #[doc = "IRQ12-DS Pin Deep Standby Cancel Flag"]
8166    #[inline(always)]
8167    pub fn dirq12f(
8168        self,
8169    ) -> crate::common::RegisterField<
8170        4,
8171        0x1,
8172        1,
8173        0,
8174        dpsifr1::Dirq12F,
8175        dpsifr1::Dirq12F,
8176        Dpsifr1_SPEC,
8177        crate::common::RW,
8178    > {
8179        crate::common::RegisterField::<
8180            4,
8181            0x1,
8182            1,
8183            0,
8184            dpsifr1::Dirq12F,
8185            dpsifr1::Dirq12F,
8186            Dpsifr1_SPEC,
8187            crate::common::RW,
8188        >::from_register(self, 0)
8189    }
8190
8191    #[doc = "IRQ14-DS Pin Deep Standby Cancel Flag"]
8192    #[inline(always)]
8193    pub fn dirq14f(
8194        self,
8195    ) -> crate::common::RegisterField<
8196        6,
8197        0x1,
8198        1,
8199        0,
8200        dpsifr1::Dirq14F,
8201        dpsifr1::Dirq14F,
8202        Dpsifr1_SPEC,
8203        crate::common::RW,
8204    > {
8205        crate::common::RegisterField::<
8206            6,
8207            0x1,
8208            1,
8209            0,
8210            dpsifr1::Dirq14F,
8211            dpsifr1::Dirq14F,
8212            Dpsifr1_SPEC,
8213            crate::common::RW,
8214        >::from_register(self, 0)
8215    }
8216}
8217impl ::core::default::Default for Dpsifr1 {
8218    #[inline(always)]
8219    fn default() -> Dpsifr1 {
8220        <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
8221    }
8222}
8223pub mod dpsifr1 {
8224
8225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8226    pub struct Dirq8F_SPEC;
8227    pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
8228    impl Dirq8F {
8229        #[doc = "The cancel request is not generated"]
8230        pub const _0: Self = Self::new(0);
8231
8232        #[doc = "The cancel request is generated"]
8233        pub const _1: Self = Self::new(1);
8234    }
8235    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8236    pub struct Dirq9F_SPEC;
8237    pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
8238    impl Dirq9F {
8239        #[doc = "The cancel request is not generated"]
8240        pub const _0: Self = Self::new(0);
8241
8242        #[doc = "The cancel request is generated"]
8243        pub const _1: Self = Self::new(1);
8244    }
8245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8246    pub struct Dirq10F_SPEC;
8247    pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
8248    impl Dirq10F {
8249        #[doc = "The cancel request is not generated"]
8250        pub const _0: Self = Self::new(0);
8251
8252        #[doc = "The cancel request is generated"]
8253        pub const _1: Self = Self::new(1);
8254    }
8255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8256    pub struct Dirq11F_SPEC;
8257    pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
8258    impl Dirq11F {
8259        #[doc = "The cancel request is not generated"]
8260        pub const _0: Self = Self::new(0);
8261
8262        #[doc = "The cancel request is generated"]
8263        pub const _1: Self = Self::new(1);
8264    }
8265    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8266    pub struct Dirq12F_SPEC;
8267    pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
8268    impl Dirq12F {
8269        #[doc = "The cancel request is not generated"]
8270        pub const _0: Self = Self::new(0);
8271
8272        #[doc = "The cancel request is generated"]
8273        pub const _1: Self = Self::new(1);
8274    }
8275    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8276    pub struct Dirq14F_SPEC;
8277    pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
8278    impl Dirq14F {
8279        #[doc = "The cancel request is not generated"]
8280        pub const _0: Self = Self::new(0);
8281
8282        #[doc = "The cancel request is generated"]
8283        pub const _1: Self = Self::new(1);
8284    }
8285}
8286#[doc(hidden)]
8287#[derive(Copy, Clone, Eq, PartialEq)]
8288pub struct Dpsifr2_SPEC;
8289impl crate::sealed::RegSpec for Dpsifr2_SPEC {
8290    type DataType = u8;
8291}
8292
8293#[doc = "Deep Software Standby Interrupt Flag Register 2"]
8294pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
8295
8296impl Dpsifr2 {
8297    #[doc = "LVD1 Deep Software Standby Cancel Flag"]
8298    #[inline(always)]
8299    pub fn dlvd1if(
8300        self,
8301    ) -> crate::common::RegisterField<
8302        0,
8303        0x1,
8304        1,
8305        0,
8306        dpsifr2::Dlvd1If,
8307        dpsifr2::Dlvd1If,
8308        Dpsifr2_SPEC,
8309        crate::common::RW,
8310    > {
8311        crate::common::RegisterField::<
8312            0,
8313            0x1,
8314            1,
8315            0,
8316            dpsifr2::Dlvd1If,
8317            dpsifr2::Dlvd1If,
8318            Dpsifr2_SPEC,
8319            crate::common::RW,
8320        >::from_register(self, 0)
8321    }
8322
8323    #[doc = "LVD2 Deep Software Standby Cancel Flag"]
8324    #[inline(always)]
8325    pub fn dlvd2if(
8326        self,
8327    ) -> crate::common::RegisterField<
8328        1,
8329        0x1,
8330        1,
8331        0,
8332        dpsifr2::Dlvd2If,
8333        dpsifr2::Dlvd2If,
8334        Dpsifr2_SPEC,
8335        crate::common::RW,
8336    > {
8337        crate::common::RegisterField::<
8338            1,
8339            0x1,
8340            1,
8341            0,
8342            dpsifr2::Dlvd2If,
8343            dpsifr2::Dlvd2If,
8344            Dpsifr2_SPEC,
8345            crate::common::RW,
8346        >::from_register(self, 0)
8347    }
8348
8349    #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
8350    #[inline(always)]
8351    pub fn drtciif(
8352        self,
8353    ) -> crate::common::RegisterField<
8354        2,
8355        0x1,
8356        1,
8357        0,
8358        dpsifr2::Drtciif,
8359        dpsifr2::Drtciif,
8360        Dpsifr2_SPEC,
8361        crate::common::RW,
8362    > {
8363        crate::common::RegisterField::<
8364            2,
8365            0x1,
8366            1,
8367            0,
8368            dpsifr2::Drtciif,
8369            dpsifr2::Drtciif,
8370            Dpsifr2_SPEC,
8371            crate::common::RW,
8372        >::from_register(self, 0)
8373    }
8374
8375    #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
8376    #[inline(always)]
8377    pub fn drtcaif(
8378        self,
8379    ) -> crate::common::RegisterField<
8380        3,
8381        0x1,
8382        1,
8383        0,
8384        dpsifr2::Drtcaif,
8385        dpsifr2::Drtcaif,
8386        Dpsifr2_SPEC,
8387        crate::common::RW,
8388    > {
8389        crate::common::RegisterField::<
8390            3,
8391            0x1,
8392            1,
8393            0,
8394            dpsifr2::Drtcaif,
8395            dpsifr2::Drtcaif,
8396            Dpsifr2_SPEC,
8397            crate::common::RW,
8398        >::from_register(self, 0)
8399    }
8400
8401    #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
8402    #[inline(always)]
8403    pub fn dnmif(
8404        self,
8405    ) -> crate::common::RegisterField<
8406        4,
8407        0x1,
8408        1,
8409        0,
8410        dpsifr2::Dnmif,
8411        dpsifr2::Dnmif,
8412        Dpsifr2_SPEC,
8413        crate::common::RW,
8414    > {
8415        crate::common::RegisterField::<
8416            4,
8417            0x1,
8418            1,
8419            0,
8420            dpsifr2::Dnmif,
8421            dpsifr2::Dnmif,
8422            Dpsifr2_SPEC,
8423            crate::common::RW,
8424        >::from_register(self, 0)
8425    }
8426}
8427impl ::core::default::Default for Dpsifr2 {
8428    #[inline(always)]
8429    fn default() -> Dpsifr2 {
8430        <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
8431    }
8432}
8433pub mod dpsifr2 {
8434
8435    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8436    pub struct Dlvd1If_SPEC;
8437    pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
8438    impl Dlvd1If {
8439        #[doc = "The cancel request is not generated"]
8440        pub const _0: Self = Self::new(0);
8441
8442        #[doc = "The cancel request is generated"]
8443        pub const _1: Self = Self::new(1);
8444    }
8445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8446    pub struct Dlvd2If_SPEC;
8447    pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
8448    impl Dlvd2If {
8449        #[doc = "The cancel request is not generated"]
8450        pub const _0: Self = Self::new(0);
8451
8452        #[doc = "The cancel request is generated"]
8453        pub const _1: Self = Self::new(1);
8454    }
8455    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8456    pub struct Drtciif_SPEC;
8457    pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
8458    impl Drtciif {
8459        #[doc = "The cancel request is not generated"]
8460        pub const _0: Self = Self::new(0);
8461
8462        #[doc = "The cancel request is generated"]
8463        pub const _1: Self = Self::new(1);
8464    }
8465    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8466    pub struct Drtcaif_SPEC;
8467    pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
8468    impl Drtcaif {
8469        #[doc = "The cancel request is not generated"]
8470        pub const _0: Self = Self::new(0);
8471
8472        #[doc = "The cancel request is generated"]
8473        pub const _1: Self = Self::new(1);
8474    }
8475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8476    pub struct Dnmif_SPEC;
8477    pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
8478    impl Dnmif {
8479        #[doc = "The cancel request is not generated"]
8480        pub const _0: Self = Self::new(0);
8481
8482        #[doc = "The cancel request is generated"]
8483        pub const _1: Self = Self::new(1);
8484    }
8485}
8486#[doc(hidden)]
8487#[derive(Copy, Clone, Eq, PartialEq)]
8488pub struct Dpsifr3_SPEC;
8489impl crate::sealed::RegSpec for Dpsifr3_SPEC {
8490    type DataType = u8;
8491}
8492
8493#[doc = "Deep Standby Interrupt Flag Register 3"]
8494pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
8495
8496impl Dpsifr3 {
8497    #[doc = "USBFS0 Suspend/Resume Deep Standby Cancel Flag"]
8498    #[inline(always)]
8499    pub fn dusbfs0if(
8500        self,
8501    ) -> crate::common::RegisterField<
8502        0,
8503        0x1,
8504        1,
8505        0,
8506        dpsifr3::Dusbfs0If,
8507        dpsifr3::Dusbfs0If,
8508        Dpsifr3_SPEC,
8509        crate::common::RW,
8510    > {
8511        crate::common::RegisterField::<
8512            0,
8513            0x1,
8514            1,
8515            0,
8516            dpsifr3::Dusbfs0If,
8517            dpsifr3::Dusbfs0If,
8518            Dpsifr3_SPEC,
8519            crate::common::RW,
8520        >::from_register(self, 0)
8521    }
8522
8523    #[doc = "AGT1 Underflow Deep Standby Cancel Flag"]
8524    #[inline(always)]
8525    pub fn dagt1if(
8526        self,
8527    ) -> crate::common::RegisterField<
8528        2,
8529        0x1,
8530        1,
8531        0,
8532        dpsifr3::Dagt1If,
8533        dpsifr3::Dagt1If,
8534        Dpsifr3_SPEC,
8535        crate::common::RW,
8536    > {
8537        crate::common::RegisterField::<
8538            2,
8539            0x1,
8540            1,
8541            0,
8542            dpsifr3::Dagt1If,
8543            dpsifr3::Dagt1If,
8544            Dpsifr3_SPEC,
8545            crate::common::RW,
8546        >::from_register(self, 0)
8547    }
8548}
8549impl ::core::default::Default for Dpsifr3 {
8550    #[inline(always)]
8551    fn default() -> Dpsifr3 {
8552        <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
8553    }
8554}
8555pub mod dpsifr3 {
8556
8557    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8558    pub struct Dusbfs0If_SPEC;
8559    pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
8560    impl Dusbfs0If {
8561        #[doc = "The cancel request is not generated."]
8562        pub const _0: Self = Self::new(0);
8563
8564        #[doc = "The cancel request is generated."]
8565        pub const _1: Self = Self::new(1);
8566    }
8567    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8568    pub struct Dagt1If_SPEC;
8569    pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
8570    impl Dagt1If {
8571        #[doc = "The cancel request is not generated."]
8572        pub const _0: Self = Self::new(0);
8573
8574        #[doc = "The cancel request is generated."]
8575        pub const _1: Self = Self::new(1);
8576    }
8577}
8578#[doc(hidden)]
8579#[derive(Copy, Clone, Eq, PartialEq)]
8580pub struct Dpsiegr0_SPEC;
8581impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
8582    type DataType = u8;
8583}
8584
8585#[doc = "Deep Standby Interrupt Edge Register 0"]
8586pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
8587
8588impl Dpsiegr0 {
8589    #[doc = "IRQ0-DS Pin Edge Select"]
8590    #[inline(always)]
8591    pub fn dirq0eg(
8592        self,
8593    ) -> crate::common::RegisterField<
8594        0,
8595        0x1,
8596        1,
8597        0,
8598        dpsiegr0::Dirq0Eg,
8599        dpsiegr0::Dirq0Eg,
8600        Dpsiegr0_SPEC,
8601        crate::common::RW,
8602    > {
8603        crate::common::RegisterField::<
8604            0,
8605            0x1,
8606            1,
8607            0,
8608            dpsiegr0::Dirq0Eg,
8609            dpsiegr0::Dirq0Eg,
8610            Dpsiegr0_SPEC,
8611            crate::common::RW,
8612        >::from_register(self, 0)
8613    }
8614
8615    #[doc = "IRQ1-DS Pin Edge Select"]
8616    #[inline(always)]
8617    pub fn dirq1eg(
8618        self,
8619    ) -> crate::common::RegisterField<
8620        1,
8621        0x1,
8622        1,
8623        0,
8624        dpsiegr0::Dirq1Eg,
8625        dpsiegr0::Dirq1Eg,
8626        Dpsiegr0_SPEC,
8627        crate::common::RW,
8628    > {
8629        crate::common::RegisterField::<
8630            1,
8631            0x1,
8632            1,
8633            0,
8634            dpsiegr0::Dirq1Eg,
8635            dpsiegr0::Dirq1Eg,
8636            Dpsiegr0_SPEC,
8637            crate::common::RW,
8638        >::from_register(self, 0)
8639    }
8640
8641    #[doc = "IRQ4-DS Pin Edge Select"]
8642    #[inline(always)]
8643    pub fn dirq4eg(
8644        self,
8645    ) -> crate::common::RegisterField<
8646        4,
8647        0x1,
8648        1,
8649        0,
8650        dpsiegr0::Dirq4Eg,
8651        dpsiegr0::Dirq4Eg,
8652        Dpsiegr0_SPEC,
8653        crate::common::RW,
8654    > {
8655        crate::common::RegisterField::<
8656            4,
8657            0x1,
8658            1,
8659            0,
8660            dpsiegr0::Dirq4Eg,
8661            dpsiegr0::Dirq4Eg,
8662            Dpsiegr0_SPEC,
8663            crate::common::RW,
8664        >::from_register(self, 0)
8665    }
8666
8667    #[doc = "IRQ5-DS Pin Edge Select"]
8668    #[inline(always)]
8669    pub fn dirq5eg(
8670        self,
8671    ) -> crate::common::RegisterField<
8672        5,
8673        0x1,
8674        1,
8675        0,
8676        dpsiegr0::Dirq5Eg,
8677        dpsiegr0::Dirq5Eg,
8678        Dpsiegr0_SPEC,
8679        crate::common::RW,
8680    > {
8681        crate::common::RegisterField::<
8682            5,
8683            0x1,
8684            1,
8685            0,
8686            dpsiegr0::Dirq5Eg,
8687            dpsiegr0::Dirq5Eg,
8688            Dpsiegr0_SPEC,
8689            crate::common::RW,
8690        >::from_register(self, 0)
8691    }
8692
8693    #[doc = "IRQ6-DS Pin Edge Select"]
8694    #[inline(always)]
8695    pub fn dirq6eg(
8696        self,
8697    ) -> crate::common::RegisterField<
8698        6,
8699        0x1,
8700        1,
8701        0,
8702        dpsiegr0::Dirq6Eg,
8703        dpsiegr0::Dirq6Eg,
8704        Dpsiegr0_SPEC,
8705        crate::common::RW,
8706    > {
8707        crate::common::RegisterField::<
8708            6,
8709            0x1,
8710            1,
8711            0,
8712            dpsiegr0::Dirq6Eg,
8713            dpsiegr0::Dirq6Eg,
8714            Dpsiegr0_SPEC,
8715            crate::common::RW,
8716        >::from_register(self, 0)
8717    }
8718
8719    #[doc = "IRQ7-DS Pin Edge Select"]
8720    #[inline(always)]
8721    pub fn dirq7eg(
8722        self,
8723    ) -> crate::common::RegisterField<
8724        7,
8725        0x1,
8726        1,
8727        0,
8728        dpsiegr0::Dirq7Eg,
8729        dpsiegr0::Dirq7Eg,
8730        Dpsiegr0_SPEC,
8731        crate::common::RW,
8732    > {
8733        crate::common::RegisterField::<
8734            7,
8735            0x1,
8736            1,
8737            0,
8738            dpsiegr0::Dirq7Eg,
8739            dpsiegr0::Dirq7Eg,
8740            Dpsiegr0_SPEC,
8741            crate::common::RW,
8742        >::from_register(self, 0)
8743    }
8744}
8745impl ::core::default::Default for Dpsiegr0 {
8746    #[inline(always)]
8747    fn default() -> Dpsiegr0 {
8748        <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
8749    }
8750}
8751pub mod dpsiegr0 {
8752
8753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8754    pub struct Dirq0Eg_SPEC;
8755    pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
8756    impl Dirq0Eg {
8757        #[doc = "A cancel request is generated at a falling edge"]
8758        pub const _0: Self = Self::new(0);
8759
8760        #[doc = "A cancel request is generated at a rising edge"]
8761        pub const _1: Self = Self::new(1);
8762    }
8763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8764    pub struct Dirq1Eg_SPEC;
8765    pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
8766    impl Dirq1Eg {
8767        #[doc = "A cancel request is generated at a falling edge"]
8768        pub const _0: Self = Self::new(0);
8769
8770        #[doc = "A cancel request is generated at a rising edge"]
8771        pub const _1: Self = Self::new(1);
8772    }
8773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8774    pub struct Dirq4Eg_SPEC;
8775    pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
8776    impl Dirq4Eg {
8777        #[doc = "A cancel request is generated at a falling edge"]
8778        pub const _0: Self = Self::new(0);
8779
8780        #[doc = "A cancel request is generated at a rising edge"]
8781        pub const _1: Self = Self::new(1);
8782    }
8783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8784    pub struct Dirq5Eg_SPEC;
8785    pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
8786    impl Dirq5Eg {
8787        #[doc = "A cancel request is generated at a falling edge"]
8788        pub const _0: Self = Self::new(0);
8789
8790        #[doc = "A cancel request is generated at a rising edge"]
8791        pub const _1: Self = Self::new(1);
8792    }
8793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8794    pub struct Dirq6Eg_SPEC;
8795    pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
8796    impl Dirq6Eg {
8797        #[doc = "A cancel request is generated at a falling edge"]
8798        pub const _0: Self = Self::new(0);
8799
8800        #[doc = "A cancel request is generated at a rising edge"]
8801        pub const _1: Self = Self::new(1);
8802    }
8803    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8804    pub struct Dirq7Eg_SPEC;
8805    pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
8806    impl Dirq7Eg {
8807        #[doc = "A cancel request is generated at a falling edge"]
8808        pub const _0: Self = Self::new(0);
8809
8810        #[doc = "A cancel request is generated at a rising edge"]
8811        pub const _1: Self = Self::new(1);
8812    }
8813}
8814#[doc(hidden)]
8815#[derive(Copy, Clone, Eq, PartialEq)]
8816pub struct Dpsiegr1_SPEC;
8817impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
8818    type DataType = u8;
8819}
8820
8821#[doc = "Deep Standby Interrupt Edge Register 1"]
8822pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
8823
8824impl Dpsiegr1 {
8825    #[doc = "IRQ8-DS Pin Edge Select"]
8826    #[inline(always)]
8827    pub fn dirq8eg(
8828        self,
8829    ) -> crate::common::RegisterField<
8830        0,
8831        0x1,
8832        1,
8833        0,
8834        dpsiegr1::Dirq8Eg,
8835        dpsiegr1::Dirq8Eg,
8836        Dpsiegr1_SPEC,
8837        crate::common::RW,
8838    > {
8839        crate::common::RegisterField::<
8840            0,
8841            0x1,
8842            1,
8843            0,
8844            dpsiegr1::Dirq8Eg,
8845            dpsiegr1::Dirq8Eg,
8846            Dpsiegr1_SPEC,
8847            crate::common::RW,
8848        >::from_register(self, 0)
8849    }
8850
8851    #[doc = "IRQ9-DS Pin Edge Select"]
8852    #[inline(always)]
8853    pub fn dirq9eg(
8854        self,
8855    ) -> crate::common::RegisterField<
8856        1,
8857        0x1,
8858        1,
8859        0,
8860        dpsiegr1::Dirq9Eg,
8861        dpsiegr1::Dirq9Eg,
8862        Dpsiegr1_SPEC,
8863        crate::common::RW,
8864    > {
8865        crate::common::RegisterField::<
8866            1,
8867            0x1,
8868            1,
8869            0,
8870            dpsiegr1::Dirq9Eg,
8871            dpsiegr1::Dirq9Eg,
8872            Dpsiegr1_SPEC,
8873            crate::common::RW,
8874        >::from_register(self, 0)
8875    }
8876
8877    #[doc = "IRQ10-DS Pin Edge Select"]
8878    #[inline(always)]
8879    pub fn dirq10eg(
8880        self,
8881    ) -> crate::common::RegisterField<
8882        2,
8883        0x1,
8884        1,
8885        0,
8886        dpsiegr1::Dirq10Eg,
8887        dpsiegr1::Dirq10Eg,
8888        Dpsiegr1_SPEC,
8889        crate::common::RW,
8890    > {
8891        crate::common::RegisterField::<
8892            2,
8893            0x1,
8894            1,
8895            0,
8896            dpsiegr1::Dirq10Eg,
8897            dpsiegr1::Dirq10Eg,
8898            Dpsiegr1_SPEC,
8899            crate::common::RW,
8900        >::from_register(self, 0)
8901    }
8902
8903    #[doc = "IRQ11-DS Pin Edge Select"]
8904    #[inline(always)]
8905    pub fn dirq11eg(
8906        self,
8907    ) -> crate::common::RegisterField<
8908        3,
8909        0x1,
8910        1,
8911        0,
8912        dpsiegr1::Dirq11Eg,
8913        dpsiegr1::Dirq11Eg,
8914        Dpsiegr1_SPEC,
8915        crate::common::RW,
8916    > {
8917        crate::common::RegisterField::<
8918            3,
8919            0x1,
8920            1,
8921            0,
8922            dpsiegr1::Dirq11Eg,
8923            dpsiegr1::Dirq11Eg,
8924            Dpsiegr1_SPEC,
8925            crate::common::RW,
8926        >::from_register(self, 0)
8927    }
8928
8929    #[doc = "IRQ12-DS Pin Edge Select"]
8930    #[inline(always)]
8931    pub fn dirq12eg(
8932        self,
8933    ) -> crate::common::RegisterField<
8934        4,
8935        0x1,
8936        1,
8937        0,
8938        dpsiegr1::Dirq12Eg,
8939        dpsiegr1::Dirq12Eg,
8940        Dpsiegr1_SPEC,
8941        crate::common::RW,
8942    > {
8943        crate::common::RegisterField::<
8944            4,
8945            0x1,
8946            1,
8947            0,
8948            dpsiegr1::Dirq12Eg,
8949            dpsiegr1::Dirq12Eg,
8950            Dpsiegr1_SPEC,
8951            crate::common::RW,
8952        >::from_register(self, 0)
8953    }
8954
8955    #[doc = "IRQ14-DS Pin Edge Select"]
8956    #[inline(always)]
8957    pub fn dirq14eg(
8958        self,
8959    ) -> crate::common::RegisterField<
8960        6,
8961        0x1,
8962        1,
8963        0,
8964        dpsiegr1::Dirq14Eg,
8965        dpsiegr1::Dirq14Eg,
8966        Dpsiegr1_SPEC,
8967        crate::common::RW,
8968    > {
8969        crate::common::RegisterField::<
8970            6,
8971            0x1,
8972            1,
8973            0,
8974            dpsiegr1::Dirq14Eg,
8975            dpsiegr1::Dirq14Eg,
8976            Dpsiegr1_SPEC,
8977            crate::common::RW,
8978        >::from_register(self, 0)
8979    }
8980}
8981impl ::core::default::Default for Dpsiegr1 {
8982    #[inline(always)]
8983    fn default() -> Dpsiegr1 {
8984        <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
8985    }
8986}
8987pub mod dpsiegr1 {
8988
8989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8990    pub struct Dirq8Eg_SPEC;
8991    pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
8992    impl Dirq8Eg {
8993        #[doc = "A cancel request is generated at a falling edge."]
8994        pub const _0: Self = Self::new(0);
8995
8996        #[doc = "A cancel request is generated at a rising edge."]
8997        pub const _1: Self = Self::new(1);
8998    }
8999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9000    pub struct Dirq9Eg_SPEC;
9001    pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
9002    impl Dirq9Eg {
9003        #[doc = "A cancel request is generated at a falling edge."]
9004        pub const _0: Self = Self::new(0);
9005
9006        #[doc = "A cancel request is generated at a rising edge."]
9007        pub const _1: Self = Self::new(1);
9008    }
9009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9010    pub struct Dirq10Eg_SPEC;
9011    pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
9012    impl Dirq10Eg {
9013        #[doc = "A cancel request is generated at a falling edge."]
9014        pub const _0: Self = Self::new(0);
9015
9016        #[doc = "A cancel request is generated at a rising edge"]
9017        pub const _1: Self = Self::new(1);
9018    }
9019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9020    pub struct Dirq11Eg_SPEC;
9021    pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
9022    impl Dirq11Eg {
9023        #[doc = "A cancel request is generated at a falling edge."]
9024        pub const _0: Self = Self::new(0);
9025
9026        #[doc = "A cancel request is generated at a rising edge."]
9027        pub const _1: Self = Self::new(1);
9028    }
9029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9030    pub struct Dirq12Eg_SPEC;
9031    pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
9032    impl Dirq12Eg {
9033        #[doc = "A cancel request is generated at a falling edge."]
9034        pub const _0: Self = Self::new(0);
9035
9036        #[doc = "A cancel request is generated at a rising edge."]
9037        pub const _1: Self = Self::new(1);
9038    }
9039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9040    pub struct Dirq14Eg_SPEC;
9041    pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
9042    impl Dirq14Eg {
9043        #[doc = "A cancel request is generated at a falling edge."]
9044        pub const _0: Self = Self::new(0);
9045
9046        #[doc = "A cancel request is generated at a rising edge."]
9047        pub const _1: Self = Self::new(1);
9048    }
9049}
9050#[doc(hidden)]
9051#[derive(Copy, Clone, Eq, PartialEq)]
9052pub struct Dpsiegr2_SPEC;
9053impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
9054    type DataType = u8;
9055}
9056
9057#[doc = "Deep Software Standby Interrupt Edge Register 2"]
9058pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
9059
9060impl Dpsiegr2 {
9061    #[doc = "LVD1 Edge Select"]
9062    #[inline(always)]
9063    pub fn dlvd1eg(
9064        self,
9065    ) -> crate::common::RegisterField<
9066        0,
9067        0x1,
9068        1,
9069        0,
9070        dpsiegr2::Dlvd1Eg,
9071        dpsiegr2::Dlvd1Eg,
9072        Dpsiegr2_SPEC,
9073        crate::common::RW,
9074    > {
9075        crate::common::RegisterField::<
9076            0,
9077            0x1,
9078            1,
9079            0,
9080            dpsiegr2::Dlvd1Eg,
9081            dpsiegr2::Dlvd1Eg,
9082            Dpsiegr2_SPEC,
9083            crate::common::RW,
9084        >::from_register(self, 0)
9085    }
9086
9087    #[doc = "LVD2 Edge Select"]
9088    #[inline(always)]
9089    pub fn dlvd2eg(
9090        self,
9091    ) -> crate::common::RegisterField<
9092        1,
9093        0x1,
9094        1,
9095        0,
9096        dpsiegr2::Dlvd2Eg,
9097        dpsiegr2::Dlvd2Eg,
9098        Dpsiegr2_SPEC,
9099        crate::common::RW,
9100    > {
9101        crate::common::RegisterField::<
9102            1,
9103            0x1,
9104            1,
9105            0,
9106            dpsiegr2::Dlvd2Eg,
9107            dpsiegr2::Dlvd2Eg,
9108            Dpsiegr2_SPEC,
9109            crate::common::RW,
9110        >::from_register(self, 0)
9111    }
9112
9113    #[doc = "NMI Pin Edge Select"]
9114    #[inline(always)]
9115    pub fn dnmieg(
9116        self,
9117    ) -> crate::common::RegisterField<
9118        4,
9119        0x1,
9120        1,
9121        0,
9122        dpsiegr2::Dnmieg,
9123        dpsiegr2::Dnmieg,
9124        Dpsiegr2_SPEC,
9125        crate::common::RW,
9126    > {
9127        crate::common::RegisterField::<
9128            4,
9129            0x1,
9130            1,
9131            0,
9132            dpsiegr2::Dnmieg,
9133            dpsiegr2::Dnmieg,
9134            Dpsiegr2_SPEC,
9135            crate::common::RW,
9136        >::from_register(self, 0)
9137    }
9138}
9139impl ::core::default::Default for Dpsiegr2 {
9140    #[inline(always)]
9141    fn default() -> Dpsiegr2 {
9142        <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
9143    }
9144}
9145pub mod dpsiegr2 {
9146
9147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9148    pub struct Dlvd1Eg_SPEC;
9149    pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
9150    impl Dlvd1Eg {
9151        #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
9152        pub const _0: Self = Self::new(0);
9153
9154        #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
9155        pub const _1: Self = Self::new(1);
9156    }
9157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9158    pub struct Dlvd2Eg_SPEC;
9159    pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
9160    impl Dlvd2Eg {
9161        #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
9162        pub const _0: Self = Self::new(0);
9163
9164        #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
9165        pub const _1: Self = Self::new(1);
9166    }
9167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9168    pub struct Dnmieg_SPEC;
9169    pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
9170    impl Dnmieg {
9171        #[doc = "A cancel request is generated at a falling edge"]
9172        pub const _0: Self = Self::new(0);
9173
9174        #[doc = "A cancel request is generated at a rising edge"]
9175        pub const _1: Self = Self::new(1);
9176    }
9177}
9178#[doc(hidden)]
9179#[derive(Copy, Clone, Eq, PartialEq)]
9180pub struct Syocdcr_SPEC;
9181impl crate::sealed::RegSpec for Syocdcr_SPEC {
9182    type DataType = u8;
9183}
9184
9185#[doc = "System Control OCD Control Register"]
9186pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
9187
9188impl Syocdcr {
9189    #[doc = "Deep Software Standby OCD flag"]
9190    #[inline(always)]
9191    pub fn docdf(
9192        self,
9193    ) -> crate::common::RegisterField<
9194        0,
9195        0x1,
9196        1,
9197        0,
9198        syocdcr::Docdf,
9199        syocdcr::Docdf,
9200        Syocdcr_SPEC,
9201        crate::common::RW,
9202    > {
9203        crate::common::RegisterField::<
9204            0,
9205            0x1,
9206            1,
9207            0,
9208            syocdcr::Docdf,
9209            syocdcr::Docdf,
9210            Syocdcr_SPEC,
9211            crate::common::RW,
9212        >::from_register(self, 0)
9213    }
9214
9215    #[doc = "Debugger Enable bit"]
9216    #[inline(always)]
9217    pub fn dbgen(
9218        self,
9219    ) -> crate::common::RegisterField<
9220        7,
9221        0x1,
9222        1,
9223        0,
9224        syocdcr::Dbgen,
9225        syocdcr::Dbgen,
9226        Syocdcr_SPEC,
9227        crate::common::RW,
9228    > {
9229        crate::common::RegisterField::<
9230            7,
9231            0x1,
9232            1,
9233            0,
9234            syocdcr::Dbgen,
9235            syocdcr::Dbgen,
9236            Syocdcr_SPEC,
9237            crate::common::RW,
9238        >::from_register(self, 0)
9239    }
9240}
9241impl ::core::default::Default for Syocdcr {
9242    #[inline(always)]
9243    fn default() -> Syocdcr {
9244        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
9245    }
9246}
9247pub mod syocdcr {
9248
9249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9250    pub struct Docdf_SPEC;
9251    pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
9252    impl Docdf {
9253        #[doc = "DBIRQ is not generated"]
9254        pub const _0: Self = Self::new(0);
9255
9256        #[doc = "DBIRQ is generated"]
9257        pub const _1: Self = Self::new(1);
9258    }
9259    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9260    pub struct Dbgen_SPEC;
9261    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
9262    impl Dbgen {
9263        #[doc = "On-chip debugger is disabled"]
9264        pub const _0: Self = Self::new(0);
9265
9266        #[doc = "On-chip debugger is enabled"]
9267        pub const _1: Self = Self::new(1);
9268    }
9269}
9270#[doc(hidden)]
9271#[derive(Copy, Clone, Eq, PartialEq)]
9272pub struct Rstsr0_SPEC;
9273impl crate::sealed::RegSpec for Rstsr0_SPEC {
9274    type DataType = u8;
9275}
9276
9277#[doc = "Reset Status Register 0"]
9278pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
9279
9280impl Rstsr0 {
9281    #[doc = "Power-On Reset Detect Flag"]
9282    #[inline(always)]
9283    pub fn porf(
9284        self,
9285    ) -> crate::common::RegisterField<
9286        0,
9287        0x1,
9288        1,
9289        0,
9290        rstsr0::Porf,
9291        rstsr0::Porf,
9292        Rstsr0_SPEC,
9293        crate::common::RW,
9294    > {
9295        crate::common::RegisterField::<
9296            0,
9297            0x1,
9298            1,
9299            0,
9300            rstsr0::Porf,
9301            rstsr0::Porf,
9302            Rstsr0_SPEC,
9303            crate::common::RW,
9304        >::from_register(self, 0)
9305    }
9306
9307    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
9308    #[inline(always)]
9309    pub fn lvd0rf(
9310        self,
9311    ) -> crate::common::RegisterField<
9312        1,
9313        0x1,
9314        1,
9315        0,
9316        rstsr0::Lvd0Rf,
9317        rstsr0::Lvd0Rf,
9318        Rstsr0_SPEC,
9319        crate::common::RW,
9320    > {
9321        crate::common::RegisterField::<
9322            1,
9323            0x1,
9324            1,
9325            0,
9326            rstsr0::Lvd0Rf,
9327            rstsr0::Lvd0Rf,
9328            Rstsr0_SPEC,
9329            crate::common::RW,
9330        >::from_register(self, 0)
9331    }
9332
9333    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
9334    #[inline(always)]
9335    pub fn lvd1rf(
9336        self,
9337    ) -> crate::common::RegisterField<
9338        2,
9339        0x1,
9340        1,
9341        0,
9342        rstsr0::Lvd1Rf,
9343        rstsr0::Lvd1Rf,
9344        Rstsr0_SPEC,
9345        crate::common::RW,
9346    > {
9347        crate::common::RegisterField::<
9348            2,
9349            0x1,
9350            1,
9351            0,
9352            rstsr0::Lvd1Rf,
9353            rstsr0::Lvd1Rf,
9354            Rstsr0_SPEC,
9355            crate::common::RW,
9356        >::from_register(self, 0)
9357    }
9358
9359    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
9360    #[inline(always)]
9361    pub fn lvd2rf(
9362        self,
9363    ) -> crate::common::RegisterField<
9364        3,
9365        0x1,
9366        1,
9367        0,
9368        rstsr0::Lvd2Rf,
9369        rstsr0::Lvd2Rf,
9370        Rstsr0_SPEC,
9371        crate::common::RW,
9372    > {
9373        crate::common::RegisterField::<
9374            3,
9375            0x1,
9376            1,
9377            0,
9378            rstsr0::Lvd2Rf,
9379            rstsr0::Lvd2Rf,
9380            Rstsr0_SPEC,
9381            crate::common::RW,
9382        >::from_register(self, 0)
9383    }
9384
9385    #[doc = "Deep Software Standby Reset Detect Flag"]
9386    #[inline(always)]
9387    pub fn dpsrstf(
9388        self,
9389    ) -> crate::common::RegisterField<
9390        7,
9391        0x1,
9392        1,
9393        0,
9394        rstsr0::Dpsrstf,
9395        rstsr0::Dpsrstf,
9396        Rstsr0_SPEC,
9397        crate::common::RW,
9398    > {
9399        crate::common::RegisterField::<
9400            7,
9401            0x1,
9402            1,
9403            0,
9404            rstsr0::Dpsrstf,
9405            rstsr0::Dpsrstf,
9406            Rstsr0_SPEC,
9407            crate::common::RW,
9408        >::from_register(self, 0)
9409    }
9410}
9411impl ::core::default::Default for Rstsr0 {
9412    #[inline(always)]
9413    fn default() -> Rstsr0 {
9414        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
9415    }
9416}
9417pub mod rstsr0 {
9418
9419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9420    pub struct Porf_SPEC;
9421    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
9422    impl Porf {
9423        #[doc = "Power-on reset not detected"]
9424        pub const _0: Self = Self::new(0);
9425
9426        #[doc = "Power-on reset detected"]
9427        pub const _1: Self = Self::new(1);
9428    }
9429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9430    pub struct Lvd0Rf_SPEC;
9431    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
9432    impl Lvd0Rf {
9433        #[doc = "Voltage monitor 0 reset not detected"]
9434        pub const _0: Self = Self::new(0);
9435
9436        #[doc = "Voltage monitor 0 reset detected"]
9437        pub const _1: Self = Self::new(1);
9438    }
9439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9440    pub struct Lvd1Rf_SPEC;
9441    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
9442    impl Lvd1Rf {
9443        #[doc = "Voltage monitor 1 reset not detected"]
9444        pub const _0: Self = Self::new(0);
9445
9446        #[doc = "Voltage monitor 1 reset detected"]
9447        pub const _1: Self = Self::new(1);
9448    }
9449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9450    pub struct Lvd2Rf_SPEC;
9451    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
9452    impl Lvd2Rf {
9453        #[doc = "Voltage monitor 2 reset not detected"]
9454        pub const _0: Self = Self::new(0);
9455
9456        #[doc = "Voltage monitor 2 reset detected"]
9457        pub const _1: Self = Self::new(1);
9458    }
9459    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9460    pub struct Dpsrstf_SPEC;
9461    pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
9462    impl Dpsrstf {
9463        #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
9464        pub const _0: Self = Self::new(0);
9465
9466        #[doc = "Deep software standby mode cancellation requested by an interrupt."]
9467        pub const _1: Self = Self::new(1);
9468    }
9469}
9470#[doc(hidden)]
9471#[derive(Copy, Clone, Eq, PartialEq)]
9472pub struct Rstsr2_SPEC;
9473impl crate::sealed::RegSpec for Rstsr2_SPEC {
9474    type DataType = u8;
9475}
9476
9477#[doc = "Reset Status Register 2"]
9478pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
9479
9480impl Rstsr2 {
9481    #[doc = "Cold/Warm Start Determination Flag"]
9482    #[inline(always)]
9483    pub fn cwsf(
9484        self,
9485    ) -> crate::common::RegisterField<
9486        0,
9487        0x1,
9488        1,
9489        0,
9490        rstsr2::Cwsf,
9491        rstsr2::Cwsf,
9492        Rstsr2_SPEC,
9493        crate::common::RW,
9494    > {
9495        crate::common::RegisterField::<
9496            0,
9497            0x1,
9498            1,
9499            0,
9500            rstsr2::Cwsf,
9501            rstsr2::Cwsf,
9502            Rstsr2_SPEC,
9503            crate::common::RW,
9504        >::from_register(self, 0)
9505    }
9506}
9507impl ::core::default::Default for Rstsr2 {
9508    #[inline(always)]
9509    fn default() -> Rstsr2 {
9510        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
9511    }
9512}
9513pub mod rstsr2 {
9514
9515    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9516    pub struct Cwsf_SPEC;
9517    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
9518    impl Cwsf {
9519        #[doc = "Cold start"]
9520        pub const _0: Self = Self::new(0);
9521
9522        #[doc = "Warm start"]
9523        pub const _1: Self = Self::new(1);
9524    }
9525}
9526#[doc(hidden)]
9527#[derive(Copy, Clone, Eq, PartialEq)]
9528pub struct Momcr_SPEC;
9529impl crate::sealed::RegSpec for Momcr_SPEC {
9530    type DataType = u8;
9531}
9532
9533#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
9534pub type Momcr = crate::RegValueT<Momcr_SPEC>;
9535
9536impl Momcr {
9537    #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
9538    #[inline(always)]
9539    pub fn modrv(
9540        self,
9541    ) -> crate::common::RegisterField<
9542        4,
9543        0x3,
9544        1,
9545        0,
9546        momcr::Modrv,
9547        momcr::Modrv,
9548        Momcr_SPEC,
9549        crate::common::RW,
9550    > {
9551        crate::common::RegisterField::<
9552            4,
9553            0x3,
9554            1,
9555            0,
9556            momcr::Modrv,
9557            momcr::Modrv,
9558            Momcr_SPEC,
9559            crate::common::RW,
9560        >::from_register(self, 0)
9561    }
9562
9563    #[doc = "Main Clock Oscillator Switching"]
9564    #[inline(always)]
9565    pub fn mosel(
9566        self,
9567    ) -> crate::common::RegisterField<
9568        6,
9569        0x1,
9570        1,
9571        0,
9572        momcr::Mosel,
9573        momcr::Mosel,
9574        Momcr_SPEC,
9575        crate::common::RW,
9576    > {
9577        crate::common::RegisterField::<
9578            6,
9579            0x1,
9580            1,
9581            0,
9582            momcr::Mosel,
9583            momcr::Mosel,
9584            Momcr_SPEC,
9585            crate::common::RW,
9586        >::from_register(self, 0)
9587    }
9588}
9589impl ::core::default::Default for Momcr {
9590    #[inline(always)]
9591    fn default() -> Momcr {
9592        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
9593    }
9594}
9595pub mod momcr {
9596
9597    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9598    pub struct Modrv_SPEC;
9599    pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
9600    impl Modrv {
9601        #[doc = "20 MHz to 24 MHz"]
9602        pub const _00: Self = Self::new(0);
9603
9604        #[doc = "16 MHz to 20 MHz"]
9605        pub const _01: Self = Self::new(1);
9606
9607        #[doc = "8 MHz to 16 MHz"]
9608        pub const _10: Self = Self::new(2);
9609
9610        #[doc = "8 MHz"]
9611        pub const _11: Self = Self::new(3);
9612    }
9613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9614    pub struct Mosel_SPEC;
9615    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
9616    impl Mosel {
9617        #[doc = "Resonator"]
9618        pub const _0: Self = Self::new(0);
9619
9620        #[doc = "External clock input"]
9621        pub const _1: Self = Self::new(1);
9622    }
9623}
9624#[doc(hidden)]
9625#[derive(Copy, Clone, Eq, PartialEq)]
9626pub struct Fwepror_SPEC;
9627impl crate::sealed::RegSpec for Fwepror_SPEC {
9628    type DataType = u8;
9629}
9630
9631#[doc = "Flash P/E Protect Register"]
9632pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
9633
9634impl Fwepror {
9635    #[doc = "Flash Programming and Erasure"]
9636    #[inline(always)]
9637    pub fn flwe(
9638        self,
9639    ) -> crate::common::RegisterField<
9640        0,
9641        0x3,
9642        1,
9643        0,
9644        fwepror::Flwe,
9645        fwepror::Flwe,
9646        Fwepror_SPEC,
9647        crate::common::RW,
9648    > {
9649        crate::common::RegisterField::<
9650            0,
9651            0x3,
9652            1,
9653            0,
9654            fwepror::Flwe,
9655            fwepror::Flwe,
9656            Fwepror_SPEC,
9657            crate::common::RW,
9658        >::from_register(self, 0)
9659    }
9660}
9661impl ::core::default::Default for Fwepror {
9662    #[inline(always)]
9663    fn default() -> Fwepror {
9664        <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
9665    }
9666}
9667pub mod fwepror {
9668
9669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9670    pub struct Flwe_SPEC;
9671    pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
9672    impl Flwe {
9673        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9674        pub const _00: Self = Self::new(0);
9675
9676        #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9677        pub const _01: Self = Self::new(1);
9678
9679        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9680        pub const _10: Self = Self::new(2);
9681
9682        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9683        pub const _11: Self = Self::new(3);
9684    }
9685}
9686#[doc(hidden)]
9687#[derive(Copy, Clone, Eq, PartialEq)]
9688pub struct Lvd1Cmpcr_SPEC;
9689impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
9690    type DataType = u8;
9691}
9692
9693#[doc = "Voltage Monitoring 1 Comparator Control Register"]
9694pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
9695
9696impl Lvd1Cmpcr {
9697    #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
9698    #[inline(always)]
9699    pub fn lvd1lvl(
9700        self,
9701    ) -> crate::common::RegisterField<
9702        0,
9703        0x1f,
9704        1,
9705        0,
9706        lvd1cmpcr::Lvd1Lvl,
9707        lvd1cmpcr::Lvd1Lvl,
9708        Lvd1Cmpcr_SPEC,
9709        crate::common::RW,
9710    > {
9711        crate::common::RegisterField::<
9712            0,
9713            0x1f,
9714            1,
9715            0,
9716            lvd1cmpcr::Lvd1Lvl,
9717            lvd1cmpcr::Lvd1Lvl,
9718            Lvd1Cmpcr_SPEC,
9719            crate::common::RW,
9720        >::from_register(self, 0)
9721    }
9722
9723    #[doc = "Voltage Detection 1 Enable"]
9724    #[inline(always)]
9725    pub fn lvd1e(
9726        self,
9727    ) -> crate::common::RegisterField<
9728        7,
9729        0x1,
9730        1,
9731        0,
9732        lvd1cmpcr::Lvd1E,
9733        lvd1cmpcr::Lvd1E,
9734        Lvd1Cmpcr_SPEC,
9735        crate::common::RW,
9736    > {
9737        crate::common::RegisterField::<
9738            7,
9739            0x1,
9740            1,
9741            0,
9742            lvd1cmpcr::Lvd1E,
9743            lvd1cmpcr::Lvd1E,
9744            Lvd1Cmpcr_SPEC,
9745            crate::common::RW,
9746        >::from_register(self, 0)
9747    }
9748}
9749impl ::core::default::Default for Lvd1Cmpcr {
9750    #[inline(always)]
9751    fn default() -> Lvd1Cmpcr {
9752        <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
9753    }
9754}
9755pub mod lvd1cmpcr {
9756
9757    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9758    pub struct Lvd1Lvl_SPEC;
9759    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
9760    impl Lvd1Lvl {
9761        #[doc = "2.99 V (Vdet1_1)"]
9762        pub const _0_X_11: Self = Self::new(17);
9763
9764        #[doc = "2.92 V (Vdet1_2)"]
9765        pub const _0_X_12: Self = Self::new(18);
9766
9767        #[doc = "2.85 V (Vdet1_3)"]
9768        pub const _0_X_13: Self = Self::new(19);
9769
9770        #[doc = "Setting prohibited"]
9771        pub const OTHERS: Self = Self::new(0);
9772    }
9773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9774    pub struct Lvd1E_SPEC;
9775    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
9776    impl Lvd1E {
9777        #[doc = "Voltage detection 1 circuit disabled"]
9778        pub const _0: Self = Self::new(0);
9779
9780        #[doc = "Voltage detection 1 circuit enabled"]
9781        pub const _1: Self = Self::new(1);
9782    }
9783}
9784#[doc(hidden)]
9785#[derive(Copy, Clone, Eq, PartialEq)]
9786pub struct Lvd2Cmpcr_SPEC;
9787impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
9788    type DataType = u8;
9789}
9790
9791#[doc = "Voltage Monitoring 2 Comparator Control Register"]
9792pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
9793
9794impl Lvd2Cmpcr {
9795    #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
9796    #[inline(always)]
9797    pub fn lvd2lvl(
9798        self,
9799    ) -> crate::common::RegisterField<
9800        0,
9801        0x7,
9802        1,
9803        0,
9804        lvd2cmpcr::Lvd2Lvl,
9805        lvd2cmpcr::Lvd2Lvl,
9806        Lvd2Cmpcr_SPEC,
9807        crate::common::RW,
9808    > {
9809        crate::common::RegisterField::<
9810            0,
9811            0x7,
9812            1,
9813            0,
9814            lvd2cmpcr::Lvd2Lvl,
9815            lvd2cmpcr::Lvd2Lvl,
9816            Lvd2Cmpcr_SPEC,
9817            crate::common::RW,
9818        >::from_register(self, 0)
9819    }
9820
9821    #[doc = "Voltage Detection 2 Enable"]
9822    #[inline(always)]
9823    pub fn lvd2e(
9824        self,
9825    ) -> crate::common::RegisterField<
9826        7,
9827        0x1,
9828        1,
9829        0,
9830        lvd2cmpcr::Lvd2E,
9831        lvd2cmpcr::Lvd2E,
9832        Lvd2Cmpcr_SPEC,
9833        crate::common::RW,
9834    > {
9835        crate::common::RegisterField::<
9836            7,
9837            0x1,
9838            1,
9839            0,
9840            lvd2cmpcr::Lvd2E,
9841            lvd2cmpcr::Lvd2E,
9842            Lvd2Cmpcr_SPEC,
9843            crate::common::RW,
9844        >::from_register(self, 0)
9845    }
9846}
9847impl ::core::default::Default for Lvd2Cmpcr {
9848    #[inline(always)]
9849    fn default() -> Lvd2Cmpcr {
9850        <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
9851    }
9852}
9853pub mod lvd2cmpcr {
9854
9855    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9856    pub struct Lvd2Lvl_SPEC;
9857    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
9858    impl Lvd2Lvl {
9859        #[doc = "2.99 V (Vdet2_1)"]
9860        pub const _101: Self = Self::new(5);
9861
9862        #[doc = "2.92 V (Vdet2_2)"]
9863        pub const _110: Self = Self::new(6);
9864
9865        #[doc = "2.85 V (Vdet2_3)"]
9866        pub const _111: Self = Self::new(7);
9867
9868        #[doc = "Setting prohibited"]
9869        pub const OTHERS: Self = Self::new(0);
9870    }
9871    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9872    pub struct Lvd2E_SPEC;
9873    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
9874    impl Lvd2E {
9875        #[doc = "Voltage detection 2 circuit disabled"]
9876        pub const _0: Self = Self::new(0);
9877
9878        #[doc = "Voltage detection 2 circuit enabled"]
9879        pub const _1: Self = Self::new(1);
9880    }
9881}
9882#[doc(hidden)]
9883#[derive(Copy, Clone, Eq, PartialEq)]
9884pub struct Lvd1Cr0_SPEC;
9885impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
9886    type DataType = u8;
9887}
9888
9889#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
9890pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
9891
9892impl Lvd1Cr0 {
9893    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
9894    #[inline(always)]
9895    pub fn rie(
9896        self,
9897    ) -> crate::common::RegisterField<
9898        0,
9899        0x1,
9900        1,
9901        0,
9902        lvd1cr0::Rie,
9903        lvd1cr0::Rie,
9904        Lvd1Cr0_SPEC,
9905        crate::common::RW,
9906    > {
9907        crate::common::RegisterField::<
9908            0,
9909            0x1,
9910            1,
9911            0,
9912            lvd1cr0::Rie,
9913            lvd1cr0::Rie,
9914            Lvd1Cr0_SPEC,
9915            crate::common::RW,
9916        >::from_register(self, 0)
9917    }
9918
9919    #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
9920    #[inline(always)]
9921    pub fn dfdis(
9922        self,
9923    ) -> crate::common::RegisterField<
9924        1,
9925        0x1,
9926        1,
9927        0,
9928        lvd1cr0::Dfdis,
9929        lvd1cr0::Dfdis,
9930        Lvd1Cr0_SPEC,
9931        crate::common::RW,
9932    > {
9933        crate::common::RegisterField::<
9934            1,
9935            0x1,
9936            1,
9937            0,
9938            lvd1cr0::Dfdis,
9939            lvd1cr0::Dfdis,
9940            Lvd1Cr0_SPEC,
9941            crate::common::RW,
9942        >::from_register(self, 0)
9943    }
9944
9945    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
9946    #[inline(always)]
9947    pub fn cmpe(
9948        self,
9949    ) -> crate::common::RegisterField<
9950        2,
9951        0x1,
9952        1,
9953        0,
9954        lvd1cr0::Cmpe,
9955        lvd1cr0::Cmpe,
9956        Lvd1Cr0_SPEC,
9957        crate::common::RW,
9958    > {
9959        crate::common::RegisterField::<
9960            2,
9961            0x1,
9962            1,
9963            0,
9964            lvd1cr0::Cmpe,
9965            lvd1cr0::Cmpe,
9966            Lvd1Cr0_SPEC,
9967            crate::common::RW,
9968        >::from_register(self, 0)
9969    }
9970
9971    #[doc = "Sampling Clock Select"]
9972    #[inline(always)]
9973    pub fn fsamp(
9974        self,
9975    ) -> crate::common::RegisterField<
9976        4,
9977        0x3,
9978        1,
9979        0,
9980        lvd1cr0::Fsamp,
9981        lvd1cr0::Fsamp,
9982        Lvd1Cr0_SPEC,
9983        crate::common::RW,
9984    > {
9985        crate::common::RegisterField::<
9986            4,
9987            0x3,
9988            1,
9989            0,
9990            lvd1cr0::Fsamp,
9991            lvd1cr0::Fsamp,
9992            Lvd1Cr0_SPEC,
9993            crate::common::RW,
9994        >::from_register(self, 0)
9995    }
9996
9997    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
9998    #[inline(always)]
9999    pub fn ri(
10000        self,
10001    ) -> crate::common::RegisterField<
10002        6,
10003        0x1,
10004        1,
10005        0,
10006        lvd1cr0::Ri,
10007        lvd1cr0::Ri,
10008        Lvd1Cr0_SPEC,
10009        crate::common::RW,
10010    > {
10011        crate::common::RegisterField::<
10012            6,
10013            0x1,
10014            1,
10015            0,
10016            lvd1cr0::Ri,
10017            lvd1cr0::Ri,
10018            Lvd1Cr0_SPEC,
10019            crate::common::RW,
10020        >::from_register(self, 0)
10021    }
10022
10023    #[doc = "Voltage Monitor 1 Reset Negate Select"]
10024    #[inline(always)]
10025    pub fn rn(
10026        self,
10027    ) -> crate::common::RegisterField<
10028        7,
10029        0x1,
10030        1,
10031        0,
10032        lvd1cr0::Rn,
10033        lvd1cr0::Rn,
10034        Lvd1Cr0_SPEC,
10035        crate::common::RW,
10036    > {
10037        crate::common::RegisterField::<
10038            7,
10039            0x1,
10040            1,
10041            0,
10042            lvd1cr0::Rn,
10043            lvd1cr0::Rn,
10044            Lvd1Cr0_SPEC,
10045            crate::common::RW,
10046        >::from_register(self, 0)
10047    }
10048}
10049impl ::core::default::Default for Lvd1Cr0 {
10050    #[inline(always)]
10051    fn default() -> Lvd1Cr0 {
10052        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
10053    }
10054}
10055pub mod lvd1cr0 {
10056
10057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10058    pub struct Rie_SPEC;
10059    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10060    impl Rie {
10061        #[doc = "Disable"]
10062        pub const _0: Self = Self::new(0);
10063
10064        #[doc = "Enable"]
10065        pub const _1: Self = Self::new(1);
10066    }
10067    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10068    pub struct Dfdis_SPEC;
10069    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10070    impl Dfdis {
10071        #[doc = "Enable the digital filter"]
10072        pub const _0: Self = Self::new(0);
10073
10074        #[doc = "Disable the digital filter"]
10075        pub const _1: Self = Self::new(1);
10076    }
10077    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10078    pub struct Cmpe_SPEC;
10079    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10080    impl Cmpe {
10081        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
10082        pub const _0: Self = Self::new(0);
10083
10084        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
10085        pub const _1: Self = Self::new(1);
10086    }
10087    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10088    pub struct Fsamp_SPEC;
10089    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10090    impl Fsamp {
10091        #[doc = "1/2 LOCO frequency"]
10092        pub const _00: Self = Self::new(0);
10093
10094        #[doc = "1/4 LOCO frequency"]
10095        pub const _01: Self = Self::new(1);
10096
10097        #[doc = "1/8 LOCO frequency"]
10098        pub const _10: Self = Self::new(2);
10099
10100        #[doc = "1/16 LOCO frequency"]
10101        pub const _11: Self = Self::new(3);
10102    }
10103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10104    pub struct Ri_SPEC;
10105    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10106    impl Ri {
10107        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
10108        pub const _0: Self = Self::new(0);
10109
10110        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
10111        pub const _1: Self = Self::new(1);
10112    }
10113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10114    pub struct Rn_SPEC;
10115    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10116    impl Rn {
10117        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
10118        pub const _0: Self = Self::new(0);
10119
10120        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
10121        pub const _1: Self = Self::new(1);
10122    }
10123}
10124#[doc(hidden)]
10125#[derive(Copy, Clone, Eq, PartialEq)]
10126pub struct Lvd2Cr0_SPEC;
10127impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
10128    type DataType = u8;
10129}
10130
10131#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
10132pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
10133
10134impl Lvd2Cr0 {
10135    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
10136    #[inline(always)]
10137    pub fn rie(
10138        self,
10139    ) -> crate::common::RegisterField<
10140        0,
10141        0x1,
10142        1,
10143        0,
10144        lvd2cr0::Rie,
10145        lvd2cr0::Rie,
10146        Lvd2Cr0_SPEC,
10147        crate::common::RW,
10148    > {
10149        crate::common::RegisterField::<
10150            0,
10151            0x1,
10152            1,
10153            0,
10154            lvd2cr0::Rie,
10155            lvd2cr0::Rie,
10156            Lvd2Cr0_SPEC,
10157            crate::common::RW,
10158        >::from_register(self, 0)
10159    }
10160
10161    #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
10162    #[inline(always)]
10163    pub fn dfdis(
10164        self,
10165    ) -> crate::common::RegisterField<
10166        1,
10167        0x1,
10168        1,
10169        0,
10170        lvd2cr0::Dfdis,
10171        lvd2cr0::Dfdis,
10172        Lvd2Cr0_SPEC,
10173        crate::common::RW,
10174    > {
10175        crate::common::RegisterField::<
10176            1,
10177            0x1,
10178            1,
10179            0,
10180            lvd2cr0::Dfdis,
10181            lvd2cr0::Dfdis,
10182            Lvd2Cr0_SPEC,
10183            crate::common::RW,
10184        >::from_register(self, 0)
10185    }
10186
10187    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
10188    #[inline(always)]
10189    pub fn cmpe(
10190        self,
10191    ) -> crate::common::RegisterField<
10192        2,
10193        0x1,
10194        1,
10195        0,
10196        lvd2cr0::Cmpe,
10197        lvd2cr0::Cmpe,
10198        Lvd2Cr0_SPEC,
10199        crate::common::RW,
10200    > {
10201        crate::common::RegisterField::<
10202            2,
10203            0x1,
10204            1,
10205            0,
10206            lvd2cr0::Cmpe,
10207            lvd2cr0::Cmpe,
10208            Lvd2Cr0_SPEC,
10209            crate::common::RW,
10210        >::from_register(self, 0)
10211    }
10212
10213    #[doc = "Sampling Clock Select"]
10214    #[inline(always)]
10215    pub fn fsamp(
10216        self,
10217    ) -> crate::common::RegisterField<
10218        4,
10219        0x3,
10220        1,
10221        0,
10222        lvd2cr0::Fsamp,
10223        lvd2cr0::Fsamp,
10224        Lvd2Cr0_SPEC,
10225        crate::common::RW,
10226    > {
10227        crate::common::RegisterField::<
10228            4,
10229            0x3,
10230            1,
10231            0,
10232            lvd2cr0::Fsamp,
10233            lvd2cr0::Fsamp,
10234            Lvd2Cr0_SPEC,
10235            crate::common::RW,
10236        >::from_register(self, 0)
10237    }
10238
10239    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
10240    #[inline(always)]
10241    pub fn ri(
10242        self,
10243    ) -> crate::common::RegisterField<
10244        6,
10245        0x1,
10246        1,
10247        0,
10248        lvd2cr0::Ri,
10249        lvd2cr0::Ri,
10250        Lvd2Cr0_SPEC,
10251        crate::common::RW,
10252    > {
10253        crate::common::RegisterField::<
10254            6,
10255            0x1,
10256            1,
10257            0,
10258            lvd2cr0::Ri,
10259            lvd2cr0::Ri,
10260            Lvd2Cr0_SPEC,
10261            crate::common::RW,
10262        >::from_register(self, 0)
10263    }
10264
10265    #[doc = "Voltage Monitor 2 Reset Negate Select"]
10266    #[inline(always)]
10267    pub fn rn(
10268        self,
10269    ) -> crate::common::RegisterField<
10270        7,
10271        0x1,
10272        1,
10273        0,
10274        lvd2cr0::Rn,
10275        lvd2cr0::Rn,
10276        Lvd2Cr0_SPEC,
10277        crate::common::RW,
10278    > {
10279        crate::common::RegisterField::<
10280            7,
10281            0x1,
10282            1,
10283            0,
10284            lvd2cr0::Rn,
10285            lvd2cr0::Rn,
10286            Lvd2Cr0_SPEC,
10287            crate::common::RW,
10288        >::from_register(self, 0)
10289    }
10290}
10291impl ::core::default::Default for Lvd2Cr0 {
10292    #[inline(always)]
10293    fn default() -> Lvd2Cr0 {
10294        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
10295    }
10296}
10297pub mod lvd2cr0 {
10298
10299    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10300    pub struct Rie_SPEC;
10301    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10302    impl Rie {
10303        #[doc = "Disable"]
10304        pub const _0: Self = Self::new(0);
10305
10306        #[doc = "Enable"]
10307        pub const _1: Self = Self::new(1);
10308    }
10309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10310    pub struct Dfdis_SPEC;
10311    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10312    impl Dfdis {
10313        #[doc = "Enable the digital filter"]
10314        pub const _0: Self = Self::new(0);
10315
10316        #[doc = "Disable the digital filter"]
10317        pub const _1: Self = Self::new(1);
10318    }
10319    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10320    pub struct Cmpe_SPEC;
10321    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10322    impl Cmpe {
10323        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
10324        pub const _0: Self = Self::new(0);
10325
10326        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
10327        pub const _1: Self = Self::new(1);
10328    }
10329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10330    pub struct Fsamp_SPEC;
10331    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10332    impl Fsamp {
10333        #[doc = "1/2 LOCO frequency"]
10334        pub const _00: Self = Self::new(0);
10335
10336        #[doc = "1/4 LOCO frequency"]
10337        pub const _01: Self = Self::new(1);
10338
10339        #[doc = "1/8 LOCO frequency"]
10340        pub const _10: Self = Self::new(2);
10341
10342        #[doc = "1/16 LOCO frequency"]
10343        pub const _11: Self = Self::new(3);
10344    }
10345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10346    pub struct Ri_SPEC;
10347    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10348    impl Ri {
10349        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
10350        pub const _0: Self = Self::new(0);
10351
10352        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
10353        pub const _1: Self = Self::new(1);
10354    }
10355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10356    pub struct Rn_SPEC;
10357    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10358    impl Rn {
10359        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
10360        pub const _0: Self = Self::new(0);
10361
10362        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
10363        pub const _1: Self = Self::new(1);
10364    }
10365}
10366#[doc(hidden)]
10367#[derive(Copy, Clone, Eq, PartialEq)]
10368pub struct Sosccr_SPEC;
10369impl crate::sealed::RegSpec for Sosccr_SPEC {
10370    type DataType = u8;
10371}
10372
10373#[doc = "Sub-Clock Oscillator Control Register"]
10374pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
10375
10376impl Sosccr {
10377    #[doc = "Sub Clock Oscillator Stop"]
10378    #[inline(always)]
10379    pub fn sostp(
10380        self,
10381    ) -> crate::common::RegisterField<
10382        0,
10383        0x1,
10384        1,
10385        0,
10386        sosccr::Sostp,
10387        sosccr::Sostp,
10388        Sosccr_SPEC,
10389        crate::common::RW,
10390    > {
10391        crate::common::RegisterField::<
10392            0,
10393            0x1,
10394            1,
10395            0,
10396            sosccr::Sostp,
10397            sosccr::Sostp,
10398            Sosccr_SPEC,
10399            crate::common::RW,
10400        >::from_register(self, 0)
10401    }
10402}
10403impl ::core::default::Default for Sosccr {
10404    #[inline(always)]
10405    fn default() -> Sosccr {
10406        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
10407    }
10408}
10409pub mod sosccr {
10410
10411    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10412    pub struct Sostp_SPEC;
10413    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
10414    impl Sostp {
10415        #[doc = "Operate the sub-clock oscillator"]
10416        pub const _0: Self = Self::new(0);
10417
10418        #[doc = "Stop the sub-clock oscillator"]
10419        pub const _1: Self = Self::new(1);
10420    }
10421}
10422#[doc(hidden)]
10423#[derive(Copy, Clone, Eq, PartialEq)]
10424pub struct Somcr_SPEC;
10425impl crate::sealed::RegSpec for Somcr_SPEC {
10426    type DataType = u8;
10427}
10428
10429#[doc = "Sub-Clock Oscillator Mode Control Register"]
10430pub type Somcr = crate::RegValueT<Somcr_SPEC>;
10431
10432impl Somcr {
10433    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
10434    #[inline(always)]
10435    pub fn sodrv(
10436        self,
10437    ) -> crate::common::RegisterField<
10438        1,
10439        0x1,
10440        1,
10441        0,
10442        somcr::Sodrv,
10443        somcr::Sodrv,
10444        Somcr_SPEC,
10445        crate::common::RW,
10446    > {
10447        crate::common::RegisterField::<
10448            1,
10449            0x1,
10450            1,
10451            0,
10452            somcr::Sodrv,
10453            somcr::Sodrv,
10454            Somcr_SPEC,
10455            crate::common::RW,
10456        >::from_register(self, 0)
10457    }
10458}
10459impl ::core::default::Default for Somcr {
10460    #[inline(always)]
10461    fn default() -> Somcr {
10462        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
10463    }
10464}
10465pub mod somcr {
10466
10467    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10468    pub struct Sodrv_SPEC;
10469    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
10470    impl Sodrv {
10471        #[doc = "Standard"]
10472        pub const _0: Self = Self::new(0);
10473
10474        #[doc = "Low"]
10475        pub const _1: Self = Self::new(1);
10476    }
10477}
10478#[doc(hidden)]
10479#[derive(Copy, Clone, Eq, PartialEq)]
10480pub struct Lococr_SPEC;
10481impl crate::sealed::RegSpec for Lococr_SPEC {
10482    type DataType = u8;
10483}
10484
10485#[doc = "Low-Speed On-Chip Oscillator Control Register"]
10486pub type Lococr = crate::RegValueT<Lococr_SPEC>;
10487
10488impl Lococr {
10489    #[doc = "LOCO Stop"]
10490    #[inline(always)]
10491    pub fn lcstp(
10492        self,
10493    ) -> crate::common::RegisterField<
10494        0,
10495        0x1,
10496        1,
10497        0,
10498        lococr::Lcstp,
10499        lococr::Lcstp,
10500        Lococr_SPEC,
10501        crate::common::RW,
10502    > {
10503        crate::common::RegisterField::<
10504            0,
10505            0x1,
10506            1,
10507            0,
10508            lococr::Lcstp,
10509            lococr::Lcstp,
10510            Lococr_SPEC,
10511            crate::common::RW,
10512        >::from_register(self, 0)
10513    }
10514}
10515impl ::core::default::Default for Lococr {
10516    #[inline(always)]
10517    fn default() -> Lococr {
10518        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
10519    }
10520}
10521pub mod lococr {
10522
10523    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10524    pub struct Lcstp_SPEC;
10525    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
10526    impl Lcstp {
10527        #[doc = "Operate the LOCO clock"]
10528        pub const _0: Self = Self::new(0);
10529
10530        #[doc = "Stop the LOCO clock"]
10531        pub const _1: Self = Self::new(1);
10532    }
10533}
10534#[doc(hidden)]
10535#[derive(Copy, Clone, Eq, PartialEq)]
10536pub struct Locoutcr_SPEC;
10537impl crate::sealed::RegSpec for Locoutcr_SPEC {
10538    type DataType = u8;
10539}
10540
10541#[doc = "LOCO User Trimming Control Register"]
10542pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
10543
10544impl Locoutcr {
10545    #[doc = "LOCO User Trimming"]
10546    #[inline(always)]
10547    pub fn locoutrm(
10548        self,
10549    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
10550        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
10551    }
10552}
10553impl ::core::default::Default for Locoutcr {
10554    #[inline(always)]
10555    fn default() -> Locoutcr {
10556        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
10557    }
10558}