ra4e2_pac/
gpt16e0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:48:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"General PWM 16-bit Timer 0"]
28unsafe impl ::core::marker::Send for super::Gpt16E0 {}
29unsafe impl ::core::marker::Sync for super::Gpt16E0 {}
30impl super::Gpt16E0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "General PWM Timer Write-Protection Register"]
38    #[inline(always)]
39    pub const fn gtwp(&self) -> &'static crate::common::Reg<self::Gtwp_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Gtwp_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "General PWM Timer Software Start Register"]
48    #[inline(always)]
49    pub const fn gtstr(&self) -> &'static crate::common::Reg<self::Gtstr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Gtstr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "General PWM Timer Software Stop Register"]
58    #[inline(always)]
59    pub const fn gtstp(&self) -> &'static crate::common::Reg<self::Gtstp_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Gtstp_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(8usize),
63            )
64        }
65    }
66
67    #[doc = "General PWM Timer Software Clear Register"]
68    #[inline(always)]
69    pub const fn gtclr(&self) -> &'static crate::common::Reg<self::Gtclr_SPEC, crate::common::W> {
70        unsafe {
71            crate::common::Reg::<self::Gtclr_SPEC, crate::common::W>::from_ptr(
72                self._svd2pac_as_ptr().add(12usize),
73            )
74        }
75    }
76
77    #[doc = "General PWM Timer Start Source Select Register"]
78    #[inline(always)]
79    pub const fn gtssr(&self) -> &'static crate::common::Reg<self::Gtssr_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Gtssr_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(16usize),
83            )
84        }
85    }
86
87    #[doc = "General PWM Timer Stop Source Select Register"]
88    #[inline(always)]
89    pub const fn gtpsr(&self) -> &'static crate::common::Reg<self::Gtpsr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Gtpsr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "General PWM Timer Clear Source Select Register"]
98    #[inline(always)]
99    pub const fn gtcsr(&self) -> &'static crate::common::Reg<self::Gtcsr_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Gtcsr_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(24usize),
103            )
104        }
105    }
106
107    #[doc = "General PWM Timer Up Count Source Select Register"]
108    #[inline(always)]
109    pub const fn gtupsr(
110        &self,
111    ) -> &'static crate::common::Reg<self::Gtupsr_SPEC, crate::common::RW> {
112        unsafe {
113            crate::common::Reg::<self::Gtupsr_SPEC, crate::common::RW>::from_ptr(
114                self._svd2pac_as_ptr().add(28usize),
115            )
116        }
117    }
118
119    #[doc = "General PWM Timer Down Count Source Select Register"]
120    #[inline(always)]
121    pub const fn gtdnsr(
122        &self,
123    ) -> &'static crate::common::Reg<self::Gtdnsr_SPEC, crate::common::RW> {
124        unsafe {
125            crate::common::Reg::<self::Gtdnsr_SPEC, crate::common::RW>::from_ptr(
126                self._svd2pac_as_ptr().add(32usize),
127            )
128        }
129    }
130
131    #[doc = "General PWM Timer Input Capture Source Select Register A"]
132    #[inline(always)]
133    pub const fn gticasr(
134        &self,
135    ) -> &'static crate::common::Reg<self::Gticasr_SPEC, crate::common::RW> {
136        unsafe {
137            crate::common::Reg::<self::Gticasr_SPEC, crate::common::RW>::from_ptr(
138                self._svd2pac_as_ptr().add(36usize),
139            )
140        }
141    }
142
143    #[doc = "General PWM Timer Input Capture Source Select Register B"]
144    #[inline(always)]
145    pub const fn gticbsr(
146        &self,
147    ) -> &'static crate::common::Reg<self::Gticbsr_SPEC, crate::common::RW> {
148        unsafe {
149            crate::common::Reg::<self::Gticbsr_SPEC, crate::common::RW>::from_ptr(
150                self._svd2pac_as_ptr().add(40usize),
151            )
152        }
153    }
154
155    #[doc = "General PWM Timer Control Register"]
156    #[inline(always)]
157    pub const fn gtcr(&self) -> &'static crate::common::Reg<self::Gtcr_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Gtcr_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(44usize),
161            )
162        }
163    }
164
165    #[doc = "General PWM Timer Count Direction and Duty Setting Register"]
166    #[inline(always)]
167    pub const fn gtuddtyc(
168        &self,
169    ) -> &'static crate::common::Reg<self::Gtuddtyc_SPEC, crate::common::RW> {
170        unsafe {
171            crate::common::Reg::<self::Gtuddtyc_SPEC, crate::common::RW>::from_ptr(
172                self._svd2pac_as_ptr().add(48usize),
173            )
174        }
175    }
176
177    #[doc = "General PWM Timer I/O Control Register"]
178    #[inline(always)]
179    pub const fn gtior(&self) -> &'static crate::common::Reg<self::Gtior_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Gtior_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(52usize),
183            )
184        }
185    }
186
187    #[doc = "General PWM Timer Interrupt Output Setting Register"]
188    #[inline(always)]
189    pub const fn gtintad(
190        &self,
191    ) -> &'static crate::common::Reg<self::Gtintad_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Gtintad_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(56usize),
195            )
196        }
197    }
198
199    #[doc = "General PWM Timer Status Register"]
200    #[inline(always)]
201    pub const fn gtst(&self) -> &'static crate::common::Reg<self::Gtst_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Gtst_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(60usize),
205            )
206        }
207    }
208
209    #[doc = "General PWM Timer Buffer Enable Register"]
210    #[inline(always)]
211    pub const fn gtber(&self) -> &'static crate::common::Reg<self::Gtber_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Gtber_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(64usize),
215            )
216        }
217    }
218
219    #[doc = "General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"]
220    #[inline(always)]
221    pub const fn gtitc(&self) -> &'static crate::common::Reg<self::Gtitc_SPEC, crate::common::RW> {
222        unsafe {
223            crate::common::Reg::<self::Gtitc_SPEC, crate::common::RW>::from_ptr(
224                self._svd2pac_as_ptr().add(68usize),
225            )
226        }
227    }
228
229    #[doc = "General PWM Timer Counter"]
230    #[inline(always)]
231    pub const fn gtcnt(&self) -> &'static crate::common::Reg<self::Gtcnt_SPEC, crate::common::RW> {
232        unsafe {
233            crate::common::Reg::<self::Gtcnt_SPEC, crate::common::RW>::from_ptr(
234                self._svd2pac_as_ptr().add(72usize),
235            )
236        }
237    }
238
239    #[doc = "General PWM Timer Compare Capture Register A"]
240    #[inline(always)]
241    pub const fn gtccra(
242        &self,
243    ) -> &'static crate::common::Reg<self::Gtccra_SPEC, crate::common::RW> {
244        unsafe {
245            crate::common::Reg::<self::Gtccra_SPEC, crate::common::RW>::from_ptr(
246                self._svd2pac_as_ptr().add(76usize),
247            )
248        }
249    }
250
251    #[doc = "General PWM Timer Compare Capture Register B"]
252    #[inline(always)]
253    pub const fn gtccrb(
254        &self,
255    ) -> &'static crate::common::Reg<self::Gtccrb_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Gtccrb_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(80usize),
259            )
260        }
261    }
262
263    #[doc = "General PWM Timer Compare Capture Register C"]
264    #[inline(always)]
265    pub const fn gtccrc(
266        &self,
267    ) -> &'static crate::common::Reg<self::Gtccrc_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Gtccrc_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(84usize),
271            )
272        }
273    }
274
275    #[doc = "General PWM Timer Compare Capture Register E"]
276    #[inline(always)]
277    pub const fn gtccre(
278        &self,
279    ) -> &'static crate::common::Reg<self::Gtccre_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Gtccre_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(88usize),
283            )
284        }
285    }
286
287    #[doc = "General PWM Timer Compare Capture Register D"]
288    #[inline(always)]
289    pub const fn gtccrd(
290        &self,
291    ) -> &'static crate::common::Reg<self::Gtccrd_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Gtccrd_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(92usize),
295            )
296        }
297    }
298
299    #[doc = "General PWM Timer Compare Capture Register F"]
300    #[inline(always)]
301    pub const fn gtccrf(
302        &self,
303    ) -> &'static crate::common::Reg<self::Gtccrf_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Gtccrf_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(96usize),
307            )
308        }
309    }
310
311    #[doc = "General PWM Timer Cycle Setting Register"]
312    #[inline(always)]
313    pub const fn gtpr(&self) -> &'static crate::common::Reg<self::Gtpr_SPEC, crate::common::RW> {
314        unsafe {
315            crate::common::Reg::<self::Gtpr_SPEC, crate::common::RW>::from_ptr(
316                self._svd2pac_as_ptr().add(100usize),
317            )
318        }
319    }
320
321    #[doc = "General PWM Timer Cycle Setting Buffer Register"]
322    #[inline(always)]
323    pub const fn gtpbr(&self) -> &'static crate::common::Reg<self::Gtpbr_SPEC, crate::common::RW> {
324        unsafe {
325            crate::common::Reg::<self::Gtpbr_SPEC, crate::common::RW>::from_ptr(
326                self._svd2pac_as_ptr().add(104usize),
327            )
328        }
329    }
330
331    #[doc = "General PWM Timer Period Setting Double-Buffer Register"]
332    #[inline(always)]
333    pub const fn gtpdbr(
334        &self,
335    ) -> &'static crate::common::Reg<self::Gtpdbr_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Gtpdbr_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(108usize),
339            )
340        }
341    }
342
343    #[doc = "A/D Conversion Start Request Timing Register A"]
344    #[inline(always)]
345    pub const fn gtadtra(
346        &self,
347    ) -> &'static crate::common::Reg<self::Gtadtra_SPEC, crate::common::RW> {
348        unsafe {
349            crate::common::Reg::<self::Gtadtra_SPEC, crate::common::RW>::from_ptr(
350                self._svd2pac_as_ptr().add(112usize),
351            )
352        }
353    }
354
355    #[doc = "A/D Conversion Start Request Timing Buffer Register A"]
356    #[inline(always)]
357    pub const fn gtadtbra(
358        &self,
359    ) -> &'static crate::common::Reg<self::Gtadtbra_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Gtadtbra_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(116usize),
363            )
364        }
365    }
366
367    #[doc = "A/D Conversion Start Request Timing Double-Buffer Register A"]
368    #[inline(always)]
369    pub const fn gtadtdbra(
370        &self,
371    ) -> &'static crate::common::Reg<self::Gtadtdbra_SPEC, crate::common::RW> {
372        unsafe {
373            crate::common::Reg::<self::Gtadtdbra_SPEC, crate::common::RW>::from_ptr(
374                self._svd2pac_as_ptr().add(120usize),
375            )
376        }
377    }
378
379    #[doc = "A/D Conversion Start Request Timing Register B"]
380    #[inline(always)]
381    pub const fn gtadtrb(
382        &self,
383    ) -> &'static crate::common::Reg<self::Gtadtrb_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Gtadtrb_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(124usize),
387            )
388        }
389    }
390
391    #[doc = "A/D Conversion Start Request Timing Buffer Register B"]
392    #[inline(always)]
393    pub const fn gtadtbrb(
394        &self,
395    ) -> &'static crate::common::Reg<self::Gtadtbrb_SPEC, crate::common::RW> {
396        unsafe {
397            crate::common::Reg::<self::Gtadtbrb_SPEC, crate::common::RW>::from_ptr(
398                self._svd2pac_as_ptr().add(128usize),
399            )
400        }
401    }
402
403    #[doc = "A/D Conversion Start Request Timing Double-Buffer Register B"]
404    #[inline(always)]
405    pub const fn gtadtdbrb(
406        &self,
407    ) -> &'static crate::common::Reg<self::Gtadtdbrb_SPEC, crate::common::RW> {
408        unsafe {
409            crate::common::Reg::<self::Gtadtdbrb_SPEC, crate::common::RW>::from_ptr(
410                self._svd2pac_as_ptr().add(132usize),
411            )
412        }
413    }
414
415    #[doc = "General PWM Timer Dead Time Control Register"]
416    #[inline(always)]
417    pub const fn gtdtcr(
418        &self,
419    ) -> &'static crate::common::Reg<self::Gtdtcr_SPEC, crate::common::RW> {
420        unsafe {
421            crate::common::Reg::<self::Gtdtcr_SPEC, crate::common::RW>::from_ptr(
422                self._svd2pac_as_ptr().add(136usize),
423            )
424        }
425    }
426
427    #[doc = "General PWM Timer Dead Time Value Register U"]
428    #[inline(always)]
429    pub const fn gtdvu(&self) -> &'static crate::common::Reg<self::Gtdvu_SPEC, crate::common::RW> {
430        unsafe {
431            crate::common::Reg::<self::Gtdvu_SPEC, crate::common::RW>::from_ptr(
432                self._svd2pac_as_ptr().add(140usize),
433            )
434        }
435    }
436
437    #[doc = "General PWM Timer Dead Time Value Register D"]
438    #[inline(always)]
439    pub const fn gtdvd(&self) -> &'static crate::common::Reg<self::Gtdvd_SPEC, crate::common::RW> {
440        unsafe {
441            crate::common::Reg::<self::Gtdvd_SPEC, crate::common::RW>::from_ptr(
442                self._svd2pac_as_ptr().add(144usize),
443            )
444        }
445    }
446
447    #[doc = "General PWM Timer Dead Time Buffer Register U"]
448    #[inline(always)]
449    pub const fn gtdbu(&self) -> &'static crate::common::Reg<self::Gtdbu_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Gtdbu_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(148usize),
453            )
454        }
455    }
456
457    #[doc = "General PWM Timer Dead Time Buffer Register D"]
458    #[inline(always)]
459    pub const fn gtdbd(&self) -> &'static crate::common::Reg<self::Gtdbd_SPEC, crate::common::RW> {
460        unsafe {
461            crate::common::Reg::<self::Gtdbd_SPEC, crate::common::RW>::from_ptr(
462                self._svd2pac_as_ptr().add(152usize),
463            )
464        }
465    }
466
467    #[doc = "General PWM Timer Output Protection Function Status Register"]
468    #[inline(always)]
469    pub const fn gtsos(&self) -> &'static crate::common::Reg<self::Gtsos_SPEC, crate::common::R> {
470        unsafe {
471            crate::common::Reg::<self::Gtsos_SPEC, crate::common::R>::from_ptr(
472                self._svd2pac_as_ptr().add(156usize),
473            )
474        }
475    }
476
477    #[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
478    #[inline(always)]
479    pub const fn gtsotr(
480        &self,
481    ) -> &'static crate::common::Reg<self::Gtsotr_SPEC, crate::common::RW> {
482        unsafe {
483            crate::common::Reg::<self::Gtsotr_SPEC, crate::common::RW>::from_ptr(
484                self._svd2pac_as_ptr().add(160usize),
485            )
486        }
487    }
488
489    #[doc = "General PWM Timer A/D Conversion Start Request Signal Monitoring Register"]
490    #[inline(always)]
491    pub const fn gtadsmr(
492        &self,
493    ) -> &'static crate::common::Reg<self::Gtadsmr_SPEC, crate::common::RW> {
494        unsafe {
495            crate::common::Reg::<self::Gtadsmr_SPEC, crate::common::RW>::from_ptr(
496                self._svd2pac_as_ptr().add(164usize),
497            )
498        }
499    }
500
501    #[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
502    #[inline(always)]
503    pub const fn gticlf(
504        &self,
505    ) -> &'static crate::common::Reg<self::Gticlf_SPEC, crate::common::RW> {
506        unsafe {
507            crate::common::Reg::<self::Gticlf_SPEC, crate::common::RW>::from_ptr(
508                self._svd2pac_as_ptr().add(184usize),
509            )
510        }
511    }
512
513    #[doc = "General PWM Timer Period Count Register"]
514    #[inline(always)]
515    pub const fn gtpc(&self) -> &'static crate::common::Reg<self::Gtpc_SPEC, crate::common::RW> {
516        unsafe {
517            crate::common::Reg::<self::Gtpc_SPEC, crate::common::RW>::from_ptr(
518                self._svd2pac_as_ptr().add(188usize),
519            )
520        }
521    }
522
523    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
524    #[inline(always)]
525    pub const fn gtsecsr(
526        &self,
527    ) -> &'static crate::common::Reg<self::Gtsecsr_SPEC, crate::common::RW> {
528        unsafe {
529            crate::common::Reg::<self::Gtsecsr_SPEC, crate::common::RW>::from_ptr(
530                self._svd2pac_as_ptr().add(208usize),
531            )
532        }
533    }
534
535    #[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
536    #[inline(always)]
537    pub const fn gtsecr(
538        &self,
539    ) -> &'static crate::common::Reg<self::Gtsecr_SPEC, crate::common::RW> {
540        unsafe {
541            crate::common::Reg::<self::Gtsecr_SPEC, crate::common::RW>::from_ptr(
542                self._svd2pac_as_ptr().add(212usize),
543            )
544        }
545    }
546}
547#[doc(hidden)]
548#[derive(Copy, Clone, Eq, PartialEq)]
549pub struct Gtwp_SPEC;
550impl crate::sealed::RegSpec for Gtwp_SPEC {
551    type DataType = u32;
552}
553
554#[doc = "General PWM Timer Write-Protection Register"]
555pub type Gtwp = crate::RegValueT<Gtwp_SPEC>;
556
557impl Gtwp {
558    #[doc = "Register Write Disable"]
559    #[inline(always)]
560    pub fn wp(
561        self,
562    ) -> crate::common::RegisterField<0, 0x1, 1, 0, gtwp::Wp, gtwp::Wp, Gtwp_SPEC, crate::common::RW>
563    {
564        crate::common::RegisterField::<0,0x1,1,0,gtwp::Wp,gtwp::Wp,Gtwp_SPEC,crate::common::RW>::from_register(self,0)
565    }
566
567    #[doc = "GTSTR.CSTRT Bit Write Disable"]
568    #[inline(always)]
569    pub fn strwp(
570        self,
571    ) -> crate::common::RegisterField<
572        1,
573        0x1,
574        1,
575        0,
576        gtwp::Strwp,
577        gtwp::Strwp,
578        Gtwp_SPEC,
579        crate::common::RW,
580    > {
581        crate::common::RegisterField::<
582            1,
583            0x1,
584            1,
585            0,
586            gtwp::Strwp,
587            gtwp::Strwp,
588            Gtwp_SPEC,
589            crate::common::RW,
590        >::from_register(self, 0)
591    }
592
593    #[doc = "GTSTP.CSTOP Bit Write Disable"]
594    #[inline(always)]
595    pub fn stpwp(
596        self,
597    ) -> crate::common::RegisterField<
598        2,
599        0x1,
600        1,
601        0,
602        gtwp::Stpwp,
603        gtwp::Stpwp,
604        Gtwp_SPEC,
605        crate::common::RW,
606    > {
607        crate::common::RegisterField::<
608            2,
609            0x1,
610            1,
611            0,
612            gtwp::Stpwp,
613            gtwp::Stpwp,
614            Gtwp_SPEC,
615            crate::common::RW,
616        >::from_register(self, 0)
617    }
618
619    #[doc = "GTCLR.CCLR Bit Write Disable"]
620    #[inline(always)]
621    pub fn clrwp(
622        self,
623    ) -> crate::common::RegisterField<
624        3,
625        0x1,
626        1,
627        0,
628        gtwp::Clrwp,
629        gtwp::Clrwp,
630        Gtwp_SPEC,
631        crate::common::RW,
632    > {
633        crate::common::RegisterField::<
634            3,
635            0x1,
636            1,
637            0,
638            gtwp::Clrwp,
639            gtwp::Clrwp,
640            Gtwp_SPEC,
641            crate::common::RW,
642        >::from_register(self, 0)
643    }
644
645    #[doc = "Common Register Write Disabled"]
646    #[inline(always)]
647    pub fn cmnwp(
648        self,
649    ) -> crate::common::RegisterField<
650        4,
651        0x1,
652        1,
653        0,
654        gtwp::Cmnwp,
655        gtwp::Cmnwp,
656        Gtwp_SPEC,
657        crate::common::RW,
658    > {
659        crate::common::RegisterField::<
660            4,
661            0x1,
662            1,
663            0,
664            gtwp::Cmnwp,
665            gtwp::Cmnwp,
666            Gtwp_SPEC,
667            crate::common::RW,
668        >::from_register(self, 0)
669    }
670
671    #[doc = "GTWP Key Code"]
672    #[inline(always)]
673    pub fn prkey(
674        self,
675    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Gtwp_SPEC, crate::common::W> {
676        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Gtwp_SPEC,crate::common::W>::from_register(self,0)
677    }
678}
679impl ::core::default::Default for Gtwp {
680    #[inline(always)]
681    fn default() -> Gtwp {
682        <crate::RegValueT<Gtwp_SPEC> as RegisterValue<_>>::new(0)
683    }
684}
685pub mod gtwp {
686
687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
688    pub struct Wp_SPEC;
689    pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
690    impl Wp {
691        #[doc = "Write to the register enabled"]
692        pub const _0: Self = Self::new(0);
693
694        #[doc = "Write to the register disabled"]
695        pub const _1: Self = Self::new(1);
696    }
697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
698    pub struct Strwp_SPEC;
699    pub type Strwp = crate::EnumBitfieldStruct<u8, Strwp_SPEC>;
700    impl Strwp {
701        #[doc = "Write to the bit is enabled"]
702        pub const _0: Self = Self::new(0);
703
704        #[doc = "Write to the bit is disabled"]
705        pub const _1: Self = Self::new(1);
706    }
707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
708    pub struct Stpwp_SPEC;
709    pub type Stpwp = crate::EnumBitfieldStruct<u8, Stpwp_SPEC>;
710    impl Stpwp {
711        #[doc = "Write to the bit is enabled"]
712        pub const _0: Self = Self::new(0);
713
714        #[doc = "Write to the bit is disabled"]
715        pub const _1: Self = Self::new(1);
716    }
717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
718    pub struct Clrwp_SPEC;
719    pub type Clrwp = crate::EnumBitfieldStruct<u8, Clrwp_SPEC>;
720    impl Clrwp {
721        #[doc = "Write to the bit is enabled"]
722        pub const _0: Self = Self::new(0);
723
724        #[doc = "Write to the bit is disabled"]
725        pub const _1: Self = Self::new(1);
726    }
727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
728    pub struct Cmnwp_SPEC;
729    pub type Cmnwp = crate::EnumBitfieldStruct<u8, Cmnwp_SPEC>;
730    impl Cmnwp {
731        #[doc = "Write to the register is enabled"]
732        pub const _0: Self = Self::new(0);
733
734        #[doc = "Write to the register is disabled"]
735        pub const _1: Self = Self::new(1);
736    }
737}
738#[doc(hidden)]
739#[derive(Copy, Clone, Eq, PartialEq)]
740pub struct Gtstr_SPEC;
741impl crate::sealed::RegSpec for Gtstr_SPEC {
742    type DataType = u32;
743}
744
745#[doc = "General PWM Timer Software Start Register"]
746pub type Gtstr = crate::RegValueT<Gtstr_SPEC>;
747
748impl Gtstr {
749    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
750    #[inline(always)]
751    pub fn cstrt0(
752        self,
753    ) -> crate::common::RegisterField<
754        0,
755        0x1,
756        1,
757        0,
758        gtstr::Cstrt0,
759        gtstr::Cstrt0,
760        Gtstr_SPEC,
761        crate::common::RW,
762    > {
763        crate::common::RegisterField::<
764            0,
765            0x1,
766            1,
767            0,
768            gtstr::Cstrt0,
769            gtstr::Cstrt0,
770            Gtstr_SPEC,
771            crate::common::RW,
772        >::from_register(self, 0)
773    }
774
775    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
776    #[inline(always)]
777    pub fn cstrt1(
778        self,
779    ) -> crate::common::RegisterField<
780        1,
781        0x1,
782        1,
783        0,
784        gtstr::Cstrt1,
785        gtstr::Cstrt1,
786        Gtstr_SPEC,
787        crate::common::RW,
788    > {
789        crate::common::RegisterField::<
790            1,
791            0x1,
792            1,
793            0,
794            gtstr::Cstrt1,
795            gtstr::Cstrt1,
796            Gtstr_SPEC,
797            crate::common::RW,
798        >::from_register(self, 0)
799    }
800
801    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
802    #[inline(always)]
803    pub fn cstrt4(
804        self,
805    ) -> crate::common::RegisterField<
806        4,
807        0x1,
808        1,
809        0,
810        gtstr::Cstrt4,
811        gtstr::Cstrt4,
812        Gtstr_SPEC,
813        crate::common::RW,
814    > {
815        crate::common::RegisterField::<
816            4,
817            0x1,
818            1,
819            0,
820            gtstr::Cstrt4,
821            gtstr::Cstrt4,
822            Gtstr_SPEC,
823            crate::common::RW,
824        >::from_register(self, 0)
825    }
826
827    #[doc = "Channel n GTCNT Count Start (n : the same as bit position value)"]
828    #[inline(always)]
829    pub fn cstrt5(
830        self,
831    ) -> crate::common::RegisterField<
832        5,
833        0x1,
834        1,
835        0,
836        gtstr::Cstrt5,
837        gtstr::Cstrt5,
838        Gtstr_SPEC,
839        crate::common::RW,
840    > {
841        crate::common::RegisterField::<
842            5,
843            0x1,
844            1,
845            0,
846            gtstr::Cstrt5,
847            gtstr::Cstrt5,
848            Gtstr_SPEC,
849            crate::common::RW,
850        >::from_register(self, 0)
851    }
852}
853impl ::core::default::Default for Gtstr {
854    #[inline(always)]
855    fn default() -> Gtstr {
856        <crate::RegValueT<Gtstr_SPEC> as RegisterValue<_>>::new(0)
857    }
858}
859pub mod gtstr {
860
861    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
862    pub struct Cstrt0_SPEC;
863    pub type Cstrt0 = crate::EnumBitfieldStruct<u8, Cstrt0_SPEC>;
864    impl Cstrt0 {
865        #[doc = "GTCNT counter not start"]
866        pub const _0: Self = Self::new(0);
867
868        #[doc = "GTCNT counter start"]
869        pub const _1: Self = Self::new(1);
870    }
871    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
872    pub struct Cstrt1_SPEC;
873    pub type Cstrt1 = crate::EnumBitfieldStruct<u8, Cstrt1_SPEC>;
874    impl Cstrt1 {
875        #[doc = "GTCNT counter not start"]
876        pub const _0: Self = Self::new(0);
877
878        #[doc = "GTCNT counter start"]
879        pub const _1: Self = Self::new(1);
880    }
881    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
882    pub struct Cstrt4_SPEC;
883    pub type Cstrt4 = crate::EnumBitfieldStruct<u8, Cstrt4_SPEC>;
884    impl Cstrt4 {
885        #[doc = "GTCNT counter not start"]
886        pub const _0: Self = Self::new(0);
887
888        #[doc = "GTCNT counter start"]
889        pub const _1: Self = Self::new(1);
890    }
891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
892    pub struct Cstrt5_SPEC;
893    pub type Cstrt5 = crate::EnumBitfieldStruct<u8, Cstrt5_SPEC>;
894    impl Cstrt5 {
895        #[doc = "GTCNT counter not start"]
896        pub const _0: Self = Self::new(0);
897
898        #[doc = "GTCNT counter start"]
899        pub const _1: Self = Self::new(1);
900    }
901}
902#[doc(hidden)]
903#[derive(Copy, Clone, Eq, PartialEq)]
904pub struct Gtstp_SPEC;
905impl crate::sealed::RegSpec for Gtstp_SPEC {
906    type DataType = u32;
907}
908
909#[doc = "General PWM Timer Software Stop Register"]
910pub type Gtstp = crate::RegValueT<Gtstp_SPEC>;
911
912impl Gtstp {
913    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
914    #[inline(always)]
915    pub fn cstop0(
916        self,
917    ) -> crate::common::RegisterField<
918        0,
919        0x1,
920        1,
921        0,
922        gtstp::Cstop0,
923        gtstp::Cstop0,
924        Gtstp_SPEC,
925        crate::common::RW,
926    > {
927        crate::common::RegisterField::<
928            0,
929            0x1,
930            1,
931            0,
932            gtstp::Cstop0,
933            gtstp::Cstop0,
934            Gtstp_SPEC,
935            crate::common::RW,
936        >::from_register(self, 0)
937    }
938
939    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
940    #[inline(always)]
941    pub fn cstop1(
942        self,
943    ) -> crate::common::RegisterField<
944        1,
945        0x1,
946        1,
947        0,
948        gtstp::Cstop1,
949        gtstp::Cstop1,
950        Gtstp_SPEC,
951        crate::common::RW,
952    > {
953        crate::common::RegisterField::<
954            1,
955            0x1,
956            1,
957            0,
958            gtstp::Cstop1,
959            gtstp::Cstop1,
960            Gtstp_SPEC,
961            crate::common::RW,
962        >::from_register(self, 0)
963    }
964
965    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
966    #[inline(always)]
967    pub fn cstop4(
968        self,
969    ) -> crate::common::RegisterField<
970        4,
971        0x1,
972        1,
973        0,
974        gtstp::Cstop4,
975        gtstp::Cstop4,
976        Gtstp_SPEC,
977        crate::common::RW,
978    > {
979        crate::common::RegisterField::<
980            4,
981            0x1,
982            1,
983            0,
984            gtstp::Cstop4,
985            gtstp::Cstop4,
986            Gtstp_SPEC,
987            crate::common::RW,
988        >::from_register(self, 0)
989    }
990
991    #[doc = "Channel n GTCNT Count Stop (n : the same as bit position value)"]
992    #[inline(always)]
993    pub fn cstop5(
994        self,
995    ) -> crate::common::RegisterField<
996        5,
997        0x1,
998        1,
999        0,
1000        gtstp::Cstop5,
1001        gtstp::Cstop5,
1002        Gtstp_SPEC,
1003        crate::common::RW,
1004    > {
1005        crate::common::RegisterField::<
1006            5,
1007            0x1,
1008            1,
1009            0,
1010            gtstp::Cstop5,
1011            gtstp::Cstop5,
1012            Gtstp_SPEC,
1013            crate::common::RW,
1014        >::from_register(self, 0)
1015    }
1016}
1017impl ::core::default::Default for Gtstp {
1018    #[inline(always)]
1019    fn default() -> Gtstp {
1020        <crate::RegValueT<Gtstp_SPEC> as RegisterValue<_>>::new(4294967295)
1021    }
1022}
1023pub mod gtstp {
1024
1025    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1026    pub struct Cstop0_SPEC;
1027    pub type Cstop0 = crate::EnumBitfieldStruct<u8, Cstop0_SPEC>;
1028    impl Cstop0 {
1029        #[doc = "GTCNT counter not stop"]
1030        pub const _0: Self = Self::new(0);
1031
1032        #[doc = "GTCNT counter stop"]
1033        pub const _1: Self = Self::new(1);
1034    }
1035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1036    pub struct Cstop1_SPEC;
1037    pub type Cstop1 = crate::EnumBitfieldStruct<u8, Cstop1_SPEC>;
1038    impl Cstop1 {
1039        #[doc = "GTCNT counter not stop"]
1040        pub const _0: Self = Self::new(0);
1041
1042        #[doc = "GTCNT counter stop"]
1043        pub const _1: Self = Self::new(1);
1044    }
1045    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1046    pub struct Cstop4_SPEC;
1047    pub type Cstop4 = crate::EnumBitfieldStruct<u8, Cstop4_SPEC>;
1048    impl Cstop4 {
1049        #[doc = "GTCNT counter not stop"]
1050        pub const _0: Self = Self::new(0);
1051
1052        #[doc = "GTCNT counter stop"]
1053        pub const _1: Self = Self::new(1);
1054    }
1055    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1056    pub struct Cstop5_SPEC;
1057    pub type Cstop5 = crate::EnumBitfieldStruct<u8, Cstop5_SPEC>;
1058    impl Cstop5 {
1059        #[doc = "GTCNT counter not stop"]
1060        pub const _0: Self = Self::new(0);
1061
1062        #[doc = "GTCNT counter stop"]
1063        pub const _1: Self = Self::new(1);
1064    }
1065}
1066#[doc(hidden)]
1067#[derive(Copy, Clone, Eq, PartialEq)]
1068pub struct Gtclr_SPEC;
1069impl crate::sealed::RegSpec for Gtclr_SPEC {
1070    type DataType = u32;
1071}
1072
1073#[doc = "General PWM Timer Software Clear Register"]
1074pub type Gtclr = crate::RegValueT<Gtclr_SPEC>;
1075
1076impl Gtclr {
1077    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1078    #[inline(always)]
1079    pub fn cclr0(
1080        self,
1081    ) -> crate::common::RegisterField<
1082        0,
1083        0x1,
1084        1,
1085        0,
1086        gtclr::Cclr0,
1087        gtclr::Cclr0,
1088        Gtclr_SPEC,
1089        crate::common::W,
1090    > {
1091        crate::common::RegisterField::<
1092            0,
1093            0x1,
1094            1,
1095            0,
1096            gtclr::Cclr0,
1097            gtclr::Cclr0,
1098            Gtclr_SPEC,
1099            crate::common::W,
1100        >::from_register(self, 0)
1101    }
1102
1103    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1104    #[inline(always)]
1105    pub fn cclr1(
1106        self,
1107    ) -> crate::common::RegisterField<
1108        1,
1109        0x1,
1110        1,
1111        0,
1112        gtclr::Cclr1,
1113        gtclr::Cclr1,
1114        Gtclr_SPEC,
1115        crate::common::W,
1116    > {
1117        crate::common::RegisterField::<
1118            1,
1119            0x1,
1120            1,
1121            0,
1122            gtclr::Cclr1,
1123            gtclr::Cclr1,
1124            Gtclr_SPEC,
1125            crate::common::W,
1126        >::from_register(self, 0)
1127    }
1128
1129    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1130    #[inline(always)]
1131    pub fn cclr4(
1132        self,
1133    ) -> crate::common::RegisterField<
1134        4,
1135        0x1,
1136        1,
1137        0,
1138        gtclr::Cclr4,
1139        gtclr::Cclr4,
1140        Gtclr_SPEC,
1141        crate::common::W,
1142    > {
1143        crate::common::RegisterField::<
1144            4,
1145            0x1,
1146            1,
1147            0,
1148            gtclr::Cclr4,
1149            gtclr::Cclr4,
1150            Gtclr_SPEC,
1151            crate::common::W,
1152        >::from_register(self, 0)
1153    }
1154
1155    #[doc = "Channel n GTCNT Count Clear (n : the same as bit position value)"]
1156    #[inline(always)]
1157    pub fn cclr5(
1158        self,
1159    ) -> crate::common::RegisterField<
1160        5,
1161        0x1,
1162        1,
1163        0,
1164        gtclr::Cclr5,
1165        gtclr::Cclr5,
1166        Gtclr_SPEC,
1167        crate::common::W,
1168    > {
1169        crate::common::RegisterField::<
1170            5,
1171            0x1,
1172            1,
1173            0,
1174            gtclr::Cclr5,
1175            gtclr::Cclr5,
1176            Gtclr_SPEC,
1177            crate::common::W,
1178        >::from_register(self, 0)
1179    }
1180}
1181impl ::core::default::Default for Gtclr {
1182    #[inline(always)]
1183    fn default() -> Gtclr {
1184        <crate::RegValueT<Gtclr_SPEC> as RegisterValue<_>>::new(0)
1185    }
1186}
1187pub mod gtclr {
1188
1189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1190    pub struct Cclr0_SPEC;
1191    pub type Cclr0 = crate::EnumBitfieldStruct<u8, Cclr0_SPEC>;
1192    impl Cclr0 {
1193        #[doc = "GTCNT counter is not cleared"]
1194        pub const _0: Self = Self::new(0);
1195
1196        #[doc = "GTCNT counter is cleared"]
1197        pub const _1: Self = Self::new(1);
1198    }
1199    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1200    pub struct Cclr1_SPEC;
1201    pub type Cclr1 = crate::EnumBitfieldStruct<u8, Cclr1_SPEC>;
1202    impl Cclr1 {
1203        #[doc = "GTCNT counter is not cleared"]
1204        pub const _0: Self = Self::new(0);
1205
1206        #[doc = "GTCNT counter is cleared"]
1207        pub const _1: Self = Self::new(1);
1208    }
1209    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1210    pub struct Cclr4_SPEC;
1211    pub type Cclr4 = crate::EnumBitfieldStruct<u8, Cclr4_SPEC>;
1212    impl Cclr4 {
1213        #[doc = "GTCNT counter is not cleared"]
1214        pub const _0: Self = Self::new(0);
1215
1216        #[doc = "GTCNT counter is cleared"]
1217        pub const _1: Self = Self::new(1);
1218    }
1219    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1220    pub struct Cclr5_SPEC;
1221    pub type Cclr5 = crate::EnumBitfieldStruct<u8, Cclr5_SPEC>;
1222    impl Cclr5 {
1223        #[doc = "GTCNT counter is not cleared"]
1224        pub const _0: Self = Self::new(0);
1225
1226        #[doc = "GTCNT counter is cleared"]
1227        pub const _1: Self = Self::new(1);
1228    }
1229}
1230#[doc(hidden)]
1231#[derive(Copy, Clone, Eq, PartialEq)]
1232pub struct Gtssr_SPEC;
1233impl crate::sealed::RegSpec for Gtssr_SPEC {
1234    type DataType = u32;
1235}
1236
1237#[doc = "General PWM Timer Start Source Select Register"]
1238pub type Gtssr = crate::RegValueT<Gtssr_SPEC>;
1239
1240impl Gtssr {
1241    #[doc = "GTETRGA Pin Rising Input Source Counter Start Enable"]
1242    #[inline(always)]
1243    pub fn ssgtrgar(
1244        self,
1245    ) -> crate::common::RegisterField<
1246        0,
1247        0x1,
1248        1,
1249        0,
1250        gtssr::Ssgtrgar,
1251        gtssr::Ssgtrgar,
1252        Gtssr_SPEC,
1253        crate::common::RW,
1254    > {
1255        crate::common::RegisterField::<
1256            0,
1257            0x1,
1258            1,
1259            0,
1260            gtssr::Ssgtrgar,
1261            gtssr::Ssgtrgar,
1262            Gtssr_SPEC,
1263            crate::common::RW,
1264        >::from_register(self, 0)
1265    }
1266
1267    #[doc = "GTETRGA Pin Falling Input Source Counter Start Enable"]
1268    #[inline(always)]
1269    pub fn ssgtrgaf(
1270        self,
1271    ) -> crate::common::RegisterField<
1272        1,
1273        0x1,
1274        1,
1275        0,
1276        gtssr::Ssgtrgaf,
1277        gtssr::Ssgtrgaf,
1278        Gtssr_SPEC,
1279        crate::common::RW,
1280    > {
1281        crate::common::RegisterField::<
1282            1,
1283            0x1,
1284            1,
1285            0,
1286            gtssr::Ssgtrgaf,
1287            gtssr::Ssgtrgaf,
1288            Gtssr_SPEC,
1289            crate::common::RW,
1290        >::from_register(self, 0)
1291    }
1292
1293    #[doc = "GTETRGB Pin Rising Input Source Counter Start Enable"]
1294    #[inline(always)]
1295    pub fn ssgtrgbr(
1296        self,
1297    ) -> crate::common::RegisterField<
1298        2,
1299        0x1,
1300        1,
1301        0,
1302        gtssr::Ssgtrgbr,
1303        gtssr::Ssgtrgbr,
1304        Gtssr_SPEC,
1305        crate::common::RW,
1306    > {
1307        crate::common::RegisterField::<
1308            2,
1309            0x1,
1310            1,
1311            0,
1312            gtssr::Ssgtrgbr,
1313            gtssr::Ssgtrgbr,
1314            Gtssr_SPEC,
1315            crate::common::RW,
1316        >::from_register(self, 0)
1317    }
1318
1319    #[doc = "GTETRGB Pin Falling Input Source Counter Start Enable"]
1320    #[inline(always)]
1321    pub fn ssgtrgbf(
1322        self,
1323    ) -> crate::common::RegisterField<
1324        3,
1325        0x1,
1326        1,
1327        0,
1328        gtssr::Ssgtrgbf,
1329        gtssr::Ssgtrgbf,
1330        Gtssr_SPEC,
1331        crate::common::RW,
1332    > {
1333        crate::common::RegisterField::<
1334            3,
1335            0x1,
1336            1,
1337            0,
1338            gtssr::Ssgtrgbf,
1339            gtssr::Ssgtrgbf,
1340            Gtssr_SPEC,
1341            crate::common::RW,
1342        >::from_register(self, 0)
1343    }
1344
1345    #[doc = "GTETRGC Pin Rising Input Source Counter Start Enable"]
1346    #[inline(always)]
1347    pub fn ssgtrgcr(
1348        self,
1349    ) -> crate::common::RegisterField<
1350        4,
1351        0x1,
1352        1,
1353        0,
1354        gtssr::Ssgtrgcr,
1355        gtssr::Ssgtrgcr,
1356        Gtssr_SPEC,
1357        crate::common::RW,
1358    > {
1359        crate::common::RegisterField::<
1360            4,
1361            0x1,
1362            1,
1363            0,
1364            gtssr::Ssgtrgcr,
1365            gtssr::Ssgtrgcr,
1366            Gtssr_SPEC,
1367            crate::common::RW,
1368        >::from_register(self, 0)
1369    }
1370
1371    #[doc = "GTETRGC Pin Falling Input Source Counter Start Enable"]
1372    #[inline(always)]
1373    pub fn ssgtrgcf(
1374        self,
1375    ) -> crate::common::RegisterField<
1376        5,
1377        0x1,
1378        1,
1379        0,
1380        gtssr::Ssgtrgcf,
1381        gtssr::Ssgtrgcf,
1382        Gtssr_SPEC,
1383        crate::common::RW,
1384    > {
1385        crate::common::RegisterField::<
1386            5,
1387            0x1,
1388            1,
1389            0,
1390            gtssr::Ssgtrgcf,
1391            gtssr::Ssgtrgcf,
1392            Gtssr_SPEC,
1393            crate::common::RW,
1394        >::from_register(self, 0)
1395    }
1396
1397    #[doc = "GTETRGD Pin Rising Input Source Counter Start Enable"]
1398    #[inline(always)]
1399    pub fn ssgtrgdr(
1400        self,
1401    ) -> crate::common::RegisterField<
1402        6,
1403        0x1,
1404        1,
1405        0,
1406        gtssr::Ssgtrgdr,
1407        gtssr::Ssgtrgdr,
1408        Gtssr_SPEC,
1409        crate::common::RW,
1410    > {
1411        crate::common::RegisterField::<
1412            6,
1413            0x1,
1414            1,
1415            0,
1416            gtssr::Ssgtrgdr,
1417            gtssr::Ssgtrgdr,
1418            Gtssr_SPEC,
1419            crate::common::RW,
1420        >::from_register(self, 0)
1421    }
1422
1423    #[doc = "GTETRGD Pin Falling Input Source Counter Start Enable"]
1424    #[inline(always)]
1425    pub fn ssgtrgdf(
1426        self,
1427    ) -> crate::common::RegisterField<
1428        7,
1429        0x1,
1430        1,
1431        0,
1432        gtssr::Ssgtrgdf,
1433        gtssr::Ssgtrgdf,
1434        Gtssr_SPEC,
1435        crate::common::RW,
1436    > {
1437        crate::common::RegisterField::<
1438            7,
1439            0x1,
1440            1,
1441            0,
1442            gtssr::Ssgtrgdf,
1443            gtssr::Ssgtrgdf,
1444            Gtssr_SPEC,
1445            crate::common::RW,
1446        >::from_register(self, 0)
1447    }
1448
1449    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Start Enable"]
1450    #[inline(always)]
1451    pub fn sscarbl(
1452        self,
1453    ) -> crate::common::RegisterField<
1454        8,
1455        0x1,
1456        1,
1457        0,
1458        gtssr::Sscarbl,
1459        gtssr::Sscarbl,
1460        Gtssr_SPEC,
1461        crate::common::RW,
1462    > {
1463        crate::common::RegisterField::<
1464            8,
1465            0x1,
1466            1,
1467            0,
1468            gtssr::Sscarbl,
1469            gtssr::Sscarbl,
1470            Gtssr_SPEC,
1471            crate::common::RW,
1472        >::from_register(self, 0)
1473    }
1474
1475    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Start Enable"]
1476    #[inline(always)]
1477    pub fn sscarbh(
1478        self,
1479    ) -> crate::common::RegisterField<
1480        9,
1481        0x1,
1482        1,
1483        0,
1484        gtssr::Sscarbh,
1485        gtssr::Sscarbh,
1486        Gtssr_SPEC,
1487        crate::common::RW,
1488    > {
1489        crate::common::RegisterField::<
1490            9,
1491            0x1,
1492            1,
1493            0,
1494            gtssr::Sscarbh,
1495            gtssr::Sscarbh,
1496            Gtssr_SPEC,
1497            crate::common::RW,
1498        >::from_register(self, 0)
1499    }
1500
1501    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Start Enable"]
1502    #[inline(always)]
1503    pub fn sscafbl(
1504        self,
1505    ) -> crate::common::RegisterField<
1506        10,
1507        0x1,
1508        1,
1509        0,
1510        gtssr::Sscafbl,
1511        gtssr::Sscafbl,
1512        Gtssr_SPEC,
1513        crate::common::RW,
1514    > {
1515        crate::common::RegisterField::<
1516            10,
1517            0x1,
1518            1,
1519            0,
1520            gtssr::Sscafbl,
1521            gtssr::Sscafbl,
1522            Gtssr_SPEC,
1523            crate::common::RW,
1524        >::from_register(self, 0)
1525    }
1526
1527    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Start Enable"]
1528    #[inline(always)]
1529    pub fn sscafbh(
1530        self,
1531    ) -> crate::common::RegisterField<
1532        11,
1533        0x1,
1534        1,
1535        0,
1536        gtssr::Sscafbh,
1537        gtssr::Sscafbh,
1538        Gtssr_SPEC,
1539        crate::common::RW,
1540    > {
1541        crate::common::RegisterField::<
1542            11,
1543            0x1,
1544            1,
1545            0,
1546            gtssr::Sscafbh,
1547            gtssr::Sscafbh,
1548            Gtssr_SPEC,
1549            crate::common::RW,
1550        >::from_register(self, 0)
1551    }
1552
1553    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Start Enable"]
1554    #[inline(always)]
1555    pub fn sscbral(
1556        self,
1557    ) -> crate::common::RegisterField<
1558        12,
1559        0x1,
1560        1,
1561        0,
1562        gtssr::Sscbral,
1563        gtssr::Sscbral,
1564        Gtssr_SPEC,
1565        crate::common::RW,
1566    > {
1567        crate::common::RegisterField::<
1568            12,
1569            0x1,
1570            1,
1571            0,
1572            gtssr::Sscbral,
1573            gtssr::Sscbral,
1574            Gtssr_SPEC,
1575            crate::common::RW,
1576        >::from_register(self, 0)
1577    }
1578
1579    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Start Enable"]
1580    #[inline(always)]
1581    pub fn sscbrah(
1582        self,
1583    ) -> crate::common::RegisterField<
1584        13,
1585        0x1,
1586        1,
1587        0,
1588        gtssr::Sscbrah,
1589        gtssr::Sscbrah,
1590        Gtssr_SPEC,
1591        crate::common::RW,
1592    > {
1593        crate::common::RegisterField::<
1594            13,
1595            0x1,
1596            1,
1597            0,
1598            gtssr::Sscbrah,
1599            gtssr::Sscbrah,
1600            Gtssr_SPEC,
1601            crate::common::RW,
1602        >::from_register(self, 0)
1603    }
1604
1605    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Start Enable"]
1606    #[inline(always)]
1607    pub fn sscbfal(
1608        self,
1609    ) -> crate::common::RegisterField<
1610        14,
1611        0x1,
1612        1,
1613        0,
1614        gtssr::Sscbfal,
1615        gtssr::Sscbfal,
1616        Gtssr_SPEC,
1617        crate::common::RW,
1618    > {
1619        crate::common::RegisterField::<
1620            14,
1621            0x1,
1622            1,
1623            0,
1624            gtssr::Sscbfal,
1625            gtssr::Sscbfal,
1626            Gtssr_SPEC,
1627            crate::common::RW,
1628        >::from_register(self, 0)
1629    }
1630
1631    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Start Enable"]
1632    #[inline(always)]
1633    pub fn sscbfah(
1634        self,
1635    ) -> crate::common::RegisterField<
1636        15,
1637        0x1,
1638        1,
1639        0,
1640        gtssr::Sscbfah,
1641        gtssr::Sscbfah,
1642        Gtssr_SPEC,
1643        crate::common::RW,
1644    > {
1645        crate::common::RegisterField::<
1646            15,
1647            0x1,
1648            1,
1649            0,
1650            gtssr::Sscbfah,
1651            gtssr::Sscbfah,
1652            Gtssr_SPEC,
1653            crate::common::RW,
1654        >::from_register(self, 0)
1655    }
1656
1657    #[doc = "ELC_GPTA Event Source Counter Start Enable"]
1658    #[inline(always)]
1659    pub fn sselca(
1660        self,
1661    ) -> crate::common::RegisterField<
1662        16,
1663        0x1,
1664        1,
1665        0,
1666        gtssr::Sselca,
1667        gtssr::Sselca,
1668        Gtssr_SPEC,
1669        crate::common::RW,
1670    > {
1671        crate::common::RegisterField::<
1672            16,
1673            0x1,
1674            1,
1675            0,
1676            gtssr::Sselca,
1677            gtssr::Sselca,
1678            Gtssr_SPEC,
1679            crate::common::RW,
1680        >::from_register(self, 0)
1681    }
1682
1683    #[doc = "ELC_GPTB Event Source Counter Start Enable"]
1684    #[inline(always)]
1685    pub fn sselcb(
1686        self,
1687    ) -> crate::common::RegisterField<
1688        17,
1689        0x1,
1690        1,
1691        0,
1692        gtssr::Sselcb,
1693        gtssr::Sselcb,
1694        Gtssr_SPEC,
1695        crate::common::RW,
1696    > {
1697        crate::common::RegisterField::<
1698            17,
1699            0x1,
1700            1,
1701            0,
1702            gtssr::Sselcb,
1703            gtssr::Sselcb,
1704            Gtssr_SPEC,
1705            crate::common::RW,
1706        >::from_register(self, 0)
1707    }
1708
1709    #[doc = "ELC_GPTC Event Source Counter Start Enable"]
1710    #[inline(always)]
1711    pub fn sselcc(
1712        self,
1713    ) -> crate::common::RegisterField<
1714        18,
1715        0x1,
1716        1,
1717        0,
1718        gtssr::Sselcc,
1719        gtssr::Sselcc,
1720        Gtssr_SPEC,
1721        crate::common::RW,
1722    > {
1723        crate::common::RegisterField::<
1724            18,
1725            0x1,
1726            1,
1727            0,
1728            gtssr::Sselcc,
1729            gtssr::Sselcc,
1730            Gtssr_SPEC,
1731            crate::common::RW,
1732        >::from_register(self, 0)
1733    }
1734
1735    #[doc = "ELC_GPTD Event Source Counter Start Enable"]
1736    #[inline(always)]
1737    pub fn sselcd(
1738        self,
1739    ) -> crate::common::RegisterField<
1740        19,
1741        0x1,
1742        1,
1743        0,
1744        gtssr::Sselcd,
1745        gtssr::Sselcd,
1746        Gtssr_SPEC,
1747        crate::common::RW,
1748    > {
1749        crate::common::RegisterField::<
1750            19,
1751            0x1,
1752            1,
1753            0,
1754            gtssr::Sselcd,
1755            gtssr::Sselcd,
1756            Gtssr_SPEC,
1757            crate::common::RW,
1758        >::from_register(self, 0)
1759    }
1760
1761    #[doc = "ELC_GPTE Event Source Counter Start Enable"]
1762    #[inline(always)]
1763    pub fn sselce(
1764        self,
1765    ) -> crate::common::RegisterField<
1766        20,
1767        0x1,
1768        1,
1769        0,
1770        gtssr::Sselce,
1771        gtssr::Sselce,
1772        Gtssr_SPEC,
1773        crate::common::RW,
1774    > {
1775        crate::common::RegisterField::<
1776            20,
1777            0x1,
1778            1,
1779            0,
1780            gtssr::Sselce,
1781            gtssr::Sselce,
1782            Gtssr_SPEC,
1783            crate::common::RW,
1784        >::from_register(self, 0)
1785    }
1786
1787    #[doc = "ELC_GPTF Event Source Counter Start Enable"]
1788    #[inline(always)]
1789    pub fn sselcf(
1790        self,
1791    ) -> crate::common::RegisterField<
1792        21,
1793        0x1,
1794        1,
1795        0,
1796        gtssr::Sselcf,
1797        gtssr::Sselcf,
1798        Gtssr_SPEC,
1799        crate::common::RW,
1800    > {
1801        crate::common::RegisterField::<
1802            21,
1803            0x1,
1804            1,
1805            0,
1806            gtssr::Sselcf,
1807            gtssr::Sselcf,
1808            Gtssr_SPEC,
1809            crate::common::RW,
1810        >::from_register(self, 0)
1811    }
1812
1813    #[doc = "ELC_GPTG Event Source Counter Start Enable"]
1814    #[inline(always)]
1815    pub fn sselcg(
1816        self,
1817    ) -> crate::common::RegisterField<
1818        22,
1819        0x1,
1820        1,
1821        0,
1822        gtssr::Sselcg,
1823        gtssr::Sselcg,
1824        Gtssr_SPEC,
1825        crate::common::RW,
1826    > {
1827        crate::common::RegisterField::<
1828            22,
1829            0x1,
1830            1,
1831            0,
1832            gtssr::Sselcg,
1833            gtssr::Sselcg,
1834            Gtssr_SPEC,
1835            crate::common::RW,
1836        >::from_register(self, 0)
1837    }
1838
1839    #[doc = "ELC_GPTH Event Source Counter Start Enable"]
1840    #[inline(always)]
1841    pub fn sselch(
1842        self,
1843    ) -> crate::common::RegisterField<
1844        23,
1845        0x1,
1846        1,
1847        0,
1848        gtssr::Sselch,
1849        gtssr::Sselch,
1850        Gtssr_SPEC,
1851        crate::common::RW,
1852    > {
1853        crate::common::RegisterField::<
1854            23,
1855            0x1,
1856            1,
1857            0,
1858            gtssr::Sselch,
1859            gtssr::Sselch,
1860            Gtssr_SPEC,
1861            crate::common::RW,
1862        >::from_register(self, 0)
1863    }
1864
1865    #[doc = "Software Source Counter Start Enable"]
1866    #[inline(always)]
1867    pub fn cstrt(
1868        self,
1869    ) -> crate::common::RegisterField<
1870        31,
1871        0x1,
1872        1,
1873        0,
1874        gtssr::Cstrt,
1875        gtssr::Cstrt,
1876        Gtssr_SPEC,
1877        crate::common::RW,
1878    > {
1879        crate::common::RegisterField::<
1880            31,
1881            0x1,
1882            1,
1883            0,
1884            gtssr::Cstrt,
1885            gtssr::Cstrt,
1886            Gtssr_SPEC,
1887            crate::common::RW,
1888        >::from_register(self, 0)
1889    }
1890}
1891impl ::core::default::Default for Gtssr {
1892    #[inline(always)]
1893    fn default() -> Gtssr {
1894        <crate::RegValueT<Gtssr_SPEC> as RegisterValue<_>>::new(0)
1895    }
1896}
1897pub mod gtssr {
1898
1899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1900    pub struct Ssgtrgar_SPEC;
1901    pub type Ssgtrgar = crate::EnumBitfieldStruct<u8, Ssgtrgar_SPEC>;
1902    impl Ssgtrgar {
1903        #[doc = "Counter start disabled on the rising edge of GTETRGA input"]
1904        pub const _0: Self = Self::new(0);
1905
1906        #[doc = "Counter start enabled on the rising edge of GTETRGA input"]
1907        pub const _1: Self = Self::new(1);
1908    }
1909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1910    pub struct Ssgtrgaf_SPEC;
1911    pub type Ssgtrgaf = crate::EnumBitfieldStruct<u8, Ssgtrgaf_SPEC>;
1912    impl Ssgtrgaf {
1913        #[doc = "Counter start disabled on the falling edge of GTETRGA input"]
1914        pub const _0: Self = Self::new(0);
1915
1916        #[doc = "Counter start enabled on the falling edge of GTETRGA input"]
1917        pub const _1: Self = Self::new(1);
1918    }
1919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1920    pub struct Ssgtrgbr_SPEC;
1921    pub type Ssgtrgbr = crate::EnumBitfieldStruct<u8, Ssgtrgbr_SPEC>;
1922    impl Ssgtrgbr {
1923        #[doc = "Counter start disabled on the rising edge of GTETRGB input"]
1924        pub const _0: Self = Self::new(0);
1925
1926        #[doc = "Counter start enabled on the rising edge of GTETRGB input"]
1927        pub const _1: Self = Self::new(1);
1928    }
1929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1930    pub struct Ssgtrgbf_SPEC;
1931    pub type Ssgtrgbf = crate::EnumBitfieldStruct<u8, Ssgtrgbf_SPEC>;
1932    impl Ssgtrgbf {
1933        #[doc = "Counter start disabled on the falling edge of GTETRGB input"]
1934        pub const _0: Self = Self::new(0);
1935
1936        #[doc = "Counter start enabled on the falling edge of GTETRGB input"]
1937        pub const _1: Self = Self::new(1);
1938    }
1939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1940    pub struct Ssgtrgcr_SPEC;
1941    pub type Ssgtrgcr = crate::EnumBitfieldStruct<u8, Ssgtrgcr_SPEC>;
1942    impl Ssgtrgcr {
1943        #[doc = "Counter start disabled on the rising edge of GTETRGC input"]
1944        pub const _0: Self = Self::new(0);
1945
1946        #[doc = "Counter start enabled on the rising edge of GTETRGC input"]
1947        pub const _1: Self = Self::new(1);
1948    }
1949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1950    pub struct Ssgtrgcf_SPEC;
1951    pub type Ssgtrgcf = crate::EnumBitfieldStruct<u8, Ssgtrgcf_SPEC>;
1952    impl Ssgtrgcf {
1953        #[doc = "Counter start disabled on the falling edge of GTETRGC input"]
1954        pub const _0: Self = Self::new(0);
1955
1956        #[doc = "Counter start enabled on the falling edge of GTETRGC input"]
1957        pub const _1: Self = Self::new(1);
1958    }
1959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1960    pub struct Ssgtrgdr_SPEC;
1961    pub type Ssgtrgdr = crate::EnumBitfieldStruct<u8, Ssgtrgdr_SPEC>;
1962    impl Ssgtrgdr {
1963        #[doc = "Counter start disabled on the rising edge of GTETRGD input"]
1964        pub const _0: Self = Self::new(0);
1965
1966        #[doc = "Counter start enabled on the rising edge of GTETRGD input"]
1967        pub const _1: Self = Self::new(1);
1968    }
1969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1970    pub struct Ssgtrgdf_SPEC;
1971    pub type Ssgtrgdf = crate::EnumBitfieldStruct<u8, Ssgtrgdf_SPEC>;
1972    impl Ssgtrgdf {
1973        #[doc = "Counter start disabled on the falling edge of GTETRGD input"]
1974        pub const _0: Self = Self::new(0);
1975
1976        #[doc = "Counter start enabled on the falling edge of GTETRGD input"]
1977        pub const _1: Self = Self::new(1);
1978    }
1979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1980    pub struct Sscarbl_SPEC;
1981    pub type Sscarbl = crate::EnumBitfieldStruct<u8, Sscarbl_SPEC>;
1982    impl Sscarbl {
1983        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
1984        pub const _0: Self = Self::new(0);
1985
1986        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
1987        pub const _1: Self = Self::new(1);
1988    }
1989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1990    pub struct Sscarbh_SPEC;
1991    pub type Sscarbh = crate::EnumBitfieldStruct<u8, Sscarbh_SPEC>;
1992    impl Sscarbh {
1993        #[doc = "Counter start disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
1994        pub const _0: Self = Self::new(0);
1995
1996        #[doc = "Counter start enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
1997        pub const _1: Self = Self::new(1);
1998    }
1999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2000    pub struct Sscafbl_SPEC;
2001    pub type Sscafbl = crate::EnumBitfieldStruct<u8, Sscafbl_SPEC>;
2002    impl Sscafbl {
2003        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2004        pub const _0: Self = Self::new(0);
2005
2006        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2007        pub const _1: Self = Self::new(1);
2008    }
2009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2010    pub struct Sscafbh_SPEC;
2011    pub type Sscafbh = crate::EnumBitfieldStruct<u8, Sscafbh_SPEC>;
2012    impl Sscafbh {
2013        #[doc = "Counter start disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2014        pub const _0: Self = Self::new(0);
2015
2016        #[doc = "Counter start enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2017        pub const _1: Self = Self::new(1);
2018    }
2019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2020    pub struct Sscbral_SPEC;
2021    pub type Sscbral = crate::EnumBitfieldStruct<u8, Sscbral_SPEC>;
2022    impl Sscbral {
2023        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2024        pub const _0: Self = Self::new(0);
2025
2026        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2027        pub const _1: Self = Self::new(1);
2028    }
2029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2030    pub struct Sscbrah_SPEC;
2031    pub type Sscbrah = crate::EnumBitfieldStruct<u8, Sscbrah_SPEC>;
2032    impl Sscbrah {
2033        #[doc = "Counter start disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2034        pub const _0: Self = Self::new(0);
2035
2036        #[doc = "Counter start enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2037        pub const _1: Self = Self::new(1);
2038    }
2039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2040    pub struct Sscbfal_SPEC;
2041    pub type Sscbfal = crate::EnumBitfieldStruct<u8, Sscbfal_SPEC>;
2042    impl Sscbfal {
2043        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2044        pub const _0: Self = Self::new(0);
2045
2046        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2047        pub const _1: Self = Self::new(1);
2048    }
2049    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2050    pub struct Sscbfah_SPEC;
2051    pub type Sscbfah = crate::EnumBitfieldStruct<u8, Sscbfah_SPEC>;
2052    impl Sscbfah {
2053        #[doc = "Counter start disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2054        pub const _0: Self = Self::new(0);
2055
2056        #[doc = "Counter start enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2057        pub const _1: Self = Self::new(1);
2058    }
2059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2060    pub struct Sselca_SPEC;
2061    pub type Sselca = crate::EnumBitfieldStruct<u8, Sselca_SPEC>;
2062    impl Sselca {
2063        #[doc = "Counter start disabled at the ELC_GPTA input"]
2064        pub const _0: Self = Self::new(0);
2065
2066        #[doc = "Counter start enabled at the ELC_GPTA input"]
2067        pub const _1: Self = Self::new(1);
2068    }
2069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2070    pub struct Sselcb_SPEC;
2071    pub type Sselcb = crate::EnumBitfieldStruct<u8, Sselcb_SPEC>;
2072    impl Sselcb {
2073        #[doc = "Counter start disabled at the ELC_GPTB input"]
2074        pub const _0: Self = Self::new(0);
2075
2076        #[doc = "Counter start enabled at the ELC_GPTB input"]
2077        pub const _1: Self = Self::new(1);
2078    }
2079    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2080    pub struct Sselcc_SPEC;
2081    pub type Sselcc = crate::EnumBitfieldStruct<u8, Sselcc_SPEC>;
2082    impl Sselcc {
2083        #[doc = "Counter start disabled at the ELC_GPTC input"]
2084        pub const _0: Self = Self::new(0);
2085
2086        #[doc = "Counter start enabled at the ELC_GPTC input"]
2087        pub const _1: Self = Self::new(1);
2088    }
2089    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2090    pub struct Sselcd_SPEC;
2091    pub type Sselcd = crate::EnumBitfieldStruct<u8, Sselcd_SPEC>;
2092    impl Sselcd {
2093        #[doc = "Counter start disabled at the ELC_GPTD input"]
2094        pub const _0: Self = Self::new(0);
2095
2096        #[doc = "Counter start enabled at the ELC_GPTD input"]
2097        pub const _1: Self = Self::new(1);
2098    }
2099    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2100    pub struct Sselce_SPEC;
2101    pub type Sselce = crate::EnumBitfieldStruct<u8, Sselce_SPEC>;
2102    impl Sselce {
2103        #[doc = "Counter start disabled at the ELC_GPTE input"]
2104        pub const _0: Self = Self::new(0);
2105
2106        #[doc = "Counter start enabled at the ELC_GPTE input"]
2107        pub const _1: Self = Self::new(1);
2108    }
2109    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2110    pub struct Sselcf_SPEC;
2111    pub type Sselcf = crate::EnumBitfieldStruct<u8, Sselcf_SPEC>;
2112    impl Sselcf {
2113        #[doc = "Counter start disabled at the ELC_GPTF input"]
2114        pub const _0: Self = Self::new(0);
2115
2116        #[doc = "Counter start enabled at the ELC_GPTF input"]
2117        pub const _1: Self = Self::new(1);
2118    }
2119    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2120    pub struct Sselcg_SPEC;
2121    pub type Sselcg = crate::EnumBitfieldStruct<u8, Sselcg_SPEC>;
2122    impl Sselcg {
2123        #[doc = "Counter start disabled at the ELC_GPTG input"]
2124        pub const _0: Self = Self::new(0);
2125
2126        #[doc = "Counter start enabled at the ELC_GPTG input"]
2127        pub const _1: Self = Self::new(1);
2128    }
2129    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2130    pub struct Sselch_SPEC;
2131    pub type Sselch = crate::EnumBitfieldStruct<u8, Sselch_SPEC>;
2132    impl Sselch {
2133        #[doc = "Counter start disabled at the ELC_GPTH input"]
2134        pub const _0: Self = Self::new(0);
2135
2136        #[doc = "Counter start enabled at the ELC_GPTH input"]
2137        pub const _1: Self = Self::new(1);
2138    }
2139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2140    pub struct Cstrt_SPEC;
2141    pub type Cstrt = crate::EnumBitfieldStruct<u8, Cstrt_SPEC>;
2142    impl Cstrt {
2143        #[doc = "Counter start disabled by the GTSTR register"]
2144        pub const _0: Self = Self::new(0);
2145
2146        #[doc = "Counter start enabled by the GTSTR register"]
2147        pub const _1: Self = Self::new(1);
2148    }
2149}
2150#[doc(hidden)]
2151#[derive(Copy, Clone, Eq, PartialEq)]
2152pub struct Gtpsr_SPEC;
2153impl crate::sealed::RegSpec for Gtpsr_SPEC {
2154    type DataType = u32;
2155}
2156
2157#[doc = "General PWM Timer Stop Source Select Register"]
2158pub type Gtpsr = crate::RegValueT<Gtpsr_SPEC>;
2159
2160impl Gtpsr {
2161    #[doc = "GTETRGA Pin Rising Input Source Counter Stop Enable"]
2162    #[inline(always)]
2163    pub fn psgtrgar(
2164        self,
2165    ) -> crate::common::RegisterField<
2166        0,
2167        0x1,
2168        1,
2169        0,
2170        gtpsr::Psgtrgar,
2171        gtpsr::Psgtrgar,
2172        Gtpsr_SPEC,
2173        crate::common::RW,
2174    > {
2175        crate::common::RegisterField::<
2176            0,
2177            0x1,
2178            1,
2179            0,
2180            gtpsr::Psgtrgar,
2181            gtpsr::Psgtrgar,
2182            Gtpsr_SPEC,
2183            crate::common::RW,
2184        >::from_register(self, 0)
2185    }
2186
2187    #[doc = "GTETRGA Pin Falling Input Source Counter Stop Enable"]
2188    #[inline(always)]
2189    pub fn psgtrgaf(
2190        self,
2191    ) -> crate::common::RegisterField<
2192        1,
2193        0x1,
2194        1,
2195        0,
2196        gtpsr::Psgtrgaf,
2197        gtpsr::Psgtrgaf,
2198        Gtpsr_SPEC,
2199        crate::common::RW,
2200    > {
2201        crate::common::RegisterField::<
2202            1,
2203            0x1,
2204            1,
2205            0,
2206            gtpsr::Psgtrgaf,
2207            gtpsr::Psgtrgaf,
2208            Gtpsr_SPEC,
2209            crate::common::RW,
2210        >::from_register(self, 0)
2211    }
2212
2213    #[doc = "GTETRGB Pin Rising Input Source Counter Stop Enable"]
2214    #[inline(always)]
2215    pub fn psgtrgbr(
2216        self,
2217    ) -> crate::common::RegisterField<
2218        2,
2219        0x1,
2220        1,
2221        0,
2222        gtpsr::Psgtrgbr,
2223        gtpsr::Psgtrgbr,
2224        Gtpsr_SPEC,
2225        crate::common::RW,
2226    > {
2227        crate::common::RegisterField::<
2228            2,
2229            0x1,
2230            1,
2231            0,
2232            gtpsr::Psgtrgbr,
2233            gtpsr::Psgtrgbr,
2234            Gtpsr_SPEC,
2235            crate::common::RW,
2236        >::from_register(self, 0)
2237    }
2238
2239    #[doc = "GTETRGB Pin Falling Input Source Counter Stop Enable"]
2240    #[inline(always)]
2241    pub fn psgtrgbf(
2242        self,
2243    ) -> crate::common::RegisterField<
2244        3,
2245        0x1,
2246        1,
2247        0,
2248        gtpsr::Psgtrgbf,
2249        gtpsr::Psgtrgbf,
2250        Gtpsr_SPEC,
2251        crate::common::RW,
2252    > {
2253        crate::common::RegisterField::<
2254            3,
2255            0x1,
2256            1,
2257            0,
2258            gtpsr::Psgtrgbf,
2259            gtpsr::Psgtrgbf,
2260            Gtpsr_SPEC,
2261            crate::common::RW,
2262        >::from_register(self, 0)
2263    }
2264
2265    #[doc = "GTETRGC Pin Rising Input Source Counter Stop Enable"]
2266    #[inline(always)]
2267    pub fn psgtrgcr(
2268        self,
2269    ) -> crate::common::RegisterField<
2270        4,
2271        0x1,
2272        1,
2273        0,
2274        gtpsr::Psgtrgcr,
2275        gtpsr::Psgtrgcr,
2276        Gtpsr_SPEC,
2277        crate::common::RW,
2278    > {
2279        crate::common::RegisterField::<
2280            4,
2281            0x1,
2282            1,
2283            0,
2284            gtpsr::Psgtrgcr,
2285            gtpsr::Psgtrgcr,
2286            Gtpsr_SPEC,
2287            crate::common::RW,
2288        >::from_register(self, 0)
2289    }
2290
2291    #[doc = "GTETRGC Pin Falling Input Source Counter Stop Enable"]
2292    #[inline(always)]
2293    pub fn psgtrgcf(
2294        self,
2295    ) -> crate::common::RegisterField<
2296        5,
2297        0x1,
2298        1,
2299        0,
2300        gtpsr::Psgtrgcf,
2301        gtpsr::Psgtrgcf,
2302        Gtpsr_SPEC,
2303        crate::common::RW,
2304    > {
2305        crate::common::RegisterField::<
2306            5,
2307            0x1,
2308            1,
2309            0,
2310            gtpsr::Psgtrgcf,
2311            gtpsr::Psgtrgcf,
2312            Gtpsr_SPEC,
2313            crate::common::RW,
2314        >::from_register(self, 0)
2315    }
2316
2317    #[doc = "GTETRGD Pin Rising Input Source Counter Stop Enable"]
2318    #[inline(always)]
2319    pub fn psgtrgdr(
2320        self,
2321    ) -> crate::common::RegisterField<
2322        6,
2323        0x1,
2324        1,
2325        0,
2326        gtpsr::Psgtrgdr,
2327        gtpsr::Psgtrgdr,
2328        Gtpsr_SPEC,
2329        crate::common::RW,
2330    > {
2331        crate::common::RegisterField::<
2332            6,
2333            0x1,
2334            1,
2335            0,
2336            gtpsr::Psgtrgdr,
2337            gtpsr::Psgtrgdr,
2338            Gtpsr_SPEC,
2339            crate::common::RW,
2340        >::from_register(self, 0)
2341    }
2342
2343    #[doc = "GTETRGD Pin Falling Input Source Counter Stop Enable"]
2344    #[inline(always)]
2345    pub fn psgtrgdf(
2346        self,
2347    ) -> crate::common::RegisterField<
2348        7,
2349        0x1,
2350        1,
2351        0,
2352        gtpsr::Psgtrgdf,
2353        gtpsr::Psgtrgdf,
2354        Gtpsr_SPEC,
2355        crate::common::RW,
2356    > {
2357        crate::common::RegisterField::<
2358            7,
2359            0x1,
2360            1,
2361            0,
2362            gtpsr::Psgtrgdf,
2363            gtpsr::Psgtrgdf,
2364            Gtpsr_SPEC,
2365            crate::common::RW,
2366        >::from_register(self, 0)
2367    }
2368
2369    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Stop Enable"]
2370    #[inline(always)]
2371    pub fn pscarbl(
2372        self,
2373    ) -> crate::common::RegisterField<
2374        8,
2375        0x1,
2376        1,
2377        0,
2378        gtpsr::Pscarbl,
2379        gtpsr::Pscarbl,
2380        Gtpsr_SPEC,
2381        crate::common::RW,
2382    > {
2383        crate::common::RegisterField::<
2384            8,
2385            0x1,
2386            1,
2387            0,
2388            gtpsr::Pscarbl,
2389            gtpsr::Pscarbl,
2390            Gtpsr_SPEC,
2391            crate::common::RW,
2392        >::from_register(self, 0)
2393    }
2394
2395    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Stop Enable"]
2396    #[inline(always)]
2397    pub fn pscarbh(
2398        self,
2399    ) -> crate::common::RegisterField<
2400        9,
2401        0x1,
2402        1,
2403        0,
2404        gtpsr::Pscarbh,
2405        gtpsr::Pscarbh,
2406        Gtpsr_SPEC,
2407        crate::common::RW,
2408    > {
2409        crate::common::RegisterField::<
2410            9,
2411            0x1,
2412            1,
2413            0,
2414            gtpsr::Pscarbh,
2415            gtpsr::Pscarbh,
2416            Gtpsr_SPEC,
2417            crate::common::RW,
2418        >::from_register(self, 0)
2419    }
2420
2421    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Stop Enable"]
2422    #[inline(always)]
2423    pub fn pscafbl(
2424        self,
2425    ) -> crate::common::RegisterField<
2426        10,
2427        0x1,
2428        1,
2429        0,
2430        gtpsr::Pscafbl,
2431        gtpsr::Pscafbl,
2432        Gtpsr_SPEC,
2433        crate::common::RW,
2434    > {
2435        crate::common::RegisterField::<
2436            10,
2437            0x1,
2438            1,
2439            0,
2440            gtpsr::Pscafbl,
2441            gtpsr::Pscafbl,
2442            Gtpsr_SPEC,
2443            crate::common::RW,
2444        >::from_register(self, 0)
2445    }
2446
2447    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Stop Enable"]
2448    #[inline(always)]
2449    pub fn pscafbh(
2450        self,
2451    ) -> crate::common::RegisterField<
2452        11,
2453        0x1,
2454        1,
2455        0,
2456        gtpsr::Pscafbh,
2457        gtpsr::Pscafbh,
2458        Gtpsr_SPEC,
2459        crate::common::RW,
2460    > {
2461        crate::common::RegisterField::<
2462            11,
2463            0x1,
2464            1,
2465            0,
2466            gtpsr::Pscafbh,
2467            gtpsr::Pscafbh,
2468            Gtpsr_SPEC,
2469            crate::common::RW,
2470        >::from_register(self, 0)
2471    }
2472
2473    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Stop Enable"]
2474    #[inline(always)]
2475    pub fn pscbral(
2476        self,
2477    ) -> crate::common::RegisterField<
2478        12,
2479        0x1,
2480        1,
2481        0,
2482        gtpsr::Pscbral,
2483        gtpsr::Pscbral,
2484        Gtpsr_SPEC,
2485        crate::common::RW,
2486    > {
2487        crate::common::RegisterField::<
2488            12,
2489            0x1,
2490            1,
2491            0,
2492            gtpsr::Pscbral,
2493            gtpsr::Pscbral,
2494            Gtpsr_SPEC,
2495            crate::common::RW,
2496        >::from_register(self, 0)
2497    }
2498
2499    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Stop Enable"]
2500    #[inline(always)]
2501    pub fn pscbrah(
2502        self,
2503    ) -> crate::common::RegisterField<
2504        13,
2505        0x1,
2506        1,
2507        0,
2508        gtpsr::Pscbrah,
2509        gtpsr::Pscbrah,
2510        Gtpsr_SPEC,
2511        crate::common::RW,
2512    > {
2513        crate::common::RegisterField::<
2514            13,
2515            0x1,
2516            1,
2517            0,
2518            gtpsr::Pscbrah,
2519            gtpsr::Pscbrah,
2520            Gtpsr_SPEC,
2521            crate::common::RW,
2522        >::from_register(self, 0)
2523    }
2524
2525    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Stop Enable"]
2526    #[inline(always)]
2527    pub fn pscbfal(
2528        self,
2529    ) -> crate::common::RegisterField<
2530        14,
2531        0x1,
2532        1,
2533        0,
2534        gtpsr::Pscbfal,
2535        gtpsr::Pscbfal,
2536        Gtpsr_SPEC,
2537        crate::common::RW,
2538    > {
2539        crate::common::RegisterField::<
2540            14,
2541            0x1,
2542            1,
2543            0,
2544            gtpsr::Pscbfal,
2545            gtpsr::Pscbfal,
2546            Gtpsr_SPEC,
2547            crate::common::RW,
2548        >::from_register(self, 0)
2549    }
2550
2551    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Stop Enable"]
2552    #[inline(always)]
2553    pub fn pscbfah(
2554        self,
2555    ) -> crate::common::RegisterField<
2556        15,
2557        0x1,
2558        1,
2559        0,
2560        gtpsr::Pscbfah,
2561        gtpsr::Pscbfah,
2562        Gtpsr_SPEC,
2563        crate::common::RW,
2564    > {
2565        crate::common::RegisterField::<
2566            15,
2567            0x1,
2568            1,
2569            0,
2570            gtpsr::Pscbfah,
2571            gtpsr::Pscbfah,
2572            Gtpsr_SPEC,
2573            crate::common::RW,
2574        >::from_register(self, 0)
2575    }
2576
2577    #[doc = "ELC_GPTA Event Source Counter Stop Enable"]
2578    #[inline(always)]
2579    pub fn pselca(
2580        self,
2581    ) -> crate::common::RegisterField<
2582        16,
2583        0x1,
2584        1,
2585        0,
2586        gtpsr::Pselca,
2587        gtpsr::Pselca,
2588        Gtpsr_SPEC,
2589        crate::common::RW,
2590    > {
2591        crate::common::RegisterField::<
2592            16,
2593            0x1,
2594            1,
2595            0,
2596            gtpsr::Pselca,
2597            gtpsr::Pselca,
2598            Gtpsr_SPEC,
2599            crate::common::RW,
2600        >::from_register(self, 0)
2601    }
2602
2603    #[doc = "ELC_GPTB Event Source Counter Stop Enable"]
2604    #[inline(always)]
2605    pub fn pselcb(
2606        self,
2607    ) -> crate::common::RegisterField<
2608        17,
2609        0x1,
2610        1,
2611        0,
2612        gtpsr::Pselcb,
2613        gtpsr::Pselcb,
2614        Gtpsr_SPEC,
2615        crate::common::RW,
2616    > {
2617        crate::common::RegisterField::<
2618            17,
2619            0x1,
2620            1,
2621            0,
2622            gtpsr::Pselcb,
2623            gtpsr::Pselcb,
2624            Gtpsr_SPEC,
2625            crate::common::RW,
2626        >::from_register(self, 0)
2627    }
2628
2629    #[doc = "ELC_GPTC Event Source Counter Stop Enable"]
2630    #[inline(always)]
2631    pub fn pselcc(
2632        self,
2633    ) -> crate::common::RegisterField<
2634        18,
2635        0x1,
2636        1,
2637        0,
2638        gtpsr::Pselcc,
2639        gtpsr::Pselcc,
2640        Gtpsr_SPEC,
2641        crate::common::RW,
2642    > {
2643        crate::common::RegisterField::<
2644            18,
2645            0x1,
2646            1,
2647            0,
2648            gtpsr::Pselcc,
2649            gtpsr::Pselcc,
2650            Gtpsr_SPEC,
2651            crate::common::RW,
2652        >::from_register(self, 0)
2653    }
2654
2655    #[doc = "ELC_GPTD Event Source Counter Stop Enable"]
2656    #[inline(always)]
2657    pub fn pselcd(
2658        self,
2659    ) -> crate::common::RegisterField<
2660        19,
2661        0x1,
2662        1,
2663        0,
2664        gtpsr::Pselcd,
2665        gtpsr::Pselcd,
2666        Gtpsr_SPEC,
2667        crate::common::RW,
2668    > {
2669        crate::common::RegisterField::<
2670            19,
2671            0x1,
2672            1,
2673            0,
2674            gtpsr::Pselcd,
2675            gtpsr::Pselcd,
2676            Gtpsr_SPEC,
2677            crate::common::RW,
2678        >::from_register(self, 0)
2679    }
2680
2681    #[doc = "ELC_GPTE Event Source Counter Stop Enable"]
2682    #[inline(always)]
2683    pub fn pselce(
2684        self,
2685    ) -> crate::common::RegisterField<
2686        20,
2687        0x1,
2688        1,
2689        0,
2690        gtpsr::Pselce,
2691        gtpsr::Pselce,
2692        Gtpsr_SPEC,
2693        crate::common::RW,
2694    > {
2695        crate::common::RegisterField::<
2696            20,
2697            0x1,
2698            1,
2699            0,
2700            gtpsr::Pselce,
2701            gtpsr::Pselce,
2702            Gtpsr_SPEC,
2703            crate::common::RW,
2704        >::from_register(self, 0)
2705    }
2706
2707    #[doc = "ELC_GPTF Event Source Counter Stop Enable"]
2708    #[inline(always)]
2709    pub fn pselcf(
2710        self,
2711    ) -> crate::common::RegisterField<
2712        21,
2713        0x1,
2714        1,
2715        0,
2716        gtpsr::Pselcf,
2717        gtpsr::Pselcf,
2718        Gtpsr_SPEC,
2719        crate::common::RW,
2720    > {
2721        crate::common::RegisterField::<
2722            21,
2723            0x1,
2724            1,
2725            0,
2726            gtpsr::Pselcf,
2727            gtpsr::Pselcf,
2728            Gtpsr_SPEC,
2729            crate::common::RW,
2730        >::from_register(self, 0)
2731    }
2732
2733    #[doc = "ELC_GPTG Event Source Counter Stop Enable"]
2734    #[inline(always)]
2735    pub fn pselcg(
2736        self,
2737    ) -> crate::common::RegisterField<
2738        22,
2739        0x1,
2740        1,
2741        0,
2742        gtpsr::Pselcg,
2743        gtpsr::Pselcg,
2744        Gtpsr_SPEC,
2745        crate::common::RW,
2746    > {
2747        crate::common::RegisterField::<
2748            22,
2749            0x1,
2750            1,
2751            0,
2752            gtpsr::Pselcg,
2753            gtpsr::Pselcg,
2754            Gtpsr_SPEC,
2755            crate::common::RW,
2756        >::from_register(self, 0)
2757    }
2758
2759    #[doc = "ELC_GPTH Event Source Counter Stop Enable"]
2760    #[inline(always)]
2761    pub fn pselch(
2762        self,
2763    ) -> crate::common::RegisterField<
2764        23,
2765        0x1,
2766        1,
2767        0,
2768        gtpsr::Pselch,
2769        gtpsr::Pselch,
2770        Gtpsr_SPEC,
2771        crate::common::RW,
2772    > {
2773        crate::common::RegisterField::<
2774            23,
2775            0x1,
2776            1,
2777            0,
2778            gtpsr::Pselch,
2779            gtpsr::Pselch,
2780            Gtpsr_SPEC,
2781            crate::common::RW,
2782        >::from_register(self, 0)
2783    }
2784
2785    #[doc = "Software Source Counter Stop Enable"]
2786    #[inline(always)]
2787    pub fn cstop(
2788        self,
2789    ) -> crate::common::RegisterField<
2790        31,
2791        0x1,
2792        1,
2793        0,
2794        gtpsr::Cstop,
2795        gtpsr::Cstop,
2796        Gtpsr_SPEC,
2797        crate::common::RW,
2798    > {
2799        crate::common::RegisterField::<
2800            31,
2801            0x1,
2802            1,
2803            0,
2804            gtpsr::Cstop,
2805            gtpsr::Cstop,
2806            Gtpsr_SPEC,
2807            crate::common::RW,
2808        >::from_register(self, 0)
2809    }
2810}
2811impl ::core::default::Default for Gtpsr {
2812    #[inline(always)]
2813    fn default() -> Gtpsr {
2814        <crate::RegValueT<Gtpsr_SPEC> as RegisterValue<_>>::new(0)
2815    }
2816}
2817pub mod gtpsr {
2818
2819    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2820    pub struct Psgtrgar_SPEC;
2821    pub type Psgtrgar = crate::EnumBitfieldStruct<u8, Psgtrgar_SPEC>;
2822    impl Psgtrgar {
2823        #[doc = "Counter stop disabled on the rising edge of GTETRGA input"]
2824        pub const _0: Self = Self::new(0);
2825
2826        #[doc = "Counter stop enabled on the rising edge of GTETRGA input"]
2827        pub const _1: Self = Self::new(1);
2828    }
2829    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2830    pub struct Psgtrgaf_SPEC;
2831    pub type Psgtrgaf = crate::EnumBitfieldStruct<u8, Psgtrgaf_SPEC>;
2832    impl Psgtrgaf {
2833        #[doc = "Counter stop disabled on the falling edge of GTETRGA input"]
2834        pub const _0: Self = Self::new(0);
2835
2836        #[doc = "Counter stop enabled on the falling edge of GTETRGA input"]
2837        pub const _1: Self = Self::new(1);
2838    }
2839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2840    pub struct Psgtrgbr_SPEC;
2841    pub type Psgtrgbr = crate::EnumBitfieldStruct<u8, Psgtrgbr_SPEC>;
2842    impl Psgtrgbr {
2843        #[doc = "Counter stop disabled on the rising edge of GTETRGB input"]
2844        pub const _0: Self = Self::new(0);
2845
2846        #[doc = "Counter stop enabled on the rising edge of GTETRGB input"]
2847        pub const _1: Self = Self::new(1);
2848    }
2849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2850    pub struct Psgtrgbf_SPEC;
2851    pub type Psgtrgbf = crate::EnumBitfieldStruct<u8, Psgtrgbf_SPEC>;
2852    impl Psgtrgbf {
2853        #[doc = "Counter stop disabled on the falling edge of GTETRGB input"]
2854        pub const _0: Self = Self::new(0);
2855
2856        #[doc = "Counter stop enabled on the falling edge of GTETRGB input"]
2857        pub const _1: Self = Self::new(1);
2858    }
2859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2860    pub struct Psgtrgcr_SPEC;
2861    pub type Psgtrgcr = crate::EnumBitfieldStruct<u8, Psgtrgcr_SPEC>;
2862    impl Psgtrgcr {
2863        #[doc = "Counter stop disabled on the rising edge of GTETRGC input"]
2864        pub const _0: Self = Self::new(0);
2865
2866        #[doc = "Counter stop enabled on the rising edge of GTETRGC input"]
2867        pub const _1: Self = Self::new(1);
2868    }
2869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2870    pub struct Psgtrgcf_SPEC;
2871    pub type Psgtrgcf = crate::EnumBitfieldStruct<u8, Psgtrgcf_SPEC>;
2872    impl Psgtrgcf {
2873        #[doc = "Counter stop disabled on the falling edge of GTETRGC input"]
2874        pub const _0: Self = Self::new(0);
2875
2876        #[doc = "Counter stop enabled on the falling edge of GTETRGC input"]
2877        pub const _1: Self = Self::new(1);
2878    }
2879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2880    pub struct Psgtrgdr_SPEC;
2881    pub type Psgtrgdr = crate::EnumBitfieldStruct<u8, Psgtrgdr_SPEC>;
2882    impl Psgtrgdr {
2883        #[doc = "Counter stop disabled on the rising edge of GTETRGD input"]
2884        pub const _0: Self = Self::new(0);
2885
2886        #[doc = "Counter stop enabled on the rising edge of GTETRGD input"]
2887        pub const _1: Self = Self::new(1);
2888    }
2889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2890    pub struct Psgtrgdf_SPEC;
2891    pub type Psgtrgdf = crate::EnumBitfieldStruct<u8, Psgtrgdf_SPEC>;
2892    impl Psgtrgdf {
2893        #[doc = "Counter stop disabled on the falling edge of GTETRGD input"]
2894        pub const _0: Self = Self::new(0);
2895
2896        #[doc = "Counter stop enabled on the falling edge of GTETRGD input"]
2897        pub const _1: Self = Self::new(1);
2898    }
2899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2900    pub struct Pscarbl_SPEC;
2901    pub type Pscarbl = crate::EnumBitfieldStruct<u8, Pscarbl_SPEC>;
2902    impl Pscarbl {
2903        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2904        pub const _0: Self = Self::new(0);
2905
2906        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
2907        pub const _1: Self = Self::new(1);
2908    }
2909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2910    pub struct Pscarbh_SPEC;
2911    pub type Pscarbh = crate::EnumBitfieldStruct<u8, Pscarbh_SPEC>;
2912    impl Pscarbh {
2913        #[doc = "Counter stop disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2914        pub const _0: Self = Self::new(0);
2915
2916        #[doc = "Counter stop enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
2917        pub const _1: Self = Self::new(1);
2918    }
2919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2920    pub struct Pscafbl_SPEC;
2921    pub type Pscafbl = crate::EnumBitfieldStruct<u8, Pscafbl_SPEC>;
2922    impl Pscafbl {
2923        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2924        pub const _0: Self = Self::new(0);
2925
2926        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
2927        pub const _1: Self = Self::new(1);
2928    }
2929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2930    pub struct Pscafbh_SPEC;
2931    pub type Pscafbh = crate::EnumBitfieldStruct<u8, Pscafbh_SPEC>;
2932    impl Pscafbh {
2933        #[doc = "Counter stop disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2934        pub const _0: Self = Self::new(0);
2935
2936        #[doc = "Counter stop enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
2937        pub const _1: Self = Self::new(1);
2938    }
2939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2940    pub struct Pscbral_SPEC;
2941    pub type Pscbral = crate::EnumBitfieldStruct<u8, Pscbral_SPEC>;
2942    impl Pscbral {
2943        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2944        pub const _0: Self = Self::new(0);
2945
2946        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
2947        pub const _1: Self = Self::new(1);
2948    }
2949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2950    pub struct Pscbrah_SPEC;
2951    pub type Pscbrah = crate::EnumBitfieldStruct<u8, Pscbrah_SPEC>;
2952    impl Pscbrah {
2953        #[doc = "Counter stop disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2954        pub const _0: Self = Self::new(0);
2955
2956        #[doc = "Counter stop enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
2957        pub const _1: Self = Self::new(1);
2958    }
2959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2960    pub struct Pscbfal_SPEC;
2961    pub type Pscbfal = crate::EnumBitfieldStruct<u8, Pscbfal_SPEC>;
2962    impl Pscbfal {
2963        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2964        pub const _0: Self = Self::new(0);
2965
2966        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
2967        pub const _1: Self = Self::new(1);
2968    }
2969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2970    pub struct Pscbfah_SPEC;
2971    pub type Pscbfah = crate::EnumBitfieldStruct<u8, Pscbfah_SPEC>;
2972    impl Pscbfah {
2973        #[doc = "Counter stop disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2974        pub const _0: Self = Self::new(0);
2975
2976        #[doc = "Counter stop enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
2977        pub const _1: Self = Self::new(1);
2978    }
2979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2980    pub struct Pselca_SPEC;
2981    pub type Pselca = crate::EnumBitfieldStruct<u8, Pselca_SPEC>;
2982    impl Pselca {
2983        #[doc = "Counter stop disabled at the ELC_GPTA input"]
2984        pub const _0: Self = Self::new(0);
2985
2986        #[doc = "Counter stop enabled at the ELC_GPTA input"]
2987        pub const _1: Self = Self::new(1);
2988    }
2989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2990    pub struct Pselcb_SPEC;
2991    pub type Pselcb = crate::EnumBitfieldStruct<u8, Pselcb_SPEC>;
2992    impl Pselcb {
2993        #[doc = "Counter stop disabled at the ELC_GPTB input"]
2994        pub const _0: Self = Self::new(0);
2995
2996        #[doc = "Counter stop enabled at the ELC_GPTB input"]
2997        pub const _1: Self = Self::new(1);
2998    }
2999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3000    pub struct Pselcc_SPEC;
3001    pub type Pselcc = crate::EnumBitfieldStruct<u8, Pselcc_SPEC>;
3002    impl Pselcc {
3003        #[doc = "Counter stop disabled at the ELC_GPTC input"]
3004        pub const _0: Self = Self::new(0);
3005
3006        #[doc = "Counter stop enabled at the ELC_GPTC input"]
3007        pub const _1: Self = Self::new(1);
3008    }
3009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3010    pub struct Pselcd_SPEC;
3011    pub type Pselcd = crate::EnumBitfieldStruct<u8, Pselcd_SPEC>;
3012    impl Pselcd {
3013        #[doc = "Counter stop disabled at the ELC_GPTD input"]
3014        pub const _0: Self = Self::new(0);
3015
3016        #[doc = "Counter stop enabled at the ELC_GPTD input"]
3017        pub const _1: Self = Self::new(1);
3018    }
3019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3020    pub struct Pselce_SPEC;
3021    pub type Pselce = crate::EnumBitfieldStruct<u8, Pselce_SPEC>;
3022    impl Pselce {
3023        #[doc = "Counter stop disabled at the ELC_GPTE input"]
3024        pub const _0: Self = Self::new(0);
3025
3026        #[doc = "Counter stop enabled at the ELC_GPTE input"]
3027        pub const _1: Self = Self::new(1);
3028    }
3029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3030    pub struct Pselcf_SPEC;
3031    pub type Pselcf = crate::EnumBitfieldStruct<u8, Pselcf_SPEC>;
3032    impl Pselcf {
3033        #[doc = "Counter stop disabled at the ELC_GPTF input"]
3034        pub const _0: Self = Self::new(0);
3035
3036        #[doc = "Counter stop enabled at the ELC_GPTF input"]
3037        pub const _1: Self = Self::new(1);
3038    }
3039    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3040    pub struct Pselcg_SPEC;
3041    pub type Pselcg = crate::EnumBitfieldStruct<u8, Pselcg_SPEC>;
3042    impl Pselcg {
3043        #[doc = "Counter stop disabled at the ELC_GPTG input"]
3044        pub const _0: Self = Self::new(0);
3045
3046        #[doc = "Counter stop enabled at the ELC_GPTG input"]
3047        pub const _1: Self = Self::new(1);
3048    }
3049    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3050    pub struct Pselch_SPEC;
3051    pub type Pselch = crate::EnumBitfieldStruct<u8, Pselch_SPEC>;
3052    impl Pselch {
3053        #[doc = "Counter stop disabled at the ELC_GPTH input"]
3054        pub const _0: Self = Self::new(0);
3055
3056        #[doc = "Counter stop enabled at the ELC_GPTH input"]
3057        pub const _1: Self = Self::new(1);
3058    }
3059    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3060    pub struct Cstop_SPEC;
3061    pub type Cstop = crate::EnumBitfieldStruct<u8, Cstop_SPEC>;
3062    impl Cstop {
3063        #[doc = "Counter stop disabled by the GTSTP register"]
3064        pub const _0: Self = Self::new(0);
3065
3066        #[doc = "Counter stop enabled by the GTSTP register"]
3067        pub const _1: Self = Self::new(1);
3068    }
3069}
3070#[doc(hidden)]
3071#[derive(Copy, Clone, Eq, PartialEq)]
3072pub struct Gtcsr_SPEC;
3073impl crate::sealed::RegSpec for Gtcsr_SPEC {
3074    type DataType = u32;
3075}
3076
3077#[doc = "General PWM Timer Clear Source Select Register"]
3078pub type Gtcsr = crate::RegValueT<Gtcsr_SPEC>;
3079
3080impl Gtcsr {
3081    #[doc = "GTETRGA Pin Rising Input Source Counter Clear Enable"]
3082    #[inline(always)]
3083    pub fn csgtrgar(
3084        self,
3085    ) -> crate::common::RegisterField<
3086        0,
3087        0x1,
3088        1,
3089        0,
3090        gtcsr::Csgtrgar,
3091        gtcsr::Csgtrgar,
3092        Gtcsr_SPEC,
3093        crate::common::RW,
3094    > {
3095        crate::common::RegisterField::<
3096            0,
3097            0x1,
3098            1,
3099            0,
3100            gtcsr::Csgtrgar,
3101            gtcsr::Csgtrgar,
3102            Gtcsr_SPEC,
3103            crate::common::RW,
3104        >::from_register(self, 0)
3105    }
3106
3107    #[doc = "GTETRGA Pin Falling Input Source Counter Clear Enable"]
3108    #[inline(always)]
3109    pub fn csgtrgaf(
3110        self,
3111    ) -> crate::common::RegisterField<
3112        1,
3113        0x1,
3114        1,
3115        0,
3116        gtcsr::Csgtrgaf,
3117        gtcsr::Csgtrgaf,
3118        Gtcsr_SPEC,
3119        crate::common::RW,
3120    > {
3121        crate::common::RegisterField::<
3122            1,
3123            0x1,
3124            1,
3125            0,
3126            gtcsr::Csgtrgaf,
3127            gtcsr::Csgtrgaf,
3128            Gtcsr_SPEC,
3129            crate::common::RW,
3130        >::from_register(self, 0)
3131    }
3132
3133    #[doc = "GTETRGB Pin Rising Input Source Counter Clear Enable"]
3134    #[inline(always)]
3135    pub fn csgtrgbr(
3136        self,
3137    ) -> crate::common::RegisterField<
3138        2,
3139        0x1,
3140        1,
3141        0,
3142        gtcsr::Csgtrgbr,
3143        gtcsr::Csgtrgbr,
3144        Gtcsr_SPEC,
3145        crate::common::RW,
3146    > {
3147        crate::common::RegisterField::<
3148            2,
3149            0x1,
3150            1,
3151            0,
3152            gtcsr::Csgtrgbr,
3153            gtcsr::Csgtrgbr,
3154            Gtcsr_SPEC,
3155            crate::common::RW,
3156        >::from_register(self, 0)
3157    }
3158
3159    #[doc = "GTETRGB Pin Falling Input Source Counter Clear Enable"]
3160    #[inline(always)]
3161    pub fn csgtrgbf(
3162        self,
3163    ) -> crate::common::RegisterField<
3164        3,
3165        0x1,
3166        1,
3167        0,
3168        gtcsr::Csgtrgbf,
3169        gtcsr::Csgtrgbf,
3170        Gtcsr_SPEC,
3171        crate::common::RW,
3172    > {
3173        crate::common::RegisterField::<
3174            3,
3175            0x1,
3176            1,
3177            0,
3178            gtcsr::Csgtrgbf,
3179            gtcsr::Csgtrgbf,
3180            Gtcsr_SPEC,
3181            crate::common::RW,
3182        >::from_register(self, 0)
3183    }
3184
3185    #[doc = "GTETRGC Pin Rising Input Source Counter Clear Enable"]
3186    #[inline(always)]
3187    pub fn csgtrgcr(
3188        self,
3189    ) -> crate::common::RegisterField<
3190        4,
3191        0x1,
3192        1,
3193        0,
3194        gtcsr::Csgtrgcr,
3195        gtcsr::Csgtrgcr,
3196        Gtcsr_SPEC,
3197        crate::common::RW,
3198    > {
3199        crate::common::RegisterField::<
3200            4,
3201            0x1,
3202            1,
3203            0,
3204            gtcsr::Csgtrgcr,
3205            gtcsr::Csgtrgcr,
3206            Gtcsr_SPEC,
3207            crate::common::RW,
3208        >::from_register(self, 0)
3209    }
3210
3211    #[doc = "GTETRGC Pin Falling Input Source Counter Clear Enable"]
3212    #[inline(always)]
3213    pub fn csgtrgcf(
3214        self,
3215    ) -> crate::common::RegisterField<
3216        5,
3217        0x1,
3218        1,
3219        0,
3220        gtcsr::Csgtrgcf,
3221        gtcsr::Csgtrgcf,
3222        Gtcsr_SPEC,
3223        crate::common::RW,
3224    > {
3225        crate::common::RegisterField::<
3226            5,
3227            0x1,
3228            1,
3229            0,
3230            gtcsr::Csgtrgcf,
3231            gtcsr::Csgtrgcf,
3232            Gtcsr_SPEC,
3233            crate::common::RW,
3234        >::from_register(self, 0)
3235    }
3236
3237    #[doc = "GTETRGD Pin Rising Input Source Counter Clear Enable"]
3238    #[inline(always)]
3239    pub fn csgtrgdr(
3240        self,
3241    ) -> crate::common::RegisterField<
3242        6,
3243        0x1,
3244        1,
3245        0,
3246        gtcsr::Csgtrgdr,
3247        gtcsr::Csgtrgdr,
3248        Gtcsr_SPEC,
3249        crate::common::RW,
3250    > {
3251        crate::common::RegisterField::<
3252            6,
3253            0x1,
3254            1,
3255            0,
3256            gtcsr::Csgtrgdr,
3257            gtcsr::Csgtrgdr,
3258            Gtcsr_SPEC,
3259            crate::common::RW,
3260        >::from_register(self, 0)
3261    }
3262
3263    #[doc = "GTETRGD Pin Falling Input Source Counter Clear Enable"]
3264    #[inline(always)]
3265    pub fn csgtrgdf(
3266        self,
3267    ) -> crate::common::RegisterField<
3268        7,
3269        0x1,
3270        1,
3271        0,
3272        gtcsr::Csgtrgdf,
3273        gtcsr::Csgtrgdf,
3274        Gtcsr_SPEC,
3275        crate::common::RW,
3276    > {
3277        crate::common::RegisterField::<
3278            7,
3279            0x1,
3280            1,
3281            0,
3282            gtcsr::Csgtrgdf,
3283            gtcsr::Csgtrgdf,
3284            Gtcsr_SPEC,
3285            crate::common::RW,
3286        >::from_register(self, 0)
3287    }
3288
3289    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Clear Enable"]
3290    #[inline(always)]
3291    pub fn cscarbl(
3292        self,
3293    ) -> crate::common::RegisterField<
3294        8,
3295        0x1,
3296        1,
3297        0,
3298        gtcsr::Cscarbl,
3299        gtcsr::Cscarbl,
3300        Gtcsr_SPEC,
3301        crate::common::RW,
3302    > {
3303        crate::common::RegisterField::<
3304            8,
3305            0x1,
3306            1,
3307            0,
3308            gtcsr::Cscarbl,
3309            gtcsr::Cscarbl,
3310            Gtcsr_SPEC,
3311            crate::common::RW,
3312        >::from_register(self, 0)
3313    }
3314
3315    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Clear Enable"]
3316    #[inline(always)]
3317    pub fn cscarbh(
3318        self,
3319    ) -> crate::common::RegisterField<
3320        9,
3321        0x1,
3322        1,
3323        0,
3324        gtcsr::Cscarbh,
3325        gtcsr::Cscarbh,
3326        Gtcsr_SPEC,
3327        crate::common::RW,
3328    > {
3329        crate::common::RegisterField::<
3330            9,
3331            0x1,
3332            1,
3333            0,
3334            gtcsr::Cscarbh,
3335            gtcsr::Cscarbh,
3336            Gtcsr_SPEC,
3337            crate::common::RW,
3338        >::from_register(self, 0)
3339    }
3340
3341    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Clear Enable"]
3342    #[inline(always)]
3343    pub fn cscafbl(
3344        self,
3345    ) -> crate::common::RegisterField<
3346        10,
3347        0x1,
3348        1,
3349        0,
3350        gtcsr::Cscafbl,
3351        gtcsr::Cscafbl,
3352        Gtcsr_SPEC,
3353        crate::common::RW,
3354    > {
3355        crate::common::RegisterField::<
3356            10,
3357            0x1,
3358            1,
3359            0,
3360            gtcsr::Cscafbl,
3361            gtcsr::Cscafbl,
3362            Gtcsr_SPEC,
3363            crate::common::RW,
3364        >::from_register(self, 0)
3365    }
3366
3367    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Clear Enable"]
3368    #[inline(always)]
3369    pub fn cscafbh(
3370        self,
3371    ) -> crate::common::RegisterField<
3372        11,
3373        0x1,
3374        1,
3375        0,
3376        gtcsr::Cscafbh,
3377        gtcsr::Cscafbh,
3378        Gtcsr_SPEC,
3379        crate::common::RW,
3380    > {
3381        crate::common::RegisterField::<
3382            11,
3383            0x1,
3384            1,
3385            0,
3386            gtcsr::Cscafbh,
3387            gtcsr::Cscafbh,
3388            Gtcsr_SPEC,
3389            crate::common::RW,
3390        >::from_register(self, 0)
3391    }
3392
3393    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Clear Enable"]
3394    #[inline(always)]
3395    pub fn cscbral(
3396        self,
3397    ) -> crate::common::RegisterField<
3398        12,
3399        0x1,
3400        1,
3401        0,
3402        gtcsr::Cscbral,
3403        gtcsr::Cscbral,
3404        Gtcsr_SPEC,
3405        crate::common::RW,
3406    > {
3407        crate::common::RegisterField::<
3408            12,
3409            0x1,
3410            1,
3411            0,
3412            gtcsr::Cscbral,
3413            gtcsr::Cscbral,
3414            Gtcsr_SPEC,
3415            crate::common::RW,
3416        >::from_register(self, 0)
3417    }
3418
3419    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Clear Enable"]
3420    #[inline(always)]
3421    pub fn cscbrah(
3422        self,
3423    ) -> crate::common::RegisterField<
3424        13,
3425        0x1,
3426        1,
3427        0,
3428        gtcsr::Cscbrah,
3429        gtcsr::Cscbrah,
3430        Gtcsr_SPEC,
3431        crate::common::RW,
3432    > {
3433        crate::common::RegisterField::<
3434            13,
3435            0x1,
3436            1,
3437            0,
3438            gtcsr::Cscbrah,
3439            gtcsr::Cscbrah,
3440            Gtcsr_SPEC,
3441            crate::common::RW,
3442        >::from_register(self, 0)
3443    }
3444
3445    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Clear Enable"]
3446    #[inline(always)]
3447    pub fn cscbfal(
3448        self,
3449    ) -> crate::common::RegisterField<
3450        14,
3451        0x1,
3452        1,
3453        0,
3454        gtcsr::Cscbfal,
3455        gtcsr::Cscbfal,
3456        Gtcsr_SPEC,
3457        crate::common::RW,
3458    > {
3459        crate::common::RegisterField::<
3460            14,
3461            0x1,
3462            1,
3463            0,
3464            gtcsr::Cscbfal,
3465            gtcsr::Cscbfal,
3466            Gtcsr_SPEC,
3467            crate::common::RW,
3468        >::from_register(self, 0)
3469    }
3470
3471    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Clear Enable"]
3472    #[inline(always)]
3473    pub fn cscbfah(
3474        self,
3475    ) -> crate::common::RegisterField<
3476        15,
3477        0x1,
3478        1,
3479        0,
3480        gtcsr::Cscbfah,
3481        gtcsr::Cscbfah,
3482        Gtcsr_SPEC,
3483        crate::common::RW,
3484    > {
3485        crate::common::RegisterField::<
3486            15,
3487            0x1,
3488            1,
3489            0,
3490            gtcsr::Cscbfah,
3491            gtcsr::Cscbfah,
3492            Gtcsr_SPEC,
3493            crate::common::RW,
3494        >::from_register(self, 0)
3495    }
3496
3497    #[doc = "ELC_GPTA Event Source Counter Clear Enable"]
3498    #[inline(always)]
3499    pub fn cselca(
3500        self,
3501    ) -> crate::common::RegisterField<
3502        16,
3503        0x1,
3504        1,
3505        0,
3506        gtcsr::Cselca,
3507        gtcsr::Cselca,
3508        Gtcsr_SPEC,
3509        crate::common::RW,
3510    > {
3511        crate::common::RegisterField::<
3512            16,
3513            0x1,
3514            1,
3515            0,
3516            gtcsr::Cselca,
3517            gtcsr::Cselca,
3518            Gtcsr_SPEC,
3519            crate::common::RW,
3520        >::from_register(self, 0)
3521    }
3522
3523    #[doc = "ELC_GPTB Event Source Counter Clear Enable"]
3524    #[inline(always)]
3525    pub fn cselcb(
3526        self,
3527    ) -> crate::common::RegisterField<
3528        17,
3529        0x1,
3530        1,
3531        0,
3532        gtcsr::Cselcb,
3533        gtcsr::Cselcb,
3534        Gtcsr_SPEC,
3535        crate::common::RW,
3536    > {
3537        crate::common::RegisterField::<
3538            17,
3539            0x1,
3540            1,
3541            0,
3542            gtcsr::Cselcb,
3543            gtcsr::Cselcb,
3544            Gtcsr_SPEC,
3545            crate::common::RW,
3546        >::from_register(self, 0)
3547    }
3548
3549    #[doc = "ELC_GPTC Event Source Counter Clear Enable"]
3550    #[inline(always)]
3551    pub fn cselcc(
3552        self,
3553    ) -> crate::common::RegisterField<
3554        18,
3555        0x1,
3556        1,
3557        0,
3558        gtcsr::Cselcc,
3559        gtcsr::Cselcc,
3560        Gtcsr_SPEC,
3561        crate::common::RW,
3562    > {
3563        crate::common::RegisterField::<
3564            18,
3565            0x1,
3566            1,
3567            0,
3568            gtcsr::Cselcc,
3569            gtcsr::Cselcc,
3570            Gtcsr_SPEC,
3571            crate::common::RW,
3572        >::from_register(self, 0)
3573    }
3574
3575    #[doc = "ELC_GPTD Event Source Counter Clear Enable"]
3576    #[inline(always)]
3577    pub fn cselcd(
3578        self,
3579    ) -> crate::common::RegisterField<
3580        19,
3581        0x1,
3582        1,
3583        0,
3584        gtcsr::Cselcd,
3585        gtcsr::Cselcd,
3586        Gtcsr_SPEC,
3587        crate::common::RW,
3588    > {
3589        crate::common::RegisterField::<
3590            19,
3591            0x1,
3592            1,
3593            0,
3594            gtcsr::Cselcd,
3595            gtcsr::Cselcd,
3596            Gtcsr_SPEC,
3597            crate::common::RW,
3598        >::from_register(self, 0)
3599    }
3600
3601    #[doc = "ELC_GPTE Event Source Counter Clear Enable"]
3602    #[inline(always)]
3603    pub fn cselce(
3604        self,
3605    ) -> crate::common::RegisterField<
3606        20,
3607        0x1,
3608        1,
3609        0,
3610        gtcsr::Cselce,
3611        gtcsr::Cselce,
3612        Gtcsr_SPEC,
3613        crate::common::RW,
3614    > {
3615        crate::common::RegisterField::<
3616            20,
3617            0x1,
3618            1,
3619            0,
3620            gtcsr::Cselce,
3621            gtcsr::Cselce,
3622            Gtcsr_SPEC,
3623            crate::common::RW,
3624        >::from_register(self, 0)
3625    }
3626
3627    #[doc = "ELC_GPTF Event Source Counter Clear Enable"]
3628    #[inline(always)]
3629    pub fn cselcf(
3630        self,
3631    ) -> crate::common::RegisterField<
3632        21,
3633        0x1,
3634        1,
3635        0,
3636        gtcsr::Cselcf,
3637        gtcsr::Cselcf,
3638        Gtcsr_SPEC,
3639        crate::common::RW,
3640    > {
3641        crate::common::RegisterField::<
3642            21,
3643            0x1,
3644            1,
3645            0,
3646            gtcsr::Cselcf,
3647            gtcsr::Cselcf,
3648            Gtcsr_SPEC,
3649            crate::common::RW,
3650        >::from_register(self, 0)
3651    }
3652
3653    #[doc = "ELC_GPTG Event Source Counter Clear Enable"]
3654    #[inline(always)]
3655    pub fn cselcg(
3656        self,
3657    ) -> crate::common::RegisterField<
3658        22,
3659        0x1,
3660        1,
3661        0,
3662        gtcsr::Cselcg,
3663        gtcsr::Cselcg,
3664        Gtcsr_SPEC,
3665        crate::common::RW,
3666    > {
3667        crate::common::RegisterField::<
3668            22,
3669            0x1,
3670            1,
3671            0,
3672            gtcsr::Cselcg,
3673            gtcsr::Cselcg,
3674            Gtcsr_SPEC,
3675            crate::common::RW,
3676        >::from_register(self, 0)
3677    }
3678
3679    #[doc = "ELC_GPTH Event Source Counter Clear Enable"]
3680    #[inline(always)]
3681    pub fn cselch(
3682        self,
3683    ) -> crate::common::RegisterField<
3684        23,
3685        0x1,
3686        1,
3687        0,
3688        gtcsr::Cselch,
3689        gtcsr::Cselch,
3690        Gtcsr_SPEC,
3691        crate::common::RW,
3692    > {
3693        crate::common::RegisterField::<
3694            23,
3695            0x1,
3696            1,
3697            0,
3698            gtcsr::Cselch,
3699            gtcsr::Cselch,
3700            Gtcsr_SPEC,
3701            crate::common::RW,
3702        >::from_register(self, 0)
3703    }
3704
3705    #[doc = "Software Source Counter Clear Enable"]
3706    #[inline(always)]
3707    pub fn cclr(
3708        self,
3709    ) -> crate::common::RegisterField<
3710        31,
3711        0x1,
3712        1,
3713        0,
3714        gtcsr::Cclr,
3715        gtcsr::Cclr,
3716        Gtcsr_SPEC,
3717        crate::common::RW,
3718    > {
3719        crate::common::RegisterField::<
3720            31,
3721            0x1,
3722            1,
3723            0,
3724            gtcsr::Cclr,
3725            gtcsr::Cclr,
3726            Gtcsr_SPEC,
3727            crate::common::RW,
3728        >::from_register(self, 0)
3729    }
3730}
3731impl ::core::default::Default for Gtcsr {
3732    #[inline(always)]
3733    fn default() -> Gtcsr {
3734        <crate::RegValueT<Gtcsr_SPEC> as RegisterValue<_>>::new(0)
3735    }
3736}
3737pub mod gtcsr {
3738
3739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3740    pub struct Csgtrgar_SPEC;
3741    pub type Csgtrgar = crate::EnumBitfieldStruct<u8, Csgtrgar_SPEC>;
3742    impl Csgtrgar {
3743        #[doc = "Counter clear disabled on the rising edge of GTETRGA input"]
3744        pub const _0: Self = Self::new(0);
3745
3746        #[doc = "Counter clear enabled on the rising edge of GTETRGA input"]
3747        pub const _1: Self = Self::new(1);
3748    }
3749    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3750    pub struct Csgtrgaf_SPEC;
3751    pub type Csgtrgaf = crate::EnumBitfieldStruct<u8, Csgtrgaf_SPEC>;
3752    impl Csgtrgaf {
3753        #[doc = "Counter clear disabled on the falling edge of GTETRGA input"]
3754        pub const _0: Self = Self::new(0);
3755
3756        #[doc = "Counter clear enabled on the falling edge of GTETRGA input"]
3757        pub const _1: Self = Self::new(1);
3758    }
3759    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3760    pub struct Csgtrgbr_SPEC;
3761    pub type Csgtrgbr = crate::EnumBitfieldStruct<u8, Csgtrgbr_SPEC>;
3762    impl Csgtrgbr {
3763        #[doc = "Disable counter clear on the rising edge of GTETRGB input"]
3764        pub const _0: Self = Self::new(0);
3765
3766        #[doc = "Enable counter clear on the rising edge of GTETRGB input"]
3767        pub const _1: Self = Self::new(1);
3768    }
3769    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3770    pub struct Csgtrgbf_SPEC;
3771    pub type Csgtrgbf = crate::EnumBitfieldStruct<u8, Csgtrgbf_SPEC>;
3772    impl Csgtrgbf {
3773        #[doc = "Counter clear disabled on the falling edge of GTETRGB input"]
3774        pub const _0: Self = Self::new(0);
3775
3776        #[doc = "Counter clear enabled on the falling edge of GTETRGB input"]
3777        pub const _1: Self = Self::new(1);
3778    }
3779    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3780    pub struct Csgtrgcr_SPEC;
3781    pub type Csgtrgcr = crate::EnumBitfieldStruct<u8, Csgtrgcr_SPEC>;
3782    impl Csgtrgcr {
3783        #[doc = "Disable counter clear on the rising edge of GTETRGC input"]
3784        pub const _0: Self = Self::new(0);
3785
3786        #[doc = "Enable counter clear on the rising edge of GTETRGC input"]
3787        pub const _1: Self = Self::new(1);
3788    }
3789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3790    pub struct Csgtrgcf_SPEC;
3791    pub type Csgtrgcf = crate::EnumBitfieldStruct<u8, Csgtrgcf_SPEC>;
3792    impl Csgtrgcf {
3793        #[doc = "Counter clear disabled on the falling edge of GTETRGC input"]
3794        pub const _0: Self = Self::new(0);
3795
3796        #[doc = "Counter clear enabled on the falling edge of GTETRGC input"]
3797        pub const _1: Self = Self::new(1);
3798    }
3799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3800    pub struct Csgtrgdr_SPEC;
3801    pub type Csgtrgdr = crate::EnumBitfieldStruct<u8, Csgtrgdr_SPEC>;
3802    impl Csgtrgdr {
3803        #[doc = "Disable counter clear on the rising edge of GTETRGD input"]
3804        pub const _0: Self = Self::new(0);
3805
3806        #[doc = "Enable counter clear on the rising edge of GTETRGD input"]
3807        pub const _1: Self = Self::new(1);
3808    }
3809    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3810    pub struct Csgtrgdf_SPEC;
3811    pub type Csgtrgdf = crate::EnumBitfieldStruct<u8, Csgtrgdf_SPEC>;
3812    impl Csgtrgdf {
3813        #[doc = "Counter clear disabled on the falling edge of GTETRGD input"]
3814        pub const _0: Self = Self::new(0);
3815
3816        #[doc = "Counter clear enabled on the falling edge of GTETRGD input"]
3817        pub const _1: Self = Self::new(1);
3818    }
3819    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3820    pub struct Cscarbl_SPEC;
3821    pub type Cscarbl = crate::EnumBitfieldStruct<u8, Cscarbl_SPEC>;
3822    impl Cscarbl {
3823        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3824        pub const _0: Self = Self::new(0);
3825
3826        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
3827        pub const _1: Self = Self::new(1);
3828    }
3829    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3830    pub struct Cscarbh_SPEC;
3831    pub type Cscarbh = crate::EnumBitfieldStruct<u8, Cscarbh_SPEC>;
3832    impl Cscarbh {
3833        #[doc = "Counter clear disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3834        pub const _0: Self = Self::new(0);
3835
3836        #[doc = "Counter clear enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
3837        pub const _1: Self = Self::new(1);
3838    }
3839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3840    pub struct Cscafbl_SPEC;
3841    pub type Cscafbl = crate::EnumBitfieldStruct<u8, Cscafbl_SPEC>;
3842    impl Cscafbl {
3843        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3844        pub const _0: Self = Self::new(0);
3845
3846        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
3847        pub const _1: Self = Self::new(1);
3848    }
3849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3850    pub struct Cscafbh_SPEC;
3851    pub type Cscafbh = crate::EnumBitfieldStruct<u8, Cscafbh_SPEC>;
3852    impl Cscafbh {
3853        #[doc = "Counter clear disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3854        pub const _0: Self = Self::new(0);
3855
3856        #[doc = "Counter clear enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
3857        pub const _1: Self = Self::new(1);
3858    }
3859    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3860    pub struct Cscbral_SPEC;
3861    pub type Cscbral = crate::EnumBitfieldStruct<u8, Cscbral_SPEC>;
3862    impl Cscbral {
3863        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3864        pub const _0: Self = Self::new(0);
3865
3866        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
3867        pub const _1: Self = Self::new(1);
3868    }
3869    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3870    pub struct Cscbrah_SPEC;
3871    pub type Cscbrah = crate::EnumBitfieldStruct<u8, Cscbrah_SPEC>;
3872    impl Cscbrah {
3873        #[doc = "Counter clear disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3874        pub const _0: Self = Self::new(0);
3875
3876        #[doc = "Counter clear enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
3877        pub const _1: Self = Self::new(1);
3878    }
3879    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3880    pub struct Cscbfal_SPEC;
3881    pub type Cscbfal = crate::EnumBitfieldStruct<u8, Cscbfal_SPEC>;
3882    impl Cscbfal {
3883        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3884        pub const _0: Self = Self::new(0);
3885
3886        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
3887        pub const _1: Self = Self::new(1);
3888    }
3889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3890    pub struct Cscbfah_SPEC;
3891    pub type Cscbfah = crate::EnumBitfieldStruct<u8, Cscbfah_SPEC>;
3892    impl Cscbfah {
3893        #[doc = "Counter clear disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3894        pub const _0: Self = Self::new(0);
3895
3896        #[doc = "Counter clear enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
3897        pub const _1: Self = Self::new(1);
3898    }
3899    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3900    pub struct Cselca_SPEC;
3901    pub type Cselca = crate::EnumBitfieldStruct<u8, Cselca_SPEC>;
3902    impl Cselca {
3903        #[doc = "Counter clear disabled at the ELC_GPTA input"]
3904        pub const _0: Self = Self::new(0);
3905
3906        #[doc = "Counter clear enabled at the ELC_GPTA input"]
3907        pub const _1: Self = Self::new(1);
3908    }
3909    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3910    pub struct Cselcb_SPEC;
3911    pub type Cselcb = crate::EnumBitfieldStruct<u8, Cselcb_SPEC>;
3912    impl Cselcb {
3913        #[doc = "Counter clear disabled at the ELC_GPTB input"]
3914        pub const _0: Self = Self::new(0);
3915
3916        #[doc = "Counter clear enabled at the ELC_GPTB input"]
3917        pub const _1: Self = Self::new(1);
3918    }
3919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3920    pub struct Cselcc_SPEC;
3921    pub type Cselcc = crate::EnumBitfieldStruct<u8, Cselcc_SPEC>;
3922    impl Cselcc {
3923        #[doc = "Counter clear disabled at the ELC_GPTC input"]
3924        pub const _0: Self = Self::new(0);
3925
3926        #[doc = "Counter clear enabled at the ELC_GPTC input"]
3927        pub const _1: Self = Self::new(1);
3928    }
3929    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3930    pub struct Cselcd_SPEC;
3931    pub type Cselcd = crate::EnumBitfieldStruct<u8, Cselcd_SPEC>;
3932    impl Cselcd {
3933        #[doc = "Counter clear disabled at the ELC_GPTD input"]
3934        pub const _0: Self = Self::new(0);
3935
3936        #[doc = "Counter clear enabled at the ELC_GPTD input"]
3937        pub const _1: Self = Self::new(1);
3938    }
3939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3940    pub struct Cselce_SPEC;
3941    pub type Cselce = crate::EnumBitfieldStruct<u8, Cselce_SPEC>;
3942    impl Cselce {
3943        #[doc = "Counter clear disabled at the ELC_GPTE input"]
3944        pub const _0: Self = Self::new(0);
3945
3946        #[doc = "Counter clear enabled at the ELC_GPTE input"]
3947        pub const _1: Self = Self::new(1);
3948    }
3949    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3950    pub struct Cselcf_SPEC;
3951    pub type Cselcf = crate::EnumBitfieldStruct<u8, Cselcf_SPEC>;
3952    impl Cselcf {
3953        #[doc = "Counter clear disabled at the ELC_GPTF input"]
3954        pub const _0: Self = Self::new(0);
3955
3956        #[doc = "Counter clear enabled at the ELC_GPTF input"]
3957        pub const _1: Self = Self::new(1);
3958    }
3959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3960    pub struct Cselcg_SPEC;
3961    pub type Cselcg = crate::EnumBitfieldStruct<u8, Cselcg_SPEC>;
3962    impl Cselcg {
3963        #[doc = "Counter clear disabled at the ELC_GPTG input"]
3964        pub const _0: Self = Self::new(0);
3965
3966        #[doc = "Counter clear enabled at the ELC_GPTG input"]
3967        pub const _1: Self = Self::new(1);
3968    }
3969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3970    pub struct Cselch_SPEC;
3971    pub type Cselch = crate::EnumBitfieldStruct<u8, Cselch_SPEC>;
3972    impl Cselch {
3973        #[doc = "Counter clear disabled at the ELC_GPTH input"]
3974        pub const _0: Self = Self::new(0);
3975
3976        #[doc = "Counter clear enabled at the ELC_GPTH input"]
3977        pub const _1: Self = Self::new(1);
3978    }
3979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3980    pub struct Cclr_SPEC;
3981    pub type Cclr = crate::EnumBitfieldStruct<u8, Cclr_SPEC>;
3982    impl Cclr {
3983        #[doc = "Counter clear disabled by the GTCLR register"]
3984        pub const _0: Self = Self::new(0);
3985
3986        #[doc = "Counter clear enabled by the GTCLR register"]
3987        pub const _1: Self = Self::new(1);
3988    }
3989}
3990#[doc(hidden)]
3991#[derive(Copy, Clone, Eq, PartialEq)]
3992pub struct Gtupsr_SPEC;
3993impl crate::sealed::RegSpec for Gtupsr_SPEC {
3994    type DataType = u32;
3995}
3996
3997#[doc = "General PWM Timer Up Count Source Select Register"]
3998pub type Gtupsr = crate::RegValueT<Gtupsr_SPEC>;
3999
4000impl Gtupsr {
4001    #[doc = "GTETRGA Pin Rising Input Source Counter Count Up Enable"]
4002    #[inline(always)]
4003    pub fn usgtrgar(
4004        self,
4005    ) -> crate::common::RegisterField<
4006        0,
4007        0x1,
4008        1,
4009        0,
4010        gtupsr::Usgtrgar,
4011        gtupsr::Usgtrgar,
4012        Gtupsr_SPEC,
4013        crate::common::RW,
4014    > {
4015        crate::common::RegisterField::<
4016            0,
4017            0x1,
4018            1,
4019            0,
4020            gtupsr::Usgtrgar,
4021            gtupsr::Usgtrgar,
4022            Gtupsr_SPEC,
4023            crate::common::RW,
4024        >::from_register(self, 0)
4025    }
4026
4027    #[doc = "GTETRGA Pin Falling Input Source Counter Count Up Enable"]
4028    #[inline(always)]
4029    pub fn usgtrgaf(
4030        self,
4031    ) -> crate::common::RegisterField<
4032        1,
4033        0x1,
4034        1,
4035        0,
4036        gtupsr::Usgtrgaf,
4037        gtupsr::Usgtrgaf,
4038        Gtupsr_SPEC,
4039        crate::common::RW,
4040    > {
4041        crate::common::RegisterField::<
4042            1,
4043            0x1,
4044            1,
4045            0,
4046            gtupsr::Usgtrgaf,
4047            gtupsr::Usgtrgaf,
4048            Gtupsr_SPEC,
4049            crate::common::RW,
4050        >::from_register(self, 0)
4051    }
4052
4053    #[doc = "GTETRGB Pin Rising Input Source Counter Count Up Enable"]
4054    #[inline(always)]
4055    pub fn usgtrgbr(
4056        self,
4057    ) -> crate::common::RegisterField<
4058        2,
4059        0x1,
4060        1,
4061        0,
4062        gtupsr::Usgtrgbr,
4063        gtupsr::Usgtrgbr,
4064        Gtupsr_SPEC,
4065        crate::common::RW,
4066    > {
4067        crate::common::RegisterField::<
4068            2,
4069            0x1,
4070            1,
4071            0,
4072            gtupsr::Usgtrgbr,
4073            gtupsr::Usgtrgbr,
4074            Gtupsr_SPEC,
4075            crate::common::RW,
4076        >::from_register(self, 0)
4077    }
4078
4079    #[doc = "GTETRGB Pin Falling Input Source Counter Count Up Enable"]
4080    #[inline(always)]
4081    pub fn usgtrgbf(
4082        self,
4083    ) -> crate::common::RegisterField<
4084        3,
4085        0x1,
4086        1,
4087        0,
4088        gtupsr::Usgtrgbf,
4089        gtupsr::Usgtrgbf,
4090        Gtupsr_SPEC,
4091        crate::common::RW,
4092    > {
4093        crate::common::RegisterField::<
4094            3,
4095            0x1,
4096            1,
4097            0,
4098            gtupsr::Usgtrgbf,
4099            gtupsr::Usgtrgbf,
4100            Gtupsr_SPEC,
4101            crate::common::RW,
4102        >::from_register(self, 0)
4103    }
4104
4105    #[doc = "GTETRGC Pin Rising Input Source Counter Count Up Enable"]
4106    #[inline(always)]
4107    pub fn usgtrgcr(
4108        self,
4109    ) -> crate::common::RegisterField<
4110        4,
4111        0x1,
4112        1,
4113        0,
4114        gtupsr::Usgtrgcr,
4115        gtupsr::Usgtrgcr,
4116        Gtupsr_SPEC,
4117        crate::common::RW,
4118    > {
4119        crate::common::RegisterField::<
4120            4,
4121            0x1,
4122            1,
4123            0,
4124            gtupsr::Usgtrgcr,
4125            gtupsr::Usgtrgcr,
4126            Gtupsr_SPEC,
4127            crate::common::RW,
4128        >::from_register(self, 0)
4129    }
4130
4131    #[doc = "GTETRGC Pin Falling Input Source Counter Count Up Enable"]
4132    #[inline(always)]
4133    pub fn usgtrgcf(
4134        self,
4135    ) -> crate::common::RegisterField<
4136        5,
4137        0x1,
4138        1,
4139        0,
4140        gtupsr::Usgtrgcf,
4141        gtupsr::Usgtrgcf,
4142        Gtupsr_SPEC,
4143        crate::common::RW,
4144    > {
4145        crate::common::RegisterField::<
4146            5,
4147            0x1,
4148            1,
4149            0,
4150            gtupsr::Usgtrgcf,
4151            gtupsr::Usgtrgcf,
4152            Gtupsr_SPEC,
4153            crate::common::RW,
4154        >::from_register(self, 0)
4155    }
4156
4157    #[doc = "GTETRGD Pin Rising Input Source Counter Count Up Enable"]
4158    #[inline(always)]
4159    pub fn usgtrgdr(
4160        self,
4161    ) -> crate::common::RegisterField<
4162        6,
4163        0x1,
4164        1,
4165        0,
4166        gtupsr::Usgtrgdr,
4167        gtupsr::Usgtrgdr,
4168        Gtupsr_SPEC,
4169        crate::common::RW,
4170    > {
4171        crate::common::RegisterField::<
4172            6,
4173            0x1,
4174            1,
4175            0,
4176            gtupsr::Usgtrgdr,
4177            gtupsr::Usgtrgdr,
4178            Gtupsr_SPEC,
4179            crate::common::RW,
4180        >::from_register(self, 0)
4181    }
4182
4183    #[doc = "GTETRGD Pin Falling Input Source Counter Count Up Enable"]
4184    #[inline(always)]
4185    pub fn usgtrgdf(
4186        self,
4187    ) -> crate::common::RegisterField<
4188        7,
4189        0x1,
4190        1,
4191        0,
4192        gtupsr::Usgtrgdf,
4193        gtupsr::Usgtrgdf,
4194        Gtupsr_SPEC,
4195        crate::common::RW,
4196    > {
4197        crate::common::RegisterField::<
4198            7,
4199            0x1,
4200            1,
4201            0,
4202            gtupsr::Usgtrgdf,
4203            gtupsr::Usgtrgdf,
4204            Gtupsr_SPEC,
4205            crate::common::RW,
4206        >::from_register(self, 0)
4207    }
4208
4209    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4210    #[inline(always)]
4211    pub fn uscarbl(
4212        self,
4213    ) -> crate::common::RegisterField<
4214        8,
4215        0x1,
4216        1,
4217        0,
4218        gtupsr::Uscarbl,
4219        gtupsr::Uscarbl,
4220        Gtupsr_SPEC,
4221        crate::common::RW,
4222    > {
4223        crate::common::RegisterField::<
4224            8,
4225            0x1,
4226            1,
4227            0,
4228            gtupsr::Uscarbl,
4229            gtupsr::Uscarbl,
4230            Gtupsr_SPEC,
4231            crate::common::RW,
4232        >::from_register(self, 0)
4233    }
4234
4235    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Up Enable"]
4236    #[inline(always)]
4237    pub fn uscarbh(
4238        self,
4239    ) -> crate::common::RegisterField<
4240        9,
4241        0x1,
4242        1,
4243        0,
4244        gtupsr::Uscarbh,
4245        gtupsr::Uscarbh,
4246        Gtupsr_SPEC,
4247        crate::common::RW,
4248    > {
4249        crate::common::RegisterField::<
4250            9,
4251            0x1,
4252            1,
4253            0,
4254            gtupsr::Uscarbh,
4255            gtupsr::Uscarbh,
4256            Gtupsr_SPEC,
4257            crate::common::RW,
4258        >::from_register(self, 0)
4259    }
4260
4261    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Up Enable"]
4262    #[inline(always)]
4263    pub fn uscafbl(
4264        self,
4265    ) -> crate::common::RegisterField<
4266        10,
4267        0x1,
4268        1,
4269        0,
4270        gtupsr::Uscafbl,
4271        gtupsr::Uscafbl,
4272        Gtupsr_SPEC,
4273        crate::common::RW,
4274    > {
4275        crate::common::RegisterField::<
4276            10,
4277            0x1,
4278            1,
4279            0,
4280            gtupsr::Uscafbl,
4281            gtupsr::Uscafbl,
4282            Gtupsr_SPEC,
4283            crate::common::RW,
4284        >::from_register(self, 0)
4285    }
4286
4287    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Up Enable"]
4288    #[inline(always)]
4289    pub fn uscafbh(
4290        self,
4291    ) -> crate::common::RegisterField<
4292        11,
4293        0x1,
4294        1,
4295        0,
4296        gtupsr::Uscafbh,
4297        gtupsr::Uscafbh,
4298        Gtupsr_SPEC,
4299        crate::common::RW,
4300    > {
4301        crate::common::RegisterField::<
4302            11,
4303            0x1,
4304            1,
4305            0,
4306            gtupsr::Uscafbh,
4307            gtupsr::Uscafbh,
4308            Gtupsr_SPEC,
4309            crate::common::RW,
4310        >::from_register(self, 0)
4311    }
4312
4313    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4314    #[inline(always)]
4315    pub fn uscbral(
4316        self,
4317    ) -> crate::common::RegisterField<
4318        12,
4319        0x1,
4320        1,
4321        0,
4322        gtupsr::Uscbral,
4323        gtupsr::Uscbral,
4324        Gtupsr_SPEC,
4325        crate::common::RW,
4326    > {
4327        crate::common::RegisterField::<
4328            12,
4329            0x1,
4330            1,
4331            0,
4332            gtupsr::Uscbral,
4333            gtupsr::Uscbral,
4334            Gtupsr_SPEC,
4335            crate::common::RW,
4336        >::from_register(self, 0)
4337    }
4338
4339    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Up Enable"]
4340    #[inline(always)]
4341    pub fn uscbrah(
4342        self,
4343    ) -> crate::common::RegisterField<
4344        13,
4345        0x1,
4346        1,
4347        0,
4348        gtupsr::Uscbrah,
4349        gtupsr::Uscbrah,
4350        Gtupsr_SPEC,
4351        crate::common::RW,
4352    > {
4353        crate::common::RegisterField::<
4354            13,
4355            0x1,
4356            1,
4357            0,
4358            gtupsr::Uscbrah,
4359            gtupsr::Uscbrah,
4360            Gtupsr_SPEC,
4361            crate::common::RW,
4362        >::from_register(self, 0)
4363    }
4364
4365    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Up Enable"]
4366    #[inline(always)]
4367    pub fn uscbfal(
4368        self,
4369    ) -> crate::common::RegisterField<
4370        14,
4371        0x1,
4372        1,
4373        0,
4374        gtupsr::Uscbfal,
4375        gtupsr::Uscbfal,
4376        Gtupsr_SPEC,
4377        crate::common::RW,
4378    > {
4379        crate::common::RegisterField::<
4380            14,
4381            0x1,
4382            1,
4383            0,
4384            gtupsr::Uscbfal,
4385            gtupsr::Uscbfal,
4386            Gtupsr_SPEC,
4387            crate::common::RW,
4388        >::from_register(self, 0)
4389    }
4390
4391    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Up Enable"]
4392    #[inline(always)]
4393    pub fn uscbfah(
4394        self,
4395    ) -> crate::common::RegisterField<
4396        15,
4397        0x1,
4398        1,
4399        0,
4400        gtupsr::Uscbfah,
4401        gtupsr::Uscbfah,
4402        Gtupsr_SPEC,
4403        crate::common::RW,
4404    > {
4405        crate::common::RegisterField::<
4406            15,
4407            0x1,
4408            1,
4409            0,
4410            gtupsr::Uscbfah,
4411            gtupsr::Uscbfah,
4412            Gtupsr_SPEC,
4413            crate::common::RW,
4414        >::from_register(self, 0)
4415    }
4416
4417    #[doc = "ELC_GPTA Event Source Counter Count Up Enable"]
4418    #[inline(always)]
4419    pub fn uselca(
4420        self,
4421    ) -> crate::common::RegisterField<
4422        16,
4423        0x1,
4424        1,
4425        0,
4426        gtupsr::Uselca,
4427        gtupsr::Uselca,
4428        Gtupsr_SPEC,
4429        crate::common::RW,
4430    > {
4431        crate::common::RegisterField::<
4432            16,
4433            0x1,
4434            1,
4435            0,
4436            gtupsr::Uselca,
4437            gtupsr::Uselca,
4438            Gtupsr_SPEC,
4439            crate::common::RW,
4440        >::from_register(self, 0)
4441    }
4442
4443    #[doc = "ELC_GPTB Event Source Counter Count Up Enable"]
4444    #[inline(always)]
4445    pub fn uselcb(
4446        self,
4447    ) -> crate::common::RegisterField<
4448        17,
4449        0x1,
4450        1,
4451        0,
4452        gtupsr::Uselcb,
4453        gtupsr::Uselcb,
4454        Gtupsr_SPEC,
4455        crate::common::RW,
4456    > {
4457        crate::common::RegisterField::<
4458            17,
4459            0x1,
4460            1,
4461            0,
4462            gtupsr::Uselcb,
4463            gtupsr::Uselcb,
4464            Gtupsr_SPEC,
4465            crate::common::RW,
4466        >::from_register(self, 0)
4467    }
4468
4469    #[doc = "ELC_GPTC Event Source Counter Count Up Enable"]
4470    #[inline(always)]
4471    pub fn uselcc(
4472        self,
4473    ) -> crate::common::RegisterField<
4474        18,
4475        0x1,
4476        1,
4477        0,
4478        gtupsr::Uselcc,
4479        gtupsr::Uselcc,
4480        Gtupsr_SPEC,
4481        crate::common::RW,
4482    > {
4483        crate::common::RegisterField::<
4484            18,
4485            0x1,
4486            1,
4487            0,
4488            gtupsr::Uselcc,
4489            gtupsr::Uselcc,
4490            Gtupsr_SPEC,
4491            crate::common::RW,
4492        >::from_register(self, 0)
4493    }
4494
4495    #[doc = "ELC_GPTD Event Source Counter Count Up Enable"]
4496    #[inline(always)]
4497    pub fn uselcd(
4498        self,
4499    ) -> crate::common::RegisterField<
4500        19,
4501        0x1,
4502        1,
4503        0,
4504        gtupsr::Uselcd,
4505        gtupsr::Uselcd,
4506        Gtupsr_SPEC,
4507        crate::common::RW,
4508    > {
4509        crate::common::RegisterField::<
4510            19,
4511            0x1,
4512            1,
4513            0,
4514            gtupsr::Uselcd,
4515            gtupsr::Uselcd,
4516            Gtupsr_SPEC,
4517            crate::common::RW,
4518        >::from_register(self, 0)
4519    }
4520
4521    #[doc = "ELC_GPTE Event Source Counter Count Up Enable"]
4522    #[inline(always)]
4523    pub fn uselce(
4524        self,
4525    ) -> crate::common::RegisterField<
4526        20,
4527        0x1,
4528        1,
4529        0,
4530        gtupsr::Uselce,
4531        gtupsr::Uselce,
4532        Gtupsr_SPEC,
4533        crate::common::RW,
4534    > {
4535        crate::common::RegisterField::<
4536            20,
4537            0x1,
4538            1,
4539            0,
4540            gtupsr::Uselce,
4541            gtupsr::Uselce,
4542            Gtupsr_SPEC,
4543            crate::common::RW,
4544        >::from_register(self, 0)
4545    }
4546
4547    #[doc = "ELC_GPTF Event Source Counter Count Up Enable"]
4548    #[inline(always)]
4549    pub fn uselcf(
4550        self,
4551    ) -> crate::common::RegisterField<
4552        21,
4553        0x1,
4554        1,
4555        0,
4556        gtupsr::Uselcf,
4557        gtupsr::Uselcf,
4558        Gtupsr_SPEC,
4559        crate::common::RW,
4560    > {
4561        crate::common::RegisterField::<
4562            21,
4563            0x1,
4564            1,
4565            0,
4566            gtupsr::Uselcf,
4567            gtupsr::Uselcf,
4568            Gtupsr_SPEC,
4569            crate::common::RW,
4570        >::from_register(self, 0)
4571    }
4572
4573    #[doc = "ELC_GPTG Event Source Counter Count Up Enable"]
4574    #[inline(always)]
4575    pub fn uselcg(
4576        self,
4577    ) -> crate::common::RegisterField<
4578        22,
4579        0x1,
4580        1,
4581        0,
4582        gtupsr::Uselcg,
4583        gtupsr::Uselcg,
4584        Gtupsr_SPEC,
4585        crate::common::RW,
4586    > {
4587        crate::common::RegisterField::<
4588            22,
4589            0x1,
4590            1,
4591            0,
4592            gtupsr::Uselcg,
4593            gtupsr::Uselcg,
4594            Gtupsr_SPEC,
4595            crate::common::RW,
4596        >::from_register(self, 0)
4597    }
4598
4599    #[doc = "ELC_GPTH Event Source Counter Count Up Enable"]
4600    #[inline(always)]
4601    pub fn uselch(
4602        self,
4603    ) -> crate::common::RegisterField<
4604        23,
4605        0x1,
4606        1,
4607        0,
4608        gtupsr::Uselch,
4609        gtupsr::Uselch,
4610        Gtupsr_SPEC,
4611        crate::common::RW,
4612    > {
4613        crate::common::RegisterField::<
4614            23,
4615            0x1,
4616            1,
4617            0,
4618            gtupsr::Uselch,
4619            gtupsr::Uselch,
4620            Gtupsr_SPEC,
4621            crate::common::RW,
4622        >::from_register(self, 0)
4623    }
4624}
4625impl ::core::default::Default for Gtupsr {
4626    #[inline(always)]
4627    fn default() -> Gtupsr {
4628        <crate::RegValueT<Gtupsr_SPEC> as RegisterValue<_>>::new(0)
4629    }
4630}
4631pub mod gtupsr {
4632
4633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4634    pub struct Usgtrgar_SPEC;
4635    pub type Usgtrgar = crate::EnumBitfieldStruct<u8, Usgtrgar_SPEC>;
4636    impl Usgtrgar {
4637        #[doc = "Counter count up disabled on the rising edge of GTETRGA input"]
4638        pub const _0: Self = Self::new(0);
4639
4640        #[doc = "Counter count up enabled on the rising edge of GTETRGA input"]
4641        pub const _1: Self = Self::new(1);
4642    }
4643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4644    pub struct Usgtrgaf_SPEC;
4645    pub type Usgtrgaf = crate::EnumBitfieldStruct<u8, Usgtrgaf_SPEC>;
4646    impl Usgtrgaf {
4647        #[doc = "Counter count up disabled on the falling edge of GTETRGA input"]
4648        pub const _0: Self = Self::new(0);
4649
4650        #[doc = "Counter count up enabled on the falling edge of GTETRGA input"]
4651        pub const _1: Self = Self::new(1);
4652    }
4653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4654    pub struct Usgtrgbr_SPEC;
4655    pub type Usgtrgbr = crate::EnumBitfieldStruct<u8, Usgtrgbr_SPEC>;
4656    impl Usgtrgbr {
4657        #[doc = "Counter count up disabled on the rising edge of GTETRGB input"]
4658        pub const _0: Self = Self::new(0);
4659
4660        #[doc = "Counter count up enabled on the rising edge of GTETRGB input"]
4661        pub const _1: Self = Self::new(1);
4662    }
4663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4664    pub struct Usgtrgbf_SPEC;
4665    pub type Usgtrgbf = crate::EnumBitfieldStruct<u8, Usgtrgbf_SPEC>;
4666    impl Usgtrgbf {
4667        #[doc = "Counter count up disabled on the falling edge of GTETRGB input"]
4668        pub const _0: Self = Self::new(0);
4669
4670        #[doc = "Counter count up enabled on the falling edge of GTETRGB input"]
4671        pub const _1: Self = Self::new(1);
4672    }
4673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4674    pub struct Usgtrgcr_SPEC;
4675    pub type Usgtrgcr = crate::EnumBitfieldStruct<u8, Usgtrgcr_SPEC>;
4676    impl Usgtrgcr {
4677        #[doc = "Counter count up disabled on the rising edge of GTETRGC input"]
4678        pub const _0: Self = Self::new(0);
4679
4680        #[doc = "Counter count up enabled on the rising edge of GTETRGC input"]
4681        pub const _1: Self = Self::new(1);
4682    }
4683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4684    pub struct Usgtrgcf_SPEC;
4685    pub type Usgtrgcf = crate::EnumBitfieldStruct<u8, Usgtrgcf_SPEC>;
4686    impl Usgtrgcf {
4687        #[doc = "Counter count up disabled on the falling edge of GTETRGC input"]
4688        pub const _0: Self = Self::new(0);
4689
4690        #[doc = "Counter count up enabled on the falling edge of GTETRGC input"]
4691        pub const _1: Self = Self::new(1);
4692    }
4693    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4694    pub struct Usgtrgdr_SPEC;
4695    pub type Usgtrgdr = crate::EnumBitfieldStruct<u8, Usgtrgdr_SPEC>;
4696    impl Usgtrgdr {
4697        #[doc = "Counter count up disabled on the rising edge of GTETRGD input"]
4698        pub const _0: Self = Self::new(0);
4699
4700        #[doc = "Counter count up enabled on the rising edge of GTETRGD input"]
4701        pub const _1: Self = Self::new(1);
4702    }
4703    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4704    pub struct Usgtrgdf_SPEC;
4705    pub type Usgtrgdf = crate::EnumBitfieldStruct<u8, Usgtrgdf_SPEC>;
4706    impl Usgtrgdf {
4707        #[doc = "Counter count up disabled on the falling edge of GTETRGD input"]
4708        pub const _0: Self = Self::new(0);
4709
4710        #[doc = "Counter count up enabled on the falling edge of GTETRGD input"]
4711        pub const _1: Self = Self::new(1);
4712    }
4713    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4714    pub struct Uscarbl_SPEC;
4715    pub type Uscarbl = crate::EnumBitfieldStruct<u8, Uscarbl_SPEC>;
4716    impl Uscarbl {
4717        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4718        pub const _0: Self = Self::new(0);
4719
4720        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
4721        pub const _1: Self = Self::new(1);
4722    }
4723    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4724    pub struct Uscarbh_SPEC;
4725    pub type Uscarbh = crate::EnumBitfieldStruct<u8, Uscarbh_SPEC>;
4726    impl Uscarbh {
4727        #[doc = "Counter count up disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4728        pub const _0: Self = Self::new(0);
4729
4730        #[doc = "Counter count up enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
4731        pub const _1: Self = Self::new(1);
4732    }
4733    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4734    pub struct Uscafbl_SPEC;
4735    pub type Uscafbl = crate::EnumBitfieldStruct<u8, Uscafbl_SPEC>;
4736    impl Uscafbl {
4737        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4738        pub const _0: Self = Self::new(0);
4739
4740        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
4741        pub const _1: Self = Self::new(1);
4742    }
4743    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4744    pub struct Uscafbh_SPEC;
4745    pub type Uscafbh = crate::EnumBitfieldStruct<u8, Uscafbh_SPEC>;
4746    impl Uscafbh {
4747        #[doc = "Counter count up disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4748        pub const _0: Self = Self::new(0);
4749
4750        #[doc = "Counter count up enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
4751        pub const _1: Self = Self::new(1);
4752    }
4753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4754    pub struct Uscbral_SPEC;
4755    pub type Uscbral = crate::EnumBitfieldStruct<u8, Uscbral_SPEC>;
4756    impl Uscbral {
4757        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4758        pub const _0: Self = Self::new(0);
4759
4760        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
4761        pub const _1: Self = Self::new(1);
4762    }
4763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4764    pub struct Uscbrah_SPEC;
4765    pub type Uscbrah = crate::EnumBitfieldStruct<u8, Uscbrah_SPEC>;
4766    impl Uscbrah {
4767        #[doc = "Counter count up disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4768        pub const _0: Self = Self::new(0);
4769
4770        #[doc = "Counter count up enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
4771        pub const _1: Self = Self::new(1);
4772    }
4773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4774    pub struct Uscbfal_SPEC;
4775    pub type Uscbfal = crate::EnumBitfieldStruct<u8, Uscbfal_SPEC>;
4776    impl Uscbfal {
4777        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4778        pub const _0: Self = Self::new(0);
4779
4780        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
4781        pub const _1: Self = Self::new(1);
4782    }
4783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4784    pub struct Uscbfah_SPEC;
4785    pub type Uscbfah = crate::EnumBitfieldStruct<u8, Uscbfah_SPEC>;
4786    impl Uscbfah {
4787        #[doc = "Counter count up disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4788        pub const _0: Self = Self::new(0);
4789
4790        #[doc = "Counter count up enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
4791        pub const _1: Self = Self::new(1);
4792    }
4793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4794    pub struct Uselca_SPEC;
4795    pub type Uselca = crate::EnumBitfieldStruct<u8, Uselca_SPEC>;
4796    impl Uselca {
4797        #[doc = "Counter count up disabled at the ELC_GPTA input"]
4798        pub const _0: Self = Self::new(0);
4799
4800        #[doc = "Counter count up enabled at the ELC_GPTA input"]
4801        pub const _1: Self = Self::new(1);
4802    }
4803    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4804    pub struct Uselcb_SPEC;
4805    pub type Uselcb = crate::EnumBitfieldStruct<u8, Uselcb_SPEC>;
4806    impl Uselcb {
4807        #[doc = "Counter count up disabled at the ELC_GPTB input"]
4808        pub const _0: Self = Self::new(0);
4809
4810        #[doc = "Counter count up enabled at the ELC_GPTB input"]
4811        pub const _1: Self = Self::new(1);
4812    }
4813    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4814    pub struct Uselcc_SPEC;
4815    pub type Uselcc = crate::EnumBitfieldStruct<u8, Uselcc_SPEC>;
4816    impl Uselcc {
4817        #[doc = "Counter count up disabled at the ELC_GPTC input"]
4818        pub const _0: Self = Self::new(0);
4819
4820        #[doc = "Counter count up enabled at the ELC_GPTC input"]
4821        pub const _1: Self = Self::new(1);
4822    }
4823    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4824    pub struct Uselcd_SPEC;
4825    pub type Uselcd = crate::EnumBitfieldStruct<u8, Uselcd_SPEC>;
4826    impl Uselcd {
4827        #[doc = "Counter count up disabled at the ELC_GPTD input"]
4828        pub const _0: Self = Self::new(0);
4829
4830        #[doc = "Counter count up enabled at the ELC_GPTD input"]
4831        pub const _1: Self = Self::new(1);
4832    }
4833    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4834    pub struct Uselce_SPEC;
4835    pub type Uselce = crate::EnumBitfieldStruct<u8, Uselce_SPEC>;
4836    impl Uselce {
4837        #[doc = "Counter count up disabled at the ELC_GPTE input"]
4838        pub const _0: Self = Self::new(0);
4839
4840        #[doc = "Counter count up enabled at the ELC_GPTE input"]
4841        pub const _1: Self = Self::new(1);
4842    }
4843    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4844    pub struct Uselcf_SPEC;
4845    pub type Uselcf = crate::EnumBitfieldStruct<u8, Uselcf_SPEC>;
4846    impl Uselcf {
4847        #[doc = "Counter count up disabled at the ELC_GPTF input"]
4848        pub const _0: Self = Self::new(0);
4849
4850        #[doc = "Counter count up enabled at the ELC_GPTF input"]
4851        pub const _1: Self = Self::new(1);
4852    }
4853    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4854    pub struct Uselcg_SPEC;
4855    pub type Uselcg = crate::EnumBitfieldStruct<u8, Uselcg_SPEC>;
4856    impl Uselcg {
4857        #[doc = "Counter count up disabled at the ELC_GPTG input"]
4858        pub const _0: Self = Self::new(0);
4859
4860        #[doc = "Counter count up enabled at the ELC_GPTG input"]
4861        pub const _1: Self = Self::new(1);
4862    }
4863    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4864    pub struct Uselch_SPEC;
4865    pub type Uselch = crate::EnumBitfieldStruct<u8, Uselch_SPEC>;
4866    impl Uselch {
4867        #[doc = "Counter count up disabled at the ELC_GPTH input"]
4868        pub const _0: Self = Self::new(0);
4869
4870        #[doc = "Counter count up enabled at the ELC_GPTH input"]
4871        pub const _1: Self = Self::new(1);
4872    }
4873}
4874#[doc(hidden)]
4875#[derive(Copy, Clone, Eq, PartialEq)]
4876pub struct Gtdnsr_SPEC;
4877impl crate::sealed::RegSpec for Gtdnsr_SPEC {
4878    type DataType = u32;
4879}
4880
4881#[doc = "General PWM Timer Down Count Source Select Register"]
4882pub type Gtdnsr = crate::RegValueT<Gtdnsr_SPEC>;
4883
4884impl Gtdnsr {
4885    #[doc = "GTETRGA Pin Rising Input Source Counter Count Down Enable"]
4886    #[inline(always)]
4887    pub fn dsgtrgar(
4888        self,
4889    ) -> crate::common::RegisterField<
4890        0,
4891        0x1,
4892        1,
4893        0,
4894        gtdnsr::Dsgtrgar,
4895        gtdnsr::Dsgtrgar,
4896        Gtdnsr_SPEC,
4897        crate::common::RW,
4898    > {
4899        crate::common::RegisterField::<
4900            0,
4901            0x1,
4902            1,
4903            0,
4904            gtdnsr::Dsgtrgar,
4905            gtdnsr::Dsgtrgar,
4906            Gtdnsr_SPEC,
4907            crate::common::RW,
4908        >::from_register(self, 0)
4909    }
4910
4911    #[doc = "GTETRGA Pin Falling Input Source Counter Count Down Enable"]
4912    #[inline(always)]
4913    pub fn dsgtrgaf(
4914        self,
4915    ) -> crate::common::RegisterField<
4916        1,
4917        0x1,
4918        1,
4919        0,
4920        gtdnsr::Dsgtrgaf,
4921        gtdnsr::Dsgtrgaf,
4922        Gtdnsr_SPEC,
4923        crate::common::RW,
4924    > {
4925        crate::common::RegisterField::<
4926            1,
4927            0x1,
4928            1,
4929            0,
4930            gtdnsr::Dsgtrgaf,
4931            gtdnsr::Dsgtrgaf,
4932            Gtdnsr_SPEC,
4933            crate::common::RW,
4934        >::from_register(self, 0)
4935    }
4936
4937    #[doc = "GTETRGB Pin Rising Input Source Counter Count Down Enable"]
4938    #[inline(always)]
4939    pub fn dsgtrgbr(
4940        self,
4941    ) -> crate::common::RegisterField<
4942        2,
4943        0x1,
4944        1,
4945        0,
4946        gtdnsr::Dsgtrgbr,
4947        gtdnsr::Dsgtrgbr,
4948        Gtdnsr_SPEC,
4949        crate::common::RW,
4950    > {
4951        crate::common::RegisterField::<
4952            2,
4953            0x1,
4954            1,
4955            0,
4956            gtdnsr::Dsgtrgbr,
4957            gtdnsr::Dsgtrgbr,
4958            Gtdnsr_SPEC,
4959            crate::common::RW,
4960        >::from_register(self, 0)
4961    }
4962
4963    #[doc = "GTETRGB Pin Falling Input Source Counter Count Down Enable"]
4964    #[inline(always)]
4965    pub fn dsgtrgbf(
4966        self,
4967    ) -> crate::common::RegisterField<
4968        3,
4969        0x1,
4970        1,
4971        0,
4972        gtdnsr::Dsgtrgbf,
4973        gtdnsr::Dsgtrgbf,
4974        Gtdnsr_SPEC,
4975        crate::common::RW,
4976    > {
4977        crate::common::RegisterField::<
4978            3,
4979            0x1,
4980            1,
4981            0,
4982            gtdnsr::Dsgtrgbf,
4983            gtdnsr::Dsgtrgbf,
4984            Gtdnsr_SPEC,
4985            crate::common::RW,
4986        >::from_register(self, 0)
4987    }
4988
4989    #[doc = "GTETRGC Pin Rising Input Source Counter Count Down Enable"]
4990    #[inline(always)]
4991    pub fn dsgtrgcr(
4992        self,
4993    ) -> crate::common::RegisterField<
4994        4,
4995        0x1,
4996        1,
4997        0,
4998        gtdnsr::Dsgtrgcr,
4999        gtdnsr::Dsgtrgcr,
5000        Gtdnsr_SPEC,
5001        crate::common::RW,
5002    > {
5003        crate::common::RegisterField::<
5004            4,
5005            0x1,
5006            1,
5007            0,
5008            gtdnsr::Dsgtrgcr,
5009            gtdnsr::Dsgtrgcr,
5010            Gtdnsr_SPEC,
5011            crate::common::RW,
5012        >::from_register(self, 0)
5013    }
5014
5015    #[doc = "GTETRGC Pin Falling Input Source Counter Count Down Enable"]
5016    #[inline(always)]
5017    pub fn dsgtrgcf(
5018        self,
5019    ) -> crate::common::RegisterField<
5020        5,
5021        0x1,
5022        1,
5023        0,
5024        gtdnsr::Dsgtrgcf,
5025        gtdnsr::Dsgtrgcf,
5026        Gtdnsr_SPEC,
5027        crate::common::RW,
5028    > {
5029        crate::common::RegisterField::<
5030            5,
5031            0x1,
5032            1,
5033            0,
5034            gtdnsr::Dsgtrgcf,
5035            gtdnsr::Dsgtrgcf,
5036            Gtdnsr_SPEC,
5037            crate::common::RW,
5038        >::from_register(self, 0)
5039    }
5040
5041    #[doc = "GTETRGD Pin Rising Input Source Counter Count Down Enable"]
5042    #[inline(always)]
5043    pub fn dsgtrgdr(
5044        self,
5045    ) -> crate::common::RegisterField<
5046        6,
5047        0x1,
5048        1,
5049        0,
5050        gtdnsr::Dsgtrgdr,
5051        gtdnsr::Dsgtrgdr,
5052        Gtdnsr_SPEC,
5053        crate::common::RW,
5054    > {
5055        crate::common::RegisterField::<
5056            6,
5057            0x1,
5058            1,
5059            0,
5060            gtdnsr::Dsgtrgdr,
5061            gtdnsr::Dsgtrgdr,
5062            Gtdnsr_SPEC,
5063            crate::common::RW,
5064        >::from_register(self, 0)
5065    }
5066
5067    #[doc = "GTETRGD Pin Falling Input Source Counter Count Down Enable"]
5068    #[inline(always)]
5069    pub fn dsgtrgdf(
5070        self,
5071    ) -> crate::common::RegisterField<
5072        7,
5073        0x1,
5074        1,
5075        0,
5076        gtdnsr::Dsgtrgdf,
5077        gtdnsr::Dsgtrgdf,
5078        Gtdnsr_SPEC,
5079        crate::common::RW,
5080    > {
5081        crate::common::RegisterField::<
5082            7,
5083            0x1,
5084            1,
5085            0,
5086            gtdnsr::Dsgtrgdf,
5087            gtdnsr::Dsgtrgdf,
5088            Gtdnsr_SPEC,
5089            crate::common::RW,
5090        >::from_register(self, 0)
5091    }
5092
5093    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5094    #[inline(always)]
5095    pub fn dscarbl(
5096        self,
5097    ) -> crate::common::RegisterField<
5098        8,
5099        0x1,
5100        1,
5101        0,
5102        gtdnsr::Dscarbl,
5103        gtdnsr::Dscarbl,
5104        Gtdnsr_SPEC,
5105        crate::common::RW,
5106    > {
5107        crate::common::RegisterField::<
5108            8,
5109            0x1,
5110            1,
5111            0,
5112            gtdnsr::Dscarbl,
5113            gtdnsr::Dscarbl,
5114            Gtdnsr_SPEC,
5115            crate::common::RW,
5116        >::from_register(self, 0)
5117    }
5118
5119    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable"]
5120    #[inline(always)]
5121    pub fn dscarbh(
5122        self,
5123    ) -> crate::common::RegisterField<
5124        9,
5125        0x1,
5126        1,
5127        0,
5128        gtdnsr::Dscarbh,
5129        gtdnsr::Dscarbh,
5130        Gtdnsr_SPEC,
5131        crate::common::RW,
5132    > {
5133        crate::common::RegisterField::<
5134            9,
5135            0x1,
5136            1,
5137            0,
5138            gtdnsr::Dscarbh,
5139            gtdnsr::Dscarbh,
5140            Gtdnsr_SPEC,
5141            crate::common::RW,
5142        >::from_register(self, 0)
5143    }
5144
5145    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable"]
5146    #[inline(always)]
5147    pub fn dscafbl(
5148        self,
5149    ) -> crate::common::RegisterField<
5150        10,
5151        0x1,
5152        1,
5153        0,
5154        gtdnsr::Dscafbl,
5155        gtdnsr::Dscafbl,
5156        Gtdnsr_SPEC,
5157        crate::common::RW,
5158    > {
5159        crate::common::RegisterField::<
5160            10,
5161            0x1,
5162            1,
5163            0,
5164            gtdnsr::Dscafbl,
5165            gtdnsr::Dscafbl,
5166            Gtdnsr_SPEC,
5167            crate::common::RW,
5168        >::from_register(self, 0)
5169    }
5170
5171    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable"]
5172    #[inline(always)]
5173    pub fn dscafbh(
5174        self,
5175    ) -> crate::common::RegisterField<
5176        11,
5177        0x1,
5178        1,
5179        0,
5180        gtdnsr::Dscafbh,
5181        gtdnsr::Dscafbh,
5182        Gtdnsr_SPEC,
5183        crate::common::RW,
5184    > {
5185        crate::common::RegisterField::<
5186            11,
5187            0x1,
5188            1,
5189            0,
5190            gtdnsr::Dscafbh,
5191            gtdnsr::Dscafbh,
5192            Gtdnsr_SPEC,
5193            crate::common::RW,
5194        >::from_register(self, 0)
5195    }
5196
5197    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5198    #[inline(always)]
5199    pub fn dscbral(
5200        self,
5201    ) -> crate::common::RegisterField<
5202        12,
5203        0x1,
5204        1,
5205        0,
5206        gtdnsr::Dscbral,
5207        gtdnsr::Dscbral,
5208        Gtdnsr_SPEC,
5209        crate::common::RW,
5210    > {
5211        crate::common::RegisterField::<
5212            12,
5213            0x1,
5214            1,
5215            0,
5216            gtdnsr::Dscbral,
5217            gtdnsr::Dscbral,
5218            Gtdnsr_SPEC,
5219            crate::common::RW,
5220        >::from_register(self, 0)
5221    }
5222
5223    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable"]
5224    #[inline(always)]
5225    pub fn dscbrah(
5226        self,
5227    ) -> crate::common::RegisterField<
5228        13,
5229        0x1,
5230        1,
5231        0,
5232        gtdnsr::Dscbrah,
5233        gtdnsr::Dscbrah,
5234        Gtdnsr_SPEC,
5235        crate::common::RW,
5236    > {
5237        crate::common::RegisterField::<
5238            13,
5239            0x1,
5240            1,
5241            0,
5242            gtdnsr::Dscbrah,
5243            gtdnsr::Dscbrah,
5244            Gtdnsr_SPEC,
5245            crate::common::RW,
5246        >::from_register(self, 0)
5247    }
5248
5249    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable"]
5250    #[inline(always)]
5251    pub fn dscbfal(
5252        self,
5253    ) -> crate::common::RegisterField<
5254        14,
5255        0x1,
5256        1,
5257        0,
5258        gtdnsr::Dscbfal,
5259        gtdnsr::Dscbfal,
5260        Gtdnsr_SPEC,
5261        crate::common::RW,
5262    > {
5263        crate::common::RegisterField::<
5264            14,
5265            0x1,
5266            1,
5267            0,
5268            gtdnsr::Dscbfal,
5269            gtdnsr::Dscbfal,
5270            Gtdnsr_SPEC,
5271            crate::common::RW,
5272        >::from_register(self, 0)
5273    }
5274
5275    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable"]
5276    #[inline(always)]
5277    pub fn dscbfah(
5278        self,
5279    ) -> crate::common::RegisterField<
5280        15,
5281        0x1,
5282        1,
5283        0,
5284        gtdnsr::Dscbfah,
5285        gtdnsr::Dscbfah,
5286        Gtdnsr_SPEC,
5287        crate::common::RW,
5288    > {
5289        crate::common::RegisterField::<
5290            15,
5291            0x1,
5292            1,
5293            0,
5294            gtdnsr::Dscbfah,
5295            gtdnsr::Dscbfah,
5296            Gtdnsr_SPEC,
5297            crate::common::RW,
5298        >::from_register(self, 0)
5299    }
5300
5301    #[doc = "ELC_GPTA Event Source Counter Count Down Enable"]
5302    #[inline(always)]
5303    pub fn dselca(
5304        self,
5305    ) -> crate::common::RegisterField<
5306        16,
5307        0x1,
5308        1,
5309        0,
5310        gtdnsr::Dselca,
5311        gtdnsr::Dselca,
5312        Gtdnsr_SPEC,
5313        crate::common::RW,
5314    > {
5315        crate::common::RegisterField::<
5316            16,
5317            0x1,
5318            1,
5319            0,
5320            gtdnsr::Dselca,
5321            gtdnsr::Dselca,
5322            Gtdnsr_SPEC,
5323            crate::common::RW,
5324        >::from_register(self, 0)
5325    }
5326
5327    #[doc = "ELC_GPTB Event Source Counter Count Down Enable"]
5328    #[inline(always)]
5329    pub fn dselcb(
5330        self,
5331    ) -> crate::common::RegisterField<
5332        17,
5333        0x1,
5334        1,
5335        0,
5336        gtdnsr::Dselcb,
5337        gtdnsr::Dselcb,
5338        Gtdnsr_SPEC,
5339        crate::common::RW,
5340    > {
5341        crate::common::RegisterField::<
5342            17,
5343            0x1,
5344            1,
5345            0,
5346            gtdnsr::Dselcb,
5347            gtdnsr::Dselcb,
5348            Gtdnsr_SPEC,
5349            crate::common::RW,
5350        >::from_register(self, 0)
5351    }
5352
5353    #[doc = "ELC_GPTC Event Source Counter Count Down Enable"]
5354    #[inline(always)]
5355    pub fn dselcc(
5356        self,
5357    ) -> crate::common::RegisterField<
5358        18,
5359        0x1,
5360        1,
5361        0,
5362        gtdnsr::Dselcc,
5363        gtdnsr::Dselcc,
5364        Gtdnsr_SPEC,
5365        crate::common::RW,
5366    > {
5367        crate::common::RegisterField::<
5368            18,
5369            0x1,
5370            1,
5371            0,
5372            gtdnsr::Dselcc,
5373            gtdnsr::Dselcc,
5374            Gtdnsr_SPEC,
5375            crate::common::RW,
5376        >::from_register(self, 0)
5377    }
5378
5379    #[doc = "ELC_GPTD Event Source Counter Count Down Enable"]
5380    #[inline(always)]
5381    pub fn dselcd(
5382        self,
5383    ) -> crate::common::RegisterField<
5384        19,
5385        0x1,
5386        1,
5387        0,
5388        gtdnsr::Dselcd,
5389        gtdnsr::Dselcd,
5390        Gtdnsr_SPEC,
5391        crate::common::RW,
5392    > {
5393        crate::common::RegisterField::<
5394            19,
5395            0x1,
5396            1,
5397            0,
5398            gtdnsr::Dselcd,
5399            gtdnsr::Dselcd,
5400            Gtdnsr_SPEC,
5401            crate::common::RW,
5402        >::from_register(self, 0)
5403    }
5404
5405    #[doc = "ELC_GPTE Event Source Counter Count Down Enable"]
5406    #[inline(always)]
5407    pub fn dselce(
5408        self,
5409    ) -> crate::common::RegisterField<
5410        20,
5411        0x1,
5412        1,
5413        0,
5414        gtdnsr::Dselce,
5415        gtdnsr::Dselce,
5416        Gtdnsr_SPEC,
5417        crate::common::RW,
5418    > {
5419        crate::common::RegisterField::<
5420            20,
5421            0x1,
5422            1,
5423            0,
5424            gtdnsr::Dselce,
5425            gtdnsr::Dselce,
5426            Gtdnsr_SPEC,
5427            crate::common::RW,
5428        >::from_register(self, 0)
5429    }
5430
5431    #[doc = "ELC_GPTF Event Source Counter Count Down Enable"]
5432    #[inline(always)]
5433    pub fn dselcf(
5434        self,
5435    ) -> crate::common::RegisterField<
5436        21,
5437        0x1,
5438        1,
5439        0,
5440        gtdnsr::Dselcf,
5441        gtdnsr::Dselcf,
5442        Gtdnsr_SPEC,
5443        crate::common::RW,
5444    > {
5445        crate::common::RegisterField::<
5446            21,
5447            0x1,
5448            1,
5449            0,
5450            gtdnsr::Dselcf,
5451            gtdnsr::Dselcf,
5452            Gtdnsr_SPEC,
5453            crate::common::RW,
5454        >::from_register(self, 0)
5455    }
5456
5457    #[doc = "ELC_GPTG Event Source Counter Count Down Enable"]
5458    #[inline(always)]
5459    pub fn dselcg(
5460        self,
5461    ) -> crate::common::RegisterField<
5462        22,
5463        0x1,
5464        1,
5465        0,
5466        gtdnsr::Dselcg,
5467        gtdnsr::Dselcg,
5468        Gtdnsr_SPEC,
5469        crate::common::RW,
5470    > {
5471        crate::common::RegisterField::<
5472            22,
5473            0x1,
5474            1,
5475            0,
5476            gtdnsr::Dselcg,
5477            gtdnsr::Dselcg,
5478            Gtdnsr_SPEC,
5479            crate::common::RW,
5480        >::from_register(self, 0)
5481    }
5482
5483    #[doc = "ELC_GPTH Event Source Counter Count Down Enable"]
5484    #[inline(always)]
5485    pub fn dselch(
5486        self,
5487    ) -> crate::common::RegisterField<
5488        23,
5489        0x1,
5490        1,
5491        0,
5492        gtdnsr::Dselch,
5493        gtdnsr::Dselch,
5494        Gtdnsr_SPEC,
5495        crate::common::RW,
5496    > {
5497        crate::common::RegisterField::<
5498            23,
5499            0x1,
5500            1,
5501            0,
5502            gtdnsr::Dselch,
5503            gtdnsr::Dselch,
5504            Gtdnsr_SPEC,
5505            crate::common::RW,
5506        >::from_register(self, 0)
5507    }
5508}
5509impl ::core::default::Default for Gtdnsr {
5510    #[inline(always)]
5511    fn default() -> Gtdnsr {
5512        <crate::RegValueT<Gtdnsr_SPEC> as RegisterValue<_>>::new(0)
5513    }
5514}
5515pub mod gtdnsr {
5516
5517    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5518    pub struct Dsgtrgar_SPEC;
5519    pub type Dsgtrgar = crate::EnumBitfieldStruct<u8, Dsgtrgar_SPEC>;
5520    impl Dsgtrgar {
5521        #[doc = "Counter count down disabled on the rising edge of GTETRGA input"]
5522        pub const _0: Self = Self::new(0);
5523
5524        #[doc = "Counter count down enabled on the rising edge of GTETRGA input"]
5525        pub const _1: Self = Self::new(1);
5526    }
5527    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5528    pub struct Dsgtrgaf_SPEC;
5529    pub type Dsgtrgaf = crate::EnumBitfieldStruct<u8, Dsgtrgaf_SPEC>;
5530    impl Dsgtrgaf {
5531        #[doc = "Counter count down disabled on the falling edge of GTETRGA input"]
5532        pub const _0: Self = Self::new(0);
5533
5534        #[doc = "Counter count down enabled on the falling edge of GTETRGA input"]
5535        pub const _1: Self = Self::new(1);
5536    }
5537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5538    pub struct Dsgtrgbr_SPEC;
5539    pub type Dsgtrgbr = crate::EnumBitfieldStruct<u8, Dsgtrgbr_SPEC>;
5540    impl Dsgtrgbr {
5541        #[doc = "Counter count down disabled on the rising edge of GTETRGB input"]
5542        pub const _0: Self = Self::new(0);
5543
5544        #[doc = "Counter count down enabled on the rising edge of GTETRGB input"]
5545        pub const _1: Self = Self::new(1);
5546    }
5547    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5548    pub struct Dsgtrgbf_SPEC;
5549    pub type Dsgtrgbf = crate::EnumBitfieldStruct<u8, Dsgtrgbf_SPEC>;
5550    impl Dsgtrgbf {
5551        #[doc = "Counter count down disabled on the falling edge of GTETRGB input"]
5552        pub const _0: Self = Self::new(0);
5553
5554        #[doc = "Counter count down enabled on the falling edge of GTETRGB input"]
5555        pub const _1: Self = Self::new(1);
5556    }
5557    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5558    pub struct Dsgtrgcr_SPEC;
5559    pub type Dsgtrgcr = crate::EnumBitfieldStruct<u8, Dsgtrgcr_SPEC>;
5560    impl Dsgtrgcr {
5561        #[doc = "Counter count down disabled on the rising edge of GTETRGC input"]
5562        pub const _0: Self = Self::new(0);
5563
5564        #[doc = "Counter count down enabled on the rising edge of GTETRGC input"]
5565        pub const _1: Self = Self::new(1);
5566    }
5567    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5568    pub struct Dsgtrgcf_SPEC;
5569    pub type Dsgtrgcf = crate::EnumBitfieldStruct<u8, Dsgtrgcf_SPEC>;
5570    impl Dsgtrgcf {
5571        #[doc = "Counter count down disabled on the falling edge of GTETRGC input"]
5572        pub const _0: Self = Self::new(0);
5573
5574        #[doc = "Counter count down enabled on the falling edge of GTETRGC input"]
5575        pub const _1: Self = Self::new(1);
5576    }
5577    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5578    pub struct Dsgtrgdr_SPEC;
5579    pub type Dsgtrgdr = crate::EnumBitfieldStruct<u8, Dsgtrgdr_SPEC>;
5580    impl Dsgtrgdr {
5581        #[doc = "Counter count down disabled on the rising edge of GTETRGD input"]
5582        pub const _0: Self = Self::new(0);
5583
5584        #[doc = "Counter count down enabled on the rising edge of GTETRGD input"]
5585        pub const _1: Self = Self::new(1);
5586    }
5587    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5588    pub struct Dsgtrgdf_SPEC;
5589    pub type Dsgtrgdf = crate::EnumBitfieldStruct<u8, Dsgtrgdf_SPEC>;
5590    impl Dsgtrgdf {
5591        #[doc = "Counter count down disabled on the falling edge of GTETRGD input"]
5592        pub const _0: Self = Self::new(0);
5593
5594        #[doc = "Counter count down enabled on the falling edge of GTETRGD input"]
5595        pub const _1: Self = Self::new(1);
5596    }
5597    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5598    pub struct Dscarbl_SPEC;
5599    pub type Dscarbl = crate::EnumBitfieldStruct<u8, Dscarbl_SPEC>;
5600    impl Dscarbl {
5601        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5602        pub const _0: Self = Self::new(0);
5603
5604        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
5605        pub const _1: Self = Self::new(1);
5606    }
5607    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5608    pub struct Dscarbh_SPEC;
5609    pub type Dscarbh = crate::EnumBitfieldStruct<u8, Dscarbh_SPEC>;
5610    impl Dscarbh {
5611        #[doc = "Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5612        pub const _0: Self = Self::new(0);
5613
5614        #[doc = "Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
5615        pub const _1: Self = Self::new(1);
5616    }
5617    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5618    pub struct Dscafbl_SPEC;
5619    pub type Dscafbl = crate::EnumBitfieldStruct<u8, Dscafbl_SPEC>;
5620    impl Dscafbl {
5621        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5622        pub const _0: Self = Self::new(0);
5623
5624        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
5625        pub const _1: Self = Self::new(1);
5626    }
5627    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5628    pub struct Dscafbh_SPEC;
5629    pub type Dscafbh = crate::EnumBitfieldStruct<u8, Dscafbh_SPEC>;
5630    impl Dscafbh {
5631        #[doc = "Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5632        pub const _0: Self = Self::new(0);
5633
5634        #[doc = "Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
5635        pub const _1: Self = Self::new(1);
5636    }
5637    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5638    pub struct Dscbral_SPEC;
5639    pub type Dscbral = crate::EnumBitfieldStruct<u8, Dscbral_SPEC>;
5640    impl Dscbral {
5641        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5642        pub const _0: Self = Self::new(0);
5643
5644        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
5645        pub const _1: Self = Self::new(1);
5646    }
5647    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5648    pub struct Dscbrah_SPEC;
5649    pub type Dscbrah = crate::EnumBitfieldStruct<u8, Dscbrah_SPEC>;
5650    impl Dscbrah {
5651        #[doc = "Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5652        pub const _0: Self = Self::new(0);
5653
5654        #[doc = "Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
5655        pub const _1: Self = Self::new(1);
5656    }
5657    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5658    pub struct Dscbfal_SPEC;
5659    pub type Dscbfal = crate::EnumBitfieldStruct<u8, Dscbfal_SPEC>;
5660    impl Dscbfal {
5661        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5662        pub const _0: Self = Self::new(0);
5663
5664        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
5665        pub const _1: Self = Self::new(1);
5666    }
5667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5668    pub struct Dscbfah_SPEC;
5669    pub type Dscbfah = crate::EnumBitfieldStruct<u8, Dscbfah_SPEC>;
5670    impl Dscbfah {
5671        #[doc = "Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5672        pub const _0: Self = Self::new(0);
5673
5674        #[doc = "Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
5675        pub const _1: Self = Self::new(1);
5676    }
5677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5678    pub struct Dselca_SPEC;
5679    pub type Dselca = crate::EnumBitfieldStruct<u8, Dselca_SPEC>;
5680    impl Dselca {
5681        #[doc = "Counter count down disabled at the ELC_GPTA input"]
5682        pub const _0: Self = Self::new(0);
5683
5684        #[doc = "Counter count down enabled at the ELC_GPTA input"]
5685        pub const _1: Self = Self::new(1);
5686    }
5687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5688    pub struct Dselcb_SPEC;
5689    pub type Dselcb = crate::EnumBitfieldStruct<u8, Dselcb_SPEC>;
5690    impl Dselcb {
5691        #[doc = "Counter count down disabled at the ELC_GPTB input"]
5692        pub const _0: Self = Self::new(0);
5693
5694        #[doc = "Counter count down enabled at the ELC_GPTB input"]
5695        pub const _1: Self = Self::new(1);
5696    }
5697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5698    pub struct Dselcc_SPEC;
5699    pub type Dselcc = crate::EnumBitfieldStruct<u8, Dselcc_SPEC>;
5700    impl Dselcc {
5701        #[doc = "Counter count down disabled at the ELC_GPTC input"]
5702        pub const _0: Self = Self::new(0);
5703
5704        #[doc = "Counter count down enabled at the ELC_GPTC input"]
5705        pub const _1: Self = Self::new(1);
5706    }
5707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5708    pub struct Dselcd_SPEC;
5709    pub type Dselcd = crate::EnumBitfieldStruct<u8, Dselcd_SPEC>;
5710    impl Dselcd {
5711        #[doc = "Counter count down disabled at the ELC_GPTD input"]
5712        pub const _0: Self = Self::new(0);
5713
5714        #[doc = "Counter count down enabled at the ELC_GPTD input"]
5715        pub const _1: Self = Self::new(1);
5716    }
5717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5718    pub struct Dselce_SPEC;
5719    pub type Dselce = crate::EnumBitfieldStruct<u8, Dselce_SPEC>;
5720    impl Dselce {
5721        #[doc = "Counter count down disabled at the ELC_GPTE input"]
5722        pub const _0: Self = Self::new(0);
5723
5724        #[doc = "Counter count down enabled at the ELC_GPTE input"]
5725        pub const _1: Self = Self::new(1);
5726    }
5727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5728    pub struct Dselcf_SPEC;
5729    pub type Dselcf = crate::EnumBitfieldStruct<u8, Dselcf_SPEC>;
5730    impl Dselcf {
5731        #[doc = "Counter count down disabled at the ELC_GPTF input"]
5732        pub const _0: Self = Self::new(0);
5733
5734        #[doc = "Counter count down enabled at the ELC_GPTF input"]
5735        pub const _1: Self = Self::new(1);
5736    }
5737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5738    pub struct Dselcg_SPEC;
5739    pub type Dselcg = crate::EnumBitfieldStruct<u8, Dselcg_SPEC>;
5740    impl Dselcg {
5741        #[doc = "Counter count down disabled at the ELC_GPTG input"]
5742        pub const _0: Self = Self::new(0);
5743
5744        #[doc = "Counter count down enabled at the ELC_GPTG input"]
5745        pub const _1: Self = Self::new(1);
5746    }
5747    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5748    pub struct Dselch_SPEC;
5749    pub type Dselch = crate::EnumBitfieldStruct<u8, Dselch_SPEC>;
5750    impl Dselch {
5751        #[doc = "Counter count down disabled at the ELC_GPTH input"]
5752        pub const _0: Self = Self::new(0);
5753
5754        #[doc = "Counter count down enabled at the ELC_GPTH input"]
5755        pub const _1: Self = Self::new(1);
5756    }
5757}
5758#[doc(hidden)]
5759#[derive(Copy, Clone, Eq, PartialEq)]
5760pub struct Gticasr_SPEC;
5761impl crate::sealed::RegSpec for Gticasr_SPEC {
5762    type DataType = u32;
5763}
5764
5765#[doc = "General PWM Timer Input Capture Source Select Register A"]
5766pub type Gticasr = crate::RegValueT<Gticasr_SPEC>;
5767
5768impl Gticasr {
5769    #[doc = "GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable"]
5770    #[inline(always)]
5771    pub fn asgtrgar(
5772        self,
5773    ) -> crate::common::RegisterField<
5774        0,
5775        0x1,
5776        1,
5777        0,
5778        gticasr::Asgtrgar,
5779        gticasr::Asgtrgar,
5780        Gticasr_SPEC,
5781        crate::common::RW,
5782    > {
5783        crate::common::RegisterField::<
5784            0,
5785            0x1,
5786            1,
5787            0,
5788            gticasr::Asgtrgar,
5789            gticasr::Asgtrgar,
5790            Gticasr_SPEC,
5791            crate::common::RW,
5792        >::from_register(self, 0)
5793    }
5794
5795    #[doc = "GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable"]
5796    #[inline(always)]
5797    pub fn asgtrgaf(
5798        self,
5799    ) -> crate::common::RegisterField<
5800        1,
5801        0x1,
5802        1,
5803        0,
5804        gticasr::Asgtrgaf,
5805        gticasr::Asgtrgaf,
5806        Gticasr_SPEC,
5807        crate::common::RW,
5808    > {
5809        crate::common::RegisterField::<
5810            1,
5811            0x1,
5812            1,
5813            0,
5814            gticasr::Asgtrgaf,
5815            gticasr::Asgtrgaf,
5816            Gticasr_SPEC,
5817            crate::common::RW,
5818        >::from_register(self, 0)
5819    }
5820
5821    #[doc = "GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable"]
5822    #[inline(always)]
5823    pub fn asgtrgbr(
5824        self,
5825    ) -> crate::common::RegisterField<
5826        2,
5827        0x1,
5828        1,
5829        0,
5830        gticasr::Asgtrgbr,
5831        gticasr::Asgtrgbr,
5832        Gticasr_SPEC,
5833        crate::common::RW,
5834    > {
5835        crate::common::RegisterField::<
5836            2,
5837            0x1,
5838            1,
5839            0,
5840            gticasr::Asgtrgbr,
5841            gticasr::Asgtrgbr,
5842            Gticasr_SPEC,
5843            crate::common::RW,
5844        >::from_register(self, 0)
5845    }
5846
5847    #[doc = "GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable"]
5848    #[inline(always)]
5849    pub fn asgtrgbf(
5850        self,
5851    ) -> crate::common::RegisterField<
5852        3,
5853        0x1,
5854        1,
5855        0,
5856        gticasr::Asgtrgbf,
5857        gticasr::Asgtrgbf,
5858        Gticasr_SPEC,
5859        crate::common::RW,
5860    > {
5861        crate::common::RegisterField::<
5862            3,
5863            0x1,
5864            1,
5865            0,
5866            gticasr::Asgtrgbf,
5867            gticasr::Asgtrgbf,
5868            Gticasr_SPEC,
5869            crate::common::RW,
5870        >::from_register(self, 0)
5871    }
5872
5873    #[doc = "GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable"]
5874    #[inline(always)]
5875    pub fn asgtrgcr(
5876        self,
5877    ) -> crate::common::RegisterField<
5878        4,
5879        0x1,
5880        1,
5881        0,
5882        gticasr::Asgtrgcr,
5883        gticasr::Asgtrgcr,
5884        Gticasr_SPEC,
5885        crate::common::RW,
5886    > {
5887        crate::common::RegisterField::<
5888            4,
5889            0x1,
5890            1,
5891            0,
5892            gticasr::Asgtrgcr,
5893            gticasr::Asgtrgcr,
5894            Gticasr_SPEC,
5895            crate::common::RW,
5896        >::from_register(self, 0)
5897    }
5898
5899    #[doc = "GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable"]
5900    #[inline(always)]
5901    pub fn asgtrgcf(
5902        self,
5903    ) -> crate::common::RegisterField<
5904        5,
5905        0x1,
5906        1,
5907        0,
5908        gticasr::Asgtrgcf,
5909        gticasr::Asgtrgcf,
5910        Gticasr_SPEC,
5911        crate::common::RW,
5912    > {
5913        crate::common::RegisterField::<
5914            5,
5915            0x1,
5916            1,
5917            0,
5918            gticasr::Asgtrgcf,
5919            gticasr::Asgtrgcf,
5920            Gticasr_SPEC,
5921            crate::common::RW,
5922        >::from_register(self, 0)
5923    }
5924
5925    #[doc = "GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable"]
5926    #[inline(always)]
5927    pub fn asgtrgdr(
5928        self,
5929    ) -> crate::common::RegisterField<
5930        6,
5931        0x1,
5932        1,
5933        0,
5934        gticasr::Asgtrgdr,
5935        gticasr::Asgtrgdr,
5936        Gticasr_SPEC,
5937        crate::common::RW,
5938    > {
5939        crate::common::RegisterField::<
5940            6,
5941            0x1,
5942            1,
5943            0,
5944            gticasr::Asgtrgdr,
5945            gticasr::Asgtrgdr,
5946            Gticasr_SPEC,
5947            crate::common::RW,
5948        >::from_register(self, 0)
5949    }
5950
5951    #[doc = "GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable"]
5952    #[inline(always)]
5953    pub fn asgtrgdf(
5954        self,
5955    ) -> crate::common::RegisterField<
5956        7,
5957        0x1,
5958        1,
5959        0,
5960        gticasr::Asgtrgdf,
5961        gticasr::Asgtrgdf,
5962        Gticasr_SPEC,
5963        crate::common::RW,
5964    > {
5965        crate::common::RegisterField::<
5966            7,
5967            0x1,
5968            1,
5969            0,
5970            gticasr::Asgtrgdf,
5971            gticasr::Asgtrgdf,
5972            Gticasr_SPEC,
5973            crate::common::RW,
5974        >::from_register(self, 0)
5975    }
5976
5977    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
5978    #[inline(always)]
5979    pub fn ascarbl(
5980        self,
5981    ) -> crate::common::RegisterField<
5982        8,
5983        0x1,
5984        1,
5985        0,
5986        gticasr::Ascarbl,
5987        gticasr::Ascarbl,
5988        Gticasr_SPEC,
5989        crate::common::RW,
5990    > {
5991        crate::common::RegisterField::<
5992            8,
5993            0x1,
5994            1,
5995            0,
5996            gticasr::Ascarbl,
5997            gticasr::Ascarbl,
5998            Gticasr_SPEC,
5999            crate::common::RW,
6000        >::from_register(self, 0)
6001    }
6002
6003    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6004    #[inline(always)]
6005    pub fn ascarbh(
6006        self,
6007    ) -> crate::common::RegisterField<
6008        9,
6009        0x1,
6010        1,
6011        0,
6012        gticasr::Ascarbh,
6013        gticasr::Ascarbh,
6014        Gticasr_SPEC,
6015        crate::common::RW,
6016    > {
6017        crate::common::RegisterField::<
6018            9,
6019            0x1,
6020            1,
6021            0,
6022            gticasr::Ascarbh,
6023            gticasr::Ascarbh,
6024            Gticasr_SPEC,
6025            crate::common::RW,
6026        >::from_register(self, 0)
6027    }
6028
6029    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRA Input Capture Enable"]
6030    #[inline(always)]
6031    pub fn ascafbl(
6032        self,
6033    ) -> crate::common::RegisterField<
6034        10,
6035        0x1,
6036        1,
6037        0,
6038        gticasr::Ascafbl,
6039        gticasr::Ascafbl,
6040        Gticasr_SPEC,
6041        crate::common::RW,
6042    > {
6043        crate::common::RegisterField::<
6044            10,
6045            0x1,
6046            1,
6047            0,
6048            gticasr::Ascafbl,
6049            gticasr::Ascafbl,
6050            Gticasr_SPEC,
6051            crate::common::RW,
6052        >::from_register(self, 0)
6053    }
6054
6055    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRA Input Capture Enable"]
6056    #[inline(always)]
6057    pub fn ascafbh(
6058        self,
6059    ) -> crate::common::RegisterField<
6060        11,
6061        0x1,
6062        1,
6063        0,
6064        gticasr::Ascafbh,
6065        gticasr::Ascafbh,
6066        Gticasr_SPEC,
6067        crate::common::RW,
6068    > {
6069        crate::common::RegisterField::<
6070            11,
6071            0x1,
6072            1,
6073            0,
6074            gticasr::Ascafbh,
6075            gticasr::Ascafbh,
6076            Gticasr_SPEC,
6077            crate::common::RW,
6078        >::from_register(self, 0)
6079    }
6080
6081    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6082    #[inline(always)]
6083    pub fn ascbral(
6084        self,
6085    ) -> crate::common::RegisterField<
6086        12,
6087        0x1,
6088        1,
6089        0,
6090        gticasr::Ascbral,
6091        gticasr::Ascbral,
6092        Gticasr_SPEC,
6093        crate::common::RW,
6094    > {
6095        crate::common::RegisterField::<
6096            12,
6097            0x1,
6098            1,
6099            0,
6100            gticasr::Ascbral,
6101            gticasr::Ascbral,
6102            Gticasr_SPEC,
6103            crate::common::RW,
6104        >::from_register(self, 0)
6105    }
6106
6107    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6108    #[inline(always)]
6109    pub fn ascbrah(
6110        self,
6111    ) -> crate::common::RegisterField<
6112        13,
6113        0x1,
6114        1,
6115        0,
6116        gticasr::Ascbrah,
6117        gticasr::Ascbrah,
6118        Gticasr_SPEC,
6119        crate::common::RW,
6120    > {
6121        crate::common::RegisterField::<
6122            13,
6123            0x1,
6124            1,
6125            0,
6126            gticasr::Ascbrah,
6127            gticasr::Ascbrah,
6128            Gticasr_SPEC,
6129            crate::common::RW,
6130        >::from_register(self, 0)
6131    }
6132
6133    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRA Input Capture Enable"]
6134    #[inline(always)]
6135    pub fn ascbfal(
6136        self,
6137    ) -> crate::common::RegisterField<
6138        14,
6139        0x1,
6140        1,
6141        0,
6142        gticasr::Ascbfal,
6143        gticasr::Ascbfal,
6144        Gticasr_SPEC,
6145        crate::common::RW,
6146    > {
6147        crate::common::RegisterField::<
6148            14,
6149            0x1,
6150            1,
6151            0,
6152            gticasr::Ascbfal,
6153            gticasr::Ascbfal,
6154            Gticasr_SPEC,
6155            crate::common::RW,
6156        >::from_register(self, 0)
6157    }
6158
6159    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRA Input Capture Enable"]
6160    #[inline(always)]
6161    pub fn ascbfah(
6162        self,
6163    ) -> crate::common::RegisterField<
6164        15,
6165        0x1,
6166        1,
6167        0,
6168        gticasr::Ascbfah,
6169        gticasr::Ascbfah,
6170        Gticasr_SPEC,
6171        crate::common::RW,
6172    > {
6173        crate::common::RegisterField::<
6174            15,
6175            0x1,
6176            1,
6177            0,
6178            gticasr::Ascbfah,
6179            gticasr::Ascbfah,
6180            Gticasr_SPEC,
6181            crate::common::RW,
6182        >::from_register(self, 0)
6183    }
6184
6185    #[doc = "ELC_GPTA Event Source GTCCRA Input Capture Enable"]
6186    #[inline(always)]
6187    pub fn aselca(
6188        self,
6189    ) -> crate::common::RegisterField<
6190        16,
6191        0x1,
6192        1,
6193        0,
6194        gticasr::Aselca,
6195        gticasr::Aselca,
6196        Gticasr_SPEC,
6197        crate::common::RW,
6198    > {
6199        crate::common::RegisterField::<
6200            16,
6201            0x1,
6202            1,
6203            0,
6204            gticasr::Aselca,
6205            gticasr::Aselca,
6206            Gticasr_SPEC,
6207            crate::common::RW,
6208        >::from_register(self, 0)
6209    }
6210
6211    #[doc = "ELC_GPTB Event Source GTCCRA Input Capture Enable"]
6212    #[inline(always)]
6213    pub fn aselcb(
6214        self,
6215    ) -> crate::common::RegisterField<
6216        17,
6217        0x1,
6218        1,
6219        0,
6220        gticasr::Aselcb,
6221        gticasr::Aselcb,
6222        Gticasr_SPEC,
6223        crate::common::RW,
6224    > {
6225        crate::common::RegisterField::<
6226            17,
6227            0x1,
6228            1,
6229            0,
6230            gticasr::Aselcb,
6231            gticasr::Aselcb,
6232            Gticasr_SPEC,
6233            crate::common::RW,
6234        >::from_register(self, 0)
6235    }
6236
6237    #[doc = "ELC_GPTC Event Source GTCCRA Input Capture Enable"]
6238    #[inline(always)]
6239    pub fn aselcc(
6240        self,
6241    ) -> crate::common::RegisterField<
6242        18,
6243        0x1,
6244        1,
6245        0,
6246        gticasr::Aselcc,
6247        gticasr::Aselcc,
6248        Gticasr_SPEC,
6249        crate::common::RW,
6250    > {
6251        crate::common::RegisterField::<
6252            18,
6253            0x1,
6254            1,
6255            0,
6256            gticasr::Aselcc,
6257            gticasr::Aselcc,
6258            Gticasr_SPEC,
6259            crate::common::RW,
6260        >::from_register(self, 0)
6261    }
6262
6263    #[doc = "ELC_GPTD Event Source GTCCRA Input Capture Enable"]
6264    #[inline(always)]
6265    pub fn aselcd(
6266        self,
6267    ) -> crate::common::RegisterField<
6268        19,
6269        0x1,
6270        1,
6271        0,
6272        gticasr::Aselcd,
6273        gticasr::Aselcd,
6274        Gticasr_SPEC,
6275        crate::common::RW,
6276    > {
6277        crate::common::RegisterField::<
6278            19,
6279            0x1,
6280            1,
6281            0,
6282            gticasr::Aselcd,
6283            gticasr::Aselcd,
6284            Gticasr_SPEC,
6285            crate::common::RW,
6286        >::from_register(self, 0)
6287    }
6288
6289    #[doc = "ELC_GPTE Event Source GTCCRA Input Capture Enable"]
6290    #[inline(always)]
6291    pub fn aselce(
6292        self,
6293    ) -> crate::common::RegisterField<
6294        20,
6295        0x1,
6296        1,
6297        0,
6298        gticasr::Aselce,
6299        gticasr::Aselce,
6300        Gticasr_SPEC,
6301        crate::common::RW,
6302    > {
6303        crate::common::RegisterField::<
6304            20,
6305            0x1,
6306            1,
6307            0,
6308            gticasr::Aselce,
6309            gticasr::Aselce,
6310            Gticasr_SPEC,
6311            crate::common::RW,
6312        >::from_register(self, 0)
6313    }
6314
6315    #[doc = "ELC_GPTF Event Source GTCCRA Input Capture Enable"]
6316    #[inline(always)]
6317    pub fn aselcf(
6318        self,
6319    ) -> crate::common::RegisterField<
6320        21,
6321        0x1,
6322        1,
6323        0,
6324        gticasr::Aselcf,
6325        gticasr::Aselcf,
6326        Gticasr_SPEC,
6327        crate::common::RW,
6328    > {
6329        crate::common::RegisterField::<
6330            21,
6331            0x1,
6332            1,
6333            0,
6334            gticasr::Aselcf,
6335            gticasr::Aselcf,
6336            Gticasr_SPEC,
6337            crate::common::RW,
6338        >::from_register(self, 0)
6339    }
6340
6341    #[doc = "ELC_GPTG Event Source GTCCRA Input Capture Enable"]
6342    #[inline(always)]
6343    pub fn aselcg(
6344        self,
6345    ) -> crate::common::RegisterField<
6346        22,
6347        0x1,
6348        1,
6349        0,
6350        gticasr::Aselcg,
6351        gticasr::Aselcg,
6352        Gticasr_SPEC,
6353        crate::common::RW,
6354    > {
6355        crate::common::RegisterField::<
6356            22,
6357            0x1,
6358            1,
6359            0,
6360            gticasr::Aselcg,
6361            gticasr::Aselcg,
6362            Gticasr_SPEC,
6363            crate::common::RW,
6364        >::from_register(self, 0)
6365    }
6366
6367    #[doc = "ELC_GPTH Event Source GTCCRA Input Capture Enable"]
6368    #[inline(always)]
6369    pub fn aselch(
6370        self,
6371    ) -> crate::common::RegisterField<
6372        23,
6373        0x1,
6374        1,
6375        0,
6376        gticasr::Aselch,
6377        gticasr::Aselch,
6378        Gticasr_SPEC,
6379        crate::common::RW,
6380    > {
6381        crate::common::RegisterField::<
6382            23,
6383            0x1,
6384            1,
6385            0,
6386            gticasr::Aselch,
6387            gticasr::Aselch,
6388            Gticasr_SPEC,
6389            crate::common::RW,
6390        >::from_register(self, 0)
6391    }
6392}
6393impl ::core::default::Default for Gticasr {
6394    #[inline(always)]
6395    fn default() -> Gticasr {
6396        <crate::RegValueT<Gticasr_SPEC> as RegisterValue<_>>::new(0)
6397    }
6398}
6399pub mod gticasr {
6400
6401    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6402    pub struct Asgtrgar_SPEC;
6403    pub type Asgtrgar = crate::EnumBitfieldStruct<u8, Asgtrgar_SPEC>;
6404    impl Asgtrgar {
6405        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGA input"]
6406        pub const _0: Self = Self::new(0);
6407
6408        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGA input"]
6409        pub const _1: Self = Self::new(1);
6410    }
6411    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6412    pub struct Asgtrgaf_SPEC;
6413    pub type Asgtrgaf = crate::EnumBitfieldStruct<u8, Asgtrgaf_SPEC>;
6414    impl Asgtrgaf {
6415        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGA input"]
6416        pub const _0: Self = Self::new(0);
6417
6418        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGA input"]
6419        pub const _1: Self = Self::new(1);
6420    }
6421    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6422    pub struct Asgtrgbr_SPEC;
6423    pub type Asgtrgbr = crate::EnumBitfieldStruct<u8, Asgtrgbr_SPEC>;
6424    impl Asgtrgbr {
6425        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGB input"]
6426        pub const _0: Self = Self::new(0);
6427
6428        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGB input"]
6429        pub const _1: Self = Self::new(1);
6430    }
6431    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6432    pub struct Asgtrgbf_SPEC;
6433    pub type Asgtrgbf = crate::EnumBitfieldStruct<u8, Asgtrgbf_SPEC>;
6434    impl Asgtrgbf {
6435        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGB input"]
6436        pub const _0: Self = Self::new(0);
6437
6438        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGB input"]
6439        pub const _1: Self = Self::new(1);
6440    }
6441    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6442    pub struct Asgtrgcr_SPEC;
6443    pub type Asgtrgcr = crate::EnumBitfieldStruct<u8, Asgtrgcr_SPEC>;
6444    impl Asgtrgcr {
6445        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGC input"]
6446        pub const _0: Self = Self::new(0);
6447
6448        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGC input"]
6449        pub const _1: Self = Self::new(1);
6450    }
6451    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6452    pub struct Asgtrgcf_SPEC;
6453    pub type Asgtrgcf = crate::EnumBitfieldStruct<u8, Asgtrgcf_SPEC>;
6454    impl Asgtrgcf {
6455        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGC input"]
6456        pub const _0: Self = Self::new(0);
6457
6458        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGC input"]
6459        pub const _1: Self = Self::new(1);
6460    }
6461    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6462    pub struct Asgtrgdr_SPEC;
6463    pub type Asgtrgdr = crate::EnumBitfieldStruct<u8, Asgtrgdr_SPEC>;
6464    impl Asgtrgdr {
6465        #[doc = "GTCCRA input capture disabled on the rising edge of GTETRGD input"]
6466        pub const _0: Self = Self::new(0);
6467
6468        #[doc = "GTCCRA input capture enabled on the rising edge of GTETRGD input"]
6469        pub const _1: Self = Self::new(1);
6470    }
6471    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6472    pub struct Asgtrgdf_SPEC;
6473    pub type Asgtrgdf = crate::EnumBitfieldStruct<u8, Asgtrgdf_SPEC>;
6474    impl Asgtrgdf {
6475        #[doc = "GTCCRA input capture disabled on the falling edge of GTETRGD input"]
6476        pub const _0: Self = Self::new(0);
6477
6478        #[doc = "GTCCRA input capture enabled on the falling edge of GTETRGD input"]
6479        pub const _1: Self = Self::new(1);
6480    }
6481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6482    pub struct Ascarbl_SPEC;
6483    pub type Ascarbl = crate::EnumBitfieldStruct<u8, Ascarbl_SPEC>;
6484    impl Ascarbl {
6485        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6486        pub const _0: Self = Self::new(0);
6487
6488        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
6489        pub const _1: Self = Self::new(1);
6490    }
6491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6492    pub struct Ascarbh_SPEC;
6493    pub type Ascarbh = crate::EnumBitfieldStruct<u8, Ascarbh_SPEC>;
6494    impl Ascarbh {
6495        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6496        pub const _0: Self = Self::new(0);
6497
6498        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
6499        pub const _1: Self = Self::new(1);
6500    }
6501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6502    pub struct Ascafbl_SPEC;
6503    pub type Ascafbl = crate::EnumBitfieldStruct<u8, Ascafbl_SPEC>;
6504    impl Ascafbl {
6505        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6506        pub const _0: Self = Self::new(0);
6507
6508        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
6509        pub const _1: Self = Self::new(1);
6510    }
6511    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6512    pub struct Ascafbh_SPEC;
6513    pub type Ascafbh = crate::EnumBitfieldStruct<u8, Ascafbh_SPEC>;
6514    impl Ascafbh {
6515        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6516        pub const _0: Self = Self::new(0);
6517
6518        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
6519        pub const _1: Self = Self::new(1);
6520    }
6521    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6522    pub struct Ascbral_SPEC;
6523    pub type Ascbral = crate::EnumBitfieldStruct<u8, Ascbral_SPEC>;
6524    impl Ascbral {
6525        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6526        pub const _0: Self = Self::new(0);
6527
6528        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
6529        pub const _1: Self = Self::new(1);
6530    }
6531    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6532    pub struct Ascbrah_SPEC;
6533    pub type Ascbrah = crate::EnumBitfieldStruct<u8, Ascbrah_SPEC>;
6534    impl Ascbrah {
6535        #[doc = "GTCCRA input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6536        pub const _0: Self = Self::new(0);
6537
6538        #[doc = "GTCCRA input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
6539        pub const _1: Self = Self::new(1);
6540    }
6541    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6542    pub struct Ascbfal_SPEC;
6543    pub type Ascbfal = crate::EnumBitfieldStruct<u8, Ascbfal_SPEC>;
6544    impl Ascbfal {
6545        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6546        pub const _0: Self = Self::new(0);
6547
6548        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
6549        pub const _1: Self = Self::new(1);
6550    }
6551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6552    pub struct Ascbfah_SPEC;
6553    pub type Ascbfah = crate::EnumBitfieldStruct<u8, Ascbfah_SPEC>;
6554    impl Ascbfah {
6555        #[doc = "GTCCRA input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6556        pub const _0: Self = Self::new(0);
6557
6558        #[doc = "GTCCRA input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
6559        pub const _1: Self = Self::new(1);
6560    }
6561    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6562    pub struct Aselca_SPEC;
6563    pub type Aselca = crate::EnumBitfieldStruct<u8, Aselca_SPEC>;
6564    impl Aselca {
6565        #[doc = "GTCCRA input capture disabled at the ELC_GPTA input"]
6566        pub const _0: Self = Self::new(0);
6567
6568        #[doc = "GTCCRA input capture enabled at the ELC_GPTA input"]
6569        pub const _1: Self = Self::new(1);
6570    }
6571    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6572    pub struct Aselcb_SPEC;
6573    pub type Aselcb = crate::EnumBitfieldStruct<u8, Aselcb_SPEC>;
6574    impl Aselcb {
6575        #[doc = "GTCCRA input capture disabled at the ELC_GPTB input"]
6576        pub const _0: Self = Self::new(0);
6577
6578        #[doc = "GTCCRA input capture enabled at the ELC_GPTB input"]
6579        pub const _1: Self = Self::new(1);
6580    }
6581    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6582    pub struct Aselcc_SPEC;
6583    pub type Aselcc = crate::EnumBitfieldStruct<u8, Aselcc_SPEC>;
6584    impl Aselcc {
6585        #[doc = "GTCCRA input capture disabled at the ELC_GPTC input"]
6586        pub const _0: Self = Self::new(0);
6587
6588        #[doc = "GTCCRA input capture enabled at the ELC_GPTC input"]
6589        pub const _1: Self = Self::new(1);
6590    }
6591    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6592    pub struct Aselcd_SPEC;
6593    pub type Aselcd = crate::EnumBitfieldStruct<u8, Aselcd_SPEC>;
6594    impl Aselcd {
6595        #[doc = "GTCCRA input capture disabled at the ELC_GPTD input"]
6596        pub const _0: Self = Self::new(0);
6597
6598        #[doc = "GTCCRA input capture enabled at the ELC_GPTD input"]
6599        pub const _1: Self = Self::new(1);
6600    }
6601    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6602    pub struct Aselce_SPEC;
6603    pub type Aselce = crate::EnumBitfieldStruct<u8, Aselce_SPEC>;
6604    impl Aselce {
6605        #[doc = "GTCCRA input capture disabled at the ELC_GPTE input"]
6606        pub const _0: Self = Self::new(0);
6607
6608        #[doc = "GTCCRA input capture enabled at the ELC_GPTE input"]
6609        pub const _1: Self = Self::new(1);
6610    }
6611    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6612    pub struct Aselcf_SPEC;
6613    pub type Aselcf = crate::EnumBitfieldStruct<u8, Aselcf_SPEC>;
6614    impl Aselcf {
6615        #[doc = "GTCCRA input capture disabled at the ELC_GPTF input"]
6616        pub const _0: Self = Self::new(0);
6617
6618        #[doc = "GTCCRA input capture enabled at the ELC_GPTF input"]
6619        pub const _1: Self = Self::new(1);
6620    }
6621    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6622    pub struct Aselcg_SPEC;
6623    pub type Aselcg = crate::EnumBitfieldStruct<u8, Aselcg_SPEC>;
6624    impl Aselcg {
6625        #[doc = "GTCCRA input capture disabled at the ELC_GPTG input"]
6626        pub const _0: Self = Self::new(0);
6627
6628        #[doc = "GTCCRA input capture enabled at the ELC_GPTG input"]
6629        pub const _1: Self = Self::new(1);
6630    }
6631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6632    pub struct Aselch_SPEC;
6633    pub type Aselch = crate::EnumBitfieldStruct<u8, Aselch_SPEC>;
6634    impl Aselch {
6635        #[doc = "GTCCRA input capture disabled at the ELC_GPTH input"]
6636        pub const _0: Self = Self::new(0);
6637
6638        #[doc = "GTCCRA input capture enabled at the ELC_GPTH input"]
6639        pub const _1: Self = Self::new(1);
6640    }
6641}
6642#[doc(hidden)]
6643#[derive(Copy, Clone, Eq, PartialEq)]
6644pub struct Gticbsr_SPEC;
6645impl crate::sealed::RegSpec for Gticbsr_SPEC {
6646    type DataType = u32;
6647}
6648
6649#[doc = "General PWM Timer Input Capture Source Select Register B"]
6650pub type Gticbsr = crate::RegValueT<Gticbsr_SPEC>;
6651
6652impl Gticbsr {
6653    #[doc = "GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable"]
6654    #[inline(always)]
6655    pub fn bsgtrgar(
6656        self,
6657    ) -> crate::common::RegisterField<
6658        0,
6659        0x1,
6660        1,
6661        0,
6662        gticbsr::Bsgtrgar,
6663        gticbsr::Bsgtrgar,
6664        Gticbsr_SPEC,
6665        crate::common::RW,
6666    > {
6667        crate::common::RegisterField::<
6668            0,
6669            0x1,
6670            1,
6671            0,
6672            gticbsr::Bsgtrgar,
6673            gticbsr::Bsgtrgar,
6674            Gticbsr_SPEC,
6675            crate::common::RW,
6676        >::from_register(self, 0)
6677    }
6678
6679    #[doc = "GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable"]
6680    #[inline(always)]
6681    pub fn bsgtrgaf(
6682        self,
6683    ) -> crate::common::RegisterField<
6684        1,
6685        0x1,
6686        1,
6687        0,
6688        gticbsr::Bsgtrgaf,
6689        gticbsr::Bsgtrgaf,
6690        Gticbsr_SPEC,
6691        crate::common::RW,
6692    > {
6693        crate::common::RegisterField::<
6694            1,
6695            0x1,
6696            1,
6697            0,
6698            gticbsr::Bsgtrgaf,
6699            gticbsr::Bsgtrgaf,
6700            Gticbsr_SPEC,
6701            crate::common::RW,
6702        >::from_register(self, 0)
6703    }
6704
6705    #[doc = "GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable"]
6706    #[inline(always)]
6707    pub fn bsgtrgbr(
6708        self,
6709    ) -> crate::common::RegisterField<
6710        2,
6711        0x1,
6712        1,
6713        0,
6714        gticbsr::Bsgtrgbr,
6715        gticbsr::Bsgtrgbr,
6716        Gticbsr_SPEC,
6717        crate::common::RW,
6718    > {
6719        crate::common::RegisterField::<
6720            2,
6721            0x1,
6722            1,
6723            0,
6724            gticbsr::Bsgtrgbr,
6725            gticbsr::Bsgtrgbr,
6726            Gticbsr_SPEC,
6727            crate::common::RW,
6728        >::from_register(self, 0)
6729    }
6730
6731    #[doc = "GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable"]
6732    #[inline(always)]
6733    pub fn bsgtrgbf(
6734        self,
6735    ) -> crate::common::RegisterField<
6736        3,
6737        0x1,
6738        1,
6739        0,
6740        gticbsr::Bsgtrgbf,
6741        gticbsr::Bsgtrgbf,
6742        Gticbsr_SPEC,
6743        crate::common::RW,
6744    > {
6745        crate::common::RegisterField::<
6746            3,
6747            0x1,
6748            1,
6749            0,
6750            gticbsr::Bsgtrgbf,
6751            gticbsr::Bsgtrgbf,
6752            Gticbsr_SPEC,
6753            crate::common::RW,
6754        >::from_register(self, 0)
6755    }
6756
6757    #[doc = "GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable"]
6758    #[inline(always)]
6759    pub fn bsgtrgcr(
6760        self,
6761    ) -> crate::common::RegisterField<
6762        4,
6763        0x1,
6764        1,
6765        0,
6766        gticbsr::Bsgtrgcr,
6767        gticbsr::Bsgtrgcr,
6768        Gticbsr_SPEC,
6769        crate::common::RW,
6770    > {
6771        crate::common::RegisterField::<
6772            4,
6773            0x1,
6774            1,
6775            0,
6776            gticbsr::Bsgtrgcr,
6777            gticbsr::Bsgtrgcr,
6778            Gticbsr_SPEC,
6779            crate::common::RW,
6780        >::from_register(self, 0)
6781    }
6782
6783    #[doc = "GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable"]
6784    #[inline(always)]
6785    pub fn bsgtrgcf(
6786        self,
6787    ) -> crate::common::RegisterField<
6788        5,
6789        0x1,
6790        1,
6791        0,
6792        gticbsr::Bsgtrgcf,
6793        gticbsr::Bsgtrgcf,
6794        Gticbsr_SPEC,
6795        crate::common::RW,
6796    > {
6797        crate::common::RegisterField::<
6798            5,
6799            0x1,
6800            1,
6801            0,
6802            gticbsr::Bsgtrgcf,
6803            gticbsr::Bsgtrgcf,
6804            Gticbsr_SPEC,
6805            crate::common::RW,
6806        >::from_register(self, 0)
6807    }
6808
6809    #[doc = "GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable"]
6810    #[inline(always)]
6811    pub fn bsgtrgdr(
6812        self,
6813    ) -> crate::common::RegisterField<
6814        6,
6815        0x1,
6816        1,
6817        0,
6818        gticbsr::Bsgtrgdr,
6819        gticbsr::Bsgtrgdr,
6820        Gticbsr_SPEC,
6821        crate::common::RW,
6822    > {
6823        crate::common::RegisterField::<
6824            6,
6825            0x1,
6826            1,
6827            0,
6828            gticbsr::Bsgtrgdr,
6829            gticbsr::Bsgtrgdr,
6830            Gticbsr_SPEC,
6831            crate::common::RW,
6832        >::from_register(self, 0)
6833    }
6834
6835    #[doc = "GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable"]
6836    #[inline(always)]
6837    pub fn bsgtrgdf(
6838        self,
6839    ) -> crate::common::RegisterField<
6840        7,
6841        0x1,
6842        1,
6843        0,
6844        gticbsr::Bsgtrgdf,
6845        gticbsr::Bsgtrgdf,
6846        Gticbsr_SPEC,
6847        crate::common::RW,
6848    > {
6849        crate::common::RegisterField::<
6850            7,
6851            0x1,
6852            1,
6853            0,
6854            gticbsr::Bsgtrgdf,
6855            gticbsr::Bsgtrgdf,
6856            Gticbsr_SPEC,
6857            crate::common::RW,
6858        >::from_register(self, 0)
6859    }
6860
6861    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
6862    #[inline(always)]
6863    pub fn bscarbl(
6864        self,
6865    ) -> crate::common::RegisterField<
6866        8,
6867        0x1,
6868        1,
6869        0,
6870        gticbsr::Bscarbl,
6871        gticbsr::Bscarbl,
6872        Gticbsr_SPEC,
6873        crate::common::RW,
6874    > {
6875        crate::common::RegisterField::<
6876            8,
6877            0x1,
6878            1,
6879            0,
6880            gticbsr::Bscarbl,
6881            gticbsr::Bscarbl,
6882            Gticbsr_SPEC,
6883            crate::common::RW,
6884        >::from_register(self, 0)
6885    }
6886
6887    #[doc = "GTIOCnA Pin Rising Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
6888    #[inline(always)]
6889    pub fn bscarbh(
6890        self,
6891    ) -> crate::common::RegisterField<
6892        9,
6893        0x1,
6894        1,
6895        0,
6896        gticbsr::Bscarbh,
6897        gticbsr::Bscarbh,
6898        Gticbsr_SPEC,
6899        crate::common::RW,
6900    > {
6901        crate::common::RegisterField::<
6902            9,
6903            0x1,
6904            1,
6905            0,
6906            gticbsr::Bscarbh,
6907            gticbsr::Bscarbh,
6908            Gticbsr_SPEC,
6909            crate::common::RW,
6910        >::from_register(self, 0)
6911    }
6912
6913    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value Low Source GTCCRB Input Capture Enable"]
6914    #[inline(always)]
6915    pub fn bscafbl(
6916        self,
6917    ) -> crate::common::RegisterField<
6918        10,
6919        0x1,
6920        1,
6921        0,
6922        gticbsr::Bscafbl,
6923        gticbsr::Bscafbl,
6924        Gticbsr_SPEC,
6925        crate::common::RW,
6926    > {
6927        crate::common::RegisterField::<
6928            10,
6929            0x1,
6930            1,
6931            0,
6932            gticbsr::Bscafbl,
6933            gticbsr::Bscafbl,
6934            Gticbsr_SPEC,
6935            crate::common::RW,
6936        >::from_register(self, 0)
6937    }
6938
6939    #[doc = "GTIOCnA Pin Falling Input during GTIOCnB Value High Source GTCCRB Input Capture Enable"]
6940    #[inline(always)]
6941    pub fn bscafbh(
6942        self,
6943    ) -> crate::common::RegisterField<
6944        11,
6945        0x1,
6946        1,
6947        0,
6948        gticbsr::Bscafbh,
6949        gticbsr::Bscafbh,
6950        Gticbsr_SPEC,
6951        crate::common::RW,
6952    > {
6953        crate::common::RegisterField::<
6954            11,
6955            0x1,
6956            1,
6957            0,
6958            gticbsr::Bscafbh,
6959            gticbsr::Bscafbh,
6960            Gticbsr_SPEC,
6961            crate::common::RW,
6962        >::from_register(self, 0)
6963    }
6964
6965    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
6966    #[inline(always)]
6967    pub fn bscbral(
6968        self,
6969    ) -> crate::common::RegisterField<
6970        12,
6971        0x1,
6972        1,
6973        0,
6974        gticbsr::Bscbral,
6975        gticbsr::Bscbral,
6976        Gticbsr_SPEC,
6977        crate::common::RW,
6978    > {
6979        crate::common::RegisterField::<
6980            12,
6981            0x1,
6982            1,
6983            0,
6984            gticbsr::Bscbral,
6985            gticbsr::Bscbral,
6986            Gticbsr_SPEC,
6987            crate::common::RW,
6988        >::from_register(self, 0)
6989    }
6990
6991    #[doc = "GTIOCnB Pin Rising Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
6992    #[inline(always)]
6993    pub fn bscbrah(
6994        self,
6995    ) -> crate::common::RegisterField<
6996        13,
6997        0x1,
6998        1,
6999        0,
7000        gticbsr::Bscbrah,
7001        gticbsr::Bscbrah,
7002        Gticbsr_SPEC,
7003        crate::common::RW,
7004    > {
7005        crate::common::RegisterField::<
7006            13,
7007            0x1,
7008            1,
7009            0,
7010            gticbsr::Bscbrah,
7011            gticbsr::Bscbrah,
7012            Gticbsr_SPEC,
7013            crate::common::RW,
7014        >::from_register(self, 0)
7015    }
7016
7017    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value Low Source GTCCRB Input Capture Enable"]
7018    #[inline(always)]
7019    pub fn bscbfal(
7020        self,
7021    ) -> crate::common::RegisterField<
7022        14,
7023        0x1,
7024        1,
7025        0,
7026        gticbsr::Bscbfal,
7027        gticbsr::Bscbfal,
7028        Gticbsr_SPEC,
7029        crate::common::RW,
7030    > {
7031        crate::common::RegisterField::<
7032            14,
7033            0x1,
7034            1,
7035            0,
7036            gticbsr::Bscbfal,
7037            gticbsr::Bscbfal,
7038            Gticbsr_SPEC,
7039            crate::common::RW,
7040        >::from_register(self, 0)
7041    }
7042
7043    #[doc = "GTIOCnB Pin Falling Input during GTIOCnA Value High Source GTCCRB Input Capture Enable"]
7044    #[inline(always)]
7045    pub fn bscbfah(
7046        self,
7047    ) -> crate::common::RegisterField<
7048        15,
7049        0x1,
7050        1,
7051        0,
7052        gticbsr::Bscbfah,
7053        gticbsr::Bscbfah,
7054        Gticbsr_SPEC,
7055        crate::common::RW,
7056    > {
7057        crate::common::RegisterField::<
7058            15,
7059            0x1,
7060            1,
7061            0,
7062            gticbsr::Bscbfah,
7063            gticbsr::Bscbfah,
7064            Gticbsr_SPEC,
7065            crate::common::RW,
7066        >::from_register(self, 0)
7067    }
7068
7069    #[doc = "ELC_GPTA Event Source GTCCRB Input Capture Enable"]
7070    #[inline(always)]
7071    pub fn bselca(
7072        self,
7073    ) -> crate::common::RegisterField<
7074        16,
7075        0x1,
7076        1,
7077        0,
7078        gticbsr::Bselca,
7079        gticbsr::Bselca,
7080        Gticbsr_SPEC,
7081        crate::common::RW,
7082    > {
7083        crate::common::RegisterField::<
7084            16,
7085            0x1,
7086            1,
7087            0,
7088            gticbsr::Bselca,
7089            gticbsr::Bselca,
7090            Gticbsr_SPEC,
7091            crate::common::RW,
7092        >::from_register(self, 0)
7093    }
7094
7095    #[doc = "ELC_GPTB Event Source GTCCRB Input Capture Enable"]
7096    #[inline(always)]
7097    pub fn bselcb(
7098        self,
7099    ) -> crate::common::RegisterField<
7100        17,
7101        0x1,
7102        1,
7103        0,
7104        gticbsr::Bselcb,
7105        gticbsr::Bselcb,
7106        Gticbsr_SPEC,
7107        crate::common::RW,
7108    > {
7109        crate::common::RegisterField::<
7110            17,
7111            0x1,
7112            1,
7113            0,
7114            gticbsr::Bselcb,
7115            gticbsr::Bselcb,
7116            Gticbsr_SPEC,
7117            crate::common::RW,
7118        >::from_register(self, 0)
7119    }
7120
7121    #[doc = "ELC_GPTC Event Source GTCCRB Input Capture Enable"]
7122    #[inline(always)]
7123    pub fn bselcc(
7124        self,
7125    ) -> crate::common::RegisterField<
7126        18,
7127        0x1,
7128        1,
7129        0,
7130        gticbsr::Bselcc,
7131        gticbsr::Bselcc,
7132        Gticbsr_SPEC,
7133        crate::common::RW,
7134    > {
7135        crate::common::RegisterField::<
7136            18,
7137            0x1,
7138            1,
7139            0,
7140            gticbsr::Bselcc,
7141            gticbsr::Bselcc,
7142            Gticbsr_SPEC,
7143            crate::common::RW,
7144        >::from_register(self, 0)
7145    }
7146
7147    #[doc = "ELC_GPTD Event Source GTCCRB Input Capture Enable"]
7148    #[inline(always)]
7149    pub fn bselcd(
7150        self,
7151    ) -> crate::common::RegisterField<
7152        19,
7153        0x1,
7154        1,
7155        0,
7156        gticbsr::Bselcd,
7157        gticbsr::Bselcd,
7158        Gticbsr_SPEC,
7159        crate::common::RW,
7160    > {
7161        crate::common::RegisterField::<
7162            19,
7163            0x1,
7164            1,
7165            0,
7166            gticbsr::Bselcd,
7167            gticbsr::Bselcd,
7168            Gticbsr_SPEC,
7169            crate::common::RW,
7170        >::from_register(self, 0)
7171    }
7172
7173    #[doc = "ELC_GPTE Event Source GTCCRB Input Capture Enable"]
7174    #[inline(always)]
7175    pub fn bselce(
7176        self,
7177    ) -> crate::common::RegisterField<
7178        20,
7179        0x1,
7180        1,
7181        0,
7182        gticbsr::Bselce,
7183        gticbsr::Bselce,
7184        Gticbsr_SPEC,
7185        crate::common::RW,
7186    > {
7187        crate::common::RegisterField::<
7188            20,
7189            0x1,
7190            1,
7191            0,
7192            gticbsr::Bselce,
7193            gticbsr::Bselce,
7194            Gticbsr_SPEC,
7195            crate::common::RW,
7196        >::from_register(self, 0)
7197    }
7198
7199    #[doc = "ELC_GPTF Event Source GTCCRB Input Capture Enable"]
7200    #[inline(always)]
7201    pub fn bselcf(
7202        self,
7203    ) -> crate::common::RegisterField<
7204        21,
7205        0x1,
7206        1,
7207        0,
7208        gticbsr::Bselcf,
7209        gticbsr::Bselcf,
7210        Gticbsr_SPEC,
7211        crate::common::RW,
7212    > {
7213        crate::common::RegisterField::<
7214            21,
7215            0x1,
7216            1,
7217            0,
7218            gticbsr::Bselcf,
7219            gticbsr::Bselcf,
7220            Gticbsr_SPEC,
7221            crate::common::RW,
7222        >::from_register(self, 0)
7223    }
7224
7225    #[doc = "ELC_GPTG Event Source GTCCRB Input Capture Enable"]
7226    #[inline(always)]
7227    pub fn bselcg(
7228        self,
7229    ) -> crate::common::RegisterField<
7230        22,
7231        0x1,
7232        1,
7233        0,
7234        gticbsr::Bselcg,
7235        gticbsr::Bselcg,
7236        Gticbsr_SPEC,
7237        crate::common::RW,
7238    > {
7239        crate::common::RegisterField::<
7240            22,
7241            0x1,
7242            1,
7243            0,
7244            gticbsr::Bselcg,
7245            gticbsr::Bselcg,
7246            Gticbsr_SPEC,
7247            crate::common::RW,
7248        >::from_register(self, 0)
7249    }
7250
7251    #[doc = "ELC_GPTH Event Source GTCCRB Input Capture Enable"]
7252    #[inline(always)]
7253    pub fn bselch(
7254        self,
7255    ) -> crate::common::RegisterField<
7256        23,
7257        0x1,
7258        1,
7259        0,
7260        gticbsr::Bselch,
7261        gticbsr::Bselch,
7262        Gticbsr_SPEC,
7263        crate::common::RW,
7264    > {
7265        crate::common::RegisterField::<
7266            23,
7267            0x1,
7268            1,
7269            0,
7270            gticbsr::Bselch,
7271            gticbsr::Bselch,
7272            Gticbsr_SPEC,
7273            crate::common::RW,
7274        >::from_register(self, 0)
7275    }
7276}
7277impl ::core::default::Default for Gticbsr {
7278    #[inline(always)]
7279    fn default() -> Gticbsr {
7280        <crate::RegValueT<Gticbsr_SPEC> as RegisterValue<_>>::new(0)
7281    }
7282}
7283pub mod gticbsr {
7284
7285    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7286    pub struct Bsgtrgar_SPEC;
7287    pub type Bsgtrgar = crate::EnumBitfieldStruct<u8, Bsgtrgar_SPEC>;
7288    impl Bsgtrgar {
7289        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGA input"]
7290        pub const _0: Self = Self::new(0);
7291
7292        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGA input"]
7293        pub const _1: Self = Self::new(1);
7294    }
7295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7296    pub struct Bsgtrgaf_SPEC;
7297    pub type Bsgtrgaf = crate::EnumBitfieldStruct<u8, Bsgtrgaf_SPEC>;
7298    impl Bsgtrgaf {
7299        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGA input"]
7300        pub const _0: Self = Self::new(0);
7301
7302        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGA input"]
7303        pub const _1: Self = Self::new(1);
7304    }
7305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7306    pub struct Bsgtrgbr_SPEC;
7307    pub type Bsgtrgbr = crate::EnumBitfieldStruct<u8, Bsgtrgbr_SPEC>;
7308    impl Bsgtrgbr {
7309        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGB input"]
7310        pub const _0: Self = Self::new(0);
7311
7312        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGB input"]
7313        pub const _1: Self = Self::new(1);
7314    }
7315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7316    pub struct Bsgtrgbf_SPEC;
7317    pub type Bsgtrgbf = crate::EnumBitfieldStruct<u8, Bsgtrgbf_SPEC>;
7318    impl Bsgtrgbf {
7319        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGB input"]
7320        pub const _0: Self = Self::new(0);
7321
7322        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGB input"]
7323        pub const _1: Self = Self::new(1);
7324    }
7325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7326    pub struct Bsgtrgcr_SPEC;
7327    pub type Bsgtrgcr = crate::EnumBitfieldStruct<u8, Bsgtrgcr_SPEC>;
7328    impl Bsgtrgcr {
7329        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGC input"]
7330        pub const _0: Self = Self::new(0);
7331
7332        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGC input"]
7333        pub const _1: Self = Self::new(1);
7334    }
7335    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7336    pub struct Bsgtrgcf_SPEC;
7337    pub type Bsgtrgcf = crate::EnumBitfieldStruct<u8, Bsgtrgcf_SPEC>;
7338    impl Bsgtrgcf {
7339        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGC input"]
7340        pub const _0: Self = Self::new(0);
7341
7342        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGC input"]
7343        pub const _1: Self = Self::new(1);
7344    }
7345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7346    pub struct Bsgtrgdr_SPEC;
7347    pub type Bsgtrgdr = crate::EnumBitfieldStruct<u8, Bsgtrgdr_SPEC>;
7348    impl Bsgtrgdr {
7349        #[doc = "GTCCRB input capture disabled on the rising edge of GTETRGD input"]
7350        pub const _0: Self = Self::new(0);
7351
7352        #[doc = "GTCCRB input capture enabled on the rising edge of GTETRGD input"]
7353        pub const _1: Self = Self::new(1);
7354    }
7355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7356    pub struct Bsgtrgdf_SPEC;
7357    pub type Bsgtrgdf = crate::EnumBitfieldStruct<u8, Bsgtrgdf_SPEC>;
7358    impl Bsgtrgdf {
7359        #[doc = "GTCCRB input capture disabled on the falling edge of GTETRGD input"]
7360        pub const _0: Self = Self::new(0);
7361
7362        #[doc = "GTCCRB input capture enabled on the falling edge of GTETRGD input"]
7363        pub const _1: Self = Self::new(1);
7364    }
7365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7366    pub struct Bscarbl_SPEC;
7367    pub type Bscarbl = crate::EnumBitfieldStruct<u8, Bscarbl_SPEC>;
7368    impl Bscarbl {
7369        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7370        pub const _0: Self = Self::new(0);
7371
7372        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0"]
7373        pub const _1: Self = Self::new(1);
7374    }
7375    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7376    pub struct Bscarbh_SPEC;
7377    pub type Bscarbh = crate::EnumBitfieldStruct<u8, Bscarbh_SPEC>;
7378    impl Bscarbh {
7379        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7380        pub const _0: Self = Self::new(0);
7381
7382        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1"]
7383        pub const _1: Self = Self::new(1);
7384    }
7385    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7386    pub struct Bscafbl_SPEC;
7387    pub type Bscafbl = crate::EnumBitfieldStruct<u8, Bscafbl_SPEC>;
7388    impl Bscafbl {
7389        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7390        pub const _0: Self = Self::new(0);
7391
7392        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0"]
7393        pub const _1: Self = Self::new(1);
7394    }
7395    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7396    pub struct Bscafbh_SPEC;
7397    pub type Bscafbh = crate::EnumBitfieldStruct<u8, Bscafbh_SPEC>;
7398    impl Bscafbh {
7399        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7400        pub const _0: Self = Self::new(0);
7401
7402        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1"]
7403        pub const _1: Self = Self::new(1);
7404    }
7405    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7406    pub struct Bscbral_SPEC;
7407    pub type Bscbral = crate::EnumBitfieldStruct<u8, Bscbral_SPEC>;
7408    impl Bscbral {
7409        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7410        pub const _0: Self = Self::new(0);
7411
7412        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0"]
7413        pub const _1: Self = Self::new(1);
7414    }
7415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7416    pub struct Bscbrah_SPEC;
7417    pub type Bscbrah = crate::EnumBitfieldStruct<u8, Bscbrah_SPEC>;
7418    impl Bscbrah {
7419        #[doc = "GTCCRB input capture disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7420        pub const _0: Self = Self::new(0);
7421
7422        #[doc = "GTCCRB input capture enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1"]
7423        pub const _1: Self = Self::new(1);
7424    }
7425    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7426    pub struct Bscbfal_SPEC;
7427    pub type Bscbfal = crate::EnumBitfieldStruct<u8, Bscbfal_SPEC>;
7428    impl Bscbfal {
7429        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7430        pub const _0: Self = Self::new(0);
7431
7432        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0"]
7433        pub const _1: Self = Self::new(1);
7434    }
7435    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7436    pub struct Bscbfah_SPEC;
7437    pub type Bscbfah = crate::EnumBitfieldStruct<u8, Bscbfah_SPEC>;
7438    impl Bscbfah {
7439        #[doc = "GTCCRB input capture disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7440        pub const _0: Self = Self::new(0);
7441
7442        #[doc = "GTCCRB input capture enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1"]
7443        pub const _1: Self = Self::new(1);
7444    }
7445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7446    pub struct Bselca_SPEC;
7447    pub type Bselca = crate::EnumBitfieldStruct<u8, Bselca_SPEC>;
7448    impl Bselca {
7449        #[doc = "GTCCRB input capture disabled at the ELC_GPTA input"]
7450        pub const _0: Self = Self::new(0);
7451
7452        #[doc = "GTCCRB input capture enabled at the ELC_GPTA input"]
7453        pub const _1: Self = Self::new(1);
7454    }
7455    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7456    pub struct Bselcb_SPEC;
7457    pub type Bselcb = crate::EnumBitfieldStruct<u8, Bselcb_SPEC>;
7458    impl Bselcb {
7459        #[doc = "GTCCRB input capture disabled at the ELC_GPTB input"]
7460        pub const _0: Self = Self::new(0);
7461
7462        #[doc = "GTCCRB input capture enabled at the ELC_GPTB input"]
7463        pub const _1: Self = Self::new(1);
7464    }
7465    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7466    pub struct Bselcc_SPEC;
7467    pub type Bselcc = crate::EnumBitfieldStruct<u8, Bselcc_SPEC>;
7468    impl Bselcc {
7469        #[doc = "GTCCRB input capture disabled at the ELC_GPTC input"]
7470        pub const _0: Self = Self::new(0);
7471
7472        #[doc = "GTCCRB input capture enabled at the ELC_GPTC input"]
7473        pub const _1: Self = Self::new(1);
7474    }
7475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7476    pub struct Bselcd_SPEC;
7477    pub type Bselcd = crate::EnumBitfieldStruct<u8, Bselcd_SPEC>;
7478    impl Bselcd {
7479        #[doc = "GTCCRB input capture disabled at the ELC_GPTD input"]
7480        pub const _0: Self = Self::new(0);
7481
7482        #[doc = "GTCCRB input capture enabled at the ELC_GPTD input"]
7483        pub const _1: Self = Self::new(1);
7484    }
7485    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7486    pub struct Bselce_SPEC;
7487    pub type Bselce = crate::EnumBitfieldStruct<u8, Bselce_SPEC>;
7488    impl Bselce {
7489        #[doc = "GTCCRB input capture disabled at the ELC_GPTE input"]
7490        pub const _0: Self = Self::new(0);
7491
7492        #[doc = "GTCCRB input capture enabled at the ELC_GPTE input"]
7493        pub const _1: Self = Self::new(1);
7494    }
7495    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7496    pub struct Bselcf_SPEC;
7497    pub type Bselcf = crate::EnumBitfieldStruct<u8, Bselcf_SPEC>;
7498    impl Bselcf {
7499        #[doc = "GTCCRB input capture disabled at the ELC_GPTF input"]
7500        pub const _0: Self = Self::new(0);
7501
7502        #[doc = "GTCCRB input capture enabled at the ELC_GPTF input"]
7503        pub const _1: Self = Self::new(1);
7504    }
7505    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7506    pub struct Bselcg_SPEC;
7507    pub type Bselcg = crate::EnumBitfieldStruct<u8, Bselcg_SPEC>;
7508    impl Bselcg {
7509        #[doc = "GTCCRB input capture disabled at the ELC_GPTG input"]
7510        pub const _0: Self = Self::new(0);
7511
7512        #[doc = "GTCCRB input capture enabled at the ELC_GPTG input"]
7513        pub const _1: Self = Self::new(1);
7514    }
7515    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7516    pub struct Bselch_SPEC;
7517    pub type Bselch = crate::EnumBitfieldStruct<u8, Bselch_SPEC>;
7518    impl Bselch {
7519        #[doc = "GTCCRB input capture disabled at the ELC_GPTH input"]
7520        pub const _0: Self = Self::new(0);
7521
7522        #[doc = "GTCCRB input capture enabled at the ELC_GPTH input"]
7523        pub const _1: Self = Self::new(1);
7524    }
7525}
7526#[doc(hidden)]
7527#[derive(Copy, Clone, Eq, PartialEq)]
7528pub struct Gtcr_SPEC;
7529impl crate::sealed::RegSpec for Gtcr_SPEC {
7530    type DataType = u32;
7531}
7532
7533#[doc = "General PWM Timer Control Register"]
7534pub type Gtcr = crate::RegValueT<Gtcr_SPEC>;
7535
7536impl Gtcr {
7537    #[doc = "Count Start"]
7538    #[inline(always)]
7539    pub fn cst(
7540        self,
7541    ) -> crate::common::RegisterField<
7542        0,
7543        0x1,
7544        1,
7545        0,
7546        gtcr::Cst,
7547        gtcr::Cst,
7548        Gtcr_SPEC,
7549        crate::common::RW,
7550    > {
7551        crate::common::RegisterField::<
7552            0,
7553            0x1,
7554            1,
7555            0,
7556            gtcr::Cst,
7557            gtcr::Cst,
7558            Gtcr_SPEC,
7559            crate::common::RW,
7560        >::from_register(self, 0)
7561    }
7562
7563    #[doc = "Mode Select"]
7564    #[inline(always)]
7565    pub fn md(
7566        self,
7567    ) -> crate::common::RegisterField<16, 0x7, 1, 0, gtcr::Md, gtcr::Md, Gtcr_SPEC, crate::common::RW>
7568    {
7569        crate::common::RegisterField::<
7570            16,
7571            0x7,
7572            1,
7573            0,
7574            gtcr::Md,
7575            gtcr::Md,
7576            Gtcr_SPEC,
7577            crate::common::RW,
7578        >::from_register(self, 0)
7579    }
7580
7581    #[doc = "Timer Prescaler Select"]
7582    #[inline(always)]
7583    pub fn tpcs(
7584        self,
7585    ) -> crate::common::RegisterField<
7586        23,
7587        0xf,
7588        1,
7589        0,
7590        gtcr::Tpcs,
7591        gtcr::Tpcs,
7592        Gtcr_SPEC,
7593        crate::common::RW,
7594    > {
7595        crate::common::RegisterField::<
7596            23,
7597            0xf,
7598            1,
7599            0,
7600            gtcr::Tpcs,
7601            gtcr::Tpcs,
7602            Gtcr_SPEC,
7603            crate::common::RW,
7604        >::from_register(self, 0)
7605    }
7606}
7607impl ::core::default::Default for Gtcr {
7608    #[inline(always)]
7609    fn default() -> Gtcr {
7610        <crate::RegValueT<Gtcr_SPEC> as RegisterValue<_>>::new(0)
7611    }
7612}
7613pub mod gtcr {
7614
7615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7616    pub struct Cst_SPEC;
7617    pub type Cst = crate::EnumBitfieldStruct<u8, Cst_SPEC>;
7618    impl Cst {
7619        #[doc = "Count operation is stopped"]
7620        pub const _0: Self = Self::new(0);
7621
7622        #[doc = "Count operation is performed"]
7623        pub const _1: Self = Self::new(1);
7624    }
7625    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7626    pub struct Md_SPEC;
7627    pub type Md = crate::EnumBitfieldStruct<u8, Md_SPEC>;
7628    impl Md {
7629        #[doc = "Saw-wave PWM mode (single buffer or double buffer possible)"]
7630        pub const _000: Self = Self::new(0);
7631
7632        #[doc = "Saw-wave one-shot pulse mode (fixed buffer operation)"]
7633        pub const _001: Self = Self::new(1);
7634
7635        #[doc = "Setting prohibited"]
7636        pub const _010: Self = Self::new(2);
7637
7638        #[doc = "Setting prohibited"]
7639        pub const _011: Self = Self::new(3);
7640
7641        #[doc = "Triangle-wave PWM mode 1 (32-bit transfer at trough) (single buffer or double buffer is possible)"]
7642        pub const _100: Self = Self::new(4);
7643
7644        #[doc = "Triangle-wave PWM mode 2 (32-bit transfer at crest and trough) (single buffer or double buffer is possible)"]
7645        pub const _101: Self = Self::new(5);
7646
7647        #[doc = "Triangle-wave PWM mode 3 (64-bit transfer at trough) (fixed buffer operation)"]
7648        pub const _110: Self = Self::new(6);
7649
7650        #[doc = "Setting prohibited"]
7651        pub const _111: Self = Self::new(7);
7652    }
7653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7654    pub struct Tpcs_SPEC;
7655    pub type Tpcs = crate::EnumBitfieldStruct<u8, Tpcs_SPEC>;
7656    impl Tpcs {
7657        #[doc = "PCLKD/1"]
7658        pub const _0_X_0: Self = Self::new(0);
7659
7660        #[doc = "PCLKD/2"]
7661        pub const _0_X_1: Self = Self::new(1);
7662
7663        #[doc = "PCLKD/4"]
7664        pub const _0_X_2: Self = Self::new(2);
7665
7666        #[doc = "PCLKD/8"]
7667        pub const _0_X_3: Self = Self::new(3);
7668
7669        #[doc = "PCLKD/16"]
7670        pub const _0_X_4: Self = Self::new(4);
7671
7672        #[doc = "PCLKD/32"]
7673        pub const _0_X_5: Self = Self::new(5);
7674
7675        #[doc = "PCLKD/64"]
7676        pub const _0_X_6: Self = Self::new(6);
7677
7678        #[doc = "Setting prohibited"]
7679        pub const _0_X_7: Self = Self::new(7);
7680
7681        #[doc = "PCLKD/256"]
7682        pub const _0_X_8: Self = Self::new(8);
7683
7684        #[doc = "Setting prohibited"]
7685        pub const _0_X_9: Self = Self::new(9);
7686
7687        #[doc = "PCLKD/1024"]
7688        pub const _0_X_A: Self = Self::new(10);
7689
7690        #[doc = "Setting prohibited"]
7691        pub const _0_X_B: Self = Self::new(11);
7692
7693        #[doc = "GTETRGA (Via the POEG)"]
7694        pub const _0_X_C: Self = Self::new(12);
7695
7696        #[doc = "GTETRGB (Via the POEG)"]
7697        pub const _0_X_D: Self = Self::new(13);
7698
7699        #[doc = "GTETRGC (Via the POEG)"]
7700        pub const _0_X_E: Self = Self::new(14);
7701
7702        #[doc = "GTETRGD (Via the POEG)"]
7703        pub const _0_X_F: Self = Self::new(15);
7704    }
7705}
7706#[doc(hidden)]
7707#[derive(Copy, Clone, Eq, PartialEq)]
7708pub struct Gtuddtyc_SPEC;
7709impl crate::sealed::RegSpec for Gtuddtyc_SPEC {
7710    type DataType = u32;
7711}
7712
7713#[doc = "General PWM Timer Count Direction and Duty Setting Register"]
7714pub type Gtuddtyc = crate::RegValueT<Gtuddtyc_SPEC>;
7715
7716impl Gtuddtyc {
7717    #[doc = "Count Direction Setting"]
7718    #[inline(always)]
7719    pub fn ud(
7720        self,
7721    ) -> crate::common::RegisterField<
7722        0,
7723        0x1,
7724        1,
7725        0,
7726        gtuddtyc::Ud,
7727        gtuddtyc::Ud,
7728        Gtuddtyc_SPEC,
7729        crate::common::RW,
7730    > {
7731        crate::common::RegisterField::<
7732            0,
7733            0x1,
7734            1,
7735            0,
7736            gtuddtyc::Ud,
7737            gtuddtyc::Ud,
7738            Gtuddtyc_SPEC,
7739            crate::common::RW,
7740        >::from_register(self, 0)
7741    }
7742
7743    #[doc = "Forcible Count Direction Setting"]
7744    #[inline(always)]
7745    pub fn udf(
7746        self,
7747    ) -> crate::common::RegisterField<
7748        1,
7749        0x1,
7750        1,
7751        0,
7752        gtuddtyc::Udf,
7753        gtuddtyc::Udf,
7754        Gtuddtyc_SPEC,
7755        crate::common::RW,
7756    > {
7757        crate::common::RegisterField::<
7758            1,
7759            0x1,
7760            1,
7761            0,
7762            gtuddtyc::Udf,
7763            gtuddtyc::Udf,
7764            Gtuddtyc_SPEC,
7765            crate::common::RW,
7766        >::from_register(self, 0)
7767    }
7768
7769    #[doc = "GTIOCnA Output Duty Setting"]
7770    #[inline(always)]
7771    pub fn oadty(
7772        self,
7773    ) -> crate::common::RegisterField<
7774        16,
7775        0x3,
7776        1,
7777        0,
7778        gtuddtyc::Oadty,
7779        gtuddtyc::Oadty,
7780        Gtuddtyc_SPEC,
7781        crate::common::RW,
7782    > {
7783        crate::common::RegisterField::<
7784            16,
7785            0x3,
7786            1,
7787            0,
7788            gtuddtyc::Oadty,
7789            gtuddtyc::Oadty,
7790            Gtuddtyc_SPEC,
7791            crate::common::RW,
7792        >::from_register(self, 0)
7793    }
7794
7795    #[doc = "Forcible GTIOCnA Output Duty Setting"]
7796    #[inline(always)]
7797    pub fn oadtyf(
7798        self,
7799    ) -> crate::common::RegisterField<
7800        18,
7801        0x1,
7802        1,
7803        0,
7804        gtuddtyc::Oadtyf,
7805        gtuddtyc::Oadtyf,
7806        Gtuddtyc_SPEC,
7807        crate::common::RW,
7808    > {
7809        crate::common::RegisterField::<
7810            18,
7811            0x1,
7812            1,
7813            0,
7814            gtuddtyc::Oadtyf,
7815            gtuddtyc::Oadtyf,
7816            Gtuddtyc_SPEC,
7817            crate::common::RW,
7818        >::from_register(self, 0)
7819    }
7820
7821    #[doc = "GTIOCnA Output Value Selecting after Releasing 0%/100% Duty Setting"]
7822    #[inline(always)]
7823    pub fn oadtyr(
7824        self,
7825    ) -> crate::common::RegisterField<
7826        19,
7827        0x1,
7828        1,
7829        0,
7830        gtuddtyc::Oadtyr,
7831        gtuddtyc::Oadtyr,
7832        Gtuddtyc_SPEC,
7833        crate::common::RW,
7834    > {
7835        crate::common::RegisterField::<
7836            19,
7837            0x1,
7838            1,
7839            0,
7840            gtuddtyc::Oadtyr,
7841            gtuddtyc::Oadtyr,
7842            Gtuddtyc_SPEC,
7843            crate::common::RW,
7844        >::from_register(self, 0)
7845    }
7846
7847    #[doc = "GTIOCnB Output Duty Setting"]
7848    #[inline(always)]
7849    pub fn obdty(
7850        self,
7851    ) -> crate::common::RegisterField<
7852        24,
7853        0x3,
7854        1,
7855        0,
7856        gtuddtyc::Obdty,
7857        gtuddtyc::Obdty,
7858        Gtuddtyc_SPEC,
7859        crate::common::RW,
7860    > {
7861        crate::common::RegisterField::<
7862            24,
7863            0x3,
7864            1,
7865            0,
7866            gtuddtyc::Obdty,
7867            gtuddtyc::Obdty,
7868            Gtuddtyc_SPEC,
7869            crate::common::RW,
7870        >::from_register(self, 0)
7871    }
7872
7873    #[doc = "Forcible GTIOCnB Output Duty Setting"]
7874    #[inline(always)]
7875    pub fn obdtyf(
7876        self,
7877    ) -> crate::common::RegisterField<
7878        26,
7879        0x1,
7880        1,
7881        0,
7882        gtuddtyc::Obdtyf,
7883        gtuddtyc::Obdtyf,
7884        Gtuddtyc_SPEC,
7885        crate::common::RW,
7886    > {
7887        crate::common::RegisterField::<
7888            26,
7889            0x1,
7890            1,
7891            0,
7892            gtuddtyc::Obdtyf,
7893            gtuddtyc::Obdtyf,
7894            Gtuddtyc_SPEC,
7895            crate::common::RW,
7896        >::from_register(self, 0)
7897    }
7898
7899    #[doc = "GTIOCnB Output Value Selecting after Releasing 0%/100% Duty Setting"]
7900    #[inline(always)]
7901    pub fn obdtyr(
7902        self,
7903    ) -> crate::common::RegisterField<
7904        27,
7905        0x1,
7906        1,
7907        0,
7908        gtuddtyc::Obdtyr,
7909        gtuddtyc::Obdtyr,
7910        Gtuddtyc_SPEC,
7911        crate::common::RW,
7912    > {
7913        crate::common::RegisterField::<
7914            27,
7915            0x1,
7916            1,
7917            0,
7918            gtuddtyc::Obdtyr,
7919            gtuddtyc::Obdtyr,
7920            Gtuddtyc_SPEC,
7921            crate::common::RW,
7922        >::from_register(self, 0)
7923    }
7924}
7925impl ::core::default::Default for Gtuddtyc {
7926    #[inline(always)]
7927    fn default() -> Gtuddtyc {
7928        <crate::RegValueT<Gtuddtyc_SPEC> as RegisterValue<_>>::new(1)
7929    }
7930}
7931pub mod gtuddtyc {
7932
7933    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7934    pub struct Ud_SPEC;
7935    pub type Ud = crate::EnumBitfieldStruct<u8, Ud_SPEC>;
7936    impl Ud {
7937        #[doc = "GTCNT counts down"]
7938        pub const _0: Self = Self::new(0);
7939
7940        #[doc = "GTCNT counts up"]
7941        pub const _1: Self = Self::new(1);
7942    }
7943    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7944    pub struct Udf_SPEC;
7945    pub type Udf = crate::EnumBitfieldStruct<u8, Udf_SPEC>;
7946    impl Udf {
7947        #[doc = "Not forcibly set"]
7948        pub const _0: Self = Self::new(0);
7949
7950        #[doc = "Forcibly set"]
7951        pub const _1: Self = Self::new(1);
7952    }
7953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7954    pub struct Oadty_SPEC;
7955    pub type Oadty = crate::EnumBitfieldStruct<u8, Oadty_SPEC>;
7956    impl Oadty {
7957        #[doc = "GTIOCnA pin duty depends on the compare match"]
7958        pub const _00: Self = Self::new(0);
7959
7960        #[doc = "GTIOCnA pin duty depends on the compare match"]
7961        pub const _01: Self = Self::new(1);
7962
7963        #[doc = "GTIOCnA pin duty 0%"]
7964        pub const _10: Self = Self::new(2);
7965
7966        #[doc = "GTIOCnA pin duty 100%"]
7967        pub const _11: Self = Self::new(3);
7968    }
7969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7970    pub struct Oadtyf_SPEC;
7971    pub type Oadtyf = crate::EnumBitfieldStruct<u8, Oadtyf_SPEC>;
7972    impl Oadtyf {
7973        #[doc = "Not forcibly set"]
7974        pub const _0: Self = Self::new(0);
7975
7976        #[doc = "Forcibly set"]
7977        pub const _1: Self = Self::new(1);
7978    }
7979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7980    pub struct Oadtyr_SPEC;
7981    pub type Oadtyr = crate::EnumBitfieldStruct<u8, Oadtyr_SPEC>;
7982    impl Oadtyr {
7983        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
7984        pub const _0: Self = Self::new(0);
7985
7986        #[doc = "The function selected by the GTIOA\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
7987        pub const _1: Self = Self::new(1);
7988    }
7989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7990    pub struct Obdty_SPEC;
7991    pub type Obdty = crate::EnumBitfieldStruct<u8, Obdty_SPEC>;
7992    impl Obdty {
7993        #[doc = "GTIOCnB pin duty depends on the compare match"]
7994        pub const _00: Self = Self::new(0);
7995
7996        #[doc = "GTIOCnB pin duty depends on the compare match"]
7997        pub const _01: Self = Self::new(1);
7998
7999        #[doc = "GTIOCnB pin duty 0%"]
8000        pub const _10: Self = Self::new(2);
8001
8002        #[doc = "GTIOCnB pin duty 100%"]
8003        pub const _11: Self = Self::new(3);
8004    }
8005    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8006    pub struct Obdtyf_SPEC;
8007    pub type Obdtyf = crate::EnumBitfieldStruct<u8, Obdtyf_SPEC>;
8008    impl Obdtyf {
8009        #[doc = "Not forcibly set"]
8010        pub const _0: Self = Self::new(0);
8011
8012        #[doc = "Forcibly set"]
8013        pub const _1: Self = Self::new(1);
8014    }
8015    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8016    pub struct Obdtyr_SPEC;
8017    pub type Obdtyr = crate::EnumBitfieldStruct<u8, Obdtyr_SPEC>;
8018    impl Obdtyr {
8019        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the output value when the duty cycle is set after release from the 0 or 100% duty-cycle setting."]
8020        pub const _0: Self = Self::new(0);
8021
8022        #[doc = "The function selected by the GTIOB\\[3:2\\] bits is applied to the compare match output value which is masked after release from the 0 or 100% duty-cycle setting."]
8023        pub const _1: Self = Self::new(1);
8024    }
8025}
8026#[doc(hidden)]
8027#[derive(Copy, Clone, Eq, PartialEq)]
8028pub struct Gtior_SPEC;
8029impl crate::sealed::RegSpec for Gtior_SPEC {
8030    type DataType = u32;
8031}
8032
8033#[doc = "General PWM Timer I/O Control Register"]
8034pub type Gtior = crate::RegValueT<Gtior_SPEC>;
8035
8036impl Gtior {
8037    #[doc = "GTIOCnA Pin Function Select"]
8038    #[inline(always)]
8039    pub fn gtioa(
8040        self,
8041    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8042        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8043    }
8044
8045    #[doc = "GTIOCnA Pin Output Value Setting at the Count Stop"]
8046    #[inline(always)]
8047    pub fn oadflt(
8048        self,
8049    ) -> crate::common::RegisterField<
8050        6,
8051        0x1,
8052        1,
8053        0,
8054        gtior::Oadflt,
8055        gtior::Oadflt,
8056        Gtior_SPEC,
8057        crate::common::RW,
8058    > {
8059        crate::common::RegisterField::<
8060            6,
8061            0x1,
8062            1,
8063            0,
8064            gtior::Oadflt,
8065            gtior::Oadflt,
8066            Gtior_SPEC,
8067            crate::common::RW,
8068        >::from_register(self, 0)
8069    }
8070
8071    #[doc = "GTIOCnA Pin Output Setting at the Start/Stop Count"]
8072    #[inline(always)]
8073    pub fn oahld(
8074        self,
8075    ) -> crate::common::RegisterField<
8076        7,
8077        0x1,
8078        1,
8079        0,
8080        gtior::Oahld,
8081        gtior::Oahld,
8082        Gtior_SPEC,
8083        crate::common::RW,
8084    > {
8085        crate::common::RegisterField::<
8086            7,
8087            0x1,
8088            1,
8089            0,
8090            gtior::Oahld,
8091            gtior::Oahld,
8092            Gtior_SPEC,
8093            crate::common::RW,
8094        >::from_register(self, 0)
8095    }
8096
8097    #[doc = "GTIOCnA Pin Output Enable"]
8098    #[inline(always)]
8099    pub fn oae(
8100        self,
8101    ) -> crate::common::RegisterField<
8102        8,
8103        0x1,
8104        1,
8105        0,
8106        gtior::Oae,
8107        gtior::Oae,
8108        Gtior_SPEC,
8109        crate::common::RW,
8110    > {
8111        crate::common::RegisterField::<
8112            8,
8113            0x1,
8114            1,
8115            0,
8116            gtior::Oae,
8117            gtior::Oae,
8118            Gtior_SPEC,
8119            crate::common::RW,
8120        >::from_register(self, 0)
8121    }
8122
8123    #[doc = "GTIOCnA Pin Disable Value Setting"]
8124    #[inline(always)]
8125    pub fn oadf(
8126        self,
8127    ) -> crate::common::RegisterField<
8128        9,
8129        0x3,
8130        1,
8131        0,
8132        gtior::Oadf,
8133        gtior::Oadf,
8134        Gtior_SPEC,
8135        crate::common::RW,
8136    > {
8137        crate::common::RegisterField::<
8138            9,
8139            0x3,
8140            1,
8141            0,
8142            gtior::Oadf,
8143            gtior::Oadf,
8144            Gtior_SPEC,
8145            crate::common::RW,
8146        >::from_register(self, 0)
8147    }
8148
8149    #[doc = "Noise Filter A Enable"]
8150    #[inline(always)]
8151    pub fn nfaen(
8152        self,
8153    ) -> crate::common::RegisterField<
8154        13,
8155        0x1,
8156        1,
8157        0,
8158        gtior::Nfaen,
8159        gtior::Nfaen,
8160        Gtior_SPEC,
8161        crate::common::RW,
8162    > {
8163        crate::common::RegisterField::<
8164            13,
8165            0x1,
8166            1,
8167            0,
8168            gtior::Nfaen,
8169            gtior::Nfaen,
8170            Gtior_SPEC,
8171            crate::common::RW,
8172        >::from_register(self, 0)
8173    }
8174
8175    #[doc = "Noise Filter A Sampling Clock Select"]
8176    #[inline(always)]
8177    pub fn nfcsa(
8178        self,
8179    ) -> crate::common::RegisterField<
8180        14,
8181        0x3,
8182        1,
8183        0,
8184        gtior::Nfcsa,
8185        gtior::Nfcsa,
8186        Gtior_SPEC,
8187        crate::common::RW,
8188    > {
8189        crate::common::RegisterField::<
8190            14,
8191            0x3,
8192            1,
8193            0,
8194            gtior::Nfcsa,
8195            gtior::Nfcsa,
8196            Gtior_SPEC,
8197            crate::common::RW,
8198        >::from_register(self, 0)
8199    }
8200
8201    #[doc = "GTIOCnB Pin Function Select"]
8202    #[inline(always)]
8203    pub fn gtiob(
8204        self,
8205    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, Gtior_SPEC, crate::common::RW> {
8206        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,Gtior_SPEC,crate::common::RW>::from_register(self,0)
8207    }
8208
8209    #[doc = "GTIOCnB Pin Output Value Setting at the Count Stop"]
8210    #[inline(always)]
8211    pub fn obdflt(
8212        self,
8213    ) -> crate::common::RegisterField<
8214        22,
8215        0x1,
8216        1,
8217        0,
8218        gtior::Obdflt,
8219        gtior::Obdflt,
8220        Gtior_SPEC,
8221        crate::common::RW,
8222    > {
8223        crate::common::RegisterField::<
8224            22,
8225            0x1,
8226            1,
8227            0,
8228            gtior::Obdflt,
8229            gtior::Obdflt,
8230            Gtior_SPEC,
8231            crate::common::RW,
8232        >::from_register(self, 0)
8233    }
8234
8235    #[doc = "GTIOCnB Pin Output Setting at the Start/Stop Count"]
8236    #[inline(always)]
8237    pub fn obhld(
8238        self,
8239    ) -> crate::common::RegisterField<
8240        23,
8241        0x1,
8242        1,
8243        0,
8244        gtior::Obhld,
8245        gtior::Obhld,
8246        Gtior_SPEC,
8247        crate::common::RW,
8248    > {
8249        crate::common::RegisterField::<
8250            23,
8251            0x1,
8252            1,
8253            0,
8254            gtior::Obhld,
8255            gtior::Obhld,
8256            Gtior_SPEC,
8257            crate::common::RW,
8258        >::from_register(self, 0)
8259    }
8260
8261    #[doc = "GTIOCnB Pin Output Enable"]
8262    #[inline(always)]
8263    pub fn obe(
8264        self,
8265    ) -> crate::common::RegisterField<
8266        24,
8267        0x1,
8268        1,
8269        0,
8270        gtior::Obe,
8271        gtior::Obe,
8272        Gtior_SPEC,
8273        crate::common::RW,
8274    > {
8275        crate::common::RegisterField::<
8276            24,
8277            0x1,
8278            1,
8279            0,
8280            gtior::Obe,
8281            gtior::Obe,
8282            Gtior_SPEC,
8283            crate::common::RW,
8284        >::from_register(self, 0)
8285    }
8286
8287    #[doc = "GTIOCnB Pin Disable Value Setting"]
8288    #[inline(always)]
8289    pub fn obdf(
8290        self,
8291    ) -> crate::common::RegisterField<
8292        25,
8293        0x3,
8294        1,
8295        0,
8296        gtior::Obdf,
8297        gtior::Obdf,
8298        Gtior_SPEC,
8299        crate::common::RW,
8300    > {
8301        crate::common::RegisterField::<
8302            25,
8303            0x3,
8304            1,
8305            0,
8306            gtior::Obdf,
8307            gtior::Obdf,
8308            Gtior_SPEC,
8309            crate::common::RW,
8310        >::from_register(self, 0)
8311    }
8312
8313    #[doc = "Noise Filter B Enable"]
8314    #[inline(always)]
8315    pub fn nfben(
8316        self,
8317    ) -> crate::common::RegisterField<
8318        29,
8319        0x1,
8320        1,
8321        0,
8322        gtior::Nfben,
8323        gtior::Nfben,
8324        Gtior_SPEC,
8325        crate::common::RW,
8326    > {
8327        crate::common::RegisterField::<
8328            29,
8329            0x1,
8330            1,
8331            0,
8332            gtior::Nfben,
8333            gtior::Nfben,
8334            Gtior_SPEC,
8335            crate::common::RW,
8336        >::from_register(self, 0)
8337    }
8338
8339    #[doc = "Noise Filter B Sampling Clock Select"]
8340    #[inline(always)]
8341    pub fn nfcsb(
8342        self,
8343    ) -> crate::common::RegisterField<
8344        30,
8345        0x3,
8346        1,
8347        0,
8348        gtior::Nfcsb,
8349        gtior::Nfcsb,
8350        Gtior_SPEC,
8351        crate::common::RW,
8352    > {
8353        crate::common::RegisterField::<
8354            30,
8355            0x3,
8356            1,
8357            0,
8358            gtior::Nfcsb,
8359            gtior::Nfcsb,
8360            Gtior_SPEC,
8361            crate::common::RW,
8362        >::from_register(self, 0)
8363    }
8364}
8365impl ::core::default::Default for Gtior {
8366    #[inline(always)]
8367    fn default() -> Gtior {
8368        <crate::RegValueT<Gtior_SPEC> as RegisterValue<_>>::new(0)
8369    }
8370}
8371pub mod gtior {
8372
8373    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8374    pub struct Oadflt_SPEC;
8375    pub type Oadflt = crate::EnumBitfieldStruct<u8, Oadflt_SPEC>;
8376    impl Oadflt {
8377        #[doc = "The GTIOCnA pin outputs low when counting stops"]
8378        pub const _0: Self = Self::new(0);
8379
8380        #[doc = "The GTIOCnA pin outputs high when counting stops"]
8381        pub const _1: Self = Self::new(1);
8382    }
8383    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8384    pub struct Oahld_SPEC;
8385    pub type Oahld = crate::EnumBitfieldStruct<u8, Oahld_SPEC>;
8386    impl Oahld {
8387        #[doc = "The GTIOCnA pin output level at the start or stop of counting depends on the register setting"]
8388        pub const _0: Self = Self::new(0);
8389
8390        #[doc = "The GTIOCnA pin output level is retained at the start or stop of counting"]
8391        pub const _1: Self = Self::new(1);
8392    }
8393    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8394    pub struct Oae_SPEC;
8395    pub type Oae = crate::EnumBitfieldStruct<u8, Oae_SPEC>;
8396    impl Oae {
8397        #[doc = "Output is disabled"]
8398        pub const _0: Self = Self::new(0);
8399
8400        #[doc = "Output is enabled"]
8401        pub const _1: Self = Self::new(1);
8402    }
8403    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8404    pub struct Oadf_SPEC;
8405    pub type Oadf = crate::EnumBitfieldStruct<u8, Oadf_SPEC>;
8406    impl Oadf {
8407        #[doc = "None of the below options are specified"]
8408        pub const _00: Self = Self::new(0);
8409
8410        #[doc = "GTIOCnA pin is set to Hi-Z in response to controlling the output negation"]
8411        pub const _01: Self = Self::new(1);
8412
8413        #[doc = "GTIOCnA pin is set to 0 in response to controlling the output negation"]
8414        pub const _10: Self = Self::new(2);
8415
8416        #[doc = "GTIOCnA pin is set to 1 in response to controlling the output negation"]
8417        pub const _11: Self = Self::new(3);
8418    }
8419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8420    pub struct Nfaen_SPEC;
8421    pub type Nfaen = crate::EnumBitfieldStruct<u8, Nfaen_SPEC>;
8422    impl Nfaen {
8423        #[doc = "The noise filter for the GTIOCnA pin is disabled"]
8424        pub const _0: Self = Self::new(0);
8425
8426        #[doc = "The noise filter for the GTIOCnA pin is enabled"]
8427        pub const _1: Self = Self::new(1);
8428    }
8429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8430    pub struct Nfcsa_SPEC;
8431    pub type Nfcsa = crate::EnumBitfieldStruct<u8, Nfcsa_SPEC>;
8432    impl Nfcsa {
8433        #[doc = "PCLKD/1"]
8434        pub const _00: Self = Self::new(0);
8435
8436        #[doc = "PCLKD/4"]
8437        pub const _01: Self = Self::new(1);
8438
8439        #[doc = "PCLKD/16"]
8440        pub const _10: Self = Self::new(2);
8441
8442        #[doc = "PCLKD/64"]
8443        pub const _11: Self = Self::new(3);
8444    }
8445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8446    pub struct Obdflt_SPEC;
8447    pub type Obdflt = crate::EnumBitfieldStruct<u8, Obdflt_SPEC>;
8448    impl Obdflt {
8449        #[doc = "The GTIOCnB pin outputs low when counting stops"]
8450        pub const _0: Self = Self::new(0);
8451
8452        #[doc = "The GTIOCnB pin outputs high when counting stops"]
8453        pub const _1: Self = Self::new(1);
8454    }
8455    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8456    pub struct Obhld_SPEC;
8457    pub type Obhld = crate::EnumBitfieldStruct<u8, Obhld_SPEC>;
8458    impl Obhld {
8459        #[doc = "The GTIOCnB pin output level at the start/stop of counting depends on the register setting"]
8460        pub const _0: Self = Self::new(0);
8461
8462        #[doc = "The GTIOCnB pin output level is retained at the start/stop of counting"]
8463        pub const _1: Self = Self::new(1);
8464    }
8465    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8466    pub struct Obe_SPEC;
8467    pub type Obe = crate::EnumBitfieldStruct<u8, Obe_SPEC>;
8468    impl Obe {
8469        #[doc = "Output is disabled"]
8470        pub const _0: Self = Self::new(0);
8471
8472        #[doc = "Output is enabled"]
8473        pub const _1: Self = Self::new(1);
8474    }
8475    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8476    pub struct Obdf_SPEC;
8477    pub type Obdf = crate::EnumBitfieldStruct<u8, Obdf_SPEC>;
8478    impl Obdf {
8479        #[doc = "None of the below options are specified"]
8480        pub const _00: Self = Self::new(0);
8481
8482        #[doc = "GTIOCnB pin is set to Hi-Z in response to controlling the output negation"]
8483        pub const _01: Self = Self::new(1);
8484
8485        #[doc = "GTIOCnB pin is set to 0 in response to controlling the output negation"]
8486        pub const _10: Self = Self::new(2);
8487
8488        #[doc = "GTIOCnB pin is set to 1 in response to controlling the output negation"]
8489        pub const _11: Self = Self::new(3);
8490    }
8491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8492    pub struct Nfben_SPEC;
8493    pub type Nfben = crate::EnumBitfieldStruct<u8, Nfben_SPEC>;
8494    impl Nfben {
8495        #[doc = "The noise filter for the GTIOCnB pin is disabled"]
8496        pub const _0: Self = Self::new(0);
8497
8498        #[doc = "The noise filter for the GTIOCnB pin is enabled"]
8499        pub const _1: Self = Self::new(1);
8500    }
8501    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8502    pub struct Nfcsb_SPEC;
8503    pub type Nfcsb = crate::EnumBitfieldStruct<u8, Nfcsb_SPEC>;
8504    impl Nfcsb {
8505        #[doc = "PCLKD/1"]
8506        pub const _00: Self = Self::new(0);
8507
8508        #[doc = "PCLKD/4"]
8509        pub const _01: Self = Self::new(1);
8510
8511        #[doc = "PCLKD/16"]
8512        pub const _10: Self = Self::new(2);
8513
8514        #[doc = "PCLKD/64"]
8515        pub const _11: Self = Self::new(3);
8516    }
8517}
8518#[doc(hidden)]
8519#[derive(Copy, Clone, Eq, PartialEq)]
8520pub struct Gtintad_SPEC;
8521impl crate::sealed::RegSpec for Gtintad_SPEC {
8522    type DataType = u32;
8523}
8524
8525#[doc = "General PWM Timer Interrupt Output Setting Register"]
8526pub type Gtintad = crate::RegValueT<Gtintad_SPEC>;
8527
8528impl Gtintad {
8529    #[doc = "Output Disable Source Select"]
8530    #[inline(always)]
8531    pub fn grp(
8532        self,
8533    ) -> crate::common::RegisterField<
8534        24,
8535        0x3,
8536        1,
8537        0,
8538        gtintad::Grp,
8539        gtintad::Grp,
8540        Gtintad_SPEC,
8541        crate::common::RW,
8542    > {
8543        crate::common::RegisterField::<
8544            24,
8545            0x3,
8546            1,
8547            0,
8548            gtintad::Grp,
8549            gtintad::Grp,
8550            Gtintad_SPEC,
8551            crate::common::RW,
8552        >::from_register(self, 0)
8553    }
8554
8555    #[doc = "Same Time Output Level High Disable Request Enable"]
8556    #[inline(always)]
8557    pub fn grpabh(
8558        self,
8559    ) -> crate::common::RegisterField<
8560        29,
8561        0x1,
8562        1,
8563        0,
8564        gtintad::Grpabh,
8565        gtintad::Grpabh,
8566        Gtintad_SPEC,
8567        crate::common::RW,
8568    > {
8569        crate::common::RegisterField::<
8570            29,
8571            0x1,
8572            1,
8573            0,
8574            gtintad::Grpabh,
8575            gtintad::Grpabh,
8576            Gtintad_SPEC,
8577            crate::common::RW,
8578        >::from_register(self, 0)
8579    }
8580
8581    #[doc = "Same Time Output Level Low Disable Request Enable"]
8582    #[inline(always)]
8583    pub fn grpabl(
8584        self,
8585    ) -> crate::common::RegisterField<
8586        30,
8587        0x1,
8588        1,
8589        0,
8590        gtintad::Grpabl,
8591        gtintad::Grpabl,
8592        Gtintad_SPEC,
8593        crate::common::RW,
8594    > {
8595        crate::common::RegisterField::<
8596            30,
8597            0x1,
8598            1,
8599            0,
8600            gtintad::Grpabl,
8601            gtintad::Grpabl,
8602            Gtintad_SPEC,
8603            crate::common::RW,
8604        >::from_register(self, 0)
8605    }
8606}
8607impl ::core::default::Default for Gtintad {
8608    #[inline(always)]
8609    fn default() -> Gtintad {
8610        <crate::RegValueT<Gtintad_SPEC> as RegisterValue<_>>::new(0)
8611    }
8612}
8613pub mod gtintad {
8614
8615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8616    pub struct Grp_SPEC;
8617    pub type Grp = crate::EnumBitfieldStruct<u8, Grp_SPEC>;
8618    impl Grp {
8619        #[doc = "Group A output disable request is selected"]
8620        pub const _00: Self = Self::new(0);
8621
8622        #[doc = "Group B output disable request is selected"]
8623        pub const _01: Self = Self::new(1);
8624
8625        #[doc = "Group C output disable request is selected"]
8626        pub const _10: Self = Self::new(2);
8627
8628        #[doc = "Group D output disable request is selected"]
8629        pub const _11: Self = Self::new(3);
8630    }
8631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8632    pub struct Grpabh_SPEC;
8633    pub type Grpabh = crate::EnumBitfieldStruct<u8, Grpabh_SPEC>;
8634    impl Grpabh {
8635        #[doc = "Same time output level high disable request disabled"]
8636        pub const _0: Self = Self::new(0);
8637
8638        #[doc = "Same time output level high disable request enabled"]
8639        pub const _1: Self = Self::new(1);
8640    }
8641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8642    pub struct Grpabl_SPEC;
8643    pub type Grpabl = crate::EnumBitfieldStruct<u8, Grpabl_SPEC>;
8644    impl Grpabl {
8645        #[doc = "Same time output level low disable request disabled"]
8646        pub const _0: Self = Self::new(0);
8647
8648        #[doc = "Same time output level low disable request enabled"]
8649        pub const _1: Self = Self::new(1);
8650    }
8651}
8652#[doc(hidden)]
8653#[derive(Copy, Clone, Eq, PartialEq)]
8654pub struct Gtst_SPEC;
8655impl crate::sealed::RegSpec for Gtst_SPEC {
8656    type DataType = u32;
8657}
8658
8659#[doc = "General PWM Timer Status Register"]
8660pub type Gtst = crate::RegValueT<Gtst_SPEC>;
8661
8662impl Gtst {
8663    #[doc = "Input Capture/Compare Match Flag A"]
8664    #[inline(always)]
8665    pub fn tcfa(
8666        self,
8667    ) -> crate::common::RegisterField<
8668        0,
8669        0x1,
8670        1,
8671        0,
8672        gtst::Tcfa,
8673        gtst::Tcfa,
8674        Gtst_SPEC,
8675        crate::common::RW,
8676    > {
8677        crate::common::RegisterField::<
8678            0,
8679            0x1,
8680            1,
8681            0,
8682            gtst::Tcfa,
8683            gtst::Tcfa,
8684            Gtst_SPEC,
8685            crate::common::RW,
8686        >::from_register(self, 0)
8687    }
8688
8689    #[doc = "Input Capture/Compare Match Flag B"]
8690    #[inline(always)]
8691    pub fn tcfb(
8692        self,
8693    ) -> crate::common::RegisterField<
8694        1,
8695        0x1,
8696        1,
8697        0,
8698        gtst::Tcfb,
8699        gtst::Tcfb,
8700        Gtst_SPEC,
8701        crate::common::RW,
8702    > {
8703        crate::common::RegisterField::<
8704            1,
8705            0x1,
8706            1,
8707            0,
8708            gtst::Tcfb,
8709            gtst::Tcfb,
8710            Gtst_SPEC,
8711            crate::common::RW,
8712        >::from_register(self, 0)
8713    }
8714
8715    #[doc = "Input Compare Match Flag C"]
8716    #[inline(always)]
8717    pub fn tcfc(
8718        self,
8719    ) -> crate::common::RegisterField<
8720        2,
8721        0x1,
8722        1,
8723        0,
8724        gtst::Tcfc,
8725        gtst::Tcfc,
8726        Gtst_SPEC,
8727        crate::common::RW,
8728    > {
8729        crate::common::RegisterField::<
8730            2,
8731            0x1,
8732            1,
8733            0,
8734            gtst::Tcfc,
8735            gtst::Tcfc,
8736            Gtst_SPEC,
8737            crate::common::RW,
8738        >::from_register(self, 0)
8739    }
8740
8741    #[doc = "Input Compare Match Flag D"]
8742    #[inline(always)]
8743    pub fn tcfd(
8744        self,
8745    ) -> crate::common::RegisterField<
8746        3,
8747        0x1,
8748        1,
8749        0,
8750        gtst::Tcfd,
8751        gtst::Tcfd,
8752        Gtst_SPEC,
8753        crate::common::RW,
8754    > {
8755        crate::common::RegisterField::<
8756            3,
8757            0x1,
8758            1,
8759            0,
8760            gtst::Tcfd,
8761            gtst::Tcfd,
8762            Gtst_SPEC,
8763            crate::common::RW,
8764        >::from_register(self, 0)
8765    }
8766
8767    #[doc = "Input Compare Match Flag E"]
8768    #[inline(always)]
8769    pub fn tcfe(
8770        self,
8771    ) -> crate::common::RegisterField<
8772        4,
8773        0x1,
8774        1,
8775        0,
8776        gtst::Tcfe,
8777        gtst::Tcfe,
8778        Gtst_SPEC,
8779        crate::common::RW,
8780    > {
8781        crate::common::RegisterField::<
8782            4,
8783            0x1,
8784            1,
8785            0,
8786            gtst::Tcfe,
8787            gtst::Tcfe,
8788            Gtst_SPEC,
8789            crate::common::RW,
8790        >::from_register(self, 0)
8791    }
8792
8793    #[doc = "Input Compare Match Flag F"]
8794    #[inline(always)]
8795    pub fn tcff(
8796        self,
8797    ) -> crate::common::RegisterField<
8798        5,
8799        0x1,
8800        1,
8801        0,
8802        gtst::Tcff,
8803        gtst::Tcff,
8804        Gtst_SPEC,
8805        crate::common::RW,
8806    > {
8807        crate::common::RegisterField::<
8808            5,
8809            0x1,
8810            1,
8811            0,
8812            gtst::Tcff,
8813            gtst::Tcff,
8814            Gtst_SPEC,
8815            crate::common::RW,
8816        >::from_register(self, 0)
8817    }
8818
8819    #[doc = "Overflow Flag"]
8820    #[inline(always)]
8821    pub fn tcfpo(
8822        self,
8823    ) -> crate::common::RegisterField<
8824        6,
8825        0x1,
8826        1,
8827        0,
8828        gtst::Tcfpo,
8829        gtst::Tcfpo,
8830        Gtst_SPEC,
8831        crate::common::RW,
8832    > {
8833        crate::common::RegisterField::<
8834            6,
8835            0x1,
8836            1,
8837            0,
8838            gtst::Tcfpo,
8839            gtst::Tcfpo,
8840            Gtst_SPEC,
8841            crate::common::RW,
8842        >::from_register(self, 0)
8843    }
8844
8845    #[doc = "Underflow Flag"]
8846    #[inline(always)]
8847    pub fn tcfpu(
8848        self,
8849    ) -> crate::common::RegisterField<
8850        7,
8851        0x1,
8852        1,
8853        0,
8854        gtst::Tcfpu,
8855        gtst::Tcfpu,
8856        Gtst_SPEC,
8857        crate::common::RW,
8858    > {
8859        crate::common::RegisterField::<
8860            7,
8861            0x1,
8862            1,
8863            0,
8864            gtst::Tcfpu,
8865            gtst::Tcfpu,
8866            Gtst_SPEC,
8867            crate::common::RW,
8868        >::from_register(self, 0)
8869    }
8870
8871    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Count Counter"]
8872    #[inline(always)]
8873    pub fn itcnt(
8874        self,
8875    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Gtst_SPEC, crate::common::R> {
8876        crate::common::RegisterField::<8,0x7,1,0,u8,u8,Gtst_SPEC,crate::common::R>::from_register(self,0)
8877    }
8878
8879    #[doc = "Count Direction Flag"]
8880    #[inline(always)]
8881    pub fn tucf(
8882        self,
8883    ) -> crate::common::RegisterField<
8884        15,
8885        0x1,
8886        1,
8887        0,
8888        gtst::Tucf,
8889        gtst::Tucf,
8890        Gtst_SPEC,
8891        crate::common::R,
8892    > {
8893        crate::common::RegisterField::<
8894            15,
8895            0x1,
8896            1,
8897            0,
8898            gtst::Tucf,
8899            gtst::Tucf,
8900            Gtst_SPEC,
8901            crate::common::R,
8902        >::from_register(self, 0)
8903    }
8904
8905    #[doc = "GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Flag"]
8906    #[inline(always)]
8907    pub fn adtrauf(
8908        self,
8909    ) -> crate::common::RegisterField<
8910        16,
8911        0x1,
8912        1,
8913        0,
8914        gtst::Adtrauf,
8915        gtst::Adtrauf,
8916        Gtst_SPEC,
8917        crate::common::RW,
8918    > {
8919        crate::common::RegisterField::<
8920            16,
8921            0x1,
8922            1,
8923            0,
8924            gtst::Adtrauf,
8925            gtst::Adtrauf,
8926            Gtst_SPEC,
8927            crate::common::RW,
8928        >::from_register(self, 0)
8929    }
8930
8931    #[doc = "GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Flag"]
8932    #[inline(always)]
8933    pub fn adtradf(
8934        self,
8935    ) -> crate::common::RegisterField<
8936        17,
8937        0x1,
8938        1,
8939        0,
8940        gtst::Adtradf,
8941        gtst::Adtradf,
8942        Gtst_SPEC,
8943        crate::common::RW,
8944    > {
8945        crate::common::RegisterField::<
8946            17,
8947            0x1,
8948            1,
8949            0,
8950            gtst::Adtradf,
8951            gtst::Adtradf,
8952            Gtst_SPEC,
8953            crate::common::RW,
8954        >::from_register(self, 0)
8955    }
8956
8957    #[doc = "GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Flag"]
8958    #[inline(always)]
8959    pub fn adtrbuf(
8960        self,
8961    ) -> crate::common::RegisterField<
8962        18,
8963        0x1,
8964        1,
8965        0,
8966        gtst::Adtrbuf,
8967        gtst::Adtrbuf,
8968        Gtst_SPEC,
8969        crate::common::RW,
8970    > {
8971        crate::common::RegisterField::<
8972            18,
8973            0x1,
8974            1,
8975            0,
8976            gtst::Adtrbuf,
8977            gtst::Adtrbuf,
8978            Gtst_SPEC,
8979            crate::common::RW,
8980        >::from_register(self, 0)
8981    }
8982
8983    #[doc = "GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Flag"]
8984    #[inline(always)]
8985    pub fn adtrbdf(
8986        self,
8987    ) -> crate::common::RegisterField<
8988        19,
8989        0x1,
8990        1,
8991        0,
8992        gtst::Adtrbdf,
8993        gtst::Adtrbdf,
8994        Gtst_SPEC,
8995        crate::common::RW,
8996    > {
8997        crate::common::RegisterField::<
8998            19,
8999            0x1,
9000            1,
9001            0,
9002            gtst::Adtrbdf,
9003            gtst::Adtrbdf,
9004            Gtst_SPEC,
9005            crate::common::RW,
9006        >::from_register(self, 0)
9007    }
9008
9009    #[doc = "Output Disable Flag"]
9010    #[inline(always)]
9011    pub fn odf(
9012        self,
9013    ) -> crate::common::RegisterField<
9014        24,
9015        0x1,
9016        1,
9017        0,
9018        gtst::Odf,
9019        gtst::Odf,
9020        Gtst_SPEC,
9021        crate::common::R,
9022    > {
9023        crate::common::RegisterField::<
9024            24,
9025            0x1,
9026            1,
9027            0,
9028            gtst::Odf,
9029            gtst::Odf,
9030            Gtst_SPEC,
9031            crate::common::R,
9032        >::from_register(self, 0)
9033    }
9034
9035    #[doc = "Dead Time Error Flag"]
9036    #[inline(always)]
9037    pub fn dtef(
9038        self,
9039    ) -> crate::common::RegisterField<
9040        28,
9041        0x1,
9042        1,
9043        0,
9044        gtst::Dtef,
9045        gtst::Dtef,
9046        Gtst_SPEC,
9047        crate::common::R,
9048    > {
9049        crate::common::RegisterField::<
9050            28,
9051            0x1,
9052            1,
9053            0,
9054            gtst::Dtef,
9055            gtst::Dtef,
9056            Gtst_SPEC,
9057            crate::common::R,
9058        >::from_register(self, 0)
9059    }
9060
9061    #[doc = "Same Time Output Level High Flag"]
9062    #[inline(always)]
9063    pub fn oabhf(
9064        self,
9065    ) -> crate::common::RegisterField<
9066        29,
9067        0x1,
9068        1,
9069        0,
9070        gtst::Oabhf,
9071        gtst::Oabhf,
9072        Gtst_SPEC,
9073        crate::common::R,
9074    > {
9075        crate::common::RegisterField::<
9076            29,
9077            0x1,
9078            1,
9079            0,
9080            gtst::Oabhf,
9081            gtst::Oabhf,
9082            Gtst_SPEC,
9083            crate::common::R,
9084        >::from_register(self, 0)
9085    }
9086
9087    #[doc = "Same Time Output Level Low Flag"]
9088    #[inline(always)]
9089    pub fn oablf(
9090        self,
9091    ) -> crate::common::RegisterField<
9092        30,
9093        0x1,
9094        1,
9095        0,
9096        gtst::Oablf,
9097        gtst::Oablf,
9098        Gtst_SPEC,
9099        crate::common::R,
9100    > {
9101        crate::common::RegisterField::<
9102            30,
9103            0x1,
9104            1,
9105            0,
9106            gtst::Oablf,
9107            gtst::Oablf,
9108            Gtst_SPEC,
9109            crate::common::R,
9110        >::from_register(self, 0)
9111    }
9112
9113    #[doc = "Period Count Function Finish Flag"]
9114    #[inline(always)]
9115    pub fn pcf(
9116        self,
9117    ) -> crate::common::RegisterField<
9118        31,
9119        0x1,
9120        1,
9121        0,
9122        gtst::Pcf,
9123        gtst::Pcf,
9124        Gtst_SPEC,
9125        crate::common::RW,
9126    > {
9127        crate::common::RegisterField::<
9128            31,
9129            0x1,
9130            1,
9131            0,
9132            gtst::Pcf,
9133            gtst::Pcf,
9134            Gtst_SPEC,
9135            crate::common::RW,
9136        >::from_register(self, 0)
9137    }
9138}
9139impl ::core::default::Default for Gtst {
9140    #[inline(always)]
9141    fn default() -> Gtst {
9142        <crate::RegValueT<Gtst_SPEC> as RegisterValue<_>>::new(32768)
9143    }
9144}
9145pub mod gtst {
9146
9147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9148    pub struct Tcfa_SPEC;
9149    pub type Tcfa = crate::EnumBitfieldStruct<u8, Tcfa_SPEC>;
9150    impl Tcfa {
9151        #[doc = "No input capture/compare match of GTCCRA is generated"]
9152        pub const _0: Self = Self::new(0);
9153
9154        #[doc = "An input capture/compare match of GTCCRA is generated"]
9155        pub const _1: Self = Self::new(1);
9156    }
9157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9158    pub struct Tcfb_SPEC;
9159    pub type Tcfb = crate::EnumBitfieldStruct<u8, Tcfb_SPEC>;
9160    impl Tcfb {
9161        #[doc = "No input capture/compare match of GTCCRB is generated"]
9162        pub const _0: Self = Self::new(0);
9163
9164        #[doc = "An input capture/compare match of GTCCRB is generated"]
9165        pub const _1: Self = Self::new(1);
9166    }
9167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9168    pub struct Tcfc_SPEC;
9169    pub type Tcfc = crate::EnumBitfieldStruct<u8, Tcfc_SPEC>;
9170    impl Tcfc {
9171        #[doc = "No compare match of GTCCRC is generated"]
9172        pub const _0: Self = Self::new(0);
9173
9174        #[doc = "A compare match of GTCCRC is generated"]
9175        pub const _1: Self = Self::new(1);
9176    }
9177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9178    pub struct Tcfd_SPEC;
9179    pub type Tcfd = crate::EnumBitfieldStruct<u8, Tcfd_SPEC>;
9180    impl Tcfd {
9181        #[doc = "No compare match of GTCCRD is generated"]
9182        pub const _0: Self = Self::new(0);
9183
9184        #[doc = "A compare match of GTCCRD is generated"]
9185        pub const _1: Self = Self::new(1);
9186    }
9187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9188    pub struct Tcfe_SPEC;
9189    pub type Tcfe = crate::EnumBitfieldStruct<u8, Tcfe_SPEC>;
9190    impl Tcfe {
9191        #[doc = "No compare match of GTCCRE is generated"]
9192        pub const _0: Self = Self::new(0);
9193
9194        #[doc = "A compare match of GTCCRE is generated"]
9195        pub const _1: Self = Self::new(1);
9196    }
9197    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9198    pub struct Tcff_SPEC;
9199    pub type Tcff = crate::EnumBitfieldStruct<u8, Tcff_SPEC>;
9200    impl Tcff {
9201        #[doc = "No compare match of GTCCRF is generated"]
9202        pub const _0: Self = Self::new(0);
9203
9204        #[doc = "A compare match of GTCCRF is generated"]
9205        pub const _1: Self = Self::new(1);
9206    }
9207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9208    pub struct Tcfpo_SPEC;
9209    pub type Tcfpo = crate::EnumBitfieldStruct<u8, Tcfpo_SPEC>;
9210    impl Tcfpo {
9211        #[doc = "No overflow (crest) occurred"]
9212        pub const _0: Self = Self::new(0);
9213
9214        #[doc = "An overflow (crest) occurred"]
9215        pub const _1: Self = Self::new(1);
9216    }
9217    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9218    pub struct Tcfpu_SPEC;
9219    pub type Tcfpu = crate::EnumBitfieldStruct<u8, Tcfpu_SPEC>;
9220    impl Tcfpu {
9221        #[doc = "No underflow (trough) occurred"]
9222        pub const _0: Self = Self::new(0);
9223
9224        #[doc = "An underflow (trough) occurred"]
9225        pub const _1: Self = Self::new(1);
9226    }
9227    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9228    pub struct Tucf_SPEC;
9229    pub type Tucf = crate::EnumBitfieldStruct<u8, Tucf_SPEC>;
9230    impl Tucf {
9231        #[doc = "GTCNT counter counts downward"]
9232        pub const _0: Self = Self::new(0);
9233
9234        #[doc = "GTCNT counter counts upward"]
9235        pub const _1: Self = Self::new(1);
9236    }
9237    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9238    pub struct Adtrauf_SPEC;
9239    pub type Adtrauf = crate::EnumBitfieldStruct<u8, Adtrauf_SPEC>;
9240    impl Adtrauf {
9241        #[doc = "No GTADTRA register compare match has occurred in up-counting"]
9242        pub const _0: Self = Self::new(0);
9243
9244        #[doc = "A GTADTRA register compare match has occurred in up-counting"]
9245        pub const _1: Self = Self::new(1);
9246    }
9247    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9248    pub struct Adtradf_SPEC;
9249    pub type Adtradf = crate::EnumBitfieldStruct<u8, Adtradf_SPEC>;
9250    impl Adtradf {
9251        #[doc = "No GTADTRA register compare match has occurred in down-counting"]
9252        pub const _0: Self = Self::new(0);
9253
9254        #[doc = "A GTADTRA register compare match has occurred in down-counting"]
9255        pub const _1: Self = Self::new(1);
9256    }
9257    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9258    pub struct Adtrbuf_SPEC;
9259    pub type Adtrbuf = crate::EnumBitfieldStruct<u8, Adtrbuf_SPEC>;
9260    impl Adtrbuf {
9261        #[doc = "No GTADTRB register compare match has occurred in up-counting"]
9262        pub const _0: Self = Self::new(0);
9263
9264        #[doc = "A GTADTRB register compare match has occurred in up-counting"]
9265        pub const _1: Self = Self::new(1);
9266    }
9267    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9268    pub struct Adtrbdf_SPEC;
9269    pub type Adtrbdf = crate::EnumBitfieldStruct<u8, Adtrbdf_SPEC>;
9270    impl Adtrbdf {
9271        #[doc = "No GTADTRB register compare match has occurred in down-counting"]
9272        pub const _0: Self = Self::new(0);
9273
9274        #[doc = "A GTADTRB register compare match has occurred in down-counting"]
9275        pub const _1: Self = Self::new(1);
9276    }
9277    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9278    pub struct Odf_SPEC;
9279    pub type Odf = crate::EnumBitfieldStruct<u8, Odf_SPEC>;
9280    impl Odf {
9281        #[doc = "No output disable request is generated"]
9282        pub const _0: Self = Self::new(0);
9283
9284        #[doc = "An output disable request is generated"]
9285        pub const _1: Self = Self::new(1);
9286    }
9287    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9288    pub struct Dtef_SPEC;
9289    pub type Dtef = crate::EnumBitfieldStruct<u8, Dtef_SPEC>;
9290    impl Dtef {
9291        #[doc = "No dead time error has occurred"]
9292        pub const _0: Self = Self::new(0);
9293
9294        #[doc = "A dead time error has occurred"]
9295        pub const _1: Self = Self::new(1);
9296    }
9297    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9298    pub struct Oabhf_SPEC;
9299    pub type Oabhf = crate::EnumBitfieldStruct<u8, Oabhf_SPEC>;
9300    impl Oabhf {
9301        #[doc = "No simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred"]
9302        pub const _0: Self = Self::new(0);
9303
9304        #[doc = "A simultaneous generation of 1 both for the GTIOCA and GTIOCB pins has occurred"]
9305        pub const _1: Self = Self::new(1);
9306    }
9307    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9308    pub struct Oablf_SPEC;
9309    pub type Oablf = crate::EnumBitfieldStruct<u8, Oablf_SPEC>;
9310    impl Oablf {
9311        #[doc = "No simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred"]
9312        pub const _0: Self = Self::new(0);
9313
9314        #[doc = "A simultaneous generation of 0 both for the GTIOCA and GTIOCB pins has occurred"]
9315        pub const _1: Self = Self::new(1);
9316    }
9317    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9318    pub struct Pcf_SPEC;
9319    pub type Pcf = crate::EnumBitfieldStruct<u8, Pcf_SPEC>;
9320    impl Pcf {
9321        #[doc = "No period count function finish has occurred"]
9322        pub const _0: Self = Self::new(0);
9323
9324        #[doc = "A period count function finish has occurred"]
9325        pub const _1: Self = Self::new(1);
9326    }
9327}
9328#[doc(hidden)]
9329#[derive(Copy, Clone, Eq, PartialEq)]
9330pub struct Gtber_SPEC;
9331impl crate::sealed::RegSpec for Gtber_SPEC {
9332    type DataType = u32;
9333}
9334
9335#[doc = "General PWM Timer Buffer Enable Register"]
9336pub type Gtber = crate::RegValueT<Gtber_SPEC>;
9337
9338impl Gtber {
9339    #[doc = "GTCCR Buffer Operation Disable"]
9340    #[inline(always)]
9341    pub fn bd0(
9342        self,
9343    ) -> crate::common::RegisterField<
9344        0,
9345        0x1,
9346        1,
9347        0,
9348        gtber::Bd0,
9349        gtber::Bd0,
9350        Gtber_SPEC,
9351        crate::common::RW,
9352    > {
9353        crate::common::RegisterField::<
9354            0,
9355            0x1,
9356            1,
9357            0,
9358            gtber::Bd0,
9359            gtber::Bd0,
9360            Gtber_SPEC,
9361            crate::common::RW,
9362        >::from_register(self, 0)
9363    }
9364
9365    #[doc = "GTPR Buffer Operation Disable"]
9366    #[inline(always)]
9367    pub fn bd1(
9368        self,
9369    ) -> crate::common::RegisterField<
9370        1,
9371        0x1,
9372        1,
9373        0,
9374        gtber::Bd1,
9375        gtber::Bd1,
9376        Gtber_SPEC,
9377        crate::common::RW,
9378    > {
9379        crate::common::RegisterField::<
9380            1,
9381            0x1,
9382            1,
9383            0,
9384            gtber::Bd1,
9385            gtber::Bd1,
9386            Gtber_SPEC,
9387            crate::common::RW,
9388        >::from_register(self, 0)
9389    }
9390
9391    #[doc = "GTADTRA/GTADTRB Registers Buffer Operation Disable"]
9392    #[inline(always)]
9393    pub fn bd2(
9394        self,
9395    ) -> crate::common::RegisterField<
9396        2,
9397        0x1,
9398        1,
9399        0,
9400        gtber::Bd2,
9401        gtber::Bd2,
9402        Gtber_SPEC,
9403        crate::common::RW,
9404    > {
9405        crate::common::RegisterField::<
9406            2,
9407            0x1,
9408            1,
9409            0,
9410            gtber::Bd2,
9411            gtber::Bd2,
9412            Gtber_SPEC,
9413            crate::common::RW,
9414        >::from_register(self, 0)
9415    }
9416
9417    #[doc = "GTDVU/GTDVD Registers Buffer Operation Disable"]
9418    #[inline(always)]
9419    pub fn bd3(
9420        self,
9421    ) -> crate::common::RegisterField<
9422        3,
9423        0x1,
9424        1,
9425        0,
9426        gtber::Bd3,
9427        gtber::Bd3,
9428        Gtber_SPEC,
9429        crate::common::RW,
9430    > {
9431        crate::common::RegisterField::<
9432            3,
9433            0x1,
9434            1,
9435            0,
9436            gtber::Bd3,
9437            gtber::Bd3,
9438            Gtber_SPEC,
9439            crate::common::RW,
9440        >::from_register(self, 0)
9441    }
9442
9443    #[doc = "GTCCRA Buffer Operation"]
9444    #[inline(always)]
9445    pub fn ccra(
9446        self,
9447    ) -> crate::common::RegisterField<
9448        16,
9449        0x3,
9450        1,
9451        0,
9452        gtber::Ccra,
9453        gtber::Ccra,
9454        Gtber_SPEC,
9455        crate::common::RW,
9456    > {
9457        crate::common::RegisterField::<
9458            16,
9459            0x3,
9460            1,
9461            0,
9462            gtber::Ccra,
9463            gtber::Ccra,
9464            Gtber_SPEC,
9465            crate::common::RW,
9466        >::from_register(self, 0)
9467    }
9468
9469    #[doc = "GTCCRB Buffer Operation"]
9470    #[inline(always)]
9471    pub fn ccrb(
9472        self,
9473    ) -> crate::common::RegisterField<
9474        18,
9475        0x3,
9476        1,
9477        0,
9478        gtber::Ccrb,
9479        gtber::Ccrb,
9480        Gtber_SPEC,
9481        crate::common::RW,
9482    > {
9483        crate::common::RegisterField::<
9484            18,
9485            0x3,
9486            1,
9487            0,
9488            gtber::Ccrb,
9489            gtber::Ccrb,
9490            Gtber_SPEC,
9491            crate::common::RW,
9492        >::from_register(self, 0)
9493    }
9494
9495    #[doc = "GTPR Buffer Operation"]
9496    #[inline(always)]
9497    pub fn pr(
9498        self,
9499    ) -> crate::common::RegisterField<
9500        20,
9501        0x3,
9502        1,
9503        0,
9504        gtber::Pr,
9505        gtber::Pr,
9506        Gtber_SPEC,
9507        crate::common::RW,
9508    > {
9509        crate::common::RegisterField::<
9510            20,
9511            0x3,
9512            1,
9513            0,
9514            gtber::Pr,
9515            gtber::Pr,
9516            Gtber_SPEC,
9517            crate::common::RW,
9518        >::from_register(self, 0)
9519    }
9520
9521    #[doc = "GTCCRA and GTCCRB Forcible Buffer Operation"]
9522    #[inline(always)]
9523    pub fn ccrswt(
9524        self,
9525    ) -> crate::common::RegisterFieldBool<22, 1, 0, Gtber_SPEC, crate::common::W> {
9526        crate::common::RegisterFieldBool::<22, 1, 0, Gtber_SPEC, crate::common::W>::from_register(
9527            self, 0,
9528        )
9529    }
9530
9531    #[doc = "GTADTRA Register Buffer Transfer Timing Select"]
9532    #[inline(always)]
9533    pub fn adtta(
9534        self,
9535    ) -> crate::common::RegisterField<
9536        24,
9537        0x3,
9538        1,
9539        0,
9540        gtber::Adtta,
9541        gtber::Adtta,
9542        Gtber_SPEC,
9543        crate::common::RW,
9544    > {
9545        crate::common::RegisterField::<
9546            24,
9547            0x3,
9548            1,
9549            0,
9550            gtber::Adtta,
9551            gtber::Adtta,
9552            Gtber_SPEC,
9553            crate::common::RW,
9554        >::from_register(self, 0)
9555    }
9556
9557    #[doc = "GTADTRA Register Double Buffer Operation"]
9558    #[inline(always)]
9559    pub fn adtda(
9560        self,
9561    ) -> crate::common::RegisterField<
9562        26,
9563        0x1,
9564        1,
9565        0,
9566        gtber::Adtda,
9567        gtber::Adtda,
9568        Gtber_SPEC,
9569        crate::common::RW,
9570    > {
9571        crate::common::RegisterField::<
9572            26,
9573            0x1,
9574            1,
9575            0,
9576            gtber::Adtda,
9577            gtber::Adtda,
9578            Gtber_SPEC,
9579            crate::common::RW,
9580        >::from_register(self, 0)
9581    }
9582
9583    #[doc = "GTADTRB Register Buffer Transfer Timing Select"]
9584    #[inline(always)]
9585    pub fn adttb(
9586        self,
9587    ) -> crate::common::RegisterField<
9588        28,
9589        0x3,
9590        1,
9591        0,
9592        gtber::Adttb,
9593        gtber::Adttb,
9594        Gtber_SPEC,
9595        crate::common::RW,
9596    > {
9597        crate::common::RegisterField::<
9598            28,
9599            0x3,
9600            1,
9601            0,
9602            gtber::Adttb,
9603            gtber::Adttb,
9604            Gtber_SPEC,
9605            crate::common::RW,
9606        >::from_register(self, 0)
9607    }
9608
9609    #[doc = "GTADTRB Register Double Buffer Operation"]
9610    #[inline(always)]
9611    pub fn adtdb(
9612        self,
9613    ) -> crate::common::RegisterField<
9614        30,
9615        0x1,
9616        1,
9617        0,
9618        gtber::Adtdb,
9619        gtber::Adtdb,
9620        Gtber_SPEC,
9621        crate::common::RW,
9622    > {
9623        crate::common::RegisterField::<
9624            30,
9625            0x1,
9626            1,
9627            0,
9628            gtber::Adtdb,
9629            gtber::Adtdb,
9630            Gtber_SPEC,
9631            crate::common::RW,
9632        >::from_register(self, 0)
9633    }
9634}
9635impl ::core::default::Default for Gtber {
9636    #[inline(always)]
9637    fn default() -> Gtber {
9638        <crate::RegValueT<Gtber_SPEC> as RegisterValue<_>>::new(0)
9639    }
9640}
9641pub mod gtber {
9642
9643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9644    pub struct Bd0_SPEC;
9645    pub type Bd0 = crate::EnumBitfieldStruct<u8, Bd0_SPEC>;
9646    impl Bd0 {
9647        #[doc = "Buffer operation is enabled"]
9648        pub const _0: Self = Self::new(0);
9649
9650        #[doc = "Buffer operation is disabled"]
9651        pub const _1: Self = Self::new(1);
9652    }
9653    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9654    pub struct Bd1_SPEC;
9655    pub type Bd1 = crate::EnumBitfieldStruct<u8, Bd1_SPEC>;
9656    impl Bd1 {
9657        #[doc = "Buffer operation is enabled"]
9658        pub const _0: Self = Self::new(0);
9659
9660        #[doc = "Buffer operation is disabled"]
9661        pub const _1: Self = Self::new(1);
9662    }
9663    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9664    pub struct Bd2_SPEC;
9665    pub type Bd2 = crate::EnumBitfieldStruct<u8, Bd2_SPEC>;
9666    impl Bd2 {
9667        #[doc = "Buffer operation is enabled"]
9668        pub const _0: Self = Self::new(0);
9669
9670        #[doc = "Buffer operation is disabled"]
9671        pub const _1: Self = Self::new(1);
9672    }
9673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9674    pub struct Bd3_SPEC;
9675    pub type Bd3 = crate::EnumBitfieldStruct<u8, Bd3_SPEC>;
9676    impl Bd3 {
9677        #[doc = "Buffer operation is enabled"]
9678        pub const _0: Self = Self::new(0);
9679
9680        #[doc = "Buffer operation is disabled"]
9681        pub const _1: Self = Self::new(1);
9682    }
9683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9684    pub struct Ccra_SPEC;
9685    pub type Ccra = crate::EnumBitfieldStruct<u8, Ccra_SPEC>;
9686    impl Ccra {
9687        #[doc = "No buffer operation"]
9688        pub const _00: Self = Self::new(0);
9689
9690        #[doc = "Single buffer operation (GTCCRA ↔ GTCCRC)"]
9691        pub const _01: Self = Self::new(1);
9692
9693        #[doc = "Double buffer operation (GTCCRA ↔ GTCCRD)"]
9694        pub const OTHERS: Self = Self::new(0);
9695    }
9696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9697    pub struct Ccrb_SPEC;
9698    pub type Ccrb = crate::EnumBitfieldStruct<u8, Ccrb_SPEC>;
9699    impl Ccrb {
9700        #[doc = "No buffer operation"]
9701        pub const _00: Self = Self::new(0);
9702
9703        #[doc = "Single buffer operation (GTCCRB ↔ GTCCRE)"]
9704        pub const _01: Self = Self::new(1);
9705
9706        #[doc = "Double buffer operation (GTCCRB ↔ GTCCRE ↔ GTCCRF)"]
9707        pub const OTHERS: Self = Self::new(0);
9708    }
9709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9710    pub struct Pr_SPEC;
9711    pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
9712    impl Pr {
9713        #[doc = "No buffer operation"]
9714        pub const _00: Self = Self::new(0);
9715
9716        #[doc = "Single buffer operation (GTPBR → GTPR)"]
9717        pub const _01: Self = Self::new(1);
9718
9719        #[doc = "Double buffer operation (GTPDBR → GTPBR → GTPR)"]
9720        pub const OTHERS: Self = Self::new(0);
9721    }
9722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9723    pub struct Adtta_SPEC;
9724    pub type Adtta = crate::EnumBitfieldStruct<u8, Adtta_SPEC>;
9725    impl Adtta {
9726        #[doc = "In triangle wave, no transfer. In saw-wave mode, no transfer."]
9727        pub const _00: Self = Self::new(0);
9728
9729        #[doc = "In triangle wave, transfer at crest. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9730        pub const _01: Self = Self::new(1);
9731
9732        #[doc = "In triangle wave, transfer at trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9733        pub const _10: Self = Self::new(2);
9734
9735        #[doc = "In triangle wave, transfer at both crest and trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9736        pub const _11: Self = Self::new(3);
9737    }
9738    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9739    pub struct Adtda_SPEC;
9740    pub type Adtda = crate::EnumBitfieldStruct<u8, Adtda_SPEC>;
9741    impl Adtda {
9742        #[doc = "Single buffer operation (GTADTBRA → GTADTRA)"]
9743        pub const _0: Self = Self::new(0);
9744
9745        #[doc = "Double buffer operation (GTADTDBRA → GTADTBRA → GTADTRA)"]
9746        pub const _1: Self = Self::new(1);
9747    }
9748    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9749    pub struct Adttb_SPEC;
9750    pub type Adttb = crate::EnumBitfieldStruct<u8, Adttb_SPEC>;
9751    impl Adttb {
9752        #[doc = "In triangle wave, no transfer. In saw-wave mode, no transfer."]
9753        pub const _00: Self = Self::new(0);
9754
9755        #[doc = "In triangle wave, transfer at crest. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9756        pub const _01: Self = Self::new(1);
9757
9758        #[doc = "In triangle wave, transfer at trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9759        pub const _10: Self = Self::new(2);
9760
9761        #[doc = "In triangle wave, transfer at both crest and trough. In saw-wave mode, transfer at underflow (in down-counting), overflow (in up-counting), or counter clearing."]
9762        pub const _11: Self = Self::new(3);
9763    }
9764    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9765    pub struct Adtdb_SPEC;
9766    pub type Adtdb = crate::EnumBitfieldStruct<u8, Adtdb_SPEC>;
9767    impl Adtdb {
9768        #[doc = "Single buffer operation (GTADTBRB → GTADTRB)"]
9769        pub const _0: Self = Self::new(0);
9770
9771        #[doc = "Double buffer operation (GTADTDBRB → GTADTRB)"]
9772        pub const _1: Self = Self::new(1);
9773    }
9774}
9775#[doc(hidden)]
9776#[derive(Copy, Clone, Eq, PartialEq)]
9777pub struct Gtitc_SPEC;
9778impl crate::sealed::RegSpec for Gtitc_SPEC {
9779    type DataType = u32;
9780}
9781
9782#[doc = "General PWM Timer Interrupt and A/D Conversion Start Request Skipping Setting Register"]
9783pub type Gtitc = crate::RegValueT<Gtitc_SPEC>;
9784
9785impl Gtitc {
9786    #[doc = "GTCCRA Register Compare Match/Input Capture Interrupt Link"]
9787    #[inline(always)]
9788    pub fn itla(
9789        self,
9790    ) -> crate::common::RegisterField<
9791        0,
9792        0x1,
9793        1,
9794        0,
9795        gtitc::Itla,
9796        gtitc::Itla,
9797        Gtitc_SPEC,
9798        crate::common::RW,
9799    > {
9800        crate::common::RegisterField::<
9801            0,
9802            0x1,
9803            1,
9804            0,
9805            gtitc::Itla,
9806            gtitc::Itla,
9807            Gtitc_SPEC,
9808            crate::common::RW,
9809        >::from_register(self, 0)
9810    }
9811
9812    #[doc = "GTCCRB Register Compare Match/Input Capture Interrupt Link"]
9813    #[inline(always)]
9814    pub fn itlb(
9815        self,
9816    ) -> crate::common::RegisterField<
9817        1,
9818        0x1,
9819        1,
9820        0,
9821        gtitc::Itlb,
9822        gtitc::Itlb,
9823        Gtitc_SPEC,
9824        crate::common::RW,
9825    > {
9826        crate::common::RegisterField::<
9827            1,
9828            0x1,
9829            1,
9830            0,
9831            gtitc::Itlb,
9832            gtitc::Itlb,
9833            Gtitc_SPEC,
9834            crate::common::RW,
9835        >::from_register(self, 0)
9836    }
9837
9838    #[doc = "GTCCRC Register Compare Match Interrupt Link"]
9839    #[inline(always)]
9840    pub fn itlc(
9841        self,
9842    ) -> crate::common::RegisterField<
9843        2,
9844        0x1,
9845        1,
9846        0,
9847        gtitc::Itlc,
9848        gtitc::Itlc,
9849        Gtitc_SPEC,
9850        crate::common::RW,
9851    > {
9852        crate::common::RegisterField::<
9853            2,
9854            0x1,
9855            1,
9856            0,
9857            gtitc::Itlc,
9858            gtitc::Itlc,
9859            Gtitc_SPEC,
9860            crate::common::RW,
9861        >::from_register(self, 0)
9862    }
9863
9864    #[doc = "GTCCRD Register Compare Match Interrupt Link"]
9865    #[inline(always)]
9866    pub fn itld(
9867        self,
9868    ) -> crate::common::RegisterField<
9869        3,
9870        0x1,
9871        1,
9872        0,
9873        gtitc::Itld,
9874        gtitc::Itld,
9875        Gtitc_SPEC,
9876        crate::common::RW,
9877    > {
9878        crate::common::RegisterField::<
9879            3,
9880            0x1,
9881            1,
9882            0,
9883            gtitc::Itld,
9884            gtitc::Itld,
9885            Gtitc_SPEC,
9886            crate::common::RW,
9887        >::from_register(self, 0)
9888    }
9889
9890    #[doc = "GTCCRE Register Compare Match Interrupt Link"]
9891    #[inline(always)]
9892    pub fn itle(
9893        self,
9894    ) -> crate::common::RegisterField<
9895        4,
9896        0x1,
9897        1,
9898        0,
9899        gtitc::Itle,
9900        gtitc::Itle,
9901        Gtitc_SPEC,
9902        crate::common::RW,
9903    > {
9904        crate::common::RegisterField::<
9905            4,
9906            0x1,
9907            1,
9908            0,
9909            gtitc::Itle,
9910            gtitc::Itle,
9911            Gtitc_SPEC,
9912            crate::common::RW,
9913        >::from_register(self, 0)
9914    }
9915
9916    #[doc = "GTCCRF Register Compare Match Interrupt Link"]
9917    #[inline(always)]
9918    pub fn itlf(
9919        self,
9920    ) -> crate::common::RegisterField<
9921        5,
9922        0x1,
9923        1,
9924        0,
9925        gtitc::Itlf,
9926        gtitc::Itlf,
9927        Gtitc_SPEC,
9928        crate::common::RW,
9929    > {
9930        crate::common::RegisterField::<
9931            5,
9932            0x1,
9933            1,
9934            0,
9935            gtitc::Itlf,
9936            gtitc::Itlf,
9937            Gtitc_SPEC,
9938            crate::common::RW,
9939        >::from_register(self, 0)
9940    }
9941
9942    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Function Select"]
9943    #[inline(always)]
9944    pub fn ivtc(
9945        self,
9946    ) -> crate::common::RegisterField<
9947        6,
9948        0x3,
9949        1,
9950        0,
9951        gtitc::Ivtc,
9952        gtitc::Ivtc,
9953        Gtitc_SPEC,
9954        crate::common::RW,
9955    > {
9956        crate::common::RegisterField::<
9957            6,
9958            0x3,
9959            1,
9960            0,
9961            gtitc::Ivtc,
9962            gtitc::Ivtc,
9963            Gtitc_SPEC,
9964            crate::common::RW,
9965        >::from_register(self, 0)
9966    }
9967
9968    #[doc = "GPTn_OVF/GPTn_UDF Interrupt Skipping Count Select"]
9969    #[inline(always)]
9970    pub fn ivtt(
9971        self,
9972    ) -> crate::common::RegisterField<
9973        8,
9974        0x7,
9975        1,
9976        0,
9977        gtitc::Ivtt,
9978        gtitc::Ivtt,
9979        Gtitc_SPEC,
9980        crate::common::RW,
9981    > {
9982        crate::common::RegisterField::<
9983            8,
9984            0x7,
9985            1,
9986            0,
9987            gtitc::Ivtt,
9988            gtitc::Ivtt,
9989            Gtitc_SPEC,
9990            crate::common::RW,
9991        >::from_register(self, 0)
9992    }
9993
9994    #[doc = "GTADTRA Register A/D Conversion Start Request Link"]
9995    #[inline(always)]
9996    pub fn adtal(
9997        self,
9998    ) -> crate::common::RegisterField<
9999        12,
10000        0x1,
10001        1,
10002        0,
10003        gtitc::Adtal,
10004        gtitc::Adtal,
10005        Gtitc_SPEC,
10006        crate::common::RW,
10007    > {
10008        crate::common::RegisterField::<
10009            12,
10010            0x1,
10011            1,
10012            0,
10013            gtitc::Adtal,
10014            gtitc::Adtal,
10015            Gtitc_SPEC,
10016            crate::common::RW,
10017        >::from_register(self, 0)
10018    }
10019
10020    #[doc = "GTADTRB Register A/D Conversion Start Request Link"]
10021    #[inline(always)]
10022    pub fn adtbl(
10023        self,
10024    ) -> crate::common::RegisterField<
10025        14,
10026        0x1,
10027        1,
10028        0,
10029        gtitc::Adtbl,
10030        gtitc::Adtbl,
10031        Gtitc_SPEC,
10032        crate::common::RW,
10033    > {
10034        crate::common::RegisterField::<
10035            14,
10036            0x1,
10037            1,
10038            0,
10039            gtitc::Adtbl,
10040            gtitc::Adtbl,
10041            Gtitc_SPEC,
10042            crate::common::RW,
10043        >::from_register(self, 0)
10044    }
10045}
10046impl ::core::default::Default for Gtitc {
10047    #[inline(always)]
10048    fn default() -> Gtitc {
10049        <crate::RegValueT<Gtitc_SPEC> as RegisterValue<_>>::new(0)
10050    }
10051}
10052pub mod gtitc {
10053
10054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10055    pub struct Itla_SPEC;
10056    pub type Itla = crate::EnumBitfieldStruct<u8, Itla_SPEC>;
10057    impl Itla {
10058        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10059        pub const _0: Self = Self::new(0);
10060
10061        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10062        pub const _1: Self = Self::new(1);
10063    }
10064    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10065    pub struct Itlb_SPEC;
10066    pub type Itlb = crate::EnumBitfieldStruct<u8, Itlb_SPEC>;
10067    impl Itlb {
10068        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10069        pub const _0: Self = Self::new(0);
10070
10071        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10072        pub const _1: Self = Self::new(1);
10073    }
10074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10075    pub struct Itlc_SPEC;
10076    pub type Itlc = crate::EnumBitfieldStruct<u8, Itlc_SPEC>;
10077    impl Itlc {
10078        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10079        pub const _0: Self = Self::new(0);
10080
10081        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10082        pub const _1: Self = Self::new(1);
10083    }
10084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10085    pub struct Itld_SPEC;
10086    pub type Itld = crate::EnumBitfieldStruct<u8, Itld_SPEC>;
10087    impl Itld {
10088        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10089        pub const _0: Self = Self::new(0);
10090
10091        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10092        pub const _1: Self = Self::new(1);
10093    }
10094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10095    pub struct Itle_SPEC;
10096    pub type Itle = crate::EnumBitfieldStruct<u8, Itle_SPEC>;
10097    impl Itle {
10098        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10099        pub const _0: Self = Self::new(0);
10100
10101        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10102        pub const _1: Self = Self::new(1);
10103    }
10104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10105    pub struct Itlf_SPEC;
10106    pub type Itlf = crate::EnumBitfieldStruct<u8, Itlf_SPEC>;
10107    impl Itlf {
10108        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10109        pub const _0: Self = Self::new(0);
10110
10111        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10112        pub const _1: Self = Self::new(1);
10113    }
10114    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10115    pub struct Ivtc_SPEC;
10116    pub type Ivtc = crate::EnumBitfieldStruct<u8, Ivtc_SPEC>;
10117    impl Ivtc {
10118        #[doc = "Skipping is not performed"]
10119        pub const _00: Self = Self::new(0);
10120
10121        #[doc = "Both overflow and underflow for saw waves and crest for triangle waves are counted and skipped"]
10122        pub const _01: Self = Self::new(1);
10123
10124        #[doc = "Both overflow and underflow for saw waves and trough for triangle waves are counted and skipped"]
10125        pub const _10: Self = Self::new(2);
10126
10127        #[doc = "Both overflow and underflow for saw waves and both crest and trough for triangle waves are counted and skipped"]
10128        pub const _10: Self = Self::new(2);
10129    }
10130    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10131    pub struct Ivtt_SPEC;
10132    pub type Ivtt = crate::EnumBitfieldStruct<u8, Ivtt_SPEC>;
10133    impl Ivtt {
10134        #[doc = "Skipping is not performed"]
10135        pub const _000: Self = Self::new(0);
10136
10137        #[doc = "Skipping count of 1"]
10138        pub const _001: Self = Self::new(1);
10139
10140        #[doc = "Skipping count of 2"]
10141        pub const _010: Self = Self::new(2);
10142
10143        #[doc = "Skipping count of 3"]
10144        pub const _011: Self = Self::new(3);
10145
10146        #[doc = "Skipping count of 4"]
10147        pub const _100: Self = Self::new(4);
10148
10149        #[doc = "Skipping count of 5"]
10150        pub const _101: Self = Self::new(5);
10151
10152        #[doc = "Skipping count of 6"]
10153        pub const _110: Self = Self::new(6);
10154
10155        #[doc = "Skipping count of 7"]
10156        pub const _111: Self = Self::new(7);
10157    }
10158    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10159    pub struct Adtal_SPEC;
10160    pub type Adtal = crate::EnumBitfieldStruct<u8, Adtal_SPEC>;
10161    impl Adtal {
10162        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10163        pub const _0: Self = Self::new(0);
10164
10165        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10166        pub const _1: Self = Self::new(1);
10167    }
10168    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10169    pub struct Adtbl_SPEC;
10170    pub type Adtbl = crate::EnumBitfieldStruct<u8, Adtbl_SPEC>;
10171    impl Adtbl {
10172        #[doc = "Not linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10173        pub const _0: Self = Self::new(0);
10174
10175        #[doc = "Linked with GPTn_OVF/GPTn_UDF interrupt skipping function"]
10176        pub const _1: Self = Self::new(1);
10177    }
10178}
10179#[doc(hidden)]
10180#[derive(Copy, Clone, Eq, PartialEq)]
10181pub struct Gtcnt_SPEC;
10182impl crate::sealed::RegSpec for Gtcnt_SPEC {
10183    type DataType = u32;
10184}
10185
10186#[doc = "General PWM Timer Counter"]
10187pub type Gtcnt = crate::RegValueT<Gtcnt_SPEC>;
10188
10189impl NoBitfieldReg<Gtcnt_SPEC> for Gtcnt {}
10190impl ::core::default::Default for Gtcnt {
10191    #[inline(always)]
10192    fn default() -> Gtcnt {
10193        <crate::RegValueT<Gtcnt_SPEC> as RegisterValue<_>>::new(0)
10194    }
10195}
10196
10197#[doc(hidden)]
10198#[derive(Copy, Clone, Eq, PartialEq)]
10199pub struct Gtccra_SPEC;
10200impl crate::sealed::RegSpec for Gtccra_SPEC {
10201    type DataType = u32;
10202}
10203
10204#[doc = "General PWM Timer Compare Capture Register A"]
10205pub type Gtccra = crate::RegValueT<Gtccra_SPEC>;
10206
10207impl NoBitfieldReg<Gtccra_SPEC> for Gtccra {}
10208impl ::core::default::Default for Gtccra {
10209    #[inline(always)]
10210    fn default() -> Gtccra {
10211        <crate::RegValueT<Gtccra_SPEC> as RegisterValue<_>>::new(65535)
10212    }
10213}
10214
10215#[doc(hidden)]
10216#[derive(Copy, Clone, Eq, PartialEq)]
10217pub struct Gtccrb_SPEC;
10218impl crate::sealed::RegSpec for Gtccrb_SPEC {
10219    type DataType = u32;
10220}
10221
10222#[doc = "General PWM Timer Compare Capture Register B"]
10223pub type Gtccrb = crate::RegValueT<Gtccrb_SPEC>;
10224
10225impl NoBitfieldReg<Gtccrb_SPEC> for Gtccrb {}
10226impl ::core::default::Default for Gtccrb {
10227    #[inline(always)]
10228    fn default() -> Gtccrb {
10229        <crate::RegValueT<Gtccrb_SPEC> as RegisterValue<_>>::new(65535)
10230    }
10231}
10232
10233#[doc(hidden)]
10234#[derive(Copy, Clone, Eq, PartialEq)]
10235pub struct Gtccrc_SPEC;
10236impl crate::sealed::RegSpec for Gtccrc_SPEC {
10237    type DataType = u32;
10238}
10239
10240#[doc = "General PWM Timer Compare Capture Register C"]
10241pub type Gtccrc = crate::RegValueT<Gtccrc_SPEC>;
10242
10243impl NoBitfieldReg<Gtccrc_SPEC> for Gtccrc {}
10244impl ::core::default::Default for Gtccrc {
10245    #[inline(always)]
10246    fn default() -> Gtccrc {
10247        <crate::RegValueT<Gtccrc_SPEC> as RegisterValue<_>>::new(65535)
10248    }
10249}
10250
10251#[doc(hidden)]
10252#[derive(Copy, Clone, Eq, PartialEq)]
10253pub struct Gtccre_SPEC;
10254impl crate::sealed::RegSpec for Gtccre_SPEC {
10255    type DataType = u32;
10256}
10257
10258#[doc = "General PWM Timer Compare Capture Register E"]
10259pub type Gtccre = crate::RegValueT<Gtccre_SPEC>;
10260
10261impl NoBitfieldReg<Gtccre_SPEC> for Gtccre {}
10262impl ::core::default::Default for Gtccre {
10263    #[inline(always)]
10264    fn default() -> Gtccre {
10265        <crate::RegValueT<Gtccre_SPEC> as RegisterValue<_>>::new(65535)
10266    }
10267}
10268
10269#[doc(hidden)]
10270#[derive(Copy, Clone, Eq, PartialEq)]
10271pub struct Gtccrd_SPEC;
10272impl crate::sealed::RegSpec for Gtccrd_SPEC {
10273    type DataType = u32;
10274}
10275
10276#[doc = "General PWM Timer Compare Capture Register D"]
10277pub type Gtccrd = crate::RegValueT<Gtccrd_SPEC>;
10278
10279impl NoBitfieldReg<Gtccrd_SPEC> for Gtccrd {}
10280impl ::core::default::Default for Gtccrd {
10281    #[inline(always)]
10282    fn default() -> Gtccrd {
10283        <crate::RegValueT<Gtccrd_SPEC> as RegisterValue<_>>::new(65535)
10284    }
10285}
10286
10287#[doc(hidden)]
10288#[derive(Copy, Clone, Eq, PartialEq)]
10289pub struct Gtccrf_SPEC;
10290impl crate::sealed::RegSpec for Gtccrf_SPEC {
10291    type DataType = u32;
10292}
10293
10294#[doc = "General PWM Timer Compare Capture Register F"]
10295pub type Gtccrf = crate::RegValueT<Gtccrf_SPEC>;
10296
10297impl NoBitfieldReg<Gtccrf_SPEC> for Gtccrf {}
10298impl ::core::default::Default for Gtccrf {
10299    #[inline(always)]
10300    fn default() -> Gtccrf {
10301        <crate::RegValueT<Gtccrf_SPEC> as RegisterValue<_>>::new(65535)
10302    }
10303}
10304
10305#[doc(hidden)]
10306#[derive(Copy, Clone, Eq, PartialEq)]
10307pub struct Gtpr_SPEC;
10308impl crate::sealed::RegSpec for Gtpr_SPEC {
10309    type DataType = u32;
10310}
10311
10312#[doc = "General PWM Timer Cycle Setting Register"]
10313pub type Gtpr = crate::RegValueT<Gtpr_SPEC>;
10314
10315impl NoBitfieldReg<Gtpr_SPEC> for Gtpr {}
10316impl ::core::default::Default for Gtpr {
10317    #[inline(always)]
10318    fn default() -> Gtpr {
10319        <crate::RegValueT<Gtpr_SPEC> as RegisterValue<_>>::new(65535)
10320    }
10321}
10322
10323#[doc(hidden)]
10324#[derive(Copy, Clone, Eq, PartialEq)]
10325pub struct Gtpbr_SPEC;
10326impl crate::sealed::RegSpec for Gtpbr_SPEC {
10327    type DataType = u32;
10328}
10329
10330#[doc = "General PWM Timer Cycle Setting Buffer Register"]
10331pub type Gtpbr = crate::RegValueT<Gtpbr_SPEC>;
10332
10333impl NoBitfieldReg<Gtpbr_SPEC> for Gtpbr {}
10334impl ::core::default::Default for Gtpbr {
10335    #[inline(always)]
10336    fn default() -> Gtpbr {
10337        <crate::RegValueT<Gtpbr_SPEC> as RegisterValue<_>>::new(65535)
10338    }
10339}
10340
10341#[doc(hidden)]
10342#[derive(Copy, Clone, Eq, PartialEq)]
10343pub struct Gtpdbr_SPEC;
10344impl crate::sealed::RegSpec for Gtpdbr_SPEC {
10345    type DataType = u32;
10346}
10347
10348#[doc = "General PWM Timer Period Setting Double-Buffer Register"]
10349pub type Gtpdbr = crate::RegValueT<Gtpdbr_SPEC>;
10350
10351impl NoBitfieldReg<Gtpdbr_SPEC> for Gtpdbr {}
10352impl ::core::default::Default for Gtpdbr {
10353    #[inline(always)]
10354    fn default() -> Gtpdbr {
10355        <crate::RegValueT<Gtpdbr_SPEC> as RegisterValue<_>>::new(65535)
10356    }
10357}
10358
10359#[doc(hidden)]
10360#[derive(Copy, Clone, Eq, PartialEq)]
10361pub struct Gtadtra_SPEC;
10362impl crate::sealed::RegSpec for Gtadtra_SPEC {
10363    type DataType = u32;
10364}
10365
10366#[doc = "A/D Conversion Start Request Timing Register A"]
10367pub type Gtadtra = crate::RegValueT<Gtadtra_SPEC>;
10368
10369impl NoBitfieldReg<Gtadtra_SPEC> for Gtadtra {}
10370impl ::core::default::Default for Gtadtra {
10371    #[inline(always)]
10372    fn default() -> Gtadtra {
10373        <crate::RegValueT<Gtadtra_SPEC> as RegisterValue<_>>::new(65535)
10374    }
10375}
10376
10377#[doc(hidden)]
10378#[derive(Copy, Clone, Eq, PartialEq)]
10379pub struct Gtadtbra_SPEC;
10380impl crate::sealed::RegSpec for Gtadtbra_SPEC {
10381    type DataType = u32;
10382}
10383
10384#[doc = "A/D Conversion Start Request Timing Buffer Register A"]
10385pub type Gtadtbra = crate::RegValueT<Gtadtbra_SPEC>;
10386
10387impl NoBitfieldReg<Gtadtbra_SPEC> for Gtadtbra {}
10388impl ::core::default::Default for Gtadtbra {
10389    #[inline(always)]
10390    fn default() -> Gtadtbra {
10391        <crate::RegValueT<Gtadtbra_SPEC> as RegisterValue<_>>::new(65535)
10392    }
10393}
10394
10395#[doc(hidden)]
10396#[derive(Copy, Clone, Eq, PartialEq)]
10397pub struct Gtadtdbra_SPEC;
10398impl crate::sealed::RegSpec for Gtadtdbra_SPEC {
10399    type DataType = u32;
10400}
10401
10402#[doc = "A/D Conversion Start Request Timing Double-Buffer Register A"]
10403pub type Gtadtdbra = crate::RegValueT<Gtadtdbra_SPEC>;
10404
10405impl NoBitfieldReg<Gtadtdbra_SPEC> for Gtadtdbra {}
10406impl ::core::default::Default for Gtadtdbra {
10407    #[inline(always)]
10408    fn default() -> Gtadtdbra {
10409        <crate::RegValueT<Gtadtdbra_SPEC> as RegisterValue<_>>::new(65535)
10410    }
10411}
10412
10413#[doc(hidden)]
10414#[derive(Copy, Clone, Eq, PartialEq)]
10415pub struct Gtadtrb_SPEC;
10416impl crate::sealed::RegSpec for Gtadtrb_SPEC {
10417    type DataType = u32;
10418}
10419
10420#[doc = "A/D Conversion Start Request Timing Register B"]
10421pub type Gtadtrb = crate::RegValueT<Gtadtrb_SPEC>;
10422
10423impl NoBitfieldReg<Gtadtrb_SPEC> for Gtadtrb {}
10424impl ::core::default::Default for Gtadtrb {
10425    #[inline(always)]
10426    fn default() -> Gtadtrb {
10427        <crate::RegValueT<Gtadtrb_SPEC> as RegisterValue<_>>::new(65535)
10428    }
10429}
10430
10431#[doc(hidden)]
10432#[derive(Copy, Clone, Eq, PartialEq)]
10433pub struct Gtadtbrb_SPEC;
10434impl crate::sealed::RegSpec for Gtadtbrb_SPEC {
10435    type DataType = u32;
10436}
10437
10438#[doc = "A/D Conversion Start Request Timing Buffer Register B"]
10439pub type Gtadtbrb = crate::RegValueT<Gtadtbrb_SPEC>;
10440
10441impl NoBitfieldReg<Gtadtbrb_SPEC> for Gtadtbrb {}
10442impl ::core::default::Default for Gtadtbrb {
10443    #[inline(always)]
10444    fn default() -> Gtadtbrb {
10445        <crate::RegValueT<Gtadtbrb_SPEC> as RegisterValue<_>>::new(65535)
10446    }
10447}
10448
10449#[doc(hidden)]
10450#[derive(Copy, Clone, Eq, PartialEq)]
10451pub struct Gtadtdbrb_SPEC;
10452impl crate::sealed::RegSpec for Gtadtdbrb_SPEC {
10453    type DataType = u32;
10454}
10455
10456#[doc = "A/D Conversion Start Request Timing Double-Buffer Register B"]
10457pub type Gtadtdbrb = crate::RegValueT<Gtadtdbrb_SPEC>;
10458
10459impl NoBitfieldReg<Gtadtdbrb_SPEC> for Gtadtdbrb {}
10460impl ::core::default::Default for Gtadtdbrb {
10461    #[inline(always)]
10462    fn default() -> Gtadtdbrb {
10463        <crate::RegValueT<Gtadtdbrb_SPEC> as RegisterValue<_>>::new(65535)
10464    }
10465}
10466
10467#[doc(hidden)]
10468#[derive(Copy, Clone, Eq, PartialEq)]
10469pub struct Gtdtcr_SPEC;
10470impl crate::sealed::RegSpec for Gtdtcr_SPEC {
10471    type DataType = u32;
10472}
10473
10474#[doc = "General PWM Timer Dead Time Control Register"]
10475pub type Gtdtcr = crate::RegValueT<Gtdtcr_SPEC>;
10476
10477impl Gtdtcr {
10478    #[doc = "Negative-Phase Waveform Setting"]
10479    #[inline(always)]
10480    pub fn tde(
10481        self,
10482    ) -> crate::common::RegisterField<
10483        0,
10484        0x1,
10485        1,
10486        0,
10487        gtdtcr::Tde,
10488        gtdtcr::Tde,
10489        Gtdtcr_SPEC,
10490        crate::common::RW,
10491    > {
10492        crate::common::RegisterField::<
10493            0,
10494            0x1,
10495            1,
10496            0,
10497            gtdtcr::Tde,
10498            gtdtcr::Tde,
10499            Gtdtcr_SPEC,
10500            crate::common::RW,
10501        >::from_register(self, 0)
10502    }
10503
10504    #[doc = "GTDVU Register Buffer Operation Enable"]
10505    #[inline(always)]
10506    pub fn tdbue(
10507        self,
10508    ) -> crate::common::RegisterField<
10509        4,
10510        0x1,
10511        1,
10512        0,
10513        gtdtcr::Tdbue,
10514        gtdtcr::Tdbue,
10515        Gtdtcr_SPEC,
10516        crate::common::RW,
10517    > {
10518        crate::common::RegisterField::<
10519            4,
10520            0x1,
10521            1,
10522            0,
10523            gtdtcr::Tdbue,
10524            gtdtcr::Tdbue,
10525            Gtdtcr_SPEC,
10526            crate::common::RW,
10527        >::from_register(self, 0)
10528    }
10529
10530    #[doc = "GTDVD Register Buffer Operation Enable"]
10531    #[inline(always)]
10532    pub fn tdbde(
10533        self,
10534    ) -> crate::common::RegisterField<
10535        5,
10536        0x1,
10537        1,
10538        0,
10539        gtdtcr::Tdbde,
10540        gtdtcr::Tdbde,
10541        Gtdtcr_SPEC,
10542        crate::common::RW,
10543    > {
10544        crate::common::RegisterField::<
10545            5,
10546            0x1,
10547            1,
10548            0,
10549            gtdtcr::Tdbde,
10550            gtdtcr::Tdbde,
10551            Gtdtcr_SPEC,
10552            crate::common::RW,
10553        >::from_register(self, 0)
10554    }
10555
10556    #[doc = "GTDVD Register Setting"]
10557    #[inline(always)]
10558    pub fn tdfer(
10559        self,
10560    ) -> crate::common::RegisterField<
10561        8,
10562        0x1,
10563        1,
10564        0,
10565        gtdtcr::Tdfer,
10566        gtdtcr::Tdfer,
10567        Gtdtcr_SPEC,
10568        crate::common::RW,
10569    > {
10570        crate::common::RegisterField::<
10571            8,
10572            0x1,
10573            1,
10574            0,
10575            gtdtcr::Tdfer,
10576            gtdtcr::Tdfer,
10577            Gtdtcr_SPEC,
10578            crate::common::RW,
10579        >::from_register(self, 0)
10580    }
10581}
10582impl ::core::default::Default for Gtdtcr {
10583    #[inline(always)]
10584    fn default() -> Gtdtcr {
10585        <crate::RegValueT<Gtdtcr_SPEC> as RegisterValue<_>>::new(0)
10586    }
10587}
10588pub mod gtdtcr {
10589
10590    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10591    pub struct Tde_SPEC;
10592    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
10593    impl Tde {
10594        #[doc = "GTCCRB is set without using DTDVU and GTDVD"]
10595        pub const _0: Self = Self::new(0);
10596
10597        #[doc = "DTDVU and GTDVD are used to set the compare match value for negative-phase waveform with dead time automatically in GTCCRB"]
10598        pub const _1: Self = Self::new(1);
10599    }
10600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10601    pub struct Tdbue_SPEC;
10602    pub type Tdbue = crate::EnumBitfieldStruct<u8, Tdbue_SPEC>;
10603    impl Tdbue {
10604        #[doc = "GTDVU register buffer operation is disabled"]
10605        pub const _0: Self = Self::new(0);
10606
10607        #[doc = "GTDVU register buffer operation is enabled"]
10608        pub const _1: Self = Self::new(1);
10609    }
10610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10611    pub struct Tdbde_SPEC;
10612    pub type Tdbde = crate::EnumBitfieldStruct<u8, Tdbde_SPEC>;
10613    impl Tdbde {
10614        #[doc = "GTDVD register buffer operation is disabled"]
10615        pub const _0: Self = Self::new(0);
10616
10617        #[doc = "GTDVD register buffer operation is enabled"]
10618        pub const _1: Self = Self::new(1);
10619    }
10620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10621    pub struct Tdfer_SPEC;
10622    pub type Tdfer = crate::EnumBitfieldStruct<u8, Tdfer_SPEC>;
10623    impl Tdfer {
10624        #[doc = "GTDVU and GTDVD registers are set separately."]
10625        pub const _0: Self = Self::new(0);
10626
10627        #[doc = "The value written to GTDVU register is automatically set to GTDVD register"]
10628        pub const _1: Self = Self::new(1);
10629    }
10630}
10631#[doc(hidden)]
10632#[derive(Copy, Clone, Eq, PartialEq)]
10633pub struct Gtdvu_SPEC;
10634impl crate::sealed::RegSpec for Gtdvu_SPEC {
10635    type DataType = u32;
10636}
10637
10638#[doc = "General PWM Timer Dead Time Value Register U"]
10639pub type Gtdvu = crate::RegValueT<Gtdvu_SPEC>;
10640
10641impl NoBitfieldReg<Gtdvu_SPEC> for Gtdvu {}
10642impl ::core::default::Default for Gtdvu {
10643    #[inline(always)]
10644    fn default() -> Gtdvu {
10645        <crate::RegValueT<Gtdvu_SPEC> as RegisterValue<_>>::new(65535)
10646    }
10647}
10648
10649#[doc(hidden)]
10650#[derive(Copy, Clone, Eq, PartialEq)]
10651pub struct Gtdvd_SPEC;
10652impl crate::sealed::RegSpec for Gtdvd_SPEC {
10653    type DataType = u32;
10654}
10655
10656#[doc = "General PWM Timer Dead Time Value Register D"]
10657pub type Gtdvd = crate::RegValueT<Gtdvd_SPEC>;
10658
10659impl NoBitfieldReg<Gtdvd_SPEC> for Gtdvd {}
10660impl ::core::default::Default for Gtdvd {
10661    #[inline(always)]
10662    fn default() -> Gtdvd {
10663        <crate::RegValueT<Gtdvd_SPEC> as RegisterValue<_>>::new(65535)
10664    }
10665}
10666
10667#[doc(hidden)]
10668#[derive(Copy, Clone, Eq, PartialEq)]
10669pub struct Gtdbu_SPEC;
10670impl crate::sealed::RegSpec for Gtdbu_SPEC {
10671    type DataType = u32;
10672}
10673
10674#[doc = "General PWM Timer Dead Time Buffer Register U"]
10675pub type Gtdbu = crate::RegValueT<Gtdbu_SPEC>;
10676
10677impl NoBitfieldReg<Gtdbu_SPEC> for Gtdbu {}
10678impl ::core::default::Default for Gtdbu {
10679    #[inline(always)]
10680    fn default() -> Gtdbu {
10681        <crate::RegValueT<Gtdbu_SPEC> as RegisterValue<_>>::new(65535)
10682    }
10683}
10684
10685#[doc(hidden)]
10686#[derive(Copy, Clone, Eq, PartialEq)]
10687pub struct Gtdbd_SPEC;
10688impl crate::sealed::RegSpec for Gtdbd_SPEC {
10689    type DataType = u32;
10690}
10691
10692#[doc = "General PWM Timer Dead Time Buffer Register D"]
10693pub type Gtdbd = crate::RegValueT<Gtdbd_SPEC>;
10694
10695impl NoBitfieldReg<Gtdbd_SPEC> for Gtdbd {}
10696impl ::core::default::Default for Gtdbd {
10697    #[inline(always)]
10698    fn default() -> Gtdbd {
10699        <crate::RegValueT<Gtdbd_SPEC> as RegisterValue<_>>::new(65535)
10700    }
10701}
10702
10703#[doc(hidden)]
10704#[derive(Copy, Clone, Eq, PartialEq)]
10705pub struct Gtsos_SPEC;
10706impl crate::sealed::RegSpec for Gtsos_SPEC {
10707    type DataType = u32;
10708}
10709
10710#[doc = "General PWM Timer Output Protection Function Status Register"]
10711pub type Gtsos = crate::RegValueT<Gtsos_SPEC>;
10712
10713impl Gtsos {
10714    #[doc = "Output Protection Function Status"]
10715    #[inline(always)]
10716    pub fn sos(
10717        self,
10718    ) -> crate::common::RegisterField<
10719        0,
10720        0x3,
10721        1,
10722        0,
10723        gtsos::Sos,
10724        gtsos::Sos,
10725        Gtsos_SPEC,
10726        crate::common::R,
10727    > {
10728        crate::common::RegisterField::<
10729            0,
10730            0x3,
10731            1,
10732            0,
10733            gtsos::Sos,
10734            gtsos::Sos,
10735            Gtsos_SPEC,
10736            crate::common::R,
10737        >::from_register(self, 0)
10738    }
10739}
10740impl ::core::default::Default for Gtsos {
10741    #[inline(always)]
10742    fn default() -> Gtsos {
10743        <crate::RegValueT<Gtsos_SPEC> as RegisterValue<_>>::new(0)
10744    }
10745}
10746pub mod gtsos {
10747
10748    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10749    pub struct Sos_SPEC;
10750    pub type Sos = crate::EnumBitfieldStruct<u8, Sos_SPEC>;
10751    impl Sos {
10752        #[doc = "Normal operation"]
10753        pub const _00: Self = Self::new(0);
10754
10755        #[doc = "Protected state (GTCCRA = 0 is set during transfer at trough or crest)"]
10756        pub const _01: Self = Self::new(1);
10757
10758        #[doc = "Protected state (GTCCRA ≥ GTPR is set during transfer at trough)"]
10759        pub const _10: Self = Self::new(2);
10760
10761        #[doc = "Protected state (GTCCRA ≥ GTPR is set during transfer at crest)"]
10762        pub const _11: Self = Self::new(3);
10763    }
10764}
10765#[doc(hidden)]
10766#[derive(Copy, Clone, Eq, PartialEq)]
10767pub struct Gtsotr_SPEC;
10768impl crate::sealed::RegSpec for Gtsotr_SPEC {
10769    type DataType = u32;
10770}
10771
10772#[doc = "General PWM Timer Output Protection Function Temporary Release Register"]
10773pub type Gtsotr = crate::RegValueT<Gtsotr_SPEC>;
10774
10775impl Gtsotr {
10776    #[doc = "Output Protection Function Temporary Release"]
10777    #[inline(always)]
10778    pub fn sotr(
10779        self,
10780    ) -> crate::common::RegisterField<
10781        0,
10782        0x1,
10783        1,
10784        0,
10785        gtsotr::Sotr,
10786        gtsotr::Sotr,
10787        Gtsotr_SPEC,
10788        crate::common::RW,
10789    > {
10790        crate::common::RegisterField::<
10791            0,
10792            0x1,
10793            1,
10794            0,
10795            gtsotr::Sotr,
10796            gtsotr::Sotr,
10797            Gtsotr_SPEC,
10798            crate::common::RW,
10799        >::from_register(self, 0)
10800    }
10801}
10802impl ::core::default::Default for Gtsotr {
10803    #[inline(always)]
10804    fn default() -> Gtsotr {
10805        <crate::RegValueT<Gtsotr_SPEC> as RegisterValue<_>>::new(0)
10806    }
10807}
10808pub mod gtsotr {
10809
10810    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10811    pub struct Sotr_SPEC;
10812    pub type Sotr = crate::EnumBitfieldStruct<u8, Sotr_SPEC>;
10813    impl Sotr {
10814        #[doc = "Protected state is not released"]
10815        pub const _0: Self = Self::new(0);
10816
10817        #[doc = "Protected state is released"]
10818        pub const _1: Self = Self::new(1);
10819    }
10820}
10821#[doc(hidden)]
10822#[derive(Copy, Clone, Eq, PartialEq)]
10823pub struct Gtadsmr_SPEC;
10824impl crate::sealed::RegSpec for Gtadsmr_SPEC {
10825    type DataType = u32;
10826}
10827
10828#[doc = "General PWM Timer A/D Conversion Start Request Signal Monitoring Register"]
10829pub type Gtadsmr = crate::RegValueT<Gtadsmr_SPEC>;
10830
10831impl Gtadsmr {
10832    #[doc = "A/D Conversion Start Request Signal Monitor 0 Selection"]
10833    #[inline(always)]
10834    pub fn adsms0(
10835        self,
10836    ) -> crate::common::RegisterField<
10837        0,
10838        0x3,
10839        1,
10840        0,
10841        gtadsmr::Adsms0,
10842        gtadsmr::Adsms0,
10843        Gtadsmr_SPEC,
10844        crate::common::RW,
10845    > {
10846        crate::common::RegisterField::<
10847            0,
10848            0x3,
10849            1,
10850            0,
10851            gtadsmr::Adsms0,
10852            gtadsmr::Adsms0,
10853            Gtadsmr_SPEC,
10854            crate::common::RW,
10855        >::from_register(self, 0)
10856    }
10857
10858    #[doc = "A/D Conversion Start Request Signal Monitor 0 Output Enabling"]
10859    #[inline(always)]
10860    pub fn adsmen0(
10861        self,
10862    ) -> crate::common::RegisterField<
10863        8,
10864        0x1,
10865        1,
10866        0,
10867        gtadsmr::Adsmen0,
10868        gtadsmr::Adsmen0,
10869        Gtadsmr_SPEC,
10870        crate::common::RW,
10871    > {
10872        crate::common::RegisterField::<
10873            8,
10874            0x1,
10875            1,
10876            0,
10877            gtadsmr::Adsmen0,
10878            gtadsmr::Adsmen0,
10879            Gtadsmr_SPEC,
10880            crate::common::RW,
10881        >::from_register(self, 0)
10882    }
10883
10884    #[doc = "A/D Conversion Start Request Signal Monitor 1 Selection"]
10885    #[inline(always)]
10886    pub fn adsms1(
10887        self,
10888    ) -> crate::common::RegisterField<
10889        16,
10890        0x3,
10891        1,
10892        0,
10893        gtadsmr::Adsms1,
10894        gtadsmr::Adsms1,
10895        Gtadsmr_SPEC,
10896        crate::common::RW,
10897    > {
10898        crate::common::RegisterField::<
10899            16,
10900            0x3,
10901            1,
10902            0,
10903            gtadsmr::Adsms1,
10904            gtadsmr::Adsms1,
10905            Gtadsmr_SPEC,
10906            crate::common::RW,
10907        >::from_register(self, 0)
10908    }
10909
10910    #[doc = "A/D Conversion Start Request Signal Monitor 1 Output Enabling"]
10911    #[inline(always)]
10912    pub fn adsmen1(
10913        self,
10914    ) -> crate::common::RegisterField<
10915        24,
10916        0x1,
10917        1,
10918        0,
10919        gtadsmr::Adsmen1,
10920        gtadsmr::Adsmen1,
10921        Gtadsmr_SPEC,
10922        crate::common::RW,
10923    > {
10924        crate::common::RegisterField::<
10925            24,
10926            0x1,
10927            1,
10928            0,
10929            gtadsmr::Adsmen1,
10930            gtadsmr::Adsmen1,
10931            Gtadsmr_SPEC,
10932            crate::common::RW,
10933        >::from_register(self, 0)
10934    }
10935}
10936impl ::core::default::Default for Gtadsmr {
10937    #[inline(always)]
10938    fn default() -> Gtadsmr {
10939        <crate::RegValueT<Gtadsmr_SPEC> as RegisterValue<_>>::new(0)
10940    }
10941}
10942pub mod gtadsmr {
10943
10944    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10945    pub struct Adsms0_SPEC;
10946    pub type Adsms0 = crate::EnumBitfieldStruct<u8, Adsms0_SPEC>;
10947    impl Adsms0 {
10948        #[doc = "A/D conversion start request signal generated by the GTADTRA register during up-counting"]
10949        pub const _00: Self = Self::new(0);
10950
10951        #[doc = "A/D conversion start request signal generated by the GTADTRA register during down-counting"]
10952        pub const _01: Self = Self::new(1);
10953
10954        #[doc = "A/D conversion start request signal generated by the GTADTRB register during up-counting"]
10955        pub const _10: Self = Self::new(2);
10956
10957        #[doc = "A/D conversion start request signal generated by the GTADTRB register during down-counting"]
10958        pub const _11: Self = Self::new(3);
10959    }
10960    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10961    pub struct Adsmen0_SPEC;
10962    pub type Adsmen0 = crate::EnumBitfieldStruct<u8, Adsmen0_SPEC>;
10963    impl Adsmen0 {
10964        #[doc = "Output of A/D conversion start request signal monitor 0 is disabled"]
10965        pub const _0: Self = Self::new(0);
10966
10967        #[doc = "Output of A/D conversion start request signal monitor 0 is enabled"]
10968        pub const _1: Self = Self::new(1);
10969    }
10970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10971    pub struct Adsms1_SPEC;
10972    pub type Adsms1 = crate::EnumBitfieldStruct<u8, Adsms1_SPEC>;
10973    impl Adsms1 {
10974        #[doc = "A/D conversion start request signal generated by the GTADTRA register during up-counting"]
10975        pub const _00: Self = Self::new(0);
10976
10977        #[doc = "A/D conversion start request signal generated by the GTADTRA register during down-counting"]
10978        pub const _01: Self = Self::new(1);
10979
10980        #[doc = "A/D conversion start request signal generated by the GTADTRB register during up-counting"]
10981        pub const _10: Self = Self::new(2);
10982
10983        #[doc = "A/D conversion start request signal generated by the GTADTRB register during down-counting"]
10984        pub const _11: Self = Self::new(3);
10985    }
10986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10987    pub struct Adsmen1_SPEC;
10988    pub type Adsmen1 = crate::EnumBitfieldStruct<u8, Adsmen1_SPEC>;
10989    impl Adsmen1 {
10990        #[doc = "Output of A/D conversion start request signal monitor 1 is disabled"]
10991        pub const _0: Self = Self::new(0);
10992
10993        #[doc = "Output of A/D conversion start request signal monitor 1 is enabled"]
10994        pub const _1: Self = Self::new(1);
10995    }
10996}
10997#[doc(hidden)]
10998#[derive(Copy, Clone, Eq, PartialEq)]
10999pub struct Gticlf_SPEC;
11000impl crate::sealed::RegSpec for Gticlf_SPEC {
11001    type DataType = u32;
11002}
11003
11004#[doc = "General PWM Timer Inter Channel Logical Operation Function Setting Register"]
11005pub type Gticlf = crate::RegValueT<Gticlf_SPEC>;
11006
11007impl Gticlf {
11008    #[doc = "GTIOCnA Output Logical Operation Function Select"]
11009    #[inline(always)]
11010    pub fn iclfa(
11011        self,
11012    ) -> crate::common::RegisterField<
11013        0,
11014        0x7,
11015        1,
11016        0,
11017        gticlf::Iclfa,
11018        gticlf::Iclfa,
11019        Gticlf_SPEC,
11020        crate::common::RW,
11021    > {
11022        crate::common::RegisterField::<
11023            0,
11024            0x7,
11025            1,
11026            0,
11027            gticlf::Iclfa,
11028            gticlf::Iclfa,
11029            Gticlf_SPEC,
11030            crate::common::RW,
11031        >::from_register(self, 0)
11032    }
11033
11034    #[doc = "Inter Channel Signal C Select"]
11035    #[inline(always)]
11036    pub fn iclfselc(
11037        self,
11038    ) -> crate::common::RegisterField<
11039        4,
11040        0x3f,
11041        1,
11042        0,
11043        gticlf::Iclfselc,
11044        gticlf::Iclfselc,
11045        Gticlf_SPEC,
11046        crate::common::RW,
11047    > {
11048        crate::common::RegisterField::<
11049            4,
11050            0x3f,
11051            1,
11052            0,
11053            gticlf::Iclfselc,
11054            gticlf::Iclfselc,
11055            Gticlf_SPEC,
11056            crate::common::RW,
11057        >::from_register(self, 0)
11058    }
11059
11060    #[doc = "GTIOCnB Output Logical Operation Function Select"]
11061    #[inline(always)]
11062    pub fn iclfb(
11063        self,
11064    ) -> crate::common::RegisterField<
11065        16,
11066        0x7,
11067        1,
11068        0,
11069        gticlf::Iclfb,
11070        gticlf::Iclfb,
11071        Gticlf_SPEC,
11072        crate::common::RW,
11073    > {
11074        crate::common::RegisterField::<
11075            16,
11076            0x7,
11077            1,
11078            0,
11079            gticlf::Iclfb,
11080            gticlf::Iclfb,
11081            Gticlf_SPEC,
11082            crate::common::RW,
11083        >::from_register(self, 0)
11084    }
11085
11086    #[doc = "Inter Channel Signal D Select"]
11087    #[inline(always)]
11088    pub fn iclfseld(
11089        self,
11090    ) -> crate::common::RegisterField<
11091        20,
11092        0x3f,
11093        1,
11094        0,
11095        gticlf::Iclfseld,
11096        gticlf::Iclfseld,
11097        Gticlf_SPEC,
11098        crate::common::RW,
11099    > {
11100        crate::common::RegisterField::<
11101            20,
11102            0x3f,
11103            1,
11104            0,
11105            gticlf::Iclfseld,
11106            gticlf::Iclfseld,
11107            Gticlf_SPEC,
11108            crate::common::RW,
11109        >::from_register(self, 0)
11110    }
11111}
11112impl ::core::default::Default for Gticlf {
11113    #[inline(always)]
11114    fn default() -> Gticlf {
11115        <crate::RegValueT<Gticlf_SPEC> as RegisterValue<_>>::new(0)
11116    }
11117}
11118pub mod gticlf {
11119
11120    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11121    pub struct Iclfa_SPEC;
11122    pub type Iclfa = crate::EnumBitfieldStruct<u8, Iclfa_SPEC>;
11123    impl Iclfa {
11124        #[doc = "A (no delay)"]
11125        pub const _000: Self = Self::new(0);
11126
11127        #[doc = "NOT A (no delay)"]
11128        pub const _001: Self = Self::new(1);
11129
11130        #[doc = "C (1PCLKD delay)"]
11131        pub const _010: Self = Self::new(2);
11132
11133        #[doc = "NOT C (1PCLKD delay)"]
11134        pub const _011: Self = Self::new(3);
11135
11136        #[doc = "A AND C (1PCLKD delay)"]
11137        pub const _100: Self = Self::new(4);
11138
11139        #[doc = "A OR C (1PCLKD delay)"]
11140        pub const _101: Self = Self::new(5);
11141
11142        #[doc = "A EXOR C (1PCLKD delay)"]
11143        pub const _110: Self = Self::new(6);
11144
11145        #[doc = "A NOR C (1PCLKD delay)"]
11146        pub const _111: Self = Self::new(7);
11147    }
11148    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11149    pub struct Iclfselc_SPEC;
11150    pub type Iclfselc = crate::EnumBitfieldStruct<u8, Iclfselc_SPEC>;
11151    impl Iclfselc {
11152        #[doc = "GTIOC0A"]
11153        pub const _0_X_00: Self = Self::new(0);
11154
11155        #[doc = "GTIOC0B"]
11156        pub const _0_X_01: Self = Self::new(1);
11157
11158        #[doc = "GTIOC1A"]
11159        pub const _0_X_02: Self = Self::new(2);
11160
11161        #[doc = "GTIOC1B"]
11162        pub const _0_X_03: Self = Self::new(3);
11163
11164        #[doc = "GTIOC4A"]
11165        pub const _0_X_08: Self = Self::new(8);
11166
11167        #[doc = "GTIOC4B"]
11168        pub const _0_X_09: Self = Self::new(9);
11169
11170        #[doc = "GTIOC5A"]
11171        pub const _0_X_0_A: Self = Self::new(10);
11172
11173        #[doc = "GTIOC5B"]
11174        pub const _0_X_0_B: Self = Self::new(11);
11175
11176        #[doc = "Setting prohibited"]
11177        pub const OTHERS: Self = Self::new(0);
11178    }
11179    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11180    pub struct Iclfb_SPEC;
11181    pub type Iclfb = crate::EnumBitfieldStruct<u8, Iclfb_SPEC>;
11182    impl Iclfb {
11183        #[doc = "B (no delay)"]
11184        pub const _000: Self = Self::new(0);
11185
11186        #[doc = "NOT B (no delay)"]
11187        pub const _001: Self = Self::new(1);
11188
11189        #[doc = "D (1PCLKD delay)"]
11190        pub const _010: Self = Self::new(2);
11191
11192        #[doc = "NOT D (1PCLKD delay)"]
11193        pub const _011: Self = Self::new(3);
11194
11195        #[doc = "B AND D (1PCLKD delay)"]
11196        pub const _100: Self = Self::new(4);
11197
11198        #[doc = "B OR D (1PCLKD delay)"]
11199        pub const _101: Self = Self::new(5);
11200
11201        #[doc = "B EXOR D (1PCLKD delay)"]
11202        pub const _110: Self = Self::new(6);
11203
11204        #[doc = "B NOR D (1PCLKD delay)"]
11205        pub const _111: Self = Self::new(7);
11206    }
11207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11208    pub struct Iclfseld_SPEC;
11209    pub type Iclfseld = crate::EnumBitfieldStruct<u8, Iclfseld_SPEC>;
11210    impl Iclfseld {
11211        #[doc = "GTIOC0A"]
11212        pub const _0_X_00: Self = Self::new(0);
11213
11214        #[doc = "GTIOC0B"]
11215        pub const _0_X_01: Self = Self::new(1);
11216
11217        #[doc = "GTIOC1A"]
11218        pub const _0_X_02: Self = Self::new(2);
11219
11220        #[doc = "GTIOC1B"]
11221        pub const _0_X_03: Self = Self::new(3);
11222
11223        #[doc = "GTIOC4A"]
11224        pub const _0_X_08: Self = Self::new(8);
11225
11226        #[doc = "GTIOC4B"]
11227        pub const _0_X_09: Self = Self::new(9);
11228
11229        #[doc = "GTIOC5A"]
11230        pub const _0_X_0_A: Self = Self::new(10);
11231
11232        #[doc = "GTIOC5B"]
11233        pub const _0_X_0_B: Self = Self::new(11);
11234
11235        #[doc = "Setting prohibited"]
11236        pub const OTHERS: Self = Self::new(0);
11237    }
11238}
11239#[doc(hidden)]
11240#[derive(Copy, Clone, Eq, PartialEq)]
11241pub struct Gtpc_SPEC;
11242impl crate::sealed::RegSpec for Gtpc_SPEC {
11243    type DataType = u32;
11244}
11245
11246#[doc = "General PWM Timer Period Count Register"]
11247pub type Gtpc = crate::RegValueT<Gtpc_SPEC>;
11248
11249impl Gtpc {
11250    #[doc = "Period Count Function Enable"]
11251    #[inline(always)]
11252    pub fn pcen(
11253        self,
11254    ) -> crate::common::RegisterField<
11255        0,
11256        0x1,
11257        1,
11258        0,
11259        gtpc::Pcen,
11260        gtpc::Pcen,
11261        Gtpc_SPEC,
11262        crate::common::RW,
11263    > {
11264        crate::common::RegisterField::<
11265            0,
11266            0x1,
11267            1,
11268            0,
11269            gtpc::Pcen,
11270            gtpc::Pcen,
11271            Gtpc_SPEC,
11272            crate::common::RW,
11273        >::from_register(self, 0)
11274    }
11275
11276    #[doc = "Automatic Stop Function Enable"]
11277    #[inline(always)]
11278    pub fn astp(
11279        self,
11280    ) -> crate::common::RegisterField<
11281        8,
11282        0x1,
11283        1,
11284        0,
11285        gtpc::Astp,
11286        gtpc::Astp,
11287        Gtpc_SPEC,
11288        crate::common::RW,
11289    > {
11290        crate::common::RegisterField::<
11291            8,
11292            0x1,
11293            1,
11294            0,
11295            gtpc::Astp,
11296            gtpc::Astp,
11297            Gtpc_SPEC,
11298            crate::common::RW,
11299        >::from_register(self, 0)
11300    }
11301
11302    #[doc = "Period Counter"]
11303    #[inline(always)]
11304    pub fn pcnt(
11305        self,
11306    ) -> crate::common::RegisterField<16, 0xfff, 1, 0, u16, u16, Gtpc_SPEC, crate::common::RW> {
11307        crate::common::RegisterField::<16,0xfff,1,0,u16,u16,Gtpc_SPEC,crate::common::RW>::from_register(self,0)
11308    }
11309}
11310impl ::core::default::Default for Gtpc {
11311    #[inline(always)]
11312    fn default() -> Gtpc {
11313        <crate::RegValueT<Gtpc_SPEC> as RegisterValue<_>>::new(0)
11314    }
11315}
11316pub mod gtpc {
11317
11318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11319    pub struct Pcen_SPEC;
11320    pub type Pcen = crate::EnumBitfieldStruct<u8, Pcen_SPEC>;
11321    impl Pcen {
11322        #[doc = "Period count function is disabled"]
11323        pub const _0: Self = Self::new(0);
11324
11325        #[doc = "Period count function is enabled"]
11326        pub const _1: Self = Self::new(1);
11327    }
11328    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11329    pub struct Astp_SPEC;
11330    pub type Astp = crate::EnumBitfieldStruct<u8, Astp_SPEC>;
11331    impl Astp {
11332        #[doc = "Automatic stop function is disabled"]
11333        pub const _0: Self = Self::new(0);
11334
11335        #[doc = "Automatic stop function is enabled"]
11336        pub const _1: Self = Self::new(1);
11337    }
11338}
11339#[doc(hidden)]
11340#[derive(Copy, Clone, Eq, PartialEq)]
11341pub struct Gtsecsr_SPEC;
11342impl crate::sealed::RegSpec for Gtsecsr_SPEC {
11343    type DataType = u32;
11344}
11345
11346#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register"]
11347pub type Gtsecsr = crate::RegValueT<Gtsecsr_SPEC>;
11348
11349impl Gtsecsr {
11350    #[doc = "Channel 0 Operation Enable Bit Simultaneous Control Channel Select"]
11351    #[inline(always)]
11352    pub fn secsel0(
11353        self,
11354    ) -> crate::common::RegisterField<
11355        0,
11356        0x1,
11357        1,
11358        0,
11359        gtsecsr::Secsel0,
11360        gtsecsr::Secsel0,
11361        Gtsecsr_SPEC,
11362        crate::common::RW,
11363    > {
11364        crate::common::RegisterField::<
11365            0,
11366            0x1,
11367            1,
11368            0,
11369            gtsecsr::Secsel0,
11370            gtsecsr::Secsel0,
11371            Gtsecsr_SPEC,
11372            crate::common::RW,
11373        >::from_register(self, 0)
11374    }
11375
11376    #[doc = "Channel 1 Operation Enable Bit Simultaneous Control Channel Select"]
11377    #[inline(always)]
11378    pub fn secsel1(
11379        self,
11380    ) -> crate::common::RegisterField<
11381        1,
11382        0x1,
11383        1,
11384        0,
11385        gtsecsr::Secsel1,
11386        gtsecsr::Secsel1,
11387        Gtsecsr_SPEC,
11388        crate::common::RW,
11389    > {
11390        crate::common::RegisterField::<
11391            1,
11392            0x1,
11393            1,
11394            0,
11395            gtsecsr::Secsel1,
11396            gtsecsr::Secsel1,
11397            Gtsecsr_SPEC,
11398            crate::common::RW,
11399        >::from_register(self, 0)
11400    }
11401
11402    #[doc = "Channel 4 Operation Enable Bit Simultaneous Control Channel Select"]
11403    #[inline(always)]
11404    pub fn secsel4(
11405        self,
11406    ) -> crate::common::RegisterField<
11407        4,
11408        0x1,
11409        1,
11410        0,
11411        gtsecsr::Secsel4,
11412        gtsecsr::Secsel4,
11413        Gtsecsr_SPEC,
11414        crate::common::RW,
11415    > {
11416        crate::common::RegisterField::<
11417            4,
11418            0x1,
11419            1,
11420            0,
11421            gtsecsr::Secsel4,
11422            gtsecsr::Secsel4,
11423            Gtsecsr_SPEC,
11424            crate::common::RW,
11425        >::from_register(self, 0)
11426    }
11427
11428    #[doc = "Channel 5 Operation Enable Bit Simultaneous Control Channel Select"]
11429    #[inline(always)]
11430    pub fn secsel5(
11431        self,
11432    ) -> crate::common::RegisterField<
11433        5,
11434        0x1,
11435        1,
11436        0,
11437        gtsecsr::Secsel5,
11438        gtsecsr::Secsel5,
11439        Gtsecsr_SPEC,
11440        crate::common::RW,
11441    > {
11442        crate::common::RegisterField::<
11443            5,
11444            0x1,
11445            1,
11446            0,
11447            gtsecsr::Secsel5,
11448            gtsecsr::Secsel5,
11449            Gtsecsr_SPEC,
11450            crate::common::RW,
11451        >::from_register(self, 0)
11452    }
11453}
11454impl ::core::default::Default for Gtsecsr {
11455    #[inline(always)]
11456    fn default() -> Gtsecsr {
11457        <crate::RegValueT<Gtsecsr_SPEC> as RegisterValue<_>>::new(0)
11458    }
11459}
11460pub mod gtsecsr {
11461
11462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11463    pub struct Secsel0_SPEC;
11464    pub type Secsel0 = crate::EnumBitfieldStruct<u8, Secsel0_SPEC>;
11465    impl Secsel0 {
11466        #[doc = "Disable simultaneous control"]
11467        pub const _0: Self = Self::new(0);
11468
11469        #[doc = "Enable simultaneous control"]
11470        pub const _1: Self = Self::new(1);
11471    }
11472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11473    pub struct Secsel1_SPEC;
11474    pub type Secsel1 = crate::EnumBitfieldStruct<u8, Secsel1_SPEC>;
11475    impl Secsel1 {
11476        #[doc = "Disable simultaneous control"]
11477        pub const _0: Self = Self::new(0);
11478
11479        #[doc = "Enable simultaneous control"]
11480        pub const _1: Self = Self::new(1);
11481    }
11482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11483    pub struct Secsel4_SPEC;
11484    pub type Secsel4 = crate::EnumBitfieldStruct<u8, Secsel4_SPEC>;
11485    impl Secsel4 {
11486        #[doc = "Disable simultaneous control"]
11487        pub const _0: Self = Self::new(0);
11488
11489        #[doc = "Enable simultaneous control"]
11490        pub const _1: Self = Self::new(1);
11491    }
11492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11493    pub struct Secsel5_SPEC;
11494    pub type Secsel5 = crate::EnumBitfieldStruct<u8, Secsel5_SPEC>;
11495    impl Secsel5 {
11496        #[doc = "Disable simultaneous control"]
11497        pub const _0: Self = Self::new(0);
11498
11499        #[doc = "Enable simultaneous control"]
11500        pub const _1: Self = Self::new(1);
11501    }
11502}
11503#[doc(hidden)]
11504#[derive(Copy, Clone, Eq, PartialEq)]
11505pub struct Gtsecr_SPEC;
11506impl crate::sealed::RegSpec for Gtsecr_SPEC {
11507    type DataType = u32;
11508}
11509
11510#[doc = "General PWM Timer Operation Enable Bit Simultaneous Control Register"]
11511pub type Gtsecr = crate::RegValueT<Gtsecr_SPEC>;
11512
11513impl Gtsecr {
11514    #[doc = "GTCCR Register Buffer Operation Simultaneous Enable"]
11515    #[inline(always)]
11516    pub fn sbdce(
11517        self,
11518    ) -> crate::common::RegisterField<
11519        0,
11520        0x1,
11521        1,
11522        0,
11523        gtsecr::Sbdce,
11524        gtsecr::Sbdce,
11525        Gtsecr_SPEC,
11526        crate::common::RW,
11527    > {
11528        crate::common::RegisterField::<
11529            0,
11530            0x1,
11531            1,
11532            0,
11533            gtsecr::Sbdce,
11534            gtsecr::Sbdce,
11535            Gtsecr_SPEC,
11536            crate::common::RW,
11537        >::from_register(self, 0)
11538    }
11539
11540    #[doc = "GTPR Register Buffer Operation Simultaneous Enable"]
11541    #[inline(always)]
11542    pub fn sbdpe(
11543        self,
11544    ) -> crate::common::RegisterField<
11545        1,
11546        0x1,
11547        1,
11548        0,
11549        gtsecr::Sbdpe,
11550        gtsecr::Sbdpe,
11551        Gtsecr_SPEC,
11552        crate::common::RW,
11553    > {
11554        crate::common::RegisterField::<
11555            1,
11556            0x1,
11557            1,
11558            0,
11559            gtsecr::Sbdpe,
11560            gtsecr::Sbdpe,
11561            Gtsecr_SPEC,
11562            crate::common::RW,
11563        >::from_register(self, 0)
11564    }
11565
11566    #[doc = "GTADTR Register Buffer Operation Simultaneous Enable"]
11567    #[inline(always)]
11568    pub fn sbdae(
11569        self,
11570    ) -> crate::common::RegisterField<
11571        2,
11572        0x1,
11573        1,
11574        0,
11575        gtsecr::Sbdae,
11576        gtsecr::Sbdae,
11577        Gtsecr_SPEC,
11578        crate::common::RW,
11579    > {
11580        crate::common::RegisterField::<
11581            2,
11582            0x1,
11583            1,
11584            0,
11585            gtsecr::Sbdae,
11586            gtsecr::Sbdae,
11587            Gtsecr_SPEC,
11588            crate::common::RW,
11589        >::from_register(self, 0)
11590    }
11591
11592    #[doc = "GTDV Register Buffer Operation Simultaneous Enable"]
11593    #[inline(always)]
11594    pub fn sbdde(
11595        self,
11596    ) -> crate::common::RegisterField<
11597        3,
11598        0x1,
11599        1,
11600        0,
11601        gtsecr::Sbdde,
11602        gtsecr::Sbdde,
11603        Gtsecr_SPEC,
11604        crate::common::RW,
11605    > {
11606        crate::common::RegisterField::<
11607            3,
11608            0x1,
11609            1,
11610            0,
11611            gtsecr::Sbdde,
11612            gtsecr::Sbdde,
11613            Gtsecr_SPEC,
11614            crate::common::RW,
11615        >::from_register(self, 0)
11616    }
11617
11618    #[doc = "GTCCR Register Buffer Operation Simultaneous Disable"]
11619    #[inline(always)]
11620    pub fn sbdcd(
11621        self,
11622    ) -> crate::common::RegisterField<
11623        8,
11624        0x1,
11625        1,
11626        0,
11627        gtsecr::Sbdcd,
11628        gtsecr::Sbdcd,
11629        Gtsecr_SPEC,
11630        crate::common::RW,
11631    > {
11632        crate::common::RegisterField::<
11633            8,
11634            0x1,
11635            1,
11636            0,
11637            gtsecr::Sbdcd,
11638            gtsecr::Sbdcd,
11639            Gtsecr_SPEC,
11640            crate::common::RW,
11641        >::from_register(self, 0)
11642    }
11643
11644    #[doc = "GTPR Register Buffer Operation Simultaneous Disable"]
11645    #[inline(always)]
11646    pub fn sbdpd(
11647        self,
11648    ) -> crate::common::RegisterField<
11649        9,
11650        0x1,
11651        1,
11652        0,
11653        gtsecr::Sbdpd,
11654        gtsecr::Sbdpd,
11655        Gtsecr_SPEC,
11656        crate::common::RW,
11657    > {
11658        crate::common::RegisterField::<
11659            9,
11660            0x1,
11661            1,
11662            0,
11663            gtsecr::Sbdpd,
11664            gtsecr::Sbdpd,
11665            Gtsecr_SPEC,
11666            crate::common::RW,
11667        >::from_register(self, 0)
11668    }
11669
11670    #[doc = "GTADTR Register Buffer Operation Simultaneous Disable"]
11671    #[inline(always)]
11672    pub fn sbdad(
11673        self,
11674    ) -> crate::common::RegisterField<
11675        10,
11676        0x1,
11677        1,
11678        0,
11679        gtsecr::Sbdad,
11680        gtsecr::Sbdad,
11681        Gtsecr_SPEC,
11682        crate::common::RW,
11683    > {
11684        crate::common::RegisterField::<
11685            10,
11686            0x1,
11687            1,
11688            0,
11689            gtsecr::Sbdad,
11690            gtsecr::Sbdad,
11691            Gtsecr_SPEC,
11692            crate::common::RW,
11693        >::from_register(self, 0)
11694    }
11695
11696    #[doc = "GTDV Register Buffer Operation Simultaneous Disable"]
11697    #[inline(always)]
11698    pub fn sbddd(
11699        self,
11700    ) -> crate::common::RegisterField<
11701        11,
11702        0x1,
11703        1,
11704        0,
11705        gtsecr::Sbddd,
11706        gtsecr::Sbddd,
11707        Gtsecr_SPEC,
11708        crate::common::RW,
11709    > {
11710        crate::common::RegisterField::<
11711            11,
11712            0x1,
11713            1,
11714            0,
11715            gtsecr::Sbddd,
11716            gtsecr::Sbddd,
11717            Gtsecr_SPEC,
11718            crate::common::RW,
11719        >::from_register(self, 0)
11720    }
11721
11722    #[doc = "Period Count Function Simultaneous Enable"]
11723    #[inline(always)]
11724    pub fn spce(
11725        self,
11726    ) -> crate::common::RegisterField<
11727        16,
11728        0x1,
11729        1,
11730        0,
11731        gtsecr::Spce,
11732        gtsecr::Spce,
11733        Gtsecr_SPEC,
11734        crate::common::RW,
11735    > {
11736        crate::common::RegisterField::<
11737            16,
11738            0x1,
11739            1,
11740            0,
11741            gtsecr::Spce,
11742            gtsecr::Spce,
11743            Gtsecr_SPEC,
11744            crate::common::RW,
11745        >::from_register(self, 0)
11746    }
11747
11748    #[doc = "Period Count Function Simultaneous Disable"]
11749    #[inline(always)]
11750    pub fn spcd(
11751        self,
11752    ) -> crate::common::RegisterField<
11753        24,
11754        0x1,
11755        1,
11756        0,
11757        gtsecr::Spcd,
11758        gtsecr::Spcd,
11759        Gtsecr_SPEC,
11760        crate::common::RW,
11761    > {
11762        crate::common::RegisterField::<
11763            24,
11764            0x1,
11765            1,
11766            0,
11767            gtsecr::Spcd,
11768            gtsecr::Spcd,
11769            Gtsecr_SPEC,
11770            crate::common::RW,
11771        >::from_register(self, 0)
11772    }
11773}
11774impl ::core::default::Default for Gtsecr {
11775    #[inline(always)]
11776    fn default() -> Gtsecr {
11777        <crate::RegValueT<Gtsecr_SPEC> as RegisterValue<_>>::new(0)
11778    }
11779}
11780pub mod gtsecr {
11781
11782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11783    pub struct Sbdce_SPEC;
11784    pub type Sbdce = crate::EnumBitfieldStruct<u8, Sbdce_SPEC>;
11785    impl Sbdce {
11786        #[doc = "Disable simultaneous enabling GTCCR buffer operations"]
11787        pub const _0: Self = Self::new(0);
11788
11789        #[doc = "Enable GTCCR register buffer operations simultaneously"]
11790        pub const _1: Self = Self::new(1);
11791    }
11792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11793    pub struct Sbdpe_SPEC;
11794    pub type Sbdpe = crate::EnumBitfieldStruct<u8, Sbdpe_SPEC>;
11795    impl Sbdpe {
11796        #[doc = "Disable simultaneous enabling GTPR buffer operations"]
11797        pub const _0: Self = Self::new(0);
11798
11799        #[doc = "Enable GTPR register buffer operations simultaneously"]
11800        pub const _1: Self = Self::new(1);
11801    }
11802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11803    pub struct Sbdae_SPEC;
11804    pub type Sbdae = crate::EnumBitfieldStruct<u8, Sbdae_SPEC>;
11805    impl Sbdae {
11806        #[doc = "Disable simultaneous enabling GTADTR buffer operations"]
11807        pub const _0: Self = Self::new(0);
11808
11809        #[doc = "Enable GTADTR register buffer operations simultaneously"]
11810        pub const _1: Self = Self::new(1);
11811    }
11812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11813    pub struct Sbdde_SPEC;
11814    pub type Sbdde = crate::EnumBitfieldStruct<u8, Sbdde_SPEC>;
11815    impl Sbdde {
11816        #[doc = "Disable simultaneous enabling GTDV buffer operations"]
11817        pub const _0: Self = Self::new(0);
11818
11819        #[doc = "Enable GTDV register buffer operations simultaneously"]
11820        pub const _1: Self = Self::new(1);
11821    }
11822    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11823    pub struct Sbdcd_SPEC;
11824    pub type Sbdcd = crate::EnumBitfieldStruct<u8, Sbdcd_SPEC>;
11825    impl Sbdcd {
11826        #[doc = "Disable simultaneous disabling GTCCR buffer operations"]
11827        pub const _0: Self = Self::new(0);
11828
11829        #[doc = "Disable GTCCR register buffer operations simultaneously"]
11830        pub const _1: Self = Self::new(1);
11831    }
11832    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11833    pub struct Sbdpd_SPEC;
11834    pub type Sbdpd = crate::EnumBitfieldStruct<u8, Sbdpd_SPEC>;
11835    impl Sbdpd {
11836        #[doc = "Disable simultaneous disabling GTPR buffer operations"]
11837        pub const _0: Self = Self::new(0);
11838
11839        #[doc = "Disable GTPR register buffer operations simultaneously"]
11840        pub const _1: Self = Self::new(1);
11841    }
11842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11843    pub struct Sbdad_SPEC;
11844    pub type Sbdad = crate::EnumBitfieldStruct<u8, Sbdad_SPEC>;
11845    impl Sbdad {
11846        #[doc = "Disable simultaneous disabling GTADTR buffer operations"]
11847        pub const _0: Self = Self::new(0);
11848
11849        #[doc = "Disable GTADTR register buffer operations simultaneously"]
11850        pub const _1: Self = Self::new(1);
11851    }
11852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11853    pub struct Sbddd_SPEC;
11854    pub type Sbddd = crate::EnumBitfieldStruct<u8, Sbddd_SPEC>;
11855    impl Sbddd {
11856        #[doc = "Disable simultaneous disabling GTDV buffer operations"]
11857        pub const _0: Self = Self::new(0);
11858
11859        #[doc = "Disable GTDV register buffer operations simultaneously"]
11860        pub const _1: Self = Self::new(1);
11861    }
11862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11863    pub struct Spce_SPEC;
11864    pub type Spce = crate::EnumBitfieldStruct<u8, Spce_SPEC>;
11865    impl Spce {
11866        #[doc = "Disable simultaneous enabling period count function"]
11867        pub const _0: Self = Self::new(0);
11868
11869        #[doc = "Enable period count function simultaneously"]
11870        pub const _1: Self = Self::new(1);
11871    }
11872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11873    pub struct Spcd_SPEC;
11874    pub type Spcd = crate::EnumBitfieldStruct<u8, Spcd_SPEC>;
11875    impl Spcd {
11876        #[doc = "Disable simultaneous disabling period count function"]
11877        pub const _0: Self = Self::new(0);
11878
11879        #[doc = "Disable period count function simultaneously"]
11880        pub const _1: Self = Self::new(1);
11881    }
11882}