1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"12-bit D/A converter"]
28unsafe impl ::core::marker::Send for super::Dac12 {}
29unsafe impl ::core::marker::Sync for super::Dac12 {}
30impl super::Dac12 {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "D/A Data Register 0"]
38 #[inline(always)]
39 pub const fn dadr0(&self) -> &'static crate::common::Reg<self::Dadr0_SPEC, crate::common::RW> {
40 unsafe {
41 crate::common::Reg::<self::Dadr0_SPEC, crate::common::RW>::from_ptr(
42 self._svd2pac_as_ptr().add(0usize),
43 )
44 }
45 }
46
47 #[doc = "D/A Control Register"]
48 #[inline(always)]
49 pub const fn dacr(&self) -> &'static crate::common::Reg<self::Dacr_SPEC, crate::common::RW> {
50 unsafe {
51 crate::common::Reg::<self::Dacr_SPEC, crate::common::RW>::from_ptr(
52 self._svd2pac_as_ptr().add(4usize),
53 )
54 }
55 }
56
57 #[doc = "DADR0 Format Select Register"]
58 #[inline(always)]
59 pub const fn dadpr(&self) -> &'static crate::common::Reg<self::Dadpr_SPEC, crate::common::RW> {
60 unsafe {
61 crate::common::Reg::<self::Dadpr_SPEC, crate::common::RW>::from_ptr(
62 self._svd2pac_as_ptr().add(5usize),
63 )
64 }
65 }
66
67 #[doc = "D/A A/D Synchronous Start Control Register"]
68 #[inline(always)]
69 pub const fn daadscr(
70 &self,
71 ) -> &'static crate::common::Reg<self::Daadscr_SPEC, crate::common::RW> {
72 unsafe {
73 crate::common::Reg::<self::Daadscr_SPEC, crate::common::RW>::from_ptr(
74 self._svd2pac_as_ptr().add(6usize),
75 )
76 }
77 }
78
79 #[doc = "D/A Output Amplifier Control Register"]
80 #[inline(always)]
81 pub const fn daampcr(
82 &self,
83 ) -> &'static crate::common::Reg<self::Daampcr_SPEC, crate::common::RW> {
84 unsafe {
85 crate::common::Reg::<self::Daampcr_SPEC, crate::common::RW>::from_ptr(
86 self._svd2pac_as_ptr().add(8usize),
87 )
88 }
89 }
90
91 #[doc = "D/A Amplifier Stabilization Wait Control Register"]
92 #[inline(always)]
93 pub const fn daaswcr(
94 &self,
95 ) -> &'static crate::common::Reg<self::Daaswcr_SPEC, crate::common::RW> {
96 unsafe {
97 crate::common::Reg::<self::Daaswcr_SPEC, crate::common::RW>::from_ptr(
98 self._svd2pac_as_ptr().add(28usize),
99 )
100 }
101 }
102
103 #[doc = "D/A A/D Synchronous Unit Select Register"]
104 #[inline(always)]
105 pub const fn daadusr(
106 &self,
107 ) -> &'static crate::common::Reg<self::Daadusr_SPEC, crate::common::RW> {
108 unsafe {
109 crate::common::Reg::<self::Daadusr_SPEC, crate::common::RW>::from_ptr(
110 self._svd2pac_as_ptr().add(4288usize),
111 )
112 }
113 }
114}
115#[doc(hidden)]
116#[derive(Copy, Clone, Eq, PartialEq)]
117pub struct Dadr0_SPEC;
118impl crate::sealed::RegSpec for Dadr0_SPEC {
119 type DataType = u16;
120}
121
122#[doc = "D/A Data Register 0"]
123pub type Dadr0 = crate::RegValueT<Dadr0_SPEC>;
124
125impl NoBitfieldReg<Dadr0_SPEC> for Dadr0 {}
126impl ::core::default::Default for Dadr0 {
127 #[inline(always)]
128 fn default() -> Dadr0 {
129 <crate::RegValueT<Dadr0_SPEC> as RegisterValue<_>>::new(0)
130 }
131}
132
133#[doc(hidden)]
134#[derive(Copy, Clone, Eq, PartialEq)]
135pub struct Dacr_SPEC;
136impl crate::sealed::RegSpec for Dacr_SPEC {
137 type DataType = u8;
138}
139
140#[doc = "D/A Control Register"]
141pub type Dacr = crate::RegValueT<Dacr_SPEC>;
142
143impl Dacr {
144 #[doc = "D/A Output Enable 0"]
145 #[inline(always)]
146 pub fn daoe0(
147 self,
148 ) -> crate::common::RegisterField<
149 6,
150 0x1,
151 1,
152 0,
153 dacr::Daoe0,
154 dacr::Daoe0,
155 Dacr_SPEC,
156 crate::common::RW,
157 > {
158 crate::common::RegisterField::<
159 6,
160 0x1,
161 1,
162 0,
163 dacr::Daoe0,
164 dacr::Daoe0,
165 Dacr_SPEC,
166 crate::common::RW,
167 >::from_register(self, 0)
168 }
169}
170impl ::core::default::Default for Dacr {
171 #[inline(always)]
172 fn default() -> Dacr {
173 <crate::RegValueT<Dacr_SPEC> as RegisterValue<_>>::new(31)
174 }
175}
176pub mod dacr {
177
178 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
179 pub struct Daoe0_SPEC;
180 pub type Daoe0 = crate::EnumBitfieldStruct<u8, Daoe0_SPEC>;
181 impl Daoe0 {
182 #[doc = "Disable D/A conversion and analog output of channel 0 (DA0)"]
183 pub const _0: Self = Self::new(0);
184
185 #[doc = "Enable D/A conversion and analog output of channel 0 (DA0)"]
186 pub const _1: Self = Self::new(1);
187 }
188}
189#[doc(hidden)]
190#[derive(Copy, Clone, Eq, PartialEq)]
191pub struct Dadpr_SPEC;
192impl crate::sealed::RegSpec for Dadpr_SPEC {
193 type DataType = u8;
194}
195
196#[doc = "DADR0 Format Select Register"]
197pub type Dadpr = crate::RegValueT<Dadpr_SPEC>;
198
199impl Dadpr {
200 #[doc = "DADR0 Format Select"]
201 #[inline(always)]
202 pub fn dpsel(
203 self,
204 ) -> crate::common::RegisterField<
205 7,
206 0x1,
207 1,
208 0,
209 dadpr::Dpsel,
210 dadpr::Dpsel,
211 Dadpr_SPEC,
212 crate::common::RW,
213 > {
214 crate::common::RegisterField::<
215 7,
216 0x1,
217 1,
218 0,
219 dadpr::Dpsel,
220 dadpr::Dpsel,
221 Dadpr_SPEC,
222 crate::common::RW,
223 >::from_register(self, 0)
224 }
225}
226impl ::core::default::Default for Dadpr {
227 #[inline(always)]
228 fn default() -> Dadpr {
229 <crate::RegValueT<Dadpr_SPEC> as RegisterValue<_>>::new(0)
230 }
231}
232pub mod dadpr {
233
234 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
235 pub struct Dpsel_SPEC;
236 pub type Dpsel = crate::EnumBitfieldStruct<u8, Dpsel_SPEC>;
237 impl Dpsel {
238 #[doc = "Right-justified format"]
239 pub const _0: Self = Self::new(0);
240
241 #[doc = "Left-justified format"]
242 pub const _1: Self = Self::new(1);
243 }
244}
245#[doc(hidden)]
246#[derive(Copy, Clone, Eq, PartialEq)]
247pub struct Daadscr_SPEC;
248impl crate::sealed::RegSpec for Daadscr_SPEC {
249 type DataType = u8;
250}
251
252#[doc = "D/A A/D Synchronous Start Control Register"]
253pub type Daadscr = crate::RegValueT<Daadscr_SPEC>;
254
255impl Daadscr {
256 #[doc = "D/A A/D Synchronous Conversion"]
257 #[inline(always)]
258 pub fn daadst(
259 self,
260 ) -> crate::common::RegisterField<
261 7,
262 0x1,
263 1,
264 0,
265 daadscr::Daadst,
266 daadscr::Daadst,
267 Daadscr_SPEC,
268 crate::common::RW,
269 > {
270 crate::common::RegisterField::<
271 7,
272 0x1,
273 1,
274 0,
275 daadscr::Daadst,
276 daadscr::Daadst,
277 Daadscr_SPEC,
278 crate::common::RW,
279 >::from_register(self, 0)
280 }
281}
282impl ::core::default::Default for Daadscr {
283 #[inline(always)]
284 fn default() -> Daadscr {
285 <crate::RegValueT<Daadscr_SPEC> as RegisterValue<_>>::new(0)
286 }
287}
288pub mod daadscr {
289
290 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
291 pub struct Daadst_SPEC;
292 pub type Daadst = crate::EnumBitfieldStruct<u8, Daadst_SPEC>;
293 impl Daadst {
294 #[doc = "Do not synchronize DAC12 with ADC12 operation (disable interference reduction between D/A and A/D conversion)."]
295 pub const _0: Self = Self::new(0);
296
297 #[doc = "Synchronize DAC12 with ADC12 operation (enable interference reduction between D/A and A/D conversion)."]
298 pub const _1: Self = Self::new(1);
299 }
300}
301#[doc(hidden)]
302#[derive(Copy, Clone, Eq, PartialEq)]
303pub struct Daampcr_SPEC;
304impl crate::sealed::RegSpec for Daampcr_SPEC {
305 type DataType = u8;
306}
307
308#[doc = "D/A Output Amplifier Control Register"]
309pub type Daampcr = crate::RegValueT<Daampcr_SPEC>;
310
311impl Daampcr {
312 #[doc = "Amplifier Control 0"]
313 #[inline(always)]
314 pub fn daamp0(
315 self,
316 ) -> crate::common::RegisterField<
317 6,
318 0x1,
319 1,
320 0,
321 daampcr::Daamp0,
322 daampcr::Daamp0,
323 Daampcr_SPEC,
324 crate::common::RW,
325 > {
326 crate::common::RegisterField::<
327 6,
328 0x1,
329 1,
330 0,
331 daampcr::Daamp0,
332 daampcr::Daamp0,
333 Daampcr_SPEC,
334 crate::common::RW,
335 >::from_register(self, 0)
336 }
337}
338impl ::core::default::Default for Daampcr {
339 #[inline(always)]
340 fn default() -> Daampcr {
341 <crate::RegValueT<Daampcr_SPEC> as RegisterValue<_>>::new(0)
342 }
343}
344pub mod daampcr {
345
346 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
347 pub struct Daamp0_SPEC;
348 pub type Daamp0 = crate::EnumBitfieldStruct<u8, Daamp0_SPEC>;
349 impl Daamp0 {
350 #[doc = "Do not use channel 0 output amplifier"]
351 pub const _0: Self = Self::new(0);
352
353 #[doc = "Use channel 0 output amplifier"]
354 pub const _1: Self = Self::new(1);
355 }
356}
357#[doc(hidden)]
358#[derive(Copy, Clone, Eq, PartialEq)]
359pub struct Daaswcr_SPEC;
360impl crate::sealed::RegSpec for Daaswcr_SPEC {
361 type DataType = u8;
362}
363
364#[doc = "D/A Amplifier Stabilization Wait Control Register"]
365pub type Daaswcr = crate::RegValueT<Daaswcr_SPEC>;
366
367impl Daaswcr {
368 #[doc = "D/A Amplifier Stabilization Wait 0"]
369 #[inline(always)]
370 pub fn daasw0(
371 self,
372 ) -> crate::common::RegisterField<
373 6,
374 0x1,
375 1,
376 0,
377 daaswcr::Daasw0,
378 daaswcr::Daasw0,
379 Daaswcr_SPEC,
380 crate::common::RW,
381 > {
382 crate::common::RegisterField::<
383 6,
384 0x1,
385 1,
386 0,
387 daaswcr::Daasw0,
388 daaswcr::Daasw0,
389 Daaswcr_SPEC,
390 crate::common::RW,
391 >::from_register(self, 0)
392 }
393}
394impl ::core::default::Default for Daaswcr {
395 #[inline(always)]
396 fn default() -> Daaswcr {
397 <crate::RegValueT<Daaswcr_SPEC> as RegisterValue<_>>::new(0)
398 }
399}
400pub mod daaswcr {
401
402 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
403 pub struct Daasw0_SPEC;
404 pub type Daasw0 = crate::EnumBitfieldStruct<u8, Daasw0_SPEC>;
405 impl Daasw0 {
406 #[doc = "Amplifier stabilization wait off (output) for channel 0"]
407 pub const _0: Self = Self::new(0);
408
409 #[doc = "Amplifier stabilization wait on (high-Z) for channel 0"]
410 pub const _1: Self = Self::new(1);
411 }
412}
413#[doc(hidden)]
414#[derive(Copy, Clone, Eq, PartialEq)]
415pub struct Daadusr_SPEC;
416impl crate::sealed::RegSpec for Daadusr_SPEC {
417 type DataType = u8;
418}
419
420#[doc = "D/A A/D Synchronous Unit Select Register"]
421pub type Daadusr = crate::RegValueT<Daadusr_SPEC>;
422
423impl Daadusr {
424 #[doc = "A/D Unit 0 Select"]
425 #[inline(always)]
426 pub fn amadsel0(
427 self,
428 ) -> crate::common::RegisterField<
429 0,
430 0x1,
431 1,
432 0,
433 daadusr::Amadsel0,
434 daadusr::Amadsel0,
435 Daadusr_SPEC,
436 crate::common::RW,
437 > {
438 crate::common::RegisterField::<
439 0,
440 0x1,
441 1,
442 0,
443 daadusr::Amadsel0,
444 daadusr::Amadsel0,
445 Daadusr_SPEC,
446 crate::common::RW,
447 >::from_register(self, 0)
448 }
449}
450impl ::core::default::Default for Daadusr {
451 #[inline(always)]
452 fn default() -> Daadusr {
453 <crate::RegValueT<Daadusr_SPEC> as RegisterValue<_>>::new(0)
454 }
455}
456pub mod daadusr {
457
458 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459 pub struct Amadsel0_SPEC;
460 pub type Amadsel0 = crate::EnumBitfieldStruct<u8, Amadsel0_SPEC>;
461 impl Amadsel0 {
462 #[doc = "Do not select unit 0"]
463 pub const _0: Self = Self::new(0);
464
465 #[doc = "Select unit 0"]
466 pub const _1: Self = Self::new(1);
467 }
468}