ra4e2_pac/
ssie0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Sound Interface Enhanced (SSIE)"]
28unsafe impl ::core::marker::Send for super::Ssie0 {}
29unsafe impl ::core::marker::Sync for super::Ssie0 {}
30impl super::Ssie0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "Control Register"]
37    #[inline(always)]
38    pub const fn ssicr(&self) -> &'static crate::common::Reg<self::Ssicr_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Ssicr_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(0usize),
42            )
43        }
44    }
45
46    #[doc = "Status Register"]
47    #[inline(always)]
48    pub const fn ssisr(&self) -> &'static crate::common::Reg<self::Ssisr_SPEC, crate::common::RW> {
49        unsafe {
50            crate::common::Reg::<self::Ssisr_SPEC, crate::common::RW>::from_ptr(
51                self._svd2pac_as_ptr().add(4usize),
52            )
53        }
54    }
55
56    #[doc = "FIFO Control Register"]
57    #[inline(always)]
58    pub const fn ssifcr(
59        &self,
60    ) -> &'static crate::common::Reg<self::Ssifcr_SPEC, crate::common::RW> {
61        unsafe {
62            crate::common::Reg::<self::Ssifcr_SPEC, crate::common::RW>::from_ptr(
63                self._svd2pac_as_ptr().add(16usize),
64            )
65        }
66    }
67
68    #[doc = "FIFO Status Register"]
69    #[inline(always)]
70    pub const fn ssifsr(
71        &self,
72    ) -> &'static crate::common::Reg<self::Ssifsr_SPEC, crate::common::RW> {
73        unsafe {
74            crate::common::Reg::<self::Ssifsr_SPEC, crate::common::RW>::from_ptr(
75                self._svd2pac_as_ptr().add(20usize),
76            )
77        }
78    }
79
80    #[doc = "Transmit FIFO Data Register"]
81    #[inline(always)]
82    pub const fn ssiftdr(
83        &self,
84    ) -> &'static crate::common::Reg<self::Ssiftdr_SPEC, crate::common::W> {
85        unsafe {
86            crate::common::Reg::<self::Ssiftdr_SPEC, crate::common::W>::from_ptr(
87                self._svd2pac_as_ptr().add(24usize),
88            )
89        }
90    }
91
92    #[doc = "Receive FIFO Data Register"]
93    #[inline(always)]
94    pub const fn ssifrdr(
95        &self,
96    ) -> &'static crate::common::Reg<self::Ssifrdr_SPEC, crate::common::R> {
97        unsafe {
98            crate::common::Reg::<self::Ssifrdr_SPEC, crate::common::R>::from_ptr(
99                self._svd2pac_as_ptr().add(28usize),
100            )
101        }
102    }
103
104    #[doc = "Audio Format Register"]
105    #[inline(always)]
106    pub const fn ssiofr(
107        &self,
108    ) -> &'static crate::common::Reg<self::Ssiofr_SPEC, crate::common::RW> {
109        unsafe {
110            crate::common::Reg::<self::Ssiofr_SPEC, crate::common::RW>::from_ptr(
111                self._svd2pac_as_ptr().add(32usize),
112            )
113        }
114    }
115
116    #[doc = "Status Control Register"]
117    #[inline(always)]
118    pub const fn ssiscr(
119        &self,
120    ) -> &'static crate::common::Reg<self::Ssiscr_SPEC, crate::common::RW> {
121        unsafe {
122            crate::common::Reg::<self::Ssiscr_SPEC, crate::common::RW>::from_ptr(
123                self._svd2pac_as_ptr().add(36usize),
124            )
125        }
126    }
127}
128#[doc(hidden)]
129#[derive(Copy, Clone, Eq, PartialEq)]
130pub struct Ssicr_SPEC;
131impl crate::sealed::RegSpec for Ssicr_SPEC {
132    type DataType = u32;
133}
134#[doc = "Control Register"]
135pub type Ssicr = crate::RegValueT<Ssicr_SPEC>;
136
137impl Ssicr {
138    #[doc = "Reception Enable"]
139    #[inline(always)]
140    pub fn ren(
141        self,
142    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ssicr::Ren, Ssicr_SPEC, crate::common::RW> {
143        crate::common::RegisterField::<0,0x1,1,0,ssicr::Ren, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
144    }
145    #[doc = "Transmission Enable"]
146    #[inline(always)]
147    pub fn ten(
148        self,
149    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ssicr::Ten, Ssicr_SPEC, crate::common::RW> {
150        crate::common::RegisterField::<1,0x1,1,0,ssicr::Ten, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
151    }
152    #[doc = "Mute Enable"]
153    #[inline(always)]
154    pub fn muen(
155        self,
156    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ssicr::Muen, Ssicr_SPEC, crate::common::RW>
157    {
158        crate::common::RegisterField::<3,0x1,1,0,ssicr::Muen, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
159    }
160    #[doc = "Selects Bit Clock Division Ratio"]
161    #[inline(always)]
162    pub fn ckdv(
163        self,
164    ) -> crate::common::RegisterField<4, 0xf, 1, 0, ssicr::Ckdv, Ssicr_SPEC, crate::common::RW>
165    {
166        crate::common::RegisterField::<4,0xf,1,0,ssicr::Ckdv, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
167    }
168    #[doc = "Selects Serial Data Delay"]
169    #[inline(always)]
170    pub fn del(
171        self,
172    ) -> crate::common::RegisterField<8, 0x1, 1, 0, ssicr::Del, Ssicr_SPEC, crate::common::RW> {
173        crate::common::RegisterField::<8,0x1,1,0,ssicr::Del, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
174    }
175    #[doc = "Selects Placement Data Alignment"]
176    #[inline(always)]
177    pub fn pdta(
178        self,
179    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ssicr::Pdta, Ssicr_SPEC, crate::common::RW>
180    {
181        crate::common::RegisterField::<9,0x1,1,0,ssicr::Pdta, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
182    }
183    #[doc = "Selects Serial Data Alignment"]
184    #[inline(always)]
185    pub fn sdta(
186        self,
187    ) -> crate::common::RegisterField<10, 0x1, 1, 0, ssicr::Sdta, Ssicr_SPEC, crate::common::RW>
188    {
189        crate::common::RegisterField::<10,0x1,1,0,ssicr::Sdta, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
190    }
191    #[doc = "Selects Serial Padding Polarity"]
192    #[inline(always)]
193    pub fn spdp(
194        self,
195    ) -> crate::common::RegisterField<11, 0x1, 1, 0, ssicr::Spdp, Ssicr_SPEC, crate::common::RW>
196    {
197        crate::common::RegisterField::<11,0x1,1,0,ssicr::Spdp, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
198    }
199    #[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
200    #[inline(always)]
201    pub fn lrckp(
202        self,
203    ) -> crate::common::RegisterField<12, 0x1, 1, 0, ssicr::Lrckp, Ssicr_SPEC, crate::common::RW>
204    {
205        crate::common::RegisterField::<12,0x1,1,0,ssicr::Lrckp, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
206    }
207    #[doc = "Selects Bit Clock Polarity"]
208    #[inline(always)]
209    pub fn bckp(
210        self,
211    ) -> crate::common::RegisterField<13, 0x1, 1, 0, ssicr::Bckp, Ssicr_SPEC, crate::common::RW>
212    {
213        crate::common::RegisterField::<13,0x1,1,0,ssicr::Bckp, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
214    }
215    #[doc = "Master Enable"]
216    #[inline(always)]
217    pub fn mst(
218        self,
219    ) -> crate::common::RegisterField<14, 0x1, 1, 0, ssicr::Mst, Ssicr_SPEC, crate::common::RW>
220    {
221        crate::common::RegisterField::<14,0x1,1,0,ssicr::Mst, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
222    }
223    #[doc = "Selects System Word Length"]
224    #[inline(always)]
225    pub fn swl(
226        self,
227    ) -> crate::common::RegisterField<16, 0x7, 1, 0, ssicr::Swl, Ssicr_SPEC, crate::common::RW>
228    {
229        crate::common::RegisterField::<16,0x7,1,0,ssicr::Swl, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
230    }
231    #[doc = "Selects Data Word Length"]
232    #[inline(always)]
233    pub fn dwl(
234        self,
235    ) -> crate::common::RegisterField<19, 0x7, 1, 0, ssicr::Dwl, Ssicr_SPEC, crate::common::RW>
236    {
237        crate::common::RegisterField::<19,0x7,1,0,ssicr::Dwl, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
238    }
239    #[doc = "Selects Frame Word Number"]
240    #[inline(always)]
241    pub fn frm(
242        self,
243    ) -> crate::common::RegisterField<22, 0x3, 1, 0, u8, Ssicr_SPEC, crate::common::RW> {
244        crate::common::RegisterField::<22,0x3,1,0,u8, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
245    }
246    #[doc = "Idle Mode Interrupt Output Enable"]
247    #[inline(always)]
248    pub fn iien(
249        self,
250    ) -> crate::common::RegisterField<25, 0x1, 1, 0, ssicr::Iien, Ssicr_SPEC, crate::common::RW>
251    {
252        crate::common::RegisterField::<25,0x1,1,0,ssicr::Iien, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
253    }
254    #[doc = "Receive Overflow Interrupt Output Enable"]
255    #[inline(always)]
256    pub fn roien(
257        self,
258    ) -> crate::common::RegisterField<26, 0x1, 1, 0, ssicr::Roien, Ssicr_SPEC, crate::common::RW>
259    {
260        crate::common::RegisterField::<26,0x1,1,0,ssicr::Roien, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
261    }
262    #[doc = "Receive Underflow Interrupt Output Enable"]
263    #[inline(always)]
264    pub fn ruien(
265        self,
266    ) -> crate::common::RegisterField<27, 0x1, 1, 0, ssicr::Ruien, Ssicr_SPEC, crate::common::RW>
267    {
268        crate::common::RegisterField::<27,0x1,1,0,ssicr::Ruien, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
269    }
270    #[doc = "Transmit Overflow Interrupt Output Enable"]
271    #[inline(always)]
272    pub fn toien(
273        self,
274    ) -> crate::common::RegisterField<28, 0x1, 1, 0, ssicr::Toien, Ssicr_SPEC, crate::common::RW>
275    {
276        crate::common::RegisterField::<28,0x1,1,0,ssicr::Toien, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
277    }
278    #[doc = "Transmit Underflow Interrupt Output Enable"]
279    #[inline(always)]
280    pub fn tuien(
281        self,
282    ) -> crate::common::RegisterField<29, 0x1, 1, 0, ssicr::Tuien, Ssicr_SPEC, crate::common::RW>
283    {
284        crate::common::RegisterField::<29,0x1,1,0,ssicr::Tuien, Ssicr_SPEC,crate::common::RW>::from_register(self,0)
285    }
286}
287impl ::core::default::Default for Ssicr {
288    #[inline(always)]
289    fn default() -> Ssicr {
290        <crate::RegValueT<Ssicr_SPEC> as RegisterValue<_>>::new(0)
291    }
292}
293pub mod ssicr {
294
295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
296    pub struct Ren_SPEC;
297    pub type Ren = crate::EnumBitfieldStruct<u8, Ren_SPEC>;
298    impl Ren {
299        #[doc = "Disables reception"]
300        pub const _0: Self = Self::new(0);
301        #[doc = "Enables reception (starts reception)"]
302        pub const _1: Self = Self::new(1);
303    }
304    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
305    pub struct Ten_SPEC;
306    pub type Ten = crate::EnumBitfieldStruct<u8, Ten_SPEC>;
307    impl Ten {
308        #[doc = "Disables transmission"]
309        pub const _0: Self = Self::new(0);
310        #[doc = "Enables transmission (starts transmission)"]
311        pub const _1: Self = Self::new(1);
312    }
313    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
314    pub struct Muen_SPEC;
315    pub type Muen = crate::EnumBitfieldStruct<u8, Muen_SPEC>;
316    impl Muen {
317        #[doc = "Disables muting on the next frame boundary"]
318        pub const _0: Self = Self::new(0);
319        #[doc = "Enables muting on the next frame boundary"]
320        pub const _1: Self = Self::new(1);
321    }
322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
323    pub struct Ckdv_SPEC;
324    pub type Ckdv = crate::EnumBitfieldStruct<u8, Ckdv_SPEC>;
325    impl Ckdv {
326        #[doc = "AUDIO_MCK"]
327        pub const _0_X_0: Self = Self::new(0);
328        #[doc = "AUDIO_MCK/2"]
329        pub const _0_X_1: Self = Self::new(1);
330        #[doc = "AUDIO_MCK/4"]
331        pub const _0_X_2: Self = Self::new(2);
332        #[doc = "AUDIO_MCK/8"]
333        pub const _0_X_3: Self = Self::new(3);
334        #[doc = "AUDIO_MCK/16"]
335        pub const _0_X_4: Self = Self::new(4);
336        #[doc = "AUDIO_MCK/32"]
337        pub const _0_X_5: Self = Self::new(5);
338        #[doc = "AUDIO_MCK/64"]
339        pub const _0_X_6: Self = Self::new(6);
340        #[doc = "AUDIO_MCK/128"]
341        pub const _0_X_7: Self = Self::new(7);
342        #[doc = "AUDIO_MCK/6"]
343        pub const _0_X_8: Self = Self::new(8);
344        #[doc = "AUDIO_MCK/12"]
345        pub const _0_X_9: Self = Self::new(9);
346        #[doc = "AUDIO_MCK/24"]
347        pub const _0_X_A: Self = Self::new(10);
348        #[doc = "AUDIO_MCK/48"]
349        pub const _0_X_B: Self = Self::new(11);
350        #[doc = "AUDIO_MCK/96"]
351        pub const _0_X_C: Self = Self::new(12);
352        #[doc = "Setting prohibited"]
353        pub const OTHERS: Self = Self::new(0);
354    }
355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
356    pub struct Del_SPEC;
357    pub type Del = crate::EnumBitfieldStruct<u8, Del_SPEC>;
358    impl Del {
359        #[doc = "Delay of 1 cycle of SSIBCK0 between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
360        pub const _0: Self = Self::new(0);
361        #[doc = "No delay between SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0"]
362        pub const _1: Self = Self::new(1);
363    }
364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
365    pub struct Pdta_SPEC;
366    pub type Pdta = crate::EnumBitfieldStruct<u8, Pdta_SPEC>;
367    impl Pdta {
368        #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
369        pub const _0: Self = Self::new(0);
370        #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
371        pub const _1: Self = Self::new(1);
372    }
373    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
374    pub struct Sdta_SPEC;
375    pub type Sdta = crate::EnumBitfieldStruct<u8, Sdta_SPEC>;
376    impl Sdta {
377        #[doc = "Transmits and receives serial data first and then padding bits"]
378        pub const _0: Self = Self::new(0);
379        #[doc = "Transmit and receives padding bits first and then serial data"]
380        pub const _1: Self = Self::new(1);
381    }
382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
383    pub struct Spdp_SPEC;
384    pub type Spdp = crate::EnumBitfieldStruct<u8, Spdp_SPEC>;
385    impl Spdp {
386        #[doc = "Padding data is at a low level"]
387        pub const _0: Self = Self::new(0);
388        #[doc = "Padding data is at a high level"]
389        pub const _1: Self = Self::new(1);
390    }
391    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
392    pub struct Lrckp_SPEC;
393    pub type Lrckp = crate::EnumBitfieldStruct<u8, Lrckp_SPEC>;
394    impl Lrckp {
395        #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK0/SSIFS0."]
396        pub const _0: Self = Self::new(0);
397        #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK0/SSIFS0."]
398        pub const _1: Self = Self::new(1);
399    }
400    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
401    pub struct Bckp_SPEC;
402    pub type Bckp = crate::EnumBitfieldStruct<u8, Bckp_SPEC>;
403    impl Bckp {
404        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a falling edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a rising edge of SSIBCK0)."]
405        pub const _0: Self = Self::new(0);
406        #[doc = "SSILRCK0/SSIFS0 and SSITXD0/SSIRXD0/SSIDATA0 change at a rising edge (SSILRCK0/SSIFS0 and SSIRXD0/SSIDATA0 are sampled at a falling edge of SSIBCK0)."]
407        pub const _1: Self = Self::new(1);
408    }
409    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
410    pub struct Mst_SPEC;
411    pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
412    impl Mst {
413        #[doc = "Slave-mode communication"]
414        pub const _0: Self = Self::new(0);
415        #[doc = "Master-mode communication"]
416        pub const _1: Self = Self::new(1);
417    }
418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
419    pub struct Swl_SPEC;
420    pub type Swl = crate::EnumBitfieldStruct<u8, Swl_SPEC>;
421    impl Swl {
422        #[doc = "8 bits"]
423        pub const _000: Self = Self::new(0);
424        #[doc = "16 bits"]
425        pub const _001: Self = Self::new(1);
426        #[doc = "24 bits"]
427        pub const _010: Self = Self::new(2);
428        #[doc = "32 bits"]
429        pub const _011: Self = Self::new(3);
430        #[doc = "48 bits"]
431        pub const _100: Self = Self::new(4);
432        #[doc = "64 bits"]
433        pub const _101: Self = Self::new(5);
434        #[doc = "128 bits"]
435        pub const _110: Self = Self::new(6);
436        #[doc = "256 bits"]
437        pub const _111: Self = Self::new(7);
438    }
439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
440    pub struct Dwl_SPEC;
441    pub type Dwl = crate::EnumBitfieldStruct<u8, Dwl_SPEC>;
442    impl Dwl {
443        #[doc = "8 bits"]
444        pub const _000: Self = Self::new(0);
445        #[doc = "16 bits"]
446        pub const _001: Self = Self::new(1);
447        #[doc = "18 bits"]
448        pub const _010: Self = Self::new(2);
449        #[doc = "20 bits"]
450        pub const _011: Self = Self::new(3);
451        #[doc = "22 bits"]
452        pub const _100: Self = Self::new(4);
453        #[doc = "24 bits"]
454        pub const _101: Self = Self::new(5);
455        #[doc = "32 bits"]
456        pub const _110: Self = Self::new(6);
457        #[doc = "Setting prohibited"]
458        pub const _111: Self = Self::new(7);
459    }
460    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
461    pub struct Iien_SPEC;
462    pub type Iien = crate::EnumBitfieldStruct<u8, Iien_SPEC>;
463    impl Iien {
464        #[doc = "Disables idle mode interrupt output"]
465        pub const _0: Self = Self::new(0);
466        #[doc = "Enables idle mode interrupt output"]
467        pub const _1: Self = Self::new(1);
468    }
469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
470    pub struct Roien_SPEC;
471    pub type Roien = crate::EnumBitfieldStruct<u8, Roien_SPEC>;
472    impl Roien {
473        #[doc = "Disables receive overflow interrupt output"]
474        pub const _0: Self = Self::new(0);
475        #[doc = "Enables receive overflow interrupt output"]
476        pub const _1: Self = Self::new(1);
477    }
478    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
479    pub struct Ruien_SPEC;
480    pub type Ruien = crate::EnumBitfieldStruct<u8, Ruien_SPEC>;
481    impl Ruien {
482        #[doc = "Disables receive underflow interrupt output"]
483        pub const _0: Self = Self::new(0);
484        #[doc = "Enables receive underflow interrupt output"]
485        pub const _1: Self = Self::new(1);
486    }
487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
488    pub struct Toien_SPEC;
489    pub type Toien = crate::EnumBitfieldStruct<u8, Toien_SPEC>;
490    impl Toien {
491        #[doc = "Disables transmit overflow interrupt output"]
492        pub const _0: Self = Self::new(0);
493        #[doc = "Enables transmit overflow interrupt output"]
494        pub const _1: Self = Self::new(1);
495    }
496    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
497    pub struct Tuien_SPEC;
498    pub type Tuien = crate::EnumBitfieldStruct<u8, Tuien_SPEC>;
499    impl Tuien {
500        #[doc = "Disables transmit underflow interrupt output"]
501        pub const _0: Self = Self::new(0);
502        #[doc = "Enables transmit underflow interrupt output"]
503        pub const _1: Self = Self::new(1);
504    }
505}
506#[doc(hidden)]
507#[derive(Copy, Clone, Eq, PartialEq)]
508pub struct Ssisr_SPEC;
509impl crate::sealed::RegSpec for Ssisr_SPEC {
510    type DataType = u32;
511}
512#[doc = "Status Register"]
513pub type Ssisr = crate::RegValueT<Ssisr_SPEC>;
514
515impl Ssisr {
516    #[doc = "Idle Mode Status Flag"]
517    #[inline(always)]
518    pub fn iirq(
519        self,
520    ) -> crate::common::RegisterField<25, 0x1, 1, 0, ssisr::Iirq, Ssisr_SPEC, crate::common::R>
521    {
522        crate::common::RegisterField::<25,0x1,1,0,ssisr::Iirq, Ssisr_SPEC,crate::common::R>::from_register(self,0)
523    }
524    #[doc = "Receive Overflow Error Status Flag"]
525    #[inline(always)]
526    pub fn roirq(
527        self,
528    ) -> crate::common::RegisterField<26, 0x1, 1, 0, ssisr::Roirq, Ssisr_SPEC, crate::common::RW>
529    {
530        crate::common::RegisterField::<26,0x1,1,0,ssisr::Roirq, Ssisr_SPEC,crate::common::RW>::from_register(self,0)
531    }
532    #[doc = "Receive Underflow Error Status Flag"]
533    #[inline(always)]
534    pub fn ruirq(
535        self,
536    ) -> crate::common::RegisterField<27, 0x1, 1, 0, ssisr::Ruirq, Ssisr_SPEC, crate::common::RW>
537    {
538        crate::common::RegisterField::<27,0x1,1,0,ssisr::Ruirq, Ssisr_SPEC,crate::common::RW>::from_register(self,0)
539    }
540    #[doc = "Transmit Overflow Error Status Flag"]
541    #[inline(always)]
542    pub fn toirq(
543        self,
544    ) -> crate::common::RegisterField<28, 0x1, 1, 0, ssisr::Toirq, Ssisr_SPEC, crate::common::RW>
545    {
546        crate::common::RegisterField::<28,0x1,1,0,ssisr::Toirq, Ssisr_SPEC,crate::common::RW>::from_register(self,0)
547    }
548    #[doc = "Transmit Underflow Error Status flag"]
549    #[inline(always)]
550    pub fn tuirq(
551        self,
552    ) -> crate::common::RegisterField<29, 0x1, 1, 0, ssisr::Tuirq, Ssisr_SPEC, crate::common::RW>
553    {
554        crate::common::RegisterField::<29,0x1,1,0,ssisr::Tuirq, Ssisr_SPEC,crate::common::RW>::from_register(self,0)
555    }
556}
557impl ::core::default::Default for Ssisr {
558    #[inline(always)]
559    fn default() -> Ssisr {
560        <crate::RegValueT<Ssisr_SPEC> as RegisterValue<_>>::new(33554432)
561    }
562}
563pub mod ssisr {
564
565    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
566    pub struct Iirq_SPEC;
567    pub type Iirq = crate::EnumBitfieldStruct<u8, Iirq_SPEC>;
568    impl Iirq {
569        #[doc = "In the communication state"]
570        pub const _0: Self = Self::new(0);
571        #[doc = "In the idle state"]
572        pub const _1: Self = Self::new(1);
573    }
574    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
575    pub struct Roirq_SPEC;
576    pub type Roirq = crate::EnumBitfieldStruct<u8, Roirq_SPEC>;
577    impl Roirq {
578        #[doc = "No receive overflow error is generated."]
579        pub const _0: Self = Self::new(0);
580        #[doc = "A receive overflow error is generated."]
581        pub const _1: Self = Self::new(1);
582    }
583    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
584    pub struct Ruirq_SPEC;
585    pub type Ruirq = crate::EnumBitfieldStruct<u8, Ruirq_SPEC>;
586    impl Ruirq {
587        #[doc = "No receive underflow error is generated."]
588        pub const _0: Self = Self::new(0);
589        #[doc = "A receive underflow error is generated."]
590        pub const _1: Self = Self::new(1);
591    }
592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
593    pub struct Toirq_SPEC;
594    pub type Toirq = crate::EnumBitfieldStruct<u8, Toirq_SPEC>;
595    impl Toirq {
596        #[doc = "No transmit overflow error is generated."]
597        pub const _0: Self = Self::new(0);
598        #[doc = "A transmit overflow error is generated."]
599        pub const _1: Self = Self::new(1);
600    }
601    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
602    pub struct Tuirq_SPEC;
603    pub type Tuirq = crate::EnumBitfieldStruct<u8, Tuirq_SPEC>;
604    impl Tuirq {
605        #[doc = "No transmit underflow error is generated."]
606        pub const _0: Self = Self::new(0);
607        #[doc = "A transmit underflow error is generated."]
608        pub const _1: Self = Self::new(1);
609    }
610}
611#[doc(hidden)]
612#[derive(Copy, Clone, Eq, PartialEq)]
613pub struct Ssifcr_SPEC;
614impl crate::sealed::RegSpec for Ssifcr_SPEC {
615    type DataType = u32;
616}
617#[doc = "FIFO Control Register"]
618pub type Ssifcr = crate::RegValueT<Ssifcr_SPEC>;
619
620impl Ssifcr {
621    #[doc = "Receive FIFO Data Register Reset"]
622    #[inline(always)]
623    pub fn rfrst(
624        self,
625    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ssifcr::Rfrst, Ssifcr_SPEC, crate::common::RW>
626    {
627        crate::common::RegisterField::<0,0x1,1,0,ssifcr::Rfrst, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
628    }
629    #[doc = "Transmit FIFO Data Register Reset"]
630    #[inline(always)]
631    pub fn tfrst(
632        self,
633    ) -> crate::common::RegisterField<1, 0x1, 1, 0, ssifcr::Tfrst, Ssifcr_SPEC, crate::common::RW>
634    {
635        crate::common::RegisterField::<1,0x1,1,0,ssifcr::Tfrst, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
636    }
637    #[doc = "Receive Data Full Interrupt Output Enable"]
638    #[inline(always)]
639    pub fn rie(
640        self,
641    ) -> crate::common::RegisterField<2, 0x1, 1, 0, ssifcr::Rie, Ssifcr_SPEC, crate::common::RW>
642    {
643        crate::common::RegisterField::<2,0x1,1,0,ssifcr::Rie, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
644    }
645    #[doc = "Transmit Data Empty Interrupt Output Enable"]
646    #[inline(always)]
647    pub fn tie(
648        self,
649    ) -> crate::common::RegisterField<3, 0x1, 1, 0, ssifcr::Tie, Ssifcr_SPEC, crate::common::RW>
650    {
651        crate::common::RegisterField::<3,0x1,1,0,ssifcr::Tie, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
652    }
653    #[doc = "Byte Swap Enable"]
654    #[inline(always)]
655    pub fn bsw(
656        self,
657    ) -> crate::common::RegisterField<11, 0x1, 1, 0, ssifcr::Bsw, Ssifcr_SPEC, crate::common::RW>
658    {
659        crate::common::RegisterField::<11,0x1,1,0,ssifcr::Bsw, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
660    }
661    #[doc = "Software Reset"]
662    #[inline(always)]
663    pub fn ssirst(
664        self,
665    ) -> crate::common::RegisterField<16, 0x1, 1, 0, ssifcr::Ssirst, Ssifcr_SPEC, crate::common::RW>
666    {
667        crate::common::RegisterField::<16,0x1,1,0,ssifcr::Ssirst, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
668    }
669    #[doc = "AUDIO_MCK Enable in Master-mode Communication"]
670    #[inline(always)]
671    pub fn aucke(
672        self,
673    ) -> crate::common::RegisterField<31, 0x1, 1, 0, ssifcr::Aucke, Ssifcr_SPEC, crate::common::RW>
674    {
675        crate::common::RegisterField::<31,0x1,1,0,ssifcr::Aucke, Ssifcr_SPEC,crate::common::RW>::from_register(self,0)
676    }
677}
678impl ::core::default::Default for Ssifcr {
679    #[inline(always)]
680    fn default() -> Ssifcr {
681        <crate::RegValueT<Ssifcr_SPEC> as RegisterValue<_>>::new(0)
682    }
683}
684pub mod ssifcr {
685
686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
687    pub struct Rfrst_SPEC;
688    pub type Rfrst = crate::EnumBitfieldStruct<u8, Rfrst_SPEC>;
689    impl Rfrst {
690        #[doc = "Clears a receive data FIFO reset condition"]
691        pub const _0: Self = Self::new(0);
692        #[doc = "Sets a receive data FIFO reset condition"]
693        pub const _1: Self = Self::new(1);
694    }
695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
696    pub struct Tfrst_SPEC;
697    pub type Tfrst = crate::EnumBitfieldStruct<u8, Tfrst_SPEC>;
698    impl Tfrst {
699        #[doc = "Clears a transmit data FIFO reset condition"]
700        pub const _0: Self = Self::new(0);
701        #[doc = "Sets a transmit data FIFO reset condition"]
702        pub const _1: Self = Self::new(1);
703    }
704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
705    pub struct Rie_SPEC;
706    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
707    impl Rie {
708        #[doc = "Disables receive data full interrupts"]
709        pub const _0: Self = Self::new(0);
710        #[doc = "Enables receive data full interrupts"]
711        pub const _1: Self = Self::new(1);
712    }
713    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
714    pub struct Tie_SPEC;
715    pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
716    impl Tie {
717        #[doc = "Disables transmit data empty interrupts"]
718        pub const _0: Self = Self::new(0);
719        #[doc = "Enables transmit data empty interrupts"]
720        pub const _1: Self = Self::new(1);
721    }
722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
723    pub struct Bsw_SPEC;
724    pub type Bsw = crate::EnumBitfieldStruct<u8, Bsw_SPEC>;
725    impl Bsw {
726        #[doc = "Disables byte swap"]
727        pub const _0: Self = Self::new(0);
728        #[doc = "Enables byte swap"]
729        pub const _1: Self = Self::new(1);
730    }
731    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
732    pub struct Ssirst_SPEC;
733    pub type Ssirst = crate::EnumBitfieldStruct<u8, Ssirst_SPEC>;
734    impl Ssirst {
735        #[doc = "Clears a software reset condition"]
736        pub const _0: Self = Self::new(0);
737        #[doc = "Sets a software reset condition"]
738        pub const _1: Self = Self::new(1);
739    }
740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
741    pub struct Aucke_SPEC;
742    pub type Aucke = crate::EnumBitfieldStruct<u8, Aucke_SPEC>;
743    impl Aucke {
744        #[doc = "Disables supply of AUDIO_MCK"]
745        pub const _0: Self = Self::new(0);
746        #[doc = "Enables supply of AUDIO_MCK"]
747        pub const _1: Self = Self::new(1);
748    }
749}
750#[doc(hidden)]
751#[derive(Copy, Clone, Eq, PartialEq)]
752pub struct Ssifsr_SPEC;
753impl crate::sealed::RegSpec for Ssifsr_SPEC {
754    type DataType = u32;
755}
756#[doc = "FIFO Status Register"]
757pub type Ssifsr = crate::RegValueT<Ssifsr_SPEC>;
758
759impl Ssifsr {
760    #[doc = "Receive Data Full Flag"]
761    #[inline(always)]
762    pub fn rdf(
763        self,
764    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ssifsr::Rdf, Ssifsr_SPEC, crate::common::RW>
765    {
766        crate::common::RegisterField::<0,0x1,1,0,ssifsr::Rdf, Ssifsr_SPEC,crate::common::RW>::from_register(self,0)
767    }
768    #[doc = "Receive Data Count"]
769    #[inline(always)]
770    pub fn rdc(
771        self,
772    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, Ssifsr_SPEC, crate::common::R> {
773        crate::common::RegisterField::<8,0x3f,1,0,u8, Ssifsr_SPEC,crate::common::R>::from_register(self,0)
774    }
775    #[doc = "Transmit Data Empty Flag"]
776    #[inline(always)]
777    pub fn tde(
778        self,
779    ) -> crate::common::RegisterField<16, 0x1, 1, 0, ssifsr::Tde, Ssifsr_SPEC, crate::common::RW>
780    {
781        crate::common::RegisterField::<16,0x1,1,0,ssifsr::Tde, Ssifsr_SPEC,crate::common::RW>::from_register(self,0)
782    }
783    #[doc = "Transmit Data Count"]
784    #[inline(always)]
785    pub fn tdc(
786        self,
787    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, Ssifsr_SPEC, crate::common::R> {
788        crate::common::RegisterField::<24,0x3f,1,0,u8, Ssifsr_SPEC,crate::common::R>::from_register(self,0)
789    }
790}
791impl ::core::default::Default for Ssifsr {
792    #[inline(always)]
793    fn default() -> Ssifsr {
794        <crate::RegValueT<Ssifsr_SPEC> as RegisterValue<_>>::new(65536)
795    }
796}
797pub mod ssifsr {
798
799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
800    pub struct Rdf_SPEC;
801    pub type Rdf = crate::EnumBitfieldStruct<u8, Rdf_SPEC>;
802    impl Rdf {
803        #[doc = "The size of received data in SSIFRDR is not more than the value of SSISCR.RDFS."]
804        pub const _0: Self = Self::new(0);
805        #[doc = "The size of received data in SSIFRDR is not less than the value of SSISCR.RDFS plus one."]
806        pub const _1: Self = Self::new(1);
807    }
808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
809    pub struct Tde_SPEC;
810    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
811    impl Tde {
812        #[doc = "The free space of SSIFTDR is not more than the value of SSISCR.TDES."]
813        pub const _0: Self = Self::new(0);
814        #[doc = "The free space of SSIFTDR is not less than the value of SSISCR.TDES plus one."]
815        pub const _1: Self = Self::new(1);
816    }
817}
818#[doc(hidden)]
819#[derive(Copy, Clone, Eq, PartialEq)]
820pub struct Ssiftdr_SPEC;
821impl crate::sealed::RegSpec for Ssiftdr_SPEC {
822    type DataType = u32;
823}
824#[doc = "Transmit FIFO Data Register"]
825pub type Ssiftdr = crate::RegValueT<Ssiftdr_SPEC>;
826
827impl Ssiftdr {
828    #[doc = "Transmit FIFO Data"]
829    #[inline(always)]
830    pub fn ssiftdr(
831        self,
832    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, Ssiftdr_SPEC, crate::common::W>
833    {
834        crate::common::RegisterField::<0,0xffffffff,1,0,u32, Ssiftdr_SPEC,crate::common::W>::from_register(self,0)
835    }
836}
837impl ::core::default::Default for Ssiftdr {
838    #[inline(always)]
839    fn default() -> Ssiftdr {
840        <crate::RegValueT<Ssiftdr_SPEC> as RegisterValue<_>>::new(0)
841    }
842}
843
844#[doc(hidden)]
845#[derive(Copy, Clone, Eq, PartialEq)]
846pub struct Ssifrdr_SPEC;
847impl crate::sealed::RegSpec for Ssifrdr_SPEC {
848    type DataType = u32;
849}
850#[doc = "Receive FIFO Data Register"]
851pub type Ssifrdr = crate::RegValueT<Ssifrdr_SPEC>;
852
853impl Ssifrdr {
854    #[doc = "Receive FIFO Data"]
855    #[inline(always)]
856    pub fn ssifrdr(
857        self,
858    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, Ssifrdr_SPEC, crate::common::R>
859    {
860        crate::common::RegisterField::<0,0xffffffff,1,0,u32, Ssifrdr_SPEC,crate::common::R>::from_register(self,0)
861    }
862}
863impl ::core::default::Default for Ssifrdr {
864    #[inline(always)]
865    fn default() -> Ssifrdr {
866        <crate::RegValueT<Ssifrdr_SPEC> as RegisterValue<_>>::new(0)
867    }
868}
869
870#[doc(hidden)]
871#[derive(Copy, Clone, Eq, PartialEq)]
872pub struct Ssiofr_SPEC;
873impl crate::sealed::RegSpec for Ssiofr_SPEC {
874    type DataType = u32;
875}
876#[doc = "Audio Format Register"]
877pub type Ssiofr = crate::RegValueT<Ssiofr_SPEC>;
878
879impl Ssiofr {
880    #[doc = "Audio Format Select"]
881    #[inline(always)]
882    pub fn omod(
883        self,
884    ) -> crate::common::RegisterField<0, 0x3, 1, 0, ssiofr::Omod, Ssiofr_SPEC, crate::common::RW>
885    {
886        crate::common::RegisterField::<0,0x3,1,0,ssiofr::Omod, Ssiofr_SPEC,crate::common::RW>::from_register(self,0)
887    }
888    #[doc = "Whether to Enable LRCK/FS Continuation"]
889    #[inline(always)]
890    pub fn lrcont(
891        self,
892    ) -> crate::common::RegisterField<8, 0x1, 1, 0, ssiofr::Lrcont, Ssiofr_SPEC, crate::common::RW>
893    {
894        crate::common::RegisterField::<8,0x1,1,0,ssiofr::Lrcont, Ssiofr_SPEC,crate::common::RW>::from_register(self,0)
895    }
896    #[doc = "Whether to Enable Stopping BCK Output When SSIE is in Idle Status"]
897    #[inline(always)]
898    pub fn bckastp(
899        self,
900    ) -> crate::common::RegisterField<9, 0x1, 1, 0, ssiofr::Bckastp, Ssiofr_SPEC, crate::common::RW>
901    {
902        crate::common::RegisterField::<9,0x1,1,0,ssiofr::Bckastp, Ssiofr_SPEC,crate::common::RW>::from_register(self,0)
903    }
904}
905impl ::core::default::Default for Ssiofr {
906    #[inline(always)]
907    fn default() -> Ssiofr {
908        <crate::RegValueT<Ssiofr_SPEC> as RegisterValue<_>>::new(0)
909    }
910}
911pub mod ssiofr {
912
913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
914    pub struct Omod_SPEC;
915    pub type Omod = crate::EnumBitfieldStruct<u8, Omod_SPEC>;
916    impl Omod {
917        #[doc = "I2S format"]
918        pub const _00: Self = Self::new(0);
919        #[doc = "TDM format"]
920        pub const _01: Self = Self::new(1);
921        #[doc = "Monaural format"]
922        pub const _10: Self = Self::new(2);
923        #[doc = "Setting prohibited"]
924        pub const _11: Self = Self::new(3);
925    }
926    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
927    pub struct Lrcont_SPEC;
928    pub type Lrcont = crate::EnumBitfieldStruct<u8, Lrcont_SPEC>;
929    impl Lrcont {
930        #[doc = "Disables LRCK/FS continuation"]
931        pub const _0: Self = Self::new(0);
932        #[doc = "Enables LRCK/FS continuation"]
933        pub const _1: Self = Self::new(1);
934    }
935    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
936    pub struct Bckastp_SPEC;
937    pub type Bckastp = crate::EnumBitfieldStruct<u8, Bckastp_SPEC>;
938    impl Bckastp {
939        #[doc = "Always outputs BCK to the SSIBCK0 pin"]
940        pub const _0: Self = Self::new(0);
941        #[doc = "Automatically controls output of BCK to the SSIBCK0 pin"]
942        pub const _1: Self = Self::new(1);
943    }
944}
945#[doc(hidden)]
946#[derive(Copy, Clone, Eq, PartialEq)]
947pub struct Ssiscr_SPEC;
948impl crate::sealed::RegSpec for Ssiscr_SPEC {
949    type DataType = u32;
950}
951#[doc = "Status Control Register"]
952pub type Ssiscr = crate::RegValueT<Ssiscr_SPEC>;
953
954impl Ssiscr {
955    #[doc = "RDF Setting Condition Select"]
956    #[inline(always)]
957    pub fn rdfs(
958        self,
959    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, Ssiscr_SPEC, crate::common::RW> {
960        crate::common::RegisterField::<0,0x1f,1,0,u8, Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
961    }
962    #[doc = "TDE Setting Condition Select"]
963    #[inline(always)]
964    pub fn tdes(
965        self,
966    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, Ssiscr_SPEC, crate::common::RW> {
967        crate::common::RegisterField::<8,0x1f,1,0,u8, Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
968    }
969}
970impl ::core::default::Default for Ssiscr {
971    #[inline(always)]
972    fn default() -> Ssiscr {
973        <crate::RegValueT<Ssiscr_SPEC> as RegisterValue<_>>::new(0)
974    }
975}
ra4e2_pac/ssie0.rs

ra4e2_pac/
ssie0.rs
