ra4e2_pac/
spi0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Peripheral Interface 0"]
28unsafe impl ::core::marker::Send for super::Spi0 {}
29unsafe impl ::core::marker::Sync for super::Spi0 {}
30impl super::Spi0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "SPI Control Register"]
37    #[inline(always)]
38    pub const fn spcr(&self) -> &'static crate::common::Reg<self::Spcr_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Spcr_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(0usize),
42            )
43        }
44    }
45
46    #[doc = "SPI Slave Select Polarity Register"]
47    #[inline(always)]
48    pub const fn sslp(&self) -> &'static crate::common::Reg<self::Sslp_SPEC, crate::common::RW> {
49        unsafe {
50            crate::common::Reg::<self::Sslp_SPEC, crate::common::RW>::from_ptr(
51                self._svd2pac_as_ptr().add(1usize),
52            )
53        }
54    }
55
56    #[doc = "SPI Pin Control Register"]
57    #[inline(always)]
58    pub const fn sppcr(&self) -> &'static crate::common::Reg<self::Sppcr_SPEC, crate::common::RW> {
59        unsafe {
60            crate::common::Reg::<self::Sppcr_SPEC, crate::common::RW>::from_ptr(
61                self._svd2pac_as_ptr().add(2usize),
62            )
63        }
64    }
65
66    #[doc = "SPI Status Register"]
67    #[inline(always)]
68    pub const fn spsr(&self) -> &'static crate::common::Reg<self::Spsr_SPEC, crate::common::RW> {
69        unsafe {
70            crate::common::Reg::<self::Spsr_SPEC, crate::common::RW>::from_ptr(
71                self._svd2pac_as_ptr().add(3usize),
72            )
73        }
74    }
75
76    #[doc = "SPI Data Register"]
77    #[inline(always)]
78    pub const fn spdr(&self) -> &'static crate::common::Reg<self::Spdr_SPEC, crate::common::RW> {
79        unsafe {
80            crate::common::Reg::<self::Spdr_SPEC, crate::common::RW>::from_ptr(
81                self._svd2pac_as_ptr().add(4usize),
82            )
83        }
84    }
85
86    #[doc = "SPI Data Register"]
87    #[inline(always)]
88    pub const fn spdr_ha(
89        &self,
90    ) -> &'static crate::common::Reg<self::SpdrHa_SPEC, crate::common::RW> {
91        unsafe {
92            crate::common::Reg::<self::SpdrHa_SPEC, crate::common::RW>::from_ptr(
93                self._svd2pac_as_ptr().add(4usize),
94            )
95        }
96    }
97
98    #[doc = "SPI Data Register"]
99    #[inline(always)]
100    pub const fn spdr_by(
101        &self,
102    ) -> &'static crate::common::Reg<self::SpdrBy_SPEC, crate::common::RW> {
103        unsafe {
104            crate::common::Reg::<self::SpdrBy_SPEC, crate::common::RW>::from_ptr(
105                self._svd2pac_as_ptr().add(4usize),
106            )
107        }
108    }
109
110    #[doc = "SPI Sequence Control Register"]
111    #[inline(always)]
112    pub const fn spscr(&self) -> &'static crate::common::Reg<self::Spscr_SPEC, crate::common::RW> {
113        unsafe {
114            crate::common::Reg::<self::Spscr_SPEC, crate::common::RW>::from_ptr(
115                self._svd2pac_as_ptr().add(8usize),
116            )
117        }
118    }
119
120    #[doc = "SPI Sequence Status Register"]
121    #[inline(always)]
122    pub const fn spssr(&self) -> &'static crate::common::Reg<self::Spssr_SPEC, crate::common::R> {
123        unsafe {
124            crate::common::Reg::<self::Spssr_SPEC, crate::common::R>::from_ptr(
125                self._svd2pac_as_ptr().add(9usize),
126            )
127        }
128    }
129
130    #[doc = "SPI Bit Rate Register"]
131    #[inline(always)]
132    pub const fn spbr(&self) -> &'static crate::common::Reg<self::Spbr_SPEC, crate::common::RW> {
133        unsafe {
134            crate::common::Reg::<self::Spbr_SPEC, crate::common::RW>::from_ptr(
135                self._svd2pac_as_ptr().add(10usize),
136            )
137        }
138    }
139
140    #[doc = "SPI Data Control Register"]
141    #[inline(always)]
142    pub const fn spdcr(&self) -> &'static crate::common::Reg<self::Spdcr_SPEC, crate::common::RW> {
143        unsafe {
144            crate::common::Reg::<self::Spdcr_SPEC, crate::common::RW>::from_ptr(
145                self._svd2pac_as_ptr().add(11usize),
146            )
147        }
148    }
149
150    #[doc = "SPI Clock Delay Register"]
151    #[inline(always)]
152    pub const fn spckd(&self) -> &'static crate::common::Reg<self::Spckd_SPEC, crate::common::RW> {
153        unsafe {
154            crate::common::Reg::<self::Spckd_SPEC, crate::common::RW>::from_ptr(
155                self._svd2pac_as_ptr().add(12usize),
156            )
157        }
158    }
159
160    #[doc = "SPI Slave Select Negation Delay Register"]
161    #[inline(always)]
162    pub const fn sslnd(&self) -> &'static crate::common::Reg<self::Sslnd_SPEC, crate::common::RW> {
163        unsafe {
164            crate::common::Reg::<self::Sslnd_SPEC, crate::common::RW>::from_ptr(
165                self._svd2pac_as_ptr().add(13usize),
166            )
167        }
168    }
169
170    #[doc = "SPI Next-Access Delay Register"]
171    #[inline(always)]
172    pub const fn spnd(&self) -> &'static crate::common::Reg<self::Spnd_SPEC, crate::common::RW> {
173        unsafe {
174            crate::common::Reg::<self::Spnd_SPEC, crate::common::RW>::from_ptr(
175                self._svd2pac_as_ptr().add(14usize),
176            )
177        }
178    }
179
180    #[doc = "SPI Control Register 2"]
181    #[inline(always)]
182    pub const fn spcr2(&self) -> &'static crate::common::Reg<self::Spcr2_SPEC, crate::common::RW> {
183        unsafe {
184            crate::common::Reg::<self::Spcr2_SPEC, crate::common::RW>::from_ptr(
185                self._svd2pac_as_ptr().add(15usize),
186            )
187        }
188    }
189
190    #[doc = "SPI Command Register %s"]
191    #[inline(always)]
192    pub const fn spcmd(
193        &self,
194    ) -> &'static crate::common::ClusterRegisterArray<
195        crate::common::Reg<self::Spcmd_SPEC, crate::common::RW>,
196        8,
197        0x2,
198    > {
199        unsafe {
200            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x10usize))
201        }
202    }
203
204    #[doc = "SPI Data Control Register 2"]
205    #[inline(always)]
206    pub const fn spdcr2(
207        &self,
208    ) -> &'static crate::common::Reg<self::Spdcr2_SPEC, crate::common::RW> {
209        unsafe {
210            crate::common::Reg::<self::Spdcr2_SPEC, crate::common::RW>::from_ptr(
211                self._svd2pac_as_ptr().add(32usize),
212            )
213        }
214    }
215
216    #[doc = "SPI Control Register 3"]
217    #[inline(always)]
218    pub const fn spcr3(&self) -> &'static crate::common::Reg<self::Spcr3_SPEC, crate::common::RW> {
219        unsafe {
220            crate::common::Reg::<self::Spcr3_SPEC, crate::common::RW>::from_ptr(
221                self._svd2pac_as_ptr().add(33usize),
222            )
223        }
224    }
225}
226#[doc(hidden)]
227#[derive(Copy, Clone, Eq, PartialEq)]
228pub struct Spcr_SPEC;
229impl crate::sealed::RegSpec for Spcr_SPEC {
230    type DataType = u8;
231}
232#[doc = "SPI Control Register"]
233pub type Spcr = crate::RegValueT<Spcr_SPEC>;
234
235impl Spcr {
236    #[doc = "SPI Mode Select"]
237    #[inline(always)]
238    pub fn spms(
239        self,
240    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spcr::Spms, Spcr_SPEC, crate::common::RW> {
241        crate::common::RegisterField::<0,0x1,1,0,spcr::Spms, Spcr_SPEC,crate::common::RW>::from_register(self,0)
242    }
243    #[doc = "Communications Operating Mode Select"]
244    #[inline(always)]
245    pub fn txmd(
246        self,
247    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spcr::Txmd, Spcr_SPEC, crate::common::RW> {
248        crate::common::RegisterField::<1,0x1,1,0,spcr::Txmd, Spcr_SPEC,crate::common::RW>::from_register(self,0)
249    }
250    #[doc = "Mode Fault Error Detection Enable"]
251    #[inline(always)]
252    pub fn modfen(
253        self,
254    ) -> crate::common::RegisterField<2, 0x1, 1, 0, spcr::Modfen, Spcr_SPEC, crate::common::RW>
255    {
256        crate::common::RegisterField::<2,0x1,1,0,spcr::Modfen, Spcr_SPEC,crate::common::RW>::from_register(self,0)
257    }
258    #[doc = "SPI Master/Slave Mode Select"]
259    #[inline(always)]
260    pub fn mstr(
261        self,
262    ) -> crate::common::RegisterField<3, 0x1, 1, 0, spcr::Mstr, Spcr_SPEC, crate::common::RW> {
263        crate::common::RegisterField::<3,0x1,1,0,spcr::Mstr, Spcr_SPEC,crate::common::RW>::from_register(self,0)
264    }
265    #[doc = "SPI Error Interrupt Enable"]
266    #[inline(always)]
267    pub fn speie(
268        self,
269    ) -> crate::common::RegisterField<4, 0x1, 1, 0, spcr::Speie, Spcr_SPEC, crate::common::RW> {
270        crate::common::RegisterField::<4,0x1,1,0,spcr::Speie, Spcr_SPEC,crate::common::RW>::from_register(self,0)
271    }
272    #[doc = "Transmit Buffer Empty Interrupt Enable"]
273    #[inline(always)]
274    pub fn sptie(
275        self,
276    ) -> crate::common::RegisterField<5, 0x1, 1, 0, spcr::Sptie, Spcr_SPEC, crate::common::RW> {
277        crate::common::RegisterField::<5,0x1,1,0,spcr::Sptie, Spcr_SPEC,crate::common::RW>::from_register(self,0)
278    }
279    #[doc = "SPI Function Enable"]
280    #[inline(always)]
281    pub fn spe(
282        self,
283    ) -> crate::common::RegisterField<6, 0x1, 1, 0, spcr::Spe, Spcr_SPEC, crate::common::RW> {
284        crate::common::RegisterField::<6,0x1,1,0,spcr::Spe, Spcr_SPEC,crate::common::RW>::from_register(self,0)
285    }
286    #[doc = "SPI Receive Buffer Full Interrupt Enable"]
287    #[inline(always)]
288    pub fn sprie(
289        self,
290    ) -> crate::common::RegisterField<7, 0x1, 1, 0, spcr::Sprie, Spcr_SPEC, crate::common::RW> {
291        crate::common::RegisterField::<7,0x1,1,0,spcr::Sprie, Spcr_SPEC,crate::common::RW>::from_register(self,0)
292    }
293}
294impl ::core::default::Default for Spcr {
295    #[inline(always)]
296    fn default() -> Spcr {
297        <crate::RegValueT<Spcr_SPEC> as RegisterValue<_>>::new(0)
298    }
299}
300pub mod spcr {
301
302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
303    pub struct Spms_SPEC;
304    pub type Spms = crate::EnumBitfieldStruct<u8, Spms_SPEC>;
305    impl Spms {
306        #[doc = "Select SPI operation (4-wire method)"]
307        pub const _0: Self = Self::new(0);
308        #[doc = "Select clock synchronous operation (3-wire method)"]
309        pub const _1: Self = Self::new(1);
310    }
311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
312    pub struct Txmd_SPEC;
313    pub type Txmd = crate::EnumBitfieldStruct<u8, Txmd_SPEC>;
314    impl Txmd {
315        #[doc = "Select full-duplex synchronous serial communications"]
316        pub const _0: Self = Self::new(0);
317        #[doc = "Select serial communications with transmit-only"]
318        pub const _1: Self = Self::new(1);
319    }
320    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
321    pub struct Modfen_SPEC;
322    pub type Modfen = crate::EnumBitfieldStruct<u8, Modfen_SPEC>;
323    impl Modfen {
324        #[doc = "Disable detection of mode fault errors"]
325        pub const _0: Self = Self::new(0);
326        #[doc = "Enable detection of mode fault errors"]
327        pub const _1: Self = Self::new(1);
328    }
329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
330    pub struct Mstr_SPEC;
331    pub type Mstr = crate::EnumBitfieldStruct<u8, Mstr_SPEC>;
332    impl Mstr {
333        #[doc = "Select slave mode"]
334        pub const _0: Self = Self::new(0);
335        #[doc = "Select master mode"]
336        pub const _1: Self = Self::new(1);
337    }
338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
339    pub struct Speie_SPEC;
340    pub type Speie = crate::EnumBitfieldStruct<u8, Speie_SPEC>;
341    impl Speie {
342        #[doc = "Disable SPI error interrupt requests"]
343        pub const _0: Self = Self::new(0);
344        #[doc = "Enable SPI error interrupt requests"]
345        pub const _1: Self = Self::new(1);
346    }
347    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
348    pub struct Sptie_SPEC;
349    pub type Sptie = crate::EnumBitfieldStruct<u8, Sptie_SPEC>;
350    impl Sptie {
351        #[doc = "Disable transmit buffer empty interrupt requests"]
352        pub const _0: Self = Self::new(0);
353        #[doc = "Enable transmit buffer empty interrupt requests"]
354        pub const _1: Self = Self::new(1);
355    }
356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
357    pub struct Spe_SPEC;
358    pub type Spe = crate::EnumBitfieldStruct<u8, Spe_SPEC>;
359    impl Spe {
360        #[doc = "Disable SPI function"]
361        pub const _0: Self = Self::new(0);
362        #[doc = "Enable SPI function"]
363        pub const _1: Self = Self::new(1);
364    }
365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
366    pub struct Sprie_SPEC;
367    pub type Sprie = crate::EnumBitfieldStruct<u8, Sprie_SPEC>;
368    impl Sprie {
369        #[doc = "Disable SPI receive buffer full interrupt requests"]
370        pub const _0: Self = Self::new(0);
371        #[doc = "Enable SPI receive buffer full interrupt requests"]
372        pub const _1: Self = Self::new(1);
373    }
374}
375#[doc(hidden)]
376#[derive(Copy, Clone, Eq, PartialEq)]
377pub struct Sslp_SPEC;
378impl crate::sealed::RegSpec for Sslp_SPEC {
379    type DataType = u8;
380}
381#[doc = "SPI Slave Select Polarity Register"]
382pub type Sslp = crate::RegValueT<Sslp_SPEC>;
383
384impl Sslp {
385    #[doc = "SSLn0 Signal Polarity Setting"]
386    #[inline(always)]
387    pub fn ssl0p(
388        self,
389    ) -> crate::common::RegisterField<0, 0x1, 1, 0, sslp::Ssl0P, Sslp_SPEC, crate::common::RW> {
390        crate::common::RegisterField::<0,0x1,1,0,sslp::Ssl0P, Sslp_SPEC,crate::common::RW>::from_register(self,0)
391    }
392    #[doc = "SSLn1 Signal Polarity Setting"]
393    #[inline(always)]
394    pub fn ssl1p(
395        self,
396    ) -> crate::common::RegisterField<1, 0x1, 1, 0, sslp::Ssl1P, Sslp_SPEC, crate::common::RW> {
397        crate::common::RegisterField::<1,0x1,1,0,sslp::Ssl1P, Sslp_SPEC,crate::common::RW>::from_register(self,0)
398    }
399    #[doc = "SSLn2 Signal Polarity Setting"]
400    #[inline(always)]
401    pub fn ssl2p(
402        self,
403    ) -> crate::common::RegisterField<2, 0x1, 1, 0, sslp::Ssl2P, Sslp_SPEC, crate::common::RW> {
404        crate::common::RegisterField::<2,0x1,1,0,sslp::Ssl2P, Sslp_SPEC,crate::common::RW>::from_register(self,0)
405    }
406    #[doc = "SSLn3 Signal Polarity Setting"]
407    #[inline(always)]
408    pub fn ssl3p(
409        self,
410    ) -> crate::common::RegisterField<3, 0x1, 1, 0, sslp::Ssl3P, Sslp_SPEC, crate::common::RW> {
411        crate::common::RegisterField::<3,0x1,1,0,sslp::Ssl3P, Sslp_SPEC,crate::common::RW>::from_register(self,0)
412    }
413}
414impl ::core::default::Default for Sslp {
415    #[inline(always)]
416    fn default() -> Sslp {
417        <crate::RegValueT<Sslp_SPEC> as RegisterValue<_>>::new(0)
418    }
419}
420pub mod sslp {
421
422    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
423    pub struct Ssl0P_SPEC;
424    pub type Ssl0P = crate::EnumBitfieldStruct<u8, Ssl0P_SPEC>;
425    impl Ssl0P {
426        #[doc = "Set SSLn0 signal to active-low"]
427        pub const _0: Self = Self::new(0);
428        #[doc = "Set SSLn0 signal to active-high"]
429        pub const _1: Self = Self::new(1);
430    }
431    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
432    pub struct Ssl1P_SPEC;
433    pub type Ssl1P = crate::EnumBitfieldStruct<u8, Ssl1P_SPEC>;
434    impl Ssl1P {
435        #[doc = "Set SSLn1 signal to active-low"]
436        pub const _0: Self = Self::new(0);
437        #[doc = "Set SSLn1 signal to active-high"]
438        pub const _1: Self = Self::new(1);
439    }
440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441    pub struct Ssl2P_SPEC;
442    pub type Ssl2P = crate::EnumBitfieldStruct<u8, Ssl2P_SPEC>;
443    impl Ssl2P {
444        #[doc = "Set SSLn2 signal to active-low"]
445        pub const _0: Self = Self::new(0);
446        #[doc = "Set SSLn2 signal to active-high"]
447        pub const _1: Self = Self::new(1);
448    }
449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
450    pub struct Ssl3P_SPEC;
451    pub type Ssl3P = crate::EnumBitfieldStruct<u8, Ssl3P_SPEC>;
452    impl Ssl3P {
453        #[doc = "Set SSLn3 signal to active-low"]
454        pub const _0: Self = Self::new(0);
455        #[doc = "Set SSLn3 signal to active-high"]
456        pub const _1: Self = Self::new(1);
457    }
458}
459#[doc(hidden)]
460#[derive(Copy, Clone, Eq, PartialEq)]
461pub struct Sppcr_SPEC;
462impl crate::sealed::RegSpec for Sppcr_SPEC {
463    type DataType = u8;
464}
465#[doc = "SPI Pin Control Register"]
466pub type Sppcr = crate::RegValueT<Sppcr_SPEC>;
467
468impl Sppcr {
469    #[doc = "SPI Loopback"]
470    #[inline(always)]
471    pub fn splp(
472        self,
473    ) -> crate::common::RegisterField<0, 0x1, 1, 0, sppcr::Splp, Sppcr_SPEC, crate::common::RW>
474    {
475        crate::common::RegisterField::<0,0x1,1,0,sppcr::Splp, Sppcr_SPEC,crate::common::RW>::from_register(self,0)
476    }
477    #[doc = "SPI Loopback 2"]
478    #[inline(always)]
479    pub fn splp2(
480        self,
481    ) -> crate::common::RegisterField<1, 0x1, 1, 0, sppcr::Splp2, Sppcr_SPEC, crate::common::RW>
482    {
483        crate::common::RegisterField::<1,0x1,1,0,sppcr::Splp2, Sppcr_SPEC,crate::common::RW>::from_register(self,0)
484    }
485    #[doc = "MOSI Idle Fixed Value"]
486    #[inline(always)]
487    pub fn moifv(
488        self,
489    ) -> crate::common::RegisterField<4, 0x1, 1, 0, sppcr::Moifv, Sppcr_SPEC, crate::common::RW>
490    {
491        crate::common::RegisterField::<4,0x1,1,0,sppcr::Moifv, Sppcr_SPEC,crate::common::RW>::from_register(self,0)
492    }
493    #[doc = "MOSI Idle Value Fixing Enable"]
494    #[inline(always)]
495    pub fn moife(
496        self,
497    ) -> crate::common::RegisterField<5, 0x1, 1, 0, sppcr::Moife, Sppcr_SPEC, crate::common::RW>
498    {
499        crate::common::RegisterField::<5,0x1,1,0,sppcr::Moife, Sppcr_SPEC,crate::common::RW>::from_register(self,0)
500    }
501}
502impl ::core::default::Default for Sppcr {
503    #[inline(always)]
504    fn default() -> Sppcr {
505        <crate::RegValueT<Sppcr_SPEC> as RegisterValue<_>>::new(0)
506    }
507}
508pub mod sppcr {
509
510    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
511    pub struct Splp_SPEC;
512    pub type Splp = crate::EnumBitfieldStruct<u8, Splp_SPEC>;
513    impl Splp {
514        #[doc = "Normal mode"]
515        pub const _0: Self = Self::new(0);
516        #[doc = "Loopback mode (receive data = inverted transmit data)"]
517        pub const _1: Self = Self::new(1);
518    }
519    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
520    pub struct Splp2_SPEC;
521    pub type Splp2 = crate::EnumBitfieldStruct<u8, Splp2_SPEC>;
522    impl Splp2 {
523        #[doc = "Normal mode"]
524        pub const _0: Self = Self::new(0);
525        #[doc = "Loopback mode (receive data = transmit data)"]
526        pub const _1: Self = Self::new(1);
527    }
528    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
529    pub struct Moifv_SPEC;
530    pub type Moifv = crate::EnumBitfieldStruct<u8, Moifv_SPEC>;
531    impl Moifv {
532        #[doc = "Set level output on MOSIn pin during MOSI idling to low"]
533        pub const _0: Self = Self::new(0);
534        #[doc = "Set level output on MOSIn pin during MOSI idling to high"]
535        pub const _1: Self = Self::new(1);
536    }
537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
538    pub struct Moife_SPEC;
539    pub type Moife = crate::EnumBitfieldStruct<u8, Moife_SPEC>;
540    impl Moife {
541        #[doc = "Set MOSI output value to equal final data from previous transfer"]
542        pub const _0: Self = Self::new(0);
543        #[doc = "Set MOSI output value to equal value set in the MOIFV bit"]
544        pub const _1: Self = Self::new(1);
545    }
546}
547#[doc(hidden)]
548#[derive(Copy, Clone, Eq, PartialEq)]
549pub struct Spsr_SPEC;
550impl crate::sealed::RegSpec for Spsr_SPEC {
551    type DataType = u8;
552}
553#[doc = "SPI Status Register"]
554pub type Spsr = crate::RegValueT<Spsr_SPEC>;
555
556impl Spsr {
557    #[doc = "Overrun Error Flag"]
558    #[inline(always)]
559    pub fn ovrf(
560        self,
561    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spsr::Ovrf, Spsr_SPEC, crate::common::RW> {
562        crate::common::RegisterField::<0,0x1,1,0,spsr::Ovrf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
563    }
564    #[doc = "SPI Idle Flag"]
565    #[inline(always)]
566    pub fn idlnf(
567        self,
568    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spsr::Idlnf, Spsr_SPEC, crate::common::R> {
569        crate::common::RegisterField::<1,0x1,1,0,spsr::Idlnf, Spsr_SPEC,crate::common::R>::from_register(self,0)
570    }
571    #[doc = "Mode Fault Error Flag"]
572    #[inline(always)]
573    pub fn modf(
574        self,
575    ) -> crate::common::RegisterField<2, 0x1, 1, 0, spsr::Modf, Spsr_SPEC, crate::common::RW> {
576        crate::common::RegisterField::<2,0x1,1,0,spsr::Modf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
577    }
578    #[doc = "Parity Error Flag"]
579    #[inline(always)]
580    pub fn perf(
581        self,
582    ) -> crate::common::RegisterField<3, 0x1, 1, 0, spsr::Perf, Spsr_SPEC, crate::common::RW> {
583        crate::common::RegisterField::<3,0x1,1,0,spsr::Perf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
584    }
585    #[doc = "Underrun Error Flag"]
586    #[inline(always)]
587    pub fn udrf(
588        self,
589    ) -> crate::common::RegisterField<4, 0x1, 1, 0, spsr::Udrf, Spsr_SPEC, crate::common::RW> {
590        crate::common::RegisterField::<4,0x1,1,0,spsr::Udrf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
591    }
592    #[doc = "SPI Transmit Buffer Empty Flag"]
593    #[inline(always)]
594    pub fn sptef(
595        self,
596    ) -> crate::common::RegisterField<5, 0x1, 1, 0, spsr::Sptef, Spsr_SPEC, crate::common::RW> {
597        crate::common::RegisterField::<5,0x1,1,0,spsr::Sptef, Spsr_SPEC,crate::common::RW>::from_register(self,0)
598    }
599    #[doc = "Communication End Flag"]
600    #[inline(always)]
601    pub fn cendf(
602        self,
603    ) -> crate::common::RegisterField<6, 0x1, 1, 0, spsr::Cendf, Spsr_SPEC, crate::common::RW> {
604        crate::common::RegisterField::<6,0x1,1,0,spsr::Cendf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
605    }
606    #[doc = "SPI Receive Buffer Full Flag"]
607    #[inline(always)]
608    pub fn sprf(
609        self,
610    ) -> crate::common::RegisterField<7, 0x1, 1, 0, spsr::Sprf, Spsr_SPEC, crate::common::RW> {
611        crate::common::RegisterField::<7,0x1,1,0,spsr::Sprf, Spsr_SPEC,crate::common::RW>::from_register(self,0)
612    }
613}
614impl ::core::default::Default for Spsr {
615    #[inline(always)]
616    fn default() -> Spsr {
617        <crate::RegValueT<Spsr_SPEC> as RegisterValue<_>>::new(32)
618    }
619}
620pub mod spsr {
621
622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
623    pub struct Ovrf_SPEC;
624    pub type Ovrf = crate::EnumBitfieldStruct<u8, Ovrf_SPEC>;
625    impl Ovrf {
626        #[doc = "No overrun error occurred"]
627        pub const _0: Self = Self::new(0);
628        #[doc = "Overrun error occurred"]
629        pub const _1: Self = Self::new(1);
630    }
631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
632    pub struct Idlnf_SPEC;
633    pub type Idlnf = crate::EnumBitfieldStruct<u8, Idlnf_SPEC>;
634    impl Idlnf {
635        #[doc = "SPI is in the idle state"]
636        pub const _0: Self = Self::new(0);
637        #[doc = "SPI is in the transfer state"]
638        pub const _1: Self = Self::new(1);
639    }
640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
641    pub struct Modf_SPEC;
642    pub type Modf = crate::EnumBitfieldStruct<u8, Modf_SPEC>;
643    impl Modf {
644        #[doc = "No mode fault or underrun error occurred"]
645        pub const _0: Self = Self::new(0);
646        #[doc = "Mode fault error or underrun error occurred"]
647        pub const _1: Self = Self::new(1);
648    }
649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
650    pub struct Perf_SPEC;
651    pub type Perf = crate::EnumBitfieldStruct<u8, Perf_SPEC>;
652    impl Perf {
653        #[doc = "No parity error occurred"]
654        pub const _0: Self = Self::new(0);
655        #[doc = "Parity error occurred"]
656        pub const _1: Self = Self::new(1);
657    }
658    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
659    pub struct Udrf_SPEC;
660    pub type Udrf = crate::EnumBitfieldStruct<u8, Udrf_SPEC>;
661    impl Udrf {
662        #[doc = "Mode fault error occurred (MODF = 1)"]
663        pub const _0: Self = Self::new(0);
664        #[doc = "Underrun error occurred (MODF = 1)"]
665        pub const _1: Self = Self::new(1);
666    }
667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
668    pub struct Sptef_SPEC;
669    pub type Sptef = crate::EnumBitfieldStruct<u8, Sptef_SPEC>;
670    impl Sptef {
671        #[doc = "Data is in the transmit buffer"]
672        pub const _0: Self = Self::new(0);
673        #[doc = "No data is in the transmit buffer"]
674        pub const _1: Self = Self::new(1);
675    }
676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
677    pub struct Cendf_SPEC;
678    pub type Cendf = crate::EnumBitfieldStruct<u8, Cendf_SPEC>;
679    impl Cendf {
680        #[doc = "Not communicating or communicating"]
681        pub const _0: Self = Self::new(0);
682        #[doc = "Communication completed"]
683        pub const _1: Self = Self::new(1);
684    }
685    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
686    pub struct Sprf_SPEC;
687    pub type Sprf = crate::EnumBitfieldStruct<u8, Sprf_SPEC>;
688    impl Sprf {
689        #[doc = "No valid data is in SPDR/SPDR_HA"]
690        pub const _0: Self = Self::new(0);
691        #[doc = "Valid data is in SPDR/SPDR_HA"]
692        pub const _1: Self = Self::new(1);
693    }
694}
695#[doc(hidden)]
696#[derive(Copy, Clone, Eq, PartialEq)]
697pub struct Spdr_SPEC;
698impl crate::sealed::RegSpec for Spdr_SPEC {
699    type DataType = u32;
700}
701#[doc = "SPI Data Register"]
702pub type Spdr = crate::RegValueT<Spdr_SPEC>;
703
704impl NoBitfieldReg<Spdr_SPEC> for Spdr {}
705impl ::core::default::Default for Spdr {
706    #[inline(always)]
707    fn default() -> Spdr {
708        <crate::RegValueT<Spdr_SPEC> as RegisterValue<_>>::new(0)
709    }
710}
711
712#[doc(hidden)]
713#[derive(Copy, Clone, Eq, PartialEq)]
714pub struct SpdrHa_SPEC;
715impl crate::sealed::RegSpec for SpdrHa_SPEC {
716    type DataType = u16;
717}
718#[doc = "SPI Data Register"]
719pub type SpdrHa = crate::RegValueT<SpdrHa_SPEC>;
720
721impl NoBitfieldReg<SpdrHa_SPEC> for SpdrHa {}
722impl ::core::default::Default for SpdrHa {
723    #[inline(always)]
724    fn default() -> SpdrHa {
725        <crate::RegValueT<SpdrHa_SPEC> as RegisterValue<_>>::new(0)
726    }
727}
728
729#[doc(hidden)]
730#[derive(Copy, Clone, Eq, PartialEq)]
731pub struct SpdrBy_SPEC;
732impl crate::sealed::RegSpec for SpdrBy_SPEC {
733    type DataType = u8;
734}
735#[doc = "SPI Data Register"]
736pub type SpdrBy = crate::RegValueT<SpdrBy_SPEC>;
737
738impl NoBitfieldReg<SpdrBy_SPEC> for SpdrBy {}
739impl ::core::default::Default for SpdrBy {
740    #[inline(always)]
741    fn default() -> SpdrBy {
742        <crate::RegValueT<SpdrBy_SPEC> as RegisterValue<_>>::new(0)
743    }
744}
745
746#[doc(hidden)]
747#[derive(Copy, Clone, Eq, PartialEq)]
748pub struct Spscr_SPEC;
749impl crate::sealed::RegSpec for Spscr_SPEC {
750    type DataType = u8;
751}
752#[doc = "SPI Sequence Control Register"]
753pub type Spscr = crate::RegValueT<Spscr_SPEC>;
754
755impl Spscr {
756    #[doc = "SPI Sequence Length Specification"]
757    #[inline(always)]
758    pub fn spsln(
759        self,
760    ) -> crate::common::RegisterField<0, 0x7, 1, 0, spscr::Spsln, Spscr_SPEC, crate::common::RW>
761    {
762        crate::common::RegisterField::<0,0x7,1,0,spscr::Spsln, Spscr_SPEC,crate::common::RW>::from_register(self,0)
763    }
764}
765impl ::core::default::Default for Spscr {
766    #[inline(always)]
767    fn default() -> Spscr {
768        <crate::RegValueT<Spscr_SPEC> as RegisterValue<_>>::new(0)
769    }
770}
771pub mod spscr {
772
773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
774    pub struct Spsln_SPEC;
775    pub type Spsln = crate::EnumBitfieldStruct<u8, Spsln_SPEC>;
776    impl Spsln {
777        #[doc = "Sequence Length is 1 (Referenced SPCMDn, n = 0→0→…)"]
778        pub const _000: Self = Self::new(0);
779        #[doc = "Sequence Length is 2 (Referenced SPCMDn, n = 0→1→0→…)"]
780        pub const _001: Self = Self::new(1);
781        #[doc = "Sequence Length is 3 (Referenced SPCMDn, n = 0→1→2→0→…)"]
782        pub const _010: Self = Self::new(2);
783        #[doc = "Sequence Length is 4 (Referenced SPCMDn, n = 0→1→2→3→0→…)"]
784        pub const _011: Self = Self::new(3);
785        #[doc = "Sequence Length is 5 (Referenced SPCMDn, n = 0→1→2→3→4→0→…)"]
786        pub const _100: Self = Self::new(4);
787        #[doc = "Sequence Length is 6 (Referenced SPCMDn, n = 0→1→2→3→4→5→0→…)"]
788        pub const _101: Self = Self::new(5);
789        #[doc = "Sequence Length is 7 (Referenced SPCMDn, n = 0→1→2→3→4→5→6→0→…)"]
790        pub const _110: Self = Self::new(6);
791        #[doc = "Sequence Length is 8 (Referenced SPCMDn, n = 0→1→2→3→4→5→6→7→0→…)"]
792        pub const _111: Self = Self::new(7);
793    }
794}
795#[doc(hidden)]
796#[derive(Copy, Clone, Eq, PartialEq)]
797pub struct Spssr_SPEC;
798impl crate::sealed::RegSpec for Spssr_SPEC {
799    type DataType = u8;
800}
801#[doc = "SPI Sequence Status Register"]
802pub type Spssr = crate::RegValueT<Spssr_SPEC>;
803
804impl Spssr {
805    #[doc = "SPI Command Pointer"]
806    #[inline(always)]
807    pub fn spcp(
808        self,
809    ) -> crate::common::RegisterField<0, 0x7, 1, 0, spssr::Spcp, Spssr_SPEC, crate::common::R> {
810        crate::common::RegisterField::<0,0x7,1,0,spssr::Spcp, Spssr_SPEC,crate::common::R>::from_register(self,0)
811    }
812    #[doc = "SPI Error Command"]
813    #[inline(always)]
814    pub fn specm(
815        self,
816    ) -> crate::common::RegisterField<4, 0x7, 1, 0, spssr::Specm, Spssr_SPEC, crate::common::R>
817    {
818        crate::common::RegisterField::<4,0x7,1,0,spssr::Specm, Spssr_SPEC,crate::common::R>::from_register(self,0)
819    }
820}
821impl ::core::default::Default for Spssr {
822    #[inline(always)]
823    fn default() -> Spssr {
824        <crate::RegValueT<Spssr_SPEC> as RegisterValue<_>>::new(0)
825    }
826}
827pub mod spssr {
828
829    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
830    pub struct Spcp_SPEC;
831    pub type Spcp = crate::EnumBitfieldStruct<u8, Spcp_SPEC>;
832    impl Spcp {
833        #[doc = "SPCMD0"]
834        pub const _000: Self = Self::new(0);
835        #[doc = "SPCMD1"]
836        pub const _001: Self = Self::new(1);
837        #[doc = "SPCMD2"]
838        pub const _010: Self = Self::new(2);
839        #[doc = "SPCMD3"]
840        pub const _011: Self = Self::new(3);
841        #[doc = "SPCMD4"]
842        pub const _100: Self = Self::new(4);
843        #[doc = "SPCMD5"]
844        pub const _101: Self = Self::new(5);
845        #[doc = "SPCMD6"]
846        pub const _110: Self = Self::new(6);
847        #[doc = "SPCMD7"]
848        pub const _111: Self = Self::new(7);
849    }
850    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
851    pub struct Specm_SPEC;
852    pub type Specm = crate::EnumBitfieldStruct<u8, Specm_SPEC>;
853    impl Specm {
854        #[doc = "SPCMD0"]
855        pub const _000: Self = Self::new(0);
856        #[doc = "SPCMD1"]
857        pub const _001: Self = Self::new(1);
858        #[doc = "SPCMD2"]
859        pub const _010: Self = Self::new(2);
860        #[doc = "SPCMD3"]
861        pub const _011: Self = Self::new(3);
862        #[doc = "SPCMD4"]
863        pub const _100: Self = Self::new(4);
864        #[doc = "SPCMD5"]
865        pub const _101: Self = Self::new(5);
866        #[doc = "SPCMD6"]
867        pub const _110: Self = Self::new(6);
868        #[doc = "SPCMD7"]
869        pub const _111: Self = Self::new(7);
870    }
871}
872#[doc(hidden)]
873#[derive(Copy, Clone, Eq, PartialEq)]
874pub struct Spbr_SPEC;
875impl crate::sealed::RegSpec for Spbr_SPEC {
876    type DataType = u8;
877}
878#[doc = "SPI Bit Rate Register"]
879pub type Spbr = crate::RegValueT<Spbr_SPEC>;
880
881impl NoBitfieldReg<Spbr_SPEC> for Spbr {}
882impl ::core::default::Default for Spbr {
883    #[inline(always)]
884    fn default() -> Spbr {
885        <crate::RegValueT<Spbr_SPEC> as RegisterValue<_>>::new(255)
886    }
887}
888
889#[doc(hidden)]
890#[derive(Copy, Clone, Eq, PartialEq)]
891pub struct Spdcr_SPEC;
892impl crate::sealed::RegSpec for Spdcr_SPEC {
893    type DataType = u8;
894}
895#[doc = "SPI Data Control Register"]
896pub type Spdcr = crate::RegValueT<Spdcr_SPEC>;
897
898impl Spdcr {
899    #[doc = "Number of Frames Specification"]
900    #[inline(always)]
901    pub fn spfc(
902        self,
903    ) -> crate::common::RegisterField<0, 0x3, 1, 0, spdcr::Spfc, Spdcr_SPEC, crate::common::RW>
904    {
905        crate::common::RegisterField::<0,0x3,1,0,spdcr::Spfc, Spdcr_SPEC,crate::common::RW>::from_register(self,0)
906    }
907    #[doc = "SPI Receive/Transmit Data Select"]
908    #[inline(always)]
909    pub fn sprdtd(
910        self,
911    ) -> crate::common::RegisterField<4, 0x1, 1, 0, spdcr::Sprdtd, Spdcr_SPEC, crate::common::RW>
912    {
913        crate::common::RegisterField::<4,0x1,1,0,spdcr::Sprdtd, Spdcr_SPEC,crate::common::RW>::from_register(self,0)
914    }
915    #[doc = "SPI Word Access/Halfword Access Specification"]
916    #[inline(always)]
917    pub fn splw(
918        self,
919    ) -> crate::common::RegisterField<5, 0x1, 1, 0, spdcr::Splw, Spdcr_SPEC, crate::common::RW>
920    {
921        crate::common::RegisterField::<5,0x1,1,0,spdcr::Splw, Spdcr_SPEC,crate::common::RW>::from_register(self,0)
922    }
923    #[doc = "SPI Byte Access Specification"]
924    #[inline(always)]
925    pub fn spbyt(
926        self,
927    ) -> crate::common::RegisterField<6, 0x1, 1, 0, spdcr::Spbyt, Spdcr_SPEC, crate::common::RW>
928    {
929        crate::common::RegisterField::<6,0x1,1,0,spdcr::Spbyt, Spdcr_SPEC,crate::common::RW>::from_register(self,0)
930    }
931}
932impl ::core::default::Default for Spdcr {
933    #[inline(always)]
934    fn default() -> Spdcr {
935        <crate::RegValueT<Spdcr_SPEC> as RegisterValue<_>>::new(0)
936    }
937}
938pub mod spdcr {
939
940    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
941    pub struct Spfc_SPEC;
942    pub type Spfc = crate::EnumBitfieldStruct<u8, Spfc_SPEC>;
943    impl Spfc {
944        #[doc = "1 frame"]
945        pub const _00: Self = Self::new(0);
946        #[doc = "2 frames"]
947        pub const _01: Self = Self::new(1);
948        #[doc = "3 frames"]
949        pub const _10: Self = Self::new(2);
950        #[doc = "4 frames"]
951        pub const _11: Self = Self::new(3);
952    }
953    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
954    pub struct Sprdtd_SPEC;
955    pub type Sprdtd = crate::EnumBitfieldStruct<u8, Sprdtd_SPEC>;
956    impl Sprdtd {
957        #[doc = "Read SPDR/SPDR_HA values from receive buffer"]
958        pub const _0: Self = Self::new(0);
959        #[doc = "Read SPDR/SPDR_HA values from transmit buffer, but only if the transmit buffer is empty"]
960        pub const _1: Self = Self::new(1);
961    }
962    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
963    pub struct Splw_SPEC;
964    pub type Splw = crate::EnumBitfieldStruct<u8, Splw_SPEC>;
965    impl Splw {
966        #[doc = "Set SPDR_HA to valid for halfword access"]
967        pub const _0: Self = Self::new(0);
968        #[doc = "Set SPDR to valid for word access"]
969        pub const _1: Self = Self::new(1);
970    }
971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
972    pub struct Spbyt_SPEC;
973    pub type Spbyt = crate::EnumBitfieldStruct<u8, Spbyt_SPEC>;
974    impl Spbyt {
975        #[doc = "SPDR/SPDR_HA is accessed in halfword or word (SPLW is valid)"]
976        pub const _0: Self = Self::new(0);
977        #[doc = "SPDR_BY is accessed in byte (SPLW is invalid)"]
978        pub const _1: Self = Self::new(1);
979    }
980}
981#[doc(hidden)]
982#[derive(Copy, Clone, Eq, PartialEq)]
983pub struct Spckd_SPEC;
984impl crate::sealed::RegSpec for Spckd_SPEC {
985    type DataType = u8;
986}
987#[doc = "SPI Clock Delay Register"]
988pub type Spckd = crate::RegValueT<Spckd_SPEC>;
989
990impl Spckd {
991    #[doc = "RSPCK Delay Setting"]
992    #[inline(always)]
993    pub fn sckdl(
994        self,
995    ) -> crate::common::RegisterField<0, 0x7, 1, 0, spckd::Sckdl, Spckd_SPEC, crate::common::RW>
996    {
997        crate::common::RegisterField::<0,0x7,1,0,spckd::Sckdl, Spckd_SPEC,crate::common::RW>::from_register(self,0)
998    }
999}
1000impl ::core::default::Default for Spckd {
1001    #[inline(always)]
1002    fn default() -> Spckd {
1003        <crate::RegValueT<Spckd_SPEC> as RegisterValue<_>>::new(0)
1004    }
1005}
1006pub mod spckd {
1007
1008    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1009    pub struct Sckdl_SPEC;
1010    pub type Sckdl = crate::EnumBitfieldStruct<u8, Sckdl_SPEC>;
1011    impl Sckdl {
1012        #[doc = "1 RSPCK"]
1013        pub const _000: Self = Self::new(0);
1014        #[doc = "2 RSPCK"]
1015        pub const _001: Self = Self::new(1);
1016        #[doc = "3 RSPCK"]
1017        pub const _010: Self = Self::new(2);
1018        #[doc = "4 RSPCK"]
1019        pub const _011: Self = Self::new(3);
1020        #[doc = "5 RSPCK"]
1021        pub const _100: Self = Self::new(4);
1022        #[doc = "6 RSPCK"]
1023        pub const _101: Self = Self::new(5);
1024        #[doc = "7 RSPCK"]
1025        pub const _110: Self = Self::new(6);
1026        #[doc = "8 RSPCK"]
1027        pub const _111: Self = Self::new(7);
1028    }
1029}
1030#[doc(hidden)]
1031#[derive(Copy, Clone, Eq, PartialEq)]
1032pub struct Sslnd_SPEC;
1033impl crate::sealed::RegSpec for Sslnd_SPEC {
1034    type DataType = u8;
1035}
1036#[doc = "SPI Slave Select Negation Delay Register"]
1037pub type Sslnd = crate::RegValueT<Sslnd_SPEC>;
1038
1039impl Sslnd {
1040    #[doc = "SSL Negation Delay Setting"]
1041    #[inline(always)]
1042    pub fn slndl(
1043        self,
1044    ) -> crate::common::RegisterField<0, 0x7, 1, 0, sslnd::Slndl, Sslnd_SPEC, crate::common::RW>
1045    {
1046        crate::common::RegisterField::<0,0x7,1,0,sslnd::Slndl, Sslnd_SPEC,crate::common::RW>::from_register(self,0)
1047    }
1048}
1049impl ::core::default::Default for Sslnd {
1050    #[inline(always)]
1051    fn default() -> Sslnd {
1052        <crate::RegValueT<Sslnd_SPEC> as RegisterValue<_>>::new(0)
1053    }
1054}
1055pub mod sslnd {
1056
1057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1058    pub struct Slndl_SPEC;
1059    pub type Slndl = crate::EnumBitfieldStruct<u8, Slndl_SPEC>;
1060    impl Slndl {
1061        #[doc = "1 RSPCK"]
1062        pub const _000: Self = Self::new(0);
1063        #[doc = "2 RSPCK"]
1064        pub const _001: Self = Self::new(1);
1065        #[doc = "3 RSPCK"]
1066        pub const _010: Self = Self::new(2);
1067        #[doc = "4 RSPCK"]
1068        pub const _011: Self = Self::new(3);
1069        #[doc = "5 RSPCK"]
1070        pub const _100: Self = Self::new(4);
1071        #[doc = "6 RSPCK"]
1072        pub const _101: Self = Self::new(5);
1073        #[doc = "7 RSPCK"]
1074        pub const _110: Self = Self::new(6);
1075        #[doc = "8 RSPCK"]
1076        pub const _111: Self = Self::new(7);
1077    }
1078}
1079#[doc(hidden)]
1080#[derive(Copy, Clone, Eq, PartialEq)]
1081pub struct Spnd_SPEC;
1082impl crate::sealed::RegSpec for Spnd_SPEC {
1083    type DataType = u8;
1084}
1085#[doc = "SPI Next-Access Delay Register"]
1086pub type Spnd = crate::RegValueT<Spnd_SPEC>;
1087
1088impl Spnd {
1089    #[doc = "SPI Next-Access Delay Setting"]
1090    #[inline(always)]
1091    pub fn spndl(
1092        self,
1093    ) -> crate::common::RegisterField<0, 0x7, 1, 0, spnd::Spndl, Spnd_SPEC, crate::common::RW> {
1094        crate::common::RegisterField::<0,0x7,1,0,spnd::Spndl, Spnd_SPEC,crate::common::RW>::from_register(self,0)
1095    }
1096}
1097impl ::core::default::Default for Spnd {
1098    #[inline(always)]
1099    fn default() -> Spnd {
1100        <crate::RegValueT<Spnd_SPEC> as RegisterValue<_>>::new(0)
1101    }
1102}
1103pub mod spnd {
1104
1105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1106    pub struct Spndl_SPEC;
1107    pub type Spndl = crate::EnumBitfieldStruct<u8, Spndl_SPEC>;
1108    impl Spndl {
1109        #[doc = "1 RSPCK + 2 PCLKA"]
1110        pub const _000: Self = Self::new(0);
1111        #[doc = "2 RSPCK + 2 PCLKA"]
1112        pub const _001: Self = Self::new(1);
1113        #[doc = "3 RSPCK + 2 PCLKA"]
1114        pub const _010: Self = Self::new(2);
1115        #[doc = "4 RSPCK + 2 PCLKA"]
1116        pub const _011: Self = Self::new(3);
1117        #[doc = "5 RSPCK + 2 PCLKA"]
1118        pub const _100: Self = Self::new(4);
1119        #[doc = "6 RSPCK + 2 PCLKA"]
1120        pub const _101: Self = Self::new(5);
1121        #[doc = "7 RSPCK + 2 PCLKA"]
1122        pub const _110: Self = Self::new(6);
1123        #[doc = "8 RSPCK + 2 PCLKA"]
1124        pub const _111: Self = Self::new(7);
1125    }
1126}
1127#[doc(hidden)]
1128#[derive(Copy, Clone, Eq, PartialEq)]
1129pub struct Spcr2_SPEC;
1130impl crate::sealed::RegSpec for Spcr2_SPEC {
1131    type DataType = u8;
1132}
1133#[doc = "SPI Control Register 2"]
1134pub type Spcr2 = crate::RegValueT<Spcr2_SPEC>;
1135
1136impl Spcr2 {
1137    #[doc = "Parity Enable"]
1138    #[inline(always)]
1139    pub fn sppe(
1140        self,
1141    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spcr2::Sppe, Spcr2_SPEC, crate::common::RW>
1142    {
1143        crate::common::RegisterField::<0,0x1,1,0,spcr2::Sppe, Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1144    }
1145    #[doc = "Parity Mode"]
1146    #[inline(always)]
1147    pub fn spoe(
1148        self,
1149    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spcr2::Spoe, Spcr2_SPEC, crate::common::RW>
1150    {
1151        crate::common::RegisterField::<1,0x1,1,0,spcr2::Spoe, Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1152    }
1153    #[doc = "SPI Idle Interrupt Enable"]
1154    #[inline(always)]
1155    pub fn spiie(
1156        self,
1157    ) -> crate::common::RegisterField<2, 0x1, 1, 0, spcr2::Spiie, Spcr2_SPEC, crate::common::RW>
1158    {
1159        crate::common::RegisterField::<2,0x1,1,0,spcr2::Spiie, Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1160    }
1161    #[doc = "Parity Self-Testing"]
1162    #[inline(always)]
1163    pub fn pte(
1164        self,
1165    ) -> crate::common::RegisterField<3, 0x1, 1, 0, spcr2::Pte, Spcr2_SPEC, crate::common::RW> {
1166        crate::common::RegisterField::<3,0x1,1,0,spcr2::Pte, Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1167    }
1168    #[doc = "RSPCK Auto-Stop Function Enable"]
1169    #[inline(always)]
1170    pub fn sckase(
1171        self,
1172    ) -> crate::common::RegisterField<4, 0x1, 1, 0, spcr2::Sckase, Spcr2_SPEC, crate::common::RW>
1173    {
1174        crate::common::RegisterField::<4,0x1,1,0,spcr2::Sckase, Spcr2_SPEC,crate::common::RW>::from_register(self,0)
1175    }
1176}
1177impl ::core::default::Default for Spcr2 {
1178    #[inline(always)]
1179    fn default() -> Spcr2 {
1180        <crate::RegValueT<Spcr2_SPEC> as RegisterValue<_>>::new(0)
1181    }
1182}
1183pub mod spcr2 {
1184
1185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1186    pub struct Sppe_SPEC;
1187    pub type Sppe = crate::EnumBitfieldStruct<u8, Sppe_SPEC>;
1188    impl Sppe {
1189        #[doc = "Do not add parity bit to transmit data and do not check parity bit of receive data"]
1190        pub const _0: Self = Self::new(0);
1191        #[doc = "When SPCR.TXMD = 0: Add parity bit to transmit data and check parity bit of receive data When SPCR.TXMD = 1: Add parity bit to transmit data but do not check parity bit of receive data"]
1192        pub const _1: Self = Self::new(1);
1193    }
1194    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1195    pub struct Spoe_SPEC;
1196    pub type Spoe = crate::EnumBitfieldStruct<u8, Spoe_SPEC>;
1197    impl Spoe {
1198        #[doc = "Select even parity for transmission and reception"]
1199        pub const _0: Self = Self::new(0);
1200        #[doc = "Select odd parity for transmission and reception"]
1201        pub const _1: Self = Self::new(1);
1202    }
1203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1204    pub struct Spiie_SPEC;
1205    pub type Spiie = crate::EnumBitfieldStruct<u8, Spiie_SPEC>;
1206    impl Spiie {
1207        #[doc = "Disable idle interrupt requests"]
1208        pub const _0: Self = Self::new(0);
1209        #[doc = "Enable idle interrupt requests"]
1210        pub const _1: Self = Self::new(1);
1211    }
1212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1213    pub struct Pte_SPEC;
1214    pub type Pte = crate::EnumBitfieldStruct<u8, Pte_SPEC>;
1215    impl Pte {
1216        #[doc = "Disable self-diagnosis function of the parity circuit"]
1217        pub const _0: Self = Self::new(0);
1218        #[doc = "Enable self-diagnosis function of the parity circuit"]
1219        pub const _1: Self = Self::new(1);
1220    }
1221    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1222    pub struct Sckase_SPEC;
1223    pub type Sckase = crate::EnumBitfieldStruct<u8, Sckase_SPEC>;
1224    impl Sckase {
1225        #[doc = "Disable RSPCK auto-stop function"]
1226        pub const _0: Self = Self::new(0);
1227        #[doc = "Enable RSPCK auto-stop function"]
1228        pub const _1: Self = Self::new(1);
1229    }
1230}
1231#[doc(hidden)]
1232#[derive(Copy, Clone, Eq, PartialEq)]
1233pub struct Spcmd_SPEC;
1234impl crate::sealed::RegSpec for Spcmd_SPEC {
1235    type DataType = u16;
1236}
1237#[doc = "SPI Command Register %s"]
1238pub type Spcmd = crate::RegValueT<Spcmd_SPEC>;
1239
1240impl Spcmd {
1241    #[doc = "RSPCK Phase Setting"]
1242    #[inline(always)]
1243    pub fn cpha(
1244        self,
1245    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spcmd::Cpha, Spcmd_SPEC, crate::common::RW>
1246    {
1247        crate::common::RegisterField::<0,0x1,1,0,spcmd::Cpha, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1248    }
1249    #[doc = "RSPCK Polarity Setting"]
1250    #[inline(always)]
1251    pub fn cpol(
1252        self,
1253    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spcmd::Cpol, Spcmd_SPEC, crate::common::RW>
1254    {
1255        crate::common::RegisterField::<1,0x1,1,0,spcmd::Cpol, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1256    }
1257    #[doc = "Bit Rate Division Setting"]
1258    #[inline(always)]
1259    pub fn brdv(
1260        self,
1261    ) -> crate::common::RegisterField<2, 0x3, 1, 0, spcmd::Brdv, Spcmd_SPEC, crate::common::RW>
1262    {
1263        crate::common::RegisterField::<2,0x3,1,0,spcmd::Brdv, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1264    }
1265    #[doc = "SSL Signal Assertion Setting"]
1266    #[inline(always)]
1267    pub fn ssla(
1268        self,
1269    ) -> crate::common::RegisterField<4, 0x7, 1, 0, spcmd::Ssla, Spcmd_SPEC, crate::common::RW>
1270    {
1271        crate::common::RegisterField::<4,0x7,1,0,spcmd::Ssla, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1272    }
1273    #[doc = "SSL Signal Level Keeping"]
1274    #[inline(always)]
1275    pub fn sslkp(
1276        self,
1277    ) -> crate::common::RegisterField<7, 0x1, 1, 0, spcmd::Sslkp, Spcmd_SPEC, crate::common::RW>
1278    {
1279        crate::common::RegisterField::<7,0x1,1,0,spcmd::Sslkp, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1280    }
1281    #[doc = "SPI Data Length Setting"]
1282    #[inline(always)]
1283    pub fn spb(
1284        self,
1285    ) -> crate::common::RegisterField<8, 0xf, 1, 0, spcmd::Spb, Spcmd_SPEC, crate::common::RW> {
1286        crate::common::RegisterField::<8,0xf,1,0,spcmd::Spb, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1287    }
1288    #[doc = "SPI LSB First"]
1289    #[inline(always)]
1290    pub fn lsbf(
1291        self,
1292    ) -> crate::common::RegisterField<12, 0x1, 1, 0, spcmd::Lsbf, Spcmd_SPEC, crate::common::RW>
1293    {
1294        crate::common::RegisterField::<12,0x1,1,0,spcmd::Lsbf, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1295    }
1296    #[doc = "SPI Next-Access Delay Enable"]
1297    #[inline(always)]
1298    pub fn spnden(
1299        self,
1300    ) -> crate::common::RegisterField<13, 0x1, 1, 0, spcmd::Spnden, Spcmd_SPEC, crate::common::RW>
1301    {
1302        crate::common::RegisterField::<13,0x1,1,0,spcmd::Spnden, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1303    }
1304    #[doc = "SSL Negation Delay Setting Enable"]
1305    #[inline(always)]
1306    pub fn slnden(
1307        self,
1308    ) -> crate::common::RegisterField<14, 0x1, 1, 0, spcmd::Slnden, Spcmd_SPEC, crate::common::RW>
1309    {
1310        crate::common::RegisterField::<14,0x1,1,0,spcmd::Slnden, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1311    }
1312    #[doc = "RSPCK Delay Setting Enable"]
1313    #[inline(always)]
1314    pub fn sckden(
1315        self,
1316    ) -> crate::common::RegisterField<15, 0x1, 1, 0, spcmd::Sckden, Spcmd_SPEC, crate::common::RW>
1317    {
1318        crate::common::RegisterField::<15,0x1,1,0,spcmd::Sckden, Spcmd_SPEC,crate::common::RW>::from_register(self,0)
1319    }
1320}
1321impl ::core::default::Default for Spcmd {
1322    #[inline(always)]
1323    fn default() -> Spcmd {
1324        <crate::RegValueT<Spcmd_SPEC> as RegisterValue<_>>::new(1805)
1325    }
1326}
1327pub mod spcmd {
1328
1329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1330    pub struct Cpha_SPEC;
1331    pub type Cpha = crate::EnumBitfieldStruct<u8, Cpha_SPEC>;
1332    impl Cpha {
1333        #[doc = "Select data sampling on leading edge, data change on trailing edge"]
1334        pub const _0: Self = Self::new(0);
1335        #[doc = "Select data change on leading edge, data sampling on trailing edge"]
1336        pub const _1: Self = Self::new(1);
1337    }
1338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1339    pub struct Cpol_SPEC;
1340    pub type Cpol = crate::EnumBitfieldStruct<u8, Cpol_SPEC>;
1341    impl Cpol {
1342        #[doc = "Set RSPCK low during idle"]
1343        pub const _0: Self = Self::new(0);
1344        #[doc = "Set RSPCK high during idle"]
1345        pub const _1: Self = Self::new(1);
1346    }
1347    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1348    pub struct Brdv_SPEC;
1349    pub type Brdv = crate::EnumBitfieldStruct<u8, Brdv_SPEC>;
1350    impl Brdv {
1351        #[doc = "Base bit rate"]
1352        pub const _00: Self = Self::new(0);
1353        #[doc = "Base bit rate divided by 2"]
1354        pub const _01: Self = Self::new(1);
1355        #[doc = "Base bit rate divided by 4"]
1356        pub const _10: Self = Self::new(2);
1357        #[doc = "Base bit rate divided by 8"]
1358        pub const _11: Self = Self::new(3);
1359    }
1360    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1361    pub struct Ssla_SPEC;
1362    pub type Ssla = crate::EnumBitfieldStruct<u8, Ssla_SPEC>;
1363    impl Ssla {
1364        #[doc = "SSL0"]
1365        pub const _000: Self = Self::new(0);
1366        #[doc = "SSL1"]
1367        pub const _001: Self = Self::new(1);
1368        #[doc = "SSL2"]
1369        pub const _010: Self = Self::new(2);
1370        #[doc = "SSL3"]
1371        pub const _011: Self = Self::new(3);
1372        #[doc = "Setting prohibited"]
1373        pub const OTHERS: Self = Self::new(0);
1374    }
1375    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1376    pub struct Sslkp_SPEC;
1377    pub type Sslkp = crate::EnumBitfieldStruct<u8, Sslkp_SPEC>;
1378    impl Sslkp {
1379        #[doc = "Negate all SSL signals on completion of transfer"]
1380        pub const _0: Self = Self::new(0);
1381        #[doc = "Keep SSL signal level from the end of transfer until the beginning of the next access"]
1382        pub const _1: Self = Self::new(1);
1383    }
1384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1385    pub struct Spb_SPEC;
1386    pub type Spb = crate::EnumBitfieldStruct<u8, Spb_SPEC>;
1387    impl Spb {
1388        #[doc = "20 bits"]
1389        pub const _0_X_0: Self = Self::new(0);
1390        #[doc = "24 bits"]
1391        pub const _0_X_1: Self = Self::new(1);
1392        #[doc = "32 bits"]
1393        pub const _0_X_2: Self = Self::new(2);
1394        #[doc = "32 bits"]
1395        pub const _0_X_3: Self = Self::new(3);
1396        #[doc = "9 bits"]
1397        pub const _0_X_8: Self = Self::new(8);
1398        #[doc = "10 bits"]
1399        pub const _0_X_9: Self = Self::new(9);
1400        #[doc = "11 bits"]
1401        pub const _0_X_A: Self = Self::new(10);
1402        #[doc = "12 bits"]
1403        pub const _0_X_B: Self = Self::new(11);
1404        #[doc = "13 bits"]
1405        pub const _0_X_C: Self = Self::new(12);
1406        #[doc = "14 bits"]
1407        pub const _0_X_D: Self = Self::new(13);
1408        #[doc = "15 bits"]
1409        pub const _0_X_E: Self = Self::new(14);
1410        #[doc = "16 bits"]
1411        pub const _0_X_F: Self = Self::new(15);
1412        #[doc = "8 bits"]
1413        pub const OTHERS: Self = Self::new(0);
1414    }
1415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1416    pub struct Lsbf_SPEC;
1417    pub type Lsbf = crate::EnumBitfieldStruct<u8, Lsbf_SPEC>;
1418    impl Lsbf {
1419        #[doc = "MSB-first"]
1420        pub const _0: Self = Self::new(0);
1421        #[doc = "LSB-first"]
1422        pub const _1: Self = Self::new(1);
1423    }
1424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1425    pub struct Spnden_SPEC;
1426    pub type Spnden = crate::EnumBitfieldStruct<u8, Spnden_SPEC>;
1427    impl Spnden {
1428        #[doc = "Select next-access delay of 1 RSPCK + 2 PCLKA"]
1429        pub const _0: Self = Self::new(0);
1430        #[doc = "Select next-access delay equal to the setting in the SPI Next-Access Delay Register (SPND)"]
1431        pub const _1: Self = Self::new(1);
1432    }
1433    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1434    pub struct Slnden_SPEC;
1435    pub type Slnden = crate::EnumBitfieldStruct<u8, Slnden_SPEC>;
1436    impl Slnden {
1437        #[doc = "Select SSL negation delay of 1 RSPCK"]
1438        pub const _0: Self = Self::new(0);
1439        #[doc = "Select SSL negation delay equal to the setting in the SPI Slave Select Negation Delay Register (SSLND)"]
1440        pub const _1: Self = Self::new(1);
1441    }
1442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1443    pub struct Sckden_SPEC;
1444    pub type Sckden = crate::EnumBitfieldStruct<u8, Sckden_SPEC>;
1445    impl Sckden {
1446        #[doc = "Select RSPCK delay of 1 RSPCK"]
1447        pub const _0: Self = Self::new(0);
1448        #[doc = "Select RSPCK delay equal to the setting in the SPI Clock Delay Register (SPCKD)"]
1449        pub const _1: Self = Self::new(1);
1450    }
1451}
1452#[doc(hidden)]
1453#[derive(Copy, Clone, Eq, PartialEq)]
1454pub struct Spdcr2_SPEC;
1455impl crate::sealed::RegSpec for Spdcr2_SPEC {
1456    type DataType = u8;
1457}
1458#[doc = "SPI Data Control Register 2"]
1459pub type Spdcr2 = crate::RegValueT<Spdcr2_SPEC>;
1460
1461impl Spdcr2 {
1462    #[doc = "Byte Swap Operating Mode Select"]
1463    #[inline(always)]
1464    pub fn bysw(
1465        self,
1466    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spdcr2::Bysw, Spdcr2_SPEC, crate::common::RW>
1467    {
1468        crate::common::RegisterField::<0,0x1,1,0,spdcr2::Bysw, Spdcr2_SPEC,crate::common::RW>::from_register(self,0)
1469    }
1470    #[doc = "Serial Data Invert Bit"]
1471    #[inline(always)]
1472    pub fn sinv(
1473        self,
1474    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spdcr2::Sinv, Spdcr2_SPEC, crate::common::RW>
1475    {
1476        crate::common::RegisterField::<1,0x1,1,0,spdcr2::Sinv, Spdcr2_SPEC,crate::common::RW>::from_register(self,0)
1477    }
1478}
1479impl ::core::default::Default for Spdcr2 {
1480    #[inline(always)]
1481    fn default() -> Spdcr2 {
1482        <crate::RegValueT<Spdcr2_SPEC> as RegisterValue<_>>::new(0)
1483    }
1484}
1485pub mod spdcr2 {
1486
1487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1488    pub struct Bysw_SPEC;
1489    pub type Bysw = crate::EnumBitfieldStruct<u8, Bysw_SPEC>;
1490    impl Bysw {
1491        #[doc = "Byte Swap OFF"]
1492        pub const _0: Self = Self::new(0);
1493        #[doc = "Byte Swap ON"]
1494        pub const _1: Self = Self::new(1);
1495    }
1496    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1497    pub struct Sinv_SPEC;
1498    pub type Sinv = crate::EnumBitfieldStruct<u8, Sinv_SPEC>;
1499    impl Sinv {
1500        #[doc = "Not invert serial data"]
1501        pub const _0: Self = Self::new(0);
1502        #[doc = "Invert serial data"]
1503        pub const _1: Self = Self::new(1);
1504    }
1505}
1506#[doc(hidden)]
1507#[derive(Copy, Clone, Eq, PartialEq)]
1508pub struct Spcr3_SPEC;
1509impl crate::sealed::RegSpec for Spcr3_SPEC {
1510    type DataType = u8;
1511}
1512#[doc = "SPI Control Register 3"]
1513pub type Spcr3 = crate::RegValueT<Spcr3_SPEC>;
1514
1515impl Spcr3 {
1516    #[doc = "Extended Communication Mode Select"]
1517    #[inline(always)]
1518    pub fn etxmd(
1519        self,
1520    ) -> crate::common::RegisterField<0, 0x1, 1, 0, spcr3::Etxmd, Spcr3_SPEC, crate::common::RW>
1521    {
1522        crate::common::RegisterField::<0,0x1,1,0,spcr3::Etxmd, Spcr3_SPEC,crate::common::RW>::from_register(self,0)
1523    }
1524    #[doc = "Between Burst Transfer Frames Delay Select"]
1525    #[inline(always)]
1526    pub fn bfds(
1527        self,
1528    ) -> crate::common::RegisterField<1, 0x1, 1, 0, spcr3::Bfds, Spcr3_SPEC, crate::common::RW>
1529    {
1530        crate::common::RegisterField::<1,0x1,1,0,spcr3::Bfds, Spcr3_SPEC,crate::common::RW>::from_register(self,0)
1531    }
1532    #[doc = "SPI Communication End Interrupt Enable"]
1533    #[inline(always)]
1534    pub fn cendie(
1535        self,
1536    ) -> crate::common::RegisterField<4, 0x1, 1, 0, spcr3::Cendie, Spcr3_SPEC, crate::common::RW>
1537    {
1538        crate::common::RegisterField::<4,0x1,1,0,spcr3::Cendie, Spcr3_SPEC,crate::common::RW>::from_register(self,0)
1539    }
1540}
1541impl ::core::default::Default for Spcr3 {
1542    #[inline(always)]
1543    fn default() -> Spcr3 {
1544        <crate::RegValueT<Spcr3_SPEC> as RegisterValue<_>>::new(0)
1545    }
1546}
1547pub mod spcr3 {
1548
1549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1550    pub struct Etxmd_SPEC;
1551    pub type Etxmd = crate::EnumBitfieldStruct<u8, Etxmd_SPEC>;
1552    impl Etxmd {
1553        #[doc = "Full-duplex synchronous or transmit-only serial communications. \\[the SPCR.TXMD bit is enabled\\]"]
1554        pub const _0: Self = Self::new(0);
1555        #[doc = "Receive-only serial communications in slave mode (SPCR.MSTR bit = 0). \\[the SPCR.TXMD bit is disabled\\] Setting is prohibited in master mode (SPCR.MSTR bit = 1)."]
1556        pub const _1: Self = Self::new(1);
1557    }
1558    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1559    pub struct Bfds_SPEC;
1560    pub type Bfds = crate::EnumBitfieldStruct<u8, Bfds_SPEC>;
1561    impl Bfds {
1562        #[doc = "Delay (RSPCK delay, SSL negation delay and next-access delay) between frames is inserted in burst transfer."]
1563        pub const _0: Self = Self::new(0);
1564        #[doc = "Delay between frames is not inserted in burst transfer."]
1565        pub const _1: Self = Self::new(1);
1566    }
1567    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1568    pub struct Cendie_SPEC;
1569    pub type Cendie = crate::EnumBitfieldStruct<u8, Cendie_SPEC>;
1570    impl Cendie {
1571        #[doc = "Communication end interrupt request is disabled."]
1572        pub const _0: Self = Self::new(0);
1573        #[doc = "Communication end interrupt request is enabled."]
1574        pub const _1: Self = Self::new(1);
1575    }
1576}
ra4e2_pac/spi0.rs

ra4e2_pac/
spi0.rs
