1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Renesas Memory Protection Unit"]
28unsafe impl ::core::marker::Send for super::Rmpu {}
29unsafe impl ::core::marker::Sync for super::Rmpu {}
30impl super::Rmpu {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36 #[doc = "MMPU Operation After Detection Register"]
37 #[inline(always)]
38 pub const fn mmpuoad(
39 &self,
40 ) -> &'static crate::common::Reg<self::Mmpuoad_SPEC, crate::common::RW> {
41 unsafe {
42 crate::common::Reg::<self::Mmpuoad_SPEC, crate::common::RW>::from_ptr(
43 self._svd2pac_as_ptr().add(0usize),
44 )
45 }
46 }
47
48 #[doc = "MMPU Operation After Detection Protect Register"]
49 #[inline(always)]
50 pub const fn mmpuoadpt(
51 &self,
52 ) -> &'static crate::common::Reg<self::Mmpuoadpt_SPEC, crate::common::RW> {
53 unsafe {
54 crate::common::Reg::<self::Mmpuoadpt_SPEC, crate::common::RW>::from_ptr(
55 self._svd2pac_as_ptr().add(4usize),
56 )
57 }
58 }
59
60 #[doc = "MMPU Enable Register for DMAC"]
61 #[inline(always)]
62 pub const fn mmpuendmac(
63 &self,
64 ) -> &'static crate::common::Reg<self::Mmpuendmac_SPEC, crate::common::RW> {
65 unsafe {
66 crate::common::Reg::<self::Mmpuendmac_SPEC, crate::common::RW>::from_ptr(
67 self._svd2pac_as_ptr().add(256usize),
68 )
69 }
70 }
71
72 #[doc = "MMPU Enable Protect Register for DMAC"]
73 #[inline(always)]
74 pub const fn mmpuenptdmac(
75 &self,
76 ) -> &'static crate::common::Reg<self::Mmpuenptdmac_SPEC, crate::common::RW> {
77 unsafe {
78 crate::common::Reg::<self::Mmpuenptdmac_SPEC, crate::common::RW>::from_ptr(
79 self._svd2pac_as_ptr().add(260usize),
80 )
81 }
82 }
83
84 #[doc = "MMPU Regions Protect Register for DMAC"]
85 #[inline(always)]
86 pub const fn mmpurptdmac(
87 &self,
88 ) -> &'static crate::common::Reg<self::Mmpurptdmac_SPEC, crate::common::RW> {
89 unsafe {
90 crate::common::Reg::<self::Mmpurptdmac_SPEC, crate::common::RW>::from_ptr(
91 self._svd2pac_as_ptr().add(264usize),
92 )
93 }
94 }
95
96 #[doc = "MMPU Regions Protect register for DMAC Secure"]
97 #[inline(always)]
98 pub const fn mmpurptdmac_sec(
99 &self,
100 ) -> &'static crate::common::Reg<self::MmpurptdmacSec_SPEC, crate::common::RW> {
101 unsafe {
102 crate::common::Reg::<self::MmpurptdmacSec_SPEC, crate::common::RW>::from_ptr(
103 self._svd2pac_as_ptr().add(268usize),
104 )
105 }
106 }
107
108 #[doc = "MMPU Access Control Register for DMAC"]
109 #[inline(always)]
110 pub const fn mmpuacdmac(
111 &self,
112 ) -> &'static crate::common::ClusterRegisterArray<
113 crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW>,
114 8,
115 0x10,
116 > {
117 unsafe {
118 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
119 }
120 }
121
122 #[doc = "MMPU Start Address Register for DMAC"]
123 #[inline(always)]
124 pub const fn mmpusdmac(
125 &self,
126 ) -> &'static crate::common::ClusterRegisterArray<
127 crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW>,
128 8,
129 0x10,
130 > {
131 unsafe {
132 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
133 }
134 }
135
136 #[doc = "MMPU End Address Register for DMAC"]
137 #[inline(always)]
138 pub const fn mmpuedmac(
139 &self,
140 ) -> &'static crate::common::ClusterRegisterArray<
141 crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW>,
142 8,
143 0x10,
144 > {
145 unsafe {
146 crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
147 }
148 }
149}
150#[doc(hidden)]
151#[derive(Copy, Clone, Eq, PartialEq)]
152pub struct Mmpuoad_SPEC;
153impl crate::sealed::RegSpec for Mmpuoad_SPEC {
154 type DataType = u16;
155}
156#[doc = "MMPU Operation After Detection Register"]
157pub type Mmpuoad = crate::RegValueT<Mmpuoad_SPEC>;
158
159impl Mmpuoad {
160 #[doc = "Operation after detection"]
161 #[inline(always)]
162 pub fn oad(
163 self,
164 ) -> crate::common::RegisterField<0, 0x1, 1, 0, mmpuoad::Oad, Mmpuoad_SPEC, crate::common::RW>
165 {
166 crate::common::RegisterField::<0,0x1,1,0,mmpuoad::Oad, Mmpuoad_SPEC,crate::common::RW>::from_register(self,0)
167 }
168 #[doc = "This bit enables or disables writes to the OAD bit."]
169 #[inline(always)]
170 pub fn key(
171 self,
172 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Mmpuoad_SPEC, crate::common::W> {
173 crate::common::RegisterField::<8,0xff,1,0,u8, Mmpuoad_SPEC,crate::common::W>::from_register(self,0)
174 }
175}
176impl ::core::default::Default for Mmpuoad {
177 #[inline(always)]
178 fn default() -> Mmpuoad {
179 <crate::RegValueT<Mmpuoad_SPEC> as RegisterValue<_>>::new(0)
180 }
181}
182pub mod mmpuoad {
183
184 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
185 pub struct Oad_SPEC;
186 pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
187 impl Oad {
188 #[doc = "Non-maskable interrupt"]
189 pub const _0: Self = Self::new(0);
190 #[doc = "Reset"]
191 pub const _1: Self = Self::new(1);
192 }
193}
194#[doc(hidden)]
195#[derive(Copy, Clone, Eq, PartialEq)]
196pub struct Mmpuoadpt_SPEC;
197impl crate::sealed::RegSpec for Mmpuoadpt_SPEC {
198 type DataType = u16;
199}
200#[doc = "MMPU Operation After Detection Protect Register"]
201pub type Mmpuoadpt = crate::RegValueT<Mmpuoadpt_SPEC>;
202
203impl Mmpuoadpt {
204 #[doc = "Protection of register"]
205 #[inline(always)]
206 pub fn protect(
207 self,
208 ) -> crate::common::RegisterField<
209 0,
210 0x1,
211 1,
212 0,
213 mmpuoadpt::Protect,
214 Mmpuoadpt_SPEC,
215 crate::common::RW,
216 > {
217 crate::common::RegisterField::<
218 0,
219 0x1,
220 1,
221 0,
222 mmpuoadpt::Protect,
223 Mmpuoadpt_SPEC,
224 crate::common::RW,
225 >::from_register(self, 0)
226 }
227 #[doc = "Key code"]
228 #[inline(always)]
229 pub fn key(
230 self,
231 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Mmpuoadpt_SPEC, crate::common::W> {
232 crate::common::RegisterField::<8,0xff,1,0,u8, Mmpuoadpt_SPEC,crate::common::W>::from_register(self,0)
233 }
234}
235impl ::core::default::Default for Mmpuoadpt {
236 #[inline(always)]
237 fn default() -> Mmpuoadpt {
238 <crate::RegValueT<Mmpuoadpt_SPEC> as RegisterValue<_>>::new(0)
239 }
240}
241pub mod mmpuoadpt {
242
243 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
244 pub struct Protect_SPEC;
245 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
246 impl Protect {
247 #[doc = "MMPUOAD register writes are possible."]
248 pub const _0: Self = Self::new(0);
249 #[doc = "MMPUOAD register writes are protected. Read is possible."]
250 pub const _1: Self = Self::new(1);
251 }
252}
253#[doc(hidden)]
254#[derive(Copy, Clone, Eq, PartialEq)]
255pub struct Mmpuendmac_SPEC;
256impl crate::sealed::RegSpec for Mmpuendmac_SPEC {
257 type DataType = u16;
258}
259#[doc = "MMPU Enable Register for DMAC"]
260pub type Mmpuendmac = crate::RegValueT<Mmpuendmac_SPEC>;
261
262impl Mmpuendmac {
263 #[doc = "Bus Master MPU of DMAC enable"]
264 #[inline(always)]
265 pub fn enable(
266 self,
267 ) -> crate::common::RegisterField<
268 0,
269 0x1,
270 1,
271 0,
272 mmpuendmac::Enable,
273 Mmpuendmac_SPEC,
274 crate::common::RW,
275 > {
276 crate::common::RegisterField::<
277 0,
278 0x1,
279 1,
280 0,
281 mmpuendmac::Enable,
282 Mmpuendmac_SPEC,
283 crate::common::RW,
284 >::from_register(self, 0)
285 }
286 #[doc = "These bits enable or disable writes to the ENABLE bit."]
287 #[inline(always)]
288 pub fn key(
289 self,
290 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Mmpuendmac_SPEC, crate::common::W> {
291 crate::common::RegisterField::<8,0xff,1,0,u8, Mmpuendmac_SPEC,crate::common::W>::from_register(self,0)
292 }
293}
294impl ::core::default::Default for Mmpuendmac {
295 #[inline(always)]
296 fn default() -> Mmpuendmac {
297 <crate::RegValueT<Mmpuendmac_SPEC> as RegisterValue<_>>::new(0)
298 }
299}
300pub mod mmpuendmac {
301
302 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
303 pub struct Enable_SPEC;
304 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
305 impl Enable {
306 #[doc = "Bus Master MPU of DMAC is disabled."]
307 pub const _0: Self = Self::new(0);
308 #[doc = "Bus Master MPU of DMAC is enabled."]
309 pub const _1: Self = Self::new(1);
310 }
311}
312#[doc(hidden)]
313#[derive(Copy, Clone, Eq, PartialEq)]
314pub struct Mmpuenptdmac_SPEC;
315impl crate::sealed::RegSpec for Mmpuenptdmac_SPEC {
316 type DataType = u16;
317}
318#[doc = "MMPU Enable Protect Register for DMAC"]
319pub type Mmpuenptdmac = crate::RegValueT<Mmpuenptdmac_SPEC>;
320
321impl Mmpuenptdmac {
322 #[doc = "Protection of register"]
323 #[inline(always)]
324 pub fn protect(
325 self,
326 ) -> crate::common::RegisterField<
327 0,
328 0x1,
329 1,
330 0,
331 mmpuenptdmac::Protect,
332 Mmpuenptdmac_SPEC,
333 crate::common::RW,
334 > {
335 crate::common::RegisterField::<
336 0,
337 0x1,
338 1,
339 0,
340 mmpuenptdmac::Protect,
341 Mmpuenptdmac_SPEC,
342 crate::common::RW,
343 >::from_register(self, 0)
344 }
345 #[doc = "These bits enable or disable writes to the PROTECT bit."]
346 #[inline(always)]
347 pub fn key(
348 self,
349 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Mmpuenptdmac_SPEC, crate::common::W> {
350 crate::common::RegisterField::<8,0xff,1,0,u8, Mmpuenptdmac_SPEC,crate::common::W>::from_register(self,0)
351 }
352}
353impl ::core::default::Default for Mmpuenptdmac {
354 #[inline(always)]
355 fn default() -> Mmpuenptdmac {
356 <crate::RegValueT<Mmpuenptdmac_SPEC> as RegisterValue<_>>::new(0)
357 }
358}
359pub mod mmpuenptdmac {
360
361 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
362 pub struct Protect_SPEC;
363 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
364 impl Protect {
365 #[doc = "MMPUENDMAC register writes are possible."]
366 pub const _0: Self = Self::new(0);
367 #[doc = "MMPUENDMAC register writes are protected. Read is possible."]
368 pub const _1: Self = Self::new(1);
369 }
370}
371#[doc(hidden)]
372#[derive(Copy, Clone, Eq, PartialEq)]
373pub struct Mmpurptdmac_SPEC;
374impl crate::sealed::RegSpec for Mmpurptdmac_SPEC {
375 type DataType = u16;
376}
377#[doc = "MMPU Regions Protect Register for DMAC"]
378pub type Mmpurptdmac = crate::RegValueT<Mmpurptdmac_SPEC>;
379
380impl Mmpurptdmac {
381 #[doc = "Protection of register"]
382 #[inline(always)]
383 pub fn protect(
384 self,
385 ) -> crate::common::RegisterField<
386 0,
387 0x1,
388 1,
389 0,
390 mmpurptdmac::Protect,
391 Mmpurptdmac_SPEC,
392 crate::common::RW,
393 > {
394 crate::common::RegisterField::<
395 0,
396 0x1,
397 1,
398 0,
399 mmpurptdmac::Protect,
400 Mmpurptdmac_SPEC,
401 crate::common::RW,
402 >::from_register(self, 0)
403 }
404 #[doc = "These bits enable or disable writes to the PROTECT bit."]
405 #[inline(always)]
406 pub fn key(
407 self,
408 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Mmpurptdmac_SPEC, crate::common::W> {
409 crate::common::RegisterField::<8,0xff,1,0,u8, Mmpurptdmac_SPEC,crate::common::W>::from_register(self,0)
410 }
411}
412impl ::core::default::Default for Mmpurptdmac {
413 #[inline(always)]
414 fn default() -> Mmpurptdmac {
415 <crate::RegValueT<Mmpurptdmac_SPEC> as RegisterValue<_>>::new(0)
416 }
417}
418pub mod mmpurptdmac {
419
420 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421 pub struct Protect_SPEC;
422 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
423 impl Protect {
424 #[doc = "Bus Master MPU register for DMAC writing is possible."]
425 pub const _0: Self = Self::new(0);
426 #[doc = "Bus Master MPU register for DMAC writing is protected. Read is possible."]
427 pub const _1: Self = Self::new(1);
428 }
429}
430#[doc(hidden)]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct MmpurptdmacSec_SPEC;
433impl crate::sealed::RegSpec for MmpurptdmacSec_SPEC {
434 type DataType = u16;
435}
436#[doc = "MMPU Regions Protect register for DMAC Secure"]
437pub type MmpurptdmacSec = crate::RegValueT<MmpurptdmacSec_SPEC>;
438
439impl MmpurptdmacSec {
440 #[doc = "Protection of register"]
441 #[inline(always)]
442 pub fn protect(
443 self,
444 ) -> crate::common::RegisterField<
445 0,
446 0x1,
447 1,
448 0,
449 mmpurptdmac_sec::Protect,
450 MmpurptdmacSec_SPEC,
451 crate::common::RW,
452 > {
453 crate::common::RegisterField::<
454 0,
455 0x1,
456 1,
457 0,
458 mmpurptdmac_sec::Protect,
459 MmpurptdmacSec_SPEC,
460 crate::common::RW,
461 >::from_register(self, 0)
462 }
463 #[doc = "These bits enable or disable writes to the PROTECT bit."]
464 #[inline(always)]
465 pub fn key(
466 self,
467 ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, MmpurptdmacSec_SPEC, crate::common::W>
468 {
469 crate::common::RegisterField::<8,0xff,1,0,u8, MmpurptdmacSec_SPEC,crate::common::W>::from_register(self,0)
470 }
471}
472impl ::core::default::Default for MmpurptdmacSec {
473 #[inline(always)]
474 fn default() -> MmpurptdmacSec {
475 <crate::RegValueT<MmpurptdmacSec_SPEC> as RegisterValue<_>>::new(0)
476 }
477}
478pub mod mmpurptdmac_sec {
479
480 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481 pub struct Protect_SPEC;
482 pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
483 impl Protect {
484 #[doc = "Bus master MPU register for DMAC secure writes are possible."]
485 pub const _0: Self = Self::new(0);
486 #[doc = "Bus master MPU register for DMAC secure writes are protected. Read is possible."]
487 pub const _1: Self = Self::new(1);
488 }
489}
490#[doc(hidden)]
491#[derive(Copy, Clone, Eq, PartialEq)]
492pub struct Mmpuacdmac_SPEC;
493impl crate::sealed::RegSpec for Mmpuacdmac_SPEC {
494 type DataType = u16;
495}
496#[doc = "MMPU Access Control Register for DMAC"]
497pub type Mmpuacdmac = crate::RegValueT<Mmpuacdmac_SPEC>;
498
499impl Mmpuacdmac {
500 #[doc = "Region enable"]
501 #[inline(always)]
502 pub fn enable(
503 self,
504 ) -> crate::common::RegisterField<
505 0,
506 0x1,
507 1,
508 0,
509 mmpuacdmac::Enable,
510 Mmpuacdmac_SPEC,
511 crate::common::RW,
512 > {
513 crate::common::RegisterField::<
514 0,
515 0x1,
516 1,
517 0,
518 mmpuacdmac::Enable,
519 Mmpuacdmac_SPEC,
520 crate::common::RW,
521 >::from_register(self, 0)
522 }
523 #[doc = "Read protection"]
524 #[inline(always)]
525 pub fn rp(
526 self,
527 ) -> crate::common::RegisterField<
528 1,
529 0x1,
530 1,
531 0,
532 mmpuacdmac::Rp,
533 Mmpuacdmac_SPEC,
534 crate::common::RW,
535 > {
536 crate::common::RegisterField::<
537 1,
538 0x1,
539 1,
540 0,
541 mmpuacdmac::Rp,
542 Mmpuacdmac_SPEC,
543 crate::common::RW,
544 >::from_register(self, 0)
545 }
546 #[doc = "Write protection"]
547 #[inline(always)]
548 pub fn wp(
549 self,
550 ) -> crate::common::RegisterField<
551 2,
552 0x1,
553 1,
554 0,
555 mmpuacdmac::Wp,
556 Mmpuacdmac_SPEC,
557 crate::common::RW,
558 > {
559 crate::common::RegisterField::<
560 2,
561 0x1,
562 1,
563 0,
564 mmpuacdmac::Wp,
565 Mmpuacdmac_SPEC,
566 crate::common::RW,
567 >::from_register(self, 0)
568 }
569}
570impl ::core::default::Default for Mmpuacdmac {
571 #[inline(always)]
572 fn default() -> Mmpuacdmac {
573 <crate::RegValueT<Mmpuacdmac_SPEC> as RegisterValue<_>>::new(0)
574 }
575}
576pub mod mmpuacdmac {
577
578 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
579 pub struct Enable_SPEC;
580 pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
581 impl Enable {
582 #[doc = "DMAC Region n unit is disabled"]
583 pub const _0: Self = Self::new(0);
584 #[doc = "DMAC Region n unit is enabled"]
585 pub const _1: Self = Self::new(1);
586 }
587 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
588 pub struct Rp_SPEC;
589 pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
590 impl Rp {
591 #[doc = "Read permission"]
592 pub const _0: Self = Self::new(0);
593 #[doc = "Read protection"]
594 pub const _1: Self = Self::new(1);
595 }
596 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
597 pub struct Wp_SPEC;
598 pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
599 impl Wp {
600 #[doc = "Write permission"]
601 pub const _0: Self = Self::new(0);
602 #[doc = "Write protection"]
603 pub const _1: Self = Self::new(1);
604 }
605}
606#[doc(hidden)]
607#[derive(Copy, Clone, Eq, PartialEq)]
608pub struct Mmpusdmac_SPEC;
609impl crate::sealed::RegSpec for Mmpusdmac_SPEC {
610 type DataType = u32;
611}
612#[doc = "MMPU Start Address Register for DMAC"]
613pub type Mmpusdmac = crate::RegValueT<Mmpusdmac_SPEC>;
614
615impl Mmpusdmac {
616 #[doc = "Region start address register"]
617 #[inline(always)]
618 pub fn mmpus(
619 self,
620 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, Mmpusdmac_SPEC, crate::common::RW>
621 {
622 crate::common::RegisterField::<5,0x7ffffff,1,0,u32, Mmpusdmac_SPEC,crate::common::RW>::from_register(self,0)
623 }
624}
625impl ::core::default::Default for Mmpusdmac {
626 #[inline(always)]
627 fn default() -> Mmpusdmac {
628 <crate::RegValueT<Mmpusdmac_SPEC> as RegisterValue<_>>::new(0)
629 }
630}
631
632#[doc(hidden)]
633#[derive(Copy, Clone, Eq, PartialEq)]
634pub struct Mmpuedmac_SPEC;
635impl crate::sealed::RegSpec for Mmpuedmac_SPEC {
636 type DataType = u32;
637}
638#[doc = "MMPU End Address Register for DMAC"]
639pub type Mmpuedmac = crate::RegValueT<Mmpuedmac_SPEC>;
640
641impl Mmpuedmac {
642 #[doc = "Region end address register"]
643 #[inline(always)]
644 pub fn mmpue(
645 self,
646 ) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, Mmpuedmac_SPEC, crate::common::RW>
647 {
648 crate::common::RegisterField::<5,0x7ffffff,1,0,u32, Mmpuedmac_SPEC,crate::common::RW>::from_register(self,0)
649 }
650}
651impl ::core::default::Default for Mmpuedmac {
652 #[inline(always)]
653 fn default() -> Mmpuedmac {
654 <crate::RegValueT<Mmpuedmac_SPEC> as RegisterValue<_>>::new(31)
655 }
656}