ra4e2_pac/
icu.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Interrupt Controller"]
28unsafe impl ::core::marker::Send for super::Icu {}
29unsafe impl ::core::marker::Sync for super::Icu {}
30impl super::Icu {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "IRQ Control Register %s"]
37    #[inline(always)]
38    pub const fn irqcr(
39        &self,
40    ) -> &'static crate::common::ClusterRegisterArray<
41        crate::common::Reg<self::Irqcr_SPEC, crate::common::RW>,
42        15,
43        0x1,
44    > {
45        unsafe {
46            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x0usize))
47        }
48    }
49
50    #[doc = "NMI Pin Interrupt Control Register"]
51    #[inline(always)]
52    pub const fn nmicr(&self) -> &'static crate::common::Reg<self::Nmicr_SPEC, crate::common::RW> {
53        unsafe {
54            crate::common::Reg::<self::Nmicr_SPEC, crate::common::RW>::from_ptr(
55                self._svd2pac_as_ptr().add(256usize),
56            )
57        }
58    }
59
60    #[doc = "Non-Maskable Interrupt Enable Register"]
61    #[inline(always)]
62    pub const fn nmier(&self) -> &'static crate::common::Reg<self::Nmier_SPEC, crate::common::RW> {
63        unsafe {
64            crate::common::Reg::<self::Nmier_SPEC, crate::common::RW>::from_ptr(
65                self._svd2pac_as_ptr().add(288usize),
66            )
67        }
68    }
69
70    #[doc = "Non-Maskable Interrupt Status Clear Register"]
71    #[inline(always)]
72    pub const fn nmiclr(
73        &self,
74    ) -> &'static crate::common::Reg<self::Nmiclr_SPEC, crate::common::RW> {
75        unsafe {
76            crate::common::Reg::<self::Nmiclr_SPEC, crate::common::RW>::from_ptr(
77                self._svd2pac_as_ptr().add(304usize),
78            )
79        }
80    }
81
82    #[doc = "Non-Maskable Interrupt Status Register"]
83    #[inline(always)]
84    pub const fn nmisr(&self) -> &'static crate::common::Reg<self::Nmisr_SPEC, crate::common::R> {
85        unsafe {
86            crate::common::Reg::<self::Nmisr_SPEC, crate::common::R>::from_ptr(
87                self._svd2pac_as_ptr().add(320usize),
88            )
89        }
90    }
91
92    #[doc = "Wake Up Interrupt Enable Register 0"]
93    #[inline(always)]
94    pub const fn wupen0(
95        &self,
96    ) -> &'static crate::common::Reg<self::Wupen0_SPEC, crate::common::RW> {
97        unsafe {
98            crate::common::Reg::<self::Wupen0_SPEC, crate::common::RW>::from_ptr(
99                self._svd2pac_as_ptr().add(416usize),
100            )
101        }
102    }
103
104    #[doc = "Wake Up Interrupt Enable Register 1"]
105    #[inline(always)]
106    pub const fn wupen1(
107        &self,
108    ) -> &'static crate::common::Reg<self::Wupen1_SPEC, crate::common::RW> {
109        unsafe {
110            crate::common::Reg::<self::Wupen1_SPEC, crate::common::RW>::from_ptr(
111                self._svd2pac_as_ptr().add(420usize),
112            )
113        }
114    }
115
116    #[doc = "SYS Event Link Setting Register"]
117    #[inline(always)]
118    pub const fn selsr0(
119        &self,
120    ) -> &'static crate::common::Reg<self::Selsr0_SPEC, crate::common::RW> {
121        unsafe {
122            crate::common::Reg::<self::Selsr0_SPEC, crate::common::RW>::from_ptr(
123                self._svd2pac_as_ptr().add(512usize),
124            )
125        }
126    }
127
128    #[doc = "DMAC Event Link Setting Register %s"]
129    #[inline(always)]
130    pub const fn delsr(
131        &self,
132    ) -> &'static crate::common::ClusterRegisterArray<
133        crate::common::Reg<self::Delsr_SPEC, crate::common::RW>,
134        8,
135        0x4,
136    > {
137        unsafe {
138            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x280usize))
139        }
140    }
141
142    #[doc = "ICU Event Link Setting Register %s"]
143    #[inline(always)]
144    pub const fn ielsr(
145        &self,
146    ) -> &'static crate::common::ClusterRegisterArray<
147        crate::common::Reg<self::Ielsr_SPEC, crate::common::RW>,
148        96,
149        0x4,
150    > {
151        unsafe {
152            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x300usize))
153        }
154    }
155}
156#[doc(hidden)]
157#[derive(Copy, Clone, Eq, PartialEq)]
158pub struct Irqcr_SPEC;
159impl crate::sealed::RegSpec for Irqcr_SPEC {
160    type DataType = u8;
161}
162#[doc = "IRQ Control Register %s"]
163pub type Irqcr = crate::RegValueT<Irqcr_SPEC>;
164
165impl Irqcr {
166    #[doc = "IRQi Detection Sense Select"]
167    #[inline(always)]
168    pub fn irqmd(
169        self,
170    ) -> crate::common::RegisterField<0, 0x3, 1, 0, irqcr::Irqmd, Irqcr_SPEC, crate::common::RW>
171    {
172        crate::common::RegisterField::<0,0x3,1,0,irqcr::Irqmd, Irqcr_SPEC,crate::common::RW>::from_register(self,0)
173    }
174    #[doc = "IRQi Digital Filter Sampling Clock Select"]
175    #[inline(always)]
176    pub fn fclksel(
177        self,
178    ) -> crate::common::RegisterField<4, 0x3, 1, 0, irqcr::Fclksel, Irqcr_SPEC, crate::common::RW>
179    {
180        crate::common::RegisterField::<4,0x3,1,0,irqcr::Fclksel, Irqcr_SPEC,crate::common::RW>::from_register(self,0)
181    }
182    #[doc = "IRQi Digital Filter Enable"]
183    #[inline(always)]
184    pub fn flten(
185        self,
186    ) -> crate::common::RegisterField<7, 0x1, 1, 0, irqcr::Flten, Irqcr_SPEC, crate::common::RW>
187    {
188        crate::common::RegisterField::<7,0x1,1,0,irqcr::Flten, Irqcr_SPEC,crate::common::RW>::from_register(self,0)
189    }
190}
191impl ::core::default::Default for Irqcr {
192    #[inline(always)]
193    fn default() -> Irqcr {
194        <crate::RegValueT<Irqcr_SPEC> as RegisterValue<_>>::new(0)
195    }
196}
197pub mod irqcr {
198
199    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
200    pub struct Irqmd_SPEC;
201    pub type Irqmd = crate::EnumBitfieldStruct<u8, Irqmd_SPEC>;
202    impl Irqmd {
203        #[doc = "Falling edge"]
204        pub const _00: Self = Self::new(0);
205        #[doc = "Rising edge"]
206        pub const _01: Self = Self::new(1);
207        #[doc = "Rising and falling edges"]
208        pub const _10: Self = Self::new(2);
209        #[doc = "Low level"]
210        pub const _11: Self = Self::new(3);
211    }
212    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
213    pub struct Fclksel_SPEC;
214    pub type Fclksel = crate::EnumBitfieldStruct<u8, Fclksel_SPEC>;
215    impl Fclksel {
216        #[doc = "PCLKB"]
217        pub const _00: Self = Self::new(0);
218        #[doc = "PCLKB/8"]
219        pub const _01: Self = Self::new(1);
220        #[doc = "PCLKB/32"]
221        pub const _10: Self = Self::new(2);
222        #[doc = "PCLKB/64"]
223        pub const _11: Self = Self::new(3);
224    }
225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
226    pub struct Flten_SPEC;
227    pub type Flten = crate::EnumBitfieldStruct<u8, Flten_SPEC>;
228    impl Flten {
229        #[doc = "Digital filter is disabled"]
230        pub const _0: Self = Self::new(0);
231        #[doc = "Digital filter is enabled."]
232        pub const _1: Self = Self::new(1);
233    }
234}
235#[doc(hidden)]
236#[derive(Copy, Clone, Eq, PartialEq)]
237pub struct Nmicr_SPEC;
238impl crate::sealed::RegSpec for Nmicr_SPEC {
239    type DataType = u8;
240}
241#[doc = "NMI Pin Interrupt Control Register"]
242pub type Nmicr = crate::RegValueT<Nmicr_SPEC>;
243
244impl Nmicr {
245    #[doc = "NMI Detection Set"]
246    #[inline(always)]
247    pub fn nmimd(
248        self,
249    ) -> crate::common::RegisterField<0, 0x1, 1, 0, nmicr::Nmimd, Nmicr_SPEC, crate::common::RW>
250    {
251        crate::common::RegisterField::<0,0x1,1,0,nmicr::Nmimd, Nmicr_SPEC,crate::common::RW>::from_register(self,0)
252    }
253    #[doc = "NMI Digital Filter Sampling Clock Select"]
254    #[inline(always)]
255    pub fn nfclksel(
256        self,
257    ) -> crate::common::RegisterField<4, 0x3, 1, 0, nmicr::Nfclksel, Nmicr_SPEC, crate::common::RW>
258    {
259        crate::common::RegisterField::<4,0x3,1,0,nmicr::Nfclksel, Nmicr_SPEC,crate::common::RW>::from_register(self,0)
260    }
261    #[doc = "NMI Digital Filter Enable"]
262    #[inline(always)]
263    pub fn nflten(
264        self,
265    ) -> crate::common::RegisterField<7, 0x1, 1, 0, nmicr::Nflten, Nmicr_SPEC, crate::common::RW>
266    {
267        crate::common::RegisterField::<7,0x1,1,0,nmicr::Nflten, Nmicr_SPEC,crate::common::RW>::from_register(self,0)
268    }
269}
270impl ::core::default::Default for Nmicr {
271    #[inline(always)]
272    fn default() -> Nmicr {
273        <crate::RegValueT<Nmicr_SPEC> as RegisterValue<_>>::new(0)
274    }
275}
276pub mod nmicr {
277
278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
279    pub struct Nmimd_SPEC;
280    pub type Nmimd = crate::EnumBitfieldStruct<u8, Nmimd_SPEC>;
281    impl Nmimd {
282        #[doc = "Falling edge"]
283        pub const _0: Self = Self::new(0);
284        #[doc = "Rising edge"]
285        pub const _1: Self = Self::new(1);
286    }
287    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
288    pub struct Nfclksel_SPEC;
289    pub type Nfclksel = crate::EnumBitfieldStruct<u8, Nfclksel_SPEC>;
290    impl Nfclksel {
291        #[doc = "PCLKB"]
292        pub const _00: Self = Self::new(0);
293        #[doc = "PCLKB/8"]
294        pub const _01: Self = Self::new(1);
295        #[doc = "PCLKB/32"]
296        pub const _10: Self = Self::new(2);
297        #[doc = "PCLKB/64"]
298        pub const _11: Self = Self::new(3);
299    }
300    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
301    pub struct Nflten_SPEC;
302    pub type Nflten = crate::EnumBitfieldStruct<u8, Nflten_SPEC>;
303    impl Nflten {
304        #[doc = "Disabled."]
305        pub const _0: Self = Self::new(0);
306        #[doc = "Enabled."]
307        pub const _1: Self = Self::new(1);
308    }
309}
310#[doc(hidden)]
311#[derive(Copy, Clone, Eq, PartialEq)]
312pub struct Nmier_SPEC;
313impl crate::sealed::RegSpec for Nmier_SPEC {
314    type DataType = u16;
315}
316#[doc = "Non-Maskable Interrupt Enable Register"]
317pub type Nmier = crate::RegValueT<Nmier_SPEC>;
318
319impl Nmier {
320    #[doc = "IWDT Underflow/Refresh Error Interrupt Enable"]
321    #[inline(always)]
322    pub fn iwdten(
323        self,
324    ) -> crate::common::RegisterField<0, 0x1, 1, 0, nmier::Iwdten, Nmier_SPEC, crate::common::RW>
325    {
326        crate::common::RegisterField::<0,0x1,1,0,nmier::Iwdten, Nmier_SPEC,crate::common::RW>::from_register(self,0)
327    }
328    #[doc = "WDT Underflow/Refresh Error Interrupt Enable"]
329    #[inline(always)]
330    pub fn wdten(
331        self,
332    ) -> crate::common::RegisterField<1, 0x1, 1, 0, nmier::Wdten, Nmier_SPEC, crate::common::RW>
333    {
334        crate::common::RegisterField::<1,0x1,1,0,nmier::Wdten, Nmier_SPEC,crate::common::RW>::from_register(self,0)
335    }
336    #[doc = "Voltage monitor 1 Interrupt Enable"]
337    #[inline(always)]
338    pub fn lvd1en(
339        self,
340    ) -> crate::common::RegisterField<2, 0x1, 1, 0, nmier::Lvd1En, Nmier_SPEC, crate::common::RW>
341    {
342        crate::common::RegisterField::<2,0x1,1,0,nmier::Lvd1En, Nmier_SPEC,crate::common::RW>::from_register(self,0)
343    }
344    #[doc = "Voltage monitor 2 Interrupt Enable"]
345    #[inline(always)]
346    pub fn lvd2en(
347        self,
348    ) -> crate::common::RegisterField<3, 0x1, 1, 0, nmier::Lvd2En, Nmier_SPEC, crate::common::RW>
349    {
350        crate::common::RegisterField::<3,0x1,1,0,nmier::Lvd2En, Nmier_SPEC,crate::common::RW>::from_register(self,0)
351    }
352    #[doc = "Main Clock Oscillation Stop Detection Interrupt Enable"]
353    #[inline(always)]
354    pub fn osten(
355        self,
356    ) -> crate::common::RegisterField<6, 0x1, 1, 0, nmier::Osten, Nmier_SPEC, crate::common::RW>
357    {
358        crate::common::RegisterField::<6,0x1,1,0,nmier::Osten, Nmier_SPEC,crate::common::RW>::from_register(self,0)
359    }
360    #[doc = "NMI Pin Interrupt Enable"]
361    #[inline(always)]
362    pub fn nmien(
363        self,
364    ) -> crate::common::RegisterField<7, 0x1, 1, 0, nmier::Nmien, Nmier_SPEC, crate::common::RW>
365    {
366        crate::common::RegisterField::<7,0x1,1,0,nmier::Nmien, Nmier_SPEC,crate::common::RW>::from_register(self,0)
367    }
368    #[doc = "SRAM Parity Error Interrupt Enable"]
369    #[inline(always)]
370    pub fn rpeen(
371        self,
372    ) -> crate::common::RegisterField<8, 0x1, 1, 0, nmier::Rpeen, Nmier_SPEC, crate::common::RW>
373    {
374        crate::common::RegisterField::<8,0x1,1,0,nmier::Rpeen, Nmier_SPEC,crate::common::RW>::from_register(self,0)
375    }
376    #[doc = "SRAM ECC Error Interrupt Enable"]
377    #[inline(always)]
378    pub fn reccen(
379        self,
380    ) -> crate::common::RegisterField<9, 0x1, 1, 0, nmier::Reccen, Nmier_SPEC, crate::common::RW>
381    {
382        crate::common::RegisterField::<9,0x1,1,0,nmier::Reccen, Nmier_SPEC,crate::common::RW>::from_register(self,0)
383    }
384    #[doc = "Bus Master MPU Error Interrupt Enable"]
385    #[inline(always)]
386    pub fn busmen(
387        self,
388    ) -> crate::common::RegisterField<11, 0x1, 1, 0, nmier::Busmen, Nmier_SPEC, crate::common::RW>
389    {
390        crate::common::RegisterField::<11,0x1,1,0,nmier::Busmen, Nmier_SPEC,crate::common::RW>::from_register(self,0)
391    }
392    #[doc = ""]
393    #[inline(always)]
394    pub fn tzfen(
395        self,
396    ) -> crate::common::RegisterField<13, 0x1, 1, 0, nmier::Tzfen, Nmier_SPEC, crate::common::RW>
397    {
398        crate::common::RegisterField::<13,0x1,1,0,nmier::Tzfen, Nmier_SPEC,crate::common::RW>::from_register(self,0)
399    }
400    #[doc = ""]
401    #[inline(always)]
402    pub fn cpeen(
403        self,
404    ) -> crate::common::RegisterField<15, 0x1, 1, 0, nmier::Cpeen, Nmier_SPEC, crate::common::RW>
405    {
406        crate::common::RegisterField::<15,0x1,1,0,nmier::Cpeen, Nmier_SPEC,crate::common::RW>::from_register(self,0)
407    }
408}
409impl ::core::default::Default for Nmier {
410    #[inline(always)]
411    fn default() -> Nmier {
412        <crate::RegValueT<Nmier_SPEC> as RegisterValue<_>>::new(0)
413    }
414}
415pub mod nmier {
416
417    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
418    pub struct Iwdten_SPEC;
419    pub type Iwdten = crate::EnumBitfieldStruct<u8, Iwdten_SPEC>;
420    impl Iwdten {
421        #[doc = "Disabled"]
422        pub const _0: Self = Self::new(0);
423        #[doc = "Enabled."]
424        pub const _1: Self = Self::new(1);
425    }
426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
427    pub struct Wdten_SPEC;
428    pub type Wdten = crate::EnumBitfieldStruct<u8, Wdten_SPEC>;
429    impl Wdten {
430        #[doc = "Disabled"]
431        pub const _0: Self = Self::new(0);
432        #[doc = "Enabled"]
433        pub const _1: Self = Self::new(1);
434    }
435    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
436    pub struct Lvd1En_SPEC;
437    pub type Lvd1En = crate::EnumBitfieldStruct<u8, Lvd1En_SPEC>;
438    impl Lvd1En {
439        #[doc = "Disabled"]
440        pub const _0: Self = Self::new(0);
441        #[doc = "Enabled"]
442        pub const _1: Self = Self::new(1);
443    }
444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
445    pub struct Lvd2En_SPEC;
446    pub type Lvd2En = crate::EnumBitfieldStruct<u8, Lvd2En_SPEC>;
447    impl Lvd2En {
448        #[doc = "Disabled"]
449        pub const _0: Self = Self::new(0);
450        #[doc = "Enabled"]
451        pub const _1: Self = Self::new(1);
452    }
453    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
454    pub struct Osten_SPEC;
455    pub type Osten = crate::EnumBitfieldStruct<u8, Osten_SPEC>;
456    impl Osten {
457        #[doc = "Disabled"]
458        pub const _0: Self = Self::new(0);
459        #[doc = "Enabled"]
460        pub const _1: Self = Self::new(1);
461    }
462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
463    pub struct Nmien_SPEC;
464    pub type Nmien = crate::EnumBitfieldStruct<u8, Nmien_SPEC>;
465    impl Nmien {
466        #[doc = "Disabled"]
467        pub const _0: Self = Self::new(0);
468        #[doc = "Enabled"]
469        pub const _1: Self = Self::new(1);
470    }
471    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
472    pub struct Rpeen_SPEC;
473    pub type Rpeen = crate::EnumBitfieldStruct<u8, Rpeen_SPEC>;
474    impl Rpeen {
475        #[doc = "Disabled"]
476        pub const _0: Self = Self::new(0);
477        #[doc = "Enabled"]
478        pub const _1: Self = Self::new(1);
479    }
480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481    pub struct Reccen_SPEC;
482    pub type Reccen = crate::EnumBitfieldStruct<u8, Reccen_SPEC>;
483    impl Reccen {
484        #[doc = "Disabled"]
485        pub const _0: Self = Self::new(0);
486        #[doc = "Enabled"]
487        pub const _1: Self = Self::new(1);
488    }
489    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
490    pub struct Busmen_SPEC;
491    pub type Busmen = crate::EnumBitfieldStruct<u8, Busmen_SPEC>;
492    impl Busmen {
493        #[doc = "Disabled"]
494        pub const _0: Self = Self::new(0);
495        #[doc = "Enabled"]
496        pub const _1: Self = Self::new(1);
497    }
498    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
499    pub struct Tzfen_SPEC;
500    pub type Tzfen = crate::EnumBitfieldStruct<u8, Tzfen_SPEC>;
501    impl Tzfen {
502        #[doc = "Disabled"]
503        pub const _0: Self = Self::new(0);
504        #[doc = "Enabled"]
505        pub const _1: Self = Self::new(1);
506    }
507    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
508    pub struct Cpeen_SPEC;
509    pub type Cpeen = crate::EnumBitfieldStruct<u8, Cpeen_SPEC>;
510    impl Cpeen {
511        #[doc = "Disabled"]
512        pub const _0: Self = Self::new(0);
513        #[doc = "Enabled"]
514        pub const _1: Self = Self::new(1);
515    }
516}
517#[doc(hidden)]
518#[derive(Copy, Clone, Eq, PartialEq)]
519pub struct Nmiclr_SPEC;
520impl crate::sealed::RegSpec for Nmiclr_SPEC {
521    type DataType = u16;
522}
523#[doc = "Non-Maskable Interrupt Status Clear Register"]
524pub type Nmiclr = crate::RegValueT<Nmiclr_SPEC>;
525
526impl Nmiclr {
527    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag Clear"]
528    #[inline(always)]
529    pub fn iwdtclr(
530        self,
531    ) -> crate::common::RegisterField<0, 0x1, 1, 0, nmiclr::Iwdtclr, Nmiclr_SPEC, crate::common::RW>
532    {
533        crate::common::RegisterField::<0,0x1,1,0,nmiclr::Iwdtclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
534    }
535    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag Clear"]
536    #[inline(always)]
537    pub fn wdtclr(
538        self,
539    ) -> crate::common::RegisterField<1, 0x1, 1, 0, nmiclr::Wdtclr, Nmiclr_SPEC, crate::common::RW>
540    {
541        crate::common::RegisterField::<1,0x1,1,0,nmiclr::Wdtclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
542    }
543    #[doc = "Voltage Monitor 1 Interrupt Status Flag Clear"]
544    #[inline(always)]
545    pub fn lvd1clr(
546        self,
547    ) -> crate::common::RegisterField<2, 0x1, 1, 0, nmiclr::Lvd1Clr, Nmiclr_SPEC, crate::common::RW>
548    {
549        crate::common::RegisterField::<2,0x1,1,0,nmiclr::Lvd1Clr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
550    }
551    #[doc = "Voltage Monitor 2 Interrupt Status Flag Clear"]
552    #[inline(always)]
553    pub fn lvd2clr(
554        self,
555    ) -> crate::common::RegisterField<3, 0x1, 1, 0, nmiclr::Lvd2Clr, Nmiclr_SPEC, crate::common::RW>
556    {
557        crate::common::RegisterField::<3,0x1,1,0,nmiclr::Lvd2Clr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
558    }
559    #[doc = "Oscillation Stop Detection Interrupt Status Flag Clear"]
560    #[inline(always)]
561    pub fn ostclr(
562        self,
563    ) -> crate::common::RegisterField<6, 0x1, 1, 0, nmiclr::Ostclr, Nmiclr_SPEC, crate::common::RW>
564    {
565        crate::common::RegisterField::<6,0x1,1,0,nmiclr::Ostclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
566    }
567    #[doc = "NMI Pin Interrupt Status Flag Clear"]
568    #[inline(always)]
569    pub fn nmiclr(
570        self,
571    ) -> crate::common::RegisterField<7, 0x1, 1, 0, nmiclr::Nmiclr, Nmiclr_SPEC, crate::common::RW>
572    {
573        crate::common::RegisterField::<7,0x1,1,0,nmiclr::Nmiclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
574    }
575    #[doc = "SRAM Parity Error Interrupt Status Flag Clear"]
576    #[inline(always)]
577    pub fn rpeclr(
578        self,
579    ) -> crate::common::RegisterField<8, 0x1, 1, 0, nmiclr::Rpeclr, Nmiclr_SPEC, crate::common::RW>
580    {
581        crate::common::RegisterField::<8,0x1,1,0,nmiclr::Rpeclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
582    }
583    #[doc = "SRAM ECC Error Interrupt Status Flag Clear"]
584    #[inline(always)]
585    pub fn reccclr(
586        self,
587    ) -> crate::common::RegisterField<9, 0x1, 1, 0, nmiclr::Reccclr, Nmiclr_SPEC, crate::common::RW>
588    {
589        crate::common::RegisterField::<9,0x1,1,0,nmiclr::Reccclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
590    }
591    #[doc = "Bus Master MPU Error Interrupt Status Flag Clear"]
592    #[inline(always)]
593    pub fn busmclr(
594        self,
595    ) -> crate::common::RegisterField<11, 0x1, 1, 0, nmiclr::Busmclr, Nmiclr_SPEC, crate::common::RW>
596    {
597        crate::common::RegisterField::<11,0x1,1,0,nmiclr::Busmclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
598    }
599    #[doc = ""]
600    #[inline(always)]
601    pub fn tzfclr(
602        self,
603    ) -> crate::common::RegisterField<13, 0x1, 1, 0, nmiclr::Tzfclr, Nmiclr_SPEC, crate::common::RW>
604    {
605        crate::common::RegisterField::<13,0x1,1,0,nmiclr::Tzfclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
606    }
607    #[doc = ""]
608    #[inline(always)]
609    pub fn cpeclr(
610        self,
611    ) -> crate::common::RegisterField<15, 0x1, 1, 0, nmiclr::Cpeclr, Nmiclr_SPEC, crate::common::RW>
612    {
613        crate::common::RegisterField::<15,0x1,1,0,nmiclr::Cpeclr, Nmiclr_SPEC,crate::common::RW>::from_register(self,0)
614    }
615}
616impl ::core::default::Default for Nmiclr {
617    #[inline(always)]
618    fn default() -> Nmiclr {
619        <crate::RegValueT<Nmiclr_SPEC> as RegisterValue<_>>::new(0)
620    }
621}
622pub mod nmiclr {
623
624    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
625    pub struct Iwdtclr_SPEC;
626    pub type Iwdtclr = crate::EnumBitfieldStruct<u8, Iwdtclr_SPEC>;
627    impl Iwdtclr {
628        #[doc = "No effect"]
629        pub const _0: Self = Self::new(0);
630        #[doc = "Clear the NMISR.IWDTST flag"]
631        pub const _1: Self = Self::new(1);
632    }
633    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
634    pub struct Wdtclr_SPEC;
635    pub type Wdtclr = crate::EnumBitfieldStruct<u8, Wdtclr_SPEC>;
636    impl Wdtclr {
637        #[doc = "No effect"]
638        pub const _0: Self = Self::new(0);
639        #[doc = "Clear the NMISR.WDTST flag"]
640        pub const _1: Self = Self::new(1);
641    }
642    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
643    pub struct Lvd1Clr_SPEC;
644    pub type Lvd1Clr = crate::EnumBitfieldStruct<u8, Lvd1Clr_SPEC>;
645    impl Lvd1Clr {
646        #[doc = "No effect"]
647        pub const _0: Self = Self::new(0);
648        #[doc = "Clear the NMISR.LVD1ST flag"]
649        pub const _1: Self = Self::new(1);
650    }
651    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
652    pub struct Lvd2Clr_SPEC;
653    pub type Lvd2Clr = crate::EnumBitfieldStruct<u8, Lvd2Clr_SPEC>;
654    impl Lvd2Clr {
655        #[doc = "No effect"]
656        pub const _0: Self = Self::new(0);
657        #[doc = "Clear the NMISR.LVD2ST flag."]
658        pub const _1: Self = Self::new(1);
659    }
660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
661    pub struct Ostclr_SPEC;
662    pub type Ostclr = crate::EnumBitfieldStruct<u8, Ostclr_SPEC>;
663    impl Ostclr {
664        #[doc = "No effect"]
665        pub const _0: Self = Self::new(0);
666        #[doc = "Clear the NMISR.OSTST flag"]
667        pub const _1: Self = Self::new(1);
668    }
669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
670    pub struct Nmiclr_SPEC;
671    pub type Nmiclr = crate::EnumBitfieldStruct<u8, Nmiclr_SPEC>;
672    impl Nmiclr {
673        #[doc = "No effect"]
674        pub const _0: Self = Self::new(0);
675        #[doc = "Clear the NMISR.NMIST flag"]
676        pub const _1: Self = Self::new(1);
677    }
678    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
679    pub struct Rpeclr_SPEC;
680    pub type Rpeclr = crate::EnumBitfieldStruct<u8, Rpeclr_SPEC>;
681    impl Rpeclr {
682        #[doc = "No effect"]
683        pub const _0: Self = Self::new(0);
684        #[doc = "Clear the NMISR.RPEST flag"]
685        pub const _1: Self = Self::new(1);
686    }
687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
688    pub struct Reccclr_SPEC;
689    pub type Reccclr = crate::EnumBitfieldStruct<u8, Reccclr_SPEC>;
690    impl Reccclr {
691        #[doc = "No effect"]
692        pub const _0: Self = Self::new(0);
693        #[doc = "Clear the NMISR.RECCST flag"]
694        pub const _1: Self = Self::new(1);
695    }
696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
697    pub struct Busmclr_SPEC;
698    pub type Busmclr = crate::EnumBitfieldStruct<u8, Busmclr_SPEC>;
699    impl Busmclr {
700        #[doc = "No effect"]
701        pub const _0: Self = Self::new(0);
702        #[doc = "Clear the NMISR.BUSMST flag"]
703        pub const _1: Self = Self::new(1);
704    }
705    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
706    pub struct Tzfclr_SPEC;
707    pub type Tzfclr = crate::EnumBitfieldStruct<u8, Tzfclr_SPEC>;
708    impl Tzfclr {
709        #[doc = "No effect"]
710        pub const _0: Self = Self::new(0);
711        #[doc = "Clear the NMISR.TZFCLR flag"]
712        pub const _1: Self = Self::new(1);
713    }
714    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
715    pub struct Cpeclr_SPEC;
716    pub type Cpeclr = crate::EnumBitfieldStruct<u8, Cpeclr_SPEC>;
717    impl Cpeclr {
718        #[doc = "No effect"]
719        pub const _0: Self = Self::new(0);
720        #[doc = "Clear the NMISR.CPECLR flag"]
721        pub const _1: Self = Self::new(1);
722    }
723}
724#[doc(hidden)]
725#[derive(Copy, Clone, Eq, PartialEq)]
726pub struct Nmisr_SPEC;
727impl crate::sealed::RegSpec for Nmisr_SPEC {
728    type DataType = u16;
729}
730#[doc = "Non-Maskable Interrupt Status Register"]
731pub type Nmisr = crate::RegValueT<Nmisr_SPEC>;
732
733impl Nmisr {
734    #[doc = "IWDT Underflow/Refresh Error Interrupt Status Flag"]
735    #[inline(always)]
736    pub fn iwdtst(
737        self,
738    ) -> crate::common::RegisterField<0, 0x1, 1, 0, nmisr::Iwdtst, Nmisr_SPEC, crate::common::R>
739    {
740        crate::common::RegisterField::<0,0x1,1,0,nmisr::Iwdtst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
741    }
742    #[doc = "WDT Underflow/Refresh Error Interrupt Status Flag"]
743    #[inline(always)]
744    pub fn wdtst(
745        self,
746    ) -> crate::common::RegisterField<1, 0x1, 1, 0, nmisr::Wdtst, Nmisr_SPEC, crate::common::R>
747    {
748        crate::common::RegisterField::<1,0x1,1,0,nmisr::Wdtst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
749    }
750    #[doc = "Voltage Monitor 1 Interrupt Status Flag"]
751    #[inline(always)]
752    pub fn lvd1st(
753        self,
754    ) -> crate::common::RegisterField<2, 0x1, 1, 0, nmisr::Lvd1St, Nmisr_SPEC, crate::common::R>
755    {
756        crate::common::RegisterField::<2,0x1,1,0,nmisr::Lvd1St, Nmisr_SPEC,crate::common::R>::from_register(self,0)
757    }
758    #[doc = "Voltage Monitor 2 Interrupt Status Flag"]
759    #[inline(always)]
760    pub fn lvd2st(
761        self,
762    ) -> crate::common::RegisterField<3, 0x1, 1, 0, nmisr::Lvd2St, Nmisr_SPEC, crate::common::R>
763    {
764        crate::common::RegisterField::<3,0x1,1,0,nmisr::Lvd2St, Nmisr_SPEC,crate::common::R>::from_register(self,0)
765    }
766    #[doc = "Main Clock Oscillation Stop Detection Interrupt Status Flag"]
767    #[inline(always)]
768    pub fn ostst(
769        self,
770    ) -> crate::common::RegisterField<6, 0x1, 1, 0, nmisr::Ostst, Nmisr_SPEC, crate::common::R>
771    {
772        crate::common::RegisterField::<6,0x1,1,0,nmisr::Ostst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
773    }
774    #[doc = "NMI Pin Interrupt Status Flag"]
775    #[inline(always)]
776    pub fn nmist(
777        self,
778    ) -> crate::common::RegisterField<7, 0x1, 1, 0, nmisr::Nmist, Nmisr_SPEC, crate::common::R>
779    {
780        crate::common::RegisterField::<7,0x1,1,0,nmisr::Nmist, Nmisr_SPEC,crate::common::R>::from_register(self,0)
781    }
782    #[doc = "SRAM Parity Error Interrupt Status Flag"]
783    #[inline(always)]
784    pub fn rpest(
785        self,
786    ) -> crate::common::RegisterField<8, 0x1, 1, 0, nmisr::Rpest, Nmisr_SPEC, crate::common::R>
787    {
788        crate::common::RegisterField::<8,0x1,1,0,nmisr::Rpest, Nmisr_SPEC,crate::common::R>::from_register(self,0)
789    }
790    #[doc = "SRAM ECC Error Interrupt Status Flag"]
791    #[inline(always)]
792    pub fn reccst(
793        self,
794    ) -> crate::common::RegisterField<9, 0x1, 1, 0, nmisr::Reccst, Nmisr_SPEC, crate::common::R>
795    {
796        crate::common::RegisterField::<9,0x1,1,0,nmisr::Reccst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
797    }
798    #[doc = "Bus Master MPU Error Interrupt Status Flag"]
799    #[inline(always)]
800    pub fn busmst(
801        self,
802    ) -> crate::common::RegisterField<11, 0x1, 1, 0, nmisr::Busmst, Nmisr_SPEC, crate::common::R>
803    {
804        crate::common::RegisterField::<11,0x1,1,0,nmisr::Busmst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
805    }
806    #[doc = ""]
807    #[inline(always)]
808    pub fn tzfst(
809        self,
810    ) -> crate::common::RegisterField<13, 0x1, 1, 0, nmisr::Tzfst, Nmisr_SPEC, crate::common::R>
811    {
812        crate::common::RegisterField::<13,0x1,1,0,nmisr::Tzfst, Nmisr_SPEC,crate::common::R>::from_register(self,0)
813    }
814    #[doc = ""]
815    #[inline(always)]
816    pub fn cpest(
817        self,
818    ) -> crate::common::RegisterField<15, 0x1, 1, 0, nmisr::Cpest, Nmisr_SPEC, crate::common::R>
819    {
820        crate::common::RegisterField::<15,0x1,1,0,nmisr::Cpest, Nmisr_SPEC,crate::common::R>::from_register(self,0)
821    }
822}
823impl ::core::default::Default for Nmisr {
824    #[inline(always)]
825    fn default() -> Nmisr {
826        <crate::RegValueT<Nmisr_SPEC> as RegisterValue<_>>::new(0)
827    }
828}
829pub mod nmisr {
830
831    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
832    pub struct Iwdtst_SPEC;
833    pub type Iwdtst = crate::EnumBitfieldStruct<u8, Iwdtst_SPEC>;
834    impl Iwdtst {
835        #[doc = "Interrupt not requested"]
836        pub const _0: Self = Self::new(0);
837        #[doc = "Interrupt requested"]
838        pub const _1: Self = Self::new(1);
839    }
840    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
841    pub struct Wdtst_SPEC;
842    pub type Wdtst = crate::EnumBitfieldStruct<u8, Wdtst_SPEC>;
843    impl Wdtst {
844        #[doc = "Interrupt not requested"]
845        pub const _0: Self = Self::new(0);
846        #[doc = "Interrupt requested"]
847        pub const _1: Self = Self::new(1);
848    }
849    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
850    pub struct Lvd1St_SPEC;
851    pub type Lvd1St = crate::EnumBitfieldStruct<u8, Lvd1St_SPEC>;
852    impl Lvd1St {
853        #[doc = "Interrupt not requested"]
854        pub const _0: Self = Self::new(0);
855        #[doc = "Interrupt requested"]
856        pub const _1: Self = Self::new(1);
857    }
858    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
859    pub struct Lvd2St_SPEC;
860    pub type Lvd2St = crate::EnumBitfieldStruct<u8, Lvd2St_SPEC>;
861    impl Lvd2St {
862        #[doc = "Interrupt not requested"]
863        pub const _0: Self = Self::new(0);
864        #[doc = "Interrupt requested"]
865        pub const _1: Self = Self::new(1);
866    }
867    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
868    pub struct Ostst_SPEC;
869    pub type Ostst = crate::EnumBitfieldStruct<u8, Ostst_SPEC>;
870    impl Ostst {
871        #[doc = "Interrupt not requested for main clock oscillation stop"]
872        pub const _0: Self = Self::new(0);
873        #[doc = "Interrupt requested for main clock oscillation stop"]
874        pub const _1: Self = Self::new(1);
875    }
876    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
877    pub struct Nmist_SPEC;
878    pub type Nmist = crate::EnumBitfieldStruct<u8, Nmist_SPEC>;
879    impl Nmist {
880        #[doc = "Interrupt not requested"]
881        pub const _0: Self = Self::new(0);
882        #[doc = "Interrupt requested"]
883        pub const _1: Self = Self::new(1);
884    }
885    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
886    pub struct Rpest_SPEC;
887    pub type Rpest = crate::EnumBitfieldStruct<u8, Rpest_SPEC>;
888    impl Rpest {
889        #[doc = "Interrupt not requested"]
890        pub const _0: Self = Self::new(0);
891        #[doc = "Interrupt requested"]
892        pub const _1: Self = Self::new(1);
893    }
894    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
895    pub struct Reccst_SPEC;
896    pub type Reccst = crate::EnumBitfieldStruct<u8, Reccst_SPEC>;
897    impl Reccst {
898        #[doc = "Interrupt not requested"]
899        pub const _0: Self = Self::new(0);
900        #[doc = "Interrupt requested"]
901        pub const _1: Self = Self::new(1);
902    }
903    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
904    pub struct Busmst_SPEC;
905    pub type Busmst = crate::EnumBitfieldStruct<u8, Busmst_SPEC>;
906    impl Busmst {
907        #[doc = "Interrupt not requested"]
908        pub const _0: Self = Self::new(0);
909        #[doc = "Interrupt requested"]
910        pub const _1: Self = Self::new(1);
911    }
912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
913    pub struct Tzfst_SPEC;
914    pub type Tzfst = crate::EnumBitfieldStruct<u8, Tzfst_SPEC>;
915    impl Tzfst {
916        #[doc = "Interrupt not requested"]
917        pub const _0: Self = Self::new(0);
918        #[doc = "Interrupt requested"]
919        pub const _1: Self = Self::new(1);
920    }
921    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
922    pub struct Cpest_SPEC;
923    pub type Cpest = crate::EnumBitfieldStruct<u8, Cpest_SPEC>;
924    impl Cpest {
925        #[doc = "Interrupt not requested"]
926        pub const _0: Self = Self::new(0);
927        #[doc = "Interrupt requested"]
928        pub const _1: Self = Self::new(1);
929    }
930}
931#[doc(hidden)]
932#[derive(Copy, Clone, Eq, PartialEq)]
933pub struct Wupen0_SPEC;
934impl crate::sealed::RegSpec for Wupen0_SPEC {
935    type DataType = u32;
936}
937#[doc = "Wake Up Interrupt Enable Register 0"]
938pub type Wupen0 = crate::RegValueT<Wupen0_SPEC>;
939
940impl Wupen0 {
941    #[doc = "IRQn Interrupt Software Standby/Snooze Mode Returns Enable bit (n = 0 to 15)"]
942    #[inline(always)]
943    pub fn irqwupen(
944        self,
945    ) -> crate::common::RegisterField<
946        0,
947        0x7fff,
948        1,
949        0,
950        wupen0::Irqwupen,
951        Wupen0_SPEC,
952        crate::common::RW,
953    > {
954        crate::common::RegisterField::<
955            0,
956            0x7fff,
957            1,
958            0,
959            wupen0::Irqwupen,
960            Wupen0_SPEC,
961            crate::common::RW,
962        >::from_register(self, 0)
963    }
964    #[doc = "IWDT Interrupt Software Standby/Snooze Mode Returns Enable bit"]
965    #[inline(always)]
966    pub fn iwdtwupen(
967        self,
968    ) -> crate::common::RegisterField<
969        16,
970        0x1,
971        1,
972        0,
973        wupen0::Iwdtwupen,
974        Wupen0_SPEC,
975        crate::common::RW,
976    > {
977        crate::common::RegisterField::<
978            16,
979            0x1,
980            1,
981            0,
982            wupen0::Iwdtwupen,
983            Wupen0_SPEC,
984            crate::common::RW,
985        >::from_register(self, 0)
986    }
987    #[doc = "LVD1 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
988    #[inline(always)]
989    pub fn lvd1wupen(
990        self,
991    ) -> crate::common::RegisterField<
992        18,
993        0x1,
994        1,
995        0,
996        wupen0::Lvd1Wupen,
997        Wupen0_SPEC,
998        crate::common::RW,
999    > {
1000        crate::common::RegisterField::<
1001            18,
1002            0x1,
1003            1,
1004            0,
1005            wupen0::Lvd1Wupen,
1006            Wupen0_SPEC,
1007            crate::common::RW,
1008        >::from_register(self, 0)
1009    }
1010    #[doc = "LVD2 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1011    #[inline(always)]
1012    pub fn lvd2wupen(
1013        self,
1014    ) -> crate::common::RegisterField<
1015        19,
1016        0x1,
1017        1,
1018        0,
1019        wupen0::Lvd2Wupen,
1020        Wupen0_SPEC,
1021        crate::common::RW,
1022    > {
1023        crate::common::RegisterField::<
1024            19,
1025            0x1,
1026            1,
1027            0,
1028            wupen0::Lvd2Wupen,
1029            Wupen0_SPEC,
1030            crate::common::RW,
1031        >::from_register(self, 0)
1032    }
1033    #[doc = "RTC Alarm Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1034    #[inline(always)]
1035    pub fn rtcalmwupen(
1036        self,
1037    ) -> crate::common::RegisterField<
1038        24,
1039        0x1,
1040        1,
1041        0,
1042        wupen0::Rtcalmwupen,
1043        Wupen0_SPEC,
1044        crate::common::RW,
1045    > {
1046        crate::common::RegisterField::<
1047            24,
1048            0x1,
1049            1,
1050            0,
1051            wupen0::Rtcalmwupen,
1052            Wupen0_SPEC,
1053            crate::common::RW,
1054        >::from_register(self, 0)
1055    }
1056    #[doc = "RTC Period Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1057    #[inline(always)]
1058    pub fn rtcprdwupen(
1059        self,
1060    ) -> crate::common::RegisterField<
1061        25,
1062        0x1,
1063        1,
1064        0,
1065        wupen0::Rtcprdwupen,
1066        Wupen0_SPEC,
1067        crate::common::RW,
1068    > {
1069        crate::common::RegisterField::<
1070            25,
1071            0x1,
1072            1,
1073            0,
1074            wupen0::Rtcprdwupen,
1075            Wupen0_SPEC,
1076            crate::common::RW,
1077        >::from_register(self, 0)
1078    }
1079    #[doc = "USBFS0 Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1080    #[inline(always)]
1081    pub fn usbfs0wupen(
1082        self,
1083    ) -> crate::common::RegisterField<
1084        27,
1085        0x1,
1086        1,
1087        0,
1088        wupen0::Usbfs0Wupen,
1089        Wupen0_SPEC,
1090        crate::common::RW,
1091    > {
1092        crate::common::RegisterField::<
1093            27,
1094            0x1,
1095            1,
1096            0,
1097            wupen0::Usbfs0Wupen,
1098            Wupen0_SPEC,
1099            crate::common::RW,
1100        >::from_register(self, 0)
1101    }
1102    #[doc = "AGT1 Underflow Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1103    #[inline(always)]
1104    pub fn agt1udwupen(
1105        self,
1106    ) -> crate::common::RegisterField<
1107        28,
1108        0x1,
1109        1,
1110        0,
1111        wupen0::Agt1Udwupen,
1112        Wupen0_SPEC,
1113        crate::common::RW,
1114    > {
1115        crate::common::RegisterField::<
1116            28,
1117            0x1,
1118            1,
1119            0,
1120            wupen0::Agt1Udwupen,
1121            Wupen0_SPEC,
1122            crate::common::RW,
1123        >::from_register(self, 0)
1124    }
1125    #[doc = "AGT1 Compare Match A Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1126    #[inline(always)]
1127    pub fn agt1cawupen(
1128        self,
1129    ) -> crate::common::RegisterField<
1130        29,
1131        0x1,
1132        1,
1133        0,
1134        wupen0::Agt1Cawupen,
1135        Wupen0_SPEC,
1136        crate::common::RW,
1137    > {
1138        crate::common::RegisterField::<
1139            29,
1140            0x1,
1141            1,
1142            0,
1143            wupen0::Agt1Cawupen,
1144            Wupen0_SPEC,
1145            crate::common::RW,
1146        >::from_register(self, 0)
1147    }
1148    #[doc = "AGT1 Compare Match B Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1149    #[inline(always)]
1150    pub fn agt1cbwupen(
1151        self,
1152    ) -> crate::common::RegisterField<
1153        30,
1154        0x1,
1155        1,
1156        0,
1157        wupen0::Agt1Cbwupen,
1158        Wupen0_SPEC,
1159        crate::common::RW,
1160    > {
1161        crate::common::RegisterField::<
1162            30,
1163            0x1,
1164            1,
1165            0,
1166            wupen0::Agt1Cbwupen,
1167            Wupen0_SPEC,
1168            crate::common::RW,
1169        >::from_register(self, 0)
1170    }
1171}
1172impl ::core::default::Default for Wupen0 {
1173    #[inline(always)]
1174    fn default() -> Wupen0 {
1175        <crate::RegValueT<Wupen0_SPEC> as RegisterValue<_>>::new(0)
1176    }
1177}
1178pub mod wupen0 {
1179
1180    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1181    pub struct Irqwupen_SPEC;
1182    pub type Irqwupen = crate::EnumBitfieldStruct<u8, Irqwupen_SPEC>;
1183    impl Irqwupen {
1184        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is disabled"]
1185        pub const _0: Self = Self::new(0);
1186        #[doc = "Software Standby/Snooze Mode returns by IRQn interrupt is enabled"]
1187        pub const _1: Self = Self::new(1);
1188    }
1189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1190    pub struct Iwdtwupen_SPEC;
1191    pub type Iwdtwupen = crate::EnumBitfieldStruct<u8, Iwdtwupen_SPEC>;
1192    impl Iwdtwupen {
1193        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is disabled"]
1194        pub const _0: Self = Self::new(0);
1195        #[doc = "Software Standby/Snooze Mode returns by IWDT interrupt is enabled"]
1196        pub const _1: Self = Self::new(1);
1197    }
1198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1199    pub struct Lvd1Wupen_SPEC;
1200    pub type Lvd1Wupen = crate::EnumBitfieldStruct<u8, Lvd1Wupen_SPEC>;
1201    impl Lvd1Wupen {
1202        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is disabled"]
1203        pub const _0: Self = Self::new(0);
1204        #[doc = "Software Standby/Snooze Mode returns by LVD1 interrupt is enabled"]
1205        pub const _1: Self = Self::new(1);
1206    }
1207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1208    pub struct Lvd2Wupen_SPEC;
1209    pub type Lvd2Wupen = crate::EnumBitfieldStruct<u8, Lvd2Wupen_SPEC>;
1210    impl Lvd2Wupen {
1211        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is disabled"]
1212        pub const _0: Self = Self::new(0);
1213        #[doc = "Software Standby/Snooze Mode returns by LVD2 interrupt is enabled"]
1214        pub const _1: Self = Self::new(1);
1215    }
1216    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1217    pub struct Rtcalmwupen_SPEC;
1218    pub type Rtcalmwupen = crate::EnumBitfieldStruct<u8, Rtcalmwupen_SPEC>;
1219    impl Rtcalmwupen {
1220        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is disabled"]
1221        pub const _0: Self = Self::new(0);
1222        #[doc = "Software Standby/Snooze Mode returns by RTC alarm interrupt is enabled"]
1223        pub const _1: Self = Self::new(1);
1224    }
1225    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1226    pub struct Rtcprdwupen_SPEC;
1227    pub type Rtcprdwupen = crate::EnumBitfieldStruct<u8, Rtcprdwupen_SPEC>;
1228    impl Rtcprdwupen {
1229        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is disabled"]
1230        pub const _0: Self = Self::new(0);
1231        #[doc = "Software Standby/Snooze Mode returns by RTC period interrupt is enabled"]
1232        pub const _1: Self = Self::new(1);
1233    }
1234    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1235    pub struct Usbfs0Wupen_SPEC;
1236    pub type Usbfs0Wupen = crate::EnumBitfieldStruct<u8, Usbfs0Wupen_SPEC>;
1237    impl Usbfs0Wupen {
1238        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is disabled"]
1239        pub const _0: Self = Self::new(0);
1240        #[doc = "Software Standby/Snooze Mode returns by USBFS0 interrupt is enabled"]
1241        pub const _1: Self = Self::new(1);
1242    }
1243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1244    pub struct Agt1Udwupen_SPEC;
1245    pub type Agt1Udwupen = crate::EnumBitfieldStruct<u8, Agt1Udwupen_SPEC>;
1246    impl Agt1Udwupen {
1247        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is disabled"]
1248        pub const _0: Self = Self::new(0);
1249        #[doc = "Software Standby/Snooze Mode returns by AGT1 underflow interrupt is enabled"]
1250        pub const _1: Self = Self::new(1);
1251    }
1252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1253    pub struct Agt1Cawupen_SPEC;
1254    pub type Agt1Cawupen = crate::EnumBitfieldStruct<u8, Agt1Cawupen_SPEC>;
1255    impl Agt1Cawupen {
1256        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is disabled"]
1257        pub const _0: Self = Self::new(0);
1258        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match A interrupt is enabled"]
1259        pub const _1: Self = Self::new(1);
1260    }
1261    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1262    pub struct Agt1Cbwupen_SPEC;
1263    pub type Agt1Cbwupen = crate::EnumBitfieldStruct<u8, Agt1Cbwupen_SPEC>;
1264    impl Agt1Cbwupen {
1265        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is disabled"]
1266        pub const _0: Self = Self::new(0);
1267        #[doc = "Software Standby/Snooze Mode returns by AGT1 compare match B interrupt is enabled"]
1268        pub const _1: Self = Self::new(1);
1269    }
1270}
1271#[doc(hidden)]
1272#[derive(Copy, Clone, Eq, PartialEq)]
1273pub struct Wupen1_SPEC;
1274impl crate::sealed::RegSpec for Wupen1_SPEC {
1275    type DataType = u32;
1276}
1277#[doc = "Wake Up Interrupt Enable Register 1"]
1278pub type Wupen1 = crate::RegValueT<Wupen1_SPEC>;
1279
1280impl Wupen1 {
1281    #[doc = "I3C Address Match Interrupt Software Standby/Snooze Mode Returns Enable bit"]
1282    #[inline(always)]
1283    pub fn i3cwupen(
1284        self,
1285    ) -> crate::common::RegisterField<11, 0x1, 1, 0, wupen1::I3Cwupen, Wupen1_SPEC, crate::common::RW>
1286    {
1287        crate::common::RegisterField::<
1288            11,
1289            0x1,
1290            1,
1291            0,
1292            wupen1::I3Cwupen,
1293            Wupen1_SPEC,
1294            crate::common::RW,
1295        >::from_register(self, 0)
1296    }
1297}
1298impl ::core::default::Default for Wupen1 {
1299    #[inline(always)]
1300    fn default() -> Wupen1 {
1301        <crate::RegValueT<Wupen1_SPEC> as RegisterValue<_>>::new(0)
1302    }
1303}
1304pub mod wupen1 {
1305
1306    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1307    pub struct I3Cwupen_SPEC;
1308    pub type I3Cwupen = crate::EnumBitfieldStruct<u8, I3Cwupen_SPEC>;
1309    impl I3Cwupen {
1310        #[doc = "Software Standby/Snooze Mode returns by I3C address match interrupt is disabled"]
1311        pub const _0: Self = Self::new(0);
1312        #[doc = "Software Standby/Snooze Mode returns by I3C address match interrupt is enabled"]
1313        pub const _1: Self = Self::new(1);
1314    }
1315}
1316#[doc(hidden)]
1317#[derive(Copy, Clone, Eq, PartialEq)]
1318pub struct Selsr0_SPEC;
1319impl crate::sealed::RegSpec for Selsr0_SPEC {
1320    type DataType = u16;
1321}
1322#[doc = "SYS Event Link Setting Register"]
1323pub type Selsr0 = crate::RegValueT<Selsr0_SPEC>;
1324
1325impl NoBitfieldReg<Selsr0_SPEC> for Selsr0 {}
1326impl ::core::default::Default for Selsr0 {
1327    #[inline(always)]
1328    fn default() -> Selsr0 {
1329        <crate::RegValueT<Selsr0_SPEC> as RegisterValue<_>>::new(0)
1330    }
1331}
1332
1333#[doc(hidden)]
1334#[derive(Copy, Clone, Eq, PartialEq)]
1335pub struct Delsr_SPEC;
1336impl crate::sealed::RegSpec for Delsr_SPEC {
1337    type DataType = u32;
1338}
1339#[doc = "DMAC Event Link Setting Register %s"]
1340pub type Delsr = crate::RegValueT<Delsr_SPEC>;
1341
1342impl Delsr {
1343    #[doc = "DMAC Event Link Select"]
1344    #[inline(always)]
1345    pub fn dels(
1346        self,
1347    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, delsr::Dels, Delsr_SPEC, crate::common::RW>
1348    {
1349        crate::common::RegisterField::<0,0x1ff,1,0,delsr::Dels, Delsr_SPEC,crate::common::RW>::from_register(self,0)
1350    }
1351    #[doc = "DMAC Activation Request Status Flag"]
1352    #[inline(always)]
1353    pub fn ir(
1354        self,
1355    ) -> crate::common::RegisterField<16, 0x1, 1, 0, delsr::Ir, Delsr_SPEC, crate::common::RW> {
1356        crate::common::RegisterField::<16,0x1,1,0,delsr::Ir, Delsr_SPEC,crate::common::RW>::from_register(self,0)
1357    }
1358}
1359impl ::core::default::Default for Delsr {
1360    #[inline(always)]
1361    fn default() -> Delsr {
1362        <crate::RegValueT<Delsr_SPEC> as RegisterValue<_>>::new(0)
1363    }
1364}
1365pub mod delsr {
1366
1367    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1368    pub struct Dels_SPEC;
1369    pub type Dels = crate::EnumBitfieldStruct<u8, Dels_SPEC>;
1370    impl Dels {
1371        #[doc = "Disable interrupts to the associated DMAC module."]
1372        pub const _0_X_00: Self = Self::new(0);
1373        #[doc = "Event signal number to be linked. For details, see ."]
1374        pub const OTHERS: Self = Self::new(0);
1375    }
1376    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1377    pub struct Ir_SPEC;
1378    pub type Ir = crate::EnumBitfieldStruct<u8, Ir_SPEC>;
1379    impl Ir {
1380        #[doc = "No DMAC activation request occurred."]
1381        pub const _0: Self = Self::new(0);
1382        #[doc = "DMAC activation request occurred."]
1383        pub const _1: Self = Self::new(1);
1384    }
1385}
1386#[doc(hidden)]
1387#[derive(Copy, Clone, Eq, PartialEq)]
1388pub struct Ielsr_SPEC;
1389impl crate::sealed::RegSpec for Ielsr_SPEC {
1390    type DataType = u32;
1391}
1392#[doc = "ICU Event Link Setting Register %s"]
1393pub type Ielsr = crate::RegValueT<Ielsr_SPEC>;
1394
1395impl NoBitfieldReg<Ielsr_SPEC> for Ielsr {}
1396impl ::core::default::Default for Ielsr {
1397    #[inline(always)]
1398    fn default() -> Ielsr {
1399        <crate::RegValueT<Ielsr_SPEC> as RegisterValue<_>>::new(0)
1400    }
1401}
ra4e2_pac/icu.rs

ra4e2_pac/
icu.rs
