ra4e2_pac/
cac.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Clock Frequency Accuracy Measurement Circuit"]
28unsafe impl ::core::marker::Send for super::Cac {}
29unsafe impl ::core::marker::Sync for super::Cac {}
30impl super::Cac {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "CAC Control Register 0"]
37    #[inline(always)]
38    pub const fn cacr0(&self) -> &'static crate::common::Reg<self::Cacr0_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Cacr0_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(0usize),
42            )
43        }
44    }
45
46    #[doc = "CAC Control Register 1"]
47    #[inline(always)]
48    pub const fn cacr1(&self) -> &'static crate::common::Reg<self::Cacr1_SPEC, crate::common::RW> {
49        unsafe {
50            crate::common::Reg::<self::Cacr1_SPEC, crate::common::RW>::from_ptr(
51                self._svd2pac_as_ptr().add(1usize),
52            )
53        }
54    }
55
56    #[doc = "CAC Control Register 2"]
57    #[inline(always)]
58    pub const fn cacr2(&self) -> &'static crate::common::Reg<self::Cacr2_SPEC, crate::common::RW> {
59        unsafe {
60            crate::common::Reg::<self::Cacr2_SPEC, crate::common::RW>::from_ptr(
61                self._svd2pac_as_ptr().add(2usize),
62            )
63        }
64    }
65
66    #[doc = "CAC Interrupt Control Register"]
67    #[inline(always)]
68    pub const fn caicr(&self) -> &'static crate::common::Reg<self::Caicr_SPEC, crate::common::RW> {
69        unsafe {
70            crate::common::Reg::<self::Caicr_SPEC, crate::common::RW>::from_ptr(
71                self._svd2pac_as_ptr().add(3usize),
72            )
73        }
74    }
75
76    #[doc = "CAC Status Register"]
77    #[inline(always)]
78    pub const fn castr(&self) -> &'static crate::common::Reg<self::Castr_SPEC, crate::common::R> {
79        unsafe {
80            crate::common::Reg::<self::Castr_SPEC, crate::common::R>::from_ptr(
81                self._svd2pac_as_ptr().add(4usize),
82            )
83        }
84    }
85
86    #[doc = "CAC Upper-Limit Value Setting Register"]
87    #[inline(always)]
88    pub const fn caulvr(
89        &self,
90    ) -> &'static crate::common::Reg<self::Caulvr_SPEC, crate::common::RW> {
91        unsafe {
92            crate::common::Reg::<self::Caulvr_SPEC, crate::common::RW>::from_ptr(
93                self._svd2pac_as_ptr().add(6usize),
94            )
95        }
96    }
97
98    #[doc = "CAC Lower-Limit Value Setting Register"]
99    #[inline(always)]
100    pub const fn callvr(
101        &self,
102    ) -> &'static crate::common::Reg<self::Callvr_SPEC, crate::common::RW> {
103        unsafe {
104            crate::common::Reg::<self::Callvr_SPEC, crate::common::RW>::from_ptr(
105                self._svd2pac_as_ptr().add(8usize),
106            )
107        }
108    }
109
110    #[doc = "CAC Counter Buffer Register"]
111    #[inline(always)]
112    pub const fn cacntbr(
113        &self,
114    ) -> &'static crate::common::Reg<self::Cacntbr_SPEC, crate::common::R> {
115        unsafe {
116            crate::common::Reg::<self::Cacntbr_SPEC, crate::common::R>::from_ptr(
117                self._svd2pac_as_ptr().add(10usize),
118            )
119        }
120    }
121}
122#[doc(hidden)]
123#[derive(Copy, Clone, Eq, PartialEq)]
124pub struct Cacr0_SPEC;
125impl crate::sealed::RegSpec for Cacr0_SPEC {
126    type DataType = u8;
127}
128#[doc = "CAC Control Register 0"]
129pub type Cacr0 = crate::RegValueT<Cacr0_SPEC>;
130
131impl Cacr0 {
132    #[doc = "Clock Frequency Measurement Enable"]
133    #[inline(always)]
134    pub fn cfme(
135        self,
136    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cacr0::Cfme, Cacr0_SPEC, crate::common::RW>
137    {
138        crate::common::RegisterField::<0,0x1,1,0,cacr0::Cfme, Cacr0_SPEC,crate::common::RW>::from_register(self,0)
139    }
140}
141impl ::core::default::Default for Cacr0 {
142    #[inline(always)]
143    fn default() -> Cacr0 {
144        <crate::RegValueT<Cacr0_SPEC> as RegisterValue<_>>::new(0)
145    }
146}
147pub mod cacr0 {
148
149    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
150    pub struct Cfme_SPEC;
151    pub type Cfme = crate::EnumBitfieldStruct<u8, Cfme_SPEC>;
152    impl Cfme {
153        #[doc = "Disable"]
154        pub const _0: Self = Self::new(0);
155        #[doc = "Enable"]
156        pub const _1: Self = Self::new(1);
157    }
158}
159#[doc(hidden)]
160#[derive(Copy, Clone, Eq, PartialEq)]
161pub struct Cacr1_SPEC;
162impl crate::sealed::RegSpec for Cacr1_SPEC {
163    type DataType = u8;
164}
165#[doc = "CAC Control Register 1"]
166pub type Cacr1 = crate::RegValueT<Cacr1_SPEC>;
167
168impl Cacr1 {
169    #[doc = "CACREF Pin Input Enable"]
170    #[inline(always)]
171    pub fn cacrefe(
172        self,
173    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cacr1::Cacrefe, Cacr1_SPEC, crate::common::RW>
174    {
175        crate::common::RegisterField::<0,0x1,1,0,cacr1::Cacrefe, Cacr1_SPEC,crate::common::RW>::from_register(self,0)
176    }
177    #[doc = "Measurement Target Clock Select"]
178    #[inline(always)]
179    pub fn fmcs(
180        self,
181    ) -> crate::common::RegisterField<1, 0x7, 1, 0, cacr1::Fmcs, Cacr1_SPEC, crate::common::RW>
182    {
183        crate::common::RegisterField::<1,0x7,1,0,cacr1::Fmcs, Cacr1_SPEC,crate::common::RW>::from_register(self,0)
184    }
185    #[doc = "Timer Count Clock Source Select"]
186    #[inline(always)]
187    pub fn tcss(
188        self,
189    ) -> crate::common::RegisterField<4, 0x3, 1, 0, cacr1::Tcss, Cacr1_SPEC, crate::common::RW>
190    {
191        crate::common::RegisterField::<4,0x3,1,0,cacr1::Tcss, Cacr1_SPEC,crate::common::RW>::from_register(self,0)
192    }
193    #[doc = "Valid Edge Select"]
194    #[inline(always)]
195    pub fn edges(
196        self,
197    ) -> crate::common::RegisterField<6, 0x3, 1, 0, cacr1::Edges, Cacr1_SPEC, crate::common::RW>
198    {
199        crate::common::RegisterField::<6,0x3,1,0,cacr1::Edges, Cacr1_SPEC,crate::common::RW>::from_register(self,0)
200    }
201}
202impl ::core::default::Default for Cacr1 {
203    #[inline(always)]
204    fn default() -> Cacr1 {
205        <crate::RegValueT<Cacr1_SPEC> as RegisterValue<_>>::new(0)
206    }
207}
208pub mod cacr1 {
209
210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
211    pub struct Cacrefe_SPEC;
212    pub type Cacrefe = crate::EnumBitfieldStruct<u8, Cacrefe_SPEC>;
213    impl Cacrefe {
214        #[doc = "Disable"]
215        pub const _0: Self = Self::new(0);
216        #[doc = "Enable"]
217        pub const _1: Self = Self::new(1);
218    }
219    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
220    pub struct Fmcs_SPEC;
221    pub type Fmcs = crate::EnumBitfieldStruct<u8, Fmcs_SPEC>;
222    impl Fmcs {
223        #[doc = "Main clock oscillator"]
224        pub const _000: Self = Self::new(0);
225        #[doc = "Sub-clock oscillator"]
226        pub const _001: Self = Self::new(1);
227        #[doc = "HOCO clock"]
228        pub const _010: Self = Self::new(2);
229        #[doc = "MOCO clock"]
230        pub const _011: Self = Self::new(3);
231        #[doc = "LOCO clock"]
232        pub const _100: Self = Self::new(4);
233        #[doc = "Peripheral module clock B (PCLKB)"]
234        pub const _101: Self = Self::new(5);
235        #[doc = "IWDT-dedicated clock"]
236        pub const _110: Self = Self::new(6);
237        #[doc = "Setting prohibited"]
238        pub const _111: Self = Self::new(7);
239    }
240    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
241    pub struct Tcss_SPEC;
242    pub type Tcss = crate::EnumBitfieldStruct<u8, Tcss_SPEC>;
243    impl Tcss {
244        #[doc = "No division"]
245        pub const _00: Self = Self::new(0);
246        #[doc = "x 1/4 clock"]
247        pub const _01: Self = Self::new(1);
248        #[doc = "x 1/8 clock"]
249        pub const _10: Self = Self::new(2);
250        #[doc = "x 1/32 clock"]
251        pub const _11: Self = Self::new(3);
252    }
253    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
254    pub struct Edges_SPEC;
255    pub type Edges = crate::EnumBitfieldStruct<u8, Edges_SPEC>;
256    impl Edges {
257        #[doc = "Rising edge"]
258        pub const _00: Self = Self::new(0);
259        #[doc = "Falling edge"]
260        pub const _01: Self = Self::new(1);
261        #[doc = "Both rising and falling edges"]
262        pub const _10: Self = Self::new(2);
263        #[doc = "Setting prohibited"]
264        pub const _11: Self = Self::new(3);
265    }
266}
267#[doc(hidden)]
268#[derive(Copy, Clone, Eq, PartialEq)]
269pub struct Cacr2_SPEC;
270impl crate::sealed::RegSpec for Cacr2_SPEC {
271    type DataType = u8;
272}
273#[doc = "CAC Control Register 2"]
274pub type Cacr2 = crate::RegValueT<Cacr2_SPEC>;
275
276impl Cacr2 {
277    #[doc = "Reference Signal Select"]
278    #[inline(always)]
279    pub fn rps(
280        self,
281    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cacr2::Rps, Cacr2_SPEC, crate::common::RW> {
282        crate::common::RegisterField::<0,0x1,1,0,cacr2::Rps, Cacr2_SPEC,crate::common::RW>::from_register(self,0)
283    }
284    #[doc = "Measurement Reference Clock Select"]
285    #[inline(always)]
286    pub fn rscs(
287        self,
288    ) -> crate::common::RegisterField<1, 0x7, 1, 0, cacr2::Rscs, Cacr2_SPEC, crate::common::RW>
289    {
290        crate::common::RegisterField::<1,0x7,1,0,cacr2::Rscs, Cacr2_SPEC,crate::common::RW>::from_register(self,0)
291    }
292    #[doc = "Measurement Reference Clock Frequency Division Ratio Select"]
293    #[inline(always)]
294    pub fn rcds(
295        self,
296    ) -> crate::common::RegisterField<4, 0x3, 1, 0, cacr2::Rcds, Cacr2_SPEC, crate::common::RW>
297    {
298        crate::common::RegisterField::<4,0x3,1,0,cacr2::Rcds, Cacr2_SPEC,crate::common::RW>::from_register(self,0)
299    }
300    #[doc = "Digital Filter Select"]
301    #[inline(always)]
302    pub fn dfs(
303        self,
304    ) -> crate::common::RegisterField<6, 0x3, 1, 0, cacr2::Dfs, Cacr2_SPEC, crate::common::RW> {
305        crate::common::RegisterField::<6,0x3,1,0,cacr2::Dfs, Cacr2_SPEC,crate::common::RW>::from_register(self,0)
306    }
307}
308impl ::core::default::Default for Cacr2 {
309    #[inline(always)]
310    fn default() -> Cacr2 {
311        <crate::RegValueT<Cacr2_SPEC> as RegisterValue<_>>::new(0)
312    }
313}
314pub mod cacr2 {
315
316    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
317    pub struct Rps_SPEC;
318    pub type Rps = crate::EnumBitfieldStruct<u8, Rps_SPEC>;
319    impl Rps {
320        #[doc = "CACREF pin input"]
321        pub const _0: Self = Self::new(0);
322        #[doc = "Internal clock (internally generated signal)"]
323        pub const _1: Self = Self::new(1);
324    }
325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
326    pub struct Rscs_SPEC;
327    pub type Rscs = crate::EnumBitfieldStruct<u8, Rscs_SPEC>;
328    impl Rscs {
329        #[doc = "Main clock oscillator"]
330        pub const _000: Self = Self::new(0);
331        #[doc = "Sub-clock oscillator"]
332        pub const _001: Self = Self::new(1);
333        #[doc = "HOCO clock"]
334        pub const _010: Self = Self::new(2);
335        #[doc = "MOCO clock"]
336        pub const _011: Self = Self::new(3);
337        #[doc = "LOCO clock"]
338        pub const _100: Self = Self::new(4);
339        #[doc = "Peripheral module clock B (PCLKB)"]
340        pub const _101: Self = Self::new(5);
341        #[doc = "IWDT-dedicated clock"]
342        pub const _110: Self = Self::new(6);
343        #[doc = "Setting prohibited"]
344        pub const _111: Self = Self::new(7);
345    }
346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
347    pub struct Rcds_SPEC;
348    pub type Rcds = crate::EnumBitfieldStruct<u8, Rcds_SPEC>;
349    impl Rcds {
350        #[doc = "x 1/32 clock"]
351        pub const _00: Self = Self::new(0);
352        #[doc = "x 1/128 clock"]
353        pub const _01: Self = Self::new(1);
354        #[doc = "x 1/1024 clock"]
355        pub const _10: Self = Self::new(2);
356        #[doc = "x 1/8192 clock"]
357        pub const _11: Self = Self::new(3);
358    }
359    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
360    pub struct Dfs_SPEC;
361    pub type Dfs = crate::EnumBitfieldStruct<u8, Dfs_SPEC>;
362    impl Dfs {
363        #[doc = "Disable digital filtering"]
364        pub const _00: Self = Self::new(0);
365        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock"]
366        pub const _01: Self = Self::new(1);
367        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock divided by 4"]
368        pub const _10: Self = Self::new(2);
369        #[doc = "Use sampling clock for the digital filter as the frequency measuring clock divided by 16."]
370        pub const _11: Self = Self::new(3);
371    }
372}
373#[doc(hidden)]
374#[derive(Copy, Clone, Eq, PartialEq)]
375pub struct Caicr_SPEC;
376impl crate::sealed::RegSpec for Caicr_SPEC {
377    type DataType = u8;
378}
379#[doc = "CAC Interrupt Control Register"]
380pub type Caicr = crate::RegValueT<Caicr_SPEC>;
381
382impl Caicr {
383    #[doc = "Frequency Error Interrupt Request Enable"]
384    #[inline(always)]
385    pub fn ferrie(
386        self,
387    ) -> crate::common::RegisterField<0, 0x1, 1, 0, caicr::Ferrie, Caicr_SPEC, crate::common::RW>
388    {
389        crate::common::RegisterField::<0,0x1,1,0,caicr::Ferrie, Caicr_SPEC,crate::common::RW>::from_register(self,0)
390    }
391    #[doc = "Measurement End Interrupt Request Enable"]
392    #[inline(always)]
393    pub fn mendie(
394        self,
395    ) -> crate::common::RegisterField<1, 0x1, 1, 0, caicr::Mendie, Caicr_SPEC, crate::common::RW>
396    {
397        crate::common::RegisterField::<1,0x1,1,0,caicr::Mendie, Caicr_SPEC,crate::common::RW>::from_register(self,0)
398    }
399    #[doc = "Overflow Interrupt Request Enable"]
400    #[inline(always)]
401    pub fn ovfie(
402        self,
403    ) -> crate::common::RegisterField<2, 0x1, 1, 0, caicr::Ovfie, Caicr_SPEC, crate::common::RW>
404    {
405        crate::common::RegisterField::<2,0x1,1,0,caicr::Ovfie, Caicr_SPEC,crate::common::RW>::from_register(self,0)
406    }
407    #[doc = "FERRF Clear"]
408    #[inline(always)]
409    pub fn ferrfcl(
410        self,
411    ) -> crate::common::RegisterField<4, 0x1, 1, 0, caicr::Ferrfcl, Caicr_SPEC, crate::common::W>
412    {
413        crate::common::RegisterField::<4,0x1,1,0,caicr::Ferrfcl, Caicr_SPEC,crate::common::W>::from_register(self,0)
414    }
415    #[doc = "MENDF Clear"]
416    #[inline(always)]
417    pub fn mendfcl(
418        self,
419    ) -> crate::common::RegisterField<5, 0x1, 1, 0, caicr::Mendfcl, Caicr_SPEC, crate::common::W>
420    {
421        crate::common::RegisterField::<5,0x1,1,0,caicr::Mendfcl, Caicr_SPEC,crate::common::W>::from_register(self,0)
422    }
423    #[doc = "OVFF Clear"]
424    #[inline(always)]
425    pub fn ovffcl(
426        self,
427    ) -> crate::common::RegisterField<6, 0x1, 1, 0, caicr::Ovffcl, Caicr_SPEC, crate::common::W>
428    {
429        crate::common::RegisterField::<6,0x1,1,0,caicr::Ovffcl, Caicr_SPEC,crate::common::W>::from_register(self,0)
430    }
431}
432impl ::core::default::Default for Caicr {
433    #[inline(always)]
434    fn default() -> Caicr {
435        <crate::RegValueT<Caicr_SPEC> as RegisterValue<_>>::new(0)
436    }
437}
438pub mod caicr {
439
440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
441    pub struct Ferrie_SPEC;
442    pub type Ferrie = crate::EnumBitfieldStruct<u8, Ferrie_SPEC>;
443    impl Ferrie {
444        #[doc = "Disable"]
445        pub const _0: Self = Self::new(0);
446        #[doc = "Enable"]
447        pub const _1: Self = Self::new(1);
448    }
449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
450    pub struct Mendie_SPEC;
451    pub type Mendie = crate::EnumBitfieldStruct<u8, Mendie_SPEC>;
452    impl Mendie {
453        #[doc = "Disable"]
454        pub const _0: Self = Self::new(0);
455        #[doc = "Enable"]
456        pub const _1: Self = Self::new(1);
457    }
458    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
459    pub struct Ovfie_SPEC;
460    pub type Ovfie = crate::EnumBitfieldStruct<u8, Ovfie_SPEC>;
461    impl Ovfie {
462        #[doc = "Disable"]
463        pub const _0: Self = Self::new(0);
464        #[doc = "Enable"]
465        pub const _1: Self = Self::new(1);
466    }
467    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
468    pub struct Ferrfcl_SPEC;
469    pub type Ferrfcl = crate::EnumBitfieldStruct<u8, Ferrfcl_SPEC>;
470    impl Ferrfcl {
471        #[doc = "No effect"]
472        pub const _0: Self = Self::new(0);
473        #[doc = "The CASTR.FERRF flag is cleared"]
474        pub const _1: Self = Self::new(1);
475    }
476    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
477    pub struct Mendfcl_SPEC;
478    pub type Mendfcl = crate::EnumBitfieldStruct<u8, Mendfcl_SPEC>;
479    impl Mendfcl {
480        #[doc = "No effect"]
481        pub const _0: Self = Self::new(0);
482        #[doc = "The CASTR.MENDF flag is cleared"]
483        pub const _1: Self = Self::new(1);
484    }
485    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
486    pub struct Ovffcl_SPEC;
487    pub type Ovffcl = crate::EnumBitfieldStruct<u8, Ovffcl_SPEC>;
488    impl Ovffcl {
489        #[doc = "No effect"]
490        pub const _0: Self = Self::new(0);
491        #[doc = "The CASTR.OVFF flag is cleared."]
492        pub const _1: Self = Self::new(1);
493    }
494}
495#[doc(hidden)]
496#[derive(Copy, Clone, Eq, PartialEq)]
497pub struct Castr_SPEC;
498impl crate::sealed::RegSpec for Castr_SPEC {
499    type DataType = u8;
500}
501#[doc = "CAC Status Register"]
502pub type Castr = crate::RegValueT<Castr_SPEC>;
503
504impl Castr {
505    #[doc = "Frequency Error Flag"]
506    #[inline(always)]
507    pub fn ferrf(
508        self,
509    ) -> crate::common::RegisterField<0, 0x1, 1, 0, castr::Ferrf, Castr_SPEC, crate::common::R>
510    {
511        crate::common::RegisterField::<0,0x1,1,0,castr::Ferrf, Castr_SPEC,crate::common::R>::from_register(self,0)
512    }
513    #[doc = "Measurement End Flag"]
514    #[inline(always)]
515    pub fn mendf(
516        self,
517    ) -> crate::common::RegisterField<1, 0x1, 1, 0, castr::Mendf, Castr_SPEC, crate::common::R>
518    {
519        crate::common::RegisterField::<1,0x1,1,0,castr::Mendf, Castr_SPEC,crate::common::R>::from_register(self,0)
520    }
521    #[doc = "Overflow Flag"]
522    #[inline(always)]
523    pub fn ovff(
524        self,
525    ) -> crate::common::RegisterField<2, 0x1, 1, 0, castr::Ovff, Castr_SPEC, crate::common::R> {
526        crate::common::RegisterField::<2,0x1,1,0,castr::Ovff, Castr_SPEC,crate::common::R>::from_register(self,0)
527    }
528}
529impl ::core::default::Default for Castr {
530    #[inline(always)]
531    fn default() -> Castr {
532        <crate::RegValueT<Castr_SPEC> as RegisterValue<_>>::new(0)
533    }
534}
535pub mod castr {
536
537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
538    pub struct Ferrf_SPEC;
539    pub type Ferrf = crate::EnumBitfieldStruct<u8, Ferrf_SPEC>;
540    impl Ferrf {
541        #[doc = "Clock frequency is within the allowable range"]
542        pub const _0: Self = Self::new(0);
543        #[doc = "Clock frequency has deviated beyond the allowable range (frequency error)."]
544        pub const _1: Self = Self::new(1);
545    }
546    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
547    pub struct Mendf_SPEC;
548    pub type Mendf = crate::EnumBitfieldStruct<u8, Mendf_SPEC>;
549    impl Mendf {
550        #[doc = "Measurement is in progress"]
551        pub const _0: Self = Self::new(0);
552        #[doc = "Measurement ended"]
553        pub const _1: Self = Self::new(1);
554    }
555    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
556    pub struct Ovff_SPEC;
557    pub type Ovff = crate::EnumBitfieldStruct<u8, Ovff_SPEC>;
558    impl Ovff {
559        #[doc = "Counter has not overflowed"]
560        pub const _0: Self = Self::new(0);
561        #[doc = "Counter overflowed"]
562        pub const _1: Self = Self::new(1);
563    }
564}
565#[doc(hidden)]
566#[derive(Copy, Clone, Eq, PartialEq)]
567pub struct Caulvr_SPEC;
568impl crate::sealed::RegSpec for Caulvr_SPEC {
569    type DataType = u16;
570}
571#[doc = "CAC Upper-Limit Value Setting Register"]
572pub type Caulvr = crate::RegValueT<Caulvr_SPEC>;
573
574impl NoBitfieldReg<Caulvr_SPEC> for Caulvr {}
575impl ::core::default::Default for Caulvr {
576    #[inline(always)]
577    fn default() -> Caulvr {
578        <crate::RegValueT<Caulvr_SPEC> as RegisterValue<_>>::new(0)
579    }
580}
581
582#[doc(hidden)]
583#[derive(Copy, Clone, Eq, PartialEq)]
584pub struct Callvr_SPEC;
585impl crate::sealed::RegSpec for Callvr_SPEC {
586    type DataType = u16;
587}
588#[doc = "CAC Lower-Limit Value Setting Register"]
589pub type Callvr = crate::RegValueT<Callvr_SPEC>;
590
591impl NoBitfieldReg<Callvr_SPEC> for Callvr {}
592impl ::core::default::Default for Callvr {
593    #[inline(always)]
594    fn default() -> Callvr {
595        <crate::RegValueT<Callvr_SPEC> as RegisterValue<_>>::new(0)
596    }
597}
598
599#[doc(hidden)]
600#[derive(Copy, Clone, Eq, PartialEq)]
601pub struct Cacntbr_SPEC;
602impl crate::sealed::RegSpec for Cacntbr_SPEC {
603    type DataType = u16;
604}
605#[doc = "CAC Counter Buffer Register"]
606pub type Cacntbr = crate::RegValueT<Cacntbr_SPEC>;
607
608impl NoBitfieldReg<Cacntbr_SPEC> for Cacntbr {}
609impl ::core::default::Default for Cacntbr {
610    #[inline(always)]
611    fn default() -> Cacntbr {
612        <crate::RegValueT<Cacntbr_SPEC> as RegisterValue<_>>::new(0)
613    }
614}
ra4e2_pac/cac.rs

ra4e2_pac/
cac.rs
