ra4e2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "Standby Control Register"]
37    #[inline(always)]
38    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
39        unsafe {
40            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
41                self._svd2pac_as_ptr().add(12usize),
42            )
43        }
44    }
45
46    #[doc = "System Clock Division Control Register"]
47    #[inline(always)]
48    pub const fn sckdivcr(
49        &self,
50    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
51        unsafe {
52            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
53                self._svd2pac_as_ptr().add(32usize),
54            )
55        }
56    }
57
58    #[doc = "System Clock Source Control Register"]
59    #[inline(always)]
60    pub const fn sckscr(
61        &self,
62    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
63        unsafe {
64            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
65                self._svd2pac_as_ptr().add(38usize),
66            )
67        }
68    }
69
70    #[doc = "PLL Clock Control Register"]
71    #[inline(always)]
72    pub const fn pllccr(
73        &self,
74    ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
75        unsafe {
76            crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
77                self._svd2pac_as_ptr().add(40usize),
78            )
79        }
80    }
81
82    #[doc = "PLL Control Register"]
83    #[inline(always)]
84    pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
85        unsafe {
86            crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
87                self._svd2pac_as_ptr().add(42usize),
88            )
89        }
90    }
91
92    #[doc = "Main Clock Oscillator Control Register"]
93    #[inline(always)]
94    pub const fn mosccr(
95        &self,
96    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
97        unsafe {
98            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
99                self._svd2pac_as_ptr().add(50usize),
100            )
101        }
102    }
103
104    #[doc = "High-Speed On-Chip Oscillator Control Register"]
105    #[inline(always)]
106    pub const fn hococr(
107        &self,
108    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
109        unsafe {
110            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
111                self._svd2pac_as_ptr().add(54usize),
112            )
113        }
114    }
115
116    #[doc = "High-Speed On-Chip Oscillator Control Register 2"]
117    #[inline(always)]
118    pub const fn hococr2(
119        &self,
120    ) -> &'static crate::common::Reg<self::Hococr2_SPEC, crate::common::RW> {
121        unsafe {
122            crate::common::Reg::<self::Hococr2_SPEC, crate::common::RW>::from_ptr(
123                self._svd2pac_as_ptr().add(55usize),
124            )
125        }
126    }
127
128    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
129    #[inline(always)]
130    pub const fn mococr(
131        &self,
132    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
133        unsafe {
134            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
135                self._svd2pac_as_ptr().add(56usize),
136            )
137        }
138    }
139
140    #[doc = "FLL Control Register1"]
141    #[inline(always)]
142    pub const fn fllcr1(
143        &self,
144    ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
145        unsafe {
146            crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
147                self._svd2pac_as_ptr().add(57usize),
148            )
149        }
150    }
151
152    #[doc = "FLL Control Register2"]
153    #[inline(always)]
154    pub const fn fllcr2(
155        &self,
156    ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
157        unsafe {
158            crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
159                self._svd2pac_as_ptr().add(58usize),
160            )
161        }
162    }
163
164    #[doc = "Oscillation Stabilization Flag Register"]
165    #[inline(always)]
166    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
167        unsafe {
168            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
169                self._svd2pac_as_ptr().add(60usize),
170            )
171        }
172    }
173
174    #[doc = "Clock Out Control Register"]
175    #[inline(always)]
176    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
177        unsafe {
178            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
179                self._svd2pac_as_ptr().add(62usize),
180            )
181        }
182    }
183
184    #[doc = "Oscillation Stop Detection Control Register"]
185    #[inline(always)]
186    pub const fn ostdcr(
187        &self,
188    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
189        unsafe {
190            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
191                self._svd2pac_as_ptr().add(64usize),
192            )
193        }
194    }
195
196    #[doc = "Oscillation Stop Detection Status Register"]
197    #[inline(always)]
198    pub const fn ostdsr(
199        &self,
200    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
201        unsafe {
202            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
203                self._svd2pac_as_ptr().add(65usize),
204            )
205        }
206    }
207
208    #[doc = "MOCO User Trimming Control Register"]
209    #[inline(always)]
210    pub const fn mocoutcr(
211        &self,
212    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
213        unsafe {
214            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
215                self._svd2pac_as_ptr().add(97usize),
216            )
217        }
218    }
219
220    #[doc = "HOCO User Trimming Control Register"]
221    #[inline(always)]
222    pub const fn hocoutcr(
223        &self,
224    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
225        unsafe {
226            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
227                self._svd2pac_as_ptr().add(98usize),
228            )
229        }
230    }
231
232    #[doc = "USB Clock Division Control Register"]
233    #[inline(always)]
234    pub const fn usbckdivcr(
235        &self,
236    ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
237        unsafe {
238            crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
239                self._svd2pac_as_ptr().add(108usize),
240            )
241        }
242    }
243
244    #[doc = "CANFD Clock Division Control Register"]
245    #[inline(always)]
246    pub const fn canfdckdivcr(
247        &self,
248    ) -> &'static crate::common::Reg<self::Canfdckdivcr_SPEC, crate::common::RW> {
249        unsafe {
250            crate::common::Reg::<self::Canfdckdivcr_SPEC, crate::common::RW>::from_ptr(
251                self._svd2pac_as_ptr().add(110usize),
252            )
253        }
254    }
255
256    #[doc = "CEC Clock Division Control Register"]
257    #[inline(always)]
258    pub const fn cecckdivcr(
259        &self,
260    ) -> &'static crate::common::Reg<self::Cecckdivcr_SPEC, crate::common::RW> {
261        unsafe {
262            crate::common::Reg::<self::Cecckdivcr_SPEC, crate::common::RW>::from_ptr(
263                self._svd2pac_as_ptr().add(112usize),
264            )
265        }
266    }
267
268    #[doc = "I3C Clock Division Control Register"]
269    #[inline(always)]
270    pub const fn i3cckdivcr(
271        &self,
272    ) -> &'static crate::common::Reg<self::I3Cckdivcr_SPEC, crate::common::RW> {
273        unsafe {
274            crate::common::Reg::<self::I3Cckdivcr_SPEC, crate::common::RW>::from_ptr(
275                self._svd2pac_as_ptr().add(113usize),
276            )
277        }
278    }
279
280    #[doc = "USB Clock Control Register"]
281    #[inline(always)]
282    pub const fn usbckcr(
283        &self,
284    ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
285        unsafe {
286            crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
287                self._svd2pac_as_ptr().add(116usize),
288            )
289        }
290    }
291
292    #[doc = "CANFD Clock Control Register"]
293    #[inline(always)]
294    pub const fn canfdckcr(
295        &self,
296    ) -> &'static crate::common::Reg<self::Canfdckcr_SPEC, crate::common::RW> {
297        unsafe {
298            crate::common::Reg::<self::Canfdckcr_SPEC, crate::common::RW>::from_ptr(
299                self._svd2pac_as_ptr().add(118usize),
300            )
301        }
302    }
303
304    #[doc = "CEC Clock Control Register"]
305    #[inline(always)]
306    pub const fn cecckcr(
307        &self,
308    ) -> &'static crate::common::Reg<self::Cecckcr_SPEC, crate::common::RW> {
309        unsafe {
310            crate::common::Reg::<self::Cecckcr_SPEC, crate::common::RW>::from_ptr(
311                self._svd2pac_as_ptr().add(120usize),
312            )
313        }
314    }
315
316    #[doc = "I3C Clock Control Register"]
317    #[inline(always)]
318    pub const fn i3cckcr(
319        &self,
320    ) -> &'static crate::common::Reg<self::I3Cckcr_SPEC, crate::common::RW> {
321        unsafe {
322            crate::common::Reg::<self::I3Cckcr_SPEC, crate::common::RW>::from_ptr(
323                self._svd2pac_as_ptr().add(121usize),
324            )
325        }
326    }
327
328    #[doc = "Snooze Control Register"]
329    #[inline(always)]
330    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
331        unsafe {
332            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
333                self._svd2pac_as_ptr().add(146usize),
334            )
335        }
336    }
337
338    #[doc = "Snooze End Control Register 0"]
339    #[inline(always)]
340    pub const fn snzedcr0(
341        &self,
342    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
343        unsafe {
344            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
345                self._svd2pac_as_ptr().add(148usize),
346            )
347        }
348    }
349
350    #[doc = "Snooze Request Control Register 0"]
351    #[inline(always)]
352    pub const fn snzreqcr0(
353        &self,
354    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
355        unsafe {
356            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
357                self._svd2pac_as_ptr().add(152usize),
358            )
359        }
360    }
361
362    #[doc = "Operating Power Control Register"]
363    #[inline(always)]
364    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
365        unsafe {
366            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
367                self._svd2pac_as_ptr().add(160usize),
368            )
369        }
370    }
371
372    #[doc = "Main Clock Oscillator Wait Control Register"]
373    #[inline(always)]
374    pub const fn moscwtcr(
375        &self,
376    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
377        unsafe {
378            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
379                self._svd2pac_as_ptr().add(162usize),
380            )
381        }
382    }
383
384    #[doc = "Sub Operating Power Control Register"]
385    #[inline(always)]
386    pub const fn sopccr(
387        &self,
388    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
389        unsafe {
390            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
391                self._svd2pac_as_ptr().add(170usize),
392            )
393        }
394    }
395
396    #[doc = "Reset Status Register 1"]
397    #[inline(always)]
398    pub const fn rstsr1(
399        &self,
400    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
401        unsafe {
402            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
403                self._svd2pac_as_ptr().add(192usize),
404            )
405        }
406    }
407
408    #[doc = "Voltage Monitor 1 Circuit Control Register"]
409    #[inline(always)]
410    pub const fn lvd1cr1(
411        &self,
412    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
413        unsafe {
414            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
415                self._svd2pac_as_ptr().add(224usize),
416            )
417        }
418    }
419
420    #[doc = "Voltage Monitor 1 Circuit Status Register"]
421    #[inline(always)]
422    pub const fn lvd1sr(
423        &self,
424    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
425        unsafe {
426            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
427                self._svd2pac_as_ptr().add(225usize),
428            )
429        }
430    }
431
432    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
433    #[inline(always)]
434    pub const fn lvd2cr1(
435        &self,
436    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
437        unsafe {
438            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
439                self._svd2pac_as_ptr().add(226usize),
440            )
441        }
442    }
443
444    #[doc = "Voltage Monitor 2 Circuit Status Register"]
445    #[inline(always)]
446    pub const fn lvd2sr(
447        &self,
448    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
449        unsafe {
450            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
451                self._svd2pac_as_ptr().add(227usize),
452            )
453        }
454    }
455
456    #[doc = "Clock Generation Function Security Attribute Register"]
457    #[inline(always)]
458    pub const fn cgfsar(
459        &self,
460    ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
461        unsafe {
462            crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
463                self._svd2pac_as_ptr().add(960usize),
464            )
465        }
466    }
467
468    #[doc = "Reset Security Attribution Register"]
469    #[inline(always)]
470    pub const fn rstsar(
471        &self,
472    ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
473        unsafe {
474            crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
475                self._svd2pac_as_ptr().add(964usize),
476            )
477        }
478    }
479
480    #[doc = "Low Power Mode Security Attribution Register"]
481    #[inline(always)]
482    pub const fn lpmsar(
483        &self,
484    ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
485        unsafe {
486            crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
487                self._svd2pac_as_ptr().add(968usize),
488            )
489        }
490    }
491
492    #[doc = "Low Voltage Detection Security Attribution Register"]
493    #[inline(always)]
494    pub const fn lvdsar(
495        &self,
496    ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
497        unsafe {
498            crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
499                self._svd2pac_as_ptr().add(972usize),
500            )
501        }
502    }
503
504    #[doc = "Deep Standby Interrupt Factor Security Attribution Register"]
505    #[inline(always)]
506    pub const fn dpfsar(
507        &self,
508    ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
509        unsafe {
510            crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
511                self._svd2pac_as_ptr().add(992usize),
512            )
513        }
514    }
515
516    #[doc = "Protect Register"]
517    #[inline(always)]
518    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
519        unsafe {
520            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
521                self._svd2pac_as_ptr().add(1022usize),
522            )
523        }
524    }
525
526    #[doc = "Deep Standby Control Register"]
527    #[inline(always)]
528    pub const fn dpsbycr(
529        &self,
530    ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
531        unsafe {
532            crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
533                self._svd2pac_as_ptr().add(1024usize),
534            )
535        }
536    }
537
538    #[doc = "Deep Standby Wait Control Register"]
539    #[inline(always)]
540    pub const fn dpswcr(
541        &self,
542    ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
543        unsafe {
544            crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
545                self._svd2pac_as_ptr().add(1025usize),
546            )
547        }
548    }
549
550    #[doc = "Deep Standby Interrupt Enable Register 0"]
551    #[inline(always)]
552    pub const fn dpsier0(
553        &self,
554    ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
555        unsafe {
556            crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
557                self._svd2pac_as_ptr().add(1026usize),
558            )
559        }
560    }
561
562    #[doc = "Deep Standby Interrupt Enable Register 1"]
563    #[inline(always)]
564    pub const fn dpsier1(
565        &self,
566    ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
567        unsafe {
568            crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
569                self._svd2pac_as_ptr().add(1027usize),
570            )
571        }
572    }
573
574    #[doc = "Deep Software Standby Interrupt Enable Register 2"]
575    #[inline(always)]
576    pub const fn dpsier2(
577        &self,
578    ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
579        unsafe {
580            crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
581                self._svd2pac_as_ptr().add(1028usize),
582            )
583        }
584    }
585
586    #[doc = "Deep Standby Interrupt Enable Register 3"]
587    #[inline(always)]
588    pub const fn dpsier3(
589        &self,
590    ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
591        unsafe {
592            crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
593                self._svd2pac_as_ptr().add(1029usize),
594            )
595        }
596    }
597
598    #[doc = "Deep Standby Interrupt Flag Register 0"]
599    #[inline(always)]
600    pub const fn dpsifr0(
601        &self,
602    ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
603        unsafe {
604            crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
605                self._svd2pac_as_ptr().add(1030usize),
606            )
607        }
608    }
609
610    #[doc = "Deep Standby Interrupt Flag Register 1"]
611    #[inline(always)]
612    pub const fn dpsifr1(
613        &self,
614    ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
615        unsafe {
616            crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
617                self._svd2pac_as_ptr().add(1031usize),
618            )
619        }
620    }
621
622    #[doc = "Deep Software Standby Interrupt Flag Register 2"]
623    #[inline(always)]
624    pub const fn dpsifr2(
625        &self,
626    ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
627        unsafe {
628            crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
629                self._svd2pac_as_ptr().add(1032usize),
630            )
631        }
632    }
633
634    #[doc = "Deep Standby Interrupt Flag Register 3"]
635    #[inline(always)]
636    pub const fn dpsifr3(
637        &self,
638    ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
639        unsafe {
640            crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
641                self._svd2pac_as_ptr().add(1033usize),
642            )
643        }
644    }
645
646    #[doc = "Deep Standby Interrupt Edge Register 0"]
647    #[inline(always)]
648    pub const fn dpsiegr0(
649        &self,
650    ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
651        unsafe {
652            crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
653                self._svd2pac_as_ptr().add(1034usize),
654            )
655        }
656    }
657
658    #[doc = "Deep Standby Interrupt Edge Register 1"]
659    #[inline(always)]
660    pub const fn dpsiegr1(
661        &self,
662    ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
663        unsafe {
664            crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
665                self._svd2pac_as_ptr().add(1035usize),
666            )
667        }
668    }
669
670    #[doc = "Deep Software Standby Interrupt Edge Register 2"]
671    #[inline(always)]
672    pub const fn dpsiegr2(
673        &self,
674    ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
675        unsafe {
676            crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
677                self._svd2pac_as_ptr().add(1036usize),
678            )
679        }
680    }
681
682    #[doc = "System Control OCD Control Register"]
683    #[inline(always)]
684    pub const fn syocdcr(
685        &self,
686    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
687        unsafe {
688            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
689                self._svd2pac_as_ptr().add(1038usize),
690            )
691        }
692    }
693
694    #[doc = "Reset Status Register 0"]
695    #[inline(always)]
696    pub const fn rstsr0(
697        &self,
698    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
699        unsafe {
700            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
701                self._svd2pac_as_ptr().add(1040usize),
702            )
703        }
704    }
705
706    #[doc = "Reset Status Register 2"]
707    #[inline(always)]
708    pub const fn rstsr2(
709        &self,
710    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
711        unsafe {
712            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
713                self._svd2pac_as_ptr().add(1041usize),
714            )
715        }
716    }
717
718    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
719    #[inline(always)]
720    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
721        unsafe {
722            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
723                self._svd2pac_as_ptr().add(1043usize),
724            )
725        }
726    }
727
728    #[doc = "Flash P/E Protect Register"]
729    #[inline(always)]
730    pub const fn fwepror(
731        &self,
732    ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
733        unsafe {
734            crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
735                self._svd2pac_as_ptr().add(1046usize),
736            )
737        }
738    }
739
740    #[doc = "Voltage Monitoring 1 Comparator Control Register"]
741    #[inline(always)]
742    pub const fn lvd1cmpcr(
743        &self,
744    ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
745        unsafe {
746            crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
747                self._svd2pac_as_ptr().add(1047usize),
748            )
749        }
750    }
751
752    #[doc = "Voltage Monitoring 2 Comparator Control Register"]
753    #[inline(always)]
754    pub const fn lvd2cmpcr(
755        &self,
756    ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
757        unsafe {
758            crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
759                self._svd2pac_as_ptr().add(1048usize),
760            )
761        }
762    }
763
764    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
765    #[inline(always)]
766    pub const fn lvd1cr0(
767        &self,
768    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
769        unsafe {
770            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
771                self._svd2pac_as_ptr().add(1050usize),
772            )
773        }
774    }
775
776    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
777    #[inline(always)]
778    pub const fn lvd2cr0(
779        &self,
780    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
781        unsafe {
782            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
783                self._svd2pac_as_ptr().add(1051usize),
784            )
785        }
786    }
787
788    #[doc = "Sub-Clock Oscillator Control Register"]
789    #[inline(always)]
790    pub const fn sosccr(
791        &self,
792    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
793        unsafe {
794            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
795                self._svd2pac_as_ptr().add(1152usize),
796            )
797        }
798    }
799
800    #[doc = "Sub-Clock Oscillator Mode Control Register"]
801    #[inline(always)]
802    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
803        unsafe {
804            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
805                self._svd2pac_as_ptr().add(1153usize),
806            )
807        }
808    }
809
810    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
811    #[inline(always)]
812    pub const fn lococr(
813        &self,
814    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
815        unsafe {
816            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
817                self._svd2pac_as_ptr().add(1168usize),
818            )
819        }
820    }
821
822    #[doc = "LOCO User Trimming Control Register"]
823    #[inline(always)]
824    pub const fn locoutcr(
825        &self,
826    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
827        unsafe {
828            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
829                self._svd2pac_as_ptr().add(1170usize),
830            )
831        }
832    }
833}
834#[doc(hidden)]
835#[derive(Copy, Clone, Eq, PartialEq)]
836pub struct Sbycr_SPEC;
837impl crate::sealed::RegSpec for Sbycr_SPEC {
838    type DataType = u16;
839}
840#[doc = "Standby Control Register"]
841pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
842
843impl Sbycr {
844    #[doc = "Software Standby Mode Select"]
845    #[inline(always)]
846    pub fn ssby(
847        self,
848    ) -> crate::common::RegisterField<15, 0x1, 1, 0, sbycr::Ssby, Sbycr_SPEC, crate::common::RW>
849    {
850        crate::common::RegisterField::<15,0x1,1,0,sbycr::Ssby, Sbycr_SPEC,crate::common::RW>::from_register(self,0)
851    }
852}
853impl ::core::default::Default for Sbycr {
854    #[inline(always)]
855    fn default() -> Sbycr {
856        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
857    }
858}
859pub mod sbycr {
860
861    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
862    pub struct Ssby_SPEC;
863    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
864    impl Ssby {
865        #[doc = "Sleep mode"]
866        pub const _0: Self = Self::new(0);
867        #[doc = "Software Standby mode."]
868        pub const _1: Self = Self::new(1);
869    }
870}
871#[doc(hidden)]
872#[derive(Copy, Clone, Eq, PartialEq)]
873pub struct Sckdivcr_SPEC;
874impl crate::sealed::RegSpec for Sckdivcr_SPEC {
875    type DataType = u32;
876}
877#[doc = "System Clock Division Control Register"]
878pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
879
880impl Sckdivcr {
881    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
882    #[inline(always)]
883    pub fn pckd(
884        self,
885    ) -> crate::common::RegisterField<0, 0x7, 1, 0, sckdivcr::Pckd, Sckdivcr_SPEC, crate::common::RW>
886    {
887        crate::common::RegisterField::<0,0x7,1,0,sckdivcr::Pckd, Sckdivcr_SPEC,crate::common::RW>::from_register(self,0)
888    }
889    #[doc = "Peripheral Module Clock C (PCLKC) Select"]
890    #[inline(always)]
891    pub fn pckc(
892        self,
893    ) -> crate::common::RegisterField<4, 0x7, 1, 0, sckdivcr::Pckc, Sckdivcr_SPEC, crate::common::RW>
894    {
895        crate::common::RegisterField::<4,0x7,1,0,sckdivcr::Pckc, Sckdivcr_SPEC,crate::common::RW>::from_register(self,0)
896    }
897    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
898    #[inline(always)]
899    pub fn pckb(
900        self,
901    ) -> crate::common::RegisterField<8, 0x7, 1, 0, sckdivcr::Pckb, Sckdivcr_SPEC, crate::common::RW>
902    {
903        crate::common::RegisterField::<8,0x7,1,0,sckdivcr::Pckb, Sckdivcr_SPEC,crate::common::RW>::from_register(self,0)
904    }
905    #[doc = "Peripheral Module Clock A (PCLKA) Select"]
906    #[inline(always)]
907    pub fn pcka(
908        self,
909    ) -> crate::common::RegisterField<12, 0x7, 1, 0, sckdivcr::Pcka, Sckdivcr_SPEC, crate::common::RW>
910    {
911        crate::common::RegisterField::<
912            12,
913            0x7,
914            1,
915            0,
916            sckdivcr::Pcka,
917            Sckdivcr_SPEC,
918            crate::common::RW,
919        >::from_register(self, 0)
920    }
921    #[doc = "System Clock (ICLK) Select"]
922    #[inline(always)]
923    pub fn ick(
924        self,
925    ) -> crate::common::RegisterField<24, 0x7, 1, 0, sckdivcr::Ick, Sckdivcr_SPEC, crate::common::RW>
926    {
927        crate::common::RegisterField::<24,0x7,1,0,sckdivcr::Ick, Sckdivcr_SPEC,crate::common::RW>::from_register(self,0)
928    }
929    #[doc = "FlashIF Clock (FCLK) Select"]
930    #[inline(always)]
931    pub fn fck(
932        self,
933    ) -> crate::common::RegisterField<28, 0x7, 1, 0, sckdivcr::Fck, Sckdivcr_SPEC, crate::common::RW>
934    {
935        crate::common::RegisterField::<28,0x7,1,0,sckdivcr::Fck, Sckdivcr_SPEC,crate::common::RW>::from_register(self,0)
936    }
937}
938impl ::core::default::Default for Sckdivcr {
939    #[inline(always)]
940    fn default() -> Sckdivcr {
941        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570434082)
942    }
943}
944pub mod sckdivcr {
945
946    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
947    pub struct Pckd_SPEC;
948    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
949    impl Pckd {
950        #[doc = "x 1/1"]
951        pub const _000: Self = Self::new(0);
952        #[doc = "x 1/2"]
953        pub const _001: Self = Self::new(1);
954        #[doc = "x 1/4"]
955        pub const _010: Self = Self::new(2);
956        #[doc = "x 1/8"]
957        pub const _011: Self = Self::new(3);
958        #[doc = "x 1/16"]
959        pub const _100: Self = Self::new(4);
960        #[doc = "x 1/32"]
961        pub const _101: Self = Self::new(5);
962        #[doc = "x 1/64"]
963        pub const _110: Self = Self::new(6);
964        #[doc = "Setting prohibited."]
965        pub const OTHERS: Self = Self::new(0);
966    }
967    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
968    pub struct Pckc_SPEC;
969    pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
970    impl Pckc {
971        #[doc = "x 1/1"]
972        pub const _000: Self = Self::new(0);
973        #[doc = "x 1/2"]
974        pub const _001: Self = Self::new(1);
975        #[doc = "x 1/4"]
976        pub const _010: Self = Self::new(2);
977        #[doc = "x 1/8"]
978        pub const _011: Self = Self::new(3);
979        #[doc = "x 1/16"]
980        pub const _100: Self = Self::new(4);
981        #[doc = "x 1/32"]
982        pub const _101: Self = Self::new(5);
983        #[doc = "x 1/64"]
984        pub const _110: Self = Self::new(6);
985        #[doc = "Setting prohibited."]
986        pub const OTHERS: Self = Self::new(0);
987    }
988    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
989    pub struct Pckb_SPEC;
990    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
991    impl Pckb {
992        #[doc = "x 1/1"]
993        pub const _000: Self = Self::new(0);
994        #[doc = "x 1/2"]
995        pub const _001: Self = Self::new(1);
996        #[doc = "x 1/4"]
997        pub const _010: Self = Self::new(2);
998        #[doc = "x 1/8"]
999        pub const _011: Self = Self::new(3);
1000        #[doc = "x 1/16"]
1001        pub const _100: Self = Self::new(4);
1002        #[doc = "x 1/32"]
1003        pub const _101: Self = Self::new(5);
1004        #[doc = "x 1/64"]
1005        pub const _110: Self = Self::new(6);
1006        #[doc = "Setting prohibited."]
1007        pub const OTHERS: Self = Self::new(0);
1008    }
1009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1010    pub struct Pcka_SPEC;
1011    pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1012    impl Pcka {
1013        #[doc = "x 1/1"]
1014        pub const _000: Self = Self::new(0);
1015        #[doc = "x 1/2"]
1016        pub const _001: Self = Self::new(1);
1017        #[doc = "x 1/4"]
1018        pub const _010: Self = Self::new(2);
1019        #[doc = "x 1/8"]
1020        pub const _011: Self = Self::new(3);
1021        #[doc = "x 1/16"]
1022        pub const _100: Self = Self::new(4);
1023        #[doc = "x 1/32"]
1024        pub const _101: Self = Self::new(5);
1025        #[doc = "x 1/64"]
1026        pub const _110: Self = Self::new(6);
1027        #[doc = "Setting prohibited."]
1028        pub const OTHERS: Self = Self::new(0);
1029    }
1030    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1031    pub struct Ick_SPEC;
1032    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1033    impl Ick {
1034        #[doc = "x 1/1"]
1035        pub const _000: Self = Self::new(0);
1036        #[doc = "x 1/2"]
1037        pub const _001: Self = Self::new(1);
1038        #[doc = "x 1/4"]
1039        pub const _010: Self = Self::new(2);
1040        #[doc = "x 1/8"]
1041        pub const _011: Self = Self::new(3);
1042        #[doc = "x 1/16"]
1043        pub const _100: Self = Self::new(4);
1044        #[doc = "x 1/32"]
1045        pub const _101: Self = Self::new(5);
1046        #[doc = "x 1/64"]
1047        pub const _110: Self = Self::new(6);
1048        #[doc = "Setting prohibited."]
1049        pub const OTHERS: Self = Self::new(0);
1050    }
1051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1052    pub struct Fck_SPEC;
1053    pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1054    impl Fck {
1055        #[doc = "x 1/1"]
1056        pub const _000: Self = Self::new(0);
1057        #[doc = "x 1/2"]
1058        pub const _001: Self = Self::new(1);
1059        #[doc = "x 1/4"]
1060        pub const _010: Self = Self::new(2);
1061        #[doc = "x 1/8"]
1062        pub const _011: Self = Self::new(3);
1063        #[doc = "x 1/16"]
1064        pub const _100: Self = Self::new(4);
1065        #[doc = "x 1/32"]
1066        pub const _101: Self = Self::new(5);
1067        #[doc = "x 1/64"]
1068        pub const _110: Self = Self::new(6);
1069        #[doc = "Setting prohibited."]
1070        pub const OTHERS: Self = Self::new(0);
1071    }
1072}
1073#[doc(hidden)]
1074#[derive(Copy, Clone, Eq, PartialEq)]
1075pub struct Sckscr_SPEC;
1076impl crate::sealed::RegSpec for Sckscr_SPEC {
1077    type DataType = u8;
1078}
1079#[doc = "System Clock Source Control Register"]
1080pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1081
1082impl Sckscr {
1083    #[doc = "Clock Source Select"]
1084    #[inline(always)]
1085    pub fn cksel(
1086        self,
1087    ) -> crate::common::RegisterField<0, 0x7, 1, 0, sckscr::Cksel, Sckscr_SPEC, crate::common::RW>
1088    {
1089        crate::common::RegisterField::<0,0x7,1,0,sckscr::Cksel, Sckscr_SPEC,crate::common::RW>::from_register(self,0)
1090    }
1091}
1092impl ::core::default::Default for Sckscr {
1093    #[inline(always)]
1094    fn default() -> Sckscr {
1095        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1096    }
1097}
1098pub mod sckscr {
1099
1100    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1101    pub struct Cksel_SPEC;
1102    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1103    impl Cksel {
1104        #[doc = "HOCO"]
1105        pub const _000: Self = Self::new(0);
1106        #[doc = "MOCO"]
1107        pub const _001: Self = Self::new(1);
1108        #[doc = "LOCO"]
1109        pub const _010: Self = Self::new(2);
1110        #[doc = "Main clock oscillator (MOSC)"]
1111        pub const _011: Self = Self::new(3);
1112        #[doc = "Sub-clock oscillator (SOSC)"]
1113        pub const _100: Self = Self::new(4);
1114        #[doc = "PLL"]
1115        pub const _101: Self = Self::new(5);
1116        #[doc = "Setting prohibited"]
1117        pub const _110: Self = Self::new(6);
1118        #[doc = "Setting prohibited"]
1119        pub const _111: Self = Self::new(7);
1120    }
1121}
1122#[doc(hidden)]
1123#[derive(Copy, Clone, Eq, PartialEq)]
1124pub struct Pllccr_SPEC;
1125impl crate::sealed::RegSpec for Pllccr_SPEC {
1126    type DataType = u16;
1127}
1128#[doc = "PLL Clock Control Register"]
1129pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1130
1131impl Pllccr {
1132    #[doc = "PLL Input Frequency Division Ratio Select"]
1133    #[inline(always)]
1134    pub fn plidiv(
1135        self,
1136    ) -> crate::common::RegisterField<0, 0x3, 1, 0, pllccr::Plidiv, Pllccr_SPEC, crate::common::RW>
1137    {
1138        crate::common::RegisterField::<0,0x3,1,0,pllccr::Plidiv, Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1139    }
1140    #[doc = "PLL Clock Source Select"]
1141    #[inline(always)]
1142    pub fn plsrcsel(
1143        self,
1144    ) -> crate::common::RegisterField<4, 0x1, 1, 0, pllccr::Plsrcsel, Pllccr_SPEC, crate::common::RW>
1145    {
1146        crate::common::RegisterField::<4,0x1,1,0,pllccr::Plsrcsel, Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1147    }
1148    #[doc = "PLL Frequency Multiplication Factor Select"]
1149    #[inline(always)]
1150    pub fn pllmul(
1151        self,
1152    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, Pllccr_SPEC, crate::common::RW> {
1153        crate::common::RegisterField::<8,0x3f,1,0,u8, Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1154    }
1155}
1156impl ::core::default::Default for Pllccr {
1157    #[inline(always)]
1158    fn default() -> Pllccr {
1159        <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1160    }
1161}
1162pub mod pllccr {
1163
1164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1165    pub struct Plidiv_SPEC;
1166    pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1167    impl Plidiv {
1168        #[doc = "/1"]
1169        pub const _00: Self = Self::new(0);
1170        #[doc = "/2"]
1171        pub const _01: Self = Self::new(1);
1172        #[doc = "/3"]
1173        pub const _10: Self = Self::new(2);
1174        #[doc = "Setting prohibited."]
1175        pub const OTHERS: Self = Self::new(0);
1176    }
1177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1178    pub struct Plsrcsel_SPEC;
1179    pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1180    impl Plsrcsel {
1181        #[doc = "Main clock oscillator"]
1182        pub const _0: Self = Self::new(0);
1183        #[doc = "HOCO"]
1184        pub const _1: Self = Self::new(1);
1185    }
1186}
1187#[doc(hidden)]
1188#[derive(Copy, Clone, Eq, PartialEq)]
1189pub struct Pllcr_SPEC;
1190impl crate::sealed::RegSpec for Pllcr_SPEC {
1191    type DataType = u8;
1192}
1193#[doc = "PLL Control Register"]
1194pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1195
1196impl Pllcr {
1197    #[doc = "PLL Stop Control"]
1198    #[inline(always)]
1199    pub fn pllstp(
1200        self,
1201    ) -> crate::common::RegisterField<0, 0x1, 1, 0, pllcr::Pllstp, Pllcr_SPEC, crate::common::RW>
1202    {
1203        crate::common::RegisterField::<0,0x1,1,0,pllcr::Pllstp, Pllcr_SPEC,crate::common::RW>::from_register(self,0)
1204    }
1205}
1206impl ::core::default::Default for Pllcr {
1207    #[inline(always)]
1208    fn default() -> Pllcr {
1209        <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1210    }
1211}
1212pub mod pllcr {
1213
1214    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1215    pub struct Pllstp_SPEC;
1216    pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1217    impl Pllstp {
1218        #[doc = "PLL is operating"]
1219        pub const _0: Self = Self::new(0);
1220        #[doc = "PLL is stopped."]
1221        pub const _1: Self = Self::new(1);
1222    }
1223}
1224#[doc(hidden)]
1225#[derive(Copy, Clone, Eq, PartialEq)]
1226pub struct Mosccr_SPEC;
1227impl crate::sealed::RegSpec for Mosccr_SPEC {
1228    type DataType = u8;
1229}
1230#[doc = "Main Clock Oscillator Control Register"]
1231pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1232
1233impl Mosccr {
1234    #[doc = "Main Clock Oscillator Stop"]
1235    #[inline(always)]
1236    pub fn mostp(
1237        self,
1238    ) -> crate::common::RegisterField<0, 0x1, 1, 0, mosccr::Mostp, Mosccr_SPEC, crate::common::RW>
1239    {
1240        crate::common::RegisterField::<0,0x1,1,0,mosccr::Mostp, Mosccr_SPEC,crate::common::RW>::from_register(self,0)
1241    }
1242}
1243impl ::core::default::Default for Mosccr {
1244    #[inline(always)]
1245    fn default() -> Mosccr {
1246        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1247    }
1248}
1249pub mod mosccr {
1250
1251    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1252    pub struct Mostp_SPEC;
1253    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1254    impl Mostp {
1255        #[doc = "Operate the main clock oscillator"]
1256        pub const _0: Self = Self::new(0);
1257        #[doc = "Stop the main clock oscillator"]
1258        pub const _1: Self = Self::new(1);
1259    }
1260}
1261#[doc(hidden)]
1262#[derive(Copy, Clone, Eq, PartialEq)]
1263pub struct Hococr_SPEC;
1264impl crate::sealed::RegSpec for Hococr_SPEC {
1265    type DataType = u8;
1266}
1267#[doc = "High-Speed On-Chip Oscillator Control Register"]
1268pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1269
1270impl Hococr {
1271    #[doc = "HOCO Stop"]
1272    #[inline(always)]
1273    pub fn hcstp(
1274        self,
1275    ) -> crate::common::RegisterField<0, 0x1, 1, 0, hococr::Hcstp, Hococr_SPEC, crate::common::RW>
1276    {
1277        crate::common::RegisterField::<0,0x1,1,0,hococr::Hcstp, Hococr_SPEC,crate::common::RW>::from_register(self,0)
1278    }
1279}
1280impl ::core::default::Default for Hococr {
1281    #[inline(always)]
1282    fn default() -> Hococr {
1283        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1284    }
1285}
1286pub mod hococr {
1287
1288    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1289    pub struct Hcstp_SPEC;
1290    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1291    impl Hcstp {
1292        #[doc = "Operate the HOCO clock"]
1293        pub const _0: Self = Self::new(0);
1294        #[doc = "Stop the HOCO clock"]
1295        pub const _1: Self = Self::new(1);
1296    }
1297}
1298#[doc(hidden)]
1299#[derive(Copy, Clone, Eq, PartialEq)]
1300pub struct Hococr2_SPEC;
1301impl crate::sealed::RegSpec for Hococr2_SPEC {
1302    type DataType = u8;
1303}
1304#[doc = "High-Speed On-Chip Oscillator Control Register 2"]
1305pub type Hococr2 = crate::RegValueT<Hococr2_SPEC>;
1306
1307impl Hococr2 {
1308    #[doc = "HOCO Frequency Setting 0"]
1309    #[inline(always)]
1310    pub fn hcfrq0(
1311        self,
1312    ) -> crate::common::RegisterField<0, 0x3, 1, 0, hococr2::Hcfrq0, Hococr2_SPEC, crate::common::RW>
1313    {
1314        crate::common::RegisterField::<0,0x3,1,0,hococr2::Hcfrq0, Hococr2_SPEC,crate::common::RW>::from_register(self,0)
1315    }
1316}
1317impl ::core::default::Default for Hococr2 {
1318    #[inline(always)]
1319    fn default() -> Hococr2 {
1320        <crate::RegValueT<Hococr2_SPEC> as RegisterValue<_>>::new(0)
1321    }
1322}
1323pub mod hococr2 {
1324
1325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1326    pub struct Hcfrq0_SPEC;
1327    pub type Hcfrq0 = crate::EnumBitfieldStruct<u8, Hcfrq0_SPEC>;
1328    impl Hcfrq0 {
1329        #[doc = "16 MHz"]
1330        pub const _00: Self = Self::new(0);
1331        #[doc = "18 MHz"]
1332        pub const _01: Self = Self::new(1);
1333        #[doc = "20 MHz"]
1334        pub const _10: Self = Self::new(2);
1335        #[doc = "Setting prohibited"]
1336        pub const _11: Self = Self::new(3);
1337    }
1338}
1339#[doc(hidden)]
1340#[derive(Copy, Clone, Eq, PartialEq)]
1341pub struct Mococr_SPEC;
1342impl crate::sealed::RegSpec for Mococr_SPEC {
1343    type DataType = u8;
1344}
1345#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1346pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1347
1348impl Mococr {
1349    #[doc = "MOCO Stop"]
1350    #[inline(always)]
1351    pub fn mcstp(
1352        self,
1353    ) -> crate::common::RegisterField<0, 0x1, 1, 0, mococr::Mcstp, Mococr_SPEC, crate::common::RW>
1354    {
1355        crate::common::RegisterField::<0,0x1,1,0,mococr::Mcstp, Mococr_SPEC,crate::common::RW>::from_register(self,0)
1356    }
1357}
1358impl ::core::default::Default for Mococr {
1359    #[inline(always)]
1360    fn default() -> Mococr {
1361        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1362    }
1363}
1364pub mod mococr {
1365
1366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1367    pub struct Mcstp_SPEC;
1368    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1369    impl Mcstp {
1370        #[doc = "MOCO clock is operating"]
1371        pub const _0: Self = Self::new(0);
1372        #[doc = "MOCO clock is stopped"]
1373        pub const _1: Self = Self::new(1);
1374    }
1375}
1376#[doc(hidden)]
1377#[derive(Copy, Clone, Eq, PartialEq)]
1378pub struct Fllcr1_SPEC;
1379impl crate::sealed::RegSpec for Fllcr1_SPEC {
1380    type DataType = u8;
1381}
1382#[doc = "FLL Control Register1"]
1383pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1384
1385impl Fllcr1 {
1386    #[doc = "FLL Enable"]
1387    #[inline(always)]
1388    pub fn fllen(
1389        self,
1390    ) -> crate::common::RegisterField<0, 0x1, 1, 0, fllcr1::Fllen, Fllcr1_SPEC, crate::common::RW>
1391    {
1392        crate::common::RegisterField::<0,0x1,1,0,fllcr1::Fllen, Fllcr1_SPEC,crate::common::RW>::from_register(self,0)
1393    }
1394}
1395impl ::core::default::Default for Fllcr1 {
1396    #[inline(always)]
1397    fn default() -> Fllcr1 {
1398        <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1399    }
1400}
1401pub mod fllcr1 {
1402
1403    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1404    pub struct Fllen_SPEC;
1405    pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1406    impl Fllen {
1407        #[doc = "FLL function is disabled"]
1408        pub const _0: Self = Self::new(0);
1409        #[doc = "FLL function is enabled."]
1410        pub const _1: Self = Self::new(1);
1411    }
1412}
1413#[doc(hidden)]
1414#[derive(Copy, Clone, Eq, PartialEq)]
1415pub struct Fllcr2_SPEC;
1416impl crate::sealed::RegSpec for Fllcr2_SPEC {
1417    type DataType = u16;
1418}
1419#[doc = "FLL Control Register2"]
1420pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1421
1422impl Fllcr2 {
1423    #[doc = "FLL Multiplication Control"]
1424    #[inline(always)]
1425    pub fn fllcntl(
1426        self,
1427    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, Fllcr2_SPEC, crate::common::RW> {
1428        crate::common::RegisterField::<0,0x7ff,1,0,u16, Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1429    }
1430}
1431impl ::core::default::Default for Fllcr2 {
1432    #[inline(always)]
1433    fn default() -> Fllcr2 {
1434        <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1435    }
1436}
1437
1438#[doc(hidden)]
1439#[derive(Copy, Clone, Eq, PartialEq)]
1440pub struct Oscsf_SPEC;
1441impl crate::sealed::RegSpec for Oscsf_SPEC {
1442    type DataType = u8;
1443}
1444#[doc = "Oscillation Stabilization Flag Register"]
1445pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1446
1447impl Oscsf {
1448    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1449    #[inline(always)]
1450    pub fn hocosf(
1451        self,
1452    ) -> crate::common::RegisterField<0, 0x1, 1, 0, oscsf::Hocosf, Oscsf_SPEC, crate::common::R>
1453    {
1454        crate::common::RegisterField::<0,0x1,1,0,oscsf::Hocosf, Oscsf_SPEC,crate::common::R>::from_register(self,0)
1455    }
1456    #[doc = "Main Clock Oscillation Stabilization Flag"]
1457    #[inline(always)]
1458    pub fn moscsf(
1459        self,
1460    ) -> crate::common::RegisterField<3, 0x1, 1, 0, oscsf::Moscsf, Oscsf_SPEC, crate::common::R>
1461    {
1462        crate::common::RegisterField::<3,0x1,1,0,oscsf::Moscsf, Oscsf_SPEC,crate::common::R>::from_register(self,0)
1463    }
1464    #[doc = "PLL Clock Oscillation Stabilization Flag"]
1465    #[inline(always)]
1466    pub fn pllsf(
1467        self,
1468    ) -> crate::common::RegisterField<5, 0x1, 1, 0, oscsf::Pllsf, Oscsf_SPEC, crate::common::R>
1469    {
1470        crate::common::RegisterField::<5,0x1,1,0,oscsf::Pllsf, Oscsf_SPEC,crate::common::R>::from_register(self,0)
1471    }
1472}
1473impl ::core::default::Default for Oscsf {
1474    #[inline(always)]
1475    fn default() -> Oscsf {
1476        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
1477    }
1478}
1479pub mod oscsf {
1480
1481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1482    pub struct Hocosf_SPEC;
1483    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
1484    impl Hocosf {
1485        #[doc = "The HOCO clock is stopped or is not yet stable"]
1486        pub const _0: Self = Self::new(0);
1487        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
1488        pub const _1: Self = Self::new(1);
1489    }
1490    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1491    pub struct Moscsf_SPEC;
1492    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
1493    impl Moscsf {
1494        #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
1495        pub const _0: Self = Self::new(0);
1496        #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
1497        pub const _1: Self = Self::new(1);
1498    }
1499    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1500    pub struct Pllsf_SPEC;
1501    pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
1502    impl Pllsf {
1503        #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
1504        pub const _0: Self = Self::new(0);
1505        #[doc = "The PLL clock is stable, so is available for use as the system clock"]
1506        pub const _1: Self = Self::new(1);
1507    }
1508}
1509#[doc(hidden)]
1510#[derive(Copy, Clone, Eq, PartialEq)]
1511pub struct Ckocr_SPEC;
1512impl crate::sealed::RegSpec for Ckocr_SPEC {
1513    type DataType = u8;
1514}
1515#[doc = "Clock Out Control Register"]
1516pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
1517
1518impl Ckocr {
1519    #[doc = "Clock Out Source Select"]
1520    #[inline(always)]
1521    pub fn ckosel(
1522        self,
1523    ) -> crate::common::RegisterField<0, 0x7, 1, 0, ckocr::Ckosel, Ckocr_SPEC, crate::common::RW>
1524    {
1525        crate::common::RegisterField::<0,0x7,1,0,ckocr::Ckosel, Ckocr_SPEC,crate::common::RW>::from_register(self,0)
1526    }
1527    #[doc = "Clock Output Frequency Division Ratio"]
1528    #[inline(always)]
1529    pub fn ckodiv(
1530        self,
1531    ) -> crate::common::RegisterField<4, 0x7, 1, 0, ckocr::Ckodiv, Ckocr_SPEC, crate::common::RW>
1532    {
1533        crate::common::RegisterField::<4,0x7,1,0,ckocr::Ckodiv, Ckocr_SPEC,crate::common::RW>::from_register(self,0)
1534    }
1535    #[doc = "Clock Out Enable"]
1536    #[inline(always)]
1537    pub fn ckoen(
1538        self,
1539    ) -> crate::common::RegisterField<7, 0x1, 1, 0, ckocr::Ckoen, Ckocr_SPEC, crate::common::RW>
1540    {
1541        crate::common::RegisterField::<7,0x1,1,0,ckocr::Ckoen, Ckocr_SPEC,crate::common::RW>::from_register(self,0)
1542    }
1543}
1544impl ::core::default::Default for Ckocr {
1545    #[inline(always)]
1546    fn default() -> Ckocr {
1547        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
1548    }
1549}
1550pub mod ckocr {
1551
1552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1553    pub struct Ckosel_SPEC;
1554    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
1555    impl Ckosel {
1556        #[doc = "HOCO (value after reset)"]
1557        pub const _000: Self = Self::new(0);
1558        #[doc = "MOCO"]
1559        pub const _001: Self = Self::new(1);
1560        #[doc = "LOCO"]
1561        pub const _010: Self = Self::new(2);
1562        #[doc = "MOSC"]
1563        pub const _011: Self = Self::new(3);
1564        #[doc = "SOSC"]
1565        pub const _100: Self = Self::new(4);
1566        #[doc = "Setting prohibited"]
1567        pub const _101: Self = Self::new(5);
1568        #[doc = "Setting prohibited"]
1569        pub const OTHERS: Self = Self::new(0);
1570    }
1571    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1572    pub struct Ckodiv_SPEC;
1573    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
1574    impl Ckodiv {
1575        #[doc = "x 1/1"]
1576        pub const _000: Self = Self::new(0);
1577        #[doc = "x 1/2"]
1578        pub const _001: Self = Self::new(1);
1579        #[doc = "x 1/4"]
1580        pub const _010: Self = Self::new(2);
1581        #[doc = "x 1/8"]
1582        pub const _011: Self = Self::new(3);
1583        #[doc = "x 1/16"]
1584        pub const _100: Self = Self::new(4);
1585        #[doc = "x 1/32"]
1586        pub const _101: Self = Self::new(5);
1587        #[doc = "x 1/64"]
1588        pub const _110: Self = Self::new(6);
1589        #[doc = "x 1/128"]
1590        pub const _111: Self = Self::new(7);
1591    }
1592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1593    pub struct Ckoen_SPEC;
1594    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
1595    impl Ckoen {
1596        #[doc = "Disable clock out"]
1597        pub const _0: Self = Self::new(0);
1598        #[doc = "Enable clock out"]
1599        pub const _1: Self = Self::new(1);
1600    }
1601}
1602#[doc(hidden)]
1603#[derive(Copy, Clone, Eq, PartialEq)]
1604pub struct Ostdcr_SPEC;
1605impl crate::sealed::RegSpec for Ostdcr_SPEC {
1606    type DataType = u8;
1607}
1608#[doc = "Oscillation Stop Detection Control Register"]
1609pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
1610
1611impl Ostdcr {
1612    #[doc = "Oscillation Stop Detection Interrupt Enable"]
1613    #[inline(always)]
1614    pub fn ostdie(
1615        self,
1616    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ostdcr::Ostdie, Ostdcr_SPEC, crate::common::RW>
1617    {
1618        crate::common::RegisterField::<0,0x1,1,0,ostdcr::Ostdie, Ostdcr_SPEC,crate::common::RW>::from_register(self,0)
1619    }
1620    #[doc = "Oscillation Stop Detection Function Enable"]
1621    #[inline(always)]
1622    pub fn ostde(
1623        self,
1624    ) -> crate::common::RegisterField<7, 0x1, 1, 0, ostdcr::Ostde, Ostdcr_SPEC, crate::common::RW>
1625    {
1626        crate::common::RegisterField::<7,0x1,1,0,ostdcr::Ostde, Ostdcr_SPEC,crate::common::RW>::from_register(self,0)
1627    }
1628}
1629impl ::core::default::Default for Ostdcr {
1630    #[inline(always)]
1631    fn default() -> Ostdcr {
1632        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
1633    }
1634}
1635pub mod ostdcr {
1636
1637    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1638    pub struct Ostdie_SPEC;
1639    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
1640    impl Ostdie {
1641        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
1642        pub const _0: Self = Self::new(0);
1643        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
1644        pub const _1: Self = Self::new(1);
1645    }
1646    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1647    pub struct Ostde_SPEC;
1648    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
1649    impl Ostde {
1650        #[doc = "Disable oscillation stop detection function"]
1651        pub const _0: Self = Self::new(0);
1652        #[doc = "Enable oscillation stop detection function"]
1653        pub const _1: Self = Self::new(1);
1654    }
1655}
1656#[doc(hidden)]
1657#[derive(Copy, Clone, Eq, PartialEq)]
1658pub struct Ostdsr_SPEC;
1659impl crate::sealed::RegSpec for Ostdsr_SPEC {
1660    type DataType = u8;
1661}
1662#[doc = "Oscillation Stop Detection Status Register"]
1663pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
1664
1665impl Ostdsr {
1666    #[doc = "Oscillation Stop Detection Flag"]
1667    #[inline(always)]
1668    pub fn ostdf(
1669        self,
1670    ) -> crate::common::RegisterField<0, 0x1, 1, 0, ostdsr::Ostdf, Ostdsr_SPEC, crate::common::RW>
1671    {
1672        crate::common::RegisterField::<0,0x1,1,0,ostdsr::Ostdf, Ostdsr_SPEC,crate::common::RW>::from_register(self,0)
1673    }
1674}
1675impl ::core::default::Default for Ostdsr {
1676    #[inline(always)]
1677    fn default() -> Ostdsr {
1678        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
1679    }
1680}
1681pub mod ostdsr {
1682
1683    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1684    pub struct Ostdf_SPEC;
1685    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
1686    impl Ostdf {
1687        #[doc = "Main clock oscillation stop not detected"]
1688        pub const _0: Self = Self::new(0);
1689        #[doc = "Main clock oscillation stop detected"]
1690        pub const _1: Self = Self::new(1);
1691    }
1692}
1693#[doc(hidden)]
1694#[derive(Copy, Clone, Eq, PartialEq)]
1695pub struct Mocoutcr_SPEC;
1696impl crate::sealed::RegSpec for Mocoutcr_SPEC {
1697    type DataType = u8;
1698}
1699#[doc = "MOCO User Trimming Control Register"]
1700pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
1701
1702impl Mocoutcr {
1703    #[doc = "MOCO User Trimming"]
1704    #[inline(always)]
1705    pub fn mocoutrm(
1706        self,
1707    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Mocoutcr_SPEC, crate::common::RW> {
1708        crate::common::RegisterField::<0,0xff,1,0,u8, Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1709    }
1710}
1711impl ::core::default::Default for Mocoutcr {
1712    #[inline(always)]
1713    fn default() -> Mocoutcr {
1714        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
1715    }
1716}
1717
1718#[doc(hidden)]
1719#[derive(Copy, Clone, Eq, PartialEq)]
1720pub struct Hocoutcr_SPEC;
1721impl crate::sealed::RegSpec for Hocoutcr_SPEC {
1722    type DataType = u8;
1723}
1724#[doc = "HOCO User Trimming Control Register"]
1725pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
1726
1727impl Hocoutcr {
1728    #[doc = "HOCO User Trimming"]
1729    #[inline(always)]
1730    pub fn hocoutrm(
1731        self,
1732    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Hocoutcr_SPEC, crate::common::RW> {
1733        crate::common::RegisterField::<0,0xff,1,0,u8, Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
1734    }
1735}
1736impl ::core::default::Default for Hocoutcr {
1737    #[inline(always)]
1738    fn default() -> Hocoutcr {
1739        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
1740    }
1741}
1742
1743#[doc(hidden)]
1744#[derive(Copy, Clone, Eq, PartialEq)]
1745pub struct Usbckdivcr_SPEC;
1746impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
1747    type DataType = u8;
1748}
1749#[doc = "USB Clock Division Control Register"]
1750pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
1751
1752impl Usbckdivcr {
1753    #[doc = "USB Clock (USBCLK) Division Select"]
1754    #[inline(always)]
1755    pub fn usbckdiv(
1756        self,
1757    ) -> crate::common::RegisterField<
1758        0,
1759        0x7,
1760        1,
1761        0,
1762        usbckdivcr::Usbckdiv,
1763        Usbckdivcr_SPEC,
1764        crate::common::RW,
1765    > {
1766        crate::common::RegisterField::<
1767            0,
1768            0x7,
1769            1,
1770            0,
1771            usbckdivcr::Usbckdiv,
1772            Usbckdivcr_SPEC,
1773            crate::common::RW,
1774        >::from_register(self, 0)
1775    }
1776}
1777impl ::core::default::Default for Usbckdivcr {
1778    #[inline(always)]
1779    fn default() -> Usbckdivcr {
1780        <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
1781    }
1782}
1783pub mod usbckdivcr {
1784
1785    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1786    pub struct Usbckdiv_SPEC;
1787    pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
1788    impl Usbckdiv {
1789        #[doc = "∕ 4"]
1790        pub const _010: Self = Self::new(2);
1791        #[doc = "∕ 3"]
1792        pub const _101: Self = Self::new(5);
1793        #[doc = "∕ 5"]
1794        pub const _110: Self = Self::new(6);
1795        #[doc = "Setting prohibited."]
1796        pub const OTHERS: Self = Self::new(0);
1797    }
1798}
1799#[doc(hidden)]
1800#[derive(Copy, Clone, Eq, PartialEq)]
1801pub struct Canfdckdivcr_SPEC;
1802impl crate::sealed::RegSpec for Canfdckdivcr_SPEC {
1803    type DataType = u8;
1804}
1805#[doc = "CANFD Clock Division Control Register"]
1806pub type Canfdckdivcr = crate::RegValueT<Canfdckdivcr_SPEC>;
1807
1808impl Canfdckdivcr {
1809    #[doc = "CANFD clock (CANFDCLK) Division Select"]
1810    #[inline(always)]
1811    pub fn canfdckdiv(
1812        self,
1813    ) -> crate::common::RegisterField<
1814        0,
1815        0x7,
1816        1,
1817        0,
1818        canfdckdivcr::Canfdckdiv,
1819        Canfdckdivcr_SPEC,
1820        crate::common::RW,
1821    > {
1822        crate::common::RegisterField::<
1823            0,
1824            0x7,
1825            1,
1826            0,
1827            canfdckdivcr::Canfdckdiv,
1828            Canfdckdivcr_SPEC,
1829            crate::common::RW,
1830        >::from_register(self, 0)
1831    }
1832}
1833impl ::core::default::Default for Canfdckdivcr {
1834    #[inline(always)]
1835    fn default() -> Canfdckdivcr {
1836        <crate::RegValueT<Canfdckdivcr_SPEC> as RegisterValue<_>>::new(0)
1837    }
1838}
1839pub mod canfdckdivcr {
1840
1841    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1842    pub struct Canfdckdiv_SPEC;
1843    pub type Canfdckdiv = crate::EnumBitfieldStruct<u8, Canfdckdiv_SPEC>;
1844    impl Canfdckdiv {
1845        #[doc = "/1 (value after reset) /2 /4 /6 /8 /3 /5"]
1846        pub const _000: Self = Self::new(0);
1847    }
1848}
1849#[doc(hidden)]
1850#[derive(Copy, Clone, Eq, PartialEq)]
1851pub struct Cecckdivcr_SPEC;
1852impl crate::sealed::RegSpec for Cecckdivcr_SPEC {
1853    type DataType = u8;
1854}
1855#[doc = "CEC Clock Division Control Register"]
1856pub type Cecckdivcr = crate::RegValueT<Cecckdivcr_SPEC>;
1857
1858impl Cecckdivcr {
1859    #[doc = "CEC clock (CECCLK) Division Select"]
1860    #[inline(always)]
1861    pub fn cecckdiv(
1862        self,
1863    ) -> crate::common::RegisterField<
1864        0,
1865        0x7,
1866        1,
1867        0,
1868        cecckdivcr::Cecckdiv,
1869        Cecckdivcr_SPEC,
1870        crate::common::RW,
1871    > {
1872        crate::common::RegisterField::<
1873            0,
1874            0x7,
1875            1,
1876            0,
1877            cecckdivcr::Cecckdiv,
1878            Cecckdivcr_SPEC,
1879            crate::common::RW,
1880        >::from_register(self, 0)
1881    }
1882}
1883impl ::core::default::Default for Cecckdivcr {
1884    #[inline(always)]
1885    fn default() -> Cecckdivcr {
1886        <crate::RegValueT<Cecckdivcr_SPEC> as RegisterValue<_>>::new(1)
1887    }
1888}
1889pub mod cecckdivcr {
1890
1891    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1892    pub struct Cecckdiv_SPEC;
1893    pub type Cecckdiv = crate::EnumBitfieldStruct<u8, Cecckdiv_SPEC>;
1894    impl Cecckdiv {
1895        #[doc = "/1 (value after reset)"]
1896        pub const _000: Self = Self::new(0);
1897        #[doc = "/2"]
1898        pub const _001: Self = Self::new(1);
1899        #[doc = "Setting prohibited"]
1900        pub const OTHERS: Self = Self::new(0);
1901    }
1902}
1903#[doc(hidden)]
1904#[derive(Copy, Clone, Eq, PartialEq)]
1905pub struct I3Cckdivcr_SPEC;
1906impl crate::sealed::RegSpec for I3Cckdivcr_SPEC {
1907    type DataType = u8;
1908}
1909#[doc = "I3C Clock Division Control Register"]
1910pub type I3Cckdivcr = crate::RegValueT<I3Cckdivcr_SPEC>;
1911
1912impl I3Cckdivcr {
1913    #[doc = "I3C clock (I3CCLK) division select"]
1914    #[inline(always)]
1915    pub fn i3cckdiv(
1916        self,
1917    ) -> crate::common::RegisterField<
1918        0,
1919        0x7,
1920        1,
1921        0,
1922        i3cckdivcr::I3Cckdiv,
1923        I3Cckdivcr_SPEC,
1924        crate::common::RW,
1925    > {
1926        crate::common::RegisterField::<
1927            0,
1928            0x7,
1929            1,
1930            0,
1931            i3cckdivcr::I3Cckdiv,
1932            I3Cckdivcr_SPEC,
1933            crate::common::RW,
1934        >::from_register(self, 0)
1935    }
1936}
1937impl ::core::default::Default for I3Cckdivcr {
1938    #[inline(always)]
1939    fn default() -> I3Cckdivcr {
1940        <crate::RegValueT<I3Cckdivcr_SPEC> as RegisterValue<_>>::new(0)
1941    }
1942}
1943pub mod i3cckdivcr {
1944
1945    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1946    pub struct I3Cckdiv_SPEC;
1947    pub type I3Cckdiv = crate::EnumBitfieldStruct<u8, I3Cckdiv_SPEC>;
1948    impl I3Cckdiv {
1949        #[doc = "/1 (value after reset)"]
1950        pub const _000: Self = Self::new(0);
1951        #[doc = "/2"]
1952        pub const _001: Self = Self::new(1);
1953        #[doc = "/4"]
1954        pub const _010: Self = Self::new(2);
1955        #[doc = "/6"]
1956        pub const _011: Self = Self::new(3);
1957        #[doc = "/8"]
1958        pub const _100: Self = Self::new(4);
1959        #[doc = "Setting prohibited"]
1960        pub const OTHERS: Self = Self::new(0);
1961    }
1962}
1963#[doc(hidden)]
1964#[derive(Copy, Clone, Eq, PartialEq)]
1965pub struct Usbckcr_SPEC;
1966impl crate::sealed::RegSpec for Usbckcr_SPEC {
1967    type DataType = u8;
1968}
1969#[doc = "USB Clock Control Register"]
1970pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
1971
1972impl Usbckcr {
1973    #[doc = "USB Clock (USBCLK) Source Select"]
1974    #[inline(always)]
1975    pub fn usbcksel(
1976        self,
1977    ) -> crate::common::RegisterField<
1978        0,
1979        0x7,
1980        1,
1981        0,
1982        usbckcr::Usbcksel,
1983        Usbckcr_SPEC,
1984        crate::common::RW,
1985    > {
1986        crate::common::RegisterField::<
1987            0,
1988            0x7,
1989            1,
1990            0,
1991            usbckcr::Usbcksel,
1992            Usbckcr_SPEC,
1993            crate::common::RW,
1994        >::from_register(self, 0)
1995    }
1996    #[doc = "USB Clock (USBCLK) Switching Request"]
1997    #[inline(always)]
1998    pub fn usbcksreq(
1999        self,
2000    ) -> crate::common::RegisterField<
2001        6,
2002        0x1,
2003        1,
2004        0,
2005        usbckcr::Usbcksreq,
2006        Usbckcr_SPEC,
2007        crate::common::RW,
2008    > {
2009        crate::common::RegisterField::<
2010            6,
2011            0x1,
2012            1,
2013            0,
2014            usbckcr::Usbcksreq,
2015            Usbckcr_SPEC,
2016            crate::common::RW,
2017        >::from_register(self, 0)
2018    }
2019    #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2020    #[inline(always)]
2021    pub fn usbcksrdy(
2022        self,
2023    ) -> crate::common::RegisterField<
2024        7,
2025        0x1,
2026        1,
2027        0,
2028        usbckcr::Usbcksrdy,
2029        Usbckcr_SPEC,
2030        crate::common::R,
2031    > {
2032        crate::common::RegisterField::<
2033            7,
2034            0x1,
2035            1,
2036            0,
2037            usbckcr::Usbcksrdy,
2038            Usbckcr_SPEC,
2039            crate::common::R,
2040        >::from_register(self, 0)
2041    }
2042}
2043impl ::core::default::Default for Usbckcr {
2044    #[inline(always)]
2045    fn default() -> Usbckcr {
2046        <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2047    }
2048}
2049pub mod usbckcr {
2050
2051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2052    pub struct Usbcksel_SPEC;
2053    pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2054    impl Usbcksel {
2055        #[doc = "PLL"]
2056        pub const _101: Self = Self::new(5);
2057        #[doc = "Setting prohibited."]
2058        pub const OTHERS: Self = Self::new(0);
2059    }
2060    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2061    pub struct Usbcksreq_SPEC;
2062    pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2063    impl Usbcksreq {
2064        #[doc = "No request"]
2065        pub const _0: Self = Self::new(0);
2066        #[doc = "Request switching."]
2067        pub const _1: Self = Self::new(1);
2068    }
2069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2070    pub struct Usbcksrdy_SPEC;
2071    pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2072    impl Usbcksrdy {
2073        #[doc = "Impossible to Switch"]
2074        pub const _0: Self = Self::new(0);
2075        #[doc = "Possible to Switch"]
2076        pub const _1: Self = Self::new(1);
2077    }
2078}
2079#[doc(hidden)]
2080#[derive(Copy, Clone, Eq, PartialEq)]
2081pub struct Canfdckcr_SPEC;
2082impl crate::sealed::RegSpec for Canfdckcr_SPEC {
2083    type DataType = u8;
2084}
2085#[doc = "CANFD Clock Control Register"]
2086pub type Canfdckcr = crate::RegValueT<Canfdckcr_SPEC>;
2087
2088impl Canfdckcr {
2089    #[doc = "CANFD clock (CANFDCLK) Source Select"]
2090    #[inline(always)]
2091    pub fn canfdcksel(
2092        self,
2093    ) -> crate::common::RegisterField<
2094        0,
2095        0x7,
2096        1,
2097        0,
2098        canfdckcr::Canfdcksel,
2099        Canfdckcr_SPEC,
2100        crate::common::RW,
2101    > {
2102        crate::common::RegisterField::<
2103            0,
2104            0x7,
2105            1,
2106            0,
2107            canfdckcr::Canfdcksel,
2108            Canfdckcr_SPEC,
2109            crate::common::RW,
2110        >::from_register(self, 0)
2111    }
2112    #[doc = "CANFD clock (CANFDCLK) Switching Request"]
2113    #[inline(always)]
2114    pub fn canfdcksreq(
2115        self,
2116    ) -> crate::common::RegisterField<
2117        6,
2118        0x1,
2119        1,
2120        0,
2121        canfdckcr::Canfdcksreq,
2122        Canfdckcr_SPEC,
2123        crate::common::RW,
2124    > {
2125        crate::common::RegisterField::<
2126            6,
2127            0x1,
2128            1,
2129            0,
2130            canfdckcr::Canfdcksreq,
2131            Canfdckcr_SPEC,
2132            crate::common::RW,
2133        >::from_register(self, 0)
2134    }
2135    #[doc = "CANFD clock (CANFDCLK) Switching Ready state flag"]
2136    #[inline(always)]
2137    pub fn canfdcksrdy(
2138        self,
2139    ) -> crate::common::RegisterField<
2140        7,
2141        0x1,
2142        1,
2143        0,
2144        canfdckcr::Canfdcksrdy,
2145        Canfdckcr_SPEC,
2146        crate::common::R,
2147    > {
2148        crate::common::RegisterField::<
2149            7,
2150            0x1,
2151            1,
2152            0,
2153            canfdckcr::Canfdcksrdy,
2154            Canfdckcr_SPEC,
2155            crate::common::R,
2156        >::from_register(self, 0)
2157    }
2158}
2159impl ::core::default::Default for Canfdckcr {
2160    #[inline(always)]
2161    fn default() -> Canfdckcr {
2162        <crate::RegValueT<Canfdckcr_SPEC> as RegisterValue<_>>::new(1)
2163    }
2164}
2165pub mod canfdckcr {
2166
2167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2168    pub struct Canfdcksel_SPEC;
2169    pub type Canfdcksel = crate::EnumBitfieldStruct<u8, Canfdcksel_SPEC>;
2170    impl Canfdcksel {
2171        #[doc = "PLL"]
2172        pub const _101: Self = Self::new(5);
2173        #[doc = "Setting prohibited"]
2174        pub const OTHERS: Self = Self::new(0);
2175    }
2176    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2177    pub struct Canfdcksreq_SPEC;
2178    pub type Canfdcksreq = crate::EnumBitfieldStruct<u8, Canfdcksreq_SPEC>;
2179    impl Canfdcksreq {
2180        #[doc = "No request"]
2181        pub const _0: Self = Self::new(0);
2182        #[doc = "Request switching"]
2183        pub const _1: Self = Self::new(1);
2184    }
2185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2186    pub struct Canfdcksrdy_SPEC;
2187    pub type Canfdcksrdy = crate::EnumBitfieldStruct<u8, Canfdcksrdy_SPEC>;
2188    impl Canfdcksrdy {
2189        #[doc = "Impossible to Switch"]
2190        pub const _0: Self = Self::new(0);
2191        #[doc = "Possible to Switch"]
2192        pub const _1: Self = Self::new(1);
2193    }
2194}
2195#[doc(hidden)]
2196#[derive(Copy, Clone, Eq, PartialEq)]
2197pub struct Cecckcr_SPEC;
2198impl crate::sealed::RegSpec for Cecckcr_SPEC {
2199    type DataType = u8;
2200}
2201#[doc = "CEC Clock Control Register"]
2202pub type Cecckcr = crate::RegValueT<Cecckcr_SPEC>;
2203
2204impl Cecckcr {
2205    #[doc = "CEC clock (CECCLK) Source Select"]
2206    #[inline(always)]
2207    pub fn ceccksel(
2208        self,
2209    ) -> crate::common::RegisterField<
2210        0,
2211        0x7,
2212        1,
2213        0,
2214        cecckcr::Ceccksel,
2215        Cecckcr_SPEC,
2216        crate::common::RW,
2217    > {
2218        crate::common::RegisterField::<
2219            0,
2220            0x7,
2221            1,
2222            0,
2223            cecckcr::Ceccksel,
2224            Cecckcr_SPEC,
2225            crate::common::RW,
2226        >::from_register(self, 0)
2227    }
2228    #[doc = "CEC clock (CECCLK) Switching Request"]
2229    #[inline(always)]
2230    pub fn ceccksreq(
2231        self,
2232    ) -> crate::common::RegisterField<
2233        6,
2234        0x1,
2235        1,
2236        0,
2237        cecckcr::Ceccksreq,
2238        Cecckcr_SPEC,
2239        crate::common::RW,
2240    > {
2241        crate::common::RegisterField::<
2242            6,
2243            0x1,
2244            1,
2245            0,
2246            cecckcr::Ceccksreq,
2247            Cecckcr_SPEC,
2248            crate::common::RW,
2249        >::from_register(self, 0)
2250    }
2251    #[doc = "CEC clock (CECCLK) Switching Ready state flag"]
2252    #[inline(always)]
2253    pub fn ceccksrdy(
2254        self,
2255    ) -> crate::common::RegisterField<
2256        7,
2257        0x1,
2258        1,
2259        0,
2260        cecckcr::Ceccksrdy,
2261        Cecckcr_SPEC,
2262        crate::common::R,
2263    > {
2264        crate::common::RegisterField::<
2265            7,
2266            0x1,
2267            1,
2268            0,
2269            cecckcr::Ceccksrdy,
2270            Cecckcr_SPEC,
2271            crate::common::R,
2272        >::from_register(self, 0)
2273    }
2274}
2275impl ::core::default::Default for Cecckcr {
2276    #[inline(always)]
2277    fn default() -> Cecckcr {
2278        <crate::RegValueT<Cecckcr_SPEC> as RegisterValue<_>>::new(1)
2279    }
2280}
2281pub mod cecckcr {
2282
2283    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2284    pub struct Ceccksel_SPEC;
2285    pub type Ceccksel = crate::EnumBitfieldStruct<u8, Ceccksel_SPEC>;
2286    impl Ceccksel {
2287        #[doc = "Main clock oscillator"]
2288        pub const _011: Self = Self::new(3);
2289        #[doc = "Sub-clock oscillator"]
2290        pub const _100: Self = Self::new(4);
2291        #[doc = "Setting prohibited"]
2292        pub const OTHERS: Self = Self::new(0);
2293    }
2294    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2295    pub struct Ceccksreq_SPEC;
2296    pub type Ceccksreq = crate::EnumBitfieldStruct<u8, Ceccksreq_SPEC>;
2297    impl Ceccksreq {
2298        #[doc = "No request"]
2299        pub const _0: Self = Self::new(0);
2300        #[doc = "Request switching"]
2301        pub const _1: Self = Self::new(1);
2302    }
2303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2304    pub struct Ceccksrdy_SPEC;
2305    pub type Ceccksrdy = crate::EnumBitfieldStruct<u8, Ceccksrdy_SPEC>;
2306    impl Ceccksrdy {
2307        #[doc = "Impossible to Switch"]
2308        pub const _0: Self = Self::new(0);
2309        #[doc = "Possible to Switch"]
2310        pub const _1: Self = Self::new(1);
2311    }
2312}
2313#[doc(hidden)]
2314#[derive(Copy, Clone, Eq, PartialEq)]
2315pub struct I3Cckcr_SPEC;
2316impl crate::sealed::RegSpec for I3Cckcr_SPEC {
2317    type DataType = u8;
2318}
2319#[doc = "I3C Clock Control Register"]
2320pub type I3Cckcr = crate::RegValueT<I3Cckcr_SPEC>;
2321
2322impl I3Cckcr {
2323    #[doc = "I3C clock (I3CCLK) source select"]
2324    #[inline(always)]
2325    pub fn i3ccksel(
2326        self,
2327    ) -> crate::common::RegisterField<
2328        0,
2329        0x7,
2330        1,
2331        0,
2332        i3cckcr::I3Ccksel,
2333        I3Cckcr_SPEC,
2334        crate::common::RW,
2335    > {
2336        crate::common::RegisterField::<
2337            0,
2338            0x7,
2339            1,
2340            0,
2341            i3cckcr::I3Ccksel,
2342            I3Cckcr_SPEC,
2343            crate::common::RW,
2344        >::from_register(self, 0)
2345    }
2346    #[doc = "I3C clock (I3CCLK) switching request"]
2347    #[inline(always)]
2348    pub fn i3ccksreq(
2349        self,
2350    ) -> crate::common::RegisterField<
2351        6,
2352        0x1,
2353        1,
2354        0,
2355        i3cckcr::I3Ccksreq,
2356        I3Cckcr_SPEC,
2357        crate::common::RW,
2358    > {
2359        crate::common::RegisterField::<
2360            6,
2361            0x1,
2362            1,
2363            0,
2364            i3cckcr::I3Ccksreq,
2365            I3Cckcr_SPEC,
2366            crate::common::RW,
2367        >::from_register(self, 0)
2368    }
2369    #[doc = "I3C clock (I3CCLK) switching ready state flag"]
2370    #[inline(always)]
2371    pub fn i3ccksrdy(
2372        self,
2373    ) -> crate::common::RegisterField<
2374        7,
2375        0x1,
2376        1,
2377        0,
2378        i3cckcr::I3Ccksrdy,
2379        I3Cckcr_SPEC,
2380        crate::common::R,
2381    > {
2382        crate::common::RegisterField::<
2383            7,
2384            0x1,
2385            1,
2386            0,
2387            i3cckcr::I3Ccksrdy,
2388            I3Cckcr_SPEC,
2389            crate::common::R,
2390        >::from_register(self, 0)
2391    }
2392}
2393impl ::core::default::Default for I3Cckcr {
2394    #[inline(always)]
2395    fn default() -> I3Cckcr {
2396        <crate::RegValueT<I3Cckcr_SPEC> as RegisterValue<_>>::new(0)
2397    }
2398}
2399pub mod i3cckcr {
2400
2401    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2402    pub struct I3Ccksel_SPEC;
2403    pub type I3Ccksel = crate::EnumBitfieldStruct<u8, I3Ccksel_SPEC>;
2404    impl I3Ccksel {
2405        #[doc = "HOCO"]
2406        pub const _000: Self = Self::new(0);
2407        #[doc = "MOCO (value after reset)"]
2408        pub const _001: Self = Self::new(1);
2409        #[doc = "LOCO"]
2410        pub const _010: Self = Self::new(2);
2411        #[doc = "Main clock oscillator"]
2412        pub const _011: Self = Self::new(3);
2413        #[doc = "Sub-clock oscillator"]
2414        pub const _100: Self = Self::new(4);
2415        #[doc = "PLL"]
2416        pub const _101: Self = Self::new(5);
2417        #[doc = "Setting prohibited"]
2418        pub const OTHERS: Self = Self::new(0);
2419    }
2420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2421    pub struct I3Ccksreq_SPEC;
2422    pub type I3Ccksreq = crate::EnumBitfieldStruct<u8, I3Ccksreq_SPEC>;
2423    impl I3Ccksreq {
2424        #[doc = "No request"]
2425        pub const _0: Self = Self::new(0);
2426        #[doc = "Request switching"]
2427        pub const _1: Self = Self::new(1);
2428    }
2429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2430    pub struct I3Ccksrdy_SPEC;
2431    pub type I3Ccksrdy = crate::EnumBitfieldStruct<u8, I3Ccksrdy_SPEC>;
2432    impl I3Ccksrdy {
2433        #[doc = "Impossible to Switch"]
2434        pub const _0: Self = Self::new(0);
2435        #[doc = "Possible to Switch"]
2436        pub const _1: Self = Self::new(1);
2437    }
2438}
2439#[doc(hidden)]
2440#[derive(Copy, Clone, Eq, PartialEq)]
2441pub struct Snzcr_SPEC;
2442impl crate::sealed::RegSpec for Snzcr_SPEC {
2443    type DataType = u8;
2444}
2445#[doc = "Snooze Control Register"]
2446pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
2447
2448impl Snzcr {
2449    #[doc = "RXD0 Snooze Request Enable"]
2450    #[inline(always)]
2451    pub fn rxdreqen(
2452        self,
2453    ) -> crate::common::RegisterField<0, 0x1, 1, 0, snzcr::Rxdreqen, Snzcr_SPEC, crate::common::RW>
2454    {
2455        crate::common::RegisterField::<0,0x1,1,0,snzcr::Rxdreqen, Snzcr_SPEC,crate::common::RW>::from_register(self,0)
2456    }
2457    #[doc = "DTC Enable in Snooze mode"]
2458    #[inline(always)]
2459    pub fn snzdtcen(
2460        self,
2461    ) -> crate::common::RegisterField<1, 0x1, 1, 0, snzcr::Snzdtcen, Snzcr_SPEC, crate::common::RW>
2462    {
2463        crate::common::RegisterField::<1,0x1,1,0,snzcr::Snzdtcen, Snzcr_SPEC,crate::common::RW>::from_register(self,0)
2464    }
2465    #[doc = "Snooze mode Enable"]
2466    #[inline(always)]
2467    pub fn snze(
2468        self,
2469    ) -> crate::common::RegisterField<7, 0x1, 1, 0, snzcr::Snze, Snzcr_SPEC, crate::common::RW>
2470    {
2471        crate::common::RegisterField::<7,0x1,1,0,snzcr::Snze, Snzcr_SPEC,crate::common::RW>::from_register(self,0)
2472    }
2473}
2474impl ::core::default::Default for Snzcr {
2475    #[inline(always)]
2476    fn default() -> Snzcr {
2477        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
2478    }
2479}
2480pub mod snzcr {
2481
2482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2483    pub struct Rxdreqen_SPEC;
2484    pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
2485    impl Rxdreqen {
2486        #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
2487        pub const _0: Self = Self::new(0);
2488        #[doc = "Detect RXD0 falling edge in Software Standby mode"]
2489        pub const _1: Self = Self::new(1);
2490    }
2491    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2492    pub struct Snzdtcen_SPEC;
2493    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
2494    impl Snzdtcen {
2495        #[doc = "Disable DTC operation"]
2496        pub const _0: Self = Self::new(0);
2497        #[doc = "Enable DTC operation"]
2498        pub const _1: Self = Self::new(1);
2499    }
2500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2501    pub struct Snze_SPEC;
2502    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
2503    impl Snze {
2504        #[doc = "Disable Snooze mode"]
2505        pub const _0: Self = Self::new(0);
2506        #[doc = "Enable Snooze mode"]
2507        pub const _1: Self = Self::new(1);
2508    }
2509}
2510#[doc(hidden)]
2511#[derive(Copy, Clone, Eq, PartialEq)]
2512pub struct Snzedcr0_SPEC;
2513impl crate::sealed::RegSpec for Snzedcr0_SPEC {
2514    type DataType = u8;
2515}
2516#[doc = "Snooze End Control Register 0"]
2517pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
2518
2519impl Snzedcr0 {
2520    #[doc = "AGT1 Underflow Snooze End Enable"]
2521    #[inline(always)]
2522    pub fn agtunfed(
2523        self,
2524    ) -> crate::common::RegisterField<
2525        0,
2526        0x1,
2527        1,
2528        0,
2529        snzedcr0::Agtunfed,
2530        Snzedcr0_SPEC,
2531        crate::common::RW,
2532    > {
2533        crate::common::RegisterField::<
2534            0,
2535            0x1,
2536            1,
2537            0,
2538            snzedcr0::Agtunfed,
2539            Snzedcr0_SPEC,
2540            crate::common::RW,
2541        >::from_register(self, 0)
2542    }
2543    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
2544    #[inline(always)]
2545    pub fn dtczred(
2546        self,
2547    ) -> crate::common::RegisterField<
2548        1,
2549        0x1,
2550        1,
2551        0,
2552        snzedcr0::Dtczred,
2553        Snzedcr0_SPEC,
2554        crate::common::RW,
2555    > {
2556        crate::common::RegisterField::<
2557            1,
2558            0x1,
2559            1,
2560            0,
2561            snzedcr0::Dtczred,
2562            Snzedcr0_SPEC,
2563            crate::common::RW,
2564        >::from_register(self, 0)
2565    }
2566    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
2567    #[inline(always)]
2568    pub fn dtcnzred(
2569        self,
2570    ) -> crate::common::RegisterField<
2571        2,
2572        0x1,
2573        1,
2574        0,
2575        snzedcr0::Dtcnzred,
2576        Snzedcr0_SPEC,
2577        crate::common::RW,
2578    > {
2579        crate::common::RegisterField::<
2580            2,
2581            0x1,
2582            1,
2583            0,
2584            snzedcr0::Dtcnzred,
2585            Snzedcr0_SPEC,
2586            crate::common::RW,
2587        >::from_register(self, 0)
2588    }
2589    #[doc = "ADC120 Compare Match Snooze End Enable"]
2590    #[inline(always)]
2591    pub fn ad0mated(
2592        self,
2593    ) -> crate::common::RegisterField<
2594        3,
2595        0x1,
2596        1,
2597        0,
2598        snzedcr0::Ad0Mated,
2599        Snzedcr0_SPEC,
2600        crate::common::RW,
2601    > {
2602        crate::common::RegisterField::<
2603            3,
2604            0x1,
2605            1,
2606            0,
2607            snzedcr0::Ad0Mated,
2608            Snzedcr0_SPEC,
2609            crate::common::RW,
2610        >::from_register(self, 0)
2611    }
2612    #[doc = "ADC120 Compare Mismatch Snooze End Enable"]
2613    #[inline(always)]
2614    pub fn ad0umted(
2615        self,
2616    ) -> crate::common::RegisterField<
2617        4,
2618        0x1,
2619        1,
2620        0,
2621        snzedcr0::Ad0Umted,
2622        Snzedcr0_SPEC,
2623        crate::common::RW,
2624    > {
2625        crate::common::RegisterField::<
2626            4,
2627            0x1,
2628            1,
2629            0,
2630            snzedcr0::Ad0Umted,
2631            Snzedcr0_SPEC,
2632            crate::common::RW,
2633        >::from_register(self, 0)
2634    }
2635    #[doc = "SCI0 Address Mismatch Snooze End Enable"]
2636    #[inline(always)]
2637    pub fn sci0umted(
2638        self,
2639    ) -> crate::common::RegisterField<
2640        7,
2641        0x1,
2642        1,
2643        0,
2644        snzedcr0::Sci0Umted,
2645        Snzedcr0_SPEC,
2646        crate::common::RW,
2647    > {
2648        crate::common::RegisterField::<
2649            7,
2650            0x1,
2651            1,
2652            0,
2653            snzedcr0::Sci0Umted,
2654            Snzedcr0_SPEC,
2655            crate::common::RW,
2656        >::from_register(self, 0)
2657    }
2658}
2659impl ::core::default::Default for Snzedcr0 {
2660    #[inline(always)]
2661    fn default() -> Snzedcr0 {
2662        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
2663    }
2664}
2665pub mod snzedcr0 {
2666
2667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2668    pub struct Agtunfed_SPEC;
2669    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
2670    impl Agtunfed {
2671        #[doc = "Disable the snooze end request"]
2672        pub const _0: Self = Self::new(0);
2673        #[doc = "Enable the snooze end request"]
2674        pub const _1: Self = Self::new(1);
2675    }
2676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2677    pub struct Dtczred_SPEC;
2678    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
2679    impl Dtczred {
2680        #[doc = "Disable the snooze end request"]
2681        pub const _0: Self = Self::new(0);
2682        #[doc = "Enable the snooze end request"]
2683        pub const _1: Self = Self::new(1);
2684    }
2685    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2686    pub struct Dtcnzred_SPEC;
2687    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
2688    impl Dtcnzred {
2689        #[doc = "Disable the snooze end request"]
2690        pub const _0: Self = Self::new(0);
2691        #[doc = "Enable the snooze end request"]
2692        pub const _1: Self = Self::new(1);
2693    }
2694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2695    pub struct Ad0Mated_SPEC;
2696    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
2697    impl Ad0Mated {
2698        #[doc = "Disable the snooze end request"]
2699        pub const _0: Self = Self::new(0);
2700        #[doc = "Enable the snooze end request"]
2701        pub const _1: Self = Self::new(1);
2702    }
2703    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2704    pub struct Ad0Umted_SPEC;
2705    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
2706    impl Ad0Umted {
2707        #[doc = "Disable the snooze end request"]
2708        pub const _0: Self = Self::new(0);
2709        #[doc = "Enable the snooze end request"]
2710        pub const _1: Self = Self::new(1);
2711    }
2712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2713    pub struct Sci0Umted_SPEC;
2714    pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
2715    impl Sci0Umted {
2716        #[doc = "Disable the snooze end request"]
2717        pub const _0: Self = Self::new(0);
2718        #[doc = "Enable the snooze end request"]
2719        pub const _1: Self = Self::new(1);
2720    }
2721}
2722#[doc(hidden)]
2723#[derive(Copy, Clone, Eq, PartialEq)]
2724pub struct Snzreqcr0_SPEC;
2725impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
2726    type DataType = u32;
2727}
2728#[doc = "Snooze Request Control Register 0"]
2729pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
2730
2731impl Snzreqcr0 {
2732    #[doc = "Enable IRQ0 pin snooze request"]
2733    #[inline(always)]
2734    pub fn snzreqen0(
2735        self,
2736    ) -> crate::common::RegisterField<
2737        0,
2738        0x1,
2739        1,
2740        0,
2741        snzreqcr0::Snzreqen0,
2742        Snzreqcr0_SPEC,
2743        crate::common::RW,
2744    > {
2745        crate::common::RegisterField::<
2746            0,
2747            0x1,
2748            1,
2749            0,
2750            snzreqcr0::Snzreqen0,
2751            Snzreqcr0_SPEC,
2752            crate::common::RW,
2753        >::from_register(self, 0)
2754    }
2755    #[doc = "Enable IRQ1 pin snooze request"]
2756    #[inline(always)]
2757    pub fn snzreqen1(
2758        self,
2759    ) -> crate::common::RegisterField<
2760        1,
2761        0x1,
2762        1,
2763        0,
2764        snzreqcr0::Snzreqen1,
2765        Snzreqcr0_SPEC,
2766        crate::common::RW,
2767    > {
2768        crate::common::RegisterField::<
2769            1,
2770            0x1,
2771            1,
2772            0,
2773            snzreqcr0::Snzreqen1,
2774            Snzreqcr0_SPEC,
2775            crate::common::RW,
2776        >::from_register(self, 0)
2777    }
2778    #[doc = "Enable IRQ2 pin snooze request"]
2779    #[inline(always)]
2780    pub fn snzreqen2(
2781        self,
2782    ) -> crate::common::RegisterField<
2783        2,
2784        0x1,
2785        1,
2786        0,
2787        snzreqcr0::Snzreqen2,
2788        Snzreqcr0_SPEC,
2789        crate::common::RW,
2790    > {
2791        crate::common::RegisterField::<
2792            2,
2793            0x1,
2794            1,
2795            0,
2796            snzreqcr0::Snzreqen2,
2797            Snzreqcr0_SPEC,
2798            crate::common::RW,
2799        >::from_register(self, 0)
2800    }
2801    #[doc = "Enable IRQ3 pin snooze request"]
2802    #[inline(always)]
2803    pub fn snzreqen3(
2804        self,
2805    ) -> crate::common::RegisterField<
2806        3,
2807        0x1,
2808        1,
2809        0,
2810        snzreqcr0::Snzreqen3,
2811        Snzreqcr0_SPEC,
2812        crate::common::RW,
2813    > {
2814        crate::common::RegisterField::<
2815            3,
2816            0x1,
2817            1,
2818            0,
2819            snzreqcr0::Snzreqen3,
2820            Snzreqcr0_SPEC,
2821            crate::common::RW,
2822        >::from_register(self, 0)
2823    }
2824    #[doc = "Enable IRQ4 pin snooze request"]
2825    #[inline(always)]
2826    pub fn snzreqen4(
2827        self,
2828    ) -> crate::common::RegisterField<
2829        4,
2830        0x1,
2831        1,
2832        0,
2833        snzreqcr0::Snzreqen4,
2834        Snzreqcr0_SPEC,
2835        crate::common::RW,
2836    > {
2837        crate::common::RegisterField::<
2838            4,
2839            0x1,
2840            1,
2841            0,
2842            snzreqcr0::Snzreqen4,
2843            Snzreqcr0_SPEC,
2844            crate::common::RW,
2845        >::from_register(self, 0)
2846    }
2847    #[doc = "Enable IRQ5 pin snooze request"]
2848    #[inline(always)]
2849    pub fn snzreqen5(
2850        self,
2851    ) -> crate::common::RegisterField<
2852        5,
2853        0x1,
2854        1,
2855        0,
2856        snzreqcr0::Snzreqen5,
2857        Snzreqcr0_SPEC,
2858        crate::common::RW,
2859    > {
2860        crate::common::RegisterField::<
2861            5,
2862            0x1,
2863            1,
2864            0,
2865            snzreqcr0::Snzreqen5,
2866            Snzreqcr0_SPEC,
2867            crate::common::RW,
2868        >::from_register(self, 0)
2869    }
2870    #[doc = "Enable IRQ6 pin snooze request"]
2871    #[inline(always)]
2872    pub fn snzreqen6(
2873        self,
2874    ) -> crate::common::RegisterField<
2875        6,
2876        0x1,
2877        1,
2878        0,
2879        snzreqcr0::Snzreqen6,
2880        Snzreqcr0_SPEC,
2881        crate::common::RW,
2882    > {
2883        crate::common::RegisterField::<
2884            6,
2885            0x1,
2886            1,
2887            0,
2888            snzreqcr0::Snzreqen6,
2889            Snzreqcr0_SPEC,
2890            crate::common::RW,
2891        >::from_register(self, 0)
2892    }
2893    #[doc = "Enable IRQ7 pin snooze request"]
2894    #[inline(always)]
2895    pub fn snzreqen7(
2896        self,
2897    ) -> crate::common::RegisterField<
2898        7,
2899        0x1,
2900        1,
2901        0,
2902        snzreqcr0::Snzreqen7,
2903        Snzreqcr0_SPEC,
2904        crate::common::RW,
2905    > {
2906        crate::common::RegisterField::<
2907            7,
2908            0x1,
2909            1,
2910            0,
2911            snzreqcr0::Snzreqen7,
2912            Snzreqcr0_SPEC,
2913            crate::common::RW,
2914        >::from_register(self, 0)
2915    }
2916    #[doc = "Enable IRQ8 pin snooze request"]
2917    #[inline(always)]
2918    pub fn snzreqen8(
2919        self,
2920    ) -> crate::common::RegisterField<
2921        8,
2922        0x1,
2923        1,
2924        0,
2925        snzreqcr0::Snzreqen8,
2926        Snzreqcr0_SPEC,
2927        crate::common::RW,
2928    > {
2929        crate::common::RegisterField::<
2930            8,
2931            0x1,
2932            1,
2933            0,
2934            snzreqcr0::Snzreqen8,
2935            Snzreqcr0_SPEC,
2936            crate::common::RW,
2937        >::from_register(self, 0)
2938    }
2939    #[doc = "Enable IRQ9 pin snooze request"]
2940    #[inline(always)]
2941    pub fn snzreqen9(
2942        self,
2943    ) -> crate::common::RegisterField<
2944        9,
2945        0x1,
2946        1,
2947        0,
2948        snzreqcr0::Snzreqen9,
2949        Snzreqcr0_SPEC,
2950        crate::common::RW,
2951    > {
2952        crate::common::RegisterField::<
2953            9,
2954            0x1,
2955            1,
2956            0,
2957            snzreqcr0::Snzreqen9,
2958            Snzreqcr0_SPEC,
2959            crate::common::RW,
2960        >::from_register(self, 0)
2961    }
2962    #[doc = "Enable IRQ10 pin snooze request"]
2963    #[inline(always)]
2964    pub fn snzreqen10(
2965        self,
2966    ) -> crate::common::RegisterField<
2967        10,
2968        0x1,
2969        1,
2970        0,
2971        snzreqcr0::Snzreqen10,
2972        Snzreqcr0_SPEC,
2973        crate::common::RW,
2974    > {
2975        crate::common::RegisterField::<
2976            10,
2977            0x1,
2978            1,
2979            0,
2980            snzreqcr0::Snzreqen10,
2981            Snzreqcr0_SPEC,
2982            crate::common::RW,
2983        >::from_register(self, 0)
2984    }
2985    #[doc = "Enable IRQ11 pin snooze request"]
2986    #[inline(always)]
2987    pub fn snzreqen11(
2988        self,
2989    ) -> crate::common::RegisterField<
2990        11,
2991        0x1,
2992        1,
2993        0,
2994        snzreqcr0::Snzreqen11,
2995        Snzreqcr0_SPEC,
2996        crate::common::RW,
2997    > {
2998        crate::common::RegisterField::<
2999            11,
3000            0x1,
3001            1,
3002            0,
3003            snzreqcr0::Snzreqen11,
3004            Snzreqcr0_SPEC,
3005            crate::common::RW,
3006        >::from_register(self, 0)
3007    }
3008    #[doc = "Enable IRQ12 pin snooze request"]
3009    #[inline(always)]
3010    pub fn snzreqen12(
3011        self,
3012    ) -> crate::common::RegisterField<
3013        12,
3014        0x1,
3015        1,
3016        0,
3017        snzreqcr0::Snzreqen12,
3018        Snzreqcr0_SPEC,
3019        crate::common::RW,
3020    > {
3021        crate::common::RegisterField::<
3022            12,
3023            0x1,
3024            1,
3025            0,
3026            snzreqcr0::Snzreqen12,
3027            Snzreqcr0_SPEC,
3028            crate::common::RW,
3029        >::from_register(self, 0)
3030    }
3031    #[doc = "Enable IRQ13 pin snooze request"]
3032    #[inline(always)]
3033    pub fn snzreqen13(
3034        self,
3035    ) -> crate::common::RegisterField<
3036        13,
3037        0x1,
3038        1,
3039        0,
3040        snzreqcr0::Snzreqen13,
3041        Snzreqcr0_SPEC,
3042        crate::common::RW,
3043    > {
3044        crate::common::RegisterField::<
3045            13,
3046            0x1,
3047            1,
3048            0,
3049            snzreqcr0::Snzreqen13,
3050            Snzreqcr0_SPEC,
3051            crate::common::RW,
3052        >::from_register(self, 0)
3053    }
3054    #[doc = "Enable IRQ14 pin snooze request"]
3055    #[inline(always)]
3056    pub fn snzreqen14(
3057        self,
3058    ) -> crate::common::RegisterField<
3059        14,
3060        0x1,
3061        1,
3062        0,
3063        snzreqcr0::Snzreqen14,
3064        Snzreqcr0_SPEC,
3065        crate::common::RW,
3066    > {
3067        crate::common::RegisterField::<
3068            14,
3069            0x1,
3070            1,
3071            0,
3072            snzreqcr0::Snzreqen14,
3073            Snzreqcr0_SPEC,
3074            crate::common::RW,
3075        >::from_register(self, 0)
3076    }
3077    #[doc = "Enable RTC alarm snooze request"]
3078    #[inline(always)]
3079    pub fn snzreqen24(
3080        self,
3081    ) -> crate::common::RegisterField<
3082        24,
3083        0x1,
3084        1,
3085        0,
3086        snzreqcr0::Snzreqen24,
3087        Snzreqcr0_SPEC,
3088        crate::common::RW,
3089    > {
3090        crate::common::RegisterField::<
3091            24,
3092            0x1,
3093            1,
3094            0,
3095            snzreqcr0::Snzreqen24,
3096            Snzreqcr0_SPEC,
3097            crate::common::RW,
3098        >::from_register(self, 0)
3099    }
3100    #[doc = "Enable RTC period snooze request"]
3101    #[inline(always)]
3102    pub fn snzreqen25(
3103        self,
3104    ) -> crate::common::RegisterField<
3105        25,
3106        0x1,
3107        1,
3108        0,
3109        snzreqcr0::Snzreqen25,
3110        Snzreqcr0_SPEC,
3111        crate::common::RW,
3112    > {
3113        crate::common::RegisterField::<
3114            25,
3115            0x1,
3116            1,
3117            0,
3118            snzreqcr0::Snzreqen25,
3119            Snzreqcr0_SPEC,
3120            crate::common::RW,
3121        >::from_register(self, 0)
3122    }
3123    #[doc = "Enable AGT1 underflow snooze request"]
3124    #[inline(always)]
3125    pub fn snzreqen28(
3126        self,
3127    ) -> crate::common::RegisterField<
3128        28,
3129        0x1,
3130        1,
3131        0,
3132        snzreqcr0::Snzreqen28,
3133        Snzreqcr0_SPEC,
3134        crate::common::RW,
3135    > {
3136        crate::common::RegisterField::<
3137            28,
3138            0x1,
3139            1,
3140            0,
3141            snzreqcr0::Snzreqen28,
3142            Snzreqcr0_SPEC,
3143            crate::common::RW,
3144        >::from_register(self, 0)
3145    }
3146    #[doc = "Enable AGT1 compare match A snooze request"]
3147    #[inline(always)]
3148    pub fn snzreqen29(
3149        self,
3150    ) -> crate::common::RegisterField<
3151        29,
3152        0x1,
3153        1,
3154        0,
3155        snzreqcr0::Snzreqen29,
3156        Snzreqcr0_SPEC,
3157        crate::common::RW,
3158    > {
3159        crate::common::RegisterField::<
3160            29,
3161            0x1,
3162            1,
3163            0,
3164            snzreqcr0::Snzreqen29,
3165            Snzreqcr0_SPEC,
3166            crate::common::RW,
3167        >::from_register(self, 0)
3168    }
3169    #[doc = "Enable AGT1 compare match B snooze request"]
3170    #[inline(always)]
3171    pub fn snzreqen30(
3172        self,
3173    ) -> crate::common::RegisterField<
3174        30,
3175        0x1,
3176        1,
3177        0,
3178        snzreqcr0::Snzreqen30,
3179        Snzreqcr0_SPEC,
3180        crate::common::RW,
3181    > {
3182        crate::common::RegisterField::<
3183            30,
3184            0x1,
3185            1,
3186            0,
3187            snzreqcr0::Snzreqen30,
3188            Snzreqcr0_SPEC,
3189            crate::common::RW,
3190        >::from_register(self, 0)
3191    }
3192}
3193impl ::core::default::Default for Snzreqcr0 {
3194    #[inline(always)]
3195    fn default() -> Snzreqcr0 {
3196        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3197    }
3198}
3199pub mod snzreqcr0 {
3200
3201    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3202    pub struct Snzreqen0_SPEC;
3203    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3204    impl Snzreqen0 {
3205        #[doc = "Disable the snooze request"]
3206        pub const _0: Self = Self::new(0);
3207        #[doc = "Enable the snooze request"]
3208        pub const _1: Self = Self::new(1);
3209    }
3210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3211    pub struct Snzreqen1_SPEC;
3212    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3213    impl Snzreqen1 {
3214        #[doc = "Disable the snooze request"]
3215        pub const _0: Self = Self::new(0);
3216        #[doc = "Enable the snooze request"]
3217        pub const _1: Self = Self::new(1);
3218    }
3219    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3220    pub struct Snzreqen2_SPEC;
3221    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3222    impl Snzreqen2 {
3223        #[doc = "Disable the snooze request"]
3224        pub const _0: Self = Self::new(0);
3225        #[doc = "Enable the snooze request"]
3226        pub const _1: Self = Self::new(1);
3227    }
3228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3229    pub struct Snzreqen3_SPEC;
3230    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3231    impl Snzreqen3 {
3232        #[doc = "Disable the snooze request"]
3233        pub const _0: Self = Self::new(0);
3234        #[doc = "Enable the snooze request"]
3235        pub const _1: Self = Self::new(1);
3236    }
3237    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3238    pub struct Snzreqen4_SPEC;
3239    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3240    impl Snzreqen4 {
3241        #[doc = "Disable the snooze request"]
3242        pub const _0: Self = Self::new(0);
3243        #[doc = "Enable the snooze request"]
3244        pub const _1: Self = Self::new(1);
3245    }
3246    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3247    pub struct Snzreqen5_SPEC;
3248    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
3249    impl Snzreqen5 {
3250        #[doc = "Disable the snooze request"]
3251        pub const _0: Self = Self::new(0);
3252        #[doc = "Enable the snooze request"]
3253        pub const _1: Self = Self::new(1);
3254    }
3255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3256    pub struct Snzreqen6_SPEC;
3257    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
3258    impl Snzreqen6 {
3259        #[doc = "Disable the snooze request"]
3260        pub const _0: Self = Self::new(0);
3261        #[doc = "Enable the snooze request"]
3262        pub const _1: Self = Self::new(1);
3263    }
3264    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3265    pub struct Snzreqen7_SPEC;
3266    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
3267    impl Snzreqen7 {
3268        #[doc = "Disable the snooze request"]
3269        pub const _0: Self = Self::new(0);
3270        #[doc = "Enable the snooze request"]
3271        pub const _1: Self = Self::new(1);
3272    }
3273    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3274    pub struct Snzreqen8_SPEC;
3275    pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
3276    impl Snzreqen8 {
3277        #[doc = "Disable the snooze request"]
3278        pub const _0: Self = Self::new(0);
3279        #[doc = "Enable the snooze request"]
3280        pub const _1: Self = Self::new(1);
3281    }
3282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3283    pub struct Snzreqen9_SPEC;
3284    pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
3285    impl Snzreqen9 {
3286        #[doc = "Disable the snooze request"]
3287        pub const _0: Self = Self::new(0);
3288        #[doc = "Enable the snooze request"]
3289        pub const _1: Self = Self::new(1);
3290    }
3291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3292    pub struct Snzreqen10_SPEC;
3293    pub type Snzreqen10 = crate::EnumBitfieldStruct<u8, Snzreqen10_SPEC>;
3294    impl Snzreqen10 {
3295        #[doc = "Disable the snooze request"]
3296        pub const _0: Self = Self::new(0);
3297        #[doc = "Enable the snooze request"]
3298        pub const _1: Self = Self::new(1);
3299    }
3300    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3301    pub struct Snzreqen11_SPEC;
3302    pub type Snzreqen11 = crate::EnumBitfieldStruct<u8, Snzreqen11_SPEC>;
3303    impl Snzreqen11 {
3304        #[doc = "Disable the snooze request"]
3305        pub const _0: Self = Self::new(0);
3306        #[doc = "Enable the snooze request"]
3307        pub const _1: Self = Self::new(1);
3308    }
3309    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3310    pub struct Snzreqen12_SPEC;
3311    pub type Snzreqen12 = crate::EnumBitfieldStruct<u8, Snzreqen12_SPEC>;
3312    impl Snzreqen12 {
3313        #[doc = "Disable the snooze request"]
3314        pub const _0: Self = Self::new(0);
3315        #[doc = "Enable the snooze request"]
3316        pub const _1: Self = Self::new(1);
3317    }
3318    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3319    pub struct Snzreqen13_SPEC;
3320    pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
3321    impl Snzreqen13 {
3322        #[doc = "Disable the snooze request"]
3323        pub const _0: Self = Self::new(0);
3324        #[doc = "Enable the snooze request"]
3325        pub const _1: Self = Self::new(1);
3326    }
3327    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3328    pub struct Snzreqen14_SPEC;
3329    pub type Snzreqen14 = crate::EnumBitfieldStruct<u8, Snzreqen14_SPEC>;
3330    impl Snzreqen14 {
3331        #[doc = "Disable the snooze request"]
3332        pub const _0: Self = Self::new(0);
3333        #[doc = "Enable the snooze request"]
3334        pub const _1: Self = Self::new(1);
3335    }
3336    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3337    pub struct Snzreqen24_SPEC;
3338    pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
3339    impl Snzreqen24 {
3340        #[doc = "Disable the snooze request"]
3341        pub const _0: Self = Self::new(0);
3342        #[doc = "Enable the snooze request"]
3343        pub const _1: Self = Self::new(1);
3344    }
3345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3346    pub struct Snzreqen25_SPEC;
3347    pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
3348    impl Snzreqen25 {
3349        #[doc = "Disable the snooze request"]
3350        pub const _0: Self = Self::new(0);
3351        #[doc = "Enable the snooze request"]
3352        pub const _1: Self = Self::new(1);
3353    }
3354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3355    pub struct Snzreqen28_SPEC;
3356    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
3357    impl Snzreqen28 {
3358        #[doc = "Disable the snooze request"]
3359        pub const _0: Self = Self::new(0);
3360        #[doc = "Enable the snooze request"]
3361        pub const _1: Self = Self::new(1);
3362    }
3363    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3364    pub struct Snzreqen29_SPEC;
3365    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
3366    impl Snzreqen29 {
3367        #[doc = "Disable the snooze request"]
3368        pub const _0: Self = Self::new(0);
3369        #[doc = "Enable the snooze request"]
3370        pub const _1: Self = Self::new(1);
3371    }
3372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3373    pub struct Snzreqen30_SPEC;
3374    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
3375    impl Snzreqen30 {
3376        #[doc = "Disable the snooze request"]
3377        pub const _0: Self = Self::new(0);
3378        #[doc = "Enable the snooze request"]
3379        pub const _1: Self = Self::new(1);
3380    }
3381}
3382#[doc(hidden)]
3383#[derive(Copy, Clone, Eq, PartialEq)]
3384pub struct Opccr_SPEC;
3385impl crate::sealed::RegSpec for Opccr_SPEC {
3386    type DataType = u8;
3387}
3388#[doc = "Operating Power Control Register"]
3389pub type Opccr = crate::RegValueT<Opccr_SPEC>;
3390
3391impl Opccr {
3392    #[doc = "Operating Power Control Mode Select"]
3393    #[inline(always)]
3394    pub fn opcm(
3395        self,
3396    ) -> crate::common::RegisterField<0, 0x3, 1, 0, opccr::Opcm, Opccr_SPEC, crate::common::RW>
3397    {
3398        crate::common::RegisterField::<0,0x3,1,0,opccr::Opcm, Opccr_SPEC,crate::common::RW>::from_register(self,0)
3399    }
3400    #[doc = "Operating Power Control Mode Transition Status Flag"]
3401    #[inline(always)]
3402    pub fn opcmtsf(
3403        self,
3404    ) -> crate::common::RegisterField<4, 0x1, 1, 0, opccr::Opcmtsf, Opccr_SPEC, crate::common::R>
3405    {
3406        crate::common::RegisterField::<4,0x1,1,0,opccr::Opcmtsf, Opccr_SPEC,crate::common::R>::from_register(self,0)
3407    }
3408}
3409impl ::core::default::Default for Opccr {
3410    #[inline(always)]
3411    fn default() -> Opccr {
3412        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
3413    }
3414}
3415pub mod opccr {
3416
3417    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3418    pub struct Opcm_SPEC;
3419    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
3420    impl Opcm {
3421        #[doc = "High-speed mode"]
3422        pub const _00: Self = Self::new(0);
3423        #[doc = "Setting prohibited"]
3424        pub const _01: Self = Self::new(1);
3425        #[doc = "Setting prohibited"]
3426        pub const _10: Self = Self::new(2);
3427        #[doc = "Low-speed mode"]
3428        pub const _11: Self = Self::new(3);
3429    }
3430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3431    pub struct Opcmtsf_SPEC;
3432    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
3433    impl Opcmtsf {
3434        #[doc = "Transition completed"]
3435        pub const _0: Self = Self::new(0);
3436        #[doc = "During transition"]
3437        pub const _1: Self = Self::new(1);
3438    }
3439}
3440#[doc(hidden)]
3441#[derive(Copy, Clone, Eq, PartialEq)]
3442pub struct Moscwtcr_SPEC;
3443impl crate::sealed::RegSpec for Moscwtcr_SPEC {
3444    type DataType = u8;
3445}
3446#[doc = "Main Clock Oscillator Wait Control Register"]
3447pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
3448
3449impl Moscwtcr {
3450    #[doc = "Main Clock Oscillator Wait Time Setting"]
3451    #[inline(always)]
3452    pub fn msts(
3453        self,
3454    ) -> crate::common::RegisterField<0, 0xf, 1, 0, moscwtcr::Msts, Moscwtcr_SPEC, crate::common::RW>
3455    {
3456        crate::common::RegisterField::<0,0xf,1,0,moscwtcr::Msts, Moscwtcr_SPEC,crate::common::RW>::from_register(self,0)
3457    }
3458}
3459impl ::core::default::Default for Moscwtcr {
3460    #[inline(always)]
3461    fn default() -> Moscwtcr {
3462        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
3463    }
3464}
3465pub mod moscwtcr {
3466
3467    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3468    pub struct Msts_SPEC;
3469    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
3470    impl Msts {
3471        #[doc = "Wait time = 3 cycles (11.4 us)"]
3472        pub const _0_X_0: Self = Self::new(0);
3473        #[doc = "Wait time = 35 cycles (133.5 us)"]
3474        pub const _0_X_1: Self = Self::new(1);
3475        #[doc = "Wait time = 67 cycles (255.6 us)"]
3476        pub const _0_X_2: Self = Self::new(2);
3477        #[doc = "Wait time = 131 cycles (499.7 us)"]
3478        pub const _0_X_3: Self = Self::new(3);
3479        #[doc = "Wait time = 259 cycles (988.0 us)"]
3480        pub const _0_X_4: Self = Self::new(4);
3481        #[doc = "Wait time = 547 cycles (2086.6 us)"]
3482        pub const _0_X_5: Self = Self::new(5);
3483        #[doc = "Wait time = 1059 cycles (4039.8 us)"]
3484        pub const _0_X_6: Self = Self::new(6);
3485        #[doc = "Wait time = 2147 cycles (8190.2 us)"]
3486        pub const _0_X_7: Self = Self::new(7);
3487        #[doc = "Wait time = 4291 cycles (16368.9 us)"]
3488        pub const _0_X_8: Self = Self::new(8);
3489        #[doc = "Wait time = 8163 cycles (31139.4 us)"]
3490        pub const _0_X_9: Self = Self::new(9);
3491        #[doc = "Setting prohibited"]
3492        pub const OTHERS: Self = Self::new(0);
3493    }
3494}
3495#[doc(hidden)]
3496#[derive(Copy, Clone, Eq, PartialEq)]
3497pub struct Sopccr_SPEC;
3498impl crate::sealed::RegSpec for Sopccr_SPEC {
3499    type DataType = u8;
3500}
3501#[doc = "Sub Operating Power Control Register"]
3502pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
3503
3504impl Sopccr {
3505    #[doc = "Sub Operating Power Control Mode Select"]
3506    #[inline(always)]
3507    pub fn sopcm(
3508        self,
3509    ) -> crate::common::RegisterField<0, 0x1, 1, 0, sopccr::Sopcm, Sopccr_SPEC, crate::common::RW>
3510    {
3511        crate::common::RegisterField::<0,0x1,1,0,sopccr::Sopcm, Sopccr_SPEC,crate::common::RW>::from_register(self,0)
3512    }
3513    #[doc = "Operating Power Control Mode Transition Status Flag"]
3514    #[inline(always)]
3515    pub fn sopcmtsf(
3516        self,
3517    ) -> crate::common::RegisterField<4, 0x1, 1, 0, sopccr::Sopcmtsf, Sopccr_SPEC, crate::common::R>
3518    {
3519        crate::common::RegisterField::<4,0x1,1,0,sopccr::Sopcmtsf, Sopccr_SPEC,crate::common::R>::from_register(self,0)
3520    }
3521}
3522impl ::core::default::Default for Sopccr {
3523    #[inline(always)]
3524    fn default() -> Sopccr {
3525        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
3526    }
3527}
3528pub mod sopccr {
3529
3530    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3531    pub struct Sopcm_SPEC;
3532    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
3533    impl Sopcm {
3534        #[doc = "Other than Subosc-speed mode"]
3535        pub const _0: Self = Self::new(0);
3536        #[doc = "Subosc-speed mode"]
3537        pub const _1: Self = Self::new(1);
3538    }
3539    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3540    pub struct Sopcmtsf_SPEC;
3541    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
3542    impl Sopcmtsf {
3543        #[doc = "Transition completed"]
3544        pub const _0: Self = Self::new(0);
3545        #[doc = "During transition"]
3546        pub const _1: Self = Self::new(1);
3547    }
3548}
3549#[doc(hidden)]
3550#[derive(Copy, Clone, Eq, PartialEq)]
3551pub struct Rstsr1_SPEC;
3552impl crate::sealed::RegSpec for Rstsr1_SPEC {
3553    type DataType = u16;
3554}
3555#[doc = "Reset Status Register 1"]
3556pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
3557
3558impl Rstsr1 {
3559    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
3560    #[inline(always)]
3561    pub fn iwdtrf(
3562        self,
3563    ) -> crate::common::RegisterField<0, 0x1, 1, 0, rstsr1::Iwdtrf, Rstsr1_SPEC, crate::common::RW>
3564    {
3565        crate::common::RegisterField::<0,0x1,1,0,rstsr1::Iwdtrf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3566    }
3567    #[doc = "Watchdog Timer Reset Detect Flag"]
3568    #[inline(always)]
3569    pub fn wdtrf(
3570        self,
3571    ) -> crate::common::RegisterField<1, 0x1, 1, 0, rstsr1::Wdtrf, Rstsr1_SPEC, crate::common::RW>
3572    {
3573        crate::common::RegisterField::<1,0x1,1,0,rstsr1::Wdtrf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3574    }
3575    #[doc = "Software Reset Detect Flag"]
3576    #[inline(always)]
3577    pub fn swrf(
3578        self,
3579    ) -> crate::common::RegisterField<2, 0x1, 1, 0, rstsr1::Swrf, Rstsr1_SPEC, crate::common::RW>
3580    {
3581        crate::common::RegisterField::<2,0x1,1,0,rstsr1::Swrf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3582    }
3583    #[doc = "SRAM Parity Error Reset Detect Flag"]
3584    #[inline(always)]
3585    pub fn rperf(
3586        self,
3587    ) -> crate::common::RegisterField<8, 0x1, 1, 0, rstsr1::Rperf, Rstsr1_SPEC, crate::common::RW>
3588    {
3589        crate::common::RegisterField::<8,0x1,1,0,rstsr1::Rperf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3590    }
3591    #[doc = "SRAM ECC Error Reset Detect Flag"]
3592    #[inline(always)]
3593    pub fn reerf(
3594        self,
3595    ) -> crate::common::RegisterField<9, 0x1, 1, 0, rstsr1::Reerf, Rstsr1_SPEC, crate::common::RW>
3596    {
3597        crate::common::RegisterField::<9,0x1,1,0,rstsr1::Reerf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3598    }
3599    #[doc = "Bus Master MPU Error Reset Detect Flag"]
3600    #[inline(always)]
3601    pub fn busmrf(
3602        self,
3603    ) -> crate::common::RegisterField<11, 0x1, 1, 0, rstsr1::Busmrf, Rstsr1_SPEC, crate::common::RW>
3604    {
3605        crate::common::RegisterField::<11,0x1,1,0,rstsr1::Busmrf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3606    }
3607    #[doc = "TrustZone Error Reset Detect Flag"]
3608    #[inline(always)]
3609    pub fn tzerf(
3610        self,
3611    ) -> crate::common::RegisterField<13, 0x1, 1, 0, rstsr1::Tzerf, Rstsr1_SPEC, crate::common::RW>
3612    {
3613        crate::common::RegisterField::<13,0x1,1,0,rstsr1::Tzerf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3614    }
3615    #[doc = "Cache Parity Error Reset Detect Flag"]
3616    #[inline(always)]
3617    pub fn cperf(
3618        self,
3619    ) -> crate::common::RegisterField<15, 0x1, 1, 0, rstsr1::Cperf, Rstsr1_SPEC, crate::common::RW>
3620    {
3621        crate::common::RegisterField::<15,0x1,1,0,rstsr1::Cperf, Rstsr1_SPEC,crate::common::RW>::from_register(self,0)
3622    }
3623}
3624impl ::core::default::Default for Rstsr1 {
3625    #[inline(always)]
3626    fn default() -> Rstsr1 {
3627        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
3628    }
3629}
3630pub mod rstsr1 {
3631
3632    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3633    pub struct Iwdtrf_SPEC;
3634    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
3635    impl Iwdtrf {
3636        #[doc = "Independent watchdog timer reset not detected"]
3637        pub const _0: Self = Self::new(0);
3638        #[doc = "Independent watchdog timer reset detected"]
3639        pub const _1: Self = Self::new(1);
3640    }
3641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3642    pub struct Wdtrf_SPEC;
3643    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
3644    impl Wdtrf {
3645        #[doc = "Watchdog timer reset not detected"]
3646        pub const _0: Self = Self::new(0);
3647        #[doc = "Watchdog timer reset detected"]
3648        pub const _1: Self = Self::new(1);
3649    }
3650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3651    pub struct Swrf_SPEC;
3652    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
3653    impl Swrf {
3654        #[doc = "Software reset not detected"]
3655        pub const _0: Self = Self::new(0);
3656        #[doc = "Software reset detected"]
3657        pub const _1: Self = Self::new(1);
3658    }
3659    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3660    pub struct Rperf_SPEC;
3661    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
3662    impl Rperf {
3663        #[doc = "SRAM parity error reset not detected"]
3664        pub const _0: Self = Self::new(0);
3665        #[doc = "SRAM parity error reset detected"]
3666        pub const _1: Self = Self::new(1);
3667    }
3668    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3669    pub struct Reerf_SPEC;
3670    pub type Reerf = crate::EnumBitfieldStruct<u8, Reerf_SPEC>;
3671    impl Reerf {
3672        #[doc = "SRAM ECC error reset not detected"]
3673        pub const _0: Self = Self::new(0);
3674        #[doc = "SRAM ECC error reset detected"]
3675        pub const _1: Self = Self::new(1);
3676    }
3677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3678    pub struct Busmrf_SPEC;
3679    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
3680    impl Busmrf {
3681        #[doc = "Bus master MPU error reset not detected"]
3682        pub const _0: Self = Self::new(0);
3683        #[doc = "Bus master MPU error reset detected"]
3684        pub const _1: Self = Self::new(1);
3685    }
3686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3687    pub struct Tzerf_SPEC;
3688    pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
3689    impl Tzerf {
3690        #[doc = "TrustZone error reset not detected."]
3691        pub const _0: Self = Self::new(0);
3692        #[doc = "TrustZone error reset detected."]
3693        pub const _1: Self = Self::new(1);
3694    }
3695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3696    pub struct Cperf_SPEC;
3697    pub type Cperf = crate::EnumBitfieldStruct<u8, Cperf_SPEC>;
3698    impl Cperf {
3699        #[doc = "Cache Parity error reset not detected."]
3700        pub const _0: Self = Self::new(0);
3701        #[doc = "Cache Parity error reset detected."]
3702        pub const _1: Self = Self::new(1);
3703    }
3704}
3705#[doc(hidden)]
3706#[derive(Copy, Clone, Eq, PartialEq)]
3707pub struct Lvd1Cr1_SPEC;
3708impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
3709    type DataType = u8;
3710}
3711#[doc = "Voltage Monitor 1 Circuit Control Register"]
3712pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
3713
3714impl Lvd1Cr1 {
3715    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
3716    #[inline(always)]
3717    pub fn idtsel(
3718        self,
3719    ) -> crate::common::RegisterField<0, 0x3, 1, 0, lvd1cr1::Idtsel, Lvd1Cr1_SPEC, crate::common::RW>
3720    {
3721        crate::common::RegisterField::<0,0x3,1,0,lvd1cr1::Idtsel, Lvd1Cr1_SPEC,crate::common::RW>::from_register(self,0)
3722    }
3723    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
3724    #[inline(always)]
3725    pub fn irqsel(
3726        self,
3727    ) -> crate::common::RegisterField<2, 0x1, 1, 0, lvd1cr1::Irqsel, Lvd1Cr1_SPEC, crate::common::RW>
3728    {
3729        crate::common::RegisterField::<2,0x1,1,0,lvd1cr1::Irqsel, Lvd1Cr1_SPEC,crate::common::RW>::from_register(self,0)
3730    }
3731}
3732impl ::core::default::Default for Lvd1Cr1 {
3733    #[inline(always)]
3734    fn default() -> Lvd1Cr1 {
3735        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
3736    }
3737}
3738pub mod lvd1cr1 {
3739
3740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3741    pub struct Idtsel_SPEC;
3742    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
3743    impl Idtsel {
3744        #[doc = "When VCC >= Vdet1 (rise) is detected"]
3745        pub const _00: Self = Self::new(0);
3746        #[doc = "When VCC < Vdet1 (fall) is detected"]
3747        pub const _01: Self = Self::new(1);
3748        #[doc = "When fall and rise are detected"]
3749        pub const _10: Self = Self::new(2);
3750        #[doc = "Settings prohibited"]
3751        pub const _11: Self = Self::new(3);
3752    }
3753    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3754    pub struct Irqsel_SPEC;
3755    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
3756    impl Irqsel {
3757        #[doc = "Non-maskable interrupt"]
3758        pub const _0: Self = Self::new(0);
3759        #[doc = "Maskable interrupt"]
3760        pub const _1: Self = Self::new(1);
3761    }
3762}
3763#[doc(hidden)]
3764#[derive(Copy, Clone, Eq, PartialEq)]
3765pub struct Lvd1Sr_SPEC;
3766impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
3767    type DataType = u8;
3768}
3769#[doc = "Voltage Monitor 1 Circuit Status Register"]
3770pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
3771
3772impl Lvd1Sr {
3773    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
3774    #[inline(always)]
3775    pub fn det(
3776        self,
3777    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lvd1sr::Det, Lvd1Sr_SPEC, crate::common::RW>
3778    {
3779        crate::common::RegisterField::<0,0x1,1,0,lvd1sr::Det, Lvd1Sr_SPEC,crate::common::RW>::from_register(self,0)
3780    }
3781    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
3782    #[inline(always)]
3783    pub fn mon(
3784        self,
3785    ) -> crate::common::RegisterField<1, 0x1, 1, 0, lvd1sr::Mon, Lvd1Sr_SPEC, crate::common::R>
3786    {
3787        crate::common::RegisterField::<1,0x1,1,0,lvd1sr::Mon, Lvd1Sr_SPEC,crate::common::R>::from_register(self,0)
3788    }
3789}
3790impl ::core::default::Default for Lvd1Sr {
3791    #[inline(always)]
3792    fn default() -> Lvd1Sr {
3793        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
3794    }
3795}
3796pub mod lvd1sr {
3797
3798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3799    pub struct Det_SPEC;
3800    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3801    impl Det {
3802        #[doc = "Not detected"]
3803        pub const _0: Self = Self::new(0);
3804        #[doc = "Vdet1 crossing is detected"]
3805        pub const _1: Self = Self::new(1);
3806    }
3807    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3808    pub struct Mon_SPEC;
3809    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3810    impl Mon {
3811        #[doc = "VCC < Vdet1"]
3812        pub const _0: Self = Self::new(0);
3813        #[doc = "VCC >= Vdet1 or MON is disabled"]
3814        pub const _1: Self = Self::new(1);
3815    }
3816}
3817#[doc(hidden)]
3818#[derive(Copy, Clone, Eq, PartialEq)]
3819pub struct Lvd2Cr1_SPEC;
3820impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
3821    type DataType = u8;
3822}
3823#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
3824pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
3825
3826impl Lvd2Cr1 {
3827    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
3828    #[inline(always)]
3829    pub fn idtsel(
3830        self,
3831    ) -> crate::common::RegisterField<0, 0x3, 1, 0, lvd2cr1::Idtsel, Lvd2Cr1_SPEC, crate::common::RW>
3832    {
3833        crate::common::RegisterField::<0,0x3,1,0,lvd2cr1::Idtsel, Lvd2Cr1_SPEC,crate::common::RW>::from_register(self,0)
3834    }
3835    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
3836    #[inline(always)]
3837    pub fn irqsel(
3838        self,
3839    ) -> crate::common::RegisterField<2, 0x1, 1, 0, lvd2cr1::Irqsel, Lvd2Cr1_SPEC, crate::common::RW>
3840    {
3841        crate::common::RegisterField::<2,0x1,1,0,lvd2cr1::Irqsel, Lvd2Cr1_SPEC,crate::common::RW>::from_register(self,0)
3842    }
3843}
3844impl ::core::default::Default for Lvd2Cr1 {
3845    #[inline(always)]
3846    fn default() -> Lvd2Cr1 {
3847        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
3848    }
3849}
3850pub mod lvd2cr1 {
3851
3852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3853    pub struct Idtsel_SPEC;
3854    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
3855    impl Idtsel {
3856        #[doc = "When VCC>= Vdet2 (rise) is detected"]
3857        pub const _00: Self = Self::new(0);
3858        #[doc = "When VCC < Vdet2 (fall) is detected"]
3859        pub const _01: Self = Self::new(1);
3860        #[doc = "When fall and rise are detected"]
3861        pub const _10: Self = Self::new(2);
3862        #[doc = "Settings prohibited"]
3863        pub const _11: Self = Self::new(3);
3864    }
3865    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3866    pub struct Irqsel_SPEC;
3867    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
3868    impl Irqsel {
3869        #[doc = "Non-maskable interrupt"]
3870        pub const _0: Self = Self::new(0);
3871        #[doc = "Maskable interrupt"]
3872        pub const _1: Self = Self::new(1);
3873    }
3874}
3875#[doc(hidden)]
3876#[derive(Copy, Clone, Eq, PartialEq)]
3877pub struct Lvd2Sr_SPEC;
3878impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
3879    type DataType = u8;
3880}
3881#[doc = "Voltage Monitor 2 Circuit Status Register"]
3882pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
3883
3884impl Lvd2Sr {
3885    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
3886    #[inline(always)]
3887    pub fn det(
3888        self,
3889    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lvd2sr::Det, Lvd2Sr_SPEC, crate::common::RW>
3890    {
3891        crate::common::RegisterField::<0,0x1,1,0,lvd2sr::Det, Lvd2Sr_SPEC,crate::common::RW>::from_register(self,0)
3892    }
3893    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
3894    #[inline(always)]
3895    pub fn mon(
3896        self,
3897    ) -> crate::common::RegisterField<1, 0x1, 1, 0, lvd2sr::Mon, Lvd2Sr_SPEC, crate::common::R>
3898    {
3899        crate::common::RegisterField::<1,0x1,1,0,lvd2sr::Mon, Lvd2Sr_SPEC,crate::common::R>::from_register(self,0)
3900    }
3901}
3902impl ::core::default::Default for Lvd2Sr {
3903    #[inline(always)]
3904    fn default() -> Lvd2Sr {
3905        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
3906    }
3907}
3908pub mod lvd2sr {
3909
3910    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3911    pub struct Det_SPEC;
3912    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
3913    impl Det {
3914        #[doc = "Not detected"]
3915        pub const _0: Self = Self::new(0);
3916        #[doc = "Vdet2 crossing is detected"]
3917        pub const _1: Self = Self::new(1);
3918    }
3919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3920    pub struct Mon_SPEC;
3921    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
3922    impl Mon {
3923        #[doc = "VCC < Vdet2"]
3924        pub const _0: Self = Self::new(0);
3925        #[doc = "VCC>= Vdet2 or MON is disabled"]
3926        pub const _1: Self = Self::new(1);
3927    }
3928}
3929#[doc(hidden)]
3930#[derive(Copy, Clone, Eq, PartialEq)]
3931pub struct Cgfsar_SPEC;
3932impl crate::sealed::RegSpec for Cgfsar_SPEC {
3933    type DataType = u32;
3934}
3935#[doc = "Clock Generation Function Security Attribute Register"]
3936pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
3937
3938impl Cgfsar {
3939    #[doc = "Non Secure Attribute bit 00"]
3940    #[inline(always)]
3941    pub fn nonsec00(
3942        self,
3943    ) -> crate::common::RegisterField<0, 0x1, 1, 0, cgfsar::Nonsec00, Cgfsar_SPEC, crate::common::RW>
3944    {
3945        crate::common::RegisterField::<0,0x1,1,0,cgfsar::Nonsec00, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3946    }
3947    #[doc = "Non Secure Attribute bit 02"]
3948    #[inline(always)]
3949    pub fn nonsec02(
3950        self,
3951    ) -> crate::common::RegisterField<2, 0x1, 1, 0, cgfsar::Nonsec02, Cgfsar_SPEC, crate::common::RW>
3952    {
3953        crate::common::RegisterField::<2,0x1,1,0,cgfsar::Nonsec02, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3954    }
3955    #[doc = "Non Secure Attribute bit 03"]
3956    #[inline(always)]
3957    pub fn nonsec03(
3958        self,
3959    ) -> crate::common::RegisterField<3, 0x1, 1, 0, cgfsar::Nonsec03, Cgfsar_SPEC, crate::common::RW>
3960    {
3961        crate::common::RegisterField::<3,0x1,1,0,cgfsar::Nonsec03, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3962    }
3963    #[doc = "Non Secure Attribute bit 04"]
3964    #[inline(always)]
3965    pub fn nonsec04(
3966        self,
3967    ) -> crate::common::RegisterField<4, 0x1, 1, 0, cgfsar::Nonsec04, Cgfsar_SPEC, crate::common::RW>
3968    {
3969        crate::common::RegisterField::<4,0x1,1,0,cgfsar::Nonsec04, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3970    }
3971    #[doc = "Non Secure Attribute bit 05"]
3972    #[inline(always)]
3973    pub fn nonsec05(
3974        self,
3975    ) -> crate::common::RegisterField<5, 0x1, 1, 0, cgfsar::Nonsec05, Cgfsar_SPEC, crate::common::RW>
3976    {
3977        crate::common::RegisterField::<5,0x1,1,0,cgfsar::Nonsec05, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3978    }
3979    #[doc = "Non Secure Attribute bit 06"]
3980    #[inline(always)]
3981    pub fn nonsec06(
3982        self,
3983    ) -> crate::common::RegisterField<6, 0x1, 1, 0, cgfsar::Nonsec06, Cgfsar_SPEC, crate::common::RW>
3984    {
3985        crate::common::RegisterField::<6,0x1,1,0,cgfsar::Nonsec06, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3986    }
3987    #[doc = "Non Secure Attribute bit 07"]
3988    #[inline(always)]
3989    pub fn nonsec07(
3990        self,
3991    ) -> crate::common::RegisterField<7, 0x1, 1, 0, cgfsar::Nonsec07, Cgfsar_SPEC, crate::common::RW>
3992    {
3993        crate::common::RegisterField::<7,0x1,1,0,cgfsar::Nonsec07, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
3994    }
3995    #[doc = "Non Secure Attribute bit 08"]
3996    #[inline(always)]
3997    pub fn nonsec08(
3998        self,
3999    ) -> crate::common::RegisterField<8, 0x1, 1, 0, cgfsar::Nonsec08, Cgfsar_SPEC, crate::common::RW>
4000    {
4001        crate::common::RegisterField::<8,0x1,1,0,cgfsar::Nonsec08, Cgfsar_SPEC,crate::common::RW>::from_register(self,0)
4002    }
4003    #[doc = "Non Secure Attribute bit 11"]
4004    #[inline(always)]
4005    pub fn nonsec11(
4006        self,
4007    ) -> crate::common::RegisterField<11, 0x1, 1, 0, cgfsar::Nonsec11, Cgfsar_SPEC, crate::common::RW>
4008    {
4009        crate::common::RegisterField::<
4010            11,
4011            0x1,
4012            1,
4013            0,
4014            cgfsar::Nonsec11,
4015            Cgfsar_SPEC,
4016            crate::common::RW,
4017        >::from_register(self, 0)
4018    }
4019    #[doc = "Non Secure Attribute bit 16"]
4020    #[inline(always)]
4021    pub fn nonsec16(
4022        self,
4023    ) -> crate::common::RegisterField<16, 0x1, 1, 0, cgfsar::Nonsec16, Cgfsar_SPEC, crate::common::RW>
4024    {
4025        crate::common::RegisterField::<
4026            16,
4027            0x1,
4028            1,
4029            0,
4030            cgfsar::Nonsec16,
4031            Cgfsar_SPEC,
4032            crate::common::RW,
4033        >::from_register(self, 0)
4034    }
4035    #[doc = "Non Secure Attribute bit 18"]
4036    #[inline(always)]
4037    pub fn nonsec18(
4038        self,
4039    ) -> crate::common::RegisterField<18, 0x1, 1, 0, cgfsar::Nonsec18, Cgfsar_SPEC, crate::common::RW>
4040    {
4041        crate::common::RegisterField::<
4042            18,
4043            0x1,
4044            1,
4045            0,
4046            cgfsar::Nonsec18,
4047            Cgfsar_SPEC,
4048            crate::common::RW,
4049        >::from_register(self, 0)
4050    }
4051    #[doc = "Non Secure Attribute bit 20"]
4052    #[inline(always)]
4053    pub fn nonsec20(
4054        self,
4055    ) -> crate::common::RegisterField<20, 0x1, 1, 0, cgfsar::Nonsec20, Cgfsar_SPEC, crate::common::RW>
4056    {
4057        crate::common::RegisterField::<
4058            20,
4059            0x1,
4060            1,
4061            0,
4062            cgfsar::Nonsec20,
4063            Cgfsar_SPEC,
4064            crate::common::RW,
4065        >::from_register(self, 0)
4066    }
4067}
4068impl ::core::default::Default for Cgfsar {
4069    #[inline(always)]
4070    fn default() -> Cgfsar {
4071        <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
4072    }
4073}
4074pub mod cgfsar {
4075
4076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4077    pub struct Nonsec00_SPEC;
4078    pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
4079    impl Nonsec00 {
4080        #[doc = "Secure"]
4081        pub const _0: Self = Self::new(0);
4082        #[doc = "Non Secure"]
4083        pub const _1: Self = Self::new(1);
4084    }
4085    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4086    pub struct Nonsec02_SPEC;
4087    pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
4088    impl Nonsec02 {
4089        #[doc = "Secure"]
4090        pub const _0: Self = Self::new(0);
4091        #[doc = "Non Secure"]
4092        pub const _1: Self = Self::new(1);
4093    }
4094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4095    pub struct Nonsec03_SPEC;
4096    pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
4097    impl Nonsec03 {
4098        #[doc = "Secure"]
4099        pub const _0: Self = Self::new(0);
4100        #[doc = "Non Secure"]
4101        pub const _1: Self = Self::new(1);
4102    }
4103    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4104    pub struct Nonsec04_SPEC;
4105    pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
4106    impl Nonsec04 {
4107        #[doc = "Secure"]
4108        pub const _0: Self = Self::new(0);
4109        #[doc = "Non Secure"]
4110        pub const _1: Self = Self::new(1);
4111    }
4112    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4113    pub struct Nonsec05_SPEC;
4114    pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
4115    impl Nonsec05 {
4116        #[doc = "Secure"]
4117        pub const _0: Self = Self::new(0);
4118        #[doc = "Non Secure"]
4119        pub const _1: Self = Self::new(1);
4120    }
4121    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4122    pub struct Nonsec06_SPEC;
4123    pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
4124    impl Nonsec06 {
4125        #[doc = "Secure"]
4126        pub const _0: Self = Self::new(0);
4127        #[doc = "Non Secure"]
4128        pub const _1: Self = Self::new(1);
4129    }
4130    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4131    pub struct Nonsec07_SPEC;
4132    pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
4133    impl Nonsec07 {
4134        #[doc = "Secure"]
4135        pub const _0: Self = Self::new(0);
4136        #[doc = "Non Secure"]
4137        pub const _1: Self = Self::new(1);
4138    }
4139    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4140    pub struct Nonsec08_SPEC;
4141    pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
4142    impl Nonsec08 {
4143        #[doc = "Secure"]
4144        pub const _0: Self = Self::new(0);
4145        #[doc = "Non Secure"]
4146        pub const _1: Self = Self::new(1);
4147    }
4148    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4149    pub struct Nonsec11_SPEC;
4150    pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
4151    impl Nonsec11 {
4152        #[doc = "Secure"]
4153        pub const _0: Self = Self::new(0);
4154        #[doc = "Non Secure"]
4155        pub const _1: Self = Self::new(1);
4156    }
4157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4158    pub struct Nonsec16_SPEC;
4159    pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
4160    impl Nonsec16 {
4161        #[doc = "Secure"]
4162        pub const _0: Self = Self::new(0);
4163        #[doc = "Non Secure"]
4164        pub const _1: Self = Self::new(1);
4165    }
4166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4167    pub struct Nonsec18_SPEC;
4168    pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
4169    impl Nonsec18 {
4170        #[doc = "Secure"]
4171        pub const _0: Self = Self::new(0);
4172        #[doc = "Non Secure"]
4173        pub const _1: Self = Self::new(1);
4174    }
4175    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4176    pub struct Nonsec20_SPEC;
4177    pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
4178    impl Nonsec20 {
4179        #[doc = "Secure"]
4180        pub const _0: Self = Self::new(0);
4181        #[doc = "Non Secure"]
4182        pub const _1: Self = Self::new(1);
4183    }
4184}
4185#[doc(hidden)]
4186#[derive(Copy, Clone, Eq, PartialEq)]
4187pub struct Rstsar_SPEC;
4188impl crate::sealed::RegSpec for Rstsar_SPEC {
4189    type DataType = u32;
4190}
4191#[doc = "Reset Security Attribution Register"]
4192pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
4193
4194impl Rstsar {
4195    #[doc = "Non Secure Attribute bit 0"]
4196    #[inline(always)]
4197    pub fn nonsec0(
4198        self,
4199    ) -> crate::common::RegisterField<0, 0x1, 1, 0, rstsar::Nonsec0, Rstsar_SPEC, crate::common::RW>
4200    {
4201        crate::common::RegisterField::<0,0x1,1,0,rstsar::Nonsec0, Rstsar_SPEC,crate::common::RW>::from_register(self,0)
4202    }
4203    #[doc = "Non Secure Attribute bit 1"]
4204    #[inline(always)]
4205    pub fn nonsec1(
4206        self,
4207    ) -> crate::common::RegisterField<1, 0x1, 1, 0, rstsar::Nonsec1, Rstsar_SPEC, crate::common::RW>
4208    {
4209        crate::common::RegisterField::<1,0x1,1,0,rstsar::Nonsec1, Rstsar_SPEC,crate::common::RW>::from_register(self,0)
4210    }
4211    #[doc = "Non Secure Attribute bit 2"]
4212    #[inline(always)]
4213    pub fn nonsec2(
4214        self,
4215    ) -> crate::common::RegisterField<2, 0x1, 1, 0, rstsar::Nonsec2, Rstsar_SPEC, crate::common::RW>
4216    {
4217        crate::common::RegisterField::<2,0x1,1,0,rstsar::Nonsec2, Rstsar_SPEC,crate::common::RW>::from_register(self,0)
4218    }
4219}
4220impl ::core::default::Default for Rstsar {
4221    #[inline(always)]
4222    fn default() -> Rstsar {
4223        <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
4224    }
4225}
4226pub mod rstsar {
4227
4228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4229    pub struct Nonsec0_SPEC;
4230    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
4231    impl Nonsec0 {
4232        #[doc = "Secure"]
4233        pub const _0: Self = Self::new(0);
4234        #[doc = "Non Secure"]
4235        pub const _1: Self = Self::new(1);
4236    }
4237    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4238    pub struct Nonsec1_SPEC;
4239    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
4240    impl Nonsec1 {
4241        #[doc = "Secure"]
4242        pub const _0: Self = Self::new(0);
4243        #[doc = "Non Secure"]
4244        pub const _1: Self = Self::new(1);
4245    }
4246    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4247    pub struct Nonsec2_SPEC;
4248    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
4249    impl Nonsec2 {
4250        #[doc = "Secure"]
4251        pub const _0: Self = Self::new(0);
4252        #[doc = "Non Secure"]
4253        pub const _1: Self = Self::new(1);
4254    }
4255}
4256#[doc(hidden)]
4257#[derive(Copy, Clone, Eq, PartialEq)]
4258pub struct Lpmsar_SPEC;
4259impl crate::sealed::RegSpec for Lpmsar_SPEC {
4260    type DataType = u32;
4261}
4262#[doc = "Low Power Mode Security Attribution Register"]
4263pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
4264
4265impl Lpmsar {
4266    #[doc = "Non Secure Attribute bit 0"]
4267    #[inline(always)]
4268    pub fn nonsec0(
4269        self,
4270    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lpmsar::Nonsec0, Lpmsar_SPEC, crate::common::RW>
4271    {
4272        crate::common::RegisterField::<0,0x1,1,0,lpmsar::Nonsec0, Lpmsar_SPEC,crate::common::RW>::from_register(self,0)
4273    }
4274    #[doc = "Non Secure Attribute bit 2"]
4275    #[inline(always)]
4276    pub fn nonsec2(
4277        self,
4278    ) -> crate::common::RegisterField<2, 0x1, 1, 0, lpmsar::Nonsec2, Lpmsar_SPEC, crate::common::RW>
4279    {
4280        crate::common::RegisterField::<2,0x1,1,0,lpmsar::Nonsec2, Lpmsar_SPEC,crate::common::RW>::from_register(self,0)
4281    }
4282    #[doc = "Non Secure Attribute bit 4"]
4283    #[inline(always)]
4284    pub fn nonsec4(
4285        self,
4286    ) -> crate::common::RegisterField<4, 0x1, 1, 0, lpmsar::Nonsec4, Lpmsar_SPEC, crate::common::RW>
4287    {
4288        crate::common::RegisterField::<4,0x1,1,0,lpmsar::Nonsec4, Lpmsar_SPEC,crate::common::RW>::from_register(self,0)
4289    }
4290    #[doc = "Non Secure Attribute bit 8"]
4291    #[inline(always)]
4292    pub fn nonsec8(
4293        self,
4294    ) -> crate::common::RegisterField<8, 0x1, 1, 0, lpmsar::Nonsec8, Lpmsar_SPEC, crate::common::RW>
4295    {
4296        crate::common::RegisterField::<8,0x1,1,0,lpmsar::Nonsec8, Lpmsar_SPEC,crate::common::RW>::from_register(self,0)
4297    }
4298    #[doc = "Non Secure Attribute bit 9"]
4299    #[inline(always)]
4300    pub fn nonsec9(
4301        self,
4302    ) -> crate::common::RegisterField<9, 0x1, 1, 0, lpmsar::Nonsec9, Lpmsar_SPEC, crate::common::RW>
4303    {
4304        crate::common::RegisterField::<9,0x1,1,0,lpmsar::Nonsec9, Lpmsar_SPEC,crate::common::RW>::from_register(self,0)
4305    }
4306}
4307impl ::core::default::Default for Lpmsar {
4308    #[inline(always)]
4309    fn default() -> Lpmsar {
4310        <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
4311    }
4312}
4313pub mod lpmsar {
4314
4315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4316    pub struct Nonsec0_SPEC;
4317    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
4318    impl Nonsec0 {
4319        #[doc = "Secure"]
4320        pub const _0: Self = Self::new(0);
4321        #[doc = "Non Secure"]
4322        pub const _1: Self = Self::new(1);
4323    }
4324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4325    pub struct Nonsec2_SPEC;
4326    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
4327    impl Nonsec2 {
4328        #[doc = "Secure"]
4329        pub const _0: Self = Self::new(0);
4330        #[doc = "Non Secure"]
4331        pub const _1: Self = Self::new(1);
4332    }
4333    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4334    pub struct Nonsec4_SPEC;
4335    pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
4336    impl Nonsec4 {
4337        #[doc = "Secure"]
4338        pub const _0: Self = Self::new(0);
4339        #[doc = "Non Secure"]
4340        pub const _1: Self = Self::new(1);
4341    }
4342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4343    pub struct Nonsec8_SPEC;
4344    pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
4345    impl Nonsec8 {
4346        #[doc = "Secure"]
4347        pub const _0: Self = Self::new(0);
4348        #[doc = "Non Secure"]
4349        pub const _1: Self = Self::new(1);
4350    }
4351    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4352    pub struct Nonsec9_SPEC;
4353    pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
4354    impl Nonsec9 {
4355        #[doc = "Secure"]
4356        pub const _0: Self = Self::new(0);
4357        #[doc = "Non Secure"]
4358        pub const _1: Self = Self::new(1);
4359    }
4360}
4361#[doc(hidden)]
4362#[derive(Copy, Clone, Eq, PartialEq)]
4363pub struct Lvdsar_SPEC;
4364impl crate::sealed::RegSpec for Lvdsar_SPEC {
4365    type DataType = u32;
4366}
4367#[doc = "Low Voltage Detection Security Attribution Register"]
4368pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
4369
4370impl Lvdsar {
4371    #[doc = "Non Secure Attribute bit 0"]
4372    #[inline(always)]
4373    pub fn nonsec0(
4374        self,
4375    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lvdsar::Nonsec0, Lvdsar_SPEC, crate::common::RW>
4376    {
4377        crate::common::RegisterField::<0,0x1,1,0,lvdsar::Nonsec0, Lvdsar_SPEC,crate::common::RW>::from_register(self,0)
4378    }
4379    #[doc = "Non Secure Attribute bit 1"]
4380    #[inline(always)]
4381    pub fn nonsec1(
4382        self,
4383    ) -> crate::common::RegisterField<1, 0x1, 1, 0, lvdsar::Nonsec1, Lvdsar_SPEC, crate::common::RW>
4384    {
4385        crate::common::RegisterField::<1,0x1,1,0,lvdsar::Nonsec1, Lvdsar_SPEC,crate::common::RW>::from_register(self,0)
4386    }
4387}
4388impl ::core::default::Default for Lvdsar {
4389    #[inline(always)]
4390    fn default() -> Lvdsar {
4391        <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
4392    }
4393}
4394pub mod lvdsar {
4395
4396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4397    pub struct Nonsec0_SPEC;
4398    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
4399    impl Nonsec0 {
4400        #[doc = "Secure"]
4401        pub const _0: Self = Self::new(0);
4402        #[doc = "Non Secure"]
4403        pub const _1: Self = Self::new(1);
4404    }
4405    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4406    pub struct Nonsec1_SPEC;
4407    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
4408    impl Nonsec1 {
4409        #[doc = "Secure"]
4410        pub const _0: Self = Self::new(0);
4411        #[doc = "Non Secure"]
4412        pub const _1: Self = Self::new(1);
4413    }
4414}
4415#[doc(hidden)]
4416#[derive(Copy, Clone, Eq, PartialEq)]
4417pub struct Dpfsar_SPEC;
4418impl crate::sealed::RegSpec for Dpfsar_SPEC {
4419    type DataType = u32;
4420}
4421#[doc = "Deep Standby Interrupt Factor Security Attribution Register"]
4422pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
4423
4424impl Dpfsar {
4425    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 0"]
4426    #[inline(always)]
4427    pub fn dpfsa0(
4428        self,
4429    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpfsar::Dpfsa0, Dpfsar_SPEC, crate::common::RW>
4430    {
4431        crate::common::RegisterField::<0,0x1,1,0,dpfsar::Dpfsa0, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4432    }
4433    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 1"]
4434    #[inline(always)]
4435    pub fn dpfsa1(
4436        self,
4437    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpfsar::Dpfsa1, Dpfsar_SPEC, crate::common::RW>
4438    {
4439        crate::common::RegisterField::<1,0x1,1,0,dpfsar::Dpfsa1, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4440    }
4441    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4442    #[inline(always)]
4443    pub fn dpfsa04(
4444        self,
4445    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpfsar::Dpfsa04, Dpfsar_SPEC, crate::common::RW>
4446    {
4447        crate::common::RegisterField::<4,0x1,1,0,dpfsar::Dpfsa04, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4448    }
4449    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4450    #[inline(always)]
4451    pub fn dpfsa05(
4452        self,
4453    ) -> crate::common::RegisterField<5, 0x1, 1, 0, dpfsar::Dpfsa05, Dpfsar_SPEC, crate::common::RW>
4454    {
4455        crate::common::RegisterField::<5,0x1,1,0,dpfsar::Dpfsa05, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4456    }
4457    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4458    #[inline(always)]
4459    pub fn dpfsa06(
4460        self,
4461    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpfsar::Dpfsa06, Dpfsar_SPEC, crate::common::RW>
4462    {
4463        crate::common::RegisterField::<6,0x1,1,0,dpfsar::Dpfsa06, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4464    }
4465    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4466    #[inline(always)]
4467    pub fn dpfsa07(
4468        self,
4469    ) -> crate::common::RegisterField<7, 0x1, 1, 0, dpfsar::Dpfsa07, Dpfsar_SPEC, crate::common::RW>
4470    {
4471        crate::common::RegisterField::<7,0x1,1,0,dpfsar::Dpfsa07, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4472    }
4473    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4474    #[inline(always)]
4475    pub fn dpfsa08(
4476        self,
4477    ) -> crate::common::RegisterField<8, 0x1, 1, 0, dpfsar::Dpfsa08, Dpfsar_SPEC, crate::common::RW>
4478    {
4479        crate::common::RegisterField::<8,0x1,1,0,dpfsar::Dpfsa08, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4480    }
4481    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4482    #[inline(always)]
4483    pub fn dpfsa09(
4484        self,
4485    ) -> crate::common::RegisterField<9, 0x1, 1, 0, dpfsar::Dpfsa09, Dpfsar_SPEC, crate::common::RW>
4486    {
4487        crate::common::RegisterField::<9,0x1,1,0,dpfsar::Dpfsa09, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4488    }
4489    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4490    #[inline(always)]
4491    pub fn dpfsa10(
4492        self,
4493    ) -> crate::common::RegisterField<10, 0x1, 1, 0, dpfsar::Dpfsa10, Dpfsar_SPEC, crate::common::RW>
4494    {
4495        crate::common::RegisterField::<10,0x1,1,0,dpfsar::Dpfsa10, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4496    }
4497    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4498    #[inline(always)]
4499    pub fn dpfsa11(
4500        self,
4501    ) -> crate::common::RegisterField<11, 0x1, 1, 0, dpfsar::Dpfsa11, Dpfsar_SPEC, crate::common::RW>
4502    {
4503        crate::common::RegisterField::<11,0x1,1,0,dpfsar::Dpfsa11, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4504    }
4505    #[doc = "Deep Standby Interrupt Factor Security Attribute bit n (n = 4 to 12)"]
4506    #[inline(always)]
4507    pub fn dpfsa12(
4508        self,
4509    ) -> crate::common::RegisterField<12, 0x1, 1, 0, dpfsar::Dpfsa12, Dpfsar_SPEC, crate::common::RW>
4510    {
4511        crate::common::RegisterField::<12,0x1,1,0,dpfsar::Dpfsa12, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4512    }
4513    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 14"]
4514    #[inline(always)]
4515    pub fn dpfsa14(
4516        self,
4517    ) -> crate::common::RegisterField<14, 0x1, 1, 0, dpfsar::Dpfsa14, Dpfsar_SPEC, crate::common::RW>
4518    {
4519        crate::common::RegisterField::<14,0x1,1,0,dpfsar::Dpfsa14, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4520    }
4521    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 16"]
4522    #[inline(always)]
4523    pub fn dpfsa16(
4524        self,
4525    ) -> crate::common::RegisterField<16, 0x1, 1, 0, dpfsar::Dpfsa16, Dpfsar_SPEC, crate::common::RW>
4526    {
4527        crate::common::RegisterField::<16,0x1,1,0,dpfsar::Dpfsa16, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4528    }
4529    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 17"]
4530    #[inline(always)]
4531    pub fn dpfsa17(
4532        self,
4533    ) -> crate::common::RegisterField<17, 0x1, 1, 0, dpfsar::Dpfsa17, Dpfsar_SPEC, crate::common::RW>
4534    {
4535        crate::common::RegisterField::<17,0x1,1,0,dpfsar::Dpfsa17, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4536    }
4537    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 18"]
4538    #[inline(always)]
4539    pub fn dpfsa18(
4540        self,
4541    ) -> crate::common::RegisterField<18, 0x1, 1, 0, dpfsar::Dpfsa18, Dpfsar_SPEC, crate::common::RW>
4542    {
4543        crate::common::RegisterField::<18,0x1,1,0,dpfsar::Dpfsa18, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4544    }
4545    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 19"]
4546    #[inline(always)]
4547    pub fn dpfsa19(
4548        self,
4549    ) -> crate::common::RegisterField<19, 0x1, 1, 0, dpfsar::Dpfsa19, Dpfsar_SPEC, crate::common::RW>
4550    {
4551        crate::common::RegisterField::<19,0x1,1,0,dpfsar::Dpfsa19, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4552    }
4553    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 20"]
4554    #[inline(always)]
4555    pub fn dpfsa20(
4556        self,
4557    ) -> crate::common::RegisterField<20, 0x1, 1, 0, dpfsar::Dpfsa20, Dpfsar_SPEC, crate::common::RW>
4558    {
4559        crate::common::RegisterField::<20,0x1,1,0,dpfsar::Dpfsa20, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4560    }
4561    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 24"]
4562    #[inline(always)]
4563    pub fn dpfsa24(
4564        self,
4565    ) -> crate::common::RegisterField<24, 0x1, 1, 0, dpfsar::Dpfsa24, Dpfsar_SPEC, crate::common::RW>
4566    {
4567        crate::common::RegisterField::<24,0x1,1,0,dpfsar::Dpfsa24, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4568    }
4569    #[doc = "Deep Standby Interrupt Factor Security Attribute bit 26"]
4570    #[inline(always)]
4571    pub fn dpfsa26(
4572        self,
4573    ) -> crate::common::RegisterField<26, 0x1, 1, 0, dpfsar::Dpfsa26, Dpfsar_SPEC, crate::common::RW>
4574    {
4575        crate::common::RegisterField::<26,0x1,1,0,dpfsar::Dpfsa26, Dpfsar_SPEC,crate::common::RW>::from_register(self,0)
4576    }
4577}
4578impl ::core::default::Default for Dpfsar {
4579    #[inline(always)]
4580    fn default() -> Dpfsar {
4581        <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
4582    }
4583}
4584pub mod dpfsar {
4585
4586    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4587    pub struct Dpfsa0_SPEC;
4588    pub type Dpfsa0 = crate::EnumBitfieldStruct<u8, Dpfsa0_SPEC>;
4589    impl Dpfsa0 {
4590        #[doc = "Secure"]
4591        pub const _0: Self = Self::new(0);
4592        #[doc = "Non Secure"]
4593        pub const _1: Self = Self::new(1);
4594    }
4595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4596    pub struct Dpfsa1_SPEC;
4597    pub type Dpfsa1 = crate::EnumBitfieldStruct<u8, Dpfsa1_SPEC>;
4598    impl Dpfsa1 {
4599        #[doc = "Secure"]
4600        pub const _0: Self = Self::new(0);
4601        #[doc = "Non Secure"]
4602        pub const _1: Self = Self::new(1);
4603    }
4604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4605    pub struct Dpfsa04_SPEC;
4606    pub type Dpfsa04 = crate::EnumBitfieldStruct<u8, Dpfsa04_SPEC>;
4607    impl Dpfsa04 {
4608        #[doc = "Secure"]
4609        pub const _0: Self = Self::new(0);
4610        #[doc = "Non Secure"]
4611        pub const _1: Self = Self::new(1);
4612    }
4613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4614    pub struct Dpfsa05_SPEC;
4615    pub type Dpfsa05 = crate::EnumBitfieldStruct<u8, Dpfsa05_SPEC>;
4616    impl Dpfsa05 {
4617        #[doc = "Secure"]
4618        pub const _0: Self = Self::new(0);
4619        #[doc = "Non Secure"]
4620        pub const _1: Self = Self::new(1);
4621    }
4622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4623    pub struct Dpfsa06_SPEC;
4624    pub type Dpfsa06 = crate::EnumBitfieldStruct<u8, Dpfsa06_SPEC>;
4625    impl Dpfsa06 {
4626        #[doc = "Secure"]
4627        pub const _0: Self = Self::new(0);
4628        #[doc = "Non Secure"]
4629        pub const _1: Self = Self::new(1);
4630    }
4631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4632    pub struct Dpfsa07_SPEC;
4633    pub type Dpfsa07 = crate::EnumBitfieldStruct<u8, Dpfsa07_SPEC>;
4634    impl Dpfsa07 {
4635        #[doc = "Secure"]
4636        pub const _0: Self = Self::new(0);
4637        #[doc = "Non Secure"]
4638        pub const _1: Self = Self::new(1);
4639    }
4640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4641    pub struct Dpfsa08_SPEC;
4642    pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
4643    impl Dpfsa08 {
4644        #[doc = "Secure"]
4645        pub const _0: Self = Self::new(0);
4646        #[doc = "Non Secure"]
4647        pub const _1: Self = Self::new(1);
4648    }
4649    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4650    pub struct Dpfsa09_SPEC;
4651    pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
4652    impl Dpfsa09 {
4653        #[doc = "Secure"]
4654        pub const _0: Self = Self::new(0);
4655        #[doc = "Non Secure"]
4656        pub const _1: Self = Self::new(1);
4657    }
4658    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4659    pub struct Dpfsa10_SPEC;
4660    pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
4661    impl Dpfsa10 {
4662        #[doc = "Secure"]
4663        pub const _0: Self = Self::new(0);
4664        #[doc = "Non Secure"]
4665        pub const _1: Self = Self::new(1);
4666    }
4667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4668    pub struct Dpfsa11_SPEC;
4669    pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
4670    impl Dpfsa11 {
4671        #[doc = "Secure"]
4672        pub const _0: Self = Self::new(0);
4673        #[doc = "Non Secure"]
4674        pub const _1: Self = Self::new(1);
4675    }
4676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4677    pub struct Dpfsa12_SPEC;
4678    pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
4679    impl Dpfsa12 {
4680        #[doc = "Secure"]
4681        pub const _0: Self = Self::new(0);
4682        #[doc = "Non Secure"]
4683        pub const _1: Self = Self::new(1);
4684    }
4685    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4686    pub struct Dpfsa14_SPEC;
4687    pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
4688    impl Dpfsa14 {
4689        #[doc = "Secure"]
4690        pub const _0: Self = Self::new(0);
4691        #[doc = "Non Secure"]
4692        pub const _1: Self = Self::new(1);
4693    }
4694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4695    pub struct Dpfsa16_SPEC;
4696    pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
4697    impl Dpfsa16 {
4698        #[doc = "Secure"]
4699        pub const _0: Self = Self::new(0);
4700        #[doc = "Non Secure"]
4701        pub const _1: Self = Self::new(1);
4702    }
4703    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4704    pub struct Dpfsa17_SPEC;
4705    pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
4706    impl Dpfsa17 {
4707        #[doc = "Secure"]
4708        pub const _0: Self = Self::new(0);
4709        #[doc = "Non Secure"]
4710        pub const _1: Self = Self::new(1);
4711    }
4712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4713    pub struct Dpfsa18_SPEC;
4714    pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
4715    impl Dpfsa18 {
4716        #[doc = "Secure"]
4717        pub const _0: Self = Self::new(0);
4718        #[doc = "Non Secure"]
4719        pub const _1: Self = Self::new(1);
4720    }
4721    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4722    pub struct Dpfsa19_SPEC;
4723    pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
4724    impl Dpfsa19 {
4725        #[doc = "Secure"]
4726        pub const _0: Self = Self::new(0);
4727        #[doc = "Non Secure"]
4728        pub const _1: Self = Self::new(1);
4729    }
4730    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4731    pub struct Dpfsa20_SPEC;
4732    pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
4733    impl Dpfsa20 {
4734        #[doc = "Secure"]
4735        pub const _0: Self = Self::new(0);
4736        #[doc = "Non Secure"]
4737        pub const _1: Self = Self::new(1);
4738    }
4739    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4740    pub struct Dpfsa24_SPEC;
4741    pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
4742    impl Dpfsa24 {
4743        #[doc = "Secure"]
4744        pub const _0: Self = Self::new(0);
4745        #[doc = "Non Secure"]
4746        pub const _1: Self = Self::new(1);
4747    }
4748    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4749    pub struct Dpfsa26_SPEC;
4750    pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
4751    impl Dpfsa26 {
4752        #[doc = "Secure"]
4753        pub const _0: Self = Self::new(0);
4754        #[doc = "Non Secure"]
4755        pub const _1: Self = Self::new(1);
4756    }
4757}
4758#[doc(hidden)]
4759#[derive(Copy, Clone, Eq, PartialEq)]
4760pub struct Prcr_SPEC;
4761impl crate::sealed::RegSpec for Prcr_SPEC {
4762    type DataType = u16;
4763}
4764#[doc = "Protect Register"]
4765pub type Prcr = crate::RegValueT<Prcr_SPEC>;
4766
4767impl Prcr {
4768    #[doc = "Enable writing to the registers related to the clock generation circuit"]
4769    #[inline(always)]
4770    pub fn prc0(
4771        self,
4772    ) -> crate::common::RegisterField<0, 0x1, 1, 0, prcr::Prc0, Prcr_SPEC, crate::common::RW> {
4773        crate::common::RegisterField::<0,0x1,1,0,prcr::Prc0, Prcr_SPEC,crate::common::RW>::from_register(self,0)
4774    }
4775    #[doc = "Enable writing to the registers related to the low power modes"]
4776    #[inline(always)]
4777    pub fn prc1(
4778        self,
4779    ) -> crate::common::RegisterField<1, 0x1, 1, 0, prcr::Prc1, Prcr_SPEC, crate::common::RW> {
4780        crate::common::RegisterField::<1,0x1,1,0,prcr::Prc1, Prcr_SPEC,crate::common::RW>::from_register(self,0)
4781    }
4782    #[doc = "Enable writing to the registers related to the LVD"]
4783    #[inline(always)]
4784    pub fn prc3(
4785        self,
4786    ) -> crate::common::RegisterField<3, 0x1, 1, 0, prcr::Prc3, Prcr_SPEC, crate::common::RW> {
4787        crate::common::RegisterField::<3,0x1,1,0,prcr::Prc3, Prcr_SPEC,crate::common::RW>::from_register(self,0)
4788    }
4789    #[doc = ""]
4790    #[inline(always)]
4791    pub fn prc4(
4792        self,
4793    ) -> crate::common::RegisterField<4, 0x1, 1, 0, prcr::Prc4, Prcr_SPEC, crate::common::RW> {
4794        crate::common::RegisterField::<4,0x1,1,0,prcr::Prc4, Prcr_SPEC,crate::common::RW>::from_register(self,0)
4795    }
4796    #[doc = "PRC Key Code"]
4797    #[inline(always)]
4798    pub fn prkey(
4799        self,
4800    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, Prcr_SPEC, crate::common::W> {
4801        crate::common::RegisterField::<8,0xff,1,0,u8, Prcr_SPEC,crate::common::W>::from_register(self,0)
4802    }
4803}
4804impl ::core::default::Default for Prcr {
4805    #[inline(always)]
4806    fn default() -> Prcr {
4807        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
4808    }
4809}
4810pub mod prcr {
4811
4812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4813    pub struct Prc0_SPEC;
4814    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
4815    impl Prc0 {
4816        #[doc = "Disable writes"]
4817        pub const _0: Self = Self::new(0);
4818        #[doc = "Enable writes"]
4819        pub const _1: Self = Self::new(1);
4820    }
4821    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4822    pub struct Prc1_SPEC;
4823    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
4824    impl Prc1 {
4825        #[doc = "Disable writes"]
4826        pub const _0: Self = Self::new(0);
4827        #[doc = "Enable writes"]
4828        pub const _1: Self = Self::new(1);
4829    }
4830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4831    pub struct Prc3_SPEC;
4832    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
4833    impl Prc3 {
4834        #[doc = "Disable writes"]
4835        pub const _0: Self = Self::new(0);
4836        #[doc = "Enable writes"]
4837        pub const _1: Self = Self::new(1);
4838    }
4839    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4840    pub struct Prc4_SPEC;
4841    pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
4842    impl Prc4 {
4843        #[doc = "Disable writes"]
4844        pub const _0: Self = Self::new(0);
4845        #[doc = "Enable writes"]
4846        pub const _1: Self = Self::new(1);
4847    }
4848}
4849#[doc(hidden)]
4850#[derive(Copy, Clone, Eq, PartialEq)]
4851pub struct Dpsbycr_SPEC;
4852impl crate::sealed::RegSpec for Dpsbycr_SPEC {
4853    type DataType = u8;
4854}
4855#[doc = "Deep Standby Control Register"]
4856pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
4857
4858impl Dpsbycr {
4859    #[doc = "Power-Supply Control"]
4860    #[inline(always)]
4861    pub fn deepcut(
4862        self,
4863    ) -> crate::common::RegisterField<0, 0x3, 1, 0, dpsbycr::Deepcut, Dpsbycr_SPEC, crate::common::RW>
4864    {
4865        crate::common::RegisterField::<
4866            0,
4867            0x3,
4868            1,
4869            0,
4870            dpsbycr::Deepcut,
4871            Dpsbycr_SPEC,
4872            crate::common::RW,
4873        >::from_register(self, 0)
4874    }
4875    #[doc = "I/O Port Rentention"]
4876    #[inline(always)]
4877    pub fn iokeep(
4878        self,
4879    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpsbycr::Iokeep, Dpsbycr_SPEC, crate::common::RW>
4880    {
4881        crate::common::RegisterField::<6,0x1,1,0,dpsbycr::Iokeep, Dpsbycr_SPEC,crate::common::RW>::from_register(self,0)
4882    }
4883    #[doc = "Deep Software Standby"]
4884    #[inline(always)]
4885    pub fn dpsby(
4886        self,
4887    ) -> crate::common::RegisterField<7, 0x1, 1, 0, dpsbycr::Dpsby, Dpsbycr_SPEC, crate::common::RW>
4888    {
4889        crate::common::RegisterField::<7,0x1,1,0,dpsbycr::Dpsby, Dpsbycr_SPEC,crate::common::RW>::from_register(self,0)
4890    }
4891}
4892impl ::core::default::Default for Dpsbycr {
4893    #[inline(always)]
4894    fn default() -> Dpsbycr {
4895        <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
4896    }
4897}
4898pub mod dpsbycr {
4899
4900    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4901    pub struct Deepcut_SPEC;
4902    pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
4903    impl Deepcut {
4904        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0, 1), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
4905        pub const _00: Self = Self::new(0);
4906        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
4907        pub const _01: Self = Self::new(1);
4908        #[doc = "Setting prohibited"]
4909        pub const _10: Self = Self::new(2);
4910        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
4911        pub const _11: Self = Self::new(3);
4912    }
4913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4914    pub struct Iokeep_SPEC;
4915    pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
4916    impl Iokeep {
4917        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
4918        pub const _0: Self = Self::new(0);
4919        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
4920        pub const _1: Self = Self::new(1);
4921    }
4922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4923    pub struct Dpsby_SPEC;
4924    pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
4925    impl Dpsby {
4926        #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
4927        pub const _0: Self = Self::new(0);
4928        #[doc = "Sleep mode (SBYCR.SSBY=0)  / Deep Software Standby mode (SBYCR.SSBY=1)"]
4929        pub const _1: Self = Self::new(1);
4930    }
4931}
4932#[doc(hidden)]
4933#[derive(Copy, Clone, Eq, PartialEq)]
4934pub struct Dpswcr_SPEC;
4935impl crate::sealed::RegSpec for Dpswcr_SPEC {
4936    type DataType = u8;
4937}
4938#[doc = "Deep Standby Wait Control Register"]
4939pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
4940
4941impl Dpswcr {
4942    #[doc = "Deep Software Wait Standby Time Setting Bit"]
4943    #[inline(always)]
4944    pub fn wtsts(
4945        self,
4946    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, dpswcr::Wtsts, Dpswcr_SPEC, crate::common::RW>
4947    {
4948        crate::common::RegisterField::<0,0x3f,1,0,dpswcr::Wtsts, Dpswcr_SPEC,crate::common::RW>::from_register(self,0)
4949    }
4950}
4951impl ::core::default::Default for Dpswcr {
4952    #[inline(always)]
4953    fn default() -> Dpswcr {
4954        <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
4955    }
4956}
4957pub mod dpswcr {
4958
4959    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4960    pub struct Wtsts_SPEC;
4961    pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
4962    impl Wtsts {
4963        #[doc = "Wait cycle for fast recovery"]
4964        pub const _0_X_0_E: Self = Self::new(14);
4965        #[doc = "Wait cycle for slow recovery"]
4966        pub const _0_X_19: Self = Self::new(25);
4967        #[doc = "Setting prohibited"]
4968        pub const OTHERS: Self = Self::new(0);
4969    }
4970}
4971#[doc(hidden)]
4972#[derive(Copy, Clone, Eq, PartialEq)]
4973pub struct Dpsier0_SPEC;
4974impl crate::sealed::RegSpec for Dpsier0_SPEC {
4975    type DataType = u8;
4976}
4977#[doc = "Deep Standby Interrupt Enable Register 0"]
4978pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
4979
4980impl Dpsier0 {
4981    #[doc = "IRQ0-DS Pin Enable"]
4982    #[inline(always)]
4983    pub fn dirq0e(
4984        self,
4985    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsier0::Dirq0E, Dpsier0_SPEC, crate::common::RW>
4986    {
4987        crate::common::RegisterField::<0,0x1,1,0,dpsier0::Dirq0E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
4988    }
4989    #[doc = "IRQ1-DS Pin Enable"]
4990    #[inline(always)]
4991    pub fn dirq1e(
4992        self,
4993    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsier0::Dirq1E, Dpsier0_SPEC, crate::common::RW>
4994    {
4995        crate::common::RegisterField::<1,0x1,1,0,dpsier0::Dirq1E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
4996    }
4997    #[doc = "IRQ4-DS Pin Enable"]
4998    #[inline(always)]
4999    pub fn dirq4e(
5000        self,
5001    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsier0::Dirq4E, Dpsier0_SPEC, crate::common::RW>
5002    {
5003        crate::common::RegisterField::<4,0x1,1,0,dpsier0::Dirq4E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
5004    }
5005    #[doc = "IRQ5-DS Pin Enable"]
5006    #[inline(always)]
5007    pub fn dirq5e(
5008        self,
5009    ) -> crate::common::RegisterField<5, 0x1, 1, 0, dpsier0::Dirq5E, Dpsier0_SPEC, crate::common::RW>
5010    {
5011        crate::common::RegisterField::<5,0x1,1,0,dpsier0::Dirq5E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
5012    }
5013    #[doc = "IRQ6-DS Pin Enable"]
5014    #[inline(always)]
5015    pub fn dirq6e(
5016        self,
5017    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpsier0::Dirq6E, Dpsier0_SPEC, crate::common::RW>
5018    {
5019        crate::common::RegisterField::<6,0x1,1,0,dpsier0::Dirq6E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
5020    }
5021    #[doc = "IRQ7-DS Pin Enable"]
5022    #[inline(always)]
5023    pub fn dirq7e(
5024        self,
5025    ) -> crate::common::RegisterField<7, 0x1, 1, 0, dpsier0::Dirq7E, Dpsier0_SPEC, crate::common::RW>
5026    {
5027        crate::common::RegisterField::<7,0x1,1,0,dpsier0::Dirq7E, Dpsier0_SPEC,crate::common::RW>::from_register(self,0)
5028    }
5029}
5030impl ::core::default::Default for Dpsier0 {
5031    #[inline(always)]
5032    fn default() -> Dpsier0 {
5033        <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
5034    }
5035}
5036pub mod dpsier0 {
5037
5038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5039    pub struct Dirq0E_SPEC;
5040    pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
5041    impl Dirq0E {
5042        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5043        pub const _0: Self = Self::new(0);
5044        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5045        pub const _1: Self = Self::new(1);
5046    }
5047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5048    pub struct Dirq1E_SPEC;
5049    pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
5050    impl Dirq1E {
5051        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5052        pub const _0: Self = Self::new(0);
5053        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5054        pub const _1: Self = Self::new(1);
5055    }
5056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5057    pub struct Dirq4E_SPEC;
5058    pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
5059    impl Dirq4E {
5060        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5061        pub const _0: Self = Self::new(0);
5062        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5063        pub const _1: Self = Self::new(1);
5064    }
5065    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5066    pub struct Dirq5E_SPEC;
5067    pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
5068    impl Dirq5E {
5069        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5070        pub const _0: Self = Self::new(0);
5071        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5072        pub const _1: Self = Self::new(1);
5073    }
5074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5075    pub struct Dirq6E_SPEC;
5076    pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
5077    impl Dirq6E {
5078        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5079        pub const _0: Self = Self::new(0);
5080        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5081        pub const _1: Self = Self::new(1);
5082    }
5083    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5084    pub struct Dirq7E_SPEC;
5085    pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
5086    impl Dirq7E {
5087        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5088        pub const _0: Self = Self::new(0);
5089        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5090        pub const _1: Self = Self::new(1);
5091    }
5092}
5093#[doc(hidden)]
5094#[derive(Copy, Clone, Eq, PartialEq)]
5095pub struct Dpsier1_SPEC;
5096impl crate::sealed::RegSpec for Dpsier1_SPEC {
5097    type DataType = u8;
5098}
5099#[doc = "Deep Standby Interrupt Enable Register 1"]
5100pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
5101
5102impl Dpsier1 {
5103    #[doc = "IRQ8-DS Pin Enable"]
5104    #[inline(always)]
5105    pub fn dirq8e(
5106        self,
5107    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsier1::Dirq8E, Dpsier1_SPEC, crate::common::RW>
5108    {
5109        crate::common::RegisterField::<0,0x1,1,0,dpsier1::Dirq8E, Dpsier1_SPEC,crate::common::RW>::from_register(self,0)
5110    }
5111    #[doc = "IRQ9-DS Pin Enable"]
5112    #[inline(always)]
5113    pub fn dirq9e(
5114        self,
5115    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsier1::Dirq9E, Dpsier1_SPEC, crate::common::RW>
5116    {
5117        crate::common::RegisterField::<1,0x1,1,0,dpsier1::Dirq9E, Dpsier1_SPEC,crate::common::RW>::from_register(self,0)
5118    }
5119    #[doc = "IRQ10-DS Pin Enable"]
5120    #[inline(always)]
5121    pub fn dirq10e(
5122        self,
5123    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsier1::Dirq10E, Dpsier1_SPEC, crate::common::RW>
5124    {
5125        crate::common::RegisterField::<
5126            2,
5127            0x1,
5128            1,
5129            0,
5130            dpsier1::Dirq10E,
5131            Dpsier1_SPEC,
5132            crate::common::RW,
5133        >::from_register(self, 0)
5134    }
5135    #[doc = "IRQ11-DS Pin Enable"]
5136    #[inline(always)]
5137    pub fn dirq11e(
5138        self,
5139    ) -> crate::common::RegisterField<3, 0x1, 1, 0, dpsier1::Dirq11E, Dpsier1_SPEC, crate::common::RW>
5140    {
5141        crate::common::RegisterField::<
5142            3,
5143            0x1,
5144            1,
5145            0,
5146            dpsier1::Dirq11E,
5147            Dpsier1_SPEC,
5148            crate::common::RW,
5149        >::from_register(self, 0)
5150    }
5151    #[doc = "IRQ12-DS Pin Enable"]
5152    #[inline(always)]
5153    pub fn dirq12e(
5154        self,
5155    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsier1::Dirq12E, Dpsier1_SPEC, crate::common::RW>
5156    {
5157        crate::common::RegisterField::<
5158            4,
5159            0x1,
5160            1,
5161            0,
5162            dpsier1::Dirq12E,
5163            Dpsier1_SPEC,
5164            crate::common::RW,
5165        >::from_register(self, 0)
5166    }
5167    #[doc = "IRQ14-DS Pin Enable"]
5168    #[inline(always)]
5169    pub fn dirq14e(
5170        self,
5171    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpsier1::Dirq14E, Dpsier1_SPEC, crate::common::RW>
5172    {
5173        crate::common::RegisterField::<
5174            6,
5175            0x1,
5176            1,
5177            0,
5178            dpsier1::Dirq14E,
5179            Dpsier1_SPEC,
5180            crate::common::RW,
5181        >::from_register(self, 0)
5182    }
5183}
5184impl ::core::default::Default for Dpsier1 {
5185    #[inline(always)]
5186    fn default() -> Dpsier1 {
5187        <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
5188    }
5189}
5190pub mod dpsier1 {
5191
5192    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5193    pub struct Dirq8E_SPEC;
5194    pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
5195    impl Dirq8E {
5196        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5197        pub const _0: Self = Self::new(0);
5198        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5199        pub const _1: Self = Self::new(1);
5200    }
5201    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5202    pub struct Dirq9E_SPEC;
5203    pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
5204    impl Dirq9E {
5205        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5206        pub const _0: Self = Self::new(0);
5207        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5208        pub const _1: Self = Self::new(1);
5209    }
5210    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5211    pub struct Dirq10E_SPEC;
5212    pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
5213    impl Dirq10E {
5214        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5215        pub const _0: Self = Self::new(0);
5216        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5217        pub const _1: Self = Self::new(1);
5218    }
5219    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5220    pub struct Dirq11E_SPEC;
5221    pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
5222    impl Dirq11E {
5223        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5224        pub const _0: Self = Self::new(0);
5225        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5226        pub const _1: Self = Self::new(1);
5227    }
5228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5229    pub struct Dirq12E_SPEC;
5230    pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
5231    impl Dirq12E {
5232        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5233        pub const _0: Self = Self::new(0);
5234        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5235        pub const _1: Self = Self::new(1);
5236    }
5237    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5238    pub struct Dirq14E_SPEC;
5239    pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
5240    impl Dirq14E {
5241        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5242        pub const _0: Self = Self::new(0);
5243        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5244        pub const _1: Self = Self::new(1);
5245    }
5246}
5247#[doc(hidden)]
5248#[derive(Copy, Clone, Eq, PartialEq)]
5249pub struct Dpsier2_SPEC;
5250impl crate::sealed::RegSpec for Dpsier2_SPEC {
5251    type DataType = u8;
5252}
5253#[doc = "Deep Software Standby Interrupt Enable Register 2"]
5254pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
5255
5256impl Dpsier2 {
5257    #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
5258    #[inline(always)]
5259    pub fn dlvd1ie(
5260        self,
5261    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsier2::Dlvd1Ie, Dpsier2_SPEC, crate::common::RW>
5262    {
5263        crate::common::RegisterField::<
5264            0,
5265            0x1,
5266            1,
5267            0,
5268            dpsier2::Dlvd1Ie,
5269            Dpsier2_SPEC,
5270            crate::common::RW,
5271        >::from_register(self, 0)
5272    }
5273    #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
5274    #[inline(always)]
5275    pub fn dlvd2ie(
5276        self,
5277    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsier2::Dlvd2Ie, Dpsier2_SPEC, crate::common::RW>
5278    {
5279        crate::common::RegisterField::<
5280            1,
5281            0x1,
5282            1,
5283            0,
5284            dpsier2::Dlvd2Ie,
5285            Dpsier2_SPEC,
5286            crate::common::RW,
5287        >::from_register(self, 0)
5288    }
5289    #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
5290    #[inline(always)]
5291    pub fn drtciie(
5292        self,
5293    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsier2::Drtciie, Dpsier2_SPEC, crate::common::RW>
5294    {
5295        crate::common::RegisterField::<
5296            2,
5297            0x1,
5298            1,
5299            0,
5300            dpsier2::Drtciie,
5301            Dpsier2_SPEC,
5302            crate::common::RW,
5303        >::from_register(self, 0)
5304    }
5305    #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
5306    #[inline(always)]
5307    pub fn drtcaie(
5308        self,
5309    ) -> crate::common::RegisterField<3, 0x1, 1, 0, dpsier2::Drtcaie, Dpsier2_SPEC, crate::common::RW>
5310    {
5311        crate::common::RegisterField::<
5312            3,
5313            0x1,
5314            1,
5315            0,
5316            dpsier2::Drtcaie,
5317            Dpsier2_SPEC,
5318            crate::common::RW,
5319        >::from_register(self, 0)
5320    }
5321    #[doc = "NMI Pin Enable"]
5322    #[inline(always)]
5323    pub fn dnmie(
5324        self,
5325    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsier2::Dnmie, Dpsier2_SPEC, crate::common::RW>
5326    {
5327        crate::common::RegisterField::<4,0x1,1,0,dpsier2::Dnmie, Dpsier2_SPEC,crate::common::RW>::from_register(self,0)
5328    }
5329}
5330impl ::core::default::Default for Dpsier2 {
5331    #[inline(always)]
5332    fn default() -> Dpsier2 {
5333        <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
5334    }
5335}
5336pub mod dpsier2 {
5337
5338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5339    pub struct Dlvd1Ie_SPEC;
5340    pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
5341    impl Dlvd1Ie {
5342        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5343        pub const _0: Self = Self::new(0);
5344        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5345        pub const _1: Self = Self::new(1);
5346    }
5347    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5348    pub struct Dlvd2Ie_SPEC;
5349    pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
5350    impl Dlvd2Ie {
5351        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5352        pub const _0: Self = Self::new(0);
5353        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5354        pub const _1: Self = Self::new(1);
5355    }
5356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5357    pub struct Drtciie_SPEC;
5358    pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
5359    impl Drtciie {
5360        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5361        pub const _0: Self = Self::new(0);
5362        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5363        pub const _1: Self = Self::new(1);
5364    }
5365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5366    pub struct Drtcaie_SPEC;
5367    pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
5368    impl Drtcaie {
5369        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5370        pub const _0: Self = Self::new(0);
5371        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5372        pub const _1: Self = Self::new(1);
5373    }
5374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5375    pub struct Dnmie_SPEC;
5376    pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
5377    impl Dnmie {
5378        #[doc = "Cancelling Deep Software Standby mode is disabled"]
5379        pub const _0: Self = Self::new(0);
5380        #[doc = "Cancelling Deep Software Standby mode is enabled"]
5381        pub const _1: Self = Self::new(1);
5382    }
5383}
5384#[doc(hidden)]
5385#[derive(Copy, Clone, Eq, PartialEq)]
5386pub struct Dpsier3_SPEC;
5387impl crate::sealed::RegSpec for Dpsier3_SPEC {
5388    type DataType = u8;
5389}
5390#[doc = "Deep Standby Interrupt Enable Register 3"]
5391pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
5392
5393impl Dpsier3 {
5394    #[doc = "USBFS0 Suspend/Resume Deep Standby Cancel Signal Enable"]
5395    #[inline(always)]
5396    pub fn dusbfs0ie(
5397        self,
5398    ) -> crate::common::RegisterField<
5399        0,
5400        0x1,
5401        1,
5402        0,
5403        dpsier3::Dusbfs0Ie,
5404        Dpsier3_SPEC,
5405        crate::common::RW,
5406    > {
5407        crate::common::RegisterField::<
5408            0,
5409            0x1,
5410            1,
5411            0,
5412            dpsier3::Dusbfs0Ie,
5413            Dpsier3_SPEC,
5414            crate::common::RW,
5415        >::from_register(self, 0)
5416    }
5417    #[doc = "AGT1 Underflow Deep Standby Cancel Signal Enable"]
5418    #[inline(always)]
5419    pub fn dagt1ie(
5420        self,
5421    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsier3::Dagt1Ie, Dpsier3_SPEC, crate::common::RW>
5422    {
5423        crate::common::RegisterField::<
5424            2,
5425            0x1,
5426            1,
5427            0,
5428            dpsier3::Dagt1Ie,
5429            Dpsier3_SPEC,
5430            crate::common::RW,
5431        >::from_register(self, 0)
5432    }
5433}
5434impl ::core::default::Default for Dpsier3 {
5435    #[inline(always)]
5436    fn default() -> Dpsier3 {
5437        <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
5438    }
5439}
5440pub mod dpsier3 {
5441
5442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5443    pub struct Dusbfs0Ie_SPEC;
5444    pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
5445    impl Dusbfs0Ie {
5446        #[doc = "Cancelling deep standby mode is disabled"]
5447        pub const _0: Self = Self::new(0);
5448        #[doc = "Cancelling deep standby mode is enabled"]
5449        pub const _1: Self = Self::new(1);
5450    }
5451    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5452    pub struct Dagt1Ie_SPEC;
5453    pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
5454    impl Dagt1Ie {
5455        #[doc = "Cancelling deep standby mode is disabled"]
5456        pub const _0: Self = Self::new(0);
5457        #[doc = "Cancelling deep standby mode is enabled"]
5458        pub const _1: Self = Self::new(1);
5459    }
5460}
5461#[doc(hidden)]
5462#[derive(Copy, Clone, Eq, PartialEq)]
5463pub struct Dpsifr0_SPEC;
5464impl crate::sealed::RegSpec for Dpsifr0_SPEC {
5465    type DataType = u8;
5466}
5467#[doc = "Deep Standby Interrupt Flag Register 0"]
5468pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
5469
5470impl Dpsifr0 {
5471    #[doc = "IRQ0-DS Pin Deep Standby Cancel Flag"]
5472    #[inline(always)]
5473    pub fn dirq0f(
5474        self,
5475    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsifr0::Dirq0F, Dpsifr0_SPEC, crate::common::RW>
5476    {
5477        crate::common::RegisterField::<0,0x1,1,0,dpsifr0::Dirq0F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5478    }
5479    #[doc = "IRQ1-DS Pin Deep Standby Cancel Flag"]
5480    #[inline(always)]
5481    pub fn dirq1f(
5482        self,
5483    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsifr0::Dirq1F, Dpsifr0_SPEC, crate::common::RW>
5484    {
5485        crate::common::RegisterField::<1,0x1,1,0,dpsifr0::Dirq1F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5486    }
5487    #[doc = "IRQ4-DS Pin Deep Standby Cancel Flag"]
5488    #[inline(always)]
5489    pub fn dirq4f(
5490        self,
5491    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsifr0::Dirq4F, Dpsifr0_SPEC, crate::common::RW>
5492    {
5493        crate::common::RegisterField::<4,0x1,1,0,dpsifr0::Dirq4F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5494    }
5495    #[doc = "IRQ5-DS Pin Deep Standby Cancel Flag"]
5496    #[inline(always)]
5497    pub fn dirq5f(
5498        self,
5499    ) -> crate::common::RegisterField<5, 0x1, 1, 0, dpsifr0::Dirq5F, Dpsifr0_SPEC, crate::common::RW>
5500    {
5501        crate::common::RegisterField::<5,0x1,1,0,dpsifr0::Dirq5F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5502    }
5503    #[doc = "IRQ6-DS Pin Deep Standby Cancel Flag"]
5504    #[inline(always)]
5505    pub fn dirq6f(
5506        self,
5507    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpsifr0::Dirq6F, Dpsifr0_SPEC, crate::common::RW>
5508    {
5509        crate::common::RegisterField::<6,0x1,1,0,dpsifr0::Dirq6F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5510    }
5511    #[doc = "IRQ7-DS Pin Deep Standby Cancel Flag"]
5512    #[inline(always)]
5513    pub fn dirq7f(
5514        self,
5515    ) -> crate::common::RegisterField<7, 0x1, 1, 0, dpsifr0::Dirq7F, Dpsifr0_SPEC, crate::common::RW>
5516    {
5517        crate::common::RegisterField::<7,0x1,1,0,dpsifr0::Dirq7F, Dpsifr0_SPEC,crate::common::RW>::from_register(self,0)
5518    }
5519}
5520impl ::core::default::Default for Dpsifr0 {
5521    #[inline(always)]
5522    fn default() -> Dpsifr0 {
5523        <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
5524    }
5525}
5526pub mod dpsifr0 {
5527
5528    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5529    pub struct Dirq0F_SPEC;
5530    pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
5531    impl Dirq0F {
5532        #[doc = "The cancel request is not generated"]
5533        pub const _0: Self = Self::new(0);
5534        #[doc = "The cancel request is generated"]
5535        pub const _1: Self = Self::new(1);
5536    }
5537    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5538    pub struct Dirq1F_SPEC;
5539    pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
5540    impl Dirq1F {
5541        #[doc = "The cancel request is not generated"]
5542        pub const _0: Self = Self::new(0);
5543        #[doc = "The cancel request is generated"]
5544        pub const _1: Self = Self::new(1);
5545    }
5546    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5547    pub struct Dirq4F_SPEC;
5548    pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
5549    impl Dirq4F {
5550        #[doc = "The cancel request is not generated"]
5551        pub const _0: Self = Self::new(0);
5552        #[doc = "The cancel request is generated"]
5553        pub const _1: Self = Self::new(1);
5554    }
5555    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5556    pub struct Dirq5F_SPEC;
5557    pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
5558    impl Dirq5F {
5559        #[doc = "The cancel request is not generated"]
5560        pub const _0: Self = Self::new(0);
5561        #[doc = "The cancel request is generated"]
5562        pub const _1: Self = Self::new(1);
5563    }
5564    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5565    pub struct Dirq6F_SPEC;
5566    pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
5567    impl Dirq6F {
5568        #[doc = "The cancel request is not generated"]
5569        pub const _0: Self = Self::new(0);
5570        #[doc = "The cancel request is generated"]
5571        pub const _1: Self = Self::new(1);
5572    }
5573    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5574    pub struct Dirq7F_SPEC;
5575    pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
5576    impl Dirq7F {
5577        #[doc = "The cancel request is not generated"]
5578        pub const _0: Self = Self::new(0);
5579        #[doc = "The cancel request is generated"]
5580        pub const _1: Self = Self::new(1);
5581    }
5582}
5583#[doc(hidden)]
5584#[derive(Copy, Clone, Eq, PartialEq)]
5585pub struct Dpsifr1_SPEC;
5586impl crate::sealed::RegSpec for Dpsifr1_SPEC {
5587    type DataType = u8;
5588}
5589#[doc = "Deep Standby Interrupt Flag Register 1"]
5590pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
5591
5592impl Dpsifr1 {
5593    #[doc = "IRQ8-DS Pin Deep Standby Cancel Flag"]
5594    #[inline(always)]
5595    pub fn dirq8f(
5596        self,
5597    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsifr1::Dirq8F, Dpsifr1_SPEC, crate::common::RW>
5598    {
5599        crate::common::RegisterField::<0,0x1,1,0,dpsifr1::Dirq8F, Dpsifr1_SPEC,crate::common::RW>::from_register(self,0)
5600    }
5601    #[doc = "IRQ9-DS Pin Deep Standby Cancel Flag"]
5602    #[inline(always)]
5603    pub fn dirq9f(
5604        self,
5605    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsifr1::Dirq9F, Dpsifr1_SPEC, crate::common::RW>
5606    {
5607        crate::common::RegisterField::<1,0x1,1,0,dpsifr1::Dirq9F, Dpsifr1_SPEC,crate::common::RW>::from_register(self,0)
5608    }
5609    #[doc = "IRQ10-DS Pin Deep Standby Cancel Flag"]
5610    #[inline(always)]
5611    pub fn dirq10f(
5612        self,
5613    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsifr1::Dirq10F, Dpsifr1_SPEC, crate::common::RW>
5614    {
5615        crate::common::RegisterField::<
5616            2,
5617            0x1,
5618            1,
5619            0,
5620            dpsifr1::Dirq10F,
5621            Dpsifr1_SPEC,
5622            crate::common::RW,
5623        >::from_register(self, 0)
5624    }
5625    #[doc = "IRQ11-DS Pin Deep Standby Cancel Flag"]
5626    #[inline(always)]
5627    pub fn dirq11f(
5628        self,
5629    ) -> crate::common::RegisterField<3, 0x1, 1, 0, dpsifr1::Dirq11F, Dpsifr1_SPEC, crate::common::RW>
5630    {
5631        crate::common::RegisterField::<
5632            3,
5633            0x1,
5634            1,
5635            0,
5636            dpsifr1::Dirq11F,
5637            Dpsifr1_SPEC,
5638            crate::common::RW,
5639        >::from_register(self, 0)
5640    }
5641    #[doc = "IRQ12-DS Pin Deep Standby Cancel Flag"]
5642    #[inline(always)]
5643    pub fn dirq12f(
5644        self,
5645    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsifr1::Dirq12F, Dpsifr1_SPEC, crate::common::RW>
5646    {
5647        crate::common::RegisterField::<
5648            4,
5649            0x1,
5650            1,
5651            0,
5652            dpsifr1::Dirq12F,
5653            Dpsifr1_SPEC,
5654            crate::common::RW,
5655        >::from_register(self, 0)
5656    }
5657    #[doc = "IRQ14-DS Pin Deep Standby Cancel Flag"]
5658    #[inline(always)]
5659    pub fn dirq14f(
5660        self,
5661    ) -> crate::common::RegisterField<6, 0x1, 1, 0, dpsifr1::Dirq14F, Dpsifr1_SPEC, crate::common::RW>
5662    {
5663        crate::common::RegisterField::<
5664            6,
5665            0x1,
5666            1,
5667            0,
5668            dpsifr1::Dirq14F,
5669            Dpsifr1_SPEC,
5670            crate::common::RW,
5671        >::from_register(self, 0)
5672    }
5673}
5674impl ::core::default::Default for Dpsifr1 {
5675    #[inline(always)]
5676    fn default() -> Dpsifr1 {
5677        <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
5678    }
5679}
5680pub mod dpsifr1 {
5681
5682    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5683    pub struct Dirq8F_SPEC;
5684    pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
5685    impl Dirq8F {
5686        #[doc = "The cancel request is not generated"]
5687        pub const _0: Self = Self::new(0);
5688        #[doc = "The cancel request is generated"]
5689        pub const _1: Self = Self::new(1);
5690    }
5691    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5692    pub struct Dirq9F_SPEC;
5693    pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
5694    impl Dirq9F {
5695        #[doc = "The cancel request is not generated"]
5696        pub const _0: Self = Self::new(0);
5697        #[doc = "The cancel request is generated"]
5698        pub const _1: Self = Self::new(1);
5699    }
5700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5701    pub struct Dirq10F_SPEC;
5702    pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
5703    impl Dirq10F {
5704        #[doc = "The cancel request is not generated"]
5705        pub const _0: Self = Self::new(0);
5706        #[doc = "The cancel request is generated"]
5707        pub const _1: Self = Self::new(1);
5708    }
5709    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5710    pub struct Dirq11F_SPEC;
5711    pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
5712    impl Dirq11F {
5713        #[doc = "The cancel request is not generated"]
5714        pub const _0: Self = Self::new(0);
5715        #[doc = "The cancel request is generated"]
5716        pub const _1: Self = Self::new(1);
5717    }
5718    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5719    pub struct Dirq12F_SPEC;
5720    pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
5721    impl Dirq12F {
5722        #[doc = "The cancel request is not generated"]
5723        pub const _0: Self = Self::new(0);
5724        #[doc = "The cancel request is generated"]
5725        pub const _1: Self = Self::new(1);
5726    }
5727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5728    pub struct Dirq14F_SPEC;
5729    pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
5730    impl Dirq14F {
5731        #[doc = "The cancel request is not generated"]
5732        pub const _0: Self = Self::new(0);
5733        #[doc = "The cancel request is generated"]
5734        pub const _1: Self = Self::new(1);
5735    }
5736}
5737#[doc(hidden)]
5738#[derive(Copy, Clone, Eq, PartialEq)]
5739pub struct Dpsifr2_SPEC;
5740impl crate::sealed::RegSpec for Dpsifr2_SPEC {
5741    type DataType = u8;
5742}
5743#[doc = "Deep Software Standby Interrupt Flag Register 2"]
5744pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
5745
5746impl Dpsifr2 {
5747    #[doc = "LVD1 Deep Software Standby Cancel Flag"]
5748    #[inline(always)]
5749    pub fn dlvd1if(
5750        self,
5751    ) -> crate::common::RegisterField<0, 0x1, 1, 0, dpsifr2::Dlvd1If, Dpsifr2_SPEC, crate::common::RW>
5752    {
5753        crate::common::RegisterField::<
5754            0,
5755            0x1,
5756            1,
5757            0,
5758            dpsifr2::Dlvd1If,
5759            Dpsifr2_SPEC,
5760            crate::common::RW,
5761        >::from_register(self, 0)
5762    }
5763    #[doc = "LVD2 Deep Software Standby Cancel Flag"]
5764    #[inline(always)]
5765    pub fn dlvd2if(
5766        self,
5767    ) -> crate::common::RegisterField<1, 0x1, 1, 0, dpsifr2::Dlvd2If, Dpsifr2_SPEC, crate::common::RW>
5768    {
5769        crate::common::RegisterField::<
5770            1,
5771            0x1,
5772            1,
5773            0,
5774            dpsifr2::Dlvd2If,
5775            Dpsifr2_SPEC,
5776            crate::common::RW,
5777        >::from_register(self, 0)
5778    }
5779    #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
5780    #[inline(always)]
5781    pub fn drtciif(
5782        self,
5783    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsifr2::Drtciif, Dpsifr2_SPEC, crate::common::RW>
5784    {
5785        crate::common::RegisterField::<
5786            2,
5787            0x1,
5788            1,
5789            0,
5790            dpsifr2::Drtciif,
5791            Dpsifr2_SPEC,
5792            crate::common::RW,
5793        >::from_register(self, 0)
5794    }
5795    #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
5796    #[inline(always)]
5797    pub fn drtcaif(
5798        self,
5799    ) -> crate::common::RegisterField<3, 0x1, 1, 0, dpsifr2::Drtcaif, Dpsifr2_SPEC, crate::common::RW>
5800    {
5801        crate::common::RegisterField::<
5802            3,
5803            0x1,
5804            1,
5805            0,
5806            dpsifr2::Drtcaif,
5807            Dpsifr2_SPEC,
5808            crate::common::RW,
5809        >::from_register(self, 0)
5810    }
5811    #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
5812    #[inline(always)]
5813    pub fn dnmif(
5814        self,
5815    ) -> crate::common::RegisterField<4, 0x1, 1, 0, dpsifr2::Dnmif, Dpsifr2_SPEC, crate::common::RW>
5816    {
5817        crate::common::RegisterField::<4,0x1,1,0,dpsifr2::Dnmif, Dpsifr2_SPEC,crate::common::RW>::from_register(self,0)
5818    }
5819}
5820impl ::core::default::Default for Dpsifr2 {
5821    #[inline(always)]
5822    fn default() -> Dpsifr2 {
5823        <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
5824    }
5825}
5826pub mod dpsifr2 {
5827
5828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5829    pub struct Dlvd1If_SPEC;
5830    pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
5831    impl Dlvd1If {
5832        #[doc = "The cancel request is not generated"]
5833        pub const _0: Self = Self::new(0);
5834        #[doc = "The cancel request is generated"]
5835        pub const _1: Self = Self::new(1);
5836    }
5837    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5838    pub struct Dlvd2If_SPEC;
5839    pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
5840    impl Dlvd2If {
5841        #[doc = "The cancel request is not generated"]
5842        pub const _0: Self = Self::new(0);
5843        #[doc = "The cancel request is generated"]
5844        pub const _1: Self = Self::new(1);
5845    }
5846    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5847    pub struct Drtciif_SPEC;
5848    pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
5849    impl Drtciif {
5850        #[doc = "The cancel request is not generated"]
5851        pub const _0: Self = Self::new(0);
5852        #[doc = "The cancel request is generated"]
5853        pub const _1: Self = Self::new(1);
5854    }
5855    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5856    pub struct Drtcaif_SPEC;
5857    pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
5858    impl Drtcaif {
5859        #[doc = "The cancel request is not generated"]
5860        pub const _0: Self = Self::new(0);
5861        #[doc = "The cancel request is generated"]
5862        pub const _1: Self = Self::new(1);
5863    }
5864    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5865    pub struct Dnmif_SPEC;
5866    pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
5867    impl Dnmif {
5868        #[doc = "The cancel request is not generated"]
5869        pub const _0: Self = Self::new(0);
5870        #[doc = "The cancel request is generated"]
5871        pub const _1: Self = Self::new(1);
5872    }
5873}
5874#[doc(hidden)]
5875#[derive(Copy, Clone, Eq, PartialEq)]
5876pub struct Dpsifr3_SPEC;
5877impl crate::sealed::RegSpec for Dpsifr3_SPEC {
5878    type DataType = u8;
5879}
5880#[doc = "Deep Standby Interrupt Flag Register 3"]
5881pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
5882
5883impl Dpsifr3 {
5884    #[doc = "USBFS0 Suspend/Resume Deep Standby Cancel Flag"]
5885    #[inline(always)]
5886    pub fn dusbfs0if(
5887        self,
5888    ) -> crate::common::RegisterField<
5889        0,
5890        0x1,
5891        1,
5892        0,
5893        dpsifr3::Dusbfs0If,
5894        Dpsifr3_SPEC,
5895        crate::common::RW,
5896    > {
5897        crate::common::RegisterField::<
5898            0,
5899            0x1,
5900            1,
5901            0,
5902            dpsifr3::Dusbfs0If,
5903            Dpsifr3_SPEC,
5904            crate::common::RW,
5905        >::from_register(self, 0)
5906    }
5907    #[doc = "AGT1 Underflow Deep Standby Cancel Flag"]
5908    #[inline(always)]
5909    pub fn dagt1if(
5910        self,
5911    ) -> crate::common::RegisterField<2, 0x1, 1, 0, dpsifr3::Dagt1If, Dpsifr3_SPEC, crate::common::RW>
5912    {
5913        crate::common::RegisterField::<
5914            2,
5915            0x1,
5916            1,
5917            0,
5918            dpsifr3::Dagt1If,
5919            Dpsifr3_SPEC,
5920            crate::common::RW,
5921        >::from_register(self, 0)
5922    }
5923}
5924impl ::core::default::Default for Dpsifr3 {
5925    #[inline(always)]
5926    fn default() -> Dpsifr3 {
5927        <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
5928    }
5929}
5930pub mod dpsifr3 {
5931
5932    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5933    pub struct Dusbfs0If_SPEC;
5934    pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
5935    impl Dusbfs0If {
5936        #[doc = "The cancel request is not generated."]
5937        pub const _0: Self = Self::new(0);
5938        #[doc = "The cancel request is generated."]
5939        pub const _1: Self = Self::new(1);
5940    }
5941    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5942    pub struct Dagt1If_SPEC;
5943    pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
5944    impl Dagt1If {
5945        #[doc = "The cancel request is not generated."]
5946        pub const _0: Self = Self::new(0);
5947        #[doc = "The cancel request is generated."]
5948        pub const _1: Self = Self::new(1);
5949    }
5950}
5951#[doc(hidden)]
5952#[derive(Copy, Clone, Eq, PartialEq)]
5953pub struct Dpsiegr0_SPEC;
5954impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
5955    type DataType = u8;
5956}
5957#[doc = "Deep Standby Interrupt Edge Register 0"]
5958pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
5959
5960impl Dpsiegr0 {
5961    #[doc = "IRQ0-DS Pin Edge Select"]
5962    #[inline(always)]
5963    pub fn dirq0eg(
5964        self,
5965    ) -> crate::common::RegisterField<
5966        0,
5967        0x1,
5968        1,
5969        0,
5970        dpsiegr0::Dirq0Eg,
5971        Dpsiegr0_SPEC,
5972        crate::common::RW,
5973    > {
5974        crate::common::RegisterField::<
5975            0,
5976            0x1,
5977            1,
5978            0,
5979            dpsiegr0::Dirq0Eg,
5980            Dpsiegr0_SPEC,
5981            crate::common::RW,
5982        >::from_register(self, 0)
5983    }
5984    #[doc = "IRQ1-DS Pin Edge Select"]
5985    #[inline(always)]
5986    pub fn dirq1eg(
5987        self,
5988    ) -> crate::common::RegisterField<
5989        1,
5990        0x1,
5991        1,
5992        0,
5993        dpsiegr0::Dirq1Eg,
5994        Dpsiegr0_SPEC,
5995        crate::common::RW,
5996    > {
5997        crate::common::RegisterField::<
5998            1,
5999            0x1,
6000            1,
6001            0,
6002            dpsiegr0::Dirq1Eg,
6003            Dpsiegr0_SPEC,
6004            crate::common::RW,
6005        >::from_register(self, 0)
6006    }
6007    #[doc = "IRQ4-DS Pin Edge Select"]
6008    #[inline(always)]
6009    pub fn dirq4eg(
6010        self,
6011    ) -> crate::common::RegisterField<
6012        4,
6013        0x1,
6014        1,
6015        0,
6016        dpsiegr0::Dirq4Eg,
6017        Dpsiegr0_SPEC,
6018        crate::common::RW,
6019    > {
6020        crate::common::RegisterField::<
6021            4,
6022            0x1,
6023            1,
6024            0,
6025            dpsiegr0::Dirq4Eg,
6026            Dpsiegr0_SPEC,
6027            crate::common::RW,
6028        >::from_register(self, 0)
6029    }
6030    #[doc = "IRQ5-DS Pin Edge Select"]
6031    #[inline(always)]
6032    pub fn dirq5eg(
6033        self,
6034    ) -> crate::common::RegisterField<
6035        5,
6036        0x1,
6037        1,
6038        0,
6039        dpsiegr0::Dirq5Eg,
6040        Dpsiegr0_SPEC,
6041        crate::common::RW,
6042    > {
6043        crate::common::RegisterField::<
6044            5,
6045            0x1,
6046            1,
6047            0,
6048            dpsiegr0::Dirq5Eg,
6049            Dpsiegr0_SPEC,
6050            crate::common::RW,
6051        >::from_register(self, 0)
6052    }
6053    #[doc = "IRQ6-DS Pin Edge Select"]
6054    #[inline(always)]
6055    pub fn dirq6eg(
6056        self,
6057    ) -> crate::common::RegisterField<
6058        6,
6059        0x1,
6060        1,
6061        0,
6062        dpsiegr0::Dirq6Eg,
6063        Dpsiegr0_SPEC,
6064        crate::common::RW,
6065    > {
6066        crate::common::RegisterField::<
6067            6,
6068            0x1,
6069            1,
6070            0,
6071            dpsiegr0::Dirq6Eg,
6072            Dpsiegr0_SPEC,
6073            crate::common::RW,
6074        >::from_register(self, 0)
6075    }
6076    #[doc = "IRQ7-DS Pin Edge Select"]
6077    #[inline(always)]
6078    pub fn dirq7eg(
6079        self,
6080    ) -> crate::common::RegisterField<
6081        7,
6082        0x1,
6083        1,
6084        0,
6085        dpsiegr0::Dirq7Eg,
6086        Dpsiegr0_SPEC,
6087        crate::common::RW,
6088    > {
6089        crate::common::RegisterField::<
6090            7,
6091            0x1,
6092            1,
6093            0,
6094            dpsiegr0::Dirq7Eg,
6095            Dpsiegr0_SPEC,
6096            crate::common::RW,
6097        >::from_register(self, 0)
6098    }
6099}
6100impl ::core::default::Default for Dpsiegr0 {
6101    #[inline(always)]
6102    fn default() -> Dpsiegr0 {
6103        <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
6104    }
6105}
6106pub mod dpsiegr0 {
6107
6108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6109    pub struct Dirq0Eg_SPEC;
6110    pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
6111    impl Dirq0Eg {
6112        #[doc = "A cancel request is generated at a falling edge"]
6113        pub const _0: Self = Self::new(0);
6114        #[doc = "A cancel request is generated at a rising edge"]
6115        pub const _1: Self = Self::new(1);
6116    }
6117    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6118    pub struct Dirq1Eg_SPEC;
6119    pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
6120    impl Dirq1Eg {
6121        #[doc = "A cancel request is generated at a falling edge"]
6122        pub const _0: Self = Self::new(0);
6123        #[doc = "A cancel request is generated at a rising edge"]
6124        pub const _1: Self = Self::new(1);
6125    }
6126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6127    pub struct Dirq4Eg_SPEC;
6128    pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
6129    impl Dirq4Eg {
6130        #[doc = "A cancel request is generated at a falling edge"]
6131        pub const _0: Self = Self::new(0);
6132        #[doc = "A cancel request is generated at a rising edge"]
6133        pub const _1: Self = Self::new(1);
6134    }
6135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6136    pub struct Dirq5Eg_SPEC;
6137    pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
6138    impl Dirq5Eg {
6139        #[doc = "A cancel request is generated at a falling edge"]
6140        pub const _0: Self = Self::new(0);
6141        #[doc = "A cancel request is generated at a rising edge"]
6142        pub const _1: Self = Self::new(1);
6143    }
6144    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6145    pub struct Dirq6Eg_SPEC;
6146    pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
6147    impl Dirq6Eg {
6148        #[doc = "A cancel request is generated at a falling edge"]
6149        pub const _0: Self = Self::new(0);
6150        #[doc = "A cancel request is generated at a rising edge"]
6151        pub const _1: Self = Self::new(1);
6152    }
6153    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6154    pub struct Dirq7Eg_SPEC;
6155    pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
6156    impl Dirq7Eg {
6157        #[doc = "A cancel request is generated at a falling edge"]
6158        pub const _0: Self = Self::new(0);
6159        #[doc = "A cancel request is generated at a rising edge"]
6160        pub const _1: Self = Self::new(1);
6161    }
6162}
6163#[doc(hidden)]
6164#[derive(Copy, Clone, Eq, PartialEq)]
6165pub struct Dpsiegr1_SPEC;
6166impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
6167    type DataType = u8;
6168}
6169#[doc = "Deep Standby Interrupt Edge Register 1"]
6170pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
6171
6172impl Dpsiegr1 {
6173    #[doc = "IRQ8-DS Pin Edge Select"]
6174    #[inline(always)]
6175    pub fn dirq8eg(
6176        self,
6177    ) -> crate::common::RegisterField<
6178        0,
6179        0x1,
6180        1,
6181        0,
6182        dpsiegr1::Dirq8Eg,
6183        Dpsiegr1_SPEC,
6184        crate::common::RW,
6185    > {
6186        crate::common::RegisterField::<
6187            0,
6188            0x1,
6189            1,
6190            0,
6191            dpsiegr1::Dirq8Eg,
6192            Dpsiegr1_SPEC,
6193            crate::common::RW,
6194        >::from_register(self, 0)
6195    }
6196    #[doc = "IRQ9-DS Pin Edge Select"]
6197    #[inline(always)]
6198    pub fn dirq9eg(
6199        self,
6200    ) -> crate::common::RegisterField<
6201        1,
6202        0x1,
6203        1,
6204        0,
6205        dpsiegr1::Dirq9Eg,
6206        Dpsiegr1_SPEC,
6207        crate::common::RW,
6208    > {
6209        crate::common::RegisterField::<
6210            1,
6211            0x1,
6212            1,
6213            0,
6214            dpsiegr1::Dirq9Eg,
6215            Dpsiegr1_SPEC,
6216            crate::common::RW,
6217        >::from_register(self, 0)
6218    }
6219    #[doc = "IRQ10-DS Pin Edge Select"]
6220    #[inline(always)]
6221    pub fn dirq10eg(
6222        self,
6223    ) -> crate::common::RegisterField<
6224        2,
6225        0x1,
6226        1,
6227        0,
6228        dpsiegr1::Dirq10Eg,
6229        Dpsiegr1_SPEC,
6230        crate::common::RW,
6231    > {
6232        crate::common::RegisterField::<
6233            2,
6234            0x1,
6235            1,
6236            0,
6237            dpsiegr1::Dirq10Eg,
6238            Dpsiegr1_SPEC,
6239            crate::common::RW,
6240        >::from_register(self, 0)
6241    }
6242    #[doc = "IRQ11-DS Pin Edge Select"]
6243    #[inline(always)]
6244    pub fn dirq11eg(
6245        self,
6246    ) -> crate::common::RegisterField<
6247        3,
6248        0x1,
6249        1,
6250        0,
6251        dpsiegr1::Dirq11Eg,
6252        Dpsiegr1_SPEC,
6253        crate::common::RW,
6254    > {
6255        crate::common::RegisterField::<
6256            3,
6257            0x1,
6258            1,
6259            0,
6260            dpsiegr1::Dirq11Eg,
6261            Dpsiegr1_SPEC,
6262            crate::common::RW,
6263        >::from_register(self, 0)
6264    }
6265    #[doc = "IRQ12-DS Pin Edge Select"]
6266    #[inline(always)]
6267    pub fn dirq12eg(
6268        self,
6269    ) -> crate::common::RegisterField<
6270        4,
6271        0x1,
6272        1,
6273        0,
6274        dpsiegr1::Dirq12Eg,
6275        Dpsiegr1_SPEC,
6276        crate::common::RW,
6277    > {
6278        crate::common::RegisterField::<
6279            4,
6280            0x1,
6281            1,
6282            0,
6283            dpsiegr1::Dirq12Eg,
6284            Dpsiegr1_SPEC,
6285            crate::common::RW,
6286        >::from_register(self, 0)
6287    }
6288    #[doc = "IRQ14-DS Pin Edge Select"]
6289    #[inline(always)]
6290    pub fn dirq14eg(
6291        self,
6292    ) -> crate::common::RegisterField<
6293        6,
6294        0x1,
6295        1,
6296        0,
6297        dpsiegr1::Dirq14Eg,
6298        Dpsiegr1_SPEC,
6299        crate::common::RW,
6300    > {
6301        crate::common::RegisterField::<
6302            6,
6303            0x1,
6304            1,
6305            0,
6306            dpsiegr1::Dirq14Eg,
6307            Dpsiegr1_SPEC,
6308            crate::common::RW,
6309        >::from_register(self, 0)
6310    }
6311}
6312impl ::core::default::Default for Dpsiegr1 {
6313    #[inline(always)]
6314    fn default() -> Dpsiegr1 {
6315        <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
6316    }
6317}
6318pub mod dpsiegr1 {
6319
6320    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6321    pub struct Dirq8Eg_SPEC;
6322    pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
6323    impl Dirq8Eg {
6324        #[doc = "A cancel request is generated at a falling edge."]
6325        pub const _0: Self = Self::new(0);
6326        #[doc = "A cancel request is generated at a rising edge."]
6327        pub const _1: Self = Self::new(1);
6328    }
6329    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6330    pub struct Dirq9Eg_SPEC;
6331    pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
6332    impl Dirq9Eg {
6333        #[doc = "A cancel request is generated at a falling edge."]
6334        pub const _0: Self = Self::new(0);
6335        #[doc = "A cancel request is generated at a rising edge."]
6336        pub const _1: Self = Self::new(1);
6337    }
6338    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6339    pub struct Dirq10Eg_SPEC;
6340    pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
6341    impl Dirq10Eg {
6342        #[doc = "A cancel request is generated at a falling edge."]
6343        pub const _0: Self = Self::new(0);
6344        #[doc = "A cancel request is generated at a rising edge"]
6345        pub const _1: Self = Self::new(1);
6346    }
6347    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6348    pub struct Dirq11Eg_SPEC;
6349    pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
6350    impl Dirq11Eg {
6351        #[doc = "A cancel request is generated at a falling edge."]
6352        pub const _0: Self = Self::new(0);
6353        #[doc = "A cancel request is generated at a rising edge."]
6354        pub const _1: Self = Self::new(1);
6355    }
6356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6357    pub struct Dirq12Eg_SPEC;
6358    pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
6359    impl Dirq12Eg {
6360        #[doc = "A cancel request is generated at a falling edge."]
6361        pub const _0: Self = Self::new(0);
6362        #[doc = "A cancel request is generated at a rising edge."]
6363        pub const _1: Self = Self::new(1);
6364    }
6365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6366    pub struct Dirq14Eg_SPEC;
6367    pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
6368    impl Dirq14Eg {
6369        #[doc = "A cancel request is generated at a falling edge."]
6370        pub const _0: Self = Self::new(0);
6371        #[doc = "A cancel request is generated at a rising edge."]
6372        pub const _1: Self = Self::new(1);
6373    }
6374}
6375#[doc(hidden)]
6376#[derive(Copy, Clone, Eq, PartialEq)]
6377pub struct Dpsiegr2_SPEC;
6378impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
6379    type DataType = u8;
6380}
6381#[doc = "Deep Software Standby Interrupt Edge Register 2"]
6382pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
6383
6384impl Dpsiegr2 {
6385    #[doc = "LVD1 Edge Select"]
6386    #[inline(always)]
6387    pub fn dlvd1eg(
6388        self,
6389    ) -> crate::common::RegisterField<
6390        0,
6391        0x1,
6392        1,
6393        0,
6394        dpsiegr2::Dlvd1Eg,
6395        Dpsiegr2_SPEC,
6396        crate::common::RW,
6397    > {
6398        crate::common::RegisterField::<
6399            0,
6400            0x1,
6401            1,
6402            0,
6403            dpsiegr2::Dlvd1Eg,
6404            Dpsiegr2_SPEC,
6405            crate::common::RW,
6406        >::from_register(self, 0)
6407    }
6408    #[doc = "LVD2 Edge Select"]
6409    #[inline(always)]
6410    pub fn dlvd2eg(
6411        self,
6412    ) -> crate::common::RegisterField<
6413        1,
6414        0x1,
6415        1,
6416        0,
6417        dpsiegr2::Dlvd2Eg,
6418        Dpsiegr2_SPEC,
6419        crate::common::RW,
6420    > {
6421        crate::common::RegisterField::<
6422            1,
6423            0x1,
6424            1,
6425            0,
6426            dpsiegr2::Dlvd2Eg,
6427            Dpsiegr2_SPEC,
6428            crate::common::RW,
6429        >::from_register(self, 0)
6430    }
6431    #[doc = "NMI Pin Edge Select"]
6432    #[inline(always)]
6433    pub fn dnmieg(
6434        self,
6435    ) -> crate::common::RegisterField<
6436        4,
6437        0x1,
6438        1,
6439        0,
6440        dpsiegr2::Dnmieg,
6441        Dpsiegr2_SPEC,
6442        crate::common::RW,
6443    > {
6444        crate::common::RegisterField::<
6445            4,
6446            0x1,
6447            1,
6448            0,
6449            dpsiegr2::Dnmieg,
6450            Dpsiegr2_SPEC,
6451            crate::common::RW,
6452        >::from_register(self, 0)
6453    }
6454}
6455impl ::core::default::Default for Dpsiegr2 {
6456    #[inline(always)]
6457    fn default() -> Dpsiegr2 {
6458        <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
6459    }
6460}
6461pub mod dpsiegr2 {
6462
6463    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6464    pub struct Dlvd1Eg_SPEC;
6465    pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
6466    impl Dlvd1Eg {
6467        #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
6468        pub const _0: Self = Self::new(0);
6469        #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
6470        pub const _1: Self = Self::new(1);
6471    }
6472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6473    pub struct Dlvd2Eg_SPEC;
6474    pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
6475    impl Dlvd2Eg {
6476        #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
6477        pub const _0: Self = Self::new(0);
6478        #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
6479        pub const _1: Self = Self::new(1);
6480    }
6481    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6482    pub struct Dnmieg_SPEC;
6483    pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
6484    impl Dnmieg {
6485        #[doc = "A cancel request is generated at a falling edge"]
6486        pub const _0: Self = Self::new(0);
6487        #[doc = "A cancel request is generated at a rising edge"]
6488        pub const _1: Self = Self::new(1);
6489    }
6490}
6491#[doc(hidden)]
6492#[derive(Copy, Clone, Eq, PartialEq)]
6493pub struct Syocdcr_SPEC;
6494impl crate::sealed::RegSpec for Syocdcr_SPEC {
6495    type DataType = u8;
6496}
6497#[doc = "System Control OCD Control Register"]
6498pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
6499
6500impl Syocdcr {
6501    #[doc = "Deep Software Standby OCD flag"]
6502    #[inline(always)]
6503    pub fn docdf(
6504        self,
6505    ) -> crate::common::RegisterField<0, 0x1, 1, 0, syocdcr::Docdf, Syocdcr_SPEC, crate::common::RW>
6506    {
6507        crate::common::RegisterField::<0,0x1,1,0,syocdcr::Docdf, Syocdcr_SPEC,crate::common::RW>::from_register(self,0)
6508    }
6509    #[doc = "Debugger Enable bit"]
6510    #[inline(always)]
6511    pub fn dbgen(
6512        self,
6513    ) -> crate::common::RegisterField<7, 0x1, 1, 0, syocdcr::Dbgen, Syocdcr_SPEC, crate::common::RW>
6514    {
6515        crate::common::RegisterField::<7,0x1,1,0,syocdcr::Dbgen, Syocdcr_SPEC,crate::common::RW>::from_register(self,0)
6516    }
6517}
6518impl ::core::default::Default for Syocdcr {
6519    #[inline(always)]
6520    fn default() -> Syocdcr {
6521        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
6522    }
6523}
6524pub mod syocdcr {
6525
6526    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6527    pub struct Docdf_SPEC;
6528    pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
6529    impl Docdf {
6530        #[doc = "DBIRQ is not generated"]
6531        pub const _0: Self = Self::new(0);
6532        #[doc = "DBIRQ is generated"]
6533        pub const _1: Self = Self::new(1);
6534    }
6535    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6536    pub struct Dbgen_SPEC;
6537    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
6538    impl Dbgen {
6539        #[doc = "On-chip debugger is disabled"]
6540        pub const _0: Self = Self::new(0);
6541        #[doc = "On-chip debugger is enabled"]
6542        pub const _1: Self = Self::new(1);
6543    }
6544}
6545#[doc(hidden)]
6546#[derive(Copy, Clone, Eq, PartialEq)]
6547pub struct Rstsr0_SPEC;
6548impl crate::sealed::RegSpec for Rstsr0_SPEC {
6549    type DataType = u8;
6550}
6551#[doc = "Reset Status Register 0"]
6552pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
6553
6554impl Rstsr0 {
6555    #[doc = "Power-On Reset Detect Flag"]
6556    #[inline(always)]
6557    pub fn porf(
6558        self,
6559    ) -> crate::common::RegisterField<0, 0x1, 1, 0, rstsr0::Porf, Rstsr0_SPEC, crate::common::RW>
6560    {
6561        crate::common::RegisterField::<0,0x1,1,0,rstsr0::Porf, Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
6562    }
6563    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
6564    #[inline(always)]
6565    pub fn lvd0rf(
6566        self,
6567    ) -> crate::common::RegisterField<1, 0x1, 1, 0, rstsr0::Lvd0Rf, Rstsr0_SPEC, crate::common::RW>
6568    {
6569        crate::common::RegisterField::<1,0x1,1,0,rstsr0::Lvd0Rf, Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
6570    }
6571    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
6572    #[inline(always)]
6573    pub fn lvd1rf(
6574        self,
6575    ) -> crate::common::RegisterField<2, 0x1, 1, 0, rstsr0::Lvd1Rf, Rstsr0_SPEC, crate::common::RW>
6576    {
6577        crate::common::RegisterField::<2,0x1,1,0,rstsr0::Lvd1Rf, Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
6578    }
6579    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
6580    #[inline(always)]
6581    pub fn lvd2rf(
6582        self,
6583    ) -> crate::common::RegisterField<3, 0x1, 1, 0, rstsr0::Lvd2Rf, Rstsr0_SPEC, crate::common::RW>
6584    {
6585        crate::common::RegisterField::<3,0x1,1,0,rstsr0::Lvd2Rf, Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
6586    }
6587    #[doc = "Deep Software Standby Reset Detect Flag"]
6588    #[inline(always)]
6589    pub fn dpsrstf(
6590        self,
6591    ) -> crate::common::RegisterField<7, 0x1, 1, 0, rstsr0::Dpsrstf, Rstsr0_SPEC, crate::common::RW>
6592    {
6593        crate::common::RegisterField::<7,0x1,1,0,rstsr0::Dpsrstf, Rstsr0_SPEC,crate::common::RW>::from_register(self,0)
6594    }
6595}
6596impl ::core::default::Default for Rstsr0 {
6597    #[inline(always)]
6598    fn default() -> Rstsr0 {
6599        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
6600    }
6601}
6602pub mod rstsr0 {
6603
6604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6605    pub struct Porf_SPEC;
6606    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
6607    impl Porf {
6608        #[doc = "Power-on reset not detected"]
6609        pub const _0: Self = Self::new(0);
6610        #[doc = "Power-on reset detected"]
6611        pub const _1: Self = Self::new(1);
6612    }
6613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6614    pub struct Lvd0Rf_SPEC;
6615    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
6616    impl Lvd0Rf {
6617        #[doc = "Voltage monitor 0 reset not detected"]
6618        pub const _0: Self = Self::new(0);
6619        #[doc = "Voltage monitor 0 reset detected"]
6620        pub const _1: Self = Self::new(1);
6621    }
6622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6623    pub struct Lvd1Rf_SPEC;
6624    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
6625    impl Lvd1Rf {
6626        #[doc = "Voltage monitor 1 reset not detected"]
6627        pub const _0: Self = Self::new(0);
6628        #[doc = "Voltage monitor 1 reset detected"]
6629        pub const _1: Self = Self::new(1);
6630    }
6631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6632    pub struct Lvd2Rf_SPEC;
6633    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
6634    impl Lvd2Rf {
6635        #[doc = "Voltage monitor 2 reset not detected"]
6636        pub const _0: Self = Self::new(0);
6637        #[doc = "Voltage monitor 2 reset detected"]
6638        pub const _1: Self = Self::new(1);
6639    }
6640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6641    pub struct Dpsrstf_SPEC;
6642    pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
6643    impl Dpsrstf {
6644        #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
6645        pub const _0: Self = Self::new(0);
6646        #[doc = "Deep software standby mode cancellation requested by an interrupt."]
6647        pub const _1: Self = Self::new(1);
6648    }
6649}
6650#[doc(hidden)]
6651#[derive(Copy, Clone, Eq, PartialEq)]
6652pub struct Rstsr2_SPEC;
6653impl crate::sealed::RegSpec for Rstsr2_SPEC {
6654    type DataType = u8;
6655}
6656#[doc = "Reset Status Register 2"]
6657pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
6658
6659impl Rstsr2 {
6660    #[doc = "Cold/Warm Start Determination Flag"]
6661    #[inline(always)]
6662    pub fn cwsf(
6663        self,
6664    ) -> crate::common::RegisterField<0, 0x1, 1, 0, rstsr2::Cwsf, Rstsr2_SPEC, crate::common::RW>
6665    {
6666        crate::common::RegisterField::<0,0x1,1,0,rstsr2::Cwsf, Rstsr2_SPEC,crate::common::RW>::from_register(self,0)
6667    }
6668}
6669impl ::core::default::Default for Rstsr2 {
6670    #[inline(always)]
6671    fn default() -> Rstsr2 {
6672        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
6673    }
6674}
6675pub mod rstsr2 {
6676
6677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6678    pub struct Cwsf_SPEC;
6679    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
6680    impl Cwsf {
6681        #[doc = "Cold start"]
6682        pub const _0: Self = Self::new(0);
6683        #[doc = "Warm start"]
6684        pub const _1: Self = Self::new(1);
6685    }
6686}
6687#[doc(hidden)]
6688#[derive(Copy, Clone, Eq, PartialEq)]
6689pub struct Momcr_SPEC;
6690impl crate::sealed::RegSpec for Momcr_SPEC {
6691    type DataType = u8;
6692}
6693#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
6694pub type Momcr = crate::RegValueT<Momcr_SPEC>;
6695
6696impl Momcr {
6697    #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
6698    #[inline(always)]
6699    pub fn modrv(
6700        self,
6701    ) -> crate::common::RegisterField<4, 0x3, 1, 0, momcr::Modrv, Momcr_SPEC, crate::common::RW>
6702    {
6703        crate::common::RegisterField::<4,0x3,1,0,momcr::Modrv, Momcr_SPEC,crate::common::RW>::from_register(self,0)
6704    }
6705    #[doc = "Main Clock Oscillator Switching"]
6706    #[inline(always)]
6707    pub fn mosel(
6708        self,
6709    ) -> crate::common::RegisterField<6, 0x1, 1, 0, momcr::Mosel, Momcr_SPEC, crate::common::RW>
6710    {
6711        crate::common::RegisterField::<6,0x1,1,0,momcr::Mosel, Momcr_SPEC,crate::common::RW>::from_register(self,0)
6712    }
6713}
6714impl ::core::default::Default for Momcr {
6715    #[inline(always)]
6716    fn default() -> Momcr {
6717        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
6718    }
6719}
6720pub mod momcr {
6721
6722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6723    pub struct Modrv_SPEC;
6724    pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
6725    impl Modrv {
6726        #[doc = "20 MHz to 24 MHz"]
6727        pub const _00: Self = Self::new(0);
6728        #[doc = "16 MHz to 20 MHz"]
6729        pub const _01: Self = Self::new(1);
6730        #[doc = "8 MHz to 16 MHz"]
6731        pub const _10: Self = Self::new(2);
6732        #[doc = "8 MHz"]
6733        pub const _11: Self = Self::new(3);
6734    }
6735    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6736    pub struct Mosel_SPEC;
6737    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
6738    impl Mosel {
6739        #[doc = "Resonator"]
6740        pub const _0: Self = Self::new(0);
6741        #[doc = "External clock input"]
6742        pub const _1: Self = Self::new(1);
6743    }
6744}
6745#[doc(hidden)]
6746#[derive(Copy, Clone, Eq, PartialEq)]
6747pub struct Fwepror_SPEC;
6748impl crate::sealed::RegSpec for Fwepror_SPEC {
6749    type DataType = u8;
6750}
6751#[doc = "Flash P/E Protect Register"]
6752pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
6753
6754impl Fwepror {
6755    #[doc = "Flash Programming and Erasure"]
6756    #[inline(always)]
6757    pub fn flwe(
6758        self,
6759    ) -> crate::common::RegisterField<0, 0x3, 1, 0, fwepror::Flwe, Fwepror_SPEC, crate::common::RW>
6760    {
6761        crate::common::RegisterField::<0,0x3,1,0,fwepror::Flwe, Fwepror_SPEC,crate::common::RW>::from_register(self,0)
6762    }
6763}
6764impl ::core::default::Default for Fwepror {
6765    #[inline(always)]
6766    fn default() -> Fwepror {
6767        <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
6768    }
6769}
6770pub mod fwepror {
6771
6772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6773    pub struct Flwe_SPEC;
6774    pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
6775    impl Flwe {
6776        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
6777        pub const _00: Self = Self::new(0);
6778        #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
6779        pub const _01: Self = Self::new(1);
6780        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
6781        pub const _10: Self = Self::new(2);
6782        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
6783        pub const _11: Self = Self::new(3);
6784    }
6785}
6786#[doc(hidden)]
6787#[derive(Copy, Clone, Eq, PartialEq)]
6788pub struct Lvd1Cmpcr_SPEC;
6789impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
6790    type DataType = u8;
6791}
6792#[doc = "Voltage Monitoring 1 Comparator Control Register"]
6793pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
6794
6795impl Lvd1Cmpcr {
6796    #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
6797    #[inline(always)]
6798    pub fn lvd1lvl(
6799        self,
6800    ) -> crate::common::RegisterField<
6801        0,
6802        0x1f,
6803        1,
6804        0,
6805        lvd1cmpcr::Lvd1Lvl,
6806        Lvd1Cmpcr_SPEC,
6807        crate::common::RW,
6808    > {
6809        crate::common::RegisterField::<
6810            0,
6811            0x1f,
6812            1,
6813            0,
6814            lvd1cmpcr::Lvd1Lvl,
6815            Lvd1Cmpcr_SPEC,
6816            crate::common::RW,
6817        >::from_register(self, 0)
6818    }
6819    #[doc = "Voltage Detection 1 Enable"]
6820    #[inline(always)]
6821    pub fn lvd1e(
6822        self,
6823    ) -> crate::common::RegisterField<
6824        7,
6825        0x1,
6826        1,
6827        0,
6828        lvd1cmpcr::Lvd1E,
6829        Lvd1Cmpcr_SPEC,
6830        crate::common::RW,
6831    > {
6832        crate::common::RegisterField::<
6833            7,
6834            0x1,
6835            1,
6836            0,
6837            lvd1cmpcr::Lvd1E,
6838            Lvd1Cmpcr_SPEC,
6839            crate::common::RW,
6840        >::from_register(self, 0)
6841    }
6842}
6843impl ::core::default::Default for Lvd1Cmpcr {
6844    #[inline(always)]
6845    fn default() -> Lvd1Cmpcr {
6846        <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
6847    }
6848}
6849pub mod lvd1cmpcr {
6850
6851    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6852    pub struct Lvd1Lvl_SPEC;
6853    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
6854    impl Lvd1Lvl {
6855        #[doc = "2.99 V (Vdet1_1)"]
6856        pub const _0_X_11: Self = Self::new(17);
6857        #[doc = "2.92 V (Vdet1_2)"]
6858        pub const _0_X_12: Self = Self::new(18);
6859        #[doc = "2.85 V (Vdet1_3)"]
6860        pub const _0_X_13: Self = Self::new(19);
6861        #[doc = "Setting prohibited"]
6862        pub const OTHERS: Self = Self::new(0);
6863    }
6864    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6865    pub struct Lvd1E_SPEC;
6866    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
6867    impl Lvd1E {
6868        #[doc = "Voltage detection 1 circuit disabled"]
6869        pub const _0: Self = Self::new(0);
6870        #[doc = "Voltage detection 1 circuit enabled"]
6871        pub const _1: Self = Self::new(1);
6872    }
6873}
6874#[doc(hidden)]
6875#[derive(Copy, Clone, Eq, PartialEq)]
6876pub struct Lvd2Cmpcr_SPEC;
6877impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
6878    type DataType = u8;
6879}
6880#[doc = "Voltage Monitoring 2 Comparator Control Register"]
6881pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
6882
6883impl Lvd2Cmpcr {
6884    #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
6885    #[inline(always)]
6886    pub fn lvd2lvl(
6887        self,
6888    ) -> crate::common::RegisterField<
6889        0,
6890        0x7,
6891        1,
6892        0,
6893        lvd2cmpcr::Lvd2Lvl,
6894        Lvd2Cmpcr_SPEC,
6895        crate::common::RW,
6896    > {
6897        crate::common::RegisterField::<
6898            0,
6899            0x7,
6900            1,
6901            0,
6902            lvd2cmpcr::Lvd2Lvl,
6903            Lvd2Cmpcr_SPEC,
6904            crate::common::RW,
6905        >::from_register(self, 0)
6906    }
6907    #[doc = "Voltage Detection 2 Enable"]
6908    #[inline(always)]
6909    pub fn lvd2e(
6910        self,
6911    ) -> crate::common::RegisterField<
6912        7,
6913        0x1,
6914        1,
6915        0,
6916        lvd2cmpcr::Lvd2E,
6917        Lvd2Cmpcr_SPEC,
6918        crate::common::RW,
6919    > {
6920        crate::common::RegisterField::<
6921            7,
6922            0x1,
6923            1,
6924            0,
6925            lvd2cmpcr::Lvd2E,
6926            Lvd2Cmpcr_SPEC,
6927            crate::common::RW,
6928        >::from_register(self, 0)
6929    }
6930}
6931impl ::core::default::Default for Lvd2Cmpcr {
6932    #[inline(always)]
6933    fn default() -> Lvd2Cmpcr {
6934        <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
6935    }
6936}
6937pub mod lvd2cmpcr {
6938
6939    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6940    pub struct Lvd2Lvl_SPEC;
6941    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
6942    impl Lvd2Lvl {
6943        #[doc = "2.99 V (Vdet2_1)"]
6944        pub const _101: Self = Self::new(5);
6945        #[doc = "2.92 V (Vdet2_2)"]
6946        pub const _110: Self = Self::new(6);
6947        #[doc = "2.85 V (Vdet2_3)"]
6948        pub const _111: Self = Self::new(7);
6949        #[doc = "Setting prohibited"]
6950        pub const OTHERS: Self = Self::new(0);
6951    }
6952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6953    pub struct Lvd2E_SPEC;
6954    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
6955    impl Lvd2E {
6956        #[doc = "Voltage detection 2 circuit disabled"]
6957        pub const _0: Self = Self::new(0);
6958        #[doc = "Voltage detection 2 circuit enabled"]
6959        pub const _1: Self = Self::new(1);
6960    }
6961}
6962#[doc(hidden)]
6963#[derive(Copy, Clone, Eq, PartialEq)]
6964pub struct Lvd1Cr0_SPEC;
6965impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
6966    type DataType = u8;
6967}
6968#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
6969pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
6970
6971impl Lvd1Cr0 {
6972    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
6973    #[inline(always)]
6974    pub fn rie(
6975        self,
6976    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lvd1cr0::Rie, Lvd1Cr0_SPEC, crate::common::RW>
6977    {
6978        crate::common::RegisterField::<0,0x1,1,0,lvd1cr0::Rie, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
6979    }
6980    #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
6981    #[inline(always)]
6982    pub fn dfdis(
6983        self,
6984    ) -> crate::common::RegisterField<1, 0x1, 1, 0, lvd1cr0::Dfdis, Lvd1Cr0_SPEC, crate::common::RW>
6985    {
6986        crate::common::RegisterField::<1,0x1,1,0,lvd1cr0::Dfdis, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
6987    }
6988    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
6989    #[inline(always)]
6990    pub fn cmpe(
6991        self,
6992    ) -> crate::common::RegisterField<2, 0x1, 1, 0, lvd1cr0::Cmpe, Lvd1Cr0_SPEC, crate::common::RW>
6993    {
6994        crate::common::RegisterField::<2,0x1,1,0,lvd1cr0::Cmpe, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
6995    }
6996    #[doc = "Sampling Clock Select"]
6997    #[inline(always)]
6998    pub fn fsamp(
6999        self,
7000    ) -> crate::common::RegisterField<4, 0x3, 1, 0, lvd1cr0::Fsamp, Lvd1Cr0_SPEC, crate::common::RW>
7001    {
7002        crate::common::RegisterField::<4,0x3,1,0,lvd1cr0::Fsamp, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
7003    }
7004    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
7005    #[inline(always)]
7006    pub fn ri(
7007        self,
7008    ) -> crate::common::RegisterField<6, 0x1, 1, 0, lvd1cr0::Ri, Lvd1Cr0_SPEC, crate::common::RW>
7009    {
7010        crate::common::RegisterField::<6,0x1,1,0,lvd1cr0::Ri, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
7011    }
7012    #[doc = "Voltage Monitor 1 Reset Negate Select"]
7013    #[inline(always)]
7014    pub fn rn(
7015        self,
7016    ) -> crate::common::RegisterField<7, 0x1, 1, 0, lvd1cr0::Rn, Lvd1Cr0_SPEC, crate::common::RW>
7017    {
7018        crate::common::RegisterField::<7,0x1,1,0,lvd1cr0::Rn, Lvd1Cr0_SPEC,crate::common::RW>::from_register(self,0)
7019    }
7020}
7021impl ::core::default::Default for Lvd1Cr0 {
7022    #[inline(always)]
7023    fn default() -> Lvd1Cr0 {
7024        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
7025    }
7026}
7027pub mod lvd1cr0 {
7028
7029    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7030    pub struct Rie_SPEC;
7031    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
7032    impl Rie {
7033        #[doc = "Disable"]
7034        pub const _0: Self = Self::new(0);
7035        #[doc = "Enable"]
7036        pub const _1: Self = Self::new(1);
7037    }
7038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7039    pub struct Dfdis_SPEC;
7040    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
7041    impl Dfdis {
7042        #[doc = "Enable the digital filter"]
7043        pub const _0: Self = Self::new(0);
7044        #[doc = "Disable the digital filter"]
7045        pub const _1: Self = Self::new(1);
7046    }
7047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7048    pub struct Cmpe_SPEC;
7049    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
7050    impl Cmpe {
7051        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
7052        pub const _0: Self = Self::new(0);
7053        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
7054        pub const _1: Self = Self::new(1);
7055    }
7056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7057    pub struct Fsamp_SPEC;
7058    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
7059    impl Fsamp {
7060        #[doc = "1/2 LOCO frequency"]
7061        pub const _00: Self = Self::new(0);
7062        #[doc = "1/4 LOCO frequency"]
7063        pub const _01: Self = Self::new(1);
7064        #[doc = "1/8 LOCO frequency"]
7065        pub const _10: Self = Self::new(2);
7066        #[doc = "1/16 LOCO frequency"]
7067        pub const _11: Self = Self::new(3);
7068    }
7069    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7070    pub struct Ri_SPEC;
7071    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
7072    impl Ri {
7073        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
7074        pub const _0: Self = Self::new(0);
7075        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
7076        pub const _1: Self = Self::new(1);
7077    }
7078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7079    pub struct Rn_SPEC;
7080    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
7081    impl Rn {
7082        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
7083        pub const _0: Self = Self::new(0);
7084        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
7085        pub const _1: Self = Self::new(1);
7086    }
7087}
7088#[doc(hidden)]
7089#[derive(Copy, Clone, Eq, PartialEq)]
7090pub struct Lvd2Cr0_SPEC;
7091impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
7092    type DataType = u8;
7093}
7094#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
7095pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
7096
7097impl Lvd2Cr0 {
7098    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
7099    #[inline(always)]
7100    pub fn rie(
7101        self,
7102    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lvd2cr0::Rie, Lvd2Cr0_SPEC, crate::common::RW>
7103    {
7104        crate::common::RegisterField::<0,0x1,1,0,lvd2cr0::Rie, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7105    }
7106    #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
7107    #[inline(always)]
7108    pub fn dfdis(
7109        self,
7110    ) -> crate::common::RegisterField<1, 0x1, 1, 0, lvd2cr0::Dfdis, Lvd2Cr0_SPEC, crate::common::RW>
7111    {
7112        crate::common::RegisterField::<1,0x1,1,0,lvd2cr0::Dfdis, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7113    }
7114    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
7115    #[inline(always)]
7116    pub fn cmpe(
7117        self,
7118    ) -> crate::common::RegisterField<2, 0x1, 1, 0, lvd2cr0::Cmpe, Lvd2Cr0_SPEC, crate::common::RW>
7119    {
7120        crate::common::RegisterField::<2,0x1,1,0,lvd2cr0::Cmpe, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7121    }
7122    #[doc = "Sampling Clock Select"]
7123    #[inline(always)]
7124    pub fn fsamp(
7125        self,
7126    ) -> crate::common::RegisterField<4, 0x3, 1, 0, lvd2cr0::Fsamp, Lvd2Cr0_SPEC, crate::common::RW>
7127    {
7128        crate::common::RegisterField::<4,0x3,1,0,lvd2cr0::Fsamp, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7129    }
7130    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
7131    #[inline(always)]
7132    pub fn ri(
7133        self,
7134    ) -> crate::common::RegisterField<6, 0x1, 1, 0, lvd2cr0::Ri, Lvd2Cr0_SPEC, crate::common::RW>
7135    {
7136        crate::common::RegisterField::<6,0x1,1,0,lvd2cr0::Ri, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7137    }
7138    #[doc = "Voltage Monitor 2 Reset Negate Select"]
7139    #[inline(always)]
7140    pub fn rn(
7141        self,
7142    ) -> crate::common::RegisterField<7, 0x1, 1, 0, lvd2cr0::Rn, Lvd2Cr0_SPEC, crate::common::RW>
7143    {
7144        crate::common::RegisterField::<7,0x1,1,0,lvd2cr0::Rn, Lvd2Cr0_SPEC,crate::common::RW>::from_register(self,0)
7145    }
7146}
7147impl ::core::default::Default for Lvd2Cr0 {
7148    #[inline(always)]
7149    fn default() -> Lvd2Cr0 {
7150        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
7151    }
7152}
7153pub mod lvd2cr0 {
7154
7155    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7156    pub struct Rie_SPEC;
7157    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
7158    impl Rie {
7159        #[doc = "Disable"]
7160        pub const _0: Self = Self::new(0);
7161        #[doc = "Enable"]
7162        pub const _1: Self = Self::new(1);
7163    }
7164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7165    pub struct Dfdis_SPEC;
7166    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
7167    impl Dfdis {
7168        #[doc = "Enable the digital filter"]
7169        pub const _0: Self = Self::new(0);
7170        #[doc = "Disable the digital filter"]
7171        pub const _1: Self = Self::new(1);
7172    }
7173    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7174    pub struct Cmpe_SPEC;
7175    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
7176    impl Cmpe {
7177        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
7178        pub const _0: Self = Self::new(0);
7179        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
7180        pub const _1: Self = Self::new(1);
7181    }
7182    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7183    pub struct Fsamp_SPEC;
7184    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
7185    impl Fsamp {
7186        #[doc = "1/2 LOCO frequency"]
7187        pub const _00: Self = Self::new(0);
7188        #[doc = "1/4 LOCO frequency"]
7189        pub const _01: Self = Self::new(1);
7190        #[doc = "1/8 LOCO frequency"]
7191        pub const _10: Self = Self::new(2);
7192        #[doc = "1/16 LOCO frequency"]
7193        pub const _11: Self = Self::new(3);
7194    }
7195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7196    pub struct Ri_SPEC;
7197    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
7198    impl Ri {
7199        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
7200        pub const _0: Self = Self::new(0);
7201        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
7202        pub const _1: Self = Self::new(1);
7203    }
7204    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7205    pub struct Rn_SPEC;
7206    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
7207    impl Rn {
7208        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
7209        pub const _0: Self = Self::new(0);
7210        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
7211        pub const _1: Self = Self::new(1);
7212    }
7213}
7214#[doc(hidden)]
7215#[derive(Copy, Clone, Eq, PartialEq)]
7216pub struct Sosccr_SPEC;
7217impl crate::sealed::RegSpec for Sosccr_SPEC {
7218    type DataType = u8;
7219}
7220#[doc = "Sub-Clock Oscillator Control Register"]
7221pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
7222
7223impl Sosccr {
7224    #[doc = "Sub Clock Oscillator Stop"]
7225    #[inline(always)]
7226    pub fn sostp(
7227        self,
7228    ) -> crate::common::RegisterField<0, 0x1, 1, 0, sosccr::Sostp, Sosccr_SPEC, crate::common::RW>
7229    {
7230        crate::common::RegisterField::<0,0x1,1,0,sosccr::Sostp, Sosccr_SPEC,crate::common::RW>::from_register(self,0)
7231    }
7232}
7233impl ::core::default::Default for Sosccr {
7234    #[inline(always)]
7235    fn default() -> Sosccr {
7236        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
7237    }
7238}
7239pub mod sosccr {
7240
7241    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7242    pub struct Sostp_SPEC;
7243    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
7244    impl Sostp {
7245        #[doc = "Operate the sub-clock oscillator"]
7246        pub const _0: Self = Self::new(0);
7247        #[doc = "Stop the sub-clock oscillator"]
7248        pub const _1: Self = Self::new(1);
7249    }
7250}
7251#[doc(hidden)]
7252#[derive(Copy, Clone, Eq, PartialEq)]
7253pub struct Somcr_SPEC;
7254impl crate::sealed::RegSpec for Somcr_SPEC {
7255    type DataType = u8;
7256}
7257#[doc = "Sub-Clock Oscillator Mode Control Register"]
7258pub type Somcr = crate::RegValueT<Somcr_SPEC>;
7259
7260impl Somcr {
7261    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
7262    #[inline(always)]
7263    pub fn sodrv(
7264        self,
7265    ) -> crate::common::RegisterField<1, 0x1, 1, 0, somcr::Sodrv, Somcr_SPEC, crate::common::RW>
7266    {
7267        crate::common::RegisterField::<1,0x1,1,0,somcr::Sodrv, Somcr_SPEC,crate::common::RW>::from_register(self,0)
7268    }
7269}
7270impl ::core::default::Default for Somcr {
7271    #[inline(always)]
7272    fn default() -> Somcr {
7273        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
7274    }
7275}
7276pub mod somcr {
7277
7278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7279    pub struct Sodrv_SPEC;
7280    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
7281    impl Sodrv {
7282        #[doc = "Standard"]
7283        pub const _0: Self = Self::new(0);
7284        #[doc = "Low"]
7285        pub const _1: Self = Self::new(1);
7286    }
7287}
7288#[doc(hidden)]
7289#[derive(Copy, Clone, Eq, PartialEq)]
7290pub struct Lococr_SPEC;
7291impl crate::sealed::RegSpec for Lococr_SPEC {
7292    type DataType = u8;
7293}
7294#[doc = "Low-Speed On-Chip Oscillator Control Register"]
7295pub type Lococr = crate::RegValueT<Lococr_SPEC>;
7296
7297impl Lococr {
7298    #[doc = "LOCO Stop"]
7299    #[inline(always)]
7300    pub fn lcstp(
7301        self,
7302    ) -> crate::common::RegisterField<0, 0x1, 1, 0, lococr::Lcstp, Lococr_SPEC, crate::common::RW>
7303    {
7304        crate::common::RegisterField::<0,0x1,1,0,lococr::Lcstp, Lococr_SPEC,crate::common::RW>::from_register(self,0)
7305    }
7306}
7307impl ::core::default::Default for Lococr {
7308    #[inline(always)]
7309    fn default() -> Lococr {
7310        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
7311    }
7312}
7313pub mod lococr {
7314
7315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7316    pub struct Lcstp_SPEC;
7317    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
7318    impl Lcstp {
7319        #[doc = "Operate the LOCO clock"]
7320        pub const _0: Self = Self::new(0);
7321        #[doc = "Stop the LOCO clock"]
7322        pub const _1: Self = Self::new(1);
7323    }
7324}
7325#[doc(hidden)]
7326#[derive(Copy, Clone, Eq, PartialEq)]
7327pub struct Locoutcr_SPEC;
7328impl crate::sealed::RegSpec for Locoutcr_SPEC {
7329    type DataType = u8;
7330}
7331#[doc = "LOCO User Trimming Control Register"]
7332pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
7333
7334impl Locoutcr {
7335    #[doc = "LOCO User Trimming"]
7336    #[inline(always)]
7337    pub fn locoutrm(
7338        self,
7339    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, Locoutcr_SPEC, crate::common::RW> {
7340        crate::common::RegisterField::<0,0xff,1,0,u8, Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
7341    }
7342}
7343impl ::core::default::Default for Locoutcr {
7344    #[inline(always)]
7345    fn default() -> Locoutcr {
7346        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
7347    }
7348}