ra4e2_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Arm Cortex-M33 based Microcontroller RA4E2 group"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc120")]
31pub mod adc120;
32#[cfg(feature = "agtw0")]
33pub mod agtw0;
34#[cfg(feature = "bus")]
35pub mod bus;
36#[cfg(feature = "cac")]
37pub mod cac;
38#[cfg(feature = "cache")]
39pub mod cache;
40#[cfg(feature = "canfd_b")]
41pub mod canfd_b;
42#[cfg(feature = "cec")]
43pub mod cec;
44#[cfg(feature = "cpscu")]
45pub mod cpscu;
46#[cfg(feature = "crc")]
47pub mod crc;
48#[cfg(feature = "dac12")]
49pub mod dac12;
50#[cfg(feature = "dbg")]
51pub mod dbg;
52#[cfg(feature = "dma")]
53pub mod dma;
54#[cfg(feature = "dmac0")]
55pub mod dmac0;
56#[cfg(feature = "doc")]
57pub mod doc;
58#[cfg(feature = "dtc")]
59pub mod dtc;
60#[cfg(feature = "eccmb")]
61pub mod eccmb;
62#[cfg(feature = "elc")]
63pub mod elc;
64#[cfg(feature = "faci")]
65pub mod faci;
66#[cfg(feature = "fcache")]
67pub mod fcache;
68#[cfg(feature = "flad")]
69pub mod flad;
70#[cfg(feature = "gpt16e0")]
71pub mod gpt16e0;
72#[cfg(feature = "gpt_ops")]
73pub mod gpt_ops;
74#[cfg(feature = "i3c")]
75pub mod i3c;
76#[cfg(feature = "icu")]
77pub mod icu;
78#[cfg(feature = "iwdt")]
79pub mod iwdt;
80#[cfg(feature = "mstp")]
81pub mod mstp;
82#[cfg(feature = "pfs")]
83pub mod pfs;
84#[cfg(feature = "poeg")]
85pub mod poeg;
86#[cfg(feature = "port0")]
87pub mod port0;
88#[cfg(feature = "port1")]
89pub mod port1;
90#[cfg(feature = "pscu")]
91pub mod pscu;
92#[cfg(feature = "rmpu")]
93pub mod rmpu;
94#[cfg(feature = "rtc")]
95pub mod rtc;
96#[cfg(feature = "sci0")]
97pub mod sci0;
98#[cfg(feature = "spi0")]
99pub mod spi0;
100#[cfg(feature = "sram")]
101pub mod sram;
102#[cfg(feature = "ssie0")]
103pub mod ssie0;
104#[cfg(feature = "sysc")]
105pub mod sysc;
106#[cfg(feature = "tsd")]
107pub mod tsd;
108#[cfg(feature = "tsn")]
109pub mod tsn;
110#[cfg(feature = "tzf")]
111pub mod tzf;
112#[cfg(feature = "usbfs")]
113pub mod usbfs;
114#[cfg(feature = "wdt")]
115pub mod wdt;
116
117#[cfg(feature = "rmpu")]
118#[derive(Copy, Clone, Eq, PartialEq)]
119pub struct Rmpu {
120    ptr: *mut u8,
121}
122#[cfg(feature = "rmpu")]
123pub const RMPU: self::Rmpu = self::Rmpu {
124    ptr: 0x40000000u32 as _,
125};
126#[cfg(feature = "tzf")]
127#[derive(Copy, Clone, Eq, PartialEq)]
128pub struct Tzf {
129    ptr: *mut u8,
130}
131#[cfg(feature = "tzf")]
132pub const TZF: self::Tzf = self::Tzf {
133    ptr: 0x40000e00u32 as _,
134};
135#[cfg(feature = "sram")]
136#[derive(Copy, Clone, Eq, PartialEq)]
137pub struct Sram {
138    ptr: *mut u8,
139}
140#[cfg(feature = "sram")]
141pub const SRAM: self::Sram = self::Sram {
142    ptr: 0x40002000u32 as _,
143};
144#[cfg(feature = "bus")]
145#[derive(Copy, Clone, Eq, PartialEq)]
146pub struct Bus {
147    ptr: *mut u8,
148}
149#[cfg(feature = "bus")]
150pub const BUS: self::Bus = self::Bus {
151    ptr: 0x40003000u32 as _,
152};
153#[cfg(feature = "dmac0")]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct Dmac0 {
156    ptr: *mut u8,
157}
158#[cfg(feature = "dmac0")]
159pub const DMAC0: self::Dmac0 = self::Dmac0 {
160    ptr: 0x40005000u32 as _,
161};
162#[cfg(feature = "dmac1")]
163pub const DMAC1: self::Dmac0 = self::Dmac0 {
164    ptr: 0x40005040u32 as _,
165};
166#[cfg(feature = "dmac2")]
167pub const DMAC2: self::Dmac0 = self::Dmac0 {
168    ptr: 0x40005080u32 as _,
169};
170#[cfg(feature = "dmac3")]
171pub const DMAC3: self::Dmac0 = self::Dmac0 {
172    ptr: 0x400050c0u32 as _,
173};
174#[cfg(feature = "dmac4")]
175pub const DMAC4: self::Dmac0 = self::Dmac0 {
176    ptr: 0x40005100u32 as _,
177};
178#[cfg(feature = "dmac5")]
179pub const DMAC5: self::Dmac0 = self::Dmac0 {
180    ptr: 0x40005140u32 as _,
181};
182#[cfg(feature = "dmac6")]
183pub const DMAC6: self::Dmac0 = self::Dmac0 {
184    ptr: 0x40005180u32 as _,
185};
186#[cfg(feature = "dmac7")]
187pub const DMAC7: self::Dmac0 = self::Dmac0 {
188    ptr: 0x400051c0u32 as _,
189};
190#[cfg(feature = "dma")]
191#[derive(Copy, Clone, Eq, PartialEq)]
192pub struct Dma {
193    ptr: *mut u8,
194}
195#[cfg(feature = "dma")]
196pub const DMA: self::Dma = self::Dma {
197    ptr: 0x40005200u32 as _,
198};
199#[cfg(feature = "dtc")]
200#[derive(Copy, Clone, Eq, PartialEq)]
201pub struct Dtc {
202    ptr: *mut u8,
203}
204#[cfg(feature = "dtc")]
205pub const DTC: self::Dtc = self::Dtc {
206    ptr: 0x40005400u32 as _,
207};
208#[cfg(feature = "icu")]
209#[derive(Copy, Clone, Eq, PartialEq)]
210pub struct Icu {
211    ptr: *mut u8,
212}
213#[cfg(feature = "icu")]
214pub const ICU: self::Icu = self::Icu {
215    ptr: 0x40006000u32 as _,
216};
217#[cfg(feature = "cache")]
218#[derive(Copy, Clone, Eq, PartialEq)]
219pub struct Cache {
220    ptr: *mut u8,
221}
222#[cfg(feature = "cache")]
223pub const CACHE: self::Cache = self::Cache {
224    ptr: 0x40007000u32 as _,
225};
226#[cfg(feature = "cpscu")]
227#[derive(Copy, Clone, Eq, PartialEq)]
228pub struct Cpscu {
229    ptr: *mut u8,
230}
231#[cfg(feature = "cpscu")]
232pub const CPSCU: self::Cpscu = self::Cpscu {
233    ptr: 0x40008000u32 as _,
234};
235#[cfg(feature = "dbg")]
236#[derive(Copy, Clone, Eq, PartialEq)]
237pub struct Dbg {
238    ptr: *mut u8,
239}
240#[cfg(feature = "dbg")]
241pub const DBG: self::Dbg = self::Dbg {
242    ptr: 0x4001b000u32 as _,
243};
244#[cfg(feature = "fcache")]
245#[derive(Copy, Clone, Eq, PartialEq)]
246pub struct Fcache {
247    ptr: *mut u8,
248}
249#[cfg(feature = "fcache")]
250pub const FCACHE: self::Fcache = self::Fcache {
251    ptr: 0x4001c100u32 as _,
252};
253#[cfg(feature = "sysc")]
254#[derive(Copy, Clone, Eq, PartialEq)]
255pub struct Sysc {
256    ptr: *mut u8,
257}
258#[cfg(feature = "sysc")]
259pub const SYSC: self::Sysc = self::Sysc {
260    ptr: 0x4001e000u32 as _,
261};
262#[cfg(feature = "port0")]
263#[derive(Copy, Clone, Eq, PartialEq)]
264pub struct Port0 {
265    ptr: *mut u8,
266}
267#[cfg(feature = "port0")]
268pub const PORT0: self::Port0 = self::Port0 {
269    ptr: 0x40080000u32 as _,
270};
271#[cfg(feature = "port1")]
272#[derive(Copy, Clone, Eq, PartialEq)]
273pub struct Port1 {
274    ptr: *mut u8,
275}
276#[cfg(feature = "port1")]
277pub const PORT1: self::Port1 = self::Port1 {
278    ptr: 0x40080020u32 as _,
279};
280#[cfg(feature = "port2")]
281pub const PORT2: self::Port1 = self::Port1 {
282    ptr: 0x40080040u32 as _,
283};
284#[cfg(feature = "port3")]
285pub const PORT3: self::Port1 = self::Port1 {
286    ptr: 0x40080060u32 as _,
287};
288#[cfg(feature = "port4")]
289pub const PORT4: self::Port1 = self::Port1 {
290    ptr: 0x40080080u32 as _,
291};
292#[cfg(feature = "port5")]
293pub const PORT5: self::Port0 = self::Port0 {
294    ptr: 0x400800a0u32 as _,
295};
296#[cfg(feature = "port8")]
297pub const PORT8: self::Port0 = self::Port0 {
298    ptr: 0x40080100u32 as _,
299};
300#[cfg(feature = "pfs")]
301#[derive(Copy, Clone, Eq, PartialEq)]
302pub struct Pfs {
303    ptr: *mut u8,
304}
305#[cfg(feature = "pfs")]
306pub const PFS: self::Pfs = self::Pfs {
307    ptr: 0x40080800u32 as _,
308};
309#[cfg(feature = "elc")]
310#[derive(Copy, Clone, Eq, PartialEq)]
311pub struct Elc {
312    ptr: *mut u8,
313}
314#[cfg(feature = "elc")]
315pub const ELC: self::Elc = self::Elc {
316    ptr: 0x40082000u32 as _,
317};
318#[cfg(feature = "rtc")]
319#[derive(Copy, Clone, Eq, PartialEq)]
320pub struct Rtc {
321    ptr: *mut u8,
322}
323#[cfg(feature = "rtc")]
324pub const RTC: self::Rtc = self::Rtc {
325    ptr: 0x40083000u32 as _,
326};
327#[cfg(feature = "iwdt")]
328#[derive(Copy, Clone, Eq, PartialEq)]
329pub struct Iwdt {
330    ptr: *mut u8,
331}
332#[cfg(feature = "iwdt")]
333pub const IWDT: self::Iwdt = self::Iwdt {
334    ptr: 0x40083200u32 as _,
335};
336#[cfg(feature = "wdt")]
337#[derive(Copy, Clone, Eq, PartialEq)]
338pub struct Wdt {
339    ptr: *mut u8,
340}
341#[cfg(feature = "wdt")]
342pub const WDT: self::Wdt = self::Wdt {
343    ptr: 0x40083400u32 as _,
344};
345#[cfg(feature = "cac")]
346#[derive(Copy, Clone, Eq, PartialEq)]
347pub struct Cac {
348    ptr: *mut u8,
349}
350#[cfg(feature = "cac")]
351pub const CAC: self::Cac = self::Cac {
352    ptr: 0x40083600u32 as _,
353};
354#[cfg(feature = "mstp")]
355#[derive(Copy, Clone, Eq, PartialEq)]
356pub struct Mstp {
357    ptr: *mut u8,
358}
359#[cfg(feature = "mstp")]
360pub const MSTP: self::Mstp = self::Mstp {
361    ptr: 0x40084000u32 as _,
362};
363#[cfg(feature = "poeg")]
364#[derive(Copy, Clone, Eq, PartialEq)]
365pub struct Poeg {
366    ptr: *mut u8,
367}
368#[cfg(feature = "poeg")]
369pub const POEG: self::Poeg = self::Poeg {
370    ptr: 0x4008a000u32 as _,
371};
372#[cfg(feature = "usbfs")]
373#[derive(Copy, Clone, Eq, PartialEq)]
374pub struct Usbfs {
375    ptr: *mut u8,
376}
377#[cfg(feature = "usbfs")]
378pub const USBFS: self::Usbfs = self::Usbfs {
379    ptr: 0x40090000u32 as _,
380};
381#[cfg(feature = "ssie0")]
382#[derive(Copy, Clone, Eq, PartialEq)]
383pub struct Ssie0 {
384    ptr: *mut u8,
385}
386#[cfg(feature = "ssie0")]
387pub const SSIE0: self::Ssie0 = self::Ssie0 {
388    ptr: 0x4009d000u32 as _,
389};
390#[cfg(feature = "cec")]
391#[derive(Copy, Clone, Eq, PartialEq)]
392pub struct Cec {
393    ptr: *mut u8,
394}
395#[cfg(feature = "cec")]
396pub const CEC: self::Cec = self::Cec {
397    ptr: 0x400ac000u32 as _,
398};
399#[cfg(feature = "canfd_b")]
400#[derive(Copy, Clone, Eq, PartialEq)]
401pub struct CanfdB {
402    ptr: *mut u8,
403}
404#[cfg(feature = "canfd_b")]
405pub const CANFD_B: self::CanfdB = self::CanfdB {
406    ptr: 0x400b0000u32 as _,
407};
408#[cfg(feature = "pscu")]
409#[derive(Copy, Clone, Eq, PartialEq)]
410pub struct Pscu {
411    ptr: *mut u8,
412}
413#[cfg(feature = "pscu")]
414pub const PSCU: self::Pscu = self::Pscu {
415    ptr: 0x400e0000u32 as _,
416};
417#[cfg(feature = "agtw0")]
418#[derive(Copy, Clone, Eq, PartialEq)]
419pub struct Agtw0 {
420    ptr: *mut u8,
421}
422#[cfg(feature = "agtw0")]
423pub const AGTW0: self::Agtw0 = self::Agtw0 {
424    ptr: 0x400e8000u32 as _,
425};
426#[cfg(feature = "agtw1")]
427pub const AGTW1: self::Agtw0 = self::Agtw0 {
428    ptr: 0x400e8100u32 as _,
429};
430#[cfg(feature = "tsn")]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct Tsn {
433    ptr: *mut u8,
434}
435#[cfg(feature = "tsn")]
436pub const TSN: self::Tsn = self::Tsn {
437    ptr: 0x400f3000u32 as _,
438};
439#[cfg(feature = "crc")]
440#[derive(Copy, Clone, Eq, PartialEq)]
441pub struct Crc {
442    ptr: *mut u8,
443}
444#[cfg(feature = "crc")]
445pub const CRC: self::Crc = self::Crc {
446    ptr: 0x40108000u32 as _,
447};
448#[cfg(feature = "doc")]
449#[derive(Copy, Clone, Eq, PartialEq)]
450pub struct Doc {
451    ptr: *mut u8,
452}
453#[cfg(feature = "doc")]
454pub const DOC: self::Doc = self::Doc {
455    ptr: 0x40109000u32 as _,
456};
457#[cfg(feature = "sci0")]
458#[derive(Copy, Clone, Eq, PartialEq)]
459pub struct Sci0 {
460    ptr: *mut u8,
461}
462#[cfg(feature = "sci0")]
463pub const SCI0: self::Sci0 = self::Sci0 {
464    ptr: 0x40118000u32 as _,
465};
466#[cfg(feature = "sci9")]
467pub const SCI9: self::Sci0 = self::Sci0 {
468    ptr: 0x40118900u32 as _,
469};
470#[cfg(feature = "spi0")]
471#[derive(Copy, Clone, Eq, PartialEq)]
472pub struct Spi0 {
473    ptr: *mut u8,
474}
475#[cfg(feature = "spi0")]
476pub const SPI0: self::Spi0 = self::Spi0 {
477    ptr: 0x4011a000u32 as _,
478};
479#[cfg(feature = "spi1")]
480pub const SPI1: self::Spi0 = self::Spi0 {
481    ptr: 0x4011a100u32 as _,
482};
483#[cfg(feature = "i3c")]
484#[derive(Copy, Clone, Eq, PartialEq)]
485pub struct I3C {
486    ptr: *mut u8,
487}
488#[cfg(feature = "i3c")]
489pub const I3C: self::I3C = self::I3C {
490    ptr: 0x4011f000u32 as _,
491};
492#[cfg(feature = "eccmb")]
493#[derive(Copy, Clone, Eq, PartialEq)]
494pub struct Eccmb {
495    ptr: *mut u8,
496}
497#[cfg(feature = "eccmb")]
498pub const ECCMB: self::Eccmb = self::Eccmb {
499    ptr: 0x4012f200u32 as _,
500};
501#[cfg(feature = "gpt16e0")]
502#[derive(Copy, Clone, Eq, PartialEq)]
503pub struct Gpt16E0 {
504    ptr: *mut u8,
505}
506#[cfg(feature = "gpt16e0")]
507pub const GPT16E0: self::Gpt16E0 = self::Gpt16E0 {
508    ptr: 0x40169000u32 as _,
509};
510#[cfg(feature = "gpt16e1")]
511pub const GPT16E1: self::Gpt16E0 = self::Gpt16E0 {
512    ptr: 0x40169100u32 as _,
513};
514#[cfg(feature = "gpt16e4")]
515pub const GPT16E4: self::Gpt16E0 = self::Gpt16E0 {
516    ptr: 0x40169400u32 as _,
517};
518#[cfg(feature = "gpt16e5")]
519pub const GPT16E5: self::Gpt16E0 = self::Gpt16E0 {
520    ptr: 0x40169500u32 as _,
521};
522#[cfg(feature = "gpt_ops")]
523#[derive(Copy, Clone, Eq, PartialEq)]
524pub struct GptOps {
525    ptr: *mut u8,
526}
527#[cfg(feature = "gpt_ops")]
528pub const GPT_OPS: self::GptOps = self::GptOps {
529    ptr: 0x40169a00u32 as _,
530};
531#[cfg(feature = "adc120")]
532#[derive(Copy, Clone, Eq, PartialEq)]
533pub struct Adc120 {
534    ptr: *mut u8,
535}
536#[cfg(feature = "adc120")]
537pub const ADC120: self::Adc120 = self::Adc120 {
538    ptr: 0x40170000u32 as _,
539};
540#[cfg(feature = "dac12")]
541#[derive(Copy, Clone, Eq, PartialEq)]
542pub struct Dac12 {
543    ptr: *mut u8,
544}
545#[cfg(feature = "dac12")]
546pub const DAC12: self::Dac12 = self::Dac12 {
547    ptr: 0x40171000u32 as _,
548};
549#[cfg(feature = "tsd")]
550#[derive(Copy, Clone, Eq, PartialEq)]
551pub struct Tsd {
552    ptr: *mut u8,
553}
554#[cfg(feature = "tsd")]
555pub const TSD: self::Tsd = self::Tsd {
556    ptr: 0x407fb000u32 as _,
557};
558#[cfg(feature = "flad")]
559#[derive(Copy, Clone, Eq, PartialEq)]
560pub struct Flad {
561    ptr: *mut u8,
562}
563#[cfg(feature = "flad")]
564pub const FLAD: self::Flad = self::Flad {
565    ptr: 0x407fc000u32 as _,
566};
567#[cfg(feature = "faci")]
568#[derive(Copy, Clone, Eq, PartialEq)]
569pub struct Faci {
570    ptr: *mut u8,
571}
572#[cfg(feature = "faci")]
573pub const FACI: self::Faci = self::Faci {
574    ptr: 0x407fe000u32 as _,
575};
576
577pub use cortex_m::peripheral::Peripherals as CorePeripherals;
578pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
579#[doc = "Number available in the NVIC for configuring priority"]
580pub const NVIC_PRIO_BITS: u8 = 4;
581#[doc(hidden)]
582pub union Vector {
583    _handler: unsafe extern "C" fn(),
584    _reserved: u32,
585}
586#[cfg(feature = "rt")]
587pub use self::Interrupt as interrupt;
588#[cfg(feature = "rt")]
589pub use cortex_m_rt::interrupt;
590#[cfg(feature = "rt")]
591extern "C" {
592    fn IEL0();
593    fn IEL1();
594    fn IEL2();
595    fn IEL3();
596    fn IEL4();
597    fn IEL5();
598    fn IEL6();
599    fn IEL7();
600    fn IEL8();
601    fn IEL9();
602    fn IEL10();
603    fn IEL11();
604    fn IEL12();
605    fn IEL13();
606    fn IEL14();
607    fn IEL15();
608    fn IEL16();
609    fn IEL17();
610    fn IEL18();
611    fn IEL19();
612    fn IEL20();
613    fn IEL21();
614    fn IEL22();
615    fn IEL23();
616    fn IEL24();
617    fn IEL25();
618    fn IEL26();
619    fn IEL27();
620    fn IEL28();
621    fn IEL29();
622    fn IEL30();
623    fn IEL31();
624    fn IEL32();
625    fn IEL33();
626    fn IEL34();
627    fn IEL35();
628    fn IEL36();
629    fn IEL37();
630    fn IEL38();
631    fn IEL39();
632    fn IEL40();
633    fn IEL41();
634    fn IEL42();
635    fn IEL43();
636    fn IEL44();
637    fn IEL45();
638    fn IEL46();
639    fn IEL47();
640    fn IEL48();
641    fn IEL49();
642    fn IEL50();
643    fn IEL51();
644    fn IEL52();
645    fn IEL53();
646    fn IEL54();
647    fn IEL55();
648    fn IEL56();
649    fn IEL57();
650    fn IEL58();
651    fn IEL59();
652    fn IEL60();
653    fn IEL61();
654    fn IEL62();
655    fn IEL63();
656    fn IEL64();
657    fn IEL65();
658    fn IEL66();
659    fn IEL67();
660    fn IEL68();
661    fn IEL69();
662    fn IEL70();
663    fn IEL71();
664    fn IEL72();
665    fn IEL73();
666    fn IEL74();
667    fn IEL75();
668    fn IEL76();
669    fn IEL77();
670    fn IEL78();
671    fn IEL79();
672    fn IEL80();
673    fn IEL81();
674    fn IEL82();
675    fn IEL83();
676    fn IEL84();
677    fn IEL85();
678    fn IEL86();
679    fn IEL87();
680    fn IEL88();
681    fn IEL89();
682    fn IEL90();
683    fn IEL91();
684    fn IEL92();
685    fn IEL93();
686    fn IEL94();
687    fn IEL95();
688}
689#[cfg(feature = "rt")]
690#[doc(hidden)]
691#[link_section = ".vector_table.interrupts"]
692#[no_mangle]
693pub static __INTERRUPTS: [Vector; 96] = [
694    Vector { _handler: IEL0 },
695    Vector { _handler: IEL1 },
696    Vector { _handler: IEL2 },
697    Vector { _handler: IEL3 },
698    Vector { _handler: IEL4 },
699    Vector { _handler: IEL5 },
700    Vector { _handler: IEL6 },
701    Vector { _handler: IEL7 },
702    Vector { _handler: IEL8 },
703    Vector { _handler: IEL9 },
704    Vector { _handler: IEL10 },
705    Vector { _handler: IEL11 },
706    Vector { _handler: IEL12 },
707    Vector { _handler: IEL13 },
708    Vector { _handler: IEL14 },
709    Vector { _handler: IEL15 },
710    Vector { _handler: IEL16 },
711    Vector { _handler: IEL17 },
712    Vector { _handler: IEL18 },
713    Vector { _handler: IEL19 },
714    Vector { _handler: IEL20 },
715    Vector { _handler: IEL21 },
716    Vector { _handler: IEL22 },
717    Vector { _handler: IEL23 },
718    Vector { _handler: IEL24 },
719    Vector { _handler: IEL25 },
720    Vector { _handler: IEL26 },
721    Vector { _handler: IEL27 },
722    Vector { _handler: IEL28 },
723    Vector { _handler: IEL29 },
724    Vector { _handler: IEL30 },
725    Vector { _handler: IEL31 },
726    Vector { _handler: IEL32 },
727    Vector { _handler: IEL33 },
728    Vector { _handler: IEL34 },
729    Vector { _handler: IEL35 },
730    Vector { _handler: IEL36 },
731    Vector { _handler: IEL37 },
732    Vector { _handler: IEL38 },
733    Vector { _handler: IEL39 },
734    Vector { _handler: IEL40 },
735    Vector { _handler: IEL41 },
736    Vector { _handler: IEL42 },
737    Vector { _handler: IEL43 },
738    Vector { _handler: IEL44 },
739    Vector { _handler: IEL45 },
740    Vector { _handler: IEL46 },
741    Vector { _handler: IEL47 },
742    Vector { _handler: IEL48 },
743    Vector { _handler: IEL49 },
744    Vector { _handler: IEL50 },
745    Vector { _handler: IEL51 },
746    Vector { _handler: IEL52 },
747    Vector { _handler: IEL53 },
748    Vector { _handler: IEL54 },
749    Vector { _handler: IEL55 },
750    Vector { _handler: IEL56 },
751    Vector { _handler: IEL57 },
752    Vector { _handler: IEL58 },
753    Vector { _handler: IEL59 },
754    Vector { _handler: IEL60 },
755    Vector { _handler: IEL61 },
756    Vector { _handler: IEL62 },
757    Vector { _handler: IEL63 },
758    Vector { _handler: IEL64 },
759    Vector { _handler: IEL65 },
760    Vector { _handler: IEL66 },
761    Vector { _handler: IEL67 },
762    Vector { _handler: IEL68 },
763    Vector { _handler: IEL69 },
764    Vector { _handler: IEL70 },
765    Vector { _handler: IEL71 },
766    Vector { _handler: IEL72 },
767    Vector { _handler: IEL73 },
768    Vector { _handler: IEL74 },
769    Vector { _handler: IEL75 },
770    Vector { _handler: IEL76 },
771    Vector { _handler: IEL77 },
772    Vector { _handler: IEL78 },
773    Vector { _handler: IEL79 },
774    Vector { _handler: IEL80 },
775    Vector { _handler: IEL81 },
776    Vector { _handler: IEL82 },
777    Vector { _handler: IEL83 },
778    Vector { _handler: IEL84 },
779    Vector { _handler: IEL85 },
780    Vector { _handler: IEL86 },
781    Vector { _handler: IEL87 },
782    Vector { _handler: IEL88 },
783    Vector { _handler: IEL89 },
784    Vector { _handler: IEL90 },
785    Vector { _handler: IEL91 },
786    Vector { _handler: IEL92 },
787    Vector { _handler: IEL93 },
788    Vector { _handler: IEL94 },
789    Vector { _handler: IEL95 },
790];
791#[doc = "Enumeration of all the interrupts."]
792#[derive(Copy, Clone, Debug, PartialEq, Eq)]
793#[repr(u16)]
794pub enum Interrupt {
795    #[doc = "ICU Interrupt 0"]
796    IEL0 = 0,
797    #[doc = "ICU Interrupt 1"]
798    IEL1 = 1,
799    #[doc = "ICU Interrupt 2"]
800    IEL2 = 2,
801    #[doc = "ICU Interrupt 3"]
802    IEL3 = 3,
803    #[doc = "ICU Interrupt 4"]
804    IEL4 = 4,
805    #[doc = "ICU Interrupt 5"]
806    IEL5 = 5,
807    #[doc = "ICU Interrupt 6"]
808    IEL6 = 6,
809    #[doc = "ICU Interrupt 7"]
810    IEL7 = 7,
811    #[doc = "ICU Interrupt 8"]
812    IEL8 = 8,
813    #[doc = "ICU Interrupt 9"]
814    IEL9 = 9,
815    #[doc = "ICU Interrupt 10"]
816    IEL10 = 10,
817    #[doc = "ICU Interrupt 11"]
818    IEL11 = 11,
819    #[doc = "ICU Interrupt 12"]
820    IEL12 = 12,
821    #[doc = "ICU Interrupt 13"]
822    IEL13 = 13,
823    #[doc = "ICU Interrupt 14"]
824    IEL14 = 14,
825    #[doc = "ICU Interrupt 15"]
826    IEL15 = 15,
827    #[doc = "ICU Interrupt 16"]
828    IEL16 = 16,
829    #[doc = "ICU Interrupt 17"]
830    IEL17 = 17,
831    #[doc = "ICU Interrupt 18"]
832    IEL18 = 18,
833    #[doc = "ICU Interrupt 19"]
834    IEL19 = 19,
835    #[doc = "ICU Interrupt 20"]
836    IEL20 = 20,
837    #[doc = "ICU Interrupt 21"]
838    IEL21 = 21,
839    #[doc = "ICU Interrupt 22"]
840    IEL22 = 22,
841    #[doc = "ICU Interrupt 23"]
842    IEL23 = 23,
843    #[doc = "ICU Interrupt 24"]
844    IEL24 = 24,
845    #[doc = "ICU Interrupt 25"]
846    IEL25 = 25,
847    #[doc = "ICU Interrupt 26"]
848    IEL26 = 26,
849    #[doc = "ICU Interrupt 27"]
850    IEL27 = 27,
851    #[doc = "ICU Interrupt 28"]
852    IEL28 = 28,
853    #[doc = "ICU Interrupt 29"]
854    IEL29 = 29,
855    #[doc = "ICU Interrupt 30"]
856    IEL30 = 30,
857    #[doc = "ICU Interrupt 31"]
858    IEL31 = 31,
859    #[doc = "ICU Interrupt 32"]
860    IEL32 = 32,
861    #[doc = "ICU Interrupt 33"]
862    IEL33 = 33,
863    #[doc = "ICU Interrupt 34"]
864    IEL34 = 34,
865    #[doc = "ICU Interrupt 35"]
866    IEL35 = 35,
867    #[doc = "ICU Interrupt 36"]
868    IEL36 = 36,
869    #[doc = "ICU Interrupt 37"]
870    IEL37 = 37,
871    #[doc = "ICU Interrupt 38"]
872    IEL38 = 38,
873    #[doc = "ICU Interrupt 39"]
874    IEL39 = 39,
875    #[doc = "ICU Interrupt 40"]
876    IEL40 = 40,
877    #[doc = "ICU Interrupt 41"]
878    IEL41 = 41,
879    #[doc = "ICU Interrupt 42"]
880    IEL42 = 42,
881    #[doc = "ICU Interrupt 43"]
882    IEL43 = 43,
883    #[doc = "ICU Interrupt 44"]
884    IEL44 = 44,
885    #[doc = "ICU Interrupt 45"]
886    IEL45 = 45,
887    #[doc = "ICU Interrupt 46"]
888    IEL46 = 46,
889    #[doc = "ICU Interrupt 47"]
890    IEL47 = 47,
891    #[doc = "ICU Interrupt 48"]
892    IEL48 = 48,
893    #[doc = "ICU Interrupt 49"]
894    IEL49 = 49,
895    #[doc = "ICU Interrupt 50"]
896    IEL50 = 50,
897    #[doc = "ICU Interrupt 51"]
898    IEL51 = 51,
899    #[doc = "ICU Interrupt 52"]
900    IEL52 = 52,
901    #[doc = "ICU Interrupt 53"]
902    IEL53 = 53,
903    #[doc = "ICU Interrupt 54"]
904    IEL54 = 54,
905    #[doc = "ICU Interrupt 55"]
906    IEL55 = 55,
907    #[doc = "ICU Interrupt 56"]
908    IEL56 = 56,
909    #[doc = "ICU Interrupt 57"]
910    IEL57 = 57,
911    #[doc = "ICU Interrupt 58"]
912    IEL58 = 58,
913    #[doc = "ICU Interrupt 59"]
914    IEL59 = 59,
915    #[doc = "ICU Interrupt 60"]
916    IEL60 = 60,
917    #[doc = "ICU Interrupt 61"]
918    IEL61 = 61,
919    #[doc = "ICU Interrupt 62"]
920    IEL62 = 62,
921    #[doc = "ICU Interrupt 63"]
922    IEL63 = 63,
923    #[doc = "ICU Interrupt 64"]
924    IEL64 = 64,
925    #[doc = "ICU Interrupt 65"]
926    IEL65 = 65,
927    #[doc = "ICU Interrupt 66"]
928    IEL66 = 66,
929    #[doc = "ICU Interrupt 67"]
930    IEL67 = 67,
931    #[doc = "ICU Interrupt 68"]
932    IEL68 = 68,
933    #[doc = "ICU Interrupt 69"]
934    IEL69 = 69,
935    #[doc = "ICU Interrupt 70"]
936    IEL70 = 70,
937    #[doc = "ICU Interrupt 71"]
938    IEL71 = 71,
939    #[doc = "ICU Interrupt 72"]
940    IEL72 = 72,
941    #[doc = "ICU Interrupt 73"]
942    IEL73 = 73,
943    #[doc = "ICU Interrupt 74"]
944    IEL74 = 74,
945    #[doc = "ICU Interrupt 75"]
946    IEL75 = 75,
947    #[doc = "ICU Interrupt 76"]
948    IEL76 = 76,
949    #[doc = "ICU Interrupt 77"]
950    IEL77 = 77,
951    #[doc = "ICU Interrupt 78"]
952    IEL78 = 78,
953    #[doc = "ICU Interrupt 79"]
954    IEL79 = 79,
955    #[doc = "ICU Interrupt 80"]
956    IEL80 = 80,
957    #[doc = "ICU Interrupt 81"]
958    IEL81 = 81,
959    #[doc = "ICU Interrupt 82"]
960    IEL82 = 82,
961    #[doc = "ICU Interrupt 83"]
962    IEL83 = 83,
963    #[doc = "ICU Interrupt 84"]
964    IEL84 = 84,
965    #[doc = "ICU Interrupt 85"]
966    IEL85 = 85,
967    #[doc = "ICU Interrupt 86"]
968    IEL86 = 86,
969    #[doc = "ICU Interrupt 87"]
970    IEL87 = 87,
971    #[doc = "ICU Interrupt 88"]
972    IEL88 = 88,
973    #[doc = "ICU Interrupt 89"]
974    IEL89 = 89,
975    #[doc = "ICU Interrupt 90"]
976    IEL90 = 90,
977    #[doc = "ICU Interrupt 91"]
978    IEL91 = 91,
979    #[doc = "ICU Interrupt 92"]
980    IEL92 = 92,
981    #[doc = "ICU Interrupt 93"]
982    IEL93 = 93,
983    #[doc = "ICU Interrupt 94"]
984    IEL94 = 94,
985    #[doc = "ICU Interrupt 95"]
986    IEL95 = 95,
987}
988unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
989    #[inline(always)]
990    fn number(self) -> u16 {
991        self as u16
992    }
993}
994#[allow(non_snake_case)]
995/// Required for compatibility with RTIC and other frameworks
996pub struct Peripherals {
997    #[cfg(feature = "rmpu")]
998    pub RMPU: self::Rmpu,
999    #[cfg(feature = "tzf")]
1000    pub TZF: self::Tzf,
1001    #[cfg(feature = "sram")]
1002    pub SRAM: self::Sram,
1003    #[cfg(feature = "bus")]
1004    pub BUS: self::Bus,
1005    #[cfg(feature = "dmac0")]
1006    pub DMAC0: self::Dmac0,
1007    #[cfg(feature = "dmac1")]
1008    pub DMAC1: self::Dmac0,
1009    #[cfg(feature = "dmac2")]
1010    pub DMAC2: self::Dmac0,
1011    #[cfg(feature = "dmac3")]
1012    pub DMAC3: self::Dmac0,
1013    #[cfg(feature = "dmac4")]
1014    pub DMAC4: self::Dmac0,
1015    #[cfg(feature = "dmac5")]
1016    pub DMAC5: self::Dmac0,
1017    #[cfg(feature = "dmac6")]
1018    pub DMAC6: self::Dmac0,
1019    #[cfg(feature = "dmac7")]
1020    pub DMAC7: self::Dmac0,
1021    #[cfg(feature = "dma")]
1022    pub DMA: self::Dma,
1023    #[cfg(feature = "dtc")]
1024    pub DTC: self::Dtc,
1025    #[cfg(feature = "icu")]
1026    pub ICU: self::Icu,
1027    #[cfg(feature = "cache")]
1028    pub CACHE: self::Cache,
1029    #[cfg(feature = "cpscu")]
1030    pub CPSCU: self::Cpscu,
1031    #[cfg(feature = "dbg")]
1032    pub DBG: self::Dbg,
1033    #[cfg(feature = "fcache")]
1034    pub FCACHE: self::Fcache,
1035    #[cfg(feature = "sysc")]
1036    pub SYSC: self::Sysc,
1037    #[cfg(feature = "port0")]
1038    pub PORT0: self::Port0,
1039    #[cfg(feature = "port1")]
1040    pub PORT1: self::Port1,
1041    #[cfg(feature = "port2")]
1042    pub PORT2: self::Port1,
1043    #[cfg(feature = "port3")]
1044    pub PORT3: self::Port1,
1045    #[cfg(feature = "port4")]
1046    pub PORT4: self::Port1,
1047    #[cfg(feature = "port5")]
1048    pub PORT5: self::Port0,
1049    #[cfg(feature = "port8")]
1050    pub PORT8: self::Port0,
1051    #[cfg(feature = "pfs")]
1052    pub PFS: self::Pfs,
1053    #[cfg(feature = "elc")]
1054    pub ELC: self::Elc,
1055    #[cfg(feature = "rtc")]
1056    pub RTC: self::Rtc,
1057    #[cfg(feature = "iwdt")]
1058    pub IWDT: self::Iwdt,
1059    #[cfg(feature = "wdt")]
1060    pub WDT: self::Wdt,
1061    #[cfg(feature = "cac")]
1062    pub CAC: self::Cac,
1063    #[cfg(feature = "mstp")]
1064    pub MSTP: self::Mstp,
1065    #[cfg(feature = "poeg")]
1066    pub POEG: self::Poeg,
1067    #[cfg(feature = "usbfs")]
1068    pub USBFS: self::Usbfs,
1069    #[cfg(feature = "ssie0")]
1070    pub SSIE0: self::Ssie0,
1071    #[cfg(feature = "cec")]
1072    pub CEC: self::Cec,
1073    #[cfg(feature = "canfd_b")]
1074    pub CANFD_B: self::CanfdB,
1075    #[cfg(feature = "pscu")]
1076    pub PSCU: self::Pscu,
1077    #[cfg(feature = "agtw0")]
1078    pub AGTW0: self::Agtw0,
1079    #[cfg(feature = "agtw1")]
1080    pub AGTW1: self::Agtw0,
1081    #[cfg(feature = "tsn")]
1082    pub TSN: self::Tsn,
1083    #[cfg(feature = "crc")]
1084    pub CRC: self::Crc,
1085    #[cfg(feature = "doc")]
1086    pub DOC: self::Doc,
1087    #[cfg(feature = "sci0")]
1088    pub SCI0: self::Sci0,
1089    #[cfg(feature = "sci9")]
1090    pub SCI9: self::Sci0,
1091    #[cfg(feature = "spi0")]
1092    pub SPI0: self::Spi0,
1093    #[cfg(feature = "spi1")]
1094    pub SPI1: self::Spi0,
1095    #[cfg(feature = "i3c")]
1096    pub I3C: self::I3C,
1097    #[cfg(feature = "eccmb")]
1098    pub ECCMB: self::Eccmb,
1099    #[cfg(feature = "gpt16e0")]
1100    pub GPT16E0: self::Gpt16E0,
1101    #[cfg(feature = "gpt16e1")]
1102    pub GPT16E1: self::Gpt16E0,
1103    #[cfg(feature = "gpt16e4")]
1104    pub GPT16E4: self::Gpt16E0,
1105    #[cfg(feature = "gpt16e5")]
1106    pub GPT16E5: self::Gpt16E0,
1107    #[cfg(feature = "gpt_ops")]
1108    pub GPT_OPS: self::GptOps,
1109    #[cfg(feature = "adc120")]
1110    pub ADC120: self::Adc120,
1111    #[cfg(feature = "dac12")]
1112    pub DAC12: self::Dac12,
1113    #[cfg(feature = "tsd")]
1114    pub TSD: self::Tsd,
1115    #[cfg(feature = "flad")]
1116    pub FLAD: self::Flad,
1117    #[cfg(feature = "faci")]
1118    pub FACI: self::Faci,
1119}
1120
1121impl Peripherals {
1122    /// Returns Peripheral struct multiple times
1123    /// Required for compatibility with RTIC and other frameworks
1124    #[inline]
1125    pub fn take() -> Option<Self> {
1126        Some(Self::steal())
1127    }
1128
1129    /// Returns Peripheral struct multiple times
1130    /// Required for compatibility with RTIC and other frameworks
1131    #[inline]
1132    pub fn steal() -> Self {
1133        Peripherals {
1134            #[cfg(feature = "rmpu")]
1135            RMPU: crate::RMPU,
1136            #[cfg(feature = "tzf")]
1137            TZF: crate::TZF,
1138            #[cfg(feature = "sram")]
1139            SRAM: crate::SRAM,
1140            #[cfg(feature = "bus")]
1141            BUS: crate::BUS,
1142            #[cfg(feature = "dmac0")]
1143            DMAC0: crate::DMAC0,
1144            #[cfg(feature = "dmac1")]
1145            DMAC1: crate::DMAC1,
1146            #[cfg(feature = "dmac2")]
1147            DMAC2: crate::DMAC2,
1148            #[cfg(feature = "dmac3")]
1149            DMAC3: crate::DMAC3,
1150            #[cfg(feature = "dmac4")]
1151            DMAC4: crate::DMAC4,
1152            #[cfg(feature = "dmac5")]
1153            DMAC5: crate::DMAC5,
1154            #[cfg(feature = "dmac6")]
1155            DMAC6: crate::DMAC6,
1156            #[cfg(feature = "dmac7")]
1157            DMAC7: crate::DMAC7,
1158            #[cfg(feature = "dma")]
1159            DMA: crate::DMA,
1160            #[cfg(feature = "dtc")]
1161            DTC: crate::DTC,
1162            #[cfg(feature = "icu")]
1163            ICU: crate::ICU,
1164            #[cfg(feature = "cache")]
1165            CACHE: crate::CACHE,
1166            #[cfg(feature = "cpscu")]
1167            CPSCU: crate::CPSCU,
1168            #[cfg(feature = "dbg")]
1169            DBG: crate::DBG,
1170            #[cfg(feature = "fcache")]
1171            FCACHE: crate::FCACHE,
1172            #[cfg(feature = "sysc")]
1173            SYSC: crate::SYSC,
1174            #[cfg(feature = "port0")]
1175            PORT0: crate::PORT0,
1176            #[cfg(feature = "port1")]
1177            PORT1: crate::PORT1,
1178            #[cfg(feature = "port2")]
1179            PORT2: crate::PORT2,
1180            #[cfg(feature = "port3")]
1181            PORT3: crate::PORT3,
1182            #[cfg(feature = "port4")]
1183            PORT4: crate::PORT4,
1184            #[cfg(feature = "port5")]
1185            PORT5: crate::PORT5,
1186            #[cfg(feature = "port8")]
1187            PORT8: crate::PORT8,
1188            #[cfg(feature = "pfs")]
1189            PFS: crate::PFS,
1190            #[cfg(feature = "elc")]
1191            ELC: crate::ELC,
1192            #[cfg(feature = "rtc")]
1193            RTC: crate::RTC,
1194            #[cfg(feature = "iwdt")]
1195            IWDT: crate::IWDT,
1196            #[cfg(feature = "wdt")]
1197            WDT: crate::WDT,
1198            #[cfg(feature = "cac")]
1199            CAC: crate::CAC,
1200            #[cfg(feature = "mstp")]
1201            MSTP: crate::MSTP,
1202            #[cfg(feature = "poeg")]
1203            POEG: crate::POEG,
1204            #[cfg(feature = "usbfs")]
1205            USBFS: crate::USBFS,
1206            #[cfg(feature = "ssie0")]
1207            SSIE0: crate::SSIE0,
1208            #[cfg(feature = "cec")]
1209            CEC: crate::CEC,
1210            #[cfg(feature = "canfd_b")]
1211            CANFD_B: crate::CANFD_B,
1212            #[cfg(feature = "pscu")]
1213            PSCU: crate::PSCU,
1214            #[cfg(feature = "agtw0")]
1215            AGTW0: crate::AGTW0,
1216            #[cfg(feature = "agtw1")]
1217            AGTW1: crate::AGTW1,
1218            #[cfg(feature = "tsn")]
1219            TSN: crate::TSN,
1220            #[cfg(feature = "crc")]
1221            CRC: crate::CRC,
1222            #[cfg(feature = "doc")]
1223            DOC: crate::DOC,
1224            #[cfg(feature = "sci0")]
1225            SCI0: crate::SCI0,
1226            #[cfg(feature = "sci9")]
1227            SCI9: crate::SCI9,
1228            #[cfg(feature = "spi0")]
1229            SPI0: crate::SPI0,
1230            #[cfg(feature = "spi1")]
1231            SPI1: crate::SPI1,
1232            #[cfg(feature = "i3c")]
1233            I3C: crate::I3C,
1234            #[cfg(feature = "eccmb")]
1235            ECCMB: crate::ECCMB,
1236            #[cfg(feature = "gpt16e0")]
1237            GPT16E0: crate::GPT16E0,
1238            #[cfg(feature = "gpt16e1")]
1239            GPT16E1: crate::GPT16E1,
1240            #[cfg(feature = "gpt16e4")]
1241            GPT16E4: crate::GPT16E4,
1242            #[cfg(feature = "gpt16e5")]
1243            GPT16E5: crate::GPT16E5,
1244            #[cfg(feature = "gpt_ops")]
1245            GPT_OPS: crate::GPT_OPS,
1246            #[cfg(feature = "adc120")]
1247            ADC120: crate::ADC120,
1248            #[cfg(feature = "dac12")]
1249            DAC12: crate::DAC12,
1250            #[cfg(feature = "tsd")]
1251            TSD: crate::TSD,
1252            #[cfg(feature = "flad")]
1253            FLAD: crate::FLAD,
1254            #[cfg(feature = "faci")]
1255            FACI: crate::FACI,
1256        }
1257    }
1258}
ra4e2_pac/lib.rs

ra4e2_pac/
lib.rs
