1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SYSTEM/FLASH"]
28unsafe impl ::core::marker::Send for super::Fcache {}
29unsafe impl ::core::marker::Sync for super::Fcache {}
30impl super::Fcache {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36 #[doc = "Flash Cache Enable Register"]
37 #[inline(always)]
38 pub const fn fcachee(
39 &self,
40 ) -> &'static crate::common::Reg<self::Fcachee_SPEC, crate::common::RW> {
41 unsafe {
42 crate::common::Reg::<self::Fcachee_SPEC, crate::common::RW>::from_ptr(
43 self._svd2pac_as_ptr().add(0usize),
44 )
45 }
46 }
47
48 #[doc = "Flash Cache Invalidate Register"]
49 #[inline(always)]
50 pub const fn fcacheiv(
51 &self,
52 ) -> &'static crate::common::Reg<self::Fcacheiv_SPEC, crate::common::RW> {
53 unsafe {
54 crate::common::Reg::<self::Fcacheiv_SPEC, crate::common::RW>::from_ptr(
55 self._svd2pac_as_ptr().add(4usize),
56 )
57 }
58 }
59
60 #[doc = "Flash Wait Cycle Register"]
61 #[inline(always)]
62 pub const fn flwt(&self) -> &'static crate::common::Reg<self::Flwt_SPEC, crate::common::RW> {
63 unsafe {
64 crate::common::Reg::<self::Flwt_SPEC, crate::common::RW>::from_ptr(
65 self._svd2pac_as_ptr().add(28usize),
66 )
67 }
68 }
69
70 #[doc = "Flash Security Attribution Register"]
71 #[inline(always)]
72 pub const fn fsar(&self) -> &'static crate::common::Reg<self::Fsar_SPEC, crate::common::RW> {
73 unsafe {
74 crate::common::Reg::<self::Fsar_SPEC, crate::common::RW>::from_ptr(
75 self._svd2pac_as_ptr().add(64usize),
76 )
77 }
78 }
79}
80#[doc(hidden)]
81#[derive(Copy, Clone, Eq, PartialEq)]
82pub struct Fcachee_SPEC;
83impl crate::sealed::RegSpec for Fcachee_SPEC {
84 type DataType = u16;
85}
86#[doc = "Flash Cache Enable Register"]
87pub type Fcachee = crate::RegValueT<Fcachee_SPEC>;
88
89impl Fcachee {
90 #[doc = "Flash Cache Enable"]
91 #[inline(always)]
92 pub fn fcacheen(
93 self,
94 ) -> crate::common::RegisterField<
95 0,
96 0x1,
97 1,
98 0,
99 fcachee::Fcacheen,
100 Fcachee_SPEC,
101 crate::common::RW,
102 > {
103 crate::common::RegisterField::<
104 0,
105 0x1,
106 1,
107 0,
108 fcachee::Fcacheen,
109 Fcachee_SPEC,
110 crate::common::RW,
111 >::from_register(self, 0)
112 }
113}
114impl ::core::default::Default for Fcachee {
115 #[inline(always)]
116 fn default() -> Fcachee {
117 <crate::RegValueT<Fcachee_SPEC> as RegisterValue<_>>::new(0)
118 }
119}
120pub mod fcachee {
121
122 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
123 pub struct Fcacheen_SPEC;
124 pub type Fcacheen = crate::EnumBitfieldStruct<u8, Fcacheen_SPEC>;
125 impl Fcacheen {
126 #[doc = "FCACHE is disabled"]
127 pub const _0: Self = Self::new(0);
128 #[doc = "FCACHE is enabled"]
129 pub const _1: Self = Self::new(1);
130 }
131}
132#[doc(hidden)]
133#[derive(Copy, Clone, Eq, PartialEq)]
134pub struct Fcacheiv_SPEC;
135impl crate::sealed::RegSpec for Fcacheiv_SPEC {
136 type DataType = u16;
137}
138#[doc = "Flash Cache Invalidate Register"]
139pub type Fcacheiv = crate::RegValueT<Fcacheiv_SPEC>;
140
141impl Fcacheiv {
142 #[doc = "Flash Cache Invalidate"]
143 #[inline(always)]
144 pub fn fcacheiv(
145 self,
146 ) -> crate::common::RegisterField<
147 0,
148 0x1,
149 1,
150 0,
151 fcacheiv::Fcacheiv,
152 Fcacheiv_SPEC,
153 crate::common::RW,
154 > {
155 crate::common::RegisterField::<
156 0,
157 0x1,
158 1,
159 0,
160 fcacheiv::Fcacheiv,
161 Fcacheiv_SPEC,
162 crate::common::RW,
163 >::from_register(self, 0)
164 }
165}
166impl ::core::default::Default for Fcacheiv {
167 #[inline(always)]
168 fn default() -> Fcacheiv {
169 <crate::RegValueT<Fcacheiv_SPEC> as RegisterValue<_>>::new(0)
170 }
171}
172pub mod fcacheiv {
173
174 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
175 pub struct Fcacheiv_SPEC;
176 pub type Fcacheiv = crate::EnumBitfieldStruct<u8, Fcacheiv_SPEC>;
177 impl Fcacheiv {
178 #[doc = "Read: Do not invalidate. Write: The setting is ignored."]
179 pub const _0: Self = Self::new(0);
180 #[doc = "Invalidate FCACHE is invalidated."]
181 pub const _1: Self = Self::new(1);
182 }
183}
184#[doc(hidden)]
185#[derive(Copy, Clone, Eq, PartialEq)]
186pub struct Flwt_SPEC;
187impl crate::sealed::RegSpec for Flwt_SPEC {
188 type DataType = u8;
189}
190#[doc = "Flash Wait Cycle Register"]
191pub type Flwt = crate::RegValueT<Flwt_SPEC>;
192
193impl Flwt {
194 #[doc = "Flash Wait Cycle"]
195 #[inline(always)]
196 pub fn flwt(
197 self,
198 ) -> crate::common::RegisterField<0, 0x7, 1, 0, flwt::Flwt, Flwt_SPEC, crate::common::RW> {
199 crate::common::RegisterField::<0,0x7,1,0,flwt::Flwt, Flwt_SPEC,crate::common::RW>::from_register(self,0)
200 }
201}
202impl ::core::default::Default for Flwt {
203 #[inline(always)]
204 fn default() -> Flwt {
205 <crate::RegValueT<Flwt_SPEC> as RegisterValue<_>>::new(0)
206 }
207}
208pub mod flwt {
209
210 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
211 pub struct Flwt_SPEC;
212 pub type Flwt = crate::EnumBitfieldStruct<u8, Flwt_SPEC>;
213 impl Flwt {
214 #[doc = "0 wait (ICLK ≤ 50 MHz)"]
215 pub const _000: Self = Self::new(0);
216 #[doc = "1 wait (ICLK > 50 MHz)"]
217 pub const _001: Self = Self::new(1);
218 #[doc = "2 wait Not specified"]
219 pub const _010: Self = Self::new(2);
220 #[doc = "3 wait Not specified"]
221 pub const _011: Self = Self::new(3);
222 #[doc = "Setting prohibited"]
223 pub const OTHERS: Self = Self::new(0);
224 }
225}
226#[doc(hidden)]
227#[derive(Copy, Clone, Eq, PartialEq)]
228pub struct Fsar_SPEC;
229impl crate::sealed::RegSpec for Fsar_SPEC {
230 type DataType = u16;
231}
232#[doc = "Flash Security Attribution Register"]
233pub type Fsar = crate::RegValueT<Fsar_SPEC>;
234
235impl Fsar {
236 #[doc = "FLWT Security Attribution"]
237 #[inline(always)]
238 pub fn flwtsa(
239 self,
240 ) -> crate::common::RegisterField<0, 0x1, 1, 0, fsar::Flwtsa, Fsar_SPEC, crate::common::RW>
241 {
242 crate::common::RegisterField::<0,0x1,1,0,fsar::Flwtsa, Fsar_SPEC,crate::common::RW>::from_register(self,0)
243 }
244 #[doc = "FCKMHZ Security Attribution"]
245 #[inline(always)]
246 pub fn fckmhzsa(
247 self,
248 ) -> crate::common::RegisterField<8, 0x1, 1, 0, fsar::Fckmhzsa, Fsar_SPEC, crate::common::RW>
249 {
250 crate::common::RegisterField::<8,0x1,1,0,fsar::Fckmhzsa, Fsar_SPEC,crate::common::RW>::from_register(self,0)
251 }
252}
253impl ::core::default::Default for Fsar {
254 #[inline(always)]
255 fn default() -> Fsar {
256 <crate::RegValueT<Fsar_SPEC> as RegisterValue<_>>::new(65535)
257 }
258}
259pub mod fsar {
260
261 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
262 pub struct Flwtsa_SPEC;
263 pub type Flwtsa = crate::EnumBitfieldStruct<u8, Flwtsa_SPEC>;
264 impl Flwtsa {
265 #[doc = "Secure"]
266 pub const _0: Self = Self::new(0);
267 #[doc = "Non-Secure"]
268 pub const _1: Self = Self::new(1);
269 }
270 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
271 pub struct Fckmhzsa_SPEC;
272 pub type Fckmhzsa = crate::EnumBitfieldStruct<u8, Fckmhzsa_SPEC>;
273 impl Fckmhzsa {
274 #[doc = "Secure"]
275 pub const _0: Self = Self::new(0);
276 #[doc = "Non-Secure"]
277 pub const _1: Self = Self::new(1);
278 }
279}