1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Debug Function"]
28unsafe impl ::core::marker::Send for super::Dbg {}
29unsafe impl ::core::marker::Sync for super::Dbg {}
30impl super::Dbg {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36 #[doc = "Debug Status Register"]
37 #[inline(always)]
38 pub const fn dbgstr(&self) -> &'static crate::common::Reg<self::Dbgstr_SPEC, crate::common::R> {
39 unsafe {
40 crate::common::Reg::<self::Dbgstr_SPEC, crate::common::R>::from_ptr(
41 self._svd2pac_as_ptr().add(0usize),
42 )
43 }
44 }
45
46 #[doc = "Debug Stop Control Register"]
47 #[inline(always)]
48 pub const fn dbgstopcr(
49 &self,
50 ) -> &'static crate::common::Reg<self::Dbgstopcr_SPEC, crate::common::RW> {
51 unsafe {
52 crate::common::Reg::<self::Dbgstopcr_SPEC, crate::common::RW>::from_ptr(
53 self._svd2pac_as_ptr().add(16usize),
54 )
55 }
56 }
57}
58#[doc(hidden)]
59#[derive(Copy, Clone, Eq, PartialEq)]
60pub struct Dbgstr_SPEC;
61impl crate::sealed::RegSpec for Dbgstr_SPEC {
62 type DataType = u32;
63}
64#[doc = "Debug Status Register"]
65pub type Dbgstr = crate::RegValueT<Dbgstr_SPEC>;
66
67impl Dbgstr {
68 #[doc = "Debug power-up request"]
69 #[inline(always)]
70 pub fn cdbgpwrupreq(
71 self,
72 ) -> crate::common::RegisterField<
73 28,
74 0x1,
75 1,
76 0,
77 dbgstr::Cdbgpwrupreq,
78 Dbgstr_SPEC,
79 crate::common::R,
80 > {
81 crate::common::RegisterField::<
82 28,
83 0x1,
84 1,
85 0,
86 dbgstr::Cdbgpwrupreq,
87 Dbgstr_SPEC,
88 crate::common::R,
89 >::from_register(self, 0)
90 }
91 #[doc = "Debug power-up acknowledge"]
92 #[inline(always)]
93 pub fn cdbgpwrupack(
94 self,
95 ) -> crate::common::RegisterField<
96 29,
97 0x1,
98 1,
99 0,
100 dbgstr::Cdbgpwrupack,
101 Dbgstr_SPEC,
102 crate::common::R,
103 > {
104 crate::common::RegisterField::<
105 29,
106 0x1,
107 1,
108 0,
109 dbgstr::Cdbgpwrupack,
110 Dbgstr_SPEC,
111 crate::common::R,
112 >::from_register(self, 0)
113 }
114}
115impl ::core::default::Default for Dbgstr {
116 #[inline(always)]
117 fn default() -> Dbgstr {
118 <crate::RegValueT<Dbgstr_SPEC> as RegisterValue<_>>::new(0)
119 }
120}
121pub mod dbgstr {
122
123 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
124 pub struct Cdbgpwrupreq_SPEC;
125 pub type Cdbgpwrupreq = crate::EnumBitfieldStruct<u8, Cdbgpwrupreq_SPEC>;
126 impl Cdbgpwrupreq {
127 #[doc = "OCD is not requesting debug power up"]
128 pub const _0: Self = Self::new(0);
129 #[doc = "OCD is requesting debug power up"]
130 pub const _1: Self = Self::new(1);
131 }
132 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
133 pub struct Cdbgpwrupack_SPEC;
134 pub type Cdbgpwrupack = crate::EnumBitfieldStruct<u8, Cdbgpwrupack_SPEC>;
135 impl Cdbgpwrupack {
136 #[doc = "Debug power-up request is not acknowledged"]
137 pub const _0: Self = Self::new(0);
138 #[doc = "Debug power-up request is acknowledged"]
139 pub const _1: Self = Self::new(1);
140 }
141}
142#[doc(hidden)]
143#[derive(Copy, Clone, Eq, PartialEq)]
144pub struct Dbgstopcr_SPEC;
145impl crate::sealed::RegSpec for Dbgstopcr_SPEC {
146 type DataType = u32;
147}
148#[doc = "Debug Stop Control Register"]
149pub type Dbgstopcr = crate::RegValueT<Dbgstopcr_SPEC>;
150
151impl Dbgstopcr {
152 #[doc = "Mask bit for IWDT reset/interrupt in the OCD run mode"]
153 #[inline(always)]
154 pub fn dbgstop_iwdt(
155 self,
156 ) -> crate::common::RegisterField<
157 0,
158 0x1,
159 1,
160 0,
161 dbgstopcr::DbgstopIwdt,
162 Dbgstopcr_SPEC,
163 crate::common::RW,
164 > {
165 crate::common::RegisterField::<
166 0,
167 0x1,
168 1,
169 0,
170 dbgstopcr::DbgstopIwdt,
171 Dbgstopcr_SPEC,
172 crate::common::RW,
173 >::from_register(self, 0)
174 }
175 #[doc = "Mask bit for WDT reset/interrupt in the OCD run mode"]
176 #[inline(always)]
177 pub fn dbgstop_wdt(
178 self,
179 ) -> crate::common::RegisterField<
180 1,
181 0x1,
182 1,
183 0,
184 dbgstopcr::DbgstopWdt,
185 Dbgstopcr_SPEC,
186 crate::common::RW,
187 > {
188 crate::common::RegisterField::<
189 1,
190 0x1,
191 1,
192 0,
193 dbgstopcr::DbgstopWdt,
194 Dbgstopcr_SPEC,
195 crate::common::RW,
196 >::from_register(self, 0)
197 }
198 #[doc = "Mask bit for LVD0 reset"]
199 #[inline(always)]
200 pub fn dbgstop_lvd0(
201 self,
202 ) -> crate::common::RegisterField<
203 16,
204 0x1,
205 1,
206 0,
207 dbgstopcr::DbgstopLvd0,
208 Dbgstopcr_SPEC,
209 crate::common::RW,
210 > {
211 crate::common::RegisterField::<
212 16,
213 0x1,
214 1,
215 0,
216 dbgstopcr::DbgstopLvd0,
217 Dbgstopcr_SPEC,
218 crate::common::RW,
219 >::from_register(self, 0)
220 }
221 #[doc = "Mask bit for LVD1 reset/interrupt"]
222 #[inline(always)]
223 pub fn dbgstop_lvd1(
224 self,
225 ) -> crate::common::RegisterField<
226 17,
227 0x1,
228 1,
229 0,
230 dbgstopcr::DbgstopLvd1,
231 Dbgstopcr_SPEC,
232 crate::common::RW,
233 > {
234 crate::common::RegisterField::<
235 17,
236 0x1,
237 1,
238 0,
239 dbgstopcr::DbgstopLvd1,
240 Dbgstopcr_SPEC,
241 crate::common::RW,
242 >::from_register(self, 0)
243 }
244 #[doc = "Mask bit for LVD2 reset/interrupt"]
245 #[inline(always)]
246 pub fn dbgstop_lvd2(
247 self,
248 ) -> crate::common::RegisterField<
249 18,
250 0x1,
251 1,
252 0,
253 dbgstopcr::DbgstopLvd2,
254 Dbgstopcr_SPEC,
255 crate::common::RW,
256 > {
257 crate::common::RegisterField::<
258 18,
259 0x1,
260 1,
261 0,
262 dbgstopcr::DbgstopLvd2,
263 Dbgstopcr_SPEC,
264 crate::common::RW,
265 >::from_register(self, 0)
266 }
267 #[doc = "Mask bit for SRAM parity error reset/interrupt"]
268 #[inline(always)]
269 pub fn dbgstop_rper(
270 self,
271 ) -> crate::common::RegisterField<
272 24,
273 0x1,
274 1,
275 0,
276 dbgstopcr::DbgstopRper,
277 Dbgstopcr_SPEC,
278 crate::common::RW,
279 > {
280 crate::common::RegisterField::<
281 24,
282 0x1,
283 1,
284 0,
285 dbgstopcr::DbgstopRper,
286 Dbgstopcr_SPEC,
287 crate::common::RW,
288 >::from_register(self, 0)
289 }
290 #[doc = "Mask bit for SRAM ECC error reset/interrupt"]
291 #[inline(always)]
292 pub fn dbgstop_reccr(
293 self,
294 ) -> crate::common::RegisterField<
295 25,
296 0x1,
297 1,
298 0,
299 dbgstopcr::DbgstopReccr,
300 Dbgstopcr_SPEC,
301 crate::common::RW,
302 > {
303 crate::common::RegisterField::<
304 25,
305 0x1,
306 1,
307 0,
308 dbgstopcr::DbgstopReccr,
309 Dbgstopcr_SPEC,
310 crate::common::RW,
311 >::from_register(self, 0)
312 }
313 #[doc = "Mask bit for Cache SRAM parity error reset/interrupt"]
314 #[inline(always)]
315 pub fn dbgstop_cper(
316 self,
317 ) -> crate::common::RegisterField<
318 31,
319 0x1,
320 1,
321 0,
322 dbgstopcr::DbgstopCper,
323 Dbgstopcr_SPEC,
324 crate::common::RW,
325 > {
326 crate::common::RegisterField::<
327 31,
328 0x1,
329 1,
330 0,
331 dbgstopcr::DbgstopCper,
332 Dbgstopcr_SPEC,
333 crate::common::RW,
334 >::from_register(self, 0)
335 }
336}
337impl ::core::default::Default for Dbgstopcr {
338 #[inline(always)]
339 fn default() -> Dbgstopcr {
340 <crate::RegValueT<Dbgstopcr_SPEC> as RegisterValue<_>>::new(3)
341 }
342}
343pub mod dbgstopcr {
344
345 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
346 pub struct DbgstopIwdt_SPEC;
347 pub type DbgstopIwdt = crate::EnumBitfieldStruct<u8, DbgstopIwdt_SPEC>;
348 impl DbgstopIwdt {
349 #[doc = "Enable IWDT reset/interrupt"]
350 pub const _0: Self = Self::new(0);
351 #[doc = "Mask IWDT reset/interrupt and stop IWDT counter"]
352 pub const _1: Self = Self::new(1);
353 }
354 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
355 pub struct DbgstopWdt_SPEC;
356 pub type DbgstopWdt = crate::EnumBitfieldStruct<u8, DbgstopWdt_SPEC>;
357 impl DbgstopWdt {
358 #[doc = "Enable WDT reset/interrupt"]
359 pub const _0: Self = Self::new(0);
360 #[doc = "Mask WDT reset/interrupt and stop WDT counter"]
361 pub const _1: Self = Self::new(1);
362 }
363 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
364 pub struct DbgstopLvd0_SPEC;
365 pub type DbgstopLvd0 = crate::EnumBitfieldStruct<u8, DbgstopLvd0_SPEC>;
366 impl DbgstopLvd0 {
367 #[doc = "Enable LVD0 reset"]
368 pub const _0: Self = Self::new(0);
369 #[doc = "Mask LVD0 reset"]
370 pub const _1: Self = Self::new(1);
371 }
372 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
373 pub struct DbgstopLvd1_SPEC;
374 pub type DbgstopLvd1 = crate::EnumBitfieldStruct<u8, DbgstopLvd1_SPEC>;
375 impl DbgstopLvd1 {
376 #[doc = "Enable LVD1 reset/interrupt"]
377 pub const _0: Self = Self::new(0);
378 #[doc = "Mask LVD1 reset/interrupt"]
379 pub const _1: Self = Self::new(1);
380 }
381 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
382 pub struct DbgstopLvd2_SPEC;
383 pub type DbgstopLvd2 = crate::EnumBitfieldStruct<u8, DbgstopLvd2_SPEC>;
384 impl DbgstopLvd2 {
385 #[doc = "Enable LVD2 reset/interrupt"]
386 pub const _0: Self = Self::new(0);
387 #[doc = "Mask LVD2 reset/interrupt"]
388 pub const _1: Self = Self::new(1);
389 }
390 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
391 pub struct DbgstopRper_SPEC;
392 pub type DbgstopRper = crate::EnumBitfieldStruct<u8, DbgstopRper_SPEC>;
393 impl DbgstopRper {
394 #[doc = "Enable SRAM parity error reset/interrupt"]
395 pub const _0: Self = Self::new(0);
396 #[doc = "Mask SRAM parity error reset/interrupt"]
397 pub const _1: Self = Self::new(1);
398 }
399 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
400 pub struct DbgstopReccr_SPEC;
401 pub type DbgstopReccr = crate::EnumBitfieldStruct<u8, DbgstopReccr_SPEC>;
402 impl DbgstopReccr {
403 #[doc = "Enable SRAM ECC error reset/interrupt"]
404 pub const _0: Self = Self::new(0);
405 #[doc = "Mask SRAM ECC error reset/interrupt"]
406 pub const _1: Self = Self::new(1);
407 }
408 #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
409 pub struct DbgstopCper_SPEC;
410 pub type DbgstopCper = crate::EnumBitfieldStruct<u8, DbgstopCper_SPEC>;
411 impl DbgstopCper {
412 #[doc = "Enable Cache SRAM parity error reset/interrupt"]
413 pub const _0: Self = Self::new(0);
414 #[doc = "Mask Cache SRAM parity error reset/interrupt"]
415 pub const _1: Self = Self::new(1);
416 }
417}