ra4e2_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.30.00, with svd2pac 0.4.0 on Sat, 12 Apr 2025 22:15:35 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36    #[doc = "Slave Bus Control Register"]
37    #[inline(always)]
38    pub const fn busscntfhbiu(
39        &self,
40    ) -> &'static crate::common::Reg<self::Busscntfhbiu_SPEC, crate::common::RW> {
41        unsafe {
42            crate::common::Reg::<self::Busscntfhbiu_SPEC, crate::common::RW>::from_ptr(
43                self._svd2pac_as_ptr().add(4352usize),
44            )
45        }
46    }
47
48    #[doc = "Slave Bus Control Register"]
49    #[inline(always)]
50    pub const fn busscntflbiu(
51        &self,
52    ) -> &'static crate::common::Reg<self::Busscntflbiu_SPEC, crate::common::RW> {
53        unsafe {
54            crate::common::Reg::<self::Busscntflbiu_SPEC, crate::common::RW>::from_ptr(
55                self._svd2pac_as_ptr().add(4356usize),
56            )
57        }
58    }
59
60    #[doc = "Slave Bus Control Register"]
61    #[inline(always)]
62    pub const fn busscnts0biu(
63        &self,
64    ) -> &'static crate::common::Reg<self::Busscnts0Biu_SPEC, crate::common::RW> {
65        unsafe {
66            crate::common::Reg::<self::Busscnts0Biu_SPEC, crate::common::RW>::from_ptr(
67                self._svd2pac_as_ptr().add(4368usize),
68            )
69        }
70    }
71
72    #[doc = "Slave Bus Control Register"]
73    #[inline(always)]
74    pub const fn busscntpsbiu(
75        &self,
76    ) -> &'static crate::common::Reg<self::Busscntpsbiu_SPEC, crate::common::RW> {
77        unsafe {
78            crate::common::Reg::<self::Busscntpsbiu_SPEC, crate::common::RW>::from_ptr(
79                self._svd2pac_as_ptr().add(4384usize),
80            )
81        }
82    }
83
84    #[doc = "Slave Bus Control Register"]
85    #[inline(always)]
86    pub const fn busscntplbiu(
87        &self,
88    ) -> &'static crate::common::Reg<self::Busscntplbiu_SPEC, crate::common::RW> {
89        unsafe {
90            crate::common::Reg::<self::Busscntplbiu_SPEC, crate::common::RW>::from_ptr(
91                self._svd2pac_as_ptr().add(4400usize),
92            )
93        }
94    }
95
96    #[doc = "Slave Bus Control Register"]
97    #[inline(always)]
98    pub const fn busscntphbiu(
99        &self,
100    ) -> &'static crate::common::Reg<self::Busscntphbiu_SPEC, crate::common::RW> {
101        unsafe {
102            crate::common::Reg::<self::Busscntphbiu_SPEC, crate::common::RW>::from_ptr(
103                self._svd2pac_as_ptr().add(4404usize),
104            )
105        }
106    }
107
108    #[doc = "BUS Error Address Register"]
109    #[inline(always)]
110    pub const fn buserradd(
111        &self,
112    ) -> &'static crate::common::ClusterRegisterArray<
113        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
114        3,
115        0x10,
116    > {
117        unsafe {
118            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1800usize))
119        }
120    }
121
122    #[doc = "BUS Error Read Write Register"]
123    #[inline(always)]
124    pub const fn buserrrw(
125        &self,
126    ) -> &'static crate::common::ClusterRegisterArray<
127        crate::common::Reg<self::Buserrrw_SPEC, crate::common::RW>,
128        3,
129        0x10,
130    > {
131        unsafe {
132            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1804usize))
133        }
134    }
135
136    #[doc = "BUS TZF Error Address Register"]
137    #[inline(always)]
138    pub const fn btzferradd(
139        &self,
140    ) -> &'static crate::common::ClusterRegisterArray<
141        crate::common::Reg<self::Btzferradd_SPEC, crate::common::R>,
142        3,
143        0x10,
144    > {
145        unsafe {
146            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1900usize))
147        }
148    }
149
150    #[doc = "BUS TZF Error Read Write Register"]
151    #[inline(always)]
152    pub const fn btzferrrw(
153        &self,
154    ) -> &'static crate::common::ClusterRegisterArray<
155        crate::common::Reg<self::Btzferrrw_SPEC, crate::common::RW>,
156        3,
157        0x10,
158    > {
159        unsafe {
160            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1904usize))
161        }
162    }
163
164    #[doc = "BUS Error Status Register %s"]
165    #[inline(always)]
166    pub const fn buserrstat(
167        &self,
168    ) -> &'static crate::common::ClusterRegisterArray<
169        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
170        3,
171        0x10,
172    > {
173        unsafe {
174            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a00usize))
175        }
176    }
177
178    #[doc = "BUS Error Clear Register %s"]
179    #[inline(always)]
180    pub const fn buserrclr(
181        &self,
182    ) -> &'static crate::common::ClusterRegisterArray<
183        crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW>,
184        3,
185        0x10,
186    > {
187        unsafe {
188            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a08usize))
189        }
190    }
191
192    #[doc = "DMAC/DTC Error Status Register"]
193    #[inline(always)]
194    pub const fn dmacdtcerrstat(
195        &self,
196    ) -> &'static crate::common::Reg<self::Dmacdtcerrstat_SPEC, crate::common::R> {
197        unsafe {
198            crate::common::Reg::<self::Dmacdtcerrstat_SPEC, crate::common::R>::from_ptr(
199                self._svd2pac_as_ptr().add(6692usize),
200            )
201        }
202    }
203
204    #[doc = "DMAC/DTC Error Clear Register"]
205    #[inline(always)]
206    pub const fn dmacdtcerrclr(
207        &self,
208    ) -> &'static crate::common::Reg<self::Dmacdtcerrclr_SPEC, crate::common::RW> {
209        unsafe {
210            crate::common::Reg::<self::Dmacdtcerrclr_SPEC, crate::common::RW>::from_ptr(
211                self._svd2pac_as_ptr().add(6700usize),
212            )
213        }
214    }
215}
216#[doc(hidden)]
217#[derive(Copy, Clone, Eq, PartialEq)]
218pub struct Busscntfhbiu_SPEC;
219impl crate::sealed::RegSpec for Busscntfhbiu_SPEC {
220    type DataType = u16;
221}
222#[doc = "Slave Bus Control Register"]
223pub type Busscntfhbiu = crate::RegValueT<Busscntfhbiu_SPEC>;
224
225impl Busscntfhbiu {
226    #[doc = "Arbitration Select for two masters"]
227    #[inline(always)]
228    pub fn arbs(
229        self,
230    ) -> crate::common::RegisterField<
231        0,
232        0x3,
233        1,
234        0,
235        busscntfhbiu::Arbs,
236        Busscntfhbiu_SPEC,
237        crate::common::RW,
238    > {
239        crate::common::RegisterField::<
240            0,
241            0x3,
242            1,
243            0,
244            busscntfhbiu::Arbs,
245            Busscntfhbiu_SPEC,
246            crate::common::RW,
247        >::from_register(self, 0)
248    }
249}
250impl ::core::default::Default for Busscntfhbiu {
251    #[inline(always)]
252    fn default() -> Busscntfhbiu {
253        <crate::RegValueT<Busscntfhbiu_SPEC> as RegisterValue<_>>::new(0)
254    }
255}
256pub mod busscntfhbiu {
257
258    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
259    pub struct Arbs_SPEC;
260    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
261    impl Arbs {
262        #[doc = "DMAC/DTC > CPU"]
263        pub const _00: Self = Self::new(0);
264        #[doc = "DMAC/DTC ↔ CPU"]
265        pub const _01: Self = Self::new(1);
266        #[doc = "Setting prohibited"]
267        pub const OTHERS: Self = Self::new(0);
268    }
269}
270#[doc(hidden)]
271#[derive(Copy, Clone, Eq, PartialEq)]
272pub struct Busscntflbiu_SPEC;
273impl crate::sealed::RegSpec for Busscntflbiu_SPEC {
274    type DataType = u16;
275}
276#[doc = "Slave Bus Control Register"]
277pub type Busscntflbiu = crate::RegValueT<Busscntflbiu_SPEC>;
278
279impl Busscntflbiu {
280    #[doc = "Arbitration Select for two masters"]
281    #[inline(always)]
282    pub fn arbs(
283        self,
284    ) -> crate::common::RegisterField<
285        0,
286        0x3,
287        1,
288        0,
289        busscntflbiu::Arbs,
290        Busscntflbiu_SPEC,
291        crate::common::RW,
292    > {
293        crate::common::RegisterField::<
294            0,
295            0x3,
296            1,
297            0,
298            busscntflbiu::Arbs,
299            Busscntflbiu_SPEC,
300            crate::common::RW,
301        >::from_register(self, 0)
302    }
303}
304impl ::core::default::Default for Busscntflbiu {
305    #[inline(always)]
306    fn default() -> Busscntflbiu {
307        <crate::RegValueT<Busscntflbiu_SPEC> as RegisterValue<_>>::new(0)
308    }
309}
310pub mod busscntflbiu {
311
312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
313    pub struct Arbs_SPEC;
314    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
315    impl Arbs {
316        #[doc = "DMAC/DTC > CPU"]
317        pub const _00: Self = Self::new(0);
318        #[doc = "DMAC/DTC ↔ CPU"]
319        pub const _01: Self = Self::new(1);
320        #[doc = "Setting prohibited"]
321        pub const OTHERS: Self = Self::new(0);
322    }
323}
324#[doc(hidden)]
325#[derive(Copy, Clone, Eq, PartialEq)]
326pub struct Busscnts0Biu_SPEC;
327impl crate::sealed::RegSpec for Busscnts0Biu_SPEC {
328    type DataType = u16;
329}
330#[doc = "Slave Bus Control Register"]
331pub type Busscnts0Biu = crate::RegValueT<Busscnts0Biu_SPEC>;
332
333impl Busscnts0Biu {
334    #[doc = "Arbitration Select for two masters"]
335    #[inline(always)]
336    pub fn arbs(
337        self,
338    ) -> crate::common::RegisterField<
339        0,
340        0x3,
341        1,
342        0,
343        busscnts0biu::Arbs,
344        Busscnts0Biu_SPEC,
345        crate::common::RW,
346    > {
347        crate::common::RegisterField::<
348            0,
349            0x3,
350            1,
351            0,
352            busscnts0biu::Arbs,
353            Busscnts0Biu_SPEC,
354            crate::common::RW,
355        >::from_register(self, 0)
356    }
357}
358impl ::core::default::Default for Busscnts0Biu {
359    #[inline(always)]
360    fn default() -> Busscnts0Biu {
361        <crate::RegValueT<Busscnts0Biu_SPEC> as RegisterValue<_>>::new(0)
362    }
363}
364pub mod busscnts0biu {
365
366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
367    pub struct Arbs_SPEC;
368    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
369    impl Arbs {
370        #[doc = "DMAC/DTC > CPU"]
371        pub const _00: Self = Self::new(0);
372        #[doc = "DMAC/DTC ↔ CPU"]
373        pub const _01: Self = Self::new(1);
374        #[doc = "Setting prohibited"]
375        pub const OTHERS: Self = Self::new(0);
376    }
377}
378#[doc(hidden)]
379#[derive(Copy, Clone, Eq, PartialEq)]
380pub struct Busscntpsbiu_SPEC;
381impl crate::sealed::RegSpec for Busscntpsbiu_SPEC {
382    type DataType = u16;
383}
384#[doc = "Slave Bus Control Register"]
385pub type Busscntpsbiu = crate::RegValueT<Busscntpsbiu_SPEC>;
386
387impl Busscntpsbiu {
388    #[doc = "Arbitration Select for two masters"]
389    #[inline(always)]
390    pub fn arbs(
391        self,
392    ) -> crate::common::RegisterField<
393        0,
394        0x1,
395        1,
396        0,
397        busscntpsbiu::Arbs,
398        Busscntpsbiu_SPEC,
399        crate::common::RW,
400    > {
401        crate::common::RegisterField::<
402            0,
403            0x1,
404            1,
405            0,
406            busscntpsbiu::Arbs,
407            Busscntpsbiu_SPEC,
408            crate::common::RW,
409        >::from_register(self, 0)
410    }
411}
412impl ::core::default::Default for Busscntpsbiu {
413    #[inline(always)]
414    fn default() -> Busscntpsbiu {
415        <crate::RegValueT<Busscntpsbiu_SPEC> as RegisterValue<_>>::new(0)
416    }
417}
418pub mod busscntpsbiu {
419
420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
421    pub struct Arbs_SPEC;
422    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
423    impl Arbs {
424        #[doc = "DMAC/DTC > CPU"]
425        pub const _0: Self = Self::new(0);
426        #[doc = "DMAC/DTC ↔ CPU"]
427        pub const _1: Self = Self::new(1);
428    }
429}
430#[doc(hidden)]
431#[derive(Copy, Clone, Eq, PartialEq)]
432pub struct Busscntplbiu_SPEC;
433impl crate::sealed::RegSpec for Busscntplbiu_SPEC {
434    type DataType = u16;
435}
436#[doc = "Slave Bus Control Register"]
437pub type Busscntplbiu = crate::RegValueT<Busscntplbiu_SPEC>;
438
439impl Busscntplbiu {
440    #[doc = "Arbitration Select for two masters"]
441    #[inline(always)]
442    pub fn arbs(
443        self,
444    ) -> crate::common::RegisterField<
445        0,
446        0x1,
447        1,
448        0,
449        busscntplbiu::Arbs,
450        Busscntplbiu_SPEC,
451        crate::common::RW,
452    > {
453        crate::common::RegisterField::<
454            0,
455            0x1,
456            1,
457            0,
458            busscntplbiu::Arbs,
459            Busscntplbiu_SPEC,
460            crate::common::RW,
461        >::from_register(self, 0)
462    }
463}
464impl ::core::default::Default for Busscntplbiu {
465    #[inline(always)]
466    fn default() -> Busscntplbiu {
467        <crate::RegValueT<Busscntplbiu_SPEC> as RegisterValue<_>>::new(0)
468    }
469}
470pub mod busscntplbiu {
471
472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
473    pub struct Arbs_SPEC;
474    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
475    impl Arbs {
476        #[doc = "DMAC/DTC > CPU"]
477        pub const _0: Self = Self::new(0);
478        #[doc = "DMAC/DTC ↔ CPU"]
479        pub const _1: Self = Self::new(1);
480    }
481}
482#[doc(hidden)]
483#[derive(Copy, Clone, Eq, PartialEq)]
484pub struct Busscntphbiu_SPEC;
485impl crate::sealed::RegSpec for Busscntphbiu_SPEC {
486    type DataType = u16;
487}
488#[doc = "Slave Bus Control Register"]
489pub type Busscntphbiu = crate::RegValueT<Busscntphbiu_SPEC>;
490
491impl Busscntphbiu {
492    #[doc = "Arbitration Select for two masters"]
493    #[inline(always)]
494    pub fn arbs(
495        self,
496    ) -> crate::common::RegisterField<
497        0,
498        0x1,
499        1,
500        0,
501        busscntphbiu::Arbs,
502        Busscntphbiu_SPEC,
503        crate::common::RW,
504    > {
505        crate::common::RegisterField::<
506            0,
507            0x1,
508            1,
509            0,
510            busscntphbiu::Arbs,
511            Busscntphbiu_SPEC,
512            crate::common::RW,
513        >::from_register(self, 0)
514    }
515}
516impl ::core::default::Default for Busscntphbiu {
517    #[inline(always)]
518    fn default() -> Busscntphbiu {
519        <crate::RegValueT<Busscntphbiu_SPEC> as RegisterValue<_>>::new(0)
520    }
521}
522pub mod busscntphbiu {
523
524    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
525    pub struct Arbs_SPEC;
526    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
527    impl Arbs {
528        #[doc = "DMAC/DTC > CPU"]
529        pub const _0: Self = Self::new(0);
530        #[doc = "DMAC/DTC ↔ CPU"]
531        pub const _1: Self = Self::new(1);
532    }
533}
534#[doc(hidden)]
535#[derive(Copy, Clone, Eq, PartialEq)]
536pub struct Buserradd_SPEC;
537impl crate::sealed::RegSpec for Buserradd_SPEC {
538    type DataType = u32;
539}
540#[doc = "BUS Error Address Register"]
541pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
542
543impl Buserradd {
544    #[doc = "Bus Error Address"]
545    #[inline(always)]
546    pub fn berad(
547        self,
548    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, Buserradd_SPEC, crate::common::R>
549    {
550        crate::common::RegisterField::<0,0xffffffff,1,0,u32, Buserradd_SPEC,crate::common::R>::from_register(self,0)
551    }
552}
553impl ::core::default::Default for Buserradd {
554    #[inline(always)]
555    fn default() -> Buserradd {
556        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
557    }
558}
559
560#[doc(hidden)]
561#[derive(Copy, Clone, Eq, PartialEq)]
562pub struct Buserrrw_SPEC;
563impl crate::sealed::RegSpec for Buserrrw_SPEC {
564    type DataType = u8;
565}
566#[doc = "BUS Error Read Write Register"]
567pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
568
569impl Buserrrw {
570    #[doc = "Error Access Read/Write Status"]
571    #[inline(always)]
572    pub fn rwstat(
573        self,
574    ) -> crate::common::RegisterField<0, 0x1, 1, 0, buserrrw::Rwstat, Buserrrw_SPEC, crate::common::R>
575    {
576        crate::common::RegisterField::<
577            0,
578            0x1,
579            1,
580            0,
581            buserrrw::Rwstat,
582            Buserrrw_SPEC,
583            crate::common::R,
584        >::from_register(self, 0)
585    }
586}
587impl ::core::default::Default for Buserrrw {
588    #[inline(always)]
589    fn default() -> Buserrrw {
590        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
591    }
592}
593pub mod buserrrw {
594
595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
596    pub struct Rwstat_SPEC;
597    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
598    impl Rwstat {
599        #[doc = "Read access"]
600        pub const _0: Self = Self::new(0);
601        #[doc = "Write access"]
602        pub const _1: Self = Self::new(1);
603    }
604}
605#[doc(hidden)]
606#[derive(Copy, Clone, Eq, PartialEq)]
607pub struct Btzferradd_SPEC;
608impl crate::sealed::RegSpec for Btzferradd_SPEC {
609    type DataType = u32;
610}
611#[doc = "BUS TZF Error Address Register"]
612pub type Btzferradd = crate::RegValueT<Btzferradd_SPEC>;
613
614impl Btzferradd {
615    #[doc = "Bus TrustZone Filter Error Address"]
616    #[inline(always)]
617    pub fn btzferad(
618        self,
619    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, Btzferradd_SPEC, crate::common::R>
620    {
621        crate::common::RegisterField::<0,0xffffffff,1,0,u32, Btzferradd_SPEC,crate::common::R>::from_register(self,0)
622    }
623}
624impl ::core::default::Default for Btzferradd {
625    #[inline(always)]
626    fn default() -> Btzferradd {
627        <crate::RegValueT<Btzferradd_SPEC> as RegisterValue<_>>::new(0)
628    }
629}
630
631#[doc(hidden)]
632#[derive(Copy, Clone, Eq, PartialEq)]
633pub struct Btzferrrw_SPEC;
634impl crate::sealed::RegSpec for Btzferrrw_SPEC {
635    type DataType = u8;
636}
637#[doc = "BUS TZF Error Read Write Register"]
638pub type Btzferrrw = crate::RegValueT<Btzferrrw_SPEC>;
639
640impl Btzferrrw {
641    #[doc = "TrustZone filter error access Read/Write Status"]
642    #[inline(always)]
643    pub fn trwstat(
644        self,
645    ) -> crate::common::RegisterField<
646        0,
647        0x1,
648        1,
649        0,
650        btzferrrw::Trwstat,
651        Btzferrrw_SPEC,
652        crate::common::R,
653    > {
654        crate::common::RegisterField::<
655            0,
656            0x1,
657            1,
658            0,
659            btzferrrw::Trwstat,
660            Btzferrrw_SPEC,
661            crate::common::R,
662        >::from_register(self, 0)
663    }
664}
665impl ::core::default::Default for Btzferrrw {
666    #[inline(always)]
667    fn default() -> Btzferrrw {
668        <crate::RegValueT<Btzferrrw_SPEC> as RegisterValue<_>>::new(0)
669    }
670}
671pub mod btzferrrw {
672
673    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
674    pub struct Trwstat_SPEC;
675    pub type Trwstat = crate::EnumBitfieldStruct<u8, Trwstat_SPEC>;
676    impl Trwstat {
677        #[doc = "Read access"]
678        pub const _0: Self = Self::new(0);
679        #[doc = "Write access"]
680        pub const _1: Self = Self::new(1);
681    }
682}
683#[doc(hidden)]
684#[derive(Copy, Clone, Eq, PartialEq)]
685pub struct Buserrstat_SPEC;
686impl crate::sealed::RegSpec for Buserrstat_SPEC {
687    type DataType = u8;
688}
689#[doc = "BUS Error Status Register %s"]
690pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
691
692impl Buserrstat {
693    #[doc = "Slave bus Error Status"]
694    #[inline(always)]
695    pub fn slerrstat(
696        self,
697    ) -> crate::common::RegisterField<
698        0,
699        0x1,
700        1,
701        0,
702        buserrstat::Slerrstat,
703        Buserrstat_SPEC,
704        crate::common::R,
705    > {
706        crate::common::RegisterField::<
707            0,
708            0x1,
709            1,
710            0,
711            buserrstat::Slerrstat,
712            Buserrstat_SPEC,
713            crate::common::R,
714        >::from_register(self, 0)
715    }
716    #[doc = "Slave TrustZone filter Error Status"]
717    #[inline(always)]
718    pub fn sterrstat(
719        self,
720    ) -> crate::common::RegisterField<
721        1,
722        0x1,
723        1,
724        0,
725        buserrstat::Sterrstat,
726        Buserrstat_SPEC,
727        crate::common::R,
728    > {
729        crate::common::RegisterField::<
730            1,
731            0x1,
732            1,
733            0,
734            buserrstat::Sterrstat,
735            Buserrstat_SPEC,
736            crate::common::R,
737        >::from_register(self, 0)
738    }
739    #[doc = "Master MPU Error Status"]
740    #[inline(always)]
741    pub fn mmerrstat(
742        self,
743    ) -> crate::common::RegisterField<
744        3,
745        0x1,
746        1,
747        0,
748        buserrstat::Mmerrstat,
749        Buserrstat_SPEC,
750        crate::common::R,
751    > {
752        crate::common::RegisterField::<
753            3,
754            0x1,
755            1,
756            0,
757            buserrstat::Mmerrstat,
758            Buserrstat_SPEC,
759            crate::common::R,
760        >::from_register(self, 0)
761    }
762    #[doc = "Illegal address access Error Status"]
763    #[inline(always)]
764    pub fn ilerrstat(
765        self,
766    ) -> crate::common::RegisterField<
767        4,
768        0x1,
769        1,
770        0,
771        buserrstat::Ilerrstat,
772        Buserrstat_SPEC,
773        crate::common::R,
774    > {
775        crate::common::RegisterField::<
776            4,
777            0x1,
778            1,
779            0,
780            buserrstat::Ilerrstat,
781            Buserrstat_SPEC,
782            crate::common::R,
783        >::from_register(self, 0)
784    }
785}
786impl ::core::default::Default for Buserrstat {
787    #[inline(always)]
788    fn default() -> Buserrstat {
789        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
790    }
791}
792pub mod buserrstat {
793
794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
795    pub struct Slerrstat_SPEC;
796    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
797    impl Slerrstat {
798        #[doc = "No error occurred"]
799        pub const _0: Self = Self::new(0);
800        #[doc = "Error occurred"]
801        pub const _1: Self = Self::new(1);
802    }
803    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
804    pub struct Sterrstat_SPEC;
805    pub type Sterrstat = crate::EnumBitfieldStruct<u8, Sterrstat_SPEC>;
806    impl Sterrstat {
807        #[doc = "No error occurred"]
808        pub const _0: Self = Self::new(0);
809        #[doc = "Error occurred"]
810        pub const _1: Self = Self::new(1);
811    }
812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
813    pub struct Mmerrstat_SPEC;
814    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
815    impl Mmerrstat {
816        #[doc = "No error occurred"]
817        pub const _0: Self = Self::new(0);
818        #[doc = "Error occurred"]
819        pub const _1: Self = Self::new(1);
820    }
821    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
822    pub struct Ilerrstat_SPEC;
823    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
824    impl Ilerrstat {
825        #[doc = "No error occurred"]
826        pub const _0: Self = Self::new(0);
827        #[doc = "Error occurred"]
828        pub const _1: Self = Self::new(1);
829    }
830}
831#[doc(hidden)]
832#[derive(Copy, Clone, Eq, PartialEq)]
833pub struct Buserrclr_SPEC;
834impl crate::sealed::RegSpec for Buserrclr_SPEC {
835    type DataType = u8;
836}
837#[doc = "BUS Error Clear Register %s"]
838pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
839
840impl Buserrclr {
841    #[doc = "Slave bus Error Clear"]
842    #[inline(always)]
843    pub fn slerrclr(
844        self,
845    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
846        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
847    }
848    #[doc = "Slave TrustZone filter Error Clear"]
849    #[inline(always)]
850    pub fn sterrclr(
851        self,
852    ) -> crate::common::RegisterFieldBool<1, 1, 0, Buserrclr_SPEC, crate::common::RW> {
853        crate::common::RegisterFieldBool::<1,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
854    }
855    #[doc = "Master MPU Error Clear"]
856    #[inline(always)]
857    pub fn mmerrclr(
858        self,
859    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
860        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
861    }
862    #[doc = "Illegal Address Access Error Clear"]
863    #[inline(always)]
864    pub fn ilerrclr(
865        self,
866    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
867        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
868    }
869}
870impl ::core::default::Default for Buserrclr {
871    #[inline(always)]
872    fn default() -> Buserrclr {
873        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
874    }
875}
876
877#[doc(hidden)]
878#[derive(Copy, Clone, Eq, PartialEq)]
879pub struct Dmacdtcerrstat_SPEC;
880impl crate::sealed::RegSpec for Dmacdtcerrstat_SPEC {
881    type DataType = u8;
882}
883#[doc = "DMAC/DTC Error Status Register"]
884pub type Dmacdtcerrstat = crate::RegValueT<Dmacdtcerrstat_SPEC>;
885
886impl Dmacdtcerrstat {
887    #[doc = "Master TrustZone Filter Error Status"]
888    #[inline(always)]
889    pub fn mterrstat(
890        self,
891    ) -> crate::common::RegisterField<
892        0,
893        0x1,
894        1,
895        0,
896        dmacdtcerrstat::Mterrstat,
897        Dmacdtcerrstat_SPEC,
898        crate::common::R,
899    > {
900        crate::common::RegisterField::<
901            0,
902            0x1,
903            1,
904            0,
905            dmacdtcerrstat::Mterrstat,
906            Dmacdtcerrstat_SPEC,
907            crate::common::R,
908        >::from_register(self, 0)
909    }
910}
911impl ::core::default::Default for Dmacdtcerrstat {
912    #[inline(always)]
913    fn default() -> Dmacdtcerrstat {
914        <crate::RegValueT<Dmacdtcerrstat_SPEC> as RegisterValue<_>>::new(0)
915    }
916}
917pub mod dmacdtcerrstat {
918
919    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
920    pub struct Mterrstat_SPEC;
921    pub type Mterrstat = crate::EnumBitfieldStruct<u8, Mterrstat_SPEC>;
922    impl Mterrstat {
923        #[doc = "No error occurred"]
924        pub const _0: Self = Self::new(0);
925        #[doc = "Error occurred"]
926        pub const _1: Self = Self::new(1);
927    }
928}
929#[doc(hidden)]
930#[derive(Copy, Clone, Eq, PartialEq)]
931pub struct Dmacdtcerrclr_SPEC;
932impl crate::sealed::RegSpec for Dmacdtcerrclr_SPEC {
933    type DataType = u8;
934}
935#[doc = "DMAC/DTC Error Clear Register"]
936pub type Dmacdtcerrclr = crate::RegValueT<Dmacdtcerrclr_SPEC>;
937
938impl Dmacdtcerrclr {
939    #[doc = "Master TrustZone filter Error Clear"]
940    #[inline(always)]
941    pub fn mterrclr(
942        self,
943    ) -> crate::common::RegisterFieldBool<0, 1, 0, Dmacdtcerrclr_SPEC, crate::common::RW> {
944        crate::common::RegisterFieldBool::<0,1,0,Dmacdtcerrclr_SPEC,crate::common::RW>::from_register(self,0)
945    }
946}
947impl ::core::default::Default for Dmacdtcerrclr {
948    #[inline(always)]
949    fn default() -> Dmacdtcerrclr {
950        <crate::RegValueT<Dmacdtcerrclr_SPEC> as RegisterValue<_>>::new(0)
951    }
952}
ra4e2_pac/bus.rs

ra4e2_pac/
bus.rs
