ra4e1/qspi/
sfmssc.rs

1#[doc = "Register `SFMSSC` reader"]
2pub struct R(crate::R<SFMSSC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SFMSSC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SFMSSC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SFMSSC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SFMSSC` writer"]
17pub struct W(crate::W<SFMSSC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SFMSSC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SFMSSC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SFMSSC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SFMSW` reader - Minimum high-level width select for QSSL signal"]
38pub type SFMSW_R = crate::FieldReader<u8, SFMSW_A>;
39#[doc = "Minimum high-level width select for QSSL signal\n\nValue on reset: 7"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SFMSW_A {
43    #[doc = "0: 1 QSPCLK"]
44    _0X0 = 0,
45    #[doc = "1: 2 QSPCLK"]
46    _0X1 = 1,
47    #[doc = "2: 3 QSPCLK"]
48    _0X2 = 2,
49    #[doc = "3: 4 QSPCLK"]
50    _0X3 = 3,
51    #[doc = "4: 5 QSPCLK"]
52    _0X4 = 4,
53    #[doc = "5: 6 QSPCLK"]
54    _0X5 = 5,
55    #[doc = "6: 7 QSPCLK"]
56    _0X6 = 6,
57    #[doc = "7: 8 QSPCLK"]
58    _0X7 = 7,
59    #[doc = "8: 9 QSPCLK"]
60    _0X8 = 8,
61    #[doc = "9: 10 QSPCLK"]
62    _0X9 = 9,
63    #[doc = "10: 11 QSPCLK"]
64    _0X_A = 10,
65    #[doc = "11: 12 QSPCLK"]
66    _0X_B = 11,
67    #[doc = "12: 13 QSPCLK"]
68    _0X_C = 12,
69    #[doc = "13: 14 QSPCLK"]
70    _0X_D = 13,
71    #[doc = "14: 15 QSPCLK"]
72    _0X_E = 14,
73    #[doc = "15: 16 QSPCLK"]
74    _0X_F = 15,
75}
76impl From<SFMSW_A> for u8 {
77    #[inline(always)]
78    fn from(variant: SFMSW_A) -> Self {
79        variant as _
80    }
81}
82impl SFMSW_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> SFMSW_A {
86        match self.bits {
87            0 => SFMSW_A::_0X0,
88            1 => SFMSW_A::_0X1,
89            2 => SFMSW_A::_0X2,
90            3 => SFMSW_A::_0X3,
91            4 => SFMSW_A::_0X4,
92            5 => SFMSW_A::_0X5,
93            6 => SFMSW_A::_0X6,
94            7 => SFMSW_A::_0X7,
95            8 => SFMSW_A::_0X8,
96            9 => SFMSW_A::_0X9,
97            10 => SFMSW_A::_0X_A,
98            11 => SFMSW_A::_0X_B,
99            12 => SFMSW_A::_0X_C,
100            13 => SFMSW_A::_0X_D,
101            14 => SFMSW_A::_0X_E,
102            15 => SFMSW_A::_0X_F,
103            _ => unreachable!(),
104        }
105    }
106    #[doc = "Checks if the value of the field is `_0X0`"]
107    #[inline(always)]
108    pub fn is_0x0(&self) -> bool {
109        *self == SFMSW_A::_0X0
110    }
111    #[doc = "Checks if the value of the field is `_0X1`"]
112    #[inline(always)]
113    pub fn is_0x1(&self) -> bool {
114        *self == SFMSW_A::_0X1
115    }
116    #[doc = "Checks if the value of the field is `_0X2`"]
117    #[inline(always)]
118    pub fn is_0x2(&self) -> bool {
119        *self == SFMSW_A::_0X2
120    }
121    #[doc = "Checks if the value of the field is `_0X3`"]
122    #[inline(always)]
123    pub fn is_0x3(&self) -> bool {
124        *self == SFMSW_A::_0X3
125    }
126    #[doc = "Checks if the value of the field is `_0X4`"]
127    #[inline(always)]
128    pub fn is_0x4(&self) -> bool {
129        *self == SFMSW_A::_0X4
130    }
131    #[doc = "Checks if the value of the field is `_0X5`"]
132    #[inline(always)]
133    pub fn is_0x5(&self) -> bool {
134        *self == SFMSW_A::_0X5
135    }
136    #[doc = "Checks if the value of the field is `_0X6`"]
137    #[inline(always)]
138    pub fn is_0x6(&self) -> bool {
139        *self == SFMSW_A::_0X6
140    }
141    #[doc = "Checks if the value of the field is `_0X7`"]
142    #[inline(always)]
143    pub fn is_0x7(&self) -> bool {
144        *self == SFMSW_A::_0X7
145    }
146    #[doc = "Checks if the value of the field is `_0X8`"]
147    #[inline(always)]
148    pub fn is_0x8(&self) -> bool {
149        *self == SFMSW_A::_0X8
150    }
151    #[doc = "Checks if the value of the field is `_0X9`"]
152    #[inline(always)]
153    pub fn is_0x9(&self) -> bool {
154        *self == SFMSW_A::_0X9
155    }
156    #[doc = "Checks if the value of the field is `_0X_A`"]
157    #[inline(always)]
158    pub fn is_0x_a(&self) -> bool {
159        *self == SFMSW_A::_0X_A
160    }
161    #[doc = "Checks if the value of the field is `_0X_B`"]
162    #[inline(always)]
163    pub fn is_0x_b(&self) -> bool {
164        *self == SFMSW_A::_0X_B
165    }
166    #[doc = "Checks if the value of the field is `_0X_C`"]
167    #[inline(always)]
168    pub fn is_0x_c(&self) -> bool {
169        *self == SFMSW_A::_0X_C
170    }
171    #[doc = "Checks if the value of the field is `_0X_D`"]
172    #[inline(always)]
173    pub fn is_0x_d(&self) -> bool {
174        *self == SFMSW_A::_0X_D
175    }
176    #[doc = "Checks if the value of the field is `_0X_E`"]
177    #[inline(always)]
178    pub fn is_0x_e(&self) -> bool {
179        *self == SFMSW_A::_0X_E
180    }
181    #[doc = "Checks if the value of the field is `_0X_F`"]
182    #[inline(always)]
183    pub fn is_0x_f(&self) -> bool {
184        *self == SFMSW_A::_0X_F
185    }
186}
187#[doc = "Field `SFMSW` writer - Minimum high-level width select for QSSL signal"]
188pub type SFMSW_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, SFMSSC_SPEC, u8, SFMSW_A, 4, O>;
189impl<'a, const O: u8> SFMSW_W<'a, O> {
190    #[doc = "1 QSPCLK"]
191    #[inline(always)]
192    pub fn _0x0(self) -> &'a mut W {
193        self.variant(SFMSW_A::_0X0)
194    }
195    #[doc = "2 QSPCLK"]
196    #[inline(always)]
197    pub fn _0x1(self) -> &'a mut W {
198        self.variant(SFMSW_A::_0X1)
199    }
200    #[doc = "3 QSPCLK"]
201    #[inline(always)]
202    pub fn _0x2(self) -> &'a mut W {
203        self.variant(SFMSW_A::_0X2)
204    }
205    #[doc = "4 QSPCLK"]
206    #[inline(always)]
207    pub fn _0x3(self) -> &'a mut W {
208        self.variant(SFMSW_A::_0X3)
209    }
210    #[doc = "5 QSPCLK"]
211    #[inline(always)]
212    pub fn _0x4(self) -> &'a mut W {
213        self.variant(SFMSW_A::_0X4)
214    }
215    #[doc = "6 QSPCLK"]
216    #[inline(always)]
217    pub fn _0x5(self) -> &'a mut W {
218        self.variant(SFMSW_A::_0X5)
219    }
220    #[doc = "7 QSPCLK"]
221    #[inline(always)]
222    pub fn _0x6(self) -> &'a mut W {
223        self.variant(SFMSW_A::_0X6)
224    }
225    #[doc = "8 QSPCLK"]
226    #[inline(always)]
227    pub fn _0x7(self) -> &'a mut W {
228        self.variant(SFMSW_A::_0X7)
229    }
230    #[doc = "9 QSPCLK"]
231    #[inline(always)]
232    pub fn _0x8(self) -> &'a mut W {
233        self.variant(SFMSW_A::_0X8)
234    }
235    #[doc = "10 QSPCLK"]
236    #[inline(always)]
237    pub fn _0x9(self) -> &'a mut W {
238        self.variant(SFMSW_A::_0X9)
239    }
240    #[doc = "11 QSPCLK"]
241    #[inline(always)]
242    pub fn _0x_a(self) -> &'a mut W {
243        self.variant(SFMSW_A::_0X_A)
244    }
245    #[doc = "12 QSPCLK"]
246    #[inline(always)]
247    pub fn _0x_b(self) -> &'a mut W {
248        self.variant(SFMSW_A::_0X_B)
249    }
250    #[doc = "13 QSPCLK"]
251    #[inline(always)]
252    pub fn _0x_c(self) -> &'a mut W {
253        self.variant(SFMSW_A::_0X_C)
254    }
255    #[doc = "14 QSPCLK"]
256    #[inline(always)]
257    pub fn _0x_d(self) -> &'a mut W {
258        self.variant(SFMSW_A::_0X_D)
259    }
260    #[doc = "15 QSPCLK"]
261    #[inline(always)]
262    pub fn _0x_e(self) -> &'a mut W {
263        self.variant(SFMSW_A::_0X_E)
264    }
265    #[doc = "16 QSPCLK"]
266    #[inline(always)]
267    pub fn _0x_f(self) -> &'a mut W {
268        self.variant(SFMSW_A::_0X_F)
269    }
270}
271#[doc = "Field `SFMSHD` reader - QSSL Signal Hold Time"]
272pub type SFMSHD_R = crate::BitReader<SFMSHD_A>;
273#[doc = "QSSL Signal Hold Time\n\nValue on reset: 1"]
274#[derive(Clone, Copy, Debug, PartialEq, Eq)]
275pub enum SFMSHD_A {
276    #[doc = "0: QSSL outputs high after 0.5 QSPCLK cycles from the last rising edge of QSPCLK."]
277    _0 = 0,
278    #[doc = "1: QSSL outputs high after 1.5 QSPCLK cycles from the last rising edge of QSPCLK."]
279    _1 = 1,
280}
281impl From<SFMSHD_A> for bool {
282    #[inline(always)]
283    fn from(variant: SFMSHD_A) -> Self {
284        variant as u8 != 0
285    }
286}
287impl SFMSHD_R {
288    #[doc = "Get enumerated values variant"]
289    #[inline(always)]
290    pub fn variant(&self) -> SFMSHD_A {
291        match self.bits {
292            false => SFMSHD_A::_0,
293            true => SFMSHD_A::_1,
294        }
295    }
296    #[doc = "Checks if the value of the field is `_0`"]
297    #[inline(always)]
298    pub fn is_0(&self) -> bool {
299        *self == SFMSHD_A::_0
300    }
301    #[doc = "Checks if the value of the field is `_1`"]
302    #[inline(always)]
303    pub fn is_1(&self) -> bool {
304        *self == SFMSHD_A::_1
305    }
306}
307#[doc = "Field `SFMSHD` writer - QSSL Signal Hold Time"]
308pub type SFMSHD_W<'a, const O: u8> = crate::BitWriter<'a, u32, SFMSSC_SPEC, SFMSHD_A, O>;
309impl<'a, const O: u8> SFMSHD_W<'a, O> {
310    #[doc = "QSSL outputs high after 0.5 QSPCLK cycles from the last rising edge of QSPCLK."]
311    #[inline(always)]
312    pub fn _0(self) -> &'a mut W {
313        self.variant(SFMSHD_A::_0)
314    }
315    #[doc = "QSSL outputs high after 1.5 QSPCLK cycles from the last rising edge of QSPCLK."]
316    #[inline(always)]
317    pub fn _1(self) -> &'a mut W {
318        self.variant(SFMSHD_A::_1)
319    }
320}
321#[doc = "Field `SFMSLD` reader - QSSL Signal Setup Time"]
322pub type SFMSLD_R = crate::BitReader<SFMSLD_A>;
323#[doc = "QSSL Signal Setup Time\n\nValue on reset: 1"]
324#[derive(Clone, Copy, Debug, PartialEq, Eq)]
325pub enum SFMSLD_A {
326    #[doc = "0: QSSL outputs low before 0.5 QSPCLK cycles from the first rising edge of QSPCLK."]
327    _0 = 0,
328    #[doc = "1: QSSL outputs low before 1.5 QSPCLK cycles from the first rising edge of QSPCLK."]
329    _1 = 1,
330}
331impl From<SFMSLD_A> for bool {
332    #[inline(always)]
333    fn from(variant: SFMSLD_A) -> Self {
334        variant as u8 != 0
335    }
336}
337impl SFMSLD_R {
338    #[doc = "Get enumerated values variant"]
339    #[inline(always)]
340    pub fn variant(&self) -> SFMSLD_A {
341        match self.bits {
342            false => SFMSLD_A::_0,
343            true => SFMSLD_A::_1,
344        }
345    }
346    #[doc = "Checks if the value of the field is `_0`"]
347    #[inline(always)]
348    pub fn is_0(&self) -> bool {
349        *self == SFMSLD_A::_0
350    }
351    #[doc = "Checks if the value of the field is `_1`"]
352    #[inline(always)]
353    pub fn is_1(&self) -> bool {
354        *self == SFMSLD_A::_1
355    }
356}
357#[doc = "Field `SFMSLD` writer - QSSL Signal Setup Time"]
358pub type SFMSLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, SFMSSC_SPEC, SFMSLD_A, O>;
359impl<'a, const O: u8> SFMSLD_W<'a, O> {
360    #[doc = "QSSL outputs low before 0.5 QSPCLK cycles from the first rising edge of QSPCLK."]
361    #[inline(always)]
362    pub fn _0(self) -> &'a mut W {
363        self.variant(SFMSLD_A::_0)
364    }
365    #[doc = "QSSL outputs low before 1.5 QSPCLK cycles from the first rising edge of QSPCLK."]
366    #[inline(always)]
367    pub fn _1(self) -> &'a mut W {
368        self.variant(SFMSLD_A::_1)
369    }
370}
371impl R {
372    #[doc = "Bits 0:3 - Minimum high-level width select for QSSL signal"]
373    #[inline(always)]
374    pub fn sfmsw(&self) -> SFMSW_R {
375        SFMSW_R::new((self.bits & 0x0f) as u8)
376    }
377    #[doc = "Bit 4 - QSSL Signal Hold Time"]
378    #[inline(always)]
379    pub fn sfmshd(&self) -> SFMSHD_R {
380        SFMSHD_R::new(((self.bits >> 4) & 1) != 0)
381    }
382    #[doc = "Bit 5 - QSSL Signal Setup Time"]
383    #[inline(always)]
384    pub fn sfmsld(&self) -> SFMSLD_R {
385        SFMSLD_R::new(((self.bits >> 5) & 1) != 0)
386    }
387}
388impl W {
389    #[doc = "Bits 0:3 - Minimum high-level width select for QSSL signal"]
390    #[inline(always)]
391    #[must_use]
392    pub fn sfmsw(&mut self) -> SFMSW_W<0> {
393        SFMSW_W::new(self)
394    }
395    #[doc = "Bit 4 - QSSL Signal Hold Time"]
396    #[inline(always)]
397    #[must_use]
398    pub fn sfmshd(&mut self) -> SFMSHD_W<4> {
399        SFMSHD_W::new(self)
400    }
401    #[doc = "Bit 5 - QSSL Signal Setup Time"]
402    #[inline(always)]
403    #[must_use]
404    pub fn sfmsld(&mut self) -> SFMSLD_W<5> {
405        SFMSLD_W::new(self)
406    }
407    #[doc = "Writes raw bits to the register."]
408    #[inline(always)]
409    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
410        self.0.bits(bits);
411        self
412    }
413}
414#[doc = "Chip Selection Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sfmssc](index.html) module"]
415pub struct SFMSSC_SPEC;
416impl crate::RegisterSpec for SFMSSC_SPEC {
417    type Ux = u32;
418}
419#[doc = "`read()` method returns [sfmssc::R](R) reader structure"]
420impl crate::Readable for SFMSSC_SPEC {
421    type Reader = R;
422}
423#[doc = "`write(|w| ..)` method takes [sfmssc::W](W) writer structure"]
424impl crate::Writable for SFMSSC_SPEC {
425    type Writer = W;
426    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
427    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
428}
429#[doc = "`reset()` method sets SFMSSC to value 0x37"]
430impl crate::Resettable for SFMSSC_SPEC {
431    const RESET_VALUE: Self::Ux = 0x37;
432}
ra4e1/qspi/sfmssc.rs

ra4e1/qspi/
sfmssc.rs
