Skip to main content

ra4e1_pac/
usbfs.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:04:18 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"USB 2.0 Full-Speed Module"]
28unsafe impl ::core::marker::Send for super::Usbfs {}
29unsafe impl ::core::marker::Sync for super::Usbfs {}
30impl super::Usbfs {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "System Configuration Control Register"]
38    #[inline(always)]
39    pub const fn syscfg(
40        &self,
41    ) -> &'static crate::common::Reg<self::Syscfg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::Syscfg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "System Configuration Status Register 0"]
50    #[inline(always)]
51    pub const fn syssts0(
52        &self,
53    ) -> &'static crate::common::Reg<self::Syssts0_SPEC, crate::common::R> {
54        unsafe {
55            crate::common::Reg::<self::Syssts0_SPEC, crate::common::R>::from_ptr(
56                self._svd2pac_as_ptr().add(4usize),
57            )
58        }
59    }
60
61    #[doc = "Device State Control Register 0"]
62    #[inline(always)]
63    pub const fn dvstctr0(
64        &self,
65    ) -> &'static crate::common::Reg<self::Dvstctr0_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Dvstctr0_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(8usize),
69            )
70        }
71    }
72
73    #[doc = "CFIFO Port Register"]
74    #[inline(always)]
75    pub const fn cfifo(&self) -> &'static crate::common::Reg<self::Cfifo_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Cfifo_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(20usize),
79            )
80        }
81    }
82
83    #[doc = "CFIFO Port Register"]
84    #[inline(always)]
85    pub const fn cfifol(
86        &self,
87    ) -> &'static crate::common::Reg<self::Cfifol_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Cfifol_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(20usize),
91            )
92        }
93    }
94
95    #[doc = "D%sFIFO Port Register"]
96    #[inline(always)]
97    pub const fn dfifo(
98        &self,
99    ) -> &'static crate::common::ClusterRegisterArray<
100        crate::common::Reg<self::Dfifo_SPEC, crate::common::RW>,
101        2,
102        0x4,
103    > {
104        unsafe {
105            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x18usize))
106        }
107    }
108    #[inline(always)]
109    pub const fn d0fifo(&self) -> &'static crate::common::Reg<self::Dfifo_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Dfifo_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(0x18usize),
113            )
114        }
115    }
116    #[inline(always)]
117    pub const fn d1fifo(&self) -> &'static crate::common::Reg<self::Dfifo_SPEC, crate::common::RW> {
118        unsafe {
119            crate::common::Reg::<self::Dfifo_SPEC, crate::common::RW>::from_ptr(
120                self._svd2pac_as_ptr().add(0x1cusize),
121            )
122        }
123    }
124
125    #[doc = "D%sFIFO Port Register"]
126    #[inline(always)]
127    pub const fn dfifol(
128        &self,
129    ) -> &'static crate::common::ClusterRegisterArray<
130        crate::common::Reg<self::Dfifol_SPEC, crate::common::RW>,
131        2,
132        0x4,
133    > {
134        unsafe {
135            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x18usize))
136        }
137    }
138    #[inline(always)]
139    pub const fn d0fifol(
140        &self,
141    ) -> &'static crate::common::Reg<self::Dfifol_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Dfifol_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(0x18usize),
145            )
146        }
147    }
148    #[inline(always)]
149    pub const fn d1fifol(
150        &self,
151    ) -> &'static crate::common::Reg<self::Dfifol_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Dfifol_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(0x1cusize),
155            )
156        }
157    }
158
159    #[doc = "CFIFO Port Select Register"]
160    #[inline(always)]
161    pub const fn cfifosel(
162        &self,
163    ) -> &'static crate::common::Reg<self::Cfifosel_SPEC, crate::common::RW> {
164        unsafe {
165            crate::common::Reg::<self::Cfifosel_SPEC, crate::common::RW>::from_ptr(
166                self._svd2pac_as_ptr().add(32usize),
167            )
168        }
169    }
170
171    #[doc = "CFIFO Port Control Register"]
172    #[inline(always)]
173    pub const fn cfifoctr(
174        &self,
175    ) -> &'static crate::common::Reg<self::Cfifoctr_SPEC, crate::common::RW> {
176        unsafe {
177            crate::common::Reg::<self::Cfifoctr_SPEC, crate::common::RW>::from_ptr(
178                self._svd2pac_as_ptr().add(34usize),
179            )
180        }
181    }
182
183    #[doc = "D%sFIFO Port Select Register"]
184    #[inline(always)]
185    pub const fn dfifosel(
186        &self,
187    ) -> &'static crate::common::ClusterRegisterArray<
188        crate::common::Reg<self::Dfifosel_SPEC, crate::common::RW>,
189        2,
190        0x4,
191    > {
192        unsafe {
193            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x28usize))
194        }
195    }
196    #[inline(always)]
197    pub const fn d0fifosel(
198        &self,
199    ) -> &'static crate::common::Reg<self::Dfifosel_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Dfifosel_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(0x28usize),
203            )
204        }
205    }
206    #[inline(always)]
207    pub const fn d1fifosel(
208        &self,
209    ) -> &'static crate::common::Reg<self::Dfifosel_SPEC, crate::common::RW> {
210        unsafe {
211            crate::common::Reg::<self::Dfifosel_SPEC, crate::common::RW>::from_ptr(
212                self._svd2pac_as_ptr().add(0x2cusize),
213            )
214        }
215    }
216
217    #[doc = "D%sFIFO Port Control Register"]
218    #[inline(always)]
219    pub const fn dfifoctr(
220        &self,
221    ) -> &'static crate::common::ClusterRegisterArray<
222        crate::common::Reg<self::Dfifoctr_SPEC, crate::common::RW>,
223        2,
224        0x4,
225    > {
226        unsafe {
227            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2ausize))
228        }
229    }
230    #[inline(always)]
231    pub const fn d0fifoctr(
232        &self,
233    ) -> &'static crate::common::Reg<self::Dfifoctr_SPEC, crate::common::RW> {
234        unsafe {
235            crate::common::Reg::<self::Dfifoctr_SPEC, crate::common::RW>::from_ptr(
236                self._svd2pac_as_ptr().add(0x2ausize),
237            )
238        }
239    }
240    #[inline(always)]
241    pub const fn d1fifoctr(
242        &self,
243    ) -> &'static crate::common::Reg<self::Dfifoctr_SPEC, crate::common::RW> {
244        unsafe {
245            crate::common::Reg::<self::Dfifoctr_SPEC, crate::common::RW>::from_ptr(
246                self._svd2pac_as_ptr().add(0x2eusize),
247            )
248        }
249    }
250
251    #[doc = "Interrupt Enable Register 0"]
252    #[inline(always)]
253    pub const fn intenb0(
254        &self,
255    ) -> &'static crate::common::Reg<self::Intenb0_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Intenb0_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(48usize),
259            )
260        }
261    }
262
263    #[doc = "Interrupt Enable Register 1"]
264    #[inline(always)]
265    pub const fn intenb1(
266        &self,
267    ) -> &'static crate::common::Reg<self::Intenb1_SPEC, crate::common::RW> {
268        unsafe {
269            crate::common::Reg::<self::Intenb1_SPEC, crate::common::RW>::from_ptr(
270                self._svd2pac_as_ptr().add(50usize),
271            )
272        }
273    }
274
275    #[doc = "BRDY Interrupt Enable Register"]
276    #[inline(always)]
277    pub const fn brdyenb(
278        &self,
279    ) -> &'static crate::common::Reg<self::Brdyenb_SPEC, crate::common::RW> {
280        unsafe {
281            crate::common::Reg::<self::Brdyenb_SPEC, crate::common::RW>::from_ptr(
282                self._svd2pac_as_ptr().add(54usize),
283            )
284        }
285    }
286
287    #[doc = "NRDY Interrupt Enable Register"]
288    #[inline(always)]
289    pub const fn nrdyenb(
290        &self,
291    ) -> &'static crate::common::Reg<self::Nrdyenb_SPEC, crate::common::RW> {
292        unsafe {
293            crate::common::Reg::<self::Nrdyenb_SPEC, crate::common::RW>::from_ptr(
294                self._svd2pac_as_ptr().add(56usize),
295            )
296        }
297    }
298
299    #[doc = "BEMP Interrupt Enable Register"]
300    #[inline(always)]
301    pub const fn bempenb(
302        &self,
303    ) -> &'static crate::common::Reg<self::Bempenb_SPEC, crate::common::RW> {
304        unsafe {
305            crate::common::Reg::<self::Bempenb_SPEC, crate::common::RW>::from_ptr(
306                self._svd2pac_as_ptr().add(58usize),
307            )
308        }
309    }
310
311    #[doc = "SOF Output Configuration Register"]
312    #[inline(always)]
313    pub const fn sofcfg(
314        &self,
315    ) -> &'static crate::common::Reg<self::Sofcfg_SPEC, crate::common::RW> {
316        unsafe {
317            crate::common::Reg::<self::Sofcfg_SPEC, crate::common::RW>::from_ptr(
318                self._svd2pac_as_ptr().add(60usize),
319            )
320        }
321    }
322
323    #[doc = "Interrupt Status Register 0"]
324    #[inline(always)]
325    pub const fn intsts0(
326        &self,
327    ) -> &'static crate::common::Reg<self::Intsts0_SPEC, crate::common::RW> {
328        unsafe {
329            crate::common::Reg::<self::Intsts0_SPEC, crate::common::RW>::from_ptr(
330                self._svd2pac_as_ptr().add(64usize),
331            )
332        }
333    }
334
335    #[doc = "Interrupt Status Register 1"]
336    #[inline(always)]
337    pub const fn intsts1(
338        &self,
339    ) -> &'static crate::common::Reg<self::Intsts1_SPEC, crate::common::RW> {
340        unsafe {
341            crate::common::Reg::<self::Intsts1_SPEC, crate::common::RW>::from_ptr(
342                self._svd2pac_as_ptr().add(66usize),
343            )
344        }
345    }
346
347    #[doc = "BRDY Interrupt Status Register"]
348    #[inline(always)]
349    pub const fn brdysts(
350        &self,
351    ) -> &'static crate::common::Reg<self::Brdysts_SPEC, crate::common::RW> {
352        unsafe {
353            crate::common::Reg::<self::Brdysts_SPEC, crate::common::RW>::from_ptr(
354                self._svd2pac_as_ptr().add(70usize),
355            )
356        }
357    }
358
359    #[doc = "NRDY Interrupt Status Register"]
360    #[inline(always)]
361    pub const fn nrdysts(
362        &self,
363    ) -> &'static crate::common::Reg<self::Nrdysts_SPEC, crate::common::RW> {
364        unsafe {
365            crate::common::Reg::<self::Nrdysts_SPEC, crate::common::RW>::from_ptr(
366                self._svd2pac_as_ptr().add(72usize),
367            )
368        }
369    }
370
371    #[doc = "BEMP Interrupt Status Register"]
372    #[inline(always)]
373    pub const fn bempsts(
374        &self,
375    ) -> &'static crate::common::Reg<self::Bempsts_SPEC, crate::common::RW> {
376        unsafe {
377            crate::common::Reg::<self::Bempsts_SPEC, crate::common::RW>::from_ptr(
378                self._svd2pac_as_ptr().add(74usize),
379            )
380        }
381    }
382
383    #[doc = "Frame Number Register"]
384    #[inline(always)]
385    pub const fn frmnum(
386        &self,
387    ) -> &'static crate::common::Reg<self::Frmnum_SPEC, crate::common::RW> {
388        unsafe {
389            crate::common::Reg::<self::Frmnum_SPEC, crate::common::RW>::from_ptr(
390                self._svd2pac_as_ptr().add(76usize),
391            )
392        }
393    }
394
395    #[doc = "Device State Change Register"]
396    #[inline(always)]
397    pub const fn dvchgr(
398        &self,
399    ) -> &'static crate::common::Reg<self::Dvchgr_SPEC, crate::common::RW> {
400        unsafe {
401            crate::common::Reg::<self::Dvchgr_SPEC, crate::common::RW>::from_ptr(
402                self._svd2pac_as_ptr().add(78usize),
403            )
404        }
405    }
406
407    #[doc = "USB Address Register"]
408    #[inline(always)]
409    pub const fn usbaddr(
410        &self,
411    ) -> &'static crate::common::Reg<self::Usbaddr_SPEC, crate::common::RW> {
412        unsafe {
413            crate::common::Reg::<self::Usbaddr_SPEC, crate::common::RW>::from_ptr(
414                self._svd2pac_as_ptr().add(80usize),
415            )
416        }
417    }
418
419    #[doc = "USB Request Type Register"]
420    #[inline(always)]
421    pub const fn usbreq(
422        &self,
423    ) -> &'static crate::common::Reg<self::Usbreq_SPEC, crate::common::RW> {
424        unsafe {
425            crate::common::Reg::<self::Usbreq_SPEC, crate::common::RW>::from_ptr(
426                self._svd2pac_as_ptr().add(84usize),
427            )
428        }
429    }
430
431    #[doc = "USB Request Value Register"]
432    #[inline(always)]
433    pub const fn usbval(
434        &self,
435    ) -> &'static crate::common::Reg<self::Usbval_SPEC, crate::common::RW> {
436        unsafe {
437            crate::common::Reg::<self::Usbval_SPEC, crate::common::RW>::from_ptr(
438                self._svd2pac_as_ptr().add(86usize),
439            )
440        }
441    }
442
443    #[doc = "USB Request Index Register"]
444    #[inline(always)]
445    pub const fn usbindx(
446        &self,
447    ) -> &'static crate::common::Reg<self::Usbindx_SPEC, crate::common::RW> {
448        unsafe {
449            crate::common::Reg::<self::Usbindx_SPEC, crate::common::RW>::from_ptr(
450                self._svd2pac_as_ptr().add(88usize),
451            )
452        }
453    }
454
455    #[doc = "USB Request Length Register"]
456    #[inline(always)]
457    pub const fn usbleng(
458        &self,
459    ) -> &'static crate::common::Reg<self::Usbleng_SPEC, crate::common::RW> {
460        unsafe {
461            crate::common::Reg::<self::Usbleng_SPEC, crate::common::RW>::from_ptr(
462                self._svd2pac_as_ptr().add(90usize),
463            )
464        }
465    }
466
467    #[doc = "DCP Configuration Register"]
468    #[inline(always)]
469    pub const fn dcpcfg(
470        &self,
471    ) -> &'static crate::common::Reg<self::Dcpcfg_SPEC, crate::common::RW> {
472        unsafe {
473            crate::common::Reg::<self::Dcpcfg_SPEC, crate::common::RW>::from_ptr(
474                self._svd2pac_as_ptr().add(92usize),
475            )
476        }
477    }
478
479    #[doc = "DCP Maximum Packet Size Register"]
480    #[inline(always)]
481    pub const fn dcpmaxp(
482        &self,
483    ) -> &'static crate::common::Reg<self::Dcpmaxp_SPEC, crate::common::RW> {
484        unsafe {
485            crate::common::Reg::<self::Dcpmaxp_SPEC, crate::common::RW>::from_ptr(
486                self._svd2pac_as_ptr().add(94usize),
487            )
488        }
489    }
490
491    #[doc = "DCP Control Register"]
492    #[inline(always)]
493    pub const fn dcpctr(
494        &self,
495    ) -> &'static crate::common::Reg<self::Dcpctr_SPEC, crate::common::RW> {
496        unsafe {
497            crate::common::Reg::<self::Dcpctr_SPEC, crate::common::RW>::from_ptr(
498                self._svd2pac_as_ptr().add(96usize),
499            )
500        }
501    }
502
503    #[doc = "Pipe Window Select Register"]
504    #[inline(always)]
505    pub const fn pipesel(
506        &self,
507    ) -> &'static crate::common::Reg<self::Pipesel_SPEC, crate::common::RW> {
508        unsafe {
509            crate::common::Reg::<self::Pipesel_SPEC, crate::common::RW>::from_ptr(
510                self._svd2pac_as_ptr().add(100usize),
511            )
512        }
513    }
514
515    #[doc = "Pipe Configuration Register"]
516    #[inline(always)]
517    pub const fn pipecfg(
518        &self,
519    ) -> &'static crate::common::Reg<self::Pipecfg_SPEC, crate::common::RW> {
520        unsafe {
521            crate::common::Reg::<self::Pipecfg_SPEC, crate::common::RW>::from_ptr(
522                self._svd2pac_as_ptr().add(104usize),
523            )
524        }
525    }
526
527    #[doc = "Pipe Maximum Packet Size Register"]
528    #[inline(always)]
529    pub const fn pipemaxp(
530        &self,
531    ) -> &'static crate::common::Reg<self::Pipemaxp_SPEC, crate::common::RW> {
532        unsafe {
533            crate::common::Reg::<self::Pipemaxp_SPEC, crate::common::RW>::from_ptr(
534                self._svd2pac_as_ptr().add(108usize),
535            )
536        }
537    }
538
539    #[doc = "Pipe Cycle Control Register"]
540    #[inline(always)]
541    pub const fn pipeperi(
542        &self,
543    ) -> &'static crate::common::Reg<self::Pipeperi_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Pipeperi_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(110usize),
547            )
548        }
549    }
550
551    #[doc = "PIPE%s Control Registers"]
552    #[inline(always)]
553    pub const fn pipectr(
554        &self,
555    ) -> &'static crate::common::ClusterRegisterArray<
556        crate::common::Reg<self::Pipectr_SPEC, crate::common::RW>,
557        4,
558        0x2,
559    > {
560        unsafe {
561            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x7ausize))
562        }
563    }
564    #[inline(always)]
565    pub const fn pipe6ctr(
566        &self,
567    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
568        unsafe {
569            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
570                self._svd2pac_as_ptr().add(0x7ausize),
571            )
572        }
573    }
574    #[inline(always)]
575    pub const fn pipe7ctr(
576        &self,
577    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
578        unsafe {
579            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
580                self._svd2pac_as_ptr().add(0x7cusize),
581            )
582        }
583    }
584    #[inline(always)]
585    pub const fn pipe8ctr(
586        &self,
587    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
588        unsafe {
589            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
590                self._svd2pac_as_ptr().add(0x7eusize),
591            )
592        }
593    }
594    #[inline(always)]
595    pub const fn pipe9ctr(
596        &self,
597    ) -> &'static crate::common::Reg<self::Pipectr_SPEC, crate::common::RW> {
598        unsafe {
599            crate::common::Reg::<self::Pipectr_SPEC, crate::common::RW>::from_ptr(
600                self._svd2pac_as_ptr().add(0x80usize),
601            )
602        }
603    }
604
605    #[doc = "PIPE%s Transaction Counter Enable Register"]
606    #[inline(always)]
607    pub const fn pipetre(
608        &self,
609    ) -> &'static crate::common::ClusterRegisterArray<
610        crate::common::Reg<self::Pipetre_SPEC, crate::common::RW>,
611        5,
612        0x4,
613    > {
614        unsafe {
615            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x90usize))
616        }
617    }
618    #[inline(always)]
619    pub const fn pipe1tre(
620        &self,
621    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
622        unsafe {
623            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
624                self._svd2pac_as_ptr().add(0x90usize),
625            )
626        }
627    }
628    #[inline(always)]
629    pub const fn pipe2tre(
630        &self,
631    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
632        unsafe {
633            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
634                self._svd2pac_as_ptr().add(0x94usize),
635            )
636        }
637    }
638    #[inline(always)]
639    pub const fn pipe3tre(
640        &self,
641    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
642        unsafe {
643            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
644                self._svd2pac_as_ptr().add(0x98usize),
645            )
646        }
647    }
648    #[inline(always)]
649    pub const fn pipe4tre(
650        &self,
651    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
652        unsafe {
653            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
654                self._svd2pac_as_ptr().add(0x9cusize),
655            )
656        }
657    }
658    #[inline(always)]
659    pub const fn pipe5tre(
660        &self,
661    ) -> &'static crate::common::Reg<self::Pipetre_SPEC, crate::common::RW> {
662        unsafe {
663            crate::common::Reg::<self::Pipetre_SPEC, crate::common::RW>::from_ptr(
664                self._svd2pac_as_ptr().add(0xa0usize),
665            )
666        }
667    }
668
669    #[doc = "PIPE%s Transaction Counter Register"]
670    #[inline(always)]
671    pub const fn pipetrn(
672        &self,
673    ) -> &'static crate::common::ClusterRegisterArray<
674        crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW>,
675        5,
676        0x4,
677    > {
678        unsafe {
679            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x92usize))
680        }
681    }
682    #[inline(always)]
683    pub const fn pipe1trn(
684        &self,
685    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
686        unsafe {
687            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
688                self._svd2pac_as_ptr().add(0x92usize),
689            )
690        }
691    }
692    #[inline(always)]
693    pub const fn pipe2trn(
694        &self,
695    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
696        unsafe {
697            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
698                self._svd2pac_as_ptr().add(0x96usize),
699            )
700        }
701    }
702    #[inline(always)]
703    pub const fn pipe3trn(
704        &self,
705    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
706        unsafe {
707            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
708                self._svd2pac_as_ptr().add(0x9ausize),
709            )
710        }
711    }
712    #[inline(always)]
713    pub const fn pipe4trn(
714        &self,
715    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
716        unsafe {
717            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
718                self._svd2pac_as_ptr().add(0x9eusize),
719            )
720        }
721    }
722    #[inline(always)]
723    pub const fn pipe5trn(
724        &self,
725    ) -> &'static crate::common::Reg<self::Pipetrn_SPEC, crate::common::RW> {
726        unsafe {
727            crate::common::Reg::<self::Pipetrn_SPEC, crate::common::RW>::from_ptr(
728                self._svd2pac_as_ptr().add(0xa2usize),
729            )
730        }
731    }
732
733    #[doc = "Battery Charging Control Register 1"]
734    #[inline(always)]
735    pub const fn bcctrl1(
736        &self,
737    ) -> &'static crate::common::Reg<self::Bcctrl1_SPEC, crate::common::RW> {
738        unsafe {
739            crate::common::Reg::<self::Bcctrl1_SPEC, crate::common::RW>::from_ptr(
740                self._svd2pac_as_ptr().add(176usize),
741            )
742        }
743    }
744
745    #[doc = "Battery Charging Control Register 2"]
746    #[inline(always)]
747    pub const fn bcctrl2(
748        &self,
749    ) -> &'static crate::common::Reg<self::Bcctrl2_SPEC, crate::common::RW> {
750        unsafe {
751            crate::common::Reg::<self::Bcctrl2_SPEC, crate::common::RW>::from_ptr(
752                self._svd2pac_as_ptr().add(180usize),
753            )
754        }
755    }
756
757    #[doc = "Device Address %s Configuration Register"]
758    #[inline(always)]
759    pub const fn devadd(
760        &self,
761    ) -> &'static crate::common::ClusterRegisterArray<
762        crate::common::Reg<self::Devadd_SPEC, crate::common::RW>,
763        6,
764        0x2,
765    > {
766        unsafe {
767            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xd0usize))
768        }
769    }
770    #[inline(always)]
771    pub const fn devadd0(
772        &self,
773    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
774        unsafe {
775            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
776                self._svd2pac_as_ptr().add(0xd0usize),
777            )
778        }
779    }
780    #[inline(always)]
781    pub const fn devadd1(
782        &self,
783    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
784        unsafe {
785            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
786                self._svd2pac_as_ptr().add(0xd2usize),
787            )
788        }
789    }
790    #[inline(always)]
791    pub const fn devadd2(
792        &self,
793    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(0xd4usize),
797            )
798        }
799    }
800    #[inline(always)]
801    pub const fn devadd3(
802        &self,
803    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
804        unsafe {
805            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
806                self._svd2pac_as_ptr().add(0xd6usize),
807            )
808        }
809    }
810    #[inline(always)]
811    pub const fn devadd4(
812        &self,
813    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
814        unsafe {
815            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
816                self._svd2pac_as_ptr().add(0xd8usize),
817            )
818        }
819    }
820    #[inline(always)]
821    pub const fn devadd5(
822        &self,
823    ) -> &'static crate::common::Reg<self::Devadd_SPEC, crate::common::RW> {
824        unsafe {
825            crate::common::Reg::<self::Devadd_SPEC, crate::common::RW>::from_ptr(
826                self._svd2pac_as_ptr().add(0xdausize),
827            )
828        }
829    }
830
831    #[doc = "PHY Single-ended Receiver Control Register"]
832    #[inline(always)]
833    pub const fn physectrl(
834        &self,
835    ) -> &'static crate::common::Reg<self::Physectrl_SPEC, crate::common::RW> {
836        unsafe {
837            crate::common::Reg::<self::Physectrl_SPEC, crate::common::RW>::from_ptr(
838                self._svd2pac_as_ptr().add(244usize),
839            )
840        }
841    }
842
843    #[doc = "Deep Software Standby USB Transceiver Control/Pin Monitor Register"]
844    #[inline(always)]
845    pub const fn dpusr0r(
846        &self,
847    ) -> &'static crate::common::Reg<self::Dpusr0R_SPEC, crate::common::RW> {
848        unsafe {
849            crate::common::Reg::<self::Dpusr0R_SPEC, crate::common::RW>::from_ptr(
850                self._svd2pac_as_ptr().add(1024usize),
851            )
852        }
853    }
854
855    #[doc = "Deep Software Standby USB Suspend/Resume Interrupt Register"]
856    #[inline(always)]
857    pub const fn dpusr1r(
858        &self,
859    ) -> &'static crate::common::Reg<self::Dpusr1R_SPEC, crate::common::RW> {
860        unsafe {
861            crate::common::Reg::<self::Dpusr1R_SPEC, crate::common::RW>::from_ptr(
862                self._svd2pac_as_ptr().add(1028usize),
863            )
864        }
865    }
866}
867#[doc(hidden)]
868#[derive(Copy, Clone, Eq, PartialEq)]
869pub struct Syscfg_SPEC;
870impl crate::sealed::RegSpec for Syscfg_SPEC {
871    type DataType = u16;
872}
873
874#[doc = "System Configuration Control Register"]
875pub type Syscfg = crate::RegValueT<Syscfg_SPEC>;
876
877impl Syscfg {
878    #[doc = "USBFS Operation Enable"]
879    #[inline(always)]
880    pub fn usbe(
881        self,
882    ) -> crate::common::RegisterField<
883        0,
884        0x1,
885        1,
886        0,
887        syscfg::Usbe,
888        syscfg::Usbe,
889        Syscfg_SPEC,
890        crate::common::RW,
891    > {
892        crate::common::RegisterField::<
893            0,
894            0x1,
895            1,
896            0,
897            syscfg::Usbe,
898            syscfg::Usbe,
899            Syscfg_SPEC,
900            crate::common::RW,
901        >::from_register(self, 0)
902    }
903
904    #[doc = "D+ Line Resistor Control"]
905    #[inline(always)]
906    pub fn dprpu(
907        self,
908    ) -> crate::common::RegisterField<
909        4,
910        0x1,
911        1,
912        0,
913        syscfg::Dprpu,
914        syscfg::Dprpu,
915        Syscfg_SPEC,
916        crate::common::RW,
917    > {
918        crate::common::RegisterField::<
919            4,
920            0x1,
921            1,
922            0,
923            syscfg::Dprpu,
924            syscfg::Dprpu,
925            Syscfg_SPEC,
926            crate::common::RW,
927        >::from_register(self, 0)
928    }
929
930    #[doc = "D+/D– Line Resistor Control"]
931    #[inline(always)]
932    pub fn drpd(
933        self,
934    ) -> crate::common::RegisterField<
935        5,
936        0x1,
937        1,
938        0,
939        syscfg::Drpd,
940        syscfg::Drpd,
941        Syscfg_SPEC,
942        crate::common::RW,
943    > {
944        crate::common::RegisterField::<
945            5,
946            0x1,
947            1,
948            0,
949            syscfg::Drpd,
950            syscfg::Drpd,
951            Syscfg_SPEC,
952            crate::common::RW,
953        >::from_register(self, 0)
954    }
955
956    #[doc = "Controller Function Select"]
957    #[inline(always)]
958    pub fn dcfm(
959        self,
960    ) -> crate::common::RegisterField<
961        6,
962        0x1,
963        1,
964        0,
965        syscfg::Dcfm,
966        syscfg::Dcfm,
967        Syscfg_SPEC,
968        crate::common::RW,
969    > {
970        crate::common::RegisterField::<
971            6,
972            0x1,
973            1,
974            0,
975            syscfg::Dcfm,
976            syscfg::Dcfm,
977            Syscfg_SPEC,
978            crate::common::RW,
979        >::from_register(self, 0)
980    }
981
982    #[doc = "USB Clock Enable"]
983    #[inline(always)]
984    pub fn scke(
985        self,
986    ) -> crate::common::RegisterField<
987        10,
988        0x1,
989        1,
990        0,
991        syscfg::Scke,
992        syscfg::Scke,
993        Syscfg_SPEC,
994        crate::common::RW,
995    > {
996        crate::common::RegisterField::<
997            10,
998            0x1,
999            1,
1000            0,
1001            syscfg::Scke,
1002            syscfg::Scke,
1003            Syscfg_SPEC,
1004            crate::common::RW,
1005        >::from_register(self, 0)
1006    }
1007}
1008impl ::core::default::Default for Syscfg {
1009    #[inline(always)]
1010    fn default() -> Syscfg {
1011        <crate::RegValueT<Syscfg_SPEC> as RegisterValue<_>>::new(0)
1012    }
1013}
1014pub mod syscfg {
1015
1016    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1017    pub struct Usbe_SPEC;
1018    pub type Usbe = crate::EnumBitfieldStruct<u8, Usbe_SPEC>;
1019    impl Usbe {
1020        #[doc = "Disable"]
1021        pub const _0: Self = Self::new(0);
1022
1023        #[doc = "Enable"]
1024        pub const _1: Self = Self::new(1);
1025    }
1026    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1027    pub struct Dprpu_SPEC;
1028    pub type Dprpu = crate::EnumBitfieldStruct<u8, Dprpu_SPEC>;
1029    impl Dprpu {
1030        #[doc = "Disable line pull-up"]
1031        pub const _0: Self = Self::new(0);
1032
1033        #[doc = "Enable line pull-up"]
1034        pub const _1: Self = Self::new(1);
1035    }
1036    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1037    pub struct Drpd_SPEC;
1038    pub type Drpd = crate::EnumBitfieldStruct<u8, Drpd_SPEC>;
1039    impl Drpd {
1040        #[doc = "Disable line pull-down"]
1041        pub const _0: Self = Self::new(0);
1042
1043        #[doc = "Enable line pull-down"]
1044        pub const _1: Self = Self::new(1);
1045    }
1046    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1047    pub struct Dcfm_SPEC;
1048    pub type Dcfm = crate::EnumBitfieldStruct<u8, Dcfm_SPEC>;
1049    impl Dcfm {
1050        #[doc = "Select device controller"]
1051        pub const _0: Self = Self::new(0);
1052
1053        #[doc = "Select host controller"]
1054        pub const _1: Self = Self::new(1);
1055    }
1056    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1057    pub struct Scke_SPEC;
1058    pub type Scke = crate::EnumBitfieldStruct<u8, Scke_SPEC>;
1059    impl Scke {
1060        #[doc = "Stop clock supply to the USBFS"]
1061        pub const _0: Self = Self::new(0);
1062
1063        #[doc = "Enable clock supply to the USBFS"]
1064        pub const _1: Self = Self::new(1);
1065    }
1066}
1067#[doc(hidden)]
1068#[derive(Copy, Clone, Eq, PartialEq)]
1069pub struct Syssts0_SPEC;
1070impl crate::sealed::RegSpec for Syssts0_SPEC {
1071    type DataType = u16;
1072}
1073
1074#[doc = "System Configuration Status Register 0"]
1075pub type Syssts0 = crate::RegValueT<Syssts0_SPEC>;
1076
1077impl Syssts0 {
1078    #[doc = "USB Data Line Status Monitor"]
1079    #[inline(always)]
1080    pub fn lnst(
1081        self,
1082    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Syssts0_SPEC, crate::common::R> {
1083        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Syssts0_SPEC,crate::common::R>::from_register(self,0)
1084    }
1085
1086    #[doc = "Active Monitor When the Host Controller Is Selected"]
1087    #[inline(always)]
1088    pub fn sofea(
1089        self,
1090    ) -> crate::common::RegisterField<
1091        5,
1092        0x1,
1093        1,
1094        0,
1095        syssts0::Sofea,
1096        syssts0::Sofea,
1097        Syssts0_SPEC,
1098        crate::common::R,
1099    > {
1100        crate::common::RegisterField::<
1101            5,
1102            0x1,
1103            1,
1104            0,
1105            syssts0::Sofea,
1106            syssts0::Sofea,
1107            Syssts0_SPEC,
1108            crate::common::R,
1109        >::from_register(self, 0)
1110    }
1111
1112    #[doc = "USB Host Sequencer Status Monitor"]
1113    #[inline(always)]
1114    pub fn htact(
1115        self,
1116    ) -> crate::common::RegisterField<
1117        6,
1118        0x1,
1119        1,
1120        0,
1121        syssts0::Htact,
1122        syssts0::Htact,
1123        Syssts0_SPEC,
1124        crate::common::R,
1125    > {
1126        crate::common::RegisterField::<
1127            6,
1128            0x1,
1129            1,
1130            0,
1131            syssts0::Htact,
1132            syssts0::Htact,
1133            Syssts0_SPEC,
1134            crate::common::R,
1135        >::from_register(self, 0)
1136    }
1137
1138    #[doc = "External USB_OVRCURA Input Pin Monitor"]
1139    #[inline(always)]
1140    pub fn ovcmon(
1141        self,
1142    ) -> crate::common::RegisterFieldBool<15, 1, 0, Syssts0_SPEC, crate::common::R> {
1143        crate::common::RegisterFieldBool::<15, 1, 0, Syssts0_SPEC, crate::common::R>::from_register(
1144            self, 0,
1145        )
1146    }
1147}
1148impl ::core::default::Default for Syssts0 {
1149    #[inline(always)]
1150    fn default() -> Syssts0 {
1151        <crate::RegValueT<Syssts0_SPEC> as RegisterValue<_>>::new(0)
1152    }
1153}
1154pub mod syssts0 {
1155
1156    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1157    pub struct Sofea_SPEC;
1158    pub type Sofea = crate::EnumBitfieldStruct<u8, Sofea_SPEC>;
1159    impl Sofea {
1160        #[doc = "SOF output stopped"]
1161        pub const _0: Self = Self::new(0);
1162
1163        #[doc = "SOF output operating"]
1164        pub const _1: Self = Self::new(1);
1165    }
1166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1167    pub struct Htact_SPEC;
1168    pub type Htact = crate::EnumBitfieldStruct<u8, Htact_SPEC>;
1169    impl Htact {
1170        #[doc = "Host sequencer completely stopped"]
1171        pub const _0: Self = Self::new(0);
1172
1173        #[doc = "Host sequencer not completely stopped"]
1174        pub const _1: Self = Self::new(1);
1175    }
1176}
1177#[doc(hidden)]
1178#[derive(Copy, Clone, Eq, PartialEq)]
1179pub struct Dvstctr0_SPEC;
1180impl crate::sealed::RegSpec for Dvstctr0_SPEC {
1181    type DataType = u16;
1182}
1183
1184#[doc = "Device State Control Register 0"]
1185pub type Dvstctr0 = crate::RegValueT<Dvstctr0_SPEC>;
1186
1187impl Dvstctr0 {
1188    #[doc = "USB Bus Reset Status"]
1189    #[inline(always)]
1190    pub fn rhst(
1191        self,
1192    ) -> crate::common::RegisterField<
1193        0,
1194        0x7,
1195        1,
1196        0,
1197        dvstctr0::Rhst,
1198        dvstctr0::Rhst,
1199        Dvstctr0_SPEC,
1200        crate::common::R,
1201    > {
1202        crate::common::RegisterField::<
1203            0,
1204            0x7,
1205            1,
1206            0,
1207            dvstctr0::Rhst,
1208            dvstctr0::Rhst,
1209            Dvstctr0_SPEC,
1210            crate::common::R,
1211        >::from_register(self, 0)
1212    }
1213
1214    #[doc = "USB Bus Enable"]
1215    #[inline(always)]
1216    pub fn uact(
1217        self,
1218    ) -> crate::common::RegisterField<
1219        4,
1220        0x1,
1221        1,
1222        0,
1223        dvstctr0::Uact,
1224        dvstctr0::Uact,
1225        Dvstctr0_SPEC,
1226        crate::common::RW,
1227    > {
1228        crate::common::RegisterField::<
1229            4,
1230            0x1,
1231            1,
1232            0,
1233            dvstctr0::Uact,
1234            dvstctr0::Uact,
1235            Dvstctr0_SPEC,
1236            crate::common::RW,
1237        >::from_register(self, 0)
1238    }
1239
1240    #[doc = "Resume Output"]
1241    #[inline(always)]
1242    pub fn resume(
1243        self,
1244    ) -> crate::common::RegisterField<
1245        5,
1246        0x1,
1247        1,
1248        0,
1249        dvstctr0::Resume,
1250        dvstctr0::Resume,
1251        Dvstctr0_SPEC,
1252        crate::common::RW,
1253    > {
1254        crate::common::RegisterField::<
1255            5,
1256            0x1,
1257            1,
1258            0,
1259            dvstctr0::Resume,
1260            dvstctr0::Resume,
1261            Dvstctr0_SPEC,
1262            crate::common::RW,
1263        >::from_register(self, 0)
1264    }
1265
1266    #[doc = "USB Bus Reset Output"]
1267    #[inline(always)]
1268    pub fn usbrst(
1269        self,
1270    ) -> crate::common::RegisterField<
1271        6,
1272        0x1,
1273        1,
1274        0,
1275        dvstctr0::Usbrst,
1276        dvstctr0::Usbrst,
1277        Dvstctr0_SPEC,
1278        crate::common::RW,
1279    > {
1280        crate::common::RegisterField::<
1281            6,
1282            0x1,
1283            1,
1284            0,
1285            dvstctr0::Usbrst,
1286            dvstctr0::Usbrst,
1287            Dvstctr0_SPEC,
1288            crate::common::RW,
1289        >::from_register(self, 0)
1290    }
1291
1292    #[doc = "Wakeup Detection Enable"]
1293    #[inline(always)]
1294    pub fn rwupe(
1295        self,
1296    ) -> crate::common::RegisterField<
1297        7,
1298        0x1,
1299        1,
1300        0,
1301        dvstctr0::Rwupe,
1302        dvstctr0::Rwupe,
1303        Dvstctr0_SPEC,
1304        crate::common::RW,
1305    > {
1306        crate::common::RegisterField::<
1307            7,
1308            0x1,
1309            1,
1310            0,
1311            dvstctr0::Rwupe,
1312            dvstctr0::Rwupe,
1313            Dvstctr0_SPEC,
1314            crate::common::RW,
1315        >::from_register(self, 0)
1316    }
1317
1318    #[doc = "Wakeup Output"]
1319    #[inline(always)]
1320    pub fn wkup(
1321        self,
1322    ) -> crate::common::RegisterField<
1323        8,
1324        0x1,
1325        1,
1326        0,
1327        dvstctr0::Wkup,
1328        dvstctr0::Wkup,
1329        Dvstctr0_SPEC,
1330        crate::common::RW,
1331    > {
1332        crate::common::RegisterField::<
1333            8,
1334            0x1,
1335            1,
1336            0,
1337            dvstctr0::Wkup,
1338            dvstctr0::Wkup,
1339            Dvstctr0_SPEC,
1340            crate::common::RW,
1341        >::from_register(self, 0)
1342    }
1343
1344    #[doc = "USB_VBUSEN Output Pin Control"]
1345    #[inline(always)]
1346    pub fn vbusen(
1347        self,
1348    ) -> crate::common::RegisterField<
1349        9,
1350        0x1,
1351        1,
1352        0,
1353        dvstctr0::Vbusen,
1354        dvstctr0::Vbusen,
1355        Dvstctr0_SPEC,
1356        crate::common::RW,
1357    > {
1358        crate::common::RegisterField::<
1359            9,
1360            0x1,
1361            1,
1362            0,
1363            dvstctr0::Vbusen,
1364            dvstctr0::Vbusen,
1365            Dvstctr0_SPEC,
1366            crate::common::RW,
1367        >::from_register(self, 0)
1368    }
1369
1370    #[doc = "USB_EXICEN Output Pin Control"]
1371    #[inline(always)]
1372    pub fn exicen(
1373        self,
1374    ) -> crate::common::RegisterField<
1375        10,
1376        0x1,
1377        1,
1378        0,
1379        dvstctr0::Exicen,
1380        dvstctr0::Exicen,
1381        Dvstctr0_SPEC,
1382        crate::common::RW,
1383    > {
1384        crate::common::RegisterField::<
1385            10,
1386            0x1,
1387            1,
1388            0,
1389            dvstctr0::Exicen,
1390            dvstctr0::Exicen,
1391            Dvstctr0_SPEC,
1392            crate::common::RW,
1393        >::from_register(self, 0)
1394    }
1395}
1396impl ::core::default::Default for Dvstctr0 {
1397    #[inline(always)]
1398    fn default() -> Dvstctr0 {
1399        <crate::RegValueT<Dvstctr0_SPEC> as RegisterValue<_>>::new(0)
1400    }
1401}
1402pub mod dvstctr0 {
1403
1404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1405    pub struct Rhst_SPEC;
1406    pub type Rhst = crate::EnumBitfieldStruct<u8, Rhst_SPEC>;
1407    impl Rhst {
1408        #[doc = "In host controller mode: Communication speed indeterminate (powered state or no connection) In device controller mode: Communication speed indeterminate"]
1409        pub const _000: Self = Self::new(0);
1410
1411        #[doc = "In host controller mode: Low-speed connection In device controller mode: USB bus reset in progress"]
1412        pub const _001: Self = Self::new(1);
1413
1414        #[doc = "In host controller mode: Full-speed connection In device controller mode: USB bus reset in progress or full-speed connection"]
1415        pub const _010: Self = Self::new(2);
1416
1417        #[doc = "Setting prohibited"]
1418        pub const _011: Self = Self::new(3);
1419    }
1420    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1421    pub struct Uact_SPEC;
1422    pub type Uact = crate::EnumBitfieldStruct<u8, Uact_SPEC>;
1423    impl Uact {
1424        #[doc = "Disable downstream port (disable SOF transmission)"]
1425        pub const _0: Self = Self::new(0);
1426
1427        #[doc = "Enable downstream port (enable SOF transmission)"]
1428        pub const _1: Self = Self::new(1);
1429    }
1430    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1431    pub struct Resume_SPEC;
1432    pub type Resume = crate::EnumBitfieldStruct<u8, Resume_SPEC>;
1433    impl Resume {
1434        #[doc = "Do not output resume signal"]
1435        pub const _0: Self = Self::new(0);
1436
1437        #[doc = "Output resume signal"]
1438        pub const _1: Self = Self::new(1);
1439    }
1440    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1441    pub struct Usbrst_SPEC;
1442    pub type Usbrst = crate::EnumBitfieldStruct<u8, Usbrst_SPEC>;
1443    impl Usbrst {
1444        #[doc = "Do not output USB bus reset signal"]
1445        pub const _0: Self = Self::new(0);
1446
1447        #[doc = "Output USB bus reset signal"]
1448        pub const _1: Self = Self::new(1);
1449    }
1450    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1451    pub struct Rwupe_SPEC;
1452    pub type Rwupe = crate::EnumBitfieldStruct<u8, Rwupe_SPEC>;
1453    impl Rwupe {
1454        #[doc = "Disable downstream port remote wakeup"]
1455        pub const _0: Self = Self::new(0);
1456
1457        #[doc = "Enable downstream port remote wakeup"]
1458        pub const _1: Self = Self::new(1);
1459    }
1460    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1461    pub struct Wkup_SPEC;
1462    pub type Wkup = crate::EnumBitfieldStruct<u8, Wkup_SPEC>;
1463    impl Wkup {
1464        #[doc = "Do not output remote wakeup signal"]
1465        pub const _0: Self = Self::new(0);
1466
1467        #[doc = "Output remote wakeup signal"]
1468        pub const _1: Self = Self::new(1);
1469    }
1470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1471    pub struct Vbusen_SPEC;
1472    pub type Vbusen = crate::EnumBitfieldStruct<u8, Vbusen_SPEC>;
1473    impl Vbusen {
1474        #[doc = "Output low on external USB_VBUSEN pin"]
1475        pub const _0: Self = Self::new(0);
1476
1477        #[doc = "Output high on external USB_VBUSEN pin"]
1478        pub const _1: Self = Self::new(1);
1479    }
1480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1481    pub struct Exicen_SPEC;
1482    pub type Exicen = crate::EnumBitfieldStruct<u8, Exicen_SPEC>;
1483    impl Exicen {
1484        #[doc = "Output low on external USB_EXICEN pin"]
1485        pub const _0: Self = Self::new(0);
1486
1487        #[doc = "Output high on external USB_EXICEN pin"]
1488        pub const _1: Self = Self::new(1);
1489    }
1490}
1491#[doc(hidden)]
1492#[derive(Copy, Clone, Eq, PartialEq)]
1493pub struct Cfifo_SPEC;
1494impl crate::sealed::RegSpec for Cfifo_SPEC {
1495    type DataType = u16;
1496}
1497
1498#[doc = "CFIFO Port Register"]
1499pub type Cfifo = crate::RegValueT<Cfifo_SPEC>;
1500
1501impl Cfifo {
1502    #[doc = "FIFO Port"]
1503    #[inline(always)]
1504    pub fn fifoport(
1505        self,
1506    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Cfifo_SPEC, crate::common::RW>
1507    {
1508        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Cfifo_SPEC,crate::common::RW>::from_register(self,0)
1509    }
1510}
1511impl ::core::default::Default for Cfifo {
1512    #[inline(always)]
1513    fn default() -> Cfifo {
1514        <crate::RegValueT<Cfifo_SPEC> as RegisterValue<_>>::new(0)
1515    }
1516}
1517
1518#[doc(hidden)]
1519#[derive(Copy, Clone, Eq, PartialEq)]
1520pub struct Cfifol_SPEC;
1521impl crate::sealed::RegSpec for Cfifol_SPEC {
1522    type DataType = u8;
1523}
1524
1525#[doc = "CFIFO Port Register"]
1526pub type Cfifol = crate::RegValueT<Cfifol_SPEC>;
1527
1528impl Cfifol {
1529    #[doc = "FIFO Port"]
1530    #[inline(always)]
1531    pub fn fifoport(
1532        self,
1533    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Cfifol_SPEC, crate::common::RW> {
1534        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Cfifol_SPEC,crate::common::RW>::from_register(self,0)
1535    }
1536}
1537impl ::core::default::Default for Cfifol {
1538    #[inline(always)]
1539    fn default() -> Cfifol {
1540        <crate::RegValueT<Cfifol_SPEC> as RegisterValue<_>>::new(0)
1541    }
1542}
1543
1544#[doc(hidden)]
1545#[derive(Copy, Clone, Eq, PartialEq)]
1546pub struct Dfifo_SPEC;
1547impl crate::sealed::RegSpec for Dfifo_SPEC {
1548    type DataType = u16;
1549}
1550
1551#[doc = "D%sFIFO Port Register"]
1552pub type Dfifo = crate::RegValueT<Dfifo_SPEC>;
1553
1554impl Dfifo {
1555    #[doc = "FIFO Port"]
1556    #[inline(always)]
1557    pub fn fifoport(
1558        self,
1559    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Dfifo_SPEC, crate::common::RW>
1560    {
1561        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Dfifo_SPEC,crate::common::RW>::from_register(self,0)
1562    }
1563}
1564impl ::core::default::Default for Dfifo {
1565    #[inline(always)]
1566    fn default() -> Dfifo {
1567        <crate::RegValueT<Dfifo_SPEC> as RegisterValue<_>>::new(0)
1568    }
1569}
1570
1571#[doc(hidden)]
1572#[derive(Copy, Clone, Eq, PartialEq)]
1573pub struct Dfifol_SPEC;
1574impl crate::sealed::RegSpec for Dfifol_SPEC {
1575    type DataType = u8;
1576}
1577
1578#[doc = "D%sFIFO Port Register"]
1579pub type Dfifol = crate::RegValueT<Dfifol_SPEC>;
1580
1581impl Dfifol {
1582    #[doc = "FIFO Port"]
1583    #[inline(always)]
1584    pub fn fifoport(
1585        self,
1586    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Dfifol_SPEC, crate::common::RW> {
1587        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Dfifol_SPEC,crate::common::RW>::from_register(self,0)
1588    }
1589}
1590impl ::core::default::Default for Dfifol {
1591    #[inline(always)]
1592    fn default() -> Dfifol {
1593        <crate::RegValueT<Dfifol_SPEC> as RegisterValue<_>>::new(0)
1594    }
1595}
1596
1597#[doc(hidden)]
1598#[derive(Copy, Clone, Eq, PartialEq)]
1599pub struct Cfifosel_SPEC;
1600impl crate::sealed::RegSpec for Cfifosel_SPEC {
1601    type DataType = u16;
1602}
1603
1604#[doc = "CFIFO Port Select Register"]
1605pub type Cfifosel = crate::RegValueT<Cfifosel_SPEC>;
1606
1607impl Cfifosel {
1608    #[doc = "CFIFO Port Access Pipe Specification"]
1609    #[inline(always)]
1610    pub fn curpipe(
1611        self,
1612    ) -> crate::common::RegisterField<
1613        0,
1614        0xf,
1615        1,
1616        0,
1617        cfifosel::Curpipe,
1618        cfifosel::Curpipe,
1619        Cfifosel_SPEC,
1620        crate::common::RW,
1621    > {
1622        crate::common::RegisterField::<
1623            0,
1624            0xf,
1625            1,
1626            0,
1627            cfifosel::Curpipe,
1628            cfifosel::Curpipe,
1629            Cfifosel_SPEC,
1630            crate::common::RW,
1631        >::from_register(self, 0)
1632    }
1633
1634    #[doc = "CFIFO Port Access Direction When DCP Is Selected"]
1635    #[inline(always)]
1636    pub fn isel(
1637        self,
1638    ) -> crate::common::RegisterField<
1639        5,
1640        0x1,
1641        1,
1642        0,
1643        cfifosel::Isel,
1644        cfifosel::Isel,
1645        Cfifosel_SPEC,
1646        crate::common::RW,
1647    > {
1648        crate::common::RegisterField::<
1649            5,
1650            0x1,
1651            1,
1652            0,
1653            cfifosel::Isel,
1654            cfifosel::Isel,
1655            Cfifosel_SPEC,
1656            crate::common::RW,
1657        >::from_register(self, 0)
1658    }
1659
1660    #[doc = "CFIFO Port Endian Control"]
1661    #[inline(always)]
1662    pub fn bigend(
1663        self,
1664    ) -> crate::common::RegisterField<
1665        8,
1666        0x1,
1667        1,
1668        0,
1669        cfifosel::Bigend,
1670        cfifosel::Bigend,
1671        Cfifosel_SPEC,
1672        crate::common::RW,
1673    > {
1674        crate::common::RegisterField::<
1675            8,
1676            0x1,
1677            1,
1678            0,
1679            cfifosel::Bigend,
1680            cfifosel::Bigend,
1681            Cfifosel_SPEC,
1682            crate::common::RW,
1683        >::from_register(self, 0)
1684    }
1685
1686    #[doc = "CFIFO Port Access Bit Width"]
1687    #[inline(always)]
1688    pub fn mbw(
1689        self,
1690    ) -> crate::common::RegisterField<
1691        10,
1692        0x1,
1693        1,
1694        0,
1695        cfifosel::Mbw,
1696        cfifosel::Mbw,
1697        Cfifosel_SPEC,
1698        crate::common::RW,
1699    > {
1700        crate::common::RegisterField::<
1701            10,
1702            0x1,
1703            1,
1704            0,
1705            cfifosel::Mbw,
1706            cfifosel::Mbw,
1707            Cfifosel_SPEC,
1708            crate::common::RW,
1709        >::from_register(self, 0)
1710    }
1711
1712    #[doc = "Buffer Pointer Rewind"]
1713    #[inline(always)]
1714    pub fn rew(
1715        self,
1716    ) -> crate::common::RegisterField<
1717        14,
1718        0x1,
1719        1,
1720        0,
1721        cfifosel::Rew,
1722        cfifosel::Rew,
1723        Cfifosel_SPEC,
1724        crate::common::W,
1725    > {
1726        crate::common::RegisterField::<
1727            14,
1728            0x1,
1729            1,
1730            0,
1731            cfifosel::Rew,
1732            cfifosel::Rew,
1733            Cfifosel_SPEC,
1734            crate::common::W,
1735        >::from_register(self, 0)
1736    }
1737
1738    #[doc = "Read Count Mode"]
1739    #[inline(always)]
1740    pub fn rcnt(
1741        self,
1742    ) -> crate::common::RegisterField<
1743        15,
1744        0x1,
1745        1,
1746        0,
1747        cfifosel::Rcnt,
1748        cfifosel::Rcnt,
1749        Cfifosel_SPEC,
1750        crate::common::RW,
1751    > {
1752        crate::common::RegisterField::<
1753            15,
1754            0x1,
1755            1,
1756            0,
1757            cfifosel::Rcnt,
1758            cfifosel::Rcnt,
1759            Cfifosel_SPEC,
1760            crate::common::RW,
1761        >::from_register(self, 0)
1762    }
1763}
1764impl ::core::default::Default for Cfifosel {
1765    #[inline(always)]
1766    fn default() -> Cfifosel {
1767        <crate::RegValueT<Cfifosel_SPEC> as RegisterValue<_>>::new(0)
1768    }
1769}
1770pub mod cfifosel {
1771
1772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1773    pub struct Curpipe_SPEC;
1774    pub type Curpipe = crate::EnumBitfieldStruct<u8, Curpipe_SPEC>;
1775    impl Curpipe {
1776        #[doc = "Default Control Pipe"]
1777        pub const _0_X_0: Self = Self::new(0);
1778
1779        #[doc = "Pipe 1"]
1780        pub const _0_X_1: Self = Self::new(1);
1781
1782        #[doc = "Pipe 2"]
1783        pub const _0_X_2: Self = Self::new(2);
1784
1785        #[doc = "Pipe 3"]
1786        pub const _0_X_3: Self = Self::new(3);
1787
1788        #[doc = "Pipe 4"]
1789        pub const _0_X_4: Self = Self::new(4);
1790
1791        #[doc = "Pipe 5"]
1792        pub const _0_X_5: Self = Self::new(5);
1793
1794        #[doc = "Pipe 6"]
1795        pub const _0_X_6: Self = Self::new(6);
1796
1797        #[doc = "Pipe 7"]
1798        pub const _0_X_7: Self = Self::new(7);
1799
1800        #[doc = "Pipe 8"]
1801        pub const _0_X_8: Self = Self::new(8);
1802
1803        #[doc = "Pipe 9"]
1804        pub const _0_X_9: Self = Self::new(9);
1805    }
1806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1807    pub struct Isel_SPEC;
1808    pub type Isel = crate::EnumBitfieldStruct<u8, Isel_SPEC>;
1809    impl Isel {
1810        #[doc = "Select reading from the FIFO buffer"]
1811        pub const _0: Self = Self::new(0);
1812
1813        #[doc = "Select writing to the FIFO buffer"]
1814        pub const _1: Self = Self::new(1);
1815    }
1816    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1817    pub struct Bigend_SPEC;
1818    pub type Bigend = crate::EnumBitfieldStruct<u8, Bigend_SPEC>;
1819    impl Bigend {
1820        #[doc = "Little endian"]
1821        pub const _0: Self = Self::new(0);
1822
1823        #[doc = "Big endian"]
1824        pub const _1: Self = Self::new(1);
1825    }
1826    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1827    pub struct Mbw_SPEC;
1828    pub type Mbw = crate::EnumBitfieldStruct<u8, Mbw_SPEC>;
1829    impl Mbw {
1830        #[doc = "8-bit width"]
1831        pub const _0: Self = Self::new(0);
1832
1833        #[doc = "16-bit width"]
1834        pub const _1: Self = Self::new(1);
1835    }
1836    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1837    pub struct Rew_SPEC;
1838    pub type Rew = crate::EnumBitfieldStruct<u8, Rew_SPEC>;
1839    impl Rew {
1840        #[doc = "Do not rewind buffer pointer"]
1841        pub const _0: Self = Self::new(0);
1842
1843        #[doc = "Rewind buffer pointer"]
1844        pub const _1: Self = Self::new(1);
1845    }
1846    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1847    pub struct Rcnt_SPEC;
1848    pub type Rcnt = crate::EnumBitfieldStruct<u8, Rcnt_SPEC>;
1849    impl Rcnt {
1850        #[doc = "The DTLN\\[8:0\\] bits (CFIFOCTR.DTLN\\[8:0\\], D0FIFOCTR.DTLN\\[8:0\\], D1FIFOCTR.DTLN\\[8:0\\]) are cleared when all receive data is read from the CFIFO. In double buffer mode, the DTLN\\[8:0\\] value is cleared when all data is read from only a single plane."]
1851        pub const _0: Self = Self::new(0);
1852
1853        #[doc = "The DTLN\\[8:0\\] bits are decremented each time the receive data is read from the CFIFO."]
1854        pub const _1: Self = Self::new(1);
1855    }
1856}
1857#[doc(hidden)]
1858#[derive(Copy, Clone, Eq, PartialEq)]
1859pub struct Cfifoctr_SPEC;
1860impl crate::sealed::RegSpec for Cfifoctr_SPEC {
1861    type DataType = u16;
1862}
1863
1864#[doc = "CFIFO Port Control Register"]
1865pub type Cfifoctr = crate::RegValueT<Cfifoctr_SPEC>;
1866
1867impl Cfifoctr {
1868    #[doc = "Receive Data Length"]
1869    #[inline(always)]
1870    pub fn dtln(
1871        self,
1872    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Cfifoctr_SPEC, crate::common::R>
1873    {
1874        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Cfifoctr_SPEC,crate::common::R>::from_register(self,0)
1875    }
1876
1877    #[doc = "FIFO Port Ready"]
1878    #[inline(always)]
1879    pub fn frdy(
1880        self,
1881    ) -> crate::common::RegisterField<
1882        13,
1883        0x1,
1884        1,
1885        0,
1886        cfifoctr::Frdy,
1887        cfifoctr::Frdy,
1888        Cfifoctr_SPEC,
1889        crate::common::R,
1890    > {
1891        crate::common::RegisterField::<
1892            13,
1893            0x1,
1894            1,
1895            0,
1896            cfifoctr::Frdy,
1897            cfifoctr::Frdy,
1898            Cfifoctr_SPEC,
1899            crate::common::R,
1900        >::from_register(self, 0)
1901    }
1902
1903    #[doc = "CPU Buffer Clear"]
1904    #[inline(always)]
1905    pub fn bclr(
1906        self,
1907    ) -> crate::common::RegisterField<
1908        14,
1909        0x1,
1910        1,
1911        0,
1912        cfifoctr::Bclr,
1913        cfifoctr::Bclr,
1914        Cfifoctr_SPEC,
1915        crate::common::W,
1916    > {
1917        crate::common::RegisterField::<
1918            14,
1919            0x1,
1920            1,
1921            0,
1922            cfifoctr::Bclr,
1923            cfifoctr::Bclr,
1924            Cfifoctr_SPEC,
1925            crate::common::W,
1926        >::from_register(self, 0)
1927    }
1928
1929    #[doc = "Buffer Memory Valid Flag"]
1930    #[inline(always)]
1931    pub fn bval(
1932        self,
1933    ) -> crate::common::RegisterField<
1934        15,
1935        0x1,
1936        1,
1937        0,
1938        cfifoctr::Bval,
1939        cfifoctr::Bval,
1940        Cfifoctr_SPEC,
1941        crate::common::RW,
1942    > {
1943        crate::common::RegisterField::<
1944            15,
1945            0x1,
1946            1,
1947            0,
1948            cfifoctr::Bval,
1949            cfifoctr::Bval,
1950            Cfifoctr_SPEC,
1951            crate::common::RW,
1952        >::from_register(self, 0)
1953    }
1954}
1955impl ::core::default::Default for Cfifoctr {
1956    #[inline(always)]
1957    fn default() -> Cfifoctr {
1958        <crate::RegValueT<Cfifoctr_SPEC> as RegisterValue<_>>::new(0)
1959    }
1960}
1961pub mod cfifoctr {
1962
1963    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1964    pub struct Frdy_SPEC;
1965    pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
1966    impl Frdy {
1967        #[doc = "FIFO port access disabled"]
1968        pub const _0: Self = Self::new(0);
1969
1970        #[doc = "FIFO port access enabled"]
1971        pub const _1: Self = Self::new(1);
1972    }
1973    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1974    pub struct Bclr_SPEC;
1975    pub type Bclr = crate::EnumBitfieldStruct<u8, Bclr_SPEC>;
1976    impl Bclr {
1977        #[doc = "No operation"]
1978        pub const _0: Self = Self::new(0);
1979
1980        #[doc = "Clear FIFO buffer on the CPU side"]
1981        pub const _1: Self = Self::new(1);
1982    }
1983    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1984    pub struct Bval_SPEC;
1985    pub type Bval = crate::EnumBitfieldStruct<u8, Bval_SPEC>;
1986    impl Bval {
1987        #[doc = "Invalid (writing 0 has no effect)"]
1988        pub const _0: Self = Self::new(0);
1989
1990        #[doc = "Writing ended"]
1991        pub const _1: Self = Self::new(1);
1992    }
1993}
1994#[doc(hidden)]
1995#[derive(Copy, Clone, Eq, PartialEq)]
1996pub struct Dfifosel_SPEC;
1997impl crate::sealed::RegSpec for Dfifosel_SPEC {
1998    type DataType = u16;
1999}
2000
2001#[doc = "D%sFIFO Port Select Register"]
2002pub type Dfifosel = crate::RegValueT<Dfifosel_SPEC>;
2003
2004impl Dfifosel {
2005    #[doc = "FIFO Port Access Pipe Specification"]
2006    #[inline(always)]
2007    pub fn curpipe(
2008        self,
2009    ) -> crate::common::RegisterField<
2010        0,
2011        0xf,
2012        1,
2013        0,
2014        dfifosel::Curpipe,
2015        dfifosel::Curpipe,
2016        Dfifosel_SPEC,
2017        crate::common::RW,
2018    > {
2019        crate::common::RegisterField::<
2020            0,
2021            0xf,
2022            1,
2023            0,
2024            dfifosel::Curpipe,
2025            dfifosel::Curpipe,
2026            Dfifosel_SPEC,
2027            crate::common::RW,
2028        >::from_register(self, 0)
2029    }
2030
2031    #[doc = "FIFO Port Endian Control"]
2032    #[inline(always)]
2033    pub fn bigend(
2034        self,
2035    ) -> crate::common::RegisterField<
2036        8,
2037        0x1,
2038        1,
2039        0,
2040        dfifosel::Bigend,
2041        dfifosel::Bigend,
2042        Dfifosel_SPEC,
2043        crate::common::RW,
2044    > {
2045        crate::common::RegisterField::<
2046            8,
2047            0x1,
2048            1,
2049            0,
2050            dfifosel::Bigend,
2051            dfifosel::Bigend,
2052            Dfifosel_SPEC,
2053            crate::common::RW,
2054        >::from_register(self, 0)
2055    }
2056
2057    #[doc = "FIFO Port Access Bit Width"]
2058    #[inline(always)]
2059    pub fn mbw(
2060        self,
2061    ) -> crate::common::RegisterField<
2062        10,
2063        0x1,
2064        1,
2065        0,
2066        dfifosel::Mbw,
2067        dfifosel::Mbw,
2068        Dfifosel_SPEC,
2069        crate::common::RW,
2070    > {
2071        crate::common::RegisterField::<
2072            10,
2073            0x1,
2074            1,
2075            0,
2076            dfifosel::Mbw,
2077            dfifosel::Mbw,
2078            Dfifosel_SPEC,
2079            crate::common::RW,
2080        >::from_register(self, 0)
2081    }
2082
2083    #[doc = "DMA/DTC Transfer Request Enable"]
2084    #[inline(always)]
2085    pub fn dreqe(
2086        self,
2087    ) -> crate::common::RegisterField<
2088        12,
2089        0x1,
2090        1,
2091        0,
2092        dfifosel::Dreqe,
2093        dfifosel::Dreqe,
2094        Dfifosel_SPEC,
2095        crate::common::RW,
2096    > {
2097        crate::common::RegisterField::<
2098            12,
2099            0x1,
2100            1,
2101            0,
2102            dfifosel::Dreqe,
2103            dfifosel::Dreqe,
2104            Dfifosel_SPEC,
2105            crate::common::RW,
2106        >::from_register(self, 0)
2107    }
2108
2109    #[doc = "Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read"]
2110    #[inline(always)]
2111    pub fn dclrm(
2112        self,
2113    ) -> crate::common::RegisterField<
2114        13,
2115        0x1,
2116        1,
2117        0,
2118        dfifosel::Dclrm,
2119        dfifosel::Dclrm,
2120        Dfifosel_SPEC,
2121        crate::common::RW,
2122    > {
2123        crate::common::RegisterField::<
2124            13,
2125            0x1,
2126            1,
2127            0,
2128            dfifosel::Dclrm,
2129            dfifosel::Dclrm,
2130            Dfifosel_SPEC,
2131            crate::common::RW,
2132        >::from_register(self, 0)
2133    }
2134
2135    #[doc = "Buffer Pointer Rewind"]
2136    #[inline(always)]
2137    pub fn rew(
2138        self,
2139    ) -> crate::common::RegisterField<
2140        14,
2141        0x1,
2142        1,
2143        0,
2144        dfifosel::Rew,
2145        dfifosel::Rew,
2146        Dfifosel_SPEC,
2147        crate::common::W,
2148    > {
2149        crate::common::RegisterField::<
2150            14,
2151            0x1,
2152            1,
2153            0,
2154            dfifosel::Rew,
2155            dfifosel::Rew,
2156            Dfifosel_SPEC,
2157            crate::common::W,
2158        >::from_register(self, 0)
2159    }
2160
2161    #[doc = "Read Count Mode"]
2162    #[inline(always)]
2163    pub fn rcnt(
2164        self,
2165    ) -> crate::common::RegisterField<
2166        15,
2167        0x1,
2168        1,
2169        0,
2170        dfifosel::Rcnt,
2171        dfifosel::Rcnt,
2172        Dfifosel_SPEC,
2173        crate::common::RW,
2174    > {
2175        crate::common::RegisterField::<
2176            15,
2177            0x1,
2178            1,
2179            0,
2180            dfifosel::Rcnt,
2181            dfifosel::Rcnt,
2182            Dfifosel_SPEC,
2183            crate::common::RW,
2184        >::from_register(self, 0)
2185    }
2186}
2187impl ::core::default::Default for Dfifosel {
2188    #[inline(always)]
2189    fn default() -> Dfifosel {
2190        <crate::RegValueT<Dfifosel_SPEC> as RegisterValue<_>>::new(0)
2191    }
2192}
2193pub mod dfifosel {
2194
2195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2196    pub struct Curpipe_SPEC;
2197    pub type Curpipe = crate::EnumBitfieldStruct<u8, Curpipe_SPEC>;
2198    impl Curpipe {
2199        #[doc = "Default Control Pipe"]
2200        pub const _0_X_0: Self = Self::new(0);
2201
2202        #[doc = "Pipe 1"]
2203        pub const _0_X_1: Self = Self::new(1);
2204
2205        #[doc = "Pipe 2"]
2206        pub const _0_X_2: Self = Self::new(2);
2207
2208        #[doc = "Pipe 3"]
2209        pub const _0_X_3: Self = Self::new(3);
2210
2211        #[doc = "Pipe 4"]
2212        pub const _0_X_4: Self = Self::new(4);
2213
2214        #[doc = "Pipe 5"]
2215        pub const _0_X_5: Self = Self::new(5);
2216
2217        #[doc = "Pipe 6"]
2218        pub const _0_X_6: Self = Self::new(6);
2219
2220        #[doc = "Pipe 7"]
2221        pub const _0_X_7: Self = Self::new(7);
2222
2223        #[doc = "Pipe 8"]
2224        pub const _0_X_8: Self = Self::new(8);
2225
2226        #[doc = "Pipe 9"]
2227        pub const _0_X_9: Self = Self::new(9);
2228    }
2229    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2230    pub struct Bigend_SPEC;
2231    pub type Bigend = crate::EnumBitfieldStruct<u8, Bigend_SPEC>;
2232    impl Bigend {
2233        #[doc = "Little endian"]
2234        pub const _0: Self = Self::new(0);
2235
2236        #[doc = "Big endian"]
2237        pub const _1: Self = Self::new(1);
2238    }
2239    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2240    pub struct Mbw_SPEC;
2241    pub type Mbw = crate::EnumBitfieldStruct<u8, Mbw_SPEC>;
2242    impl Mbw {
2243        #[doc = "8-bit width"]
2244        pub const _0: Self = Self::new(0);
2245
2246        #[doc = "16-bit width"]
2247        pub const _1: Self = Self::new(1);
2248    }
2249    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2250    pub struct Dreqe_SPEC;
2251    pub type Dreqe = crate::EnumBitfieldStruct<u8, Dreqe_SPEC>;
2252    impl Dreqe {
2253        #[doc = "Disable DMA/DTC transfer request"]
2254        pub const _0: Self = Self::new(0);
2255
2256        #[doc = "Enable DMA/DTC transfer request"]
2257        pub const _1: Self = Self::new(1);
2258    }
2259    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2260    pub struct Dclrm_SPEC;
2261    pub type Dclrm = crate::EnumBitfieldStruct<u8, Dclrm_SPEC>;
2262    impl Dclrm {
2263        #[doc = "Disable auto buffer clear mode"]
2264        pub const _0: Self = Self::new(0);
2265
2266        #[doc = "Enable auto buffer clear mode"]
2267        pub const _1: Self = Self::new(1);
2268    }
2269    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2270    pub struct Rew_SPEC;
2271    pub type Rew = crate::EnumBitfieldStruct<u8, Rew_SPEC>;
2272    impl Rew {
2273        #[doc = "Do not rewind buffer pointer"]
2274        pub const _0: Self = Self::new(0);
2275
2276        #[doc = "Rewind buffer pointer"]
2277        pub const _1: Self = Self::new(1);
2278    }
2279    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2280    pub struct Rcnt_SPEC;
2281    pub type Rcnt = crate::EnumBitfieldStruct<u8, Rcnt_SPEC>;
2282    impl Rcnt {
2283        #[doc = "Clear DTLN\\[8:0\\] bits in (CFIFOCTR.DTLN\\[8:0\\], D0FIFOCTR.DTLN\\[8:0\\], D1FIFOCTR.DTLN\\[8:0\\]) when all receive data is read from DnFIFO (after read of a single plane in double buffer mode)"]
2284        pub const _0: Self = Self::new(0);
2285
2286        #[doc = "Decrement DTLN\\[8:0\\] bits each time receive data is read from DnFIFO"]
2287        pub const _1: Self = Self::new(1);
2288    }
2289}
2290#[doc(hidden)]
2291#[derive(Copy, Clone, Eq, PartialEq)]
2292pub struct Dfifoctr_SPEC;
2293impl crate::sealed::RegSpec for Dfifoctr_SPEC {
2294    type DataType = u16;
2295}
2296
2297#[doc = "D%sFIFO Port Control Register"]
2298pub type Dfifoctr = crate::RegValueT<Dfifoctr_SPEC>;
2299
2300impl Dfifoctr {
2301    #[doc = "Receive Data Length"]
2302    #[inline(always)]
2303    pub fn dtln(
2304        self,
2305    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Dfifoctr_SPEC, crate::common::R>
2306    {
2307        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Dfifoctr_SPEC,crate::common::R>::from_register(self,0)
2308    }
2309
2310    #[doc = "FIFO Port Ready"]
2311    #[inline(always)]
2312    pub fn frdy(
2313        self,
2314    ) -> crate::common::RegisterField<
2315        13,
2316        0x1,
2317        1,
2318        0,
2319        dfifoctr::Frdy,
2320        dfifoctr::Frdy,
2321        Dfifoctr_SPEC,
2322        crate::common::R,
2323    > {
2324        crate::common::RegisterField::<
2325            13,
2326            0x1,
2327            1,
2328            0,
2329            dfifoctr::Frdy,
2330            dfifoctr::Frdy,
2331            Dfifoctr_SPEC,
2332            crate::common::R,
2333        >::from_register(self, 0)
2334    }
2335
2336    #[doc = "CPU Buffer Clear"]
2337    #[inline(always)]
2338    pub fn bclr(
2339        self,
2340    ) -> crate::common::RegisterField<
2341        14,
2342        0x1,
2343        1,
2344        0,
2345        dfifoctr::Bclr,
2346        dfifoctr::Bclr,
2347        Dfifoctr_SPEC,
2348        crate::common::RW,
2349    > {
2350        crate::common::RegisterField::<
2351            14,
2352            0x1,
2353            1,
2354            0,
2355            dfifoctr::Bclr,
2356            dfifoctr::Bclr,
2357            Dfifoctr_SPEC,
2358            crate::common::RW,
2359        >::from_register(self, 0)
2360    }
2361
2362    #[doc = "Buffer Memory Valid Flag"]
2363    #[inline(always)]
2364    pub fn bval(
2365        self,
2366    ) -> crate::common::RegisterField<
2367        15,
2368        0x1,
2369        1,
2370        0,
2371        dfifoctr::Bval,
2372        dfifoctr::Bval,
2373        Dfifoctr_SPEC,
2374        crate::common::RW,
2375    > {
2376        crate::common::RegisterField::<
2377            15,
2378            0x1,
2379            1,
2380            0,
2381            dfifoctr::Bval,
2382            dfifoctr::Bval,
2383            Dfifoctr_SPEC,
2384            crate::common::RW,
2385        >::from_register(self, 0)
2386    }
2387}
2388impl ::core::default::Default for Dfifoctr {
2389    #[inline(always)]
2390    fn default() -> Dfifoctr {
2391        <crate::RegValueT<Dfifoctr_SPEC> as RegisterValue<_>>::new(0)
2392    }
2393}
2394pub mod dfifoctr {
2395
2396    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2397    pub struct Frdy_SPEC;
2398    pub type Frdy = crate::EnumBitfieldStruct<u8, Frdy_SPEC>;
2399    impl Frdy {
2400        #[doc = "FIFO port access disabled"]
2401        pub const _0: Self = Self::new(0);
2402
2403        #[doc = "FIFO port access enabled"]
2404        pub const _1: Self = Self::new(1);
2405    }
2406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2407    pub struct Bclr_SPEC;
2408    pub type Bclr = crate::EnumBitfieldStruct<u8, Bclr_SPEC>;
2409    impl Bclr {
2410        #[doc = "No operation"]
2411        pub const _0: Self = Self::new(0);
2412
2413        #[doc = "Clear FIFO buffer on the CPU side"]
2414        pub const _1: Self = Self::new(1);
2415    }
2416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2417    pub struct Bval_SPEC;
2418    pub type Bval = crate::EnumBitfieldStruct<u8, Bval_SPEC>;
2419    impl Bval {
2420        #[doc = "Invalid (writing 0 has no effect)"]
2421        pub const _0: Self = Self::new(0);
2422
2423        #[doc = "Writing ended"]
2424        pub const _1: Self = Self::new(1);
2425    }
2426}
2427#[doc(hidden)]
2428#[derive(Copy, Clone, Eq, PartialEq)]
2429pub struct Intenb0_SPEC;
2430impl crate::sealed::RegSpec for Intenb0_SPEC {
2431    type DataType = u16;
2432}
2433
2434#[doc = "Interrupt Enable Register 0"]
2435pub type Intenb0 = crate::RegValueT<Intenb0_SPEC>;
2436
2437impl Intenb0 {
2438    #[doc = "Buffer Ready Interrupt Enable"]
2439    #[inline(always)]
2440    pub fn brdye(
2441        self,
2442    ) -> crate::common::RegisterField<
2443        8,
2444        0x1,
2445        1,
2446        0,
2447        intenb0::Brdye,
2448        intenb0::Brdye,
2449        Intenb0_SPEC,
2450        crate::common::RW,
2451    > {
2452        crate::common::RegisterField::<
2453            8,
2454            0x1,
2455            1,
2456            0,
2457            intenb0::Brdye,
2458            intenb0::Brdye,
2459            Intenb0_SPEC,
2460            crate::common::RW,
2461        >::from_register(self, 0)
2462    }
2463
2464    #[doc = "Buffer Not Ready Response Interrupt Enable"]
2465    #[inline(always)]
2466    pub fn nrdye(
2467        self,
2468    ) -> crate::common::RegisterField<
2469        9,
2470        0x1,
2471        1,
2472        0,
2473        intenb0::Nrdye,
2474        intenb0::Nrdye,
2475        Intenb0_SPEC,
2476        crate::common::RW,
2477    > {
2478        crate::common::RegisterField::<
2479            9,
2480            0x1,
2481            1,
2482            0,
2483            intenb0::Nrdye,
2484            intenb0::Nrdye,
2485            Intenb0_SPEC,
2486            crate::common::RW,
2487        >::from_register(self, 0)
2488    }
2489
2490    #[doc = "Buffer Empty Interrupt Enable"]
2491    #[inline(always)]
2492    pub fn bempe(
2493        self,
2494    ) -> crate::common::RegisterField<
2495        10,
2496        0x1,
2497        1,
2498        0,
2499        intenb0::Bempe,
2500        intenb0::Bempe,
2501        Intenb0_SPEC,
2502        crate::common::RW,
2503    > {
2504        crate::common::RegisterField::<
2505            10,
2506            0x1,
2507            1,
2508            0,
2509            intenb0::Bempe,
2510            intenb0::Bempe,
2511            Intenb0_SPEC,
2512            crate::common::RW,
2513        >::from_register(self, 0)
2514    }
2515
2516    #[doc = "Control Transfer Stage Transition Interrupt Enable"]
2517    #[inline(always)]
2518    pub fn ctre(
2519        self,
2520    ) -> crate::common::RegisterField<
2521        11,
2522        0x1,
2523        1,
2524        0,
2525        intenb0::Ctre,
2526        intenb0::Ctre,
2527        Intenb0_SPEC,
2528        crate::common::RW,
2529    > {
2530        crate::common::RegisterField::<
2531            11,
2532            0x1,
2533            1,
2534            0,
2535            intenb0::Ctre,
2536            intenb0::Ctre,
2537            Intenb0_SPEC,
2538            crate::common::RW,
2539        >::from_register(self, 0)
2540    }
2541
2542    #[doc = "Device State Transition Interrupt Enable"]
2543    #[inline(always)]
2544    pub fn dvse(
2545        self,
2546    ) -> crate::common::RegisterField<
2547        12,
2548        0x1,
2549        1,
2550        0,
2551        intenb0::Dvse,
2552        intenb0::Dvse,
2553        Intenb0_SPEC,
2554        crate::common::RW,
2555    > {
2556        crate::common::RegisterField::<
2557            12,
2558            0x1,
2559            1,
2560            0,
2561            intenb0::Dvse,
2562            intenb0::Dvse,
2563            Intenb0_SPEC,
2564            crate::common::RW,
2565        >::from_register(self, 0)
2566    }
2567
2568    #[doc = "Frame Number Update Interrupt Enable"]
2569    #[inline(always)]
2570    pub fn sofe(
2571        self,
2572    ) -> crate::common::RegisterField<
2573        13,
2574        0x1,
2575        1,
2576        0,
2577        intenb0::Sofe,
2578        intenb0::Sofe,
2579        Intenb0_SPEC,
2580        crate::common::RW,
2581    > {
2582        crate::common::RegisterField::<
2583            13,
2584            0x1,
2585            1,
2586            0,
2587            intenb0::Sofe,
2588            intenb0::Sofe,
2589            Intenb0_SPEC,
2590            crate::common::RW,
2591        >::from_register(self, 0)
2592    }
2593
2594    #[doc = "Resume Interrupt Enable"]
2595    #[inline(always)]
2596    pub fn rsme(
2597        self,
2598    ) -> crate::common::RegisterField<
2599        14,
2600        0x1,
2601        1,
2602        0,
2603        intenb0::Rsme,
2604        intenb0::Rsme,
2605        Intenb0_SPEC,
2606        crate::common::RW,
2607    > {
2608        crate::common::RegisterField::<
2609            14,
2610            0x1,
2611            1,
2612            0,
2613            intenb0::Rsme,
2614            intenb0::Rsme,
2615            Intenb0_SPEC,
2616            crate::common::RW,
2617        >::from_register(self, 0)
2618    }
2619
2620    #[doc = "VBUS Interrupt Enable"]
2621    #[inline(always)]
2622    pub fn vbse(
2623        self,
2624    ) -> crate::common::RegisterField<
2625        15,
2626        0x1,
2627        1,
2628        0,
2629        intenb0::Vbse,
2630        intenb0::Vbse,
2631        Intenb0_SPEC,
2632        crate::common::RW,
2633    > {
2634        crate::common::RegisterField::<
2635            15,
2636            0x1,
2637            1,
2638            0,
2639            intenb0::Vbse,
2640            intenb0::Vbse,
2641            Intenb0_SPEC,
2642            crate::common::RW,
2643        >::from_register(self, 0)
2644    }
2645}
2646impl ::core::default::Default for Intenb0 {
2647    #[inline(always)]
2648    fn default() -> Intenb0 {
2649        <crate::RegValueT<Intenb0_SPEC> as RegisterValue<_>>::new(0)
2650    }
2651}
2652pub mod intenb0 {
2653
2654    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2655    pub struct Brdye_SPEC;
2656    pub type Brdye = crate::EnumBitfieldStruct<u8, Brdye_SPEC>;
2657    impl Brdye {
2658        #[doc = "Disable interrupt request"]
2659        pub const _0: Self = Self::new(0);
2660
2661        #[doc = "Enable interrupt request"]
2662        pub const _1: Self = Self::new(1);
2663    }
2664    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2665    pub struct Nrdye_SPEC;
2666    pub type Nrdye = crate::EnumBitfieldStruct<u8, Nrdye_SPEC>;
2667    impl Nrdye {
2668        #[doc = "Disable interrupt request"]
2669        pub const _0: Self = Self::new(0);
2670
2671        #[doc = "Enable interrupt request"]
2672        pub const _1: Self = Self::new(1);
2673    }
2674    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2675    pub struct Bempe_SPEC;
2676    pub type Bempe = crate::EnumBitfieldStruct<u8, Bempe_SPEC>;
2677    impl Bempe {
2678        #[doc = "Disable interrupt request"]
2679        pub const _0: Self = Self::new(0);
2680
2681        #[doc = "Enable interrupt request"]
2682        pub const _1: Self = Self::new(1);
2683    }
2684    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2685    pub struct Ctre_SPEC;
2686    pub type Ctre = crate::EnumBitfieldStruct<u8, Ctre_SPEC>;
2687    impl Ctre {
2688        #[doc = "Disable interrupt request"]
2689        pub const _0: Self = Self::new(0);
2690
2691        #[doc = "Enable interrupt request"]
2692        pub const _1: Self = Self::new(1);
2693    }
2694    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2695    pub struct Dvse_SPEC;
2696    pub type Dvse = crate::EnumBitfieldStruct<u8, Dvse_SPEC>;
2697    impl Dvse {
2698        #[doc = "Disable interrupt request"]
2699        pub const _0: Self = Self::new(0);
2700
2701        #[doc = "Enable interrupt request"]
2702        pub const _1: Self = Self::new(1);
2703    }
2704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2705    pub struct Sofe_SPEC;
2706    pub type Sofe = crate::EnumBitfieldStruct<u8, Sofe_SPEC>;
2707    impl Sofe {
2708        #[doc = "Disable interrupt request"]
2709        pub const _0: Self = Self::new(0);
2710
2711        #[doc = "Enable interrupt request"]
2712        pub const _1: Self = Self::new(1);
2713    }
2714    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2715    pub struct Rsme_SPEC;
2716    pub type Rsme = crate::EnumBitfieldStruct<u8, Rsme_SPEC>;
2717    impl Rsme {
2718        #[doc = "Disable interrupt request"]
2719        pub const _0: Self = Self::new(0);
2720
2721        #[doc = "Enable interrupt request"]
2722        pub const _1: Self = Self::new(1);
2723    }
2724    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2725    pub struct Vbse_SPEC;
2726    pub type Vbse = crate::EnumBitfieldStruct<u8, Vbse_SPEC>;
2727    impl Vbse {
2728        #[doc = "Disable interrupt request"]
2729        pub const _0: Self = Self::new(0);
2730
2731        #[doc = "Enable interrupt request"]
2732        pub const _1: Self = Self::new(1);
2733    }
2734}
2735#[doc(hidden)]
2736#[derive(Copy, Clone, Eq, PartialEq)]
2737pub struct Intenb1_SPEC;
2738impl crate::sealed::RegSpec for Intenb1_SPEC {
2739    type DataType = u16;
2740}
2741
2742#[doc = "Interrupt Enable Register 1"]
2743pub type Intenb1 = crate::RegValueT<Intenb1_SPEC>;
2744
2745impl Intenb1 {
2746    #[doc = "PDDETINT Detection Interrupt Request Enable"]
2747    #[inline(always)]
2748    pub fn pddetinte(
2749        self,
2750    ) -> crate::common::RegisterField<
2751        0,
2752        0x1,
2753        1,
2754        0,
2755        intenb1::Pddetinte,
2756        intenb1::Pddetinte,
2757        Intenb1_SPEC,
2758        crate::common::RW,
2759    > {
2760        crate::common::RegisterField::<
2761            0,
2762            0x1,
2763            1,
2764            0,
2765            intenb1::Pddetinte,
2766            intenb1::Pddetinte,
2767            Intenb1_SPEC,
2768            crate::common::RW,
2769        >::from_register(self, 0)
2770    }
2771
2772    #[doc = "Setup Transaction Normal Response Interrupt Enable"]
2773    #[inline(always)]
2774    pub fn sacke(
2775        self,
2776    ) -> crate::common::RegisterField<
2777        4,
2778        0x1,
2779        1,
2780        0,
2781        intenb1::Sacke,
2782        intenb1::Sacke,
2783        Intenb1_SPEC,
2784        crate::common::RW,
2785    > {
2786        crate::common::RegisterField::<
2787            4,
2788            0x1,
2789            1,
2790            0,
2791            intenb1::Sacke,
2792            intenb1::Sacke,
2793            Intenb1_SPEC,
2794            crate::common::RW,
2795        >::from_register(self, 0)
2796    }
2797
2798    #[doc = "Setup Transaction Error Interrupt Enable"]
2799    #[inline(always)]
2800    pub fn signe(
2801        self,
2802    ) -> crate::common::RegisterField<
2803        5,
2804        0x1,
2805        1,
2806        0,
2807        intenb1::Signe,
2808        intenb1::Signe,
2809        Intenb1_SPEC,
2810        crate::common::RW,
2811    > {
2812        crate::common::RegisterField::<
2813            5,
2814            0x1,
2815            1,
2816            0,
2817            intenb1::Signe,
2818            intenb1::Signe,
2819            Intenb1_SPEC,
2820            crate::common::RW,
2821        >::from_register(self, 0)
2822    }
2823
2824    #[doc = "EOF Error Detection Interrupt Enable"]
2825    #[inline(always)]
2826    pub fn eoferre(
2827        self,
2828    ) -> crate::common::RegisterField<
2829        6,
2830        0x1,
2831        1,
2832        0,
2833        intenb1::Eoferre,
2834        intenb1::Eoferre,
2835        Intenb1_SPEC,
2836        crate::common::RW,
2837    > {
2838        crate::common::RegisterField::<
2839            6,
2840            0x1,
2841            1,
2842            0,
2843            intenb1::Eoferre,
2844            intenb1::Eoferre,
2845            Intenb1_SPEC,
2846            crate::common::RW,
2847        >::from_register(self, 0)
2848    }
2849
2850    #[doc = "Connection Detection Interrupt Enable"]
2851    #[inline(always)]
2852    pub fn attche(
2853        self,
2854    ) -> crate::common::RegisterField<
2855        11,
2856        0x1,
2857        1,
2858        0,
2859        intenb1::Attche,
2860        intenb1::Attche,
2861        Intenb1_SPEC,
2862        crate::common::RW,
2863    > {
2864        crate::common::RegisterField::<
2865            11,
2866            0x1,
2867            1,
2868            0,
2869            intenb1::Attche,
2870            intenb1::Attche,
2871            Intenb1_SPEC,
2872            crate::common::RW,
2873        >::from_register(self, 0)
2874    }
2875
2876    #[doc = "Disconnection Detection Interrupt Enable"]
2877    #[inline(always)]
2878    pub fn dtche(
2879        self,
2880    ) -> crate::common::RegisterField<
2881        12,
2882        0x1,
2883        1,
2884        0,
2885        intenb1::Dtche,
2886        intenb1::Dtche,
2887        Intenb1_SPEC,
2888        crate::common::RW,
2889    > {
2890        crate::common::RegisterField::<
2891            12,
2892            0x1,
2893            1,
2894            0,
2895            intenb1::Dtche,
2896            intenb1::Dtche,
2897            Intenb1_SPEC,
2898            crate::common::RW,
2899        >::from_register(self, 0)
2900    }
2901
2902    #[doc = "USB Bus Change Interrupt Enable"]
2903    #[inline(always)]
2904    pub fn bchge(
2905        self,
2906    ) -> crate::common::RegisterField<
2907        14,
2908        0x1,
2909        1,
2910        0,
2911        intenb1::Bchge,
2912        intenb1::Bchge,
2913        Intenb1_SPEC,
2914        crate::common::RW,
2915    > {
2916        crate::common::RegisterField::<
2917            14,
2918            0x1,
2919            1,
2920            0,
2921            intenb1::Bchge,
2922            intenb1::Bchge,
2923            Intenb1_SPEC,
2924            crate::common::RW,
2925        >::from_register(self, 0)
2926    }
2927
2928    #[doc = "Overcurrent Input Change Interrupt Enable"]
2929    #[inline(always)]
2930    pub fn ovrcre(
2931        self,
2932    ) -> crate::common::RegisterField<
2933        15,
2934        0x1,
2935        1,
2936        0,
2937        intenb1::Ovrcre,
2938        intenb1::Ovrcre,
2939        Intenb1_SPEC,
2940        crate::common::RW,
2941    > {
2942        crate::common::RegisterField::<
2943            15,
2944            0x1,
2945            1,
2946            0,
2947            intenb1::Ovrcre,
2948            intenb1::Ovrcre,
2949            Intenb1_SPEC,
2950            crate::common::RW,
2951        >::from_register(self, 0)
2952    }
2953}
2954impl ::core::default::Default for Intenb1 {
2955    #[inline(always)]
2956    fn default() -> Intenb1 {
2957        <crate::RegValueT<Intenb1_SPEC> as RegisterValue<_>>::new(0)
2958    }
2959}
2960pub mod intenb1 {
2961
2962    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2963    pub struct Pddetinte_SPEC;
2964    pub type Pddetinte = crate::EnumBitfieldStruct<u8, Pddetinte_SPEC>;
2965    impl Pddetinte {
2966        #[doc = "Disable interrupt request"]
2967        pub const _0: Self = Self::new(0);
2968
2969        #[doc = "Enable interrupt request"]
2970        pub const _1: Self = Self::new(1);
2971    }
2972    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2973    pub struct Sacke_SPEC;
2974    pub type Sacke = crate::EnumBitfieldStruct<u8, Sacke_SPEC>;
2975    impl Sacke {
2976        #[doc = "Disable interrupt request"]
2977        pub const _0: Self = Self::new(0);
2978
2979        #[doc = "Enable interrupt request"]
2980        pub const _1: Self = Self::new(1);
2981    }
2982    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2983    pub struct Signe_SPEC;
2984    pub type Signe = crate::EnumBitfieldStruct<u8, Signe_SPEC>;
2985    impl Signe {
2986        #[doc = "Disable interrupt request"]
2987        pub const _0: Self = Self::new(0);
2988
2989        #[doc = "Enable interrupt request"]
2990        pub const _1: Self = Self::new(1);
2991    }
2992    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2993    pub struct Eoferre_SPEC;
2994    pub type Eoferre = crate::EnumBitfieldStruct<u8, Eoferre_SPEC>;
2995    impl Eoferre {
2996        #[doc = "Disable interrupt request"]
2997        pub const _0: Self = Self::new(0);
2998
2999        #[doc = "Enable interrupt request"]
3000        pub const _1: Self = Self::new(1);
3001    }
3002    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3003    pub struct Attche_SPEC;
3004    pub type Attche = crate::EnumBitfieldStruct<u8, Attche_SPEC>;
3005    impl Attche {
3006        #[doc = "Disable interrupt request"]
3007        pub const _0: Self = Self::new(0);
3008
3009        #[doc = "Enable interrupt request"]
3010        pub const _1: Self = Self::new(1);
3011    }
3012    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3013    pub struct Dtche_SPEC;
3014    pub type Dtche = crate::EnumBitfieldStruct<u8, Dtche_SPEC>;
3015    impl Dtche {
3016        #[doc = "Disable interrupt request"]
3017        pub const _0: Self = Self::new(0);
3018
3019        #[doc = "Enable interrupt request"]
3020        pub const _1: Self = Self::new(1);
3021    }
3022    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3023    pub struct Bchge_SPEC;
3024    pub type Bchge = crate::EnumBitfieldStruct<u8, Bchge_SPEC>;
3025    impl Bchge {
3026        #[doc = "Disable interrupt request"]
3027        pub const _0: Self = Self::new(0);
3028
3029        #[doc = "Enable interrupt request"]
3030        pub const _1: Self = Self::new(1);
3031    }
3032    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3033    pub struct Ovrcre_SPEC;
3034    pub type Ovrcre = crate::EnumBitfieldStruct<u8, Ovrcre_SPEC>;
3035    impl Ovrcre {
3036        #[doc = "Disable interrupt request"]
3037        pub const _0: Self = Self::new(0);
3038
3039        #[doc = "Enable interrupt request"]
3040        pub const _1: Self = Self::new(1);
3041    }
3042}
3043#[doc(hidden)]
3044#[derive(Copy, Clone, Eq, PartialEq)]
3045pub struct Brdyenb_SPEC;
3046impl crate::sealed::RegSpec for Brdyenb_SPEC {
3047    type DataType = u16;
3048}
3049
3050#[doc = "BRDY Interrupt Enable Register"]
3051pub type Brdyenb = crate::RegValueT<Brdyenb_SPEC>;
3052
3053impl Brdyenb {
3054    #[doc = "BRDY Interrupt Enable for Pipe 0"]
3055    #[inline(always)]
3056    pub fn pipe0brdye(
3057        self,
3058    ) -> crate::common::RegisterField<
3059        0,
3060        0x1,
3061        1,
3062        0,
3063        brdyenb::Pipe0Brdye,
3064        brdyenb::Pipe0Brdye,
3065        Brdyenb_SPEC,
3066        crate::common::RW,
3067    > {
3068        crate::common::RegisterField::<
3069            0,
3070            0x1,
3071            1,
3072            0,
3073            brdyenb::Pipe0Brdye,
3074            brdyenb::Pipe0Brdye,
3075            Brdyenb_SPEC,
3076            crate::common::RW,
3077        >::from_register(self, 0)
3078    }
3079
3080    #[doc = "BRDY Interrupt Enable for Pipe 1"]
3081    #[inline(always)]
3082    pub fn pipe1brdye(
3083        self,
3084    ) -> crate::common::RegisterField<
3085        1,
3086        0x1,
3087        1,
3088        0,
3089        brdyenb::Pipe1Brdye,
3090        brdyenb::Pipe1Brdye,
3091        Brdyenb_SPEC,
3092        crate::common::RW,
3093    > {
3094        crate::common::RegisterField::<
3095            1,
3096            0x1,
3097            1,
3098            0,
3099            brdyenb::Pipe1Brdye,
3100            brdyenb::Pipe1Brdye,
3101            Brdyenb_SPEC,
3102            crate::common::RW,
3103        >::from_register(self, 0)
3104    }
3105
3106    #[doc = "BRDY Interrupt Enable for Pipe 2"]
3107    #[inline(always)]
3108    pub fn pipe2brdye(
3109        self,
3110    ) -> crate::common::RegisterField<
3111        2,
3112        0x1,
3113        1,
3114        0,
3115        brdyenb::Pipe2Brdye,
3116        brdyenb::Pipe2Brdye,
3117        Brdyenb_SPEC,
3118        crate::common::RW,
3119    > {
3120        crate::common::RegisterField::<
3121            2,
3122            0x1,
3123            1,
3124            0,
3125            brdyenb::Pipe2Brdye,
3126            brdyenb::Pipe2Brdye,
3127            Brdyenb_SPEC,
3128            crate::common::RW,
3129        >::from_register(self, 0)
3130    }
3131
3132    #[doc = "BRDY Interrupt Enable for Pipe 3"]
3133    #[inline(always)]
3134    pub fn pipe3brdye(
3135        self,
3136    ) -> crate::common::RegisterField<
3137        3,
3138        0x1,
3139        1,
3140        0,
3141        brdyenb::Pipe3Brdye,
3142        brdyenb::Pipe3Brdye,
3143        Brdyenb_SPEC,
3144        crate::common::RW,
3145    > {
3146        crate::common::RegisterField::<
3147            3,
3148            0x1,
3149            1,
3150            0,
3151            brdyenb::Pipe3Brdye,
3152            brdyenb::Pipe3Brdye,
3153            Brdyenb_SPEC,
3154            crate::common::RW,
3155        >::from_register(self, 0)
3156    }
3157
3158    #[doc = "BRDY Interrupt Enable for Pipe 4"]
3159    #[inline(always)]
3160    pub fn pipe4brdye(
3161        self,
3162    ) -> crate::common::RegisterField<
3163        4,
3164        0x1,
3165        1,
3166        0,
3167        brdyenb::Pipe4Brdye,
3168        brdyenb::Pipe4Brdye,
3169        Brdyenb_SPEC,
3170        crate::common::RW,
3171    > {
3172        crate::common::RegisterField::<
3173            4,
3174            0x1,
3175            1,
3176            0,
3177            brdyenb::Pipe4Brdye,
3178            brdyenb::Pipe4Brdye,
3179            Brdyenb_SPEC,
3180            crate::common::RW,
3181        >::from_register(self, 0)
3182    }
3183
3184    #[doc = "BRDY Interrupt Enable for Pipe 5"]
3185    #[inline(always)]
3186    pub fn pipe5brdye(
3187        self,
3188    ) -> crate::common::RegisterField<
3189        5,
3190        0x1,
3191        1,
3192        0,
3193        brdyenb::Pipe5Brdye,
3194        brdyenb::Pipe5Brdye,
3195        Brdyenb_SPEC,
3196        crate::common::RW,
3197    > {
3198        crate::common::RegisterField::<
3199            5,
3200            0x1,
3201            1,
3202            0,
3203            brdyenb::Pipe5Brdye,
3204            brdyenb::Pipe5Brdye,
3205            Brdyenb_SPEC,
3206            crate::common::RW,
3207        >::from_register(self, 0)
3208    }
3209
3210    #[doc = "BRDY Interrupt Enable for Pipe 6"]
3211    #[inline(always)]
3212    pub fn pipe6brdye(
3213        self,
3214    ) -> crate::common::RegisterField<
3215        6,
3216        0x1,
3217        1,
3218        0,
3219        brdyenb::Pipe6Brdye,
3220        brdyenb::Pipe6Brdye,
3221        Brdyenb_SPEC,
3222        crate::common::RW,
3223    > {
3224        crate::common::RegisterField::<
3225            6,
3226            0x1,
3227            1,
3228            0,
3229            brdyenb::Pipe6Brdye,
3230            brdyenb::Pipe6Brdye,
3231            Brdyenb_SPEC,
3232            crate::common::RW,
3233        >::from_register(self, 0)
3234    }
3235
3236    #[doc = "BRDY Interrupt Enable for Pipe 7"]
3237    #[inline(always)]
3238    pub fn pipe7brdye(
3239        self,
3240    ) -> crate::common::RegisterField<
3241        7,
3242        0x1,
3243        1,
3244        0,
3245        brdyenb::Pipe7Brdye,
3246        brdyenb::Pipe7Brdye,
3247        Brdyenb_SPEC,
3248        crate::common::RW,
3249    > {
3250        crate::common::RegisterField::<
3251            7,
3252            0x1,
3253            1,
3254            0,
3255            brdyenb::Pipe7Brdye,
3256            brdyenb::Pipe7Brdye,
3257            Brdyenb_SPEC,
3258            crate::common::RW,
3259        >::from_register(self, 0)
3260    }
3261
3262    #[doc = "BRDY Interrupt Enable for Pipe 8"]
3263    #[inline(always)]
3264    pub fn pipe8brdye(
3265        self,
3266    ) -> crate::common::RegisterField<
3267        8,
3268        0x1,
3269        1,
3270        0,
3271        brdyenb::Pipe8Brdye,
3272        brdyenb::Pipe8Brdye,
3273        Brdyenb_SPEC,
3274        crate::common::RW,
3275    > {
3276        crate::common::RegisterField::<
3277            8,
3278            0x1,
3279            1,
3280            0,
3281            brdyenb::Pipe8Brdye,
3282            brdyenb::Pipe8Brdye,
3283            Brdyenb_SPEC,
3284            crate::common::RW,
3285        >::from_register(self, 0)
3286    }
3287
3288    #[doc = "BRDY Interrupt Enable for Pipe 9"]
3289    #[inline(always)]
3290    pub fn pipe9brdye(
3291        self,
3292    ) -> crate::common::RegisterField<
3293        9,
3294        0x1,
3295        1,
3296        0,
3297        brdyenb::Pipe9Brdye,
3298        brdyenb::Pipe9Brdye,
3299        Brdyenb_SPEC,
3300        crate::common::RW,
3301    > {
3302        crate::common::RegisterField::<
3303            9,
3304            0x1,
3305            1,
3306            0,
3307            brdyenb::Pipe9Brdye,
3308            brdyenb::Pipe9Brdye,
3309            Brdyenb_SPEC,
3310            crate::common::RW,
3311        >::from_register(self, 0)
3312    }
3313}
3314impl ::core::default::Default for Brdyenb {
3315    #[inline(always)]
3316    fn default() -> Brdyenb {
3317        <crate::RegValueT<Brdyenb_SPEC> as RegisterValue<_>>::new(0)
3318    }
3319}
3320pub mod brdyenb {
3321
3322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3323    pub struct Pipe0Brdye_SPEC;
3324    pub type Pipe0Brdye = crate::EnumBitfieldStruct<u8, Pipe0Brdye_SPEC>;
3325    impl Pipe0Brdye {
3326        #[doc = "Disable interrupt request"]
3327        pub const _0: Self = Self::new(0);
3328
3329        #[doc = "Enable interrupt request"]
3330        pub const _1: Self = Self::new(1);
3331    }
3332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3333    pub struct Pipe1Brdye_SPEC;
3334    pub type Pipe1Brdye = crate::EnumBitfieldStruct<u8, Pipe1Brdye_SPEC>;
3335    impl Pipe1Brdye {
3336        #[doc = "Disable interrupt request"]
3337        pub const _0: Self = Self::new(0);
3338
3339        #[doc = "Enable interrupt request"]
3340        pub const _1: Self = Self::new(1);
3341    }
3342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3343    pub struct Pipe2Brdye_SPEC;
3344    pub type Pipe2Brdye = crate::EnumBitfieldStruct<u8, Pipe2Brdye_SPEC>;
3345    impl Pipe2Brdye {
3346        #[doc = "Disable interrupt request"]
3347        pub const _0: Self = Self::new(0);
3348
3349        #[doc = "Enable interrupt request"]
3350        pub const _1: Self = Self::new(1);
3351    }
3352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3353    pub struct Pipe3Brdye_SPEC;
3354    pub type Pipe3Brdye = crate::EnumBitfieldStruct<u8, Pipe3Brdye_SPEC>;
3355    impl Pipe3Brdye {
3356        #[doc = "Disable interrupt request"]
3357        pub const _0: Self = Self::new(0);
3358
3359        #[doc = "Enable interrupt request"]
3360        pub const _1: Self = Self::new(1);
3361    }
3362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3363    pub struct Pipe4Brdye_SPEC;
3364    pub type Pipe4Brdye = crate::EnumBitfieldStruct<u8, Pipe4Brdye_SPEC>;
3365    impl Pipe4Brdye {
3366        #[doc = "Disable interrupt request"]
3367        pub const _0: Self = Self::new(0);
3368
3369        #[doc = "Enable interrupt request"]
3370        pub const _1: Self = Self::new(1);
3371    }
3372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3373    pub struct Pipe5Brdye_SPEC;
3374    pub type Pipe5Brdye = crate::EnumBitfieldStruct<u8, Pipe5Brdye_SPEC>;
3375    impl Pipe5Brdye {
3376        #[doc = "Disable interrupt request"]
3377        pub const _0: Self = Self::new(0);
3378
3379        #[doc = "Enable interrupt request"]
3380        pub const _1: Self = Self::new(1);
3381    }
3382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3383    pub struct Pipe6Brdye_SPEC;
3384    pub type Pipe6Brdye = crate::EnumBitfieldStruct<u8, Pipe6Brdye_SPEC>;
3385    impl Pipe6Brdye {
3386        #[doc = "Disable interrupt request"]
3387        pub const _0: Self = Self::new(0);
3388
3389        #[doc = "Enable interrupt request"]
3390        pub const _1: Self = Self::new(1);
3391    }
3392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3393    pub struct Pipe7Brdye_SPEC;
3394    pub type Pipe7Brdye = crate::EnumBitfieldStruct<u8, Pipe7Brdye_SPEC>;
3395    impl Pipe7Brdye {
3396        #[doc = "Disable interrupt request"]
3397        pub const _0: Self = Self::new(0);
3398
3399        #[doc = "Enable interrupt request"]
3400        pub const _1: Self = Self::new(1);
3401    }
3402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3403    pub struct Pipe8Brdye_SPEC;
3404    pub type Pipe8Brdye = crate::EnumBitfieldStruct<u8, Pipe8Brdye_SPEC>;
3405    impl Pipe8Brdye {
3406        #[doc = "Disable interrupt request"]
3407        pub const _0: Self = Self::new(0);
3408
3409        #[doc = "Enable interrupt request"]
3410        pub const _1: Self = Self::new(1);
3411    }
3412    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3413    pub struct Pipe9Brdye_SPEC;
3414    pub type Pipe9Brdye = crate::EnumBitfieldStruct<u8, Pipe9Brdye_SPEC>;
3415    impl Pipe9Brdye {
3416        #[doc = "Disable interrupt request"]
3417        pub const _0: Self = Self::new(0);
3418
3419        #[doc = "Enable interrupt request"]
3420        pub const _1: Self = Self::new(1);
3421    }
3422}
3423#[doc(hidden)]
3424#[derive(Copy, Clone, Eq, PartialEq)]
3425pub struct Nrdyenb_SPEC;
3426impl crate::sealed::RegSpec for Nrdyenb_SPEC {
3427    type DataType = u16;
3428}
3429
3430#[doc = "NRDY Interrupt Enable Register"]
3431pub type Nrdyenb = crate::RegValueT<Nrdyenb_SPEC>;
3432
3433impl Nrdyenb {
3434    #[doc = "NRDY Interrupt Enable for Pipe 0"]
3435    #[inline(always)]
3436    pub fn pipe0nrdye(
3437        self,
3438    ) -> crate::common::RegisterField<
3439        0,
3440        0x1,
3441        1,
3442        0,
3443        nrdyenb::Pipe0Nrdye,
3444        nrdyenb::Pipe0Nrdye,
3445        Nrdyenb_SPEC,
3446        crate::common::RW,
3447    > {
3448        crate::common::RegisterField::<
3449            0,
3450            0x1,
3451            1,
3452            0,
3453            nrdyenb::Pipe0Nrdye,
3454            nrdyenb::Pipe0Nrdye,
3455            Nrdyenb_SPEC,
3456            crate::common::RW,
3457        >::from_register(self, 0)
3458    }
3459
3460    #[doc = "NRDY Interrupt Enable for Pipe 1"]
3461    #[inline(always)]
3462    pub fn pipe1nrdye(
3463        self,
3464    ) -> crate::common::RegisterField<
3465        1,
3466        0x1,
3467        1,
3468        0,
3469        nrdyenb::Pipe1Nrdye,
3470        nrdyenb::Pipe1Nrdye,
3471        Nrdyenb_SPEC,
3472        crate::common::RW,
3473    > {
3474        crate::common::RegisterField::<
3475            1,
3476            0x1,
3477            1,
3478            0,
3479            nrdyenb::Pipe1Nrdye,
3480            nrdyenb::Pipe1Nrdye,
3481            Nrdyenb_SPEC,
3482            crate::common::RW,
3483        >::from_register(self, 0)
3484    }
3485
3486    #[doc = "NRDY Interrupt Enable for Pipe 2"]
3487    #[inline(always)]
3488    pub fn pipe2nrdye(
3489        self,
3490    ) -> crate::common::RegisterField<
3491        2,
3492        0x1,
3493        1,
3494        0,
3495        nrdyenb::Pipe2Nrdye,
3496        nrdyenb::Pipe2Nrdye,
3497        Nrdyenb_SPEC,
3498        crate::common::RW,
3499    > {
3500        crate::common::RegisterField::<
3501            2,
3502            0x1,
3503            1,
3504            0,
3505            nrdyenb::Pipe2Nrdye,
3506            nrdyenb::Pipe2Nrdye,
3507            Nrdyenb_SPEC,
3508            crate::common::RW,
3509        >::from_register(self, 0)
3510    }
3511
3512    #[doc = "NRDY Interrupt Enable for Pipe 3"]
3513    #[inline(always)]
3514    pub fn pipe3nrdye(
3515        self,
3516    ) -> crate::common::RegisterField<
3517        3,
3518        0x1,
3519        1,
3520        0,
3521        nrdyenb::Pipe3Nrdye,
3522        nrdyenb::Pipe3Nrdye,
3523        Nrdyenb_SPEC,
3524        crate::common::RW,
3525    > {
3526        crate::common::RegisterField::<
3527            3,
3528            0x1,
3529            1,
3530            0,
3531            nrdyenb::Pipe3Nrdye,
3532            nrdyenb::Pipe3Nrdye,
3533            Nrdyenb_SPEC,
3534            crate::common::RW,
3535        >::from_register(self, 0)
3536    }
3537
3538    #[doc = "NRDY Interrupt Enable for Pipe 4"]
3539    #[inline(always)]
3540    pub fn pipe4nrdye(
3541        self,
3542    ) -> crate::common::RegisterField<
3543        4,
3544        0x1,
3545        1,
3546        0,
3547        nrdyenb::Pipe4Nrdye,
3548        nrdyenb::Pipe4Nrdye,
3549        Nrdyenb_SPEC,
3550        crate::common::RW,
3551    > {
3552        crate::common::RegisterField::<
3553            4,
3554            0x1,
3555            1,
3556            0,
3557            nrdyenb::Pipe4Nrdye,
3558            nrdyenb::Pipe4Nrdye,
3559            Nrdyenb_SPEC,
3560            crate::common::RW,
3561        >::from_register(self, 0)
3562    }
3563
3564    #[doc = "NRDY Interrupt Enable for Pipe 5"]
3565    #[inline(always)]
3566    pub fn pipe5nrdye(
3567        self,
3568    ) -> crate::common::RegisterField<
3569        5,
3570        0x1,
3571        1,
3572        0,
3573        nrdyenb::Pipe5Nrdye,
3574        nrdyenb::Pipe5Nrdye,
3575        Nrdyenb_SPEC,
3576        crate::common::RW,
3577    > {
3578        crate::common::RegisterField::<
3579            5,
3580            0x1,
3581            1,
3582            0,
3583            nrdyenb::Pipe5Nrdye,
3584            nrdyenb::Pipe5Nrdye,
3585            Nrdyenb_SPEC,
3586            crate::common::RW,
3587        >::from_register(self, 0)
3588    }
3589
3590    #[doc = "NRDY Interrupt Enable for Pipe 6"]
3591    #[inline(always)]
3592    pub fn pipe6nrdye(
3593        self,
3594    ) -> crate::common::RegisterField<
3595        6,
3596        0x1,
3597        1,
3598        0,
3599        nrdyenb::Pipe6Nrdye,
3600        nrdyenb::Pipe6Nrdye,
3601        Nrdyenb_SPEC,
3602        crate::common::RW,
3603    > {
3604        crate::common::RegisterField::<
3605            6,
3606            0x1,
3607            1,
3608            0,
3609            nrdyenb::Pipe6Nrdye,
3610            nrdyenb::Pipe6Nrdye,
3611            Nrdyenb_SPEC,
3612            crate::common::RW,
3613        >::from_register(self, 0)
3614    }
3615
3616    #[doc = "NRDY Interrupt Enable for Pipe 7"]
3617    #[inline(always)]
3618    pub fn pipe7nrdye(
3619        self,
3620    ) -> crate::common::RegisterField<
3621        7,
3622        0x1,
3623        1,
3624        0,
3625        nrdyenb::Pipe7Nrdye,
3626        nrdyenb::Pipe7Nrdye,
3627        Nrdyenb_SPEC,
3628        crate::common::RW,
3629    > {
3630        crate::common::RegisterField::<
3631            7,
3632            0x1,
3633            1,
3634            0,
3635            nrdyenb::Pipe7Nrdye,
3636            nrdyenb::Pipe7Nrdye,
3637            Nrdyenb_SPEC,
3638            crate::common::RW,
3639        >::from_register(self, 0)
3640    }
3641
3642    #[doc = "NRDY Interrupt Enable for Pipe 8"]
3643    #[inline(always)]
3644    pub fn pipe8nrdye(
3645        self,
3646    ) -> crate::common::RegisterField<
3647        8,
3648        0x1,
3649        1,
3650        0,
3651        nrdyenb::Pipe8Nrdye,
3652        nrdyenb::Pipe8Nrdye,
3653        Nrdyenb_SPEC,
3654        crate::common::RW,
3655    > {
3656        crate::common::RegisterField::<
3657            8,
3658            0x1,
3659            1,
3660            0,
3661            nrdyenb::Pipe8Nrdye,
3662            nrdyenb::Pipe8Nrdye,
3663            Nrdyenb_SPEC,
3664            crate::common::RW,
3665        >::from_register(self, 0)
3666    }
3667
3668    #[doc = "NRDY Interrupt Enable for Pipe 9"]
3669    #[inline(always)]
3670    pub fn pipe9nrdye(
3671        self,
3672    ) -> crate::common::RegisterField<
3673        9,
3674        0x1,
3675        1,
3676        0,
3677        nrdyenb::Pipe9Nrdye,
3678        nrdyenb::Pipe9Nrdye,
3679        Nrdyenb_SPEC,
3680        crate::common::RW,
3681    > {
3682        crate::common::RegisterField::<
3683            9,
3684            0x1,
3685            1,
3686            0,
3687            nrdyenb::Pipe9Nrdye,
3688            nrdyenb::Pipe9Nrdye,
3689            Nrdyenb_SPEC,
3690            crate::common::RW,
3691        >::from_register(self, 0)
3692    }
3693}
3694impl ::core::default::Default for Nrdyenb {
3695    #[inline(always)]
3696    fn default() -> Nrdyenb {
3697        <crate::RegValueT<Nrdyenb_SPEC> as RegisterValue<_>>::new(0)
3698    }
3699}
3700pub mod nrdyenb {
3701
3702    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3703    pub struct Pipe0Nrdye_SPEC;
3704    pub type Pipe0Nrdye = crate::EnumBitfieldStruct<u8, Pipe0Nrdye_SPEC>;
3705    impl Pipe0Nrdye {
3706        #[doc = "Disable interrupt request"]
3707        pub const _0: Self = Self::new(0);
3708
3709        #[doc = "Enable interrupt request"]
3710        pub const _1: Self = Self::new(1);
3711    }
3712    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3713    pub struct Pipe1Nrdye_SPEC;
3714    pub type Pipe1Nrdye = crate::EnumBitfieldStruct<u8, Pipe1Nrdye_SPEC>;
3715    impl Pipe1Nrdye {
3716        #[doc = "Disable interrupt request"]
3717        pub const _0: Self = Self::new(0);
3718
3719        #[doc = "Enable interrupt request"]
3720        pub const _1: Self = Self::new(1);
3721    }
3722    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3723    pub struct Pipe2Nrdye_SPEC;
3724    pub type Pipe2Nrdye = crate::EnumBitfieldStruct<u8, Pipe2Nrdye_SPEC>;
3725    impl Pipe2Nrdye {
3726        #[doc = "Disable interrupt request"]
3727        pub const _0: Self = Self::new(0);
3728
3729        #[doc = "Enable interrupt request"]
3730        pub const _1: Self = Self::new(1);
3731    }
3732    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3733    pub struct Pipe3Nrdye_SPEC;
3734    pub type Pipe3Nrdye = crate::EnumBitfieldStruct<u8, Pipe3Nrdye_SPEC>;
3735    impl Pipe3Nrdye {
3736        #[doc = "Disable interrupt request"]
3737        pub const _0: Self = Self::new(0);
3738
3739        #[doc = "Enable interrupt request"]
3740        pub const _1: Self = Self::new(1);
3741    }
3742    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3743    pub struct Pipe4Nrdye_SPEC;
3744    pub type Pipe4Nrdye = crate::EnumBitfieldStruct<u8, Pipe4Nrdye_SPEC>;
3745    impl Pipe4Nrdye {
3746        #[doc = "Disable interrupt request"]
3747        pub const _0: Self = Self::new(0);
3748
3749        #[doc = "Enable interrupt request"]
3750        pub const _1: Self = Self::new(1);
3751    }
3752    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3753    pub struct Pipe5Nrdye_SPEC;
3754    pub type Pipe5Nrdye = crate::EnumBitfieldStruct<u8, Pipe5Nrdye_SPEC>;
3755    impl Pipe5Nrdye {
3756        #[doc = "Disable interrupt request"]
3757        pub const _0: Self = Self::new(0);
3758
3759        #[doc = "Enable interrupt request"]
3760        pub const _1: Self = Self::new(1);
3761    }
3762    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3763    pub struct Pipe6Nrdye_SPEC;
3764    pub type Pipe6Nrdye = crate::EnumBitfieldStruct<u8, Pipe6Nrdye_SPEC>;
3765    impl Pipe6Nrdye {
3766        #[doc = "Disable interrupt request"]
3767        pub const _0: Self = Self::new(0);
3768
3769        #[doc = "Enable interrupt request"]
3770        pub const _1: Self = Self::new(1);
3771    }
3772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3773    pub struct Pipe7Nrdye_SPEC;
3774    pub type Pipe7Nrdye = crate::EnumBitfieldStruct<u8, Pipe7Nrdye_SPEC>;
3775    impl Pipe7Nrdye {
3776        #[doc = "Disable interrupt request"]
3777        pub const _0: Self = Self::new(0);
3778
3779        #[doc = "Enable interrupt request"]
3780        pub const _1: Self = Self::new(1);
3781    }
3782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3783    pub struct Pipe8Nrdye_SPEC;
3784    pub type Pipe8Nrdye = crate::EnumBitfieldStruct<u8, Pipe8Nrdye_SPEC>;
3785    impl Pipe8Nrdye {
3786        #[doc = "Disable interrupt request"]
3787        pub const _0: Self = Self::new(0);
3788
3789        #[doc = "Enable interrupt request"]
3790        pub const _1: Self = Self::new(1);
3791    }
3792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3793    pub struct Pipe9Nrdye_SPEC;
3794    pub type Pipe9Nrdye = crate::EnumBitfieldStruct<u8, Pipe9Nrdye_SPEC>;
3795    impl Pipe9Nrdye {
3796        #[doc = "Disable interrupt request"]
3797        pub const _0: Self = Self::new(0);
3798
3799        #[doc = "Enable interrupt request"]
3800        pub const _1: Self = Self::new(1);
3801    }
3802}
3803#[doc(hidden)]
3804#[derive(Copy, Clone, Eq, PartialEq)]
3805pub struct Bempenb_SPEC;
3806impl crate::sealed::RegSpec for Bempenb_SPEC {
3807    type DataType = u16;
3808}
3809
3810#[doc = "BEMP Interrupt Enable Register"]
3811pub type Bempenb = crate::RegValueT<Bempenb_SPEC>;
3812
3813impl Bempenb {
3814    #[doc = "BEMP Interrupt Enable for Pipe 0"]
3815    #[inline(always)]
3816    pub fn pipe0bempe(
3817        self,
3818    ) -> crate::common::RegisterField<
3819        0,
3820        0x1,
3821        1,
3822        0,
3823        bempenb::Pipe0Bempe,
3824        bempenb::Pipe0Bempe,
3825        Bempenb_SPEC,
3826        crate::common::RW,
3827    > {
3828        crate::common::RegisterField::<
3829            0,
3830            0x1,
3831            1,
3832            0,
3833            bempenb::Pipe0Bempe,
3834            bempenb::Pipe0Bempe,
3835            Bempenb_SPEC,
3836            crate::common::RW,
3837        >::from_register(self, 0)
3838    }
3839
3840    #[doc = "BEMP Interrupt Enable for Pipe 1"]
3841    #[inline(always)]
3842    pub fn pipe1bempe(
3843        self,
3844    ) -> crate::common::RegisterField<
3845        1,
3846        0x1,
3847        1,
3848        0,
3849        bempenb::Pipe1Bempe,
3850        bempenb::Pipe1Bempe,
3851        Bempenb_SPEC,
3852        crate::common::RW,
3853    > {
3854        crate::common::RegisterField::<
3855            1,
3856            0x1,
3857            1,
3858            0,
3859            bempenb::Pipe1Bempe,
3860            bempenb::Pipe1Bempe,
3861            Bempenb_SPEC,
3862            crate::common::RW,
3863        >::from_register(self, 0)
3864    }
3865
3866    #[doc = "BEMP Interrupt Enable for Pipe 2"]
3867    #[inline(always)]
3868    pub fn pipe2bempe(
3869        self,
3870    ) -> crate::common::RegisterField<
3871        2,
3872        0x1,
3873        1,
3874        0,
3875        bempenb::Pipe2Bempe,
3876        bempenb::Pipe2Bempe,
3877        Bempenb_SPEC,
3878        crate::common::RW,
3879    > {
3880        crate::common::RegisterField::<
3881            2,
3882            0x1,
3883            1,
3884            0,
3885            bempenb::Pipe2Bempe,
3886            bempenb::Pipe2Bempe,
3887            Bempenb_SPEC,
3888            crate::common::RW,
3889        >::from_register(self, 0)
3890    }
3891
3892    #[doc = "BEMP Interrupt Enable for Pipe 3"]
3893    #[inline(always)]
3894    pub fn pipe3bempe(
3895        self,
3896    ) -> crate::common::RegisterField<
3897        3,
3898        0x1,
3899        1,
3900        0,
3901        bempenb::Pipe3Bempe,
3902        bempenb::Pipe3Bempe,
3903        Bempenb_SPEC,
3904        crate::common::RW,
3905    > {
3906        crate::common::RegisterField::<
3907            3,
3908            0x1,
3909            1,
3910            0,
3911            bempenb::Pipe3Bempe,
3912            bempenb::Pipe3Bempe,
3913            Bempenb_SPEC,
3914            crate::common::RW,
3915        >::from_register(self, 0)
3916    }
3917
3918    #[doc = "BEMP Interrupt Enable for Pipe 4"]
3919    #[inline(always)]
3920    pub fn pipe4bempe(
3921        self,
3922    ) -> crate::common::RegisterField<
3923        4,
3924        0x1,
3925        1,
3926        0,
3927        bempenb::Pipe4Bempe,
3928        bempenb::Pipe4Bempe,
3929        Bempenb_SPEC,
3930        crate::common::RW,
3931    > {
3932        crate::common::RegisterField::<
3933            4,
3934            0x1,
3935            1,
3936            0,
3937            bempenb::Pipe4Bempe,
3938            bempenb::Pipe4Bempe,
3939            Bempenb_SPEC,
3940            crate::common::RW,
3941        >::from_register(self, 0)
3942    }
3943
3944    #[doc = "BEMP Interrupt Enable for Pipe 5"]
3945    #[inline(always)]
3946    pub fn pipe5bempe(
3947        self,
3948    ) -> crate::common::RegisterField<
3949        5,
3950        0x1,
3951        1,
3952        0,
3953        bempenb::Pipe5Bempe,
3954        bempenb::Pipe5Bempe,
3955        Bempenb_SPEC,
3956        crate::common::RW,
3957    > {
3958        crate::common::RegisterField::<
3959            5,
3960            0x1,
3961            1,
3962            0,
3963            bempenb::Pipe5Bempe,
3964            bempenb::Pipe5Bempe,
3965            Bempenb_SPEC,
3966            crate::common::RW,
3967        >::from_register(self, 0)
3968    }
3969
3970    #[doc = "BEMP Interrupt Enable for Pipe 6"]
3971    #[inline(always)]
3972    pub fn pipe6bempe(
3973        self,
3974    ) -> crate::common::RegisterField<
3975        6,
3976        0x1,
3977        1,
3978        0,
3979        bempenb::Pipe6Bempe,
3980        bempenb::Pipe6Bempe,
3981        Bempenb_SPEC,
3982        crate::common::RW,
3983    > {
3984        crate::common::RegisterField::<
3985            6,
3986            0x1,
3987            1,
3988            0,
3989            bempenb::Pipe6Bempe,
3990            bempenb::Pipe6Bempe,
3991            Bempenb_SPEC,
3992            crate::common::RW,
3993        >::from_register(self, 0)
3994    }
3995
3996    #[doc = "BEMP Interrupt Enable for Pipe 7"]
3997    #[inline(always)]
3998    pub fn pipe7bempe(
3999        self,
4000    ) -> crate::common::RegisterField<
4001        7,
4002        0x1,
4003        1,
4004        0,
4005        bempenb::Pipe7Bempe,
4006        bempenb::Pipe7Bempe,
4007        Bempenb_SPEC,
4008        crate::common::RW,
4009    > {
4010        crate::common::RegisterField::<
4011            7,
4012            0x1,
4013            1,
4014            0,
4015            bempenb::Pipe7Bempe,
4016            bempenb::Pipe7Bempe,
4017            Bempenb_SPEC,
4018            crate::common::RW,
4019        >::from_register(self, 0)
4020    }
4021
4022    #[doc = "BEMP Interrupt Enable for Pipe 8"]
4023    #[inline(always)]
4024    pub fn pipe8bempe(
4025        self,
4026    ) -> crate::common::RegisterField<
4027        8,
4028        0x1,
4029        1,
4030        0,
4031        bempenb::Pipe8Bempe,
4032        bempenb::Pipe8Bempe,
4033        Bempenb_SPEC,
4034        crate::common::RW,
4035    > {
4036        crate::common::RegisterField::<
4037            8,
4038            0x1,
4039            1,
4040            0,
4041            bempenb::Pipe8Bempe,
4042            bempenb::Pipe8Bempe,
4043            Bempenb_SPEC,
4044            crate::common::RW,
4045        >::from_register(self, 0)
4046    }
4047
4048    #[doc = "BEMP Interrupt Enable for Pipe 9"]
4049    #[inline(always)]
4050    pub fn pipe9bempe(
4051        self,
4052    ) -> crate::common::RegisterField<
4053        9,
4054        0x1,
4055        1,
4056        0,
4057        bempenb::Pipe9Bempe,
4058        bempenb::Pipe9Bempe,
4059        Bempenb_SPEC,
4060        crate::common::RW,
4061    > {
4062        crate::common::RegisterField::<
4063            9,
4064            0x1,
4065            1,
4066            0,
4067            bempenb::Pipe9Bempe,
4068            bempenb::Pipe9Bempe,
4069            Bempenb_SPEC,
4070            crate::common::RW,
4071        >::from_register(self, 0)
4072    }
4073}
4074impl ::core::default::Default for Bempenb {
4075    #[inline(always)]
4076    fn default() -> Bempenb {
4077        <crate::RegValueT<Bempenb_SPEC> as RegisterValue<_>>::new(0)
4078    }
4079}
4080pub mod bempenb {
4081
4082    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4083    pub struct Pipe0Bempe_SPEC;
4084    pub type Pipe0Bempe = crate::EnumBitfieldStruct<u8, Pipe0Bempe_SPEC>;
4085    impl Pipe0Bempe {
4086        #[doc = "Disable interrupt request"]
4087        pub const _0: Self = Self::new(0);
4088
4089        #[doc = "Enable interrupt request"]
4090        pub const _1: Self = Self::new(1);
4091    }
4092    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4093    pub struct Pipe1Bempe_SPEC;
4094    pub type Pipe1Bempe = crate::EnumBitfieldStruct<u8, Pipe1Bempe_SPEC>;
4095    impl Pipe1Bempe {
4096        #[doc = "Disable interrupt request"]
4097        pub const _0: Self = Self::new(0);
4098
4099        #[doc = "Enable interrupt request"]
4100        pub const _1: Self = Self::new(1);
4101    }
4102    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4103    pub struct Pipe2Bempe_SPEC;
4104    pub type Pipe2Bempe = crate::EnumBitfieldStruct<u8, Pipe2Bempe_SPEC>;
4105    impl Pipe2Bempe {
4106        #[doc = "Disable interrupt request"]
4107        pub const _0: Self = Self::new(0);
4108
4109        #[doc = "Enable interrupt request"]
4110        pub const _1: Self = Self::new(1);
4111    }
4112    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4113    pub struct Pipe3Bempe_SPEC;
4114    pub type Pipe3Bempe = crate::EnumBitfieldStruct<u8, Pipe3Bempe_SPEC>;
4115    impl Pipe3Bempe {
4116        #[doc = "Disable interrupt request"]
4117        pub const _0: Self = Self::new(0);
4118
4119        #[doc = "Enable interrupt request"]
4120        pub const _1: Self = Self::new(1);
4121    }
4122    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4123    pub struct Pipe4Bempe_SPEC;
4124    pub type Pipe4Bempe = crate::EnumBitfieldStruct<u8, Pipe4Bempe_SPEC>;
4125    impl Pipe4Bempe {
4126        #[doc = "Disable interrupt request"]
4127        pub const _0: Self = Self::new(0);
4128
4129        #[doc = "Enable interrupt request"]
4130        pub const _1: Self = Self::new(1);
4131    }
4132    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4133    pub struct Pipe5Bempe_SPEC;
4134    pub type Pipe5Bempe = crate::EnumBitfieldStruct<u8, Pipe5Bempe_SPEC>;
4135    impl Pipe5Bempe {
4136        #[doc = "Disable interrupt request"]
4137        pub const _0: Self = Self::new(0);
4138
4139        #[doc = "Enable interrupt request"]
4140        pub const _1: Self = Self::new(1);
4141    }
4142    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4143    pub struct Pipe6Bempe_SPEC;
4144    pub type Pipe6Bempe = crate::EnumBitfieldStruct<u8, Pipe6Bempe_SPEC>;
4145    impl Pipe6Bempe {
4146        #[doc = "Disable interrupt request"]
4147        pub const _0: Self = Self::new(0);
4148
4149        #[doc = "Enable interrupt request"]
4150        pub const _1: Self = Self::new(1);
4151    }
4152    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4153    pub struct Pipe7Bempe_SPEC;
4154    pub type Pipe7Bempe = crate::EnumBitfieldStruct<u8, Pipe7Bempe_SPEC>;
4155    impl Pipe7Bempe {
4156        #[doc = "Disable interrupt request"]
4157        pub const _0: Self = Self::new(0);
4158
4159        #[doc = "Enable interrupt request"]
4160        pub const _1: Self = Self::new(1);
4161    }
4162    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4163    pub struct Pipe8Bempe_SPEC;
4164    pub type Pipe8Bempe = crate::EnumBitfieldStruct<u8, Pipe8Bempe_SPEC>;
4165    impl Pipe8Bempe {
4166        #[doc = "Disable interrupt request"]
4167        pub const _0: Self = Self::new(0);
4168
4169        #[doc = "Enable interrupt request"]
4170        pub const _1: Self = Self::new(1);
4171    }
4172    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4173    pub struct Pipe9Bempe_SPEC;
4174    pub type Pipe9Bempe = crate::EnumBitfieldStruct<u8, Pipe9Bempe_SPEC>;
4175    impl Pipe9Bempe {
4176        #[doc = "Disable interrupt request"]
4177        pub const _0: Self = Self::new(0);
4178
4179        #[doc = "Enable interrupt request"]
4180        pub const _1: Self = Self::new(1);
4181    }
4182}
4183#[doc(hidden)]
4184#[derive(Copy, Clone, Eq, PartialEq)]
4185pub struct Sofcfg_SPEC;
4186impl crate::sealed::RegSpec for Sofcfg_SPEC {
4187    type DataType = u16;
4188}
4189
4190#[doc = "SOF Output Configuration Register"]
4191pub type Sofcfg = crate::RegValueT<Sofcfg_SPEC>;
4192
4193impl Sofcfg {
4194    #[doc = "Edge Interrupt Output Status Monitor"]
4195    #[inline(always)]
4196    pub fn edgests(
4197        self,
4198    ) -> crate::common::RegisterFieldBool<4, 1, 0, Sofcfg_SPEC, crate::common::R> {
4199        crate::common::RegisterFieldBool::<4, 1, 0, Sofcfg_SPEC, crate::common::R>::from_register(
4200            self, 0,
4201        )
4202    }
4203
4204    #[doc = "BRDY Interrupt Status Clear Timing"]
4205    #[inline(always)]
4206    pub fn brdym(
4207        self,
4208    ) -> crate::common::RegisterField<
4209        6,
4210        0x1,
4211        1,
4212        0,
4213        sofcfg::Brdym,
4214        sofcfg::Brdym,
4215        Sofcfg_SPEC,
4216        crate::common::RW,
4217    > {
4218        crate::common::RegisterField::<
4219            6,
4220            0x1,
4221            1,
4222            0,
4223            sofcfg::Brdym,
4224            sofcfg::Brdym,
4225            Sofcfg_SPEC,
4226            crate::common::RW,
4227        >::from_register(self, 0)
4228    }
4229
4230    #[doc = "Transaction-Enabled Time Select"]
4231    #[inline(always)]
4232    pub fn trnensel(
4233        self,
4234    ) -> crate::common::RegisterField<
4235        8,
4236        0x1,
4237        1,
4238        0,
4239        sofcfg::Trnensel,
4240        sofcfg::Trnensel,
4241        Sofcfg_SPEC,
4242        crate::common::RW,
4243    > {
4244        crate::common::RegisterField::<
4245            8,
4246            0x1,
4247            1,
4248            0,
4249            sofcfg::Trnensel,
4250            sofcfg::Trnensel,
4251            Sofcfg_SPEC,
4252            crate::common::RW,
4253        >::from_register(self, 0)
4254    }
4255}
4256impl ::core::default::Default for Sofcfg {
4257    #[inline(always)]
4258    fn default() -> Sofcfg {
4259        <crate::RegValueT<Sofcfg_SPEC> as RegisterValue<_>>::new(0)
4260    }
4261}
4262pub mod sofcfg {
4263
4264    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4265    pub struct Brdym_SPEC;
4266    pub type Brdym = crate::EnumBitfieldStruct<u8, Brdym_SPEC>;
4267    impl Brdym {
4268        #[doc = "Clear BRDY flag by software"]
4269        pub const _0: Self = Self::new(0);
4270
4271        #[doc = "Clear BRDY flag by the USBFS through a data read from the FIFO buffer or data write to the FIFO buffer"]
4272        pub const _1: Self = Self::new(1);
4273    }
4274    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4275    pub struct Trnensel_SPEC;
4276    pub type Trnensel = crate::EnumBitfieldStruct<u8, Trnensel_SPEC>;
4277    impl Trnensel {
4278        #[doc = "Not low-speed communication"]
4279        pub const _0: Self = Self::new(0);
4280
4281        #[doc = "Low-speed communication"]
4282        pub const _1: Self = Self::new(1);
4283    }
4284}
4285#[doc(hidden)]
4286#[derive(Copy, Clone, Eq, PartialEq)]
4287pub struct Intsts0_SPEC;
4288impl crate::sealed::RegSpec for Intsts0_SPEC {
4289    type DataType = u16;
4290}
4291
4292#[doc = "Interrupt Status Register 0"]
4293pub type Intsts0 = crate::RegValueT<Intsts0_SPEC>;
4294
4295impl Intsts0 {
4296    #[doc = "Control Transfer Stage"]
4297    #[inline(always)]
4298    pub fn ctsq(
4299        self,
4300    ) -> crate::common::RegisterField<
4301        0,
4302        0x7,
4303        1,
4304        0,
4305        intsts0::Ctsq,
4306        intsts0::Ctsq,
4307        Intsts0_SPEC,
4308        crate::common::R,
4309    > {
4310        crate::common::RegisterField::<
4311            0,
4312            0x7,
4313            1,
4314            0,
4315            intsts0::Ctsq,
4316            intsts0::Ctsq,
4317            Intsts0_SPEC,
4318            crate::common::R,
4319        >::from_register(self, 0)
4320    }
4321
4322    #[doc = "USB Request Reception"]
4323    #[inline(always)]
4324    pub fn valid(
4325        self,
4326    ) -> crate::common::RegisterField<
4327        3,
4328        0x1,
4329        1,
4330        0,
4331        intsts0::Valid,
4332        intsts0::Valid,
4333        Intsts0_SPEC,
4334        crate::common::RW,
4335    > {
4336        crate::common::RegisterField::<
4337            3,
4338            0x1,
4339            1,
4340            0,
4341            intsts0::Valid,
4342            intsts0::Valid,
4343            Intsts0_SPEC,
4344            crate::common::RW,
4345        >::from_register(self, 0)
4346    }
4347
4348    #[doc = "Device State"]
4349    #[inline(always)]
4350    pub fn dvsq(
4351        self,
4352    ) -> crate::common::RegisterField<
4353        4,
4354        0x7,
4355        1,
4356        0,
4357        intsts0::Dvsq,
4358        intsts0::Dvsq,
4359        Intsts0_SPEC,
4360        crate::common::R,
4361    > {
4362        crate::common::RegisterField::<
4363            4,
4364            0x7,
4365            1,
4366            0,
4367            intsts0::Dvsq,
4368            intsts0::Dvsq,
4369            Intsts0_SPEC,
4370            crate::common::R,
4371        >::from_register(self, 0)
4372    }
4373
4374    #[doc = "VBUS Input Status"]
4375    #[inline(always)]
4376    pub fn vbsts(
4377        self,
4378    ) -> crate::common::RegisterField<
4379        7,
4380        0x1,
4381        1,
4382        0,
4383        intsts0::Vbsts,
4384        intsts0::Vbsts,
4385        Intsts0_SPEC,
4386        crate::common::R,
4387    > {
4388        crate::common::RegisterField::<
4389            7,
4390            0x1,
4391            1,
4392            0,
4393            intsts0::Vbsts,
4394            intsts0::Vbsts,
4395            Intsts0_SPEC,
4396            crate::common::R,
4397        >::from_register(self, 0)
4398    }
4399
4400    #[doc = "Buffer Ready Interrupt Status"]
4401    #[inline(always)]
4402    pub fn brdy(
4403        self,
4404    ) -> crate::common::RegisterField<
4405        8,
4406        0x1,
4407        1,
4408        0,
4409        intsts0::Brdy,
4410        intsts0::Brdy,
4411        Intsts0_SPEC,
4412        crate::common::R,
4413    > {
4414        crate::common::RegisterField::<
4415            8,
4416            0x1,
4417            1,
4418            0,
4419            intsts0::Brdy,
4420            intsts0::Brdy,
4421            Intsts0_SPEC,
4422            crate::common::R,
4423        >::from_register(self, 0)
4424    }
4425
4426    #[doc = "Buffer Not Ready Interrupt Status"]
4427    #[inline(always)]
4428    pub fn nrdy(
4429        self,
4430    ) -> crate::common::RegisterField<
4431        9,
4432        0x1,
4433        1,
4434        0,
4435        intsts0::Nrdy,
4436        intsts0::Nrdy,
4437        Intsts0_SPEC,
4438        crate::common::R,
4439    > {
4440        crate::common::RegisterField::<
4441            9,
4442            0x1,
4443            1,
4444            0,
4445            intsts0::Nrdy,
4446            intsts0::Nrdy,
4447            Intsts0_SPEC,
4448            crate::common::R,
4449        >::from_register(self, 0)
4450    }
4451
4452    #[doc = "Buffer Empty Interrupt Status"]
4453    #[inline(always)]
4454    pub fn bemp(
4455        self,
4456    ) -> crate::common::RegisterField<
4457        10,
4458        0x1,
4459        1,
4460        0,
4461        intsts0::Bemp,
4462        intsts0::Bemp,
4463        Intsts0_SPEC,
4464        crate::common::R,
4465    > {
4466        crate::common::RegisterField::<
4467            10,
4468            0x1,
4469            1,
4470            0,
4471            intsts0::Bemp,
4472            intsts0::Bemp,
4473            Intsts0_SPEC,
4474            crate::common::R,
4475        >::from_register(self, 0)
4476    }
4477
4478    #[doc = "Control Transfer Stage Transition Interrupt Status"]
4479    #[inline(always)]
4480    pub fn ctrt(
4481        self,
4482    ) -> crate::common::RegisterField<
4483        11,
4484        0x1,
4485        1,
4486        0,
4487        intsts0::Ctrt,
4488        intsts0::Ctrt,
4489        Intsts0_SPEC,
4490        crate::common::RW,
4491    > {
4492        crate::common::RegisterField::<
4493            11,
4494            0x1,
4495            1,
4496            0,
4497            intsts0::Ctrt,
4498            intsts0::Ctrt,
4499            Intsts0_SPEC,
4500            crate::common::RW,
4501        >::from_register(self, 0)
4502    }
4503
4504    #[doc = "Device State Transition Interrupt Status"]
4505    #[inline(always)]
4506    pub fn dvst(
4507        self,
4508    ) -> crate::common::RegisterField<
4509        12,
4510        0x1,
4511        1,
4512        0,
4513        intsts0::Dvst,
4514        intsts0::Dvst,
4515        Intsts0_SPEC,
4516        crate::common::RW,
4517    > {
4518        crate::common::RegisterField::<
4519            12,
4520            0x1,
4521            1,
4522            0,
4523            intsts0::Dvst,
4524            intsts0::Dvst,
4525            Intsts0_SPEC,
4526            crate::common::RW,
4527        >::from_register(self, 0)
4528    }
4529
4530    #[doc = "Frame Number Refresh Interrupt Status"]
4531    #[inline(always)]
4532    pub fn sofr(
4533        self,
4534    ) -> crate::common::RegisterField<
4535        13,
4536        0x1,
4537        1,
4538        0,
4539        intsts0::Sofr,
4540        intsts0::Sofr,
4541        Intsts0_SPEC,
4542        crate::common::RW,
4543    > {
4544        crate::common::RegisterField::<
4545            13,
4546            0x1,
4547            1,
4548            0,
4549            intsts0::Sofr,
4550            intsts0::Sofr,
4551            Intsts0_SPEC,
4552            crate::common::RW,
4553        >::from_register(self, 0)
4554    }
4555
4556    #[doc = "Resume Interrupt Status"]
4557    #[inline(always)]
4558    pub fn resm(
4559        self,
4560    ) -> crate::common::RegisterField<
4561        14,
4562        0x1,
4563        1,
4564        0,
4565        intsts0::Resm,
4566        intsts0::Resm,
4567        Intsts0_SPEC,
4568        crate::common::RW,
4569    > {
4570        crate::common::RegisterField::<
4571            14,
4572            0x1,
4573            1,
4574            0,
4575            intsts0::Resm,
4576            intsts0::Resm,
4577            Intsts0_SPEC,
4578            crate::common::RW,
4579        >::from_register(self, 0)
4580    }
4581
4582    #[doc = "VBUS Interrupt Status"]
4583    #[inline(always)]
4584    pub fn vbint(
4585        self,
4586    ) -> crate::common::RegisterField<
4587        15,
4588        0x1,
4589        1,
4590        0,
4591        intsts0::Vbint,
4592        intsts0::Vbint,
4593        Intsts0_SPEC,
4594        crate::common::RW,
4595    > {
4596        crate::common::RegisterField::<
4597            15,
4598            0x1,
4599            1,
4600            0,
4601            intsts0::Vbint,
4602            intsts0::Vbint,
4603            Intsts0_SPEC,
4604            crate::common::RW,
4605        >::from_register(self, 0)
4606    }
4607}
4608impl ::core::default::Default for Intsts0 {
4609    #[inline(always)]
4610    fn default() -> Intsts0 {
4611        <crate::RegValueT<Intsts0_SPEC> as RegisterValue<_>>::new(0)
4612    }
4613}
4614pub mod intsts0 {
4615
4616    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4617    pub struct Ctsq_SPEC;
4618    pub type Ctsq = crate::EnumBitfieldStruct<u8, Ctsq_SPEC>;
4619    impl Ctsq {
4620        #[doc = "Idle or setup stage"]
4621        pub const _000: Self = Self::new(0);
4622
4623        #[doc = "Control read data stage"]
4624        pub const _001: Self = Self::new(1);
4625
4626        #[doc = "Control read status stage"]
4627        pub const _010: Self = Self::new(2);
4628
4629        #[doc = "Control write data stage"]
4630        pub const _011: Self = Self::new(3);
4631
4632        #[doc = "Control write status stage"]
4633        pub const _100: Self = Self::new(4);
4634
4635        #[doc = "Control write (no data) status stage"]
4636        pub const _101: Self = Self::new(5);
4637
4638        #[doc = "Control transfer sequence error"]
4639        pub const _110: Self = Self::new(6);
4640    }
4641    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4642    pub struct Valid_SPEC;
4643    pub type Valid = crate::EnumBitfieldStruct<u8, Valid_SPEC>;
4644    impl Valid {
4645        #[doc = "Setup packet not received"]
4646        pub const _0: Self = Self::new(0);
4647
4648        #[doc = "Setup packet received"]
4649        pub const _1: Self = Self::new(1);
4650    }
4651    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4652    pub struct Dvsq_SPEC;
4653    pub type Dvsq = crate::EnumBitfieldStruct<u8, Dvsq_SPEC>;
4654    impl Dvsq {
4655        #[doc = "Powered state"]
4656        pub const _000: Self = Self::new(0);
4657
4658        #[doc = "Default state"]
4659        pub const _001: Self = Self::new(1);
4660
4661        #[doc = "Address state"]
4662        pub const _010: Self = Self::new(2);
4663
4664        #[doc = "Configured state"]
4665        pub const _011: Self = Self::new(3);
4666    }
4667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4668    pub struct Vbsts_SPEC;
4669    pub type Vbsts = crate::EnumBitfieldStruct<u8, Vbsts_SPEC>;
4670    impl Vbsts {
4671        #[doc = "USB_VBUS pin is low"]
4672        pub const _0: Self = Self::new(0);
4673
4674        #[doc = "USB_VBUS pin is high"]
4675        pub const _1: Self = Self::new(1);
4676    }
4677    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4678    pub struct Brdy_SPEC;
4679    pub type Brdy = crate::EnumBitfieldStruct<u8, Brdy_SPEC>;
4680    impl Brdy {
4681        #[doc = "No BRDY interrupt occurred"]
4682        pub const _0: Self = Self::new(0);
4683
4684        #[doc = "BRDY interrupt occurred"]
4685        pub const _1: Self = Self::new(1);
4686    }
4687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4688    pub struct Nrdy_SPEC;
4689    pub type Nrdy = crate::EnumBitfieldStruct<u8, Nrdy_SPEC>;
4690    impl Nrdy {
4691        #[doc = "No NRDY interrupt occurred"]
4692        pub const _0: Self = Self::new(0);
4693
4694        #[doc = "NRDY interrupt occurred"]
4695        pub const _1: Self = Self::new(1);
4696    }
4697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4698    pub struct Bemp_SPEC;
4699    pub type Bemp = crate::EnumBitfieldStruct<u8, Bemp_SPEC>;
4700    impl Bemp {
4701        #[doc = "No BEMP interrupt occurred"]
4702        pub const _0: Self = Self::new(0);
4703
4704        #[doc = "BEMP interrupt occurred"]
4705        pub const _1: Self = Self::new(1);
4706    }
4707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4708    pub struct Ctrt_SPEC;
4709    pub type Ctrt = crate::EnumBitfieldStruct<u8, Ctrt_SPEC>;
4710    impl Ctrt {
4711        #[doc = "No control transfer stage transition interrupt occurred"]
4712        pub const _0: Self = Self::new(0);
4713
4714        #[doc = "Control transfer stage transition interrupt occurred"]
4715        pub const _1: Self = Self::new(1);
4716    }
4717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4718    pub struct Dvst_SPEC;
4719    pub type Dvst = crate::EnumBitfieldStruct<u8, Dvst_SPEC>;
4720    impl Dvst {
4721        #[doc = "No device state transition interrupt occurred"]
4722        pub const _0: Self = Self::new(0);
4723
4724        #[doc = "Device state transition interrupt occurred"]
4725        pub const _1: Self = Self::new(1);
4726    }
4727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4728    pub struct Sofr_SPEC;
4729    pub type Sofr = crate::EnumBitfieldStruct<u8, Sofr_SPEC>;
4730    impl Sofr {
4731        #[doc = "No SOF interrupt occurred"]
4732        pub const _0: Self = Self::new(0);
4733
4734        #[doc = "SOF interrupt occurred"]
4735        pub const _1: Self = Self::new(1);
4736    }
4737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4738    pub struct Resm_SPEC;
4739    pub type Resm = crate::EnumBitfieldStruct<u8, Resm_SPEC>;
4740    impl Resm {
4741        #[doc = "No resume interrupt occurred"]
4742        pub const _0: Self = Self::new(0);
4743
4744        #[doc = "Resume interrupt occurred"]
4745        pub const _1: Self = Self::new(1);
4746    }
4747    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4748    pub struct Vbint_SPEC;
4749    pub type Vbint = crate::EnumBitfieldStruct<u8, Vbint_SPEC>;
4750    impl Vbint {
4751        #[doc = "No VBUS interrupt occurred"]
4752        pub const _0: Self = Self::new(0);
4753
4754        #[doc = "VBUS interrupt occurred"]
4755        pub const _1: Self = Self::new(1);
4756    }
4757}
4758#[doc(hidden)]
4759#[derive(Copy, Clone, Eq, PartialEq)]
4760pub struct Intsts1_SPEC;
4761impl crate::sealed::RegSpec for Intsts1_SPEC {
4762    type DataType = u16;
4763}
4764
4765#[doc = "Interrupt Status Register 1"]
4766pub type Intsts1 = crate::RegValueT<Intsts1_SPEC>;
4767
4768impl Intsts1 {
4769    #[doc = "PDDET Detection Interrupt Status Flag"]
4770    #[inline(always)]
4771    pub fn pddetint(
4772        self,
4773    ) -> crate::common::RegisterField<
4774        0,
4775        0x1,
4776        1,
4777        0,
4778        intsts1::Pddetint,
4779        intsts1::Pddetint,
4780        Intsts1_SPEC,
4781        crate::common::RW,
4782    > {
4783        crate::common::RegisterField::<
4784            0,
4785            0x1,
4786            1,
4787            0,
4788            intsts1::Pddetint,
4789            intsts1::Pddetint,
4790            Intsts1_SPEC,
4791            crate::common::RW,
4792        >::from_register(self, 0)
4793    }
4794
4795    #[doc = "Setup Transaction Normal Response Interrupt Status"]
4796    #[inline(always)]
4797    pub fn sack(
4798        self,
4799    ) -> crate::common::RegisterField<
4800        4,
4801        0x1,
4802        1,
4803        0,
4804        intsts1::Sack,
4805        intsts1::Sack,
4806        Intsts1_SPEC,
4807        crate::common::RW,
4808    > {
4809        crate::common::RegisterField::<
4810            4,
4811            0x1,
4812            1,
4813            0,
4814            intsts1::Sack,
4815            intsts1::Sack,
4816            Intsts1_SPEC,
4817            crate::common::RW,
4818        >::from_register(self, 0)
4819    }
4820
4821    #[doc = "Setup Transaction Error Interrupt Status"]
4822    #[inline(always)]
4823    pub fn sign(
4824        self,
4825    ) -> crate::common::RegisterField<
4826        5,
4827        0x1,
4828        1,
4829        0,
4830        intsts1::Sign,
4831        intsts1::Sign,
4832        Intsts1_SPEC,
4833        crate::common::RW,
4834    > {
4835        crate::common::RegisterField::<
4836            5,
4837            0x1,
4838            1,
4839            0,
4840            intsts1::Sign,
4841            intsts1::Sign,
4842            Intsts1_SPEC,
4843            crate::common::RW,
4844        >::from_register(self, 0)
4845    }
4846
4847    #[doc = "EOF Error Detection Interrupt Status"]
4848    #[inline(always)]
4849    pub fn eoferr(
4850        self,
4851    ) -> crate::common::RegisterField<
4852        6,
4853        0x1,
4854        1,
4855        0,
4856        intsts1::Eoferr,
4857        intsts1::Eoferr,
4858        Intsts1_SPEC,
4859        crate::common::RW,
4860    > {
4861        crate::common::RegisterField::<
4862            6,
4863            0x1,
4864            1,
4865            0,
4866            intsts1::Eoferr,
4867            intsts1::Eoferr,
4868            Intsts1_SPEC,
4869            crate::common::RW,
4870        >::from_register(self, 0)
4871    }
4872
4873    #[doc = "ATTCH Interrupt Status"]
4874    #[inline(always)]
4875    pub fn attch(
4876        self,
4877    ) -> crate::common::RegisterField<
4878        11,
4879        0x1,
4880        1,
4881        0,
4882        intsts1::Attch,
4883        intsts1::Attch,
4884        Intsts1_SPEC,
4885        crate::common::RW,
4886    > {
4887        crate::common::RegisterField::<
4888            11,
4889            0x1,
4890            1,
4891            0,
4892            intsts1::Attch,
4893            intsts1::Attch,
4894            Intsts1_SPEC,
4895            crate::common::RW,
4896        >::from_register(self, 0)
4897    }
4898
4899    #[doc = "USB Disconnection Detection Interrupt Status"]
4900    #[inline(always)]
4901    pub fn dtch(
4902        self,
4903    ) -> crate::common::RegisterField<
4904        12,
4905        0x1,
4906        1,
4907        0,
4908        intsts1::Dtch,
4909        intsts1::Dtch,
4910        Intsts1_SPEC,
4911        crate::common::RW,
4912    > {
4913        crate::common::RegisterField::<
4914            12,
4915            0x1,
4916            1,
4917            0,
4918            intsts1::Dtch,
4919            intsts1::Dtch,
4920            Intsts1_SPEC,
4921            crate::common::RW,
4922        >::from_register(self, 0)
4923    }
4924
4925    #[doc = "USB Bus Change Interrupt Status"]
4926    #[inline(always)]
4927    pub fn bchg(
4928        self,
4929    ) -> crate::common::RegisterField<
4930        14,
4931        0x1,
4932        1,
4933        0,
4934        intsts1::Bchg,
4935        intsts1::Bchg,
4936        Intsts1_SPEC,
4937        crate::common::RW,
4938    > {
4939        crate::common::RegisterField::<
4940            14,
4941            0x1,
4942            1,
4943            0,
4944            intsts1::Bchg,
4945            intsts1::Bchg,
4946            Intsts1_SPEC,
4947            crate::common::RW,
4948        >::from_register(self, 0)
4949    }
4950
4951    #[doc = "Overcurrent Input Change Interrupt Status"]
4952    #[inline(always)]
4953    pub fn ovrcr(
4954        self,
4955    ) -> crate::common::RegisterField<
4956        15,
4957        0x1,
4958        1,
4959        0,
4960        intsts1::Ovrcr,
4961        intsts1::Ovrcr,
4962        Intsts1_SPEC,
4963        crate::common::RW,
4964    > {
4965        crate::common::RegisterField::<
4966            15,
4967            0x1,
4968            1,
4969            0,
4970            intsts1::Ovrcr,
4971            intsts1::Ovrcr,
4972            Intsts1_SPEC,
4973            crate::common::RW,
4974        >::from_register(self, 0)
4975    }
4976}
4977impl ::core::default::Default for Intsts1 {
4978    #[inline(always)]
4979    fn default() -> Intsts1 {
4980        <crate::RegValueT<Intsts1_SPEC> as RegisterValue<_>>::new(0)
4981    }
4982}
4983pub mod intsts1 {
4984
4985    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4986    pub struct Pddetint_SPEC;
4987    pub type Pddetint = crate::EnumBitfieldStruct<u8, Pddetint_SPEC>;
4988    impl Pddetint {
4989        #[doc = "No PDDET interrupt occurred"]
4990        pub const _0: Self = Self::new(0);
4991
4992        #[doc = "PDDET interrupt occurred"]
4993        pub const _1: Self = Self::new(1);
4994    }
4995    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4996    pub struct Sack_SPEC;
4997    pub type Sack = crate::EnumBitfieldStruct<u8, Sack_SPEC>;
4998    impl Sack {
4999        #[doc = "No SACK interrupt occurred"]
5000        pub const _0: Self = Self::new(0);
5001
5002        #[doc = "SACK interrupt occurred"]
5003        pub const _1: Self = Self::new(1);
5004    }
5005    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5006    pub struct Sign_SPEC;
5007    pub type Sign = crate::EnumBitfieldStruct<u8, Sign_SPEC>;
5008    impl Sign {
5009        #[doc = "No SIGN interrupt occurred"]
5010        pub const _0: Self = Self::new(0);
5011
5012        #[doc = "SIGN interrupt occurred"]
5013        pub const _1: Self = Self::new(1);
5014    }
5015    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5016    pub struct Eoferr_SPEC;
5017    pub type Eoferr = crate::EnumBitfieldStruct<u8, Eoferr_SPEC>;
5018    impl Eoferr {
5019        #[doc = "No EOFERR interrupt occurred"]
5020        pub const _0: Self = Self::new(0);
5021
5022        #[doc = "EOFERR interrupt occurred"]
5023        pub const _1: Self = Self::new(1);
5024    }
5025    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5026    pub struct Attch_SPEC;
5027    pub type Attch = crate::EnumBitfieldStruct<u8, Attch_SPEC>;
5028    impl Attch {
5029        #[doc = "No ATTCH interrupt occurred"]
5030        pub const _0: Self = Self::new(0);
5031
5032        #[doc = "ATTCH interrupt occurred"]
5033        pub const _1: Self = Self::new(1);
5034    }
5035    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5036    pub struct Dtch_SPEC;
5037    pub type Dtch = crate::EnumBitfieldStruct<u8, Dtch_SPEC>;
5038    impl Dtch {
5039        #[doc = "No DTCH interrupt occurred"]
5040        pub const _0: Self = Self::new(0);
5041
5042        #[doc = "DTCH interrupt occurred"]
5043        pub const _1: Self = Self::new(1);
5044    }
5045    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5046    pub struct Bchg_SPEC;
5047    pub type Bchg = crate::EnumBitfieldStruct<u8, Bchg_SPEC>;
5048    impl Bchg {
5049        #[doc = "No BCHG interrupt occurred"]
5050        pub const _0: Self = Self::new(0);
5051
5052        #[doc = "BCHG interrupt occurred"]
5053        pub const _1: Self = Self::new(1);
5054    }
5055    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5056    pub struct Ovrcr_SPEC;
5057    pub type Ovrcr = crate::EnumBitfieldStruct<u8, Ovrcr_SPEC>;
5058    impl Ovrcr {
5059        #[doc = "No OVRCR interrupt occurred"]
5060        pub const _0: Self = Self::new(0);
5061
5062        #[doc = "OVRCR interrupt occurred"]
5063        pub const _1: Self = Self::new(1);
5064    }
5065}
5066#[doc(hidden)]
5067#[derive(Copy, Clone, Eq, PartialEq)]
5068pub struct Brdysts_SPEC;
5069impl crate::sealed::RegSpec for Brdysts_SPEC {
5070    type DataType = u16;
5071}
5072
5073#[doc = "BRDY Interrupt Status Register"]
5074pub type Brdysts = crate::RegValueT<Brdysts_SPEC>;
5075
5076impl Brdysts {
5077    #[doc = "BRDY Interrupt Status for Pipe 0"]
5078    #[inline(always)]
5079    pub fn pipe0brdy(
5080        self,
5081    ) -> crate::common::RegisterField<
5082        0,
5083        0x1,
5084        1,
5085        0,
5086        brdysts::Pipe0Brdy,
5087        brdysts::Pipe0Brdy,
5088        Brdysts_SPEC,
5089        crate::common::RW,
5090    > {
5091        crate::common::RegisterField::<
5092            0,
5093            0x1,
5094            1,
5095            0,
5096            brdysts::Pipe0Brdy,
5097            brdysts::Pipe0Brdy,
5098            Brdysts_SPEC,
5099            crate::common::RW,
5100        >::from_register(self, 0)
5101    }
5102
5103    #[doc = "BRDY Interrupt Status for Pipe 1"]
5104    #[inline(always)]
5105    pub fn pipe1brdy(
5106        self,
5107    ) -> crate::common::RegisterField<
5108        1,
5109        0x1,
5110        1,
5111        0,
5112        brdysts::Pipe1Brdy,
5113        brdysts::Pipe1Brdy,
5114        Brdysts_SPEC,
5115        crate::common::RW,
5116    > {
5117        crate::common::RegisterField::<
5118            1,
5119            0x1,
5120            1,
5121            0,
5122            brdysts::Pipe1Brdy,
5123            brdysts::Pipe1Brdy,
5124            Brdysts_SPEC,
5125            crate::common::RW,
5126        >::from_register(self, 0)
5127    }
5128
5129    #[doc = "BRDY Interrupt Status for Pipe 2"]
5130    #[inline(always)]
5131    pub fn pipe2brdy(
5132        self,
5133    ) -> crate::common::RegisterField<
5134        2,
5135        0x1,
5136        1,
5137        0,
5138        brdysts::Pipe2Brdy,
5139        brdysts::Pipe2Brdy,
5140        Brdysts_SPEC,
5141        crate::common::RW,
5142    > {
5143        crate::common::RegisterField::<
5144            2,
5145            0x1,
5146            1,
5147            0,
5148            brdysts::Pipe2Brdy,
5149            brdysts::Pipe2Brdy,
5150            Brdysts_SPEC,
5151            crate::common::RW,
5152        >::from_register(self, 0)
5153    }
5154
5155    #[doc = "BRDY Interrupt Status for Pipe 3"]
5156    #[inline(always)]
5157    pub fn pipe3brdy(
5158        self,
5159    ) -> crate::common::RegisterField<
5160        3,
5161        0x1,
5162        1,
5163        0,
5164        brdysts::Pipe3Brdy,
5165        brdysts::Pipe3Brdy,
5166        Brdysts_SPEC,
5167        crate::common::RW,
5168    > {
5169        crate::common::RegisterField::<
5170            3,
5171            0x1,
5172            1,
5173            0,
5174            brdysts::Pipe3Brdy,
5175            brdysts::Pipe3Brdy,
5176            Brdysts_SPEC,
5177            crate::common::RW,
5178        >::from_register(self, 0)
5179    }
5180
5181    #[doc = "BRDY Interrupt Status for Pipe 4"]
5182    #[inline(always)]
5183    pub fn pipe4brdy(
5184        self,
5185    ) -> crate::common::RegisterField<
5186        4,
5187        0x1,
5188        1,
5189        0,
5190        brdysts::Pipe4Brdy,
5191        brdysts::Pipe4Brdy,
5192        Brdysts_SPEC,
5193        crate::common::RW,
5194    > {
5195        crate::common::RegisterField::<
5196            4,
5197            0x1,
5198            1,
5199            0,
5200            brdysts::Pipe4Brdy,
5201            brdysts::Pipe4Brdy,
5202            Brdysts_SPEC,
5203            crate::common::RW,
5204        >::from_register(self, 0)
5205    }
5206
5207    #[doc = "BRDY Interrupt Status for Pipe 5"]
5208    #[inline(always)]
5209    pub fn pipe5brdy(
5210        self,
5211    ) -> crate::common::RegisterField<
5212        5,
5213        0x1,
5214        1,
5215        0,
5216        brdysts::Pipe5Brdy,
5217        brdysts::Pipe5Brdy,
5218        Brdysts_SPEC,
5219        crate::common::RW,
5220    > {
5221        crate::common::RegisterField::<
5222            5,
5223            0x1,
5224            1,
5225            0,
5226            brdysts::Pipe5Brdy,
5227            brdysts::Pipe5Brdy,
5228            Brdysts_SPEC,
5229            crate::common::RW,
5230        >::from_register(self, 0)
5231    }
5232
5233    #[doc = "BRDY Interrupt Status for Pipe 6"]
5234    #[inline(always)]
5235    pub fn pipe6brdy(
5236        self,
5237    ) -> crate::common::RegisterField<
5238        6,
5239        0x1,
5240        1,
5241        0,
5242        brdysts::Pipe6Brdy,
5243        brdysts::Pipe6Brdy,
5244        Brdysts_SPEC,
5245        crate::common::RW,
5246    > {
5247        crate::common::RegisterField::<
5248            6,
5249            0x1,
5250            1,
5251            0,
5252            brdysts::Pipe6Brdy,
5253            brdysts::Pipe6Brdy,
5254            Brdysts_SPEC,
5255            crate::common::RW,
5256        >::from_register(self, 0)
5257    }
5258
5259    #[doc = "BRDY Interrupt Status for Pipe 7"]
5260    #[inline(always)]
5261    pub fn pipe7brdy(
5262        self,
5263    ) -> crate::common::RegisterField<
5264        7,
5265        0x1,
5266        1,
5267        0,
5268        brdysts::Pipe7Brdy,
5269        brdysts::Pipe7Brdy,
5270        Brdysts_SPEC,
5271        crate::common::RW,
5272    > {
5273        crate::common::RegisterField::<
5274            7,
5275            0x1,
5276            1,
5277            0,
5278            brdysts::Pipe7Brdy,
5279            brdysts::Pipe7Brdy,
5280            Brdysts_SPEC,
5281            crate::common::RW,
5282        >::from_register(self, 0)
5283    }
5284
5285    #[doc = "BRDY Interrupt Status for Pipe 8"]
5286    #[inline(always)]
5287    pub fn pipe8brdy(
5288        self,
5289    ) -> crate::common::RegisterField<
5290        8,
5291        0x1,
5292        1,
5293        0,
5294        brdysts::Pipe8Brdy,
5295        brdysts::Pipe8Brdy,
5296        Brdysts_SPEC,
5297        crate::common::RW,
5298    > {
5299        crate::common::RegisterField::<
5300            8,
5301            0x1,
5302            1,
5303            0,
5304            brdysts::Pipe8Brdy,
5305            brdysts::Pipe8Brdy,
5306            Brdysts_SPEC,
5307            crate::common::RW,
5308        >::from_register(self, 0)
5309    }
5310
5311    #[doc = "BRDY Interrupt Status for Pipe 9"]
5312    #[inline(always)]
5313    pub fn pipe9brdy(
5314        self,
5315    ) -> crate::common::RegisterField<
5316        9,
5317        0x1,
5318        1,
5319        0,
5320        brdysts::Pipe9Brdy,
5321        brdysts::Pipe9Brdy,
5322        Brdysts_SPEC,
5323        crate::common::RW,
5324    > {
5325        crate::common::RegisterField::<
5326            9,
5327            0x1,
5328            1,
5329            0,
5330            brdysts::Pipe9Brdy,
5331            brdysts::Pipe9Brdy,
5332            Brdysts_SPEC,
5333            crate::common::RW,
5334        >::from_register(self, 0)
5335    }
5336}
5337impl ::core::default::Default for Brdysts {
5338    #[inline(always)]
5339    fn default() -> Brdysts {
5340        <crate::RegValueT<Brdysts_SPEC> as RegisterValue<_>>::new(0)
5341    }
5342}
5343pub mod brdysts {
5344
5345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5346    pub struct Pipe0Brdy_SPEC;
5347    pub type Pipe0Brdy = crate::EnumBitfieldStruct<u8, Pipe0Brdy_SPEC>;
5348    impl Pipe0Brdy {
5349        #[doc = "No BRDY interrupt occurred"]
5350        pub const _0: Self = Self::new(0);
5351
5352        #[doc = "BRDY interrupt occurred"]
5353        pub const _1: Self = Self::new(1);
5354    }
5355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5356    pub struct Pipe1Brdy_SPEC;
5357    pub type Pipe1Brdy = crate::EnumBitfieldStruct<u8, Pipe1Brdy_SPEC>;
5358    impl Pipe1Brdy {
5359        #[doc = "No BRDY interrupt occurred"]
5360        pub const _0: Self = Self::new(0);
5361
5362        #[doc = "BRDY interrupt occurred"]
5363        pub const _1: Self = Self::new(1);
5364    }
5365    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5366    pub struct Pipe2Brdy_SPEC;
5367    pub type Pipe2Brdy = crate::EnumBitfieldStruct<u8, Pipe2Brdy_SPEC>;
5368    impl Pipe2Brdy {
5369        #[doc = "No BRDY interrupt occurred"]
5370        pub const _0: Self = Self::new(0);
5371
5372        #[doc = "BRDY interrupt occurred"]
5373        pub const _1: Self = Self::new(1);
5374    }
5375    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5376    pub struct Pipe3Brdy_SPEC;
5377    pub type Pipe3Brdy = crate::EnumBitfieldStruct<u8, Pipe3Brdy_SPEC>;
5378    impl Pipe3Brdy {
5379        #[doc = "No BRDY interrupt occurred"]
5380        pub const _0: Self = Self::new(0);
5381
5382        #[doc = "BRDY interrupt occurred"]
5383        pub const _1: Self = Self::new(1);
5384    }
5385    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5386    pub struct Pipe4Brdy_SPEC;
5387    pub type Pipe4Brdy = crate::EnumBitfieldStruct<u8, Pipe4Brdy_SPEC>;
5388    impl Pipe4Brdy {
5389        #[doc = "No BRDY interrupt occurred"]
5390        pub const _0: Self = Self::new(0);
5391
5392        #[doc = "BRDY interrupt occurred"]
5393        pub const _1: Self = Self::new(1);
5394    }
5395    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5396    pub struct Pipe5Brdy_SPEC;
5397    pub type Pipe5Brdy = crate::EnumBitfieldStruct<u8, Pipe5Brdy_SPEC>;
5398    impl Pipe5Brdy {
5399        #[doc = "No BRDY interrupt occurred"]
5400        pub const _0: Self = Self::new(0);
5401
5402        #[doc = "BRDY interrupt occurred"]
5403        pub const _1: Self = Self::new(1);
5404    }
5405    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5406    pub struct Pipe6Brdy_SPEC;
5407    pub type Pipe6Brdy = crate::EnumBitfieldStruct<u8, Pipe6Brdy_SPEC>;
5408    impl Pipe6Brdy {
5409        #[doc = "No BRDY interrupt occurred"]
5410        pub const _0: Self = Self::new(0);
5411
5412        #[doc = "BRDY interrupt occurred"]
5413        pub const _1: Self = Self::new(1);
5414    }
5415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5416    pub struct Pipe7Brdy_SPEC;
5417    pub type Pipe7Brdy = crate::EnumBitfieldStruct<u8, Pipe7Brdy_SPEC>;
5418    impl Pipe7Brdy {
5419        #[doc = "No BRDY interrupt occurred"]
5420        pub const _0: Self = Self::new(0);
5421
5422        #[doc = "BRDY interrupt occurred"]
5423        pub const _1: Self = Self::new(1);
5424    }
5425    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5426    pub struct Pipe8Brdy_SPEC;
5427    pub type Pipe8Brdy = crate::EnumBitfieldStruct<u8, Pipe8Brdy_SPEC>;
5428    impl Pipe8Brdy {
5429        #[doc = "No BRDY interrupt occurred"]
5430        pub const _0: Self = Self::new(0);
5431
5432        #[doc = "BRDY interrupt occurred"]
5433        pub const _1: Self = Self::new(1);
5434    }
5435    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5436    pub struct Pipe9Brdy_SPEC;
5437    pub type Pipe9Brdy = crate::EnumBitfieldStruct<u8, Pipe9Brdy_SPEC>;
5438    impl Pipe9Brdy {
5439        #[doc = "No BRDY interrupt occurred"]
5440        pub const _0: Self = Self::new(0);
5441
5442        #[doc = "BRDY interrupt occurred"]
5443        pub const _1: Self = Self::new(1);
5444    }
5445}
5446#[doc(hidden)]
5447#[derive(Copy, Clone, Eq, PartialEq)]
5448pub struct Nrdysts_SPEC;
5449impl crate::sealed::RegSpec for Nrdysts_SPEC {
5450    type DataType = u16;
5451}
5452
5453#[doc = "NRDY Interrupt Status Register"]
5454pub type Nrdysts = crate::RegValueT<Nrdysts_SPEC>;
5455
5456impl Nrdysts {
5457    #[doc = "NRDY Interrupt Status for Pipe 0"]
5458    #[inline(always)]
5459    pub fn pipe0nrdy(
5460        self,
5461    ) -> crate::common::RegisterField<
5462        0,
5463        0x1,
5464        1,
5465        0,
5466        nrdysts::Pipe0Nrdy,
5467        nrdysts::Pipe0Nrdy,
5468        Nrdysts_SPEC,
5469        crate::common::RW,
5470    > {
5471        crate::common::RegisterField::<
5472            0,
5473            0x1,
5474            1,
5475            0,
5476            nrdysts::Pipe0Nrdy,
5477            nrdysts::Pipe0Nrdy,
5478            Nrdysts_SPEC,
5479            crate::common::RW,
5480        >::from_register(self, 0)
5481    }
5482
5483    #[doc = "NRDY Interrupt Status for Pipe 1"]
5484    #[inline(always)]
5485    pub fn pipe1nrdy(
5486        self,
5487    ) -> crate::common::RegisterField<
5488        1,
5489        0x1,
5490        1,
5491        0,
5492        nrdysts::Pipe1Nrdy,
5493        nrdysts::Pipe1Nrdy,
5494        Nrdysts_SPEC,
5495        crate::common::RW,
5496    > {
5497        crate::common::RegisterField::<
5498            1,
5499            0x1,
5500            1,
5501            0,
5502            nrdysts::Pipe1Nrdy,
5503            nrdysts::Pipe1Nrdy,
5504            Nrdysts_SPEC,
5505            crate::common::RW,
5506        >::from_register(self, 0)
5507    }
5508
5509    #[doc = "NRDY Interrupt Status for Pipe 2"]
5510    #[inline(always)]
5511    pub fn pipe2nrdy(
5512        self,
5513    ) -> crate::common::RegisterField<
5514        2,
5515        0x1,
5516        1,
5517        0,
5518        nrdysts::Pipe2Nrdy,
5519        nrdysts::Pipe2Nrdy,
5520        Nrdysts_SPEC,
5521        crate::common::RW,
5522    > {
5523        crate::common::RegisterField::<
5524            2,
5525            0x1,
5526            1,
5527            0,
5528            nrdysts::Pipe2Nrdy,
5529            nrdysts::Pipe2Nrdy,
5530            Nrdysts_SPEC,
5531            crate::common::RW,
5532        >::from_register(self, 0)
5533    }
5534
5535    #[doc = "NRDY Interrupt Status for Pipe 3"]
5536    #[inline(always)]
5537    pub fn pipe3nrdy(
5538        self,
5539    ) -> crate::common::RegisterField<
5540        3,
5541        0x1,
5542        1,
5543        0,
5544        nrdysts::Pipe3Nrdy,
5545        nrdysts::Pipe3Nrdy,
5546        Nrdysts_SPEC,
5547        crate::common::RW,
5548    > {
5549        crate::common::RegisterField::<
5550            3,
5551            0x1,
5552            1,
5553            0,
5554            nrdysts::Pipe3Nrdy,
5555            nrdysts::Pipe3Nrdy,
5556            Nrdysts_SPEC,
5557            crate::common::RW,
5558        >::from_register(self, 0)
5559    }
5560
5561    #[doc = "NRDY Interrupt Status for Pipe 4"]
5562    #[inline(always)]
5563    pub fn pipe4nrdy(
5564        self,
5565    ) -> crate::common::RegisterField<
5566        4,
5567        0x1,
5568        1,
5569        0,
5570        nrdysts::Pipe4Nrdy,
5571        nrdysts::Pipe4Nrdy,
5572        Nrdysts_SPEC,
5573        crate::common::RW,
5574    > {
5575        crate::common::RegisterField::<
5576            4,
5577            0x1,
5578            1,
5579            0,
5580            nrdysts::Pipe4Nrdy,
5581            nrdysts::Pipe4Nrdy,
5582            Nrdysts_SPEC,
5583            crate::common::RW,
5584        >::from_register(self, 0)
5585    }
5586
5587    #[doc = "NRDY Interrupt Status for Pipe 5"]
5588    #[inline(always)]
5589    pub fn pipe5nrdy(
5590        self,
5591    ) -> crate::common::RegisterField<
5592        5,
5593        0x1,
5594        1,
5595        0,
5596        nrdysts::Pipe5Nrdy,
5597        nrdysts::Pipe5Nrdy,
5598        Nrdysts_SPEC,
5599        crate::common::RW,
5600    > {
5601        crate::common::RegisterField::<
5602            5,
5603            0x1,
5604            1,
5605            0,
5606            nrdysts::Pipe5Nrdy,
5607            nrdysts::Pipe5Nrdy,
5608            Nrdysts_SPEC,
5609            crate::common::RW,
5610        >::from_register(self, 0)
5611    }
5612
5613    #[doc = "NRDY Interrupt Status for Pipe 6"]
5614    #[inline(always)]
5615    pub fn pipe6nrdy(
5616        self,
5617    ) -> crate::common::RegisterField<
5618        6,
5619        0x1,
5620        1,
5621        0,
5622        nrdysts::Pipe6Nrdy,
5623        nrdysts::Pipe6Nrdy,
5624        Nrdysts_SPEC,
5625        crate::common::RW,
5626    > {
5627        crate::common::RegisterField::<
5628            6,
5629            0x1,
5630            1,
5631            0,
5632            nrdysts::Pipe6Nrdy,
5633            nrdysts::Pipe6Nrdy,
5634            Nrdysts_SPEC,
5635            crate::common::RW,
5636        >::from_register(self, 0)
5637    }
5638
5639    #[doc = "NRDY Interrupt Status for Pipe 7"]
5640    #[inline(always)]
5641    pub fn pipe7nrdy(
5642        self,
5643    ) -> crate::common::RegisterField<
5644        7,
5645        0x1,
5646        1,
5647        0,
5648        nrdysts::Pipe7Nrdy,
5649        nrdysts::Pipe7Nrdy,
5650        Nrdysts_SPEC,
5651        crate::common::RW,
5652    > {
5653        crate::common::RegisterField::<
5654            7,
5655            0x1,
5656            1,
5657            0,
5658            nrdysts::Pipe7Nrdy,
5659            nrdysts::Pipe7Nrdy,
5660            Nrdysts_SPEC,
5661            crate::common::RW,
5662        >::from_register(self, 0)
5663    }
5664
5665    #[doc = "NRDY Interrupt Status for Pipe 8"]
5666    #[inline(always)]
5667    pub fn pipe8nrdy(
5668        self,
5669    ) -> crate::common::RegisterField<
5670        8,
5671        0x1,
5672        1,
5673        0,
5674        nrdysts::Pipe8Nrdy,
5675        nrdysts::Pipe8Nrdy,
5676        Nrdysts_SPEC,
5677        crate::common::RW,
5678    > {
5679        crate::common::RegisterField::<
5680            8,
5681            0x1,
5682            1,
5683            0,
5684            nrdysts::Pipe8Nrdy,
5685            nrdysts::Pipe8Nrdy,
5686            Nrdysts_SPEC,
5687            crate::common::RW,
5688        >::from_register(self, 0)
5689    }
5690
5691    #[doc = "NRDY Interrupt Status for Pipe 9"]
5692    #[inline(always)]
5693    pub fn pipe9nrdy(
5694        self,
5695    ) -> crate::common::RegisterField<
5696        9,
5697        0x1,
5698        1,
5699        0,
5700        nrdysts::Pipe9Nrdy,
5701        nrdysts::Pipe9Nrdy,
5702        Nrdysts_SPEC,
5703        crate::common::RW,
5704    > {
5705        crate::common::RegisterField::<
5706            9,
5707            0x1,
5708            1,
5709            0,
5710            nrdysts::Pipe9Nrdy,
5711            nrdysts::Pipe9Nrdy,
5712            Nrdysts_SPEC,
5713            crate::common::RW,
5714        >::from_register(self, 0)
5715    }
5716}
5717impl ::core::default::Default for Nrdysts {
5718    #[inline(always)]
5719    fn default() -> Nrdysts {
5720        <crate::RegValueT<Nrdysts_SPEC> as RegisterValue<_>>::new(0)
5721    }
5722}
5723pub mod nrdysts {
5724
5725    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5726    pub struct Pipe0Nrdy_SPEC;
5727    pub type Pipe0Nrdy = crate::EnumBitfieldStruct<u8, Pipe0Nrdy_SPEC>;
5728    impl Pipe0Nrdy {
5729        #[doc = "No NRDY interrupt occurred"]
5730        pub const _0: Self = Self::new(0);
5731
5732        #[doc = "NRDY interrupt occurred"]
5733        pub const _1: Self = Self::new(1);
5734    }
5735    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5736    pub struct Pipe1Nrdy_SPEC;
5737    pub type Pipe1Nrdy = crate::EnumBitfieldStruct<u8, Pipe1Nrdy_SPEC>;
5738    impl Pipe1Nrdy {
5739        #[doc = "No NRDY interrupt occurred"]
5740        pub const _0: Self = Self::new(0);
5741
5742        #[doc = "NRDY interrupt occurred"]
5743        pub const _1: Self = Self::new(1);
5744    }
5745    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5746    pub struct Pipe2Nrdy_SPEC;
5747    pub type Pipe2Nrdy = crate::EnumBitfieldStruct<u8, Pipe2Nrdy_SPEC>;
5748    impl Pipe2Nrdy {
5749        #[doc = "No NRDY interrupt occurred"]
5750        pub const _0: Self = Self::new(0);
5751
5752        #[doc = "NRDY interrupt occurred"]
5753        pub const _1: Self = Self::new(1);
5754    }
5755    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5756    pub struct Pipe3Nrdy_SPEC;
5757    pub type Pipe3Nrdy = crate::EnumBitfieldStruct<u8, Pipe3Nrdy_SPEC>;
5758    impl Pipe3Nrdy {
5759        #[doc = "No NRDY interrupt occurred"]
5760        pub const _0: Self = Self::new(0);
5761
5762        #[doc = "NRDY interrupt occurred"]
5763        pub const _1: Self = Self::new(1);
5764    }
5765    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5766    pub struct Pipe4Nrdy_SPEC;
5767    pub type Pipe4Nrdy = crate::EnumBitfieldStruct<u8, Pipe4Nrdy_SPEC>;
5768    impl Pipe4Nrdy {
5769        #[doc = "No NRDY interrupt occurred"]
5770        pub const _0: Self = Self::new(0);
5771
5772        #[doc = "NRDY interrupt occurred"]
5773        pub const _1: Self = Self::new(1);
5774    }
5775    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5776    pub struct Pipe5Nrdy_SPEC;
5777    pub type Pipe5Nrdy = crate::EnumBitfieldStruct<u8, Pipe5Nrdy_SPEC>;
5778    impl Pipe5Nrdy {
5779        #[doc = "No NRDY interrupt occurred"]
5780        pub const _0: Self = Self::new(0);
5781
5782        #[doc = "NRDY interrupt occurred"]
5783        pub const _1: Self = Self::new(1);
5784    }
5785    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5786    pub struct Pipe6Nrdy_SPEC;
5787    pub type Pipe6Nrdy = crate::EnumBitfieldStruct<u8, Pipe6Nrdy_SPEC>;
5788    impl Pipe6Nrdy {
5789        #[doc = "No NRDY interrupt occurred"]
5790        pub const _0: Self = Self::new(0);
5791
5792        #[doc = "NRDY interrupt occurred"]
5793        pub const _1: Self = Self::new(1);
5794    }
5795    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5796    pub struct Pipe7Nrdy_SPEC;
5797    pub type Pipe7Nrdy = crate::EnumBitfieldStruct<u8, Pipe7Nrdy_SPEC>;
5798    impl Pipe7Nrdy {
5799        #[doc = "No NRDY interrupt occurred"]
5800        pub const _0: Self = Self::new(0);
5801
5802        #[doc = "NRDY interrupt occurred"]
5803        pub const _1: Self = Self::new(1);
5804    }
5805    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5806    pub struct Pipe8Nrdy_SPEC;
5807    pub type Pipe8Nrdy = crate::EnumBitfieldStruct<u8, Pipe8Nrdy_SPEC>;
5808    impl Pipe8Nrdy {
5809        #[doc = "No NRDY interrupt occurred"]
5810        pub const _0: Self = Self::new(0);
5811
5812        #[doc = "NRDY interrupt occurred"]
5813        pub const _1: Self = Self::new(1);
5814    }
5815    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5816    pub struct Pipe9Nrdy_SPEC;
5817    pub type Pipe9Nrdy = crate::EnumBitfieldStruct<u8, Pipe9Nrdy_SPEC>;
5818    impl Pipe9Nrdy {
5819        #[doc = "No NRDY interrupt occurred"]
5820        pub const _0: Self = Self::new(0);
5821
5822        #[doc = "NRDY interrupt occurred"]
5823        pub const _1: Self = Self::new(1);
5824    }
5825}
5826#[doc(hidden)]
5827#[derive(Copy, Clone, Eq, PartialEq)]
5828pub struct Bempsts_SPEC;
5829impl crate::sealed::RegSpec for Bempsts_SPEC {
5830    type DataType = u16;
5831}
5832
5833#[doc = "BEMP Interrupt Status Register"]
5834pub type Bempsts = crate::RegValueT<Bempsts_SPEC>;
5835
5836impl Bempsts {
5837    #[doc = "BEMP Interrupt Status for Pipe 0"]
5838    #[inline(always)]
5839    pub fn pipe0bemp(
5840        self,
5841    ) -> crate::common::RegisterField<
5842        0,
5843        0x1,
5844        1,
5845        0,
5846        bempsts::Pipe0Bemp,
5847        bempsts::Pipe0Bemp,
5848        Bempsts_SPEC,
5849        crate::common::RW,
5850    > {
5851        crate::common::RegisterField::<
5852            0,
5853            0x1,
5854            1,
5855            0,
5856            bempsts::Pipe0Bemp,
5857            bempsts::Pipe0Bemp,
5858            Bempsts_SPEC,
5859            crate::common::RW,
5860        >::from_register(self, 0)
5861    }
5862
5863    #[doc = "BEMP Interrupt Status for Pipe 1"]
5864    #[inline(always)]
5865    pub fn pipe1bemp(
5866        self,
5867    ) -> crate::common::RegisterField<
5868        1,
5869        0x1,
5870        1,
5871        0,
5872        bempsts::Pipe1Bemp,
5873        bempsts::Pipe1Bemp,
5874        Bempsts_SPEC,
5875        crate::common::RW,
5876    > {
5877        crate::common::RegisterField::<
5878            1,
5879            0x1,
5880            1,
5881            0,
5882            bempsts::Pipe1Bemp,
5883            bempsts::Pipe1Bemp,
5884            Bempsts_SPEC,
5885            crate::common::RW,
5886        >::from_register(self, 0)
5887    }
5888
5889    #[doc = "BEMP Interrupt Status for Pipe 2"]
5890    #[inline(always)]
5891    pub fn pipe2bemp(
5892        self,
5893    ) -> crate::common::RegisterField<
5894        2,
5895        0x1,
5896        1,
5897        0,
5898        bempsts::Pipe2Bemp,
5899        bempsts::Pipe2Bemp,
5900        Bempsts_SPEC,
5901        crate::common::RW,
5902    > {
5903        crate::common::RegisterField::<
5904            2,
5905            0x1,
5906            1,
5907            0,
5908            bempsts::Pipe2Bemp,
5909            bempsts::Pipe2Bemp,
5910            Bempsts_SPEC,
5911            crate::common::RW,
5912        >::from_register(self, 0)
5913    }
5914
5915    #[doc = "BEMP Interrupt Status for Pipe 3"]
5916    #[inline(always)]
5917    pub fn pipe3bemp(
5918        self,
5919    ) -> crate::common::RegisterField<
5920        3,
5921        0x1,
5922        1,
5923        0,
5924        bempsts::Pipe3Bemp,
5925        bempsts::Pipe3Bemp,
5926        Bempsts_SPEC,
5927        crate::common::RW,
5928    > {
5929        crate::common::RegisterField::<
5930            3,
5931            0x1,
5932            1,
5933            0,
5934            bempsts::Pipe3Bemp,
5935            bempsts::Pipe3Bemp,
5936            Bempsts_SPEC,
5937            crate::common::RW,
5938        >::from_register(self, 0)
5939    }
5940
5941    #[doc = "BEMP Interrupt Status for Pipe 4"]
5942    #[inline(always)]
5943    pub fn pipe4bemp(
5944        self,
5945    ) -> crate::common::RegisterField<
5946        4,
5947        0x1,
5948        1,
5949        0,
5950        bempsts::Pipe4Bemp,
5951        bempsts::Pipe4Bemp,
5952        Bempsts_SPEC,
5953        crate::common::RW,
5954    > {
5955        crate::common::RegisterField::<
5956            4,
5957            0x1,
5958            1,
5959            0,
5960            bempsts::Pipe4Bemp,
5961            bempsts::Pipe4Bemp,
5962            Bempsts_SPEC,
5963            crate::common::RW,
5964        >::from_register(self, 0)
5965    }
5966
5967    #[doc = "BEMP Interrupt Status for Pipe 5"]
5968    #[inline(always)]
5969    pub fn pipe5bemp(
5970        self,
5971    ) -> crate::common::RegisterField<
5972        5,
5973        0x1,
5974        1,
5975        0,
5976        bempsts::Pipe5Bemp,
5977        bempsts::Pipe5Bemp,
5978        Bempsts_SPEC,
5979        crate::common::RW,
5980    > {
5981        crate::common::RegisterField::<
5982            5,
5983            0x1,
5984            1,
5985            0,
5986            bempsts::Pipe5Bemp,
5987            bempsts::Pipe5Bemp,
5988            Bempsts_SPEC,
5989            crate::common::RW,
5990        >::from_register(self, 0)
5991    }
5992
5993    #[doc = "BEMP Interrupt Status for Pipe 6"]
5994    #[inline(always)]
5995    pub fn pipe6bemp(
5996        self,
5997    ) -> crate::common::RegisterField<
5998        6,
5999        0x1,
6000        1,
6001        0,
6002        bempsts::Pipe6Bemp,
6003        bempsts::Pipe6Bemp,
6004        Bempsts_SPEC,
6005        crate::common::RW,
6006    > {
6007        crate::common::RegisterField::<
6008            6,
6009            0x1,
6010            1,
6011            0,
6012            bempsts::Pipe6Bemp,
6013            bempsts::Pipe6Bemp,
6014            Bempsts_SPEC,
6015            crate::common::RW,
6016        >::from_register(self, 0)
6017    }
6018
6019    #[doc = "BEMP Interrupt Status for Pipe 7"]
6020    #[inline(always)]
6021    pub fn pipe7bemp(
6022        self,
6023    ) -> crate::common::RegisterField<
6024        7,
6025        0x1,
6026        1,
6027        0,
6028        bempsts::Pipe7Bemp,
6029        bempsts::Pipe7Bemp,
6030        Bempsts_SPEC,
6031        crate::common::RW,
6032    > {
6033        crate::common::RegisterField::<
6034            7,
6035            0x1,
6036            1,
6037            0,
6038            bempsts::Pipe7Bemp,
6039            bempsts::Pipe7Bemp,
6040            Bempsts_SPEC,
6041            crate::common::RW,
6042        >::from_register(self, 0)
6043    }
6044
6045    #[doc = "BEMP Interrupt Status for Pipe 8"]
6046    #[inline(always)]
6047    pub fn pipe8bemp(
6048        self,
6049    ) -> crate::common::RegisterField<
6050        8,
6051        0x1,
6052        1,
6053        0,
6054        bempsts::Pipe8Bemp,
6055        bempsts::Pipe8Bemp,
6056        Bempsts_SPEC,
6057        crate::common::RW,
6058    > {
6059        crate::common::RegisterField::<
6060            8,
6061            0x1,
6062            1,
6063            0,
6064            bempsts::Pipe8Bemp,
6065            bempsts::Pipe8Bemp,
6066            Bempsts_SPEC,
6067            crate::common::RW,
6068        >::from_register(self, 0)
6069    }
6070
6071    #[doc = "BEMP Interrupt Status for Pipe 9"]
6072    #[inline(always)]
6073    pub fn pipe9bemp(
6074        self,
6075    ) -> crate::common::RegisterField<
6076        9,
6077        0x1,
6078        1,
6079        0,
6080        bempsts::Pipe9Bemp,
6081        bempsts::Pipe9Bemp,
6082        Bempsts_SPEC,
6083        crate::common::RW,
6084    > {
6085        crate::common::RegisterField::<
6086            9,
6087            0x1,
6088            1,
6089            0,
6090            bempsts::Pipe9Bemp,
6091            bempsts::Pipe9Bemp,
6092            Bempsts_SPEC,
6093            crate::common::RW,
6094        >::from_register(self, 0)
6095    }
6096}
6097impl ::core::default::Default for Bempsts {
6098    #[inline(always)]
6099    fn default() -> Bempsts {
6100        <crate::RegValueT<Bempsts_SPEC> as RegisterValue<_>>::new(0)
6101    }
6102}
6103pub mod bempsts {
6104
6105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6106    pub struct Pipe0Bemp_SPEC;
6107    pub type Pipe0Bemp = crate::EnumBitfieldStruct<u8, Pipe0Bemp_SPEC>;
6108    impl Pipe0Bemp {
6109        #[doc = "No BEMP interrupt occurred"]
6110        pub const _0: Self = Self::new(0);
6111
6112        #[doc = "BEMP interrupt occurred"]
6113        pub const _1: Self = Self::new(1);
6114    }
6115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6116    pub struct Pipe1Bemp_SPEC;
6117    pub type Pipe1Bemp = crate::EnumBitfieldStruct<u8, Pipe1Bemp_SPEC>;
6118    impl Pipe1Bemp {
6119        #[doc = "No BEMP interrupt occurred"]
6120        pub const _0: Self = Self::new(0);
6121
6122        #[doc = "BEMP interrupt occurred"]
6123        pub const _1: Self = Self::new(1);
6124    }
6125    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6126    pub struct Pipe2Bemp_SPEC;
6127    pub type Pipe2Bemp = crate::EnumBitfieldStruct<u8, Pipe2Bemp_SPEC>;
6128    impl Pipe2Bemp {
6129        #[doc = "No BEMP interrupt occurred"]
6130        pub const _0: Self = Self::new(0);
6131
6132        #[doc = "BEMP interrupt occurred"]
6133        pub const _1: Self = Self::new(1);
6134    }
6135    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6136    pub struct Pipe3Bemp_SPEC;
6137    pub type Pipe3Bemp = crate::EnumBitfieldStruct<u8, Pipe3Bemp_SPEC>;
6138    impl Pipe3Bemp {
6139        #[doc = "No BEMP interrupt occurred"]
6140        pub const _0: Self = Self::new(0);
6141
6142        #[doc = "BEMP interrupt occurred"]
6143        pub const _1: Self = Self::new(1);
6144    }
6145    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6146    pub struct Pipe4Bemp_SPEC;
6147    pub type Pipe4Bemp = crate::EnumBitfieldStruct<u8, Pipe4Bemp_SPEC>;
6148    impl Pipe4Bemp {
6149        #[doc = "No BEMP interrupt occurred"]
6150        pub const _0: Self = Self::new(0);
6151
6152        #[doc = "BEMP interrupt occurred"]
6153        pub const _1: Self = Self::new(1);
6154    }
6155    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6156    pub struct Pipe5Bemp_SPEC;
6157    pub type Pipe5Bemp = crate::EnumBitfieldStruct<u8, Pipe5Bemp_SPEC>;
6158    impl Pipe5Bemp {
6159        #[doc = "No BEMP interrupt occurred"]
6160        pub const _0: Self = Self::new(0);
6161
6162        #[doc = "BEMP interrupt occurred"]
6163        pub const _1: Self = Self::new(1);
6164    }
6165    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6166    pub struct Pipe6Bemp_SPEC;
6167    pub type Pipe6Bemp = crate::EnumBitfieldStruct<u8, Pipe6Bemp_SPEC>;
6168    impl Pipe6Bemp {
6169        #[doc = "No BEMP interrupt occurred"]
6170        pub const _0: Self = Self::new(0);
6171
6172        #[doc = "BEMP interrupt occurred"]
6173        pub const _1: Self = Self::new(1);
6174    }
6175    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6176    pub struct Pipe7Bemp_SPEC;
6177    pub type Pipe7Bemp = crate::EnumBitfieldStruct<u8, Pipe7Bemp_SPEC>;
6178    impl Pipe7Bemp {
6179        #[doc = "No BEMP interrupt occurred"]
6180        pub const _0: Self = Self::new(0);
6181
6182        #[doc = "BEMP interrupt occurred"]
6183        pub const _1: Self = Self::new(1);
6184    }
6185    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6186    pub struct Pipe8Bemp_SPEC;
6187    pub type Pipe8Bemp = crate::EnumBitfieldStruct<u8, Pipe8Bemp_SPEC>;
6188    impl Pipe8Bemp {
6189        #[doc = "No BEMP interrupt occurred"]
6190        pub const _0: Self = Self::new(0);
6191
6192        #[doc = "BEMP interrupt occurred"]
6193        pub const _1: Self = Self::new(1);
6194    }
6195    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6196    pub struct Pipe9Bemp_SPEC;
6197    pub type Pipe9Bemp = crate::EnumBitfieldStruct<u8, Pipe9Bemp_SPEC>;
6198    impl Pipe9Bemp {
6199        #[doc = "No BEMP interrupt occurred"]
6200        pub const _0: Self = Self::new(0);
6201
6202        #[doc = "BEMP interrupt occurred"]
6203        pub const _1: Self = Self::new(1);
6204    }
6205}
6206#[doc(hidden)]
6207#[derive(Copy, Clone, Eq, PartialEq)]
6208pub struct Frmnum_SPEC;
6209impl crate::sealed::RegSpec for Frmnum_SPEC {
6210    type DataType = u16;
6211}
6212
6213#[doc = "Frame Number Register"]
6214pub type Frmnum = crate::RegValueT<Frmnum_SPEC>;
6215
6216impl Frmnum {
6217    #[doc = "Frame Number"]
6218    #[inline(always)]
6219    pub fn frnm(
6220        self,
6221    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Frmnum_SPEC, crate::common::R> {
6222        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Frmnum_SPEC,crate::common::R>::from_register(self,0)
6223    }
6224
6225    #[doc = "Receive Data Error"]
6226    #[inline(always)]
6227    pub fn crce(
6228        self,
6229    ) -> crate::common::RegisterField<
6230        14,
6231        0x1,
6232        1,
6233        0,
6234        frmnum::Crce,
6235        frmnum::Crce,
6236        Frmnum_SPEC,
6237        crate::common::RW,
6238    > {
6239        crate::common::RegisterField::<
6240            14,
6241            0x1,
6242            1,
6243            0,
6244            frmnum::Crce,
6245            frmnum::Crce,
6246            Frmnum_SPEC,
6247            crate::common::RW,
6248        >::from_register(self, 0)
6249    }
6250
6251    #[doc = "Overrun/Underrun Detection Status"]
6252    #[inline(always)]
6253    pub fn ovrn(
6254        self,
6255    ) -> crate::common::RegisterField<
6256        15,
6257        0x1,
6258        1,
6259        0,
6260        frmnum::Ovrn,
6261        frmnum::Ovrn,
6262        Frmnum_SPEC,
6263        crate::common::RW,
6264    > {
6265        crate::common::RegisterField::<
6266            15,
6267            0x1,
6268            1,
6269            0,
6270            frmnum::Ovrn,
6271            frmnum::Ovrn,
6272            Frmnum_SPEC,
6273            crate::common::RW,
6274        >::from_register(self, 0)
6275    }
6276}
6277impl ::core::default::Default for Frmnum {
6278    #[inline(always)]
6279    fn default() -> Frmnum {
6280        <crate::RegValueT<Frmnum_SPEC> as RegisterValue<_>>::new(0)
6281    }
6282}
6283pub mod frmnum {
6284
6285    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6286    pub struct Crce_SPEC;
6287    pub type Crce = crate::EnumBitfieldStruct<u8, Crce_SPEC>;
6288    impl Crce {
6289        #[doc = "No error occurred"]
6290        pub const _0: Self = Self::new(0);
6291
6292        #[doc = "Error occurred"]
6293        pub const _1: Self = Self::new(1);
6294    }
6295    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6296    pub struct Ovrn_SPEC;
6297    pub type Ovrn = crate::EnumBitfieldStruct<u8, Ovrn_SPEC>;
6298    impl Ovrn {
6299        #[doc = "No error occurred"]
6300        pub const _0: Self = Self::new(0);
6301
6302        #[doc = "Error occurred"]
6303        pub const _1: Self = Self::new(1);
6304    }
6305}
6306#[doc(hidden)]
6307#[derive(Copy, Clone, Eq, PartialEq)]
6308pub struct Dvchgr_SPEC;
6309impl crate::sealed::RegSpec for Dvchgr_SPEC {
6310    type DataType = u16;
6311}
6312
6313#[doc = "Device State Change Register"]
6314pub type Dvchgr = crate::RegValueT<Dvchgr_SPEC>;
6315
6316impl Dvchgr {
6317    #[doc = "Device State Change"]
6318    #[inline(always)]
6319    pub fn dvchg(
6320        self,
6321    ) -> crate::common::RegisterField<
6322        15,
6323        0x1,
6324        1,
6325        0,
6326        dvchgr::Dvchg,
6327        dvchgr::Dvchg,
6328        Dvchgr_SPEC,
6329        crate::common::RW,
6330    > {
6331        crate::common::RegisterField::<
6332            15,
6333            0x1,
6334            1,
6335            0,
6336            dvchgr::Dvchg,
6337            dvchgr::Dvchg,
6338            Dvchgr_SPEC,
6339            crate::common::RW,
6340        >::from_register(self, 0)
6341    }
6342}
6343impl ::core::default::Default for Dvchgr {
6344    #[inline(always)]
6345    fn default() -> Dvchgr {
6346        <crate::RegValueT<Dvchgr_SPEC> as RegisterValue<_>>::new(0)
6347    }
6348}
6349pub mod dvchgr {
6350
6351    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6352    pub struct Dvchg_SPEC;
6353    pub type Dvchg = crate::EnumBitfieldStruct<u8, Dvchg_SPEC>;
6354    impl Dvchg {
6355        #[doc = "Disable writes to the USBADDR.STSRECOV\\[3:0\\] and USBADDR.USBADDR\\[6:0\\] bits"]
6356        pub const _0: Self = Self::new(0);
6357
6358        #[doc = "Enable writes to the USBADDR.STSRECOV\\[3:0\\] and USBADDR.USBADDR\\[6:0\\] bits"]
6359        pub const _1: Self = Self::new(1);
6360    }
6361}
6362#[doc(hidden)]
6363#[derive(Copy, Clone, Eq, PartialEq)]
6364pub struct Usbaddr_SPEC;
6365impl crate::sealed::RegSpec for Usbaddr_SPEC {
6366    type DataType = u16;
6367}
6368
6369#[doc = "USB Address Register"]
6370pub type Usbaddr = crate::RegValueT<Usbaddr_SPEC>;
6371
6372impl Usbaddr {
6373    #[doc = "USB Address"]
6374    #[inline(always)]
6375    pub fn usbaddr(
6376        self,
6377    ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Usbaddr_SPEC, crate::common::RW> {
6378        crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Usbaddr_SPEC,crate::common::RW>::from_register(self,0)
6379    }
6380
6381    #[doc = "Status Recovery"]
6382    #[inline(always)]
6383    pub fn stsrecov(
6384        self,
6385    ) -> crate::common::RegisterField<
6386        8,
6387        0xf,
6388        1,
6389        0,
6390        usbaddr::Stsrecov,
6391        usbaddr::Stsrecov,
6392        Usbaddr_SPEC,
6393        crate::common::RW,
6394    > {
6395        crate::common::RegisterField::<
6396            8,
6397            0xf,
6398            1,
6399            0,
6400            usbaddr::Stsrecov,
6401            usbaddr::Stsrecov,
6402            Usbaddr_SPEC,
6403            crate::common::RW,
6404        >::from_register(self, 0)
6405    }
6406}
6407impl ::core::default::Default for Usbaddr {
6408    #[inline(always)]
6409    fn default() -> Usbaddr {
6410        <crate::RegValueT<Usbaddr_SPEC> as RegisterValue<_>>::new(0)
6411    }
6412}
6413pub mod usbaddr {
6414
6415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6416    pub struct Stsrecov_SPEC;
6417    pub type Stsrecov = crate::EnumBitfieldStruct<u8, Stsrecov_SPEC>;
6418    impl Stsrecov {
6419        #[doc = "Recovery in device controller mode: Setting prohibited Recovery in host controller mode: Return to the low-speed state (bits DVSTCTR0.RHST\\[2:0\\] = 001b)"]
6420        pub const _0_X_4: Self = Self::new(4);
6421
6422        #[doc = "Recovery in device controller mode: Setting prohibited Recovery in host controller mode: Return to the full-speed state (bits DVSTCTR0.RHST\\[2:0\\] = 010b)"]
6423        pub const _0_X_8: Self = Self::new(8);
6424
6425        #[doc = "Recovery in device controller mode: Return to the full-speed state (bits DVSTCTR0.RHST\\[2:0\\] = 010b), bits INTSTS0.DVSQ\\[2:0\\] = 001b (default state) Recovery in host controller mode: Setting prohibited"]
6426        pub const _0_X_9: Self = Self::new(9);
6427
6428        #[doc = "Recovery in device controller mode: Return to the full-speed state (bits DVSTCTR0.RHST\\[2:0\\] = 010b), bits INTSTS0.DVSQ\\[2:0\\] = 010b (address state) Recovery in host controller mode: Setting prohibited"]
6429        pub const _0_X_A: Self = Self::new(10);
6430
6431        #[doc = "Recovery in device controller mode: Return to the full-speed state (bits DVSTCTR0.RHST\\[2:0\\] = 010b), bits INTSTS0.DVSQ\\[2:0\\] = 011b (configured state) Recovery in host controller mode: Setting prohibited"]
6432        pub const _0_X_B: Self = Self::new(11);
6433    }
6434}
6435#[doc(hidden)]
6436#[derive(Copy, Clone, Eq, PartialEq)]
6437pub struct Usbreq_SPEC;
6438impl crate::sealed::RegSpec for Usbreq_SPEC {
6439    type DataType = u16;
6440}
6441
6442#[doc = "USB Request Type Register"]
6443pub type Usbreq = crate::RegValueT<Usbreq_SPEC>;
6444
6445impl Usbreq {
6446    #[doc = "Request Type"]
6447    #[inline(always)]
6448    pub fn bmrequesttype(
6449        self,
6450    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Usbreq_SPEC, crate::common::RW> {
6451        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Usbreq_SPEC,crate::common::RW>::from_register(self,0)
6452    }
6453
6454    #[doc = "Request"]
6455    #[inline(always)]
6456    pub fn brequest(
6457        self,
6458    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Usbreq_SPEC, crate::common::RW> {
6459        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Usbreq_SPEC,crate::common::RW>::from_register(self,0)
6460    }
6461}
6462impl ::core::default::Default for Usbreq {
6463    #[inline(always)]
6464    fn default() -> Usbreq {
6465        <crate::RegValueT<Usbreq_SPEC> as RegisterValue<_>>::new(0)
6466    }
6467}
6468
6469#[doc(hidden)]
6470#[derive(Copy, Clone, Eq, PartialEq)]
6471pub struct Usbval_SPEC;
6472impl crate::sealed::RegSpec for Usbval_SPEC {
6473    type DataType = u16;
6474}
6475
6476#[doc = "USB Request Value Register"]
6477pub type Usbval = crate::RegValueT<Usbval_SPEC>;
6478
6479impl Usbval {
6480    #[doc = "Value"]
6481    #[inline(always)]
6482    pub fn wvalue(
6483        self,
6484    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbval_SPEC, crate::common::RW>
6485    {
6486        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbval_SPEC,crate::common::RW>::from_register(self,0)
6487    }
6488}
6489impl ::core::default::Default for Usbval {
6490    #[inline(always)]
6491    fn default() -> Usbval {
6492        <crate::RegValueT<Usbval_SPEC> as RegisterValue<_>>::new(0)
6493    }
6494}
6495
6496#[doc(hidden)]
6497#[derive(Copy, Clone, Eq, PartialEq)]
6498pub struct Usbindx_SPEC;
6499impl crate::sealed::RegSpec for Usbindx_SPEC {
6500    type DataType = u16;
6501}
6502
6503#[doc = "USB Request Index Register"]
6504pub type Usbindx = crate::RegValueT<Usbindx_SPEC>;
6505
6506impl Usbindx {
6507    #[doc = "Index"]
6508    #[inline(always)]
6509    pub fn windex(
6510        self,
6511    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbindx_SPEC, crate::common::RW>
6512    {
6513        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbindx_SPEC,crate::common::RW>::from_register(self,0)
6514    }
6515}
6516impl ::core::default::Default for Usbindx {
6517    #[inline(always)]
6518    fn default() -> Usbindx {
6519        <crate::RegValueT<Usbindx_SPEC> as RegisterValue<_>>::new(0)
6520    }
6521}
6522
6523#[doc(hidden)]
6524#[derive(Copy, Clone, Eq, PartialEq)]
6525pub struct Usbleng_SPEC;
6526impl crate::sealed::RegSpec for Usbleng_SPEC {
6527    type DataType = u16;
6528}
6529
6530#[doc = "USB Request Length Register"]
6531pub type Usbleng = crate::RegValueT<Usbleng_SPEC>;
6532
6533impl Usbleng {
6534    #[doc = "Length"]
6535    #[inline(always)]
6536    pub fn wlentuh(
6537        self,
6538    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Usbleng_SPEC, crate::common::RW>
6539    {
6540        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Usbleng_SPEC,crate::common::RW>::from_register(self,0)
6541    }
6542}
6543impl ::core::default::Default for Usbleng {
6544    #[inline(always)]
6545    fn default() -> Usbleng {
6546        <crate::RegValueT<Usbleng_SPEC> as RegisterValue<_>>::new(0)
6547    }
6548}
6549
6550#[doc(hidden)]
6551#[derive(Copy, Clone, Eq, PartialEq)]
6552pub struct Dcpcfg_SPEC;
6553impl crate::sealed::RegSpec for Dcpcfg_SPEC {
6554    type DataType = u16;
6555}
6556
6557#[doc = "DCP Configuration Register"]
6558pub type Dcpcfg = crate::RegValueT<Dcpcfg_SPEC>;
6559
6560impl Dcpcfg {
6561    #[doc = "Transfer Direction"]
6562    #[inline(always)]
6563    pub fn dir(
6564        self,
6565    ) -> crate::common::RegisterField<
6566        4,
6567        0x1,
6568        1,
6569        0,
6570        dcpcfg::Dir,
6571        dcpcfg::Dir,
6572        Dcpcfg_SPEC,
6573        crate::common::RW,
6574    > {
6575        crate::common::RegisterField::<
6576            4,
6577            0x1,
6578            1,
6579            0,
6580            dcpcfg::Dir,
6581            dcpcfg::Dir,
6582            Dcpcfg_SPEC,
6583            crate::common::RW,
6584        >::from_register(self, 0)
6585    }
6586
6587    #[doc = "Pipe Disabled at End of Transfer"]
6588    #[inline(always)]
6589    pub fn shtnak(
6590        self,
6591    ) -> crate::common::RegisterField<
6592        7,
6593        0x1,
6594        1,
6595        0,
6596        dcpcfg::Shtnak,
6597        dcpcfg::Shtnak,
6598        Dcpcfg_SPEC,
6599        crate::common::RW,
6600    > {
6601        crate::common::RegisterField::<
6602            7,
6603            0x1,
6604            1,
6605            0,
6606            dcpcfg::Shtnak,
6607            dcpcfg::Shtnak,
6608            Dcpcfg_SPEC,
6609            crate::common::RW,
6610        >::from_register(self, 0)
6611    }
6612}
6613impl ::core::default::Default for Dcpcfg {
6614    #[inline(always)]
6615    fn default() -> Dcpcfg {
6616        <crate::RegValueT<Dcpcfg_SPEC> as RegisterValue<_>>::new(0)
6617    }
6618}
6619pub mod dcpcfg {
6620
6621    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6622    pub struct Dir_SPEC;
6623    pub type Dir = crate::EnumBitfieldStruct<u8, Dir_SPEC>;
6624    impl Dir {
6625        #[doc = "Data receiving direction"]
6626        pub const _0: Self = Self::new(0);
6627
6628        #[doc = "Data transmitting direction"]
6629        pub const _1: Self = Self::new(1);
6630    }
6631    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6632    pub struct Shtnak_SPEC;
6633    pub type Shtnak = crate::EnumBitfieldStruct<u8, Shtnak_SPEC>;
6634    impl Shtnak {
6635        #[doc = "Keep pipe open after transfer ends"]
6636        pub const _0: Self = Self::new(0);
6637
6638        #[doc = "Disable pipe after transfer ends"]
6639        pub const _1: Self = Self::new(1);
6640    }
6641}
6642#[doc(hidden)]
6643#[derive(Copy, Clone, Eq, PartialEq)]
6644pub struct Dcpmaxp_SPEC;
6645impl crate::sealed::RegSpec for Dcpmaxp_SPEC {
6646    type DataType = u16;
6647}
6648
6649#[doc = "DCP Maximum Packet Size Register"]
6650pub type Dcpmaxp = crate::RegValueT<Dcpmaxp_SPEC>;
6651
6652impl Dcpmaxp {
6653    #[doc = "Maximum Packet Size"]
6654    #[inline(always)]
6655    pub fn mxps(
6656        self,
6657    ) -> crate::common::RegisterField<0, 0x7f, 1, 0, u8, u8, Dcpmaxp_SPEC, crate::common::RW> {
6658        crate::common::RegisterField::<0,0x7f,1,0,u8,u8,Dcpmaxp_SPEC,crate::common::RW>::from_register(self,0)
6659    }
6660
6661    #[doc = "Device Select"]
6662    #[inline(always)]
6663    pub fn devsel(
6664        self,
6665    ) -> crate::common::RegisterField<
6666        12,
6667        0xf,
6668        1,
6669        0,
6670        dcpmaxp::Devsel,
6671        dcpmaxp::Devsel,
6672        Dcpmaxp_SPEC,
6673        crate::common::RW,
6674    > {
6675        crate::common::RegisterField::<
6676            12,
6677            0xf,
6678            1,
6679            0,
6680            dcpmaxp::Devsel,
6681            dcpmaxp::Devsel,
6682            Dcpmaxp_SPEC,
6683            crate::common::RW,
6684        >::from_register(self, 0)
6685    }
6686}
6687impl ::core::default::Default for Dcpmaxp {
6688    #[inline(always)]
6689    fn default() -> Dcpmaxp {
6690        <crate::RegValueT<Dcpmaxp_SPEC> as RegisterValue<_>>::new(64)
6691    }
6692}
6693pub mod dcpmaxp {
6694
6695    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6696    pub struct Devsel_SPEC;
6697    pub type Devsel = crate::EnumBitfieldStruct<u8, Devsel_SPEC>;
6698    impl Devsel {
6699        #[doc = "Address 0000b"]
6700        pub const _0_X_0: Self = Self::new(0);
6701
6702        #[doc = "Address 0001b"]
6703        pub const _0_X_1: Self = Self::new(1);
6704
6705        #[doc = "Address 0010b"]
6706        pub const _0_X_2: Self = Self::new(2);
6707
6708        #[doc = "Address 0011b"]
6709        pub const _0_X_3: Self = Self::new(3);
6710
6711        #[doc = "Address 0100b"]
6712        pub const _0_X_4: Self = Self::new(4);
6713
6714        #[doc = "Address 0101b"]
6715        pub const _0_X_5: Self = Self::new(5);
6716    }
6717}
6718#[doc(hidden)]
6719#[derive(Copy, Clone, Eq, PartialEq)]
6720pub struct Dcpctr_SPEC;
6721impl crate::sealed::RegSpec for Dcpctr_SPEC {
6722    type DataType = u16;
6723}
6724
6725#[doc = "DCP Control Register"]
6726pub type Dcpctr = crate::RegValueT<Dcpctr_SPEC>;
6727
6728impl Dcpctr {
6729    #[doc = "Response PID"]
6730    #[inline(always)]
6731    pub fn pid(
6732        self,
6733    ) -> crate::common::RegisterField<
6734        0,
6735        0x3,
6736        1,
6737        0,
6738        dcpctr::Pid,
6739        dcpctr::Pid,
6740        Dcpctr_SPEC,
6741        crate::common::RW,
6742    > {
6743        crate::common::RegisterField::<
6744            0,
6745            0x3,
6746            1,
6747            0,
6748            dcpctr::Pid,
6749            dcpctr::Pid,
6750            Dcpctr_SPEC,
6751            crate::common::RW,
6752        >::from_register(self, 0)
6753    }
6754
6755    #[doc = "Control Transfer End Enable"]
6756    #[inline(always)]
6757    pub fn ccpl(
6758        self,
6759    ) -> crate::common::RegisterField<
6760        2,
6761        0x1,
6762        1,
6763        0,
6764        dcpctr::Ccpl,
6765        dcpctr::Ccpl,
6766        Dcpctr_SPEC,
6767        crate::common::RW,
6768    > {
6769        crate::common::RegisterField::<
6770            2,
6771            0x1,
6772            1,
6773            0,
6774            dcpctr::Ccpl,
6775            dcpctr::Ccpl,
6776            Dcpctr_SPEC,
6777            crate::common::RW,
6778        >::from_register(self, 0)
6779    }
6780
6781    #[doc = "Pipe Busy"]
6782    #[inline(always)]
6783    pub fn pbusy(
6784        self,
6785    ) -> crate::common::RegisterField<
6786        5,
6787        0x1,
6788        1,
6789        0,
6790        dcpctr::Pbusy,
6791        dcpctr::Pbusy,
6792        Dcpctr_SPEC,
6793        crate::common::R,
6794    > {
6795        crate::common::RegisterField::<
6796            5,
6797            0x1,
6798            1,
6799            0,
6800            dcpctr::Pbusy,
6801            dcpctr::Pbusy,
6802            Dcpctr_SPEC,
6803            crate::common::R,
6804        >::from_register(self, 0)
6805    }
6806
6807    #[doc = "Sequence Toggle Bit Monitor"]
6808    #[inline(always)]
6809    pub fn sqmon(
6810        self,
6811    ) -> crate::common::RegisterField<
6812        6,
6813        0x1,
6814        1,
6815        0,
6816        dcpctr::Sqmon,
6817        dcpctr::Sqmon,
6818        Dcpctr_SPEC,
6819        crate::common::R,
6820    > {
6821        crate::common::RegisterField::<
6822            6,
6823            0x1,
6824            1,
6825            0,
6826            dcpctr::Sqmon,
6827            dcpctr::Sqmon,
6828            Dcpctr_SPEC,
6829            crate::common::R,
6830        >::from_register(self, 0)
6831    }
6832
6833    #[doc = "Sequence Toggle Bit Set"]
6834    #[inline(always)]
6835    pub fn sqset(
6836        self,
6837    ) -> crate::common::RegisterField<
6838        7,
6839        0x1,
6840        1,
6841        0,
6842        dcpctr::Sqset,
6843        dcpctr::Sqset,
6844        Dcpctr_SPEC,
6845        crate::common::RW,
6846    > {
6847        crate::common::RegisterField::<
6848            7,
6849            0x1,
6850            1,
6851            0,
6852            dcpctr::Sqset,
6853            dcpctr::Sqset,
6854            Dcpctr_SPEC,
6855            crate::common::RW,
6856        >::from_register(self, 0)
6857    }
6858
6859    #[doc = "Sequence Toggle Bit Clear"]
6860    #[inline(always)]
6861    pub fn sqclr(
6862        self,
6863    ) -> crate::common::RegisterField<
6864        8,
6865        0x1,
6866        1,
6867        0,
6868        dcpctr::Sqclr,
6869        dcpctr::Sqclr,
6870        Dcpctr_SPEC,
6871        crate::common::RW,
6872    > {
6873        crate::common::RegisterField::<
6874            8,
6875            0x1,
6876            1,
6877            0,
6878            dcpctr::Sqclr,
6879            dcpctr::Sqclr,
6880            Dcpctr_SPEC,
6881            crate::common::RW,
6882        >::from_register(self, 0)
6883    }
6884
6885    #[doc = "SUREQ Bit Clear"]
6886    #[inline(always)]
6887    pub fn sureqclr(
6888        self,
6889    ) -> crate::common::RegisterField<
6890        11,
6891        0x1,
6892        1,
6893        0,
6894        dcpctr::Sureqclr,
6895        dcpctr::Sureqclr,
6896        Dcpctr_SPEC,
6897        crate::common::RW,
6898    > {
6899        crate::common::RegisterField::<
6900            11,
6901            0x1,
6902            1,
6903            0,
6904            dcpctr::Sureqclr,
6905            dcpctr::Sureqclr,
6906            Dcpctr_SPEC,
6907            crate::common::RW,
6908        >::from_register(self, 0)
6909    }
6910
6911    #[doc = "Setup Token Transmission"]
6912    #[inline(always)]
6913    pub fn sureq(
6914        self,
6915    ) -> crate::common::RegisterField<
6916        14,
6917        0x1,
6918        1,
6919        0,
6920        dcpctr::Sureq,
6921        dcpctr::Sureq,
6922        Dcpctr_SPEC,
6923        crate::common::RW,
6924    > {
6925        crate::common::RegisterField::<
6926            14,
6927            0x1,
6928            1,
6929            0,
6930            dcpctr::Sureq,
6931            dcpctr::Sureq,
6932            Dcpctr_SPEC,
6933            crate::common::RW,
6934        >::from_register(self, 0)
6935    }
6936
6937    #[doc = "Buffer Status"]
6938    #[inline(always)]
6939    pub fn bsts(
6940        self,
6941    ) -> crate::common::RegisterField<
6942        15,
6943        0x1,
6944        1,
6945        0,
6946        dcpctr::Bsts,
6947        dcpctr::Bsts,
6948        Dcpctr_SPEC,
6949        crate::common::R,
6950    > {
6951        crate::common::RegisterField::<
6952            15,
6953            0x1,
6954            1,
6955            0,
6956            dcpctr::Bsts,
6957            dcpctr::Bsts,
6958            Dcpctr_SPEC,
6959            crate::common::R,
6960        >::from_register(self, 0)
6961    }
6962}
6963impl ::core::default::Default for Dcpctr {
6964    #[inline(always)]
6965    fn default() -> Dcpctr {
6966        <crate::RegValueT<Dcpctr_SPEC> as RegisterValue<_>>::new(64)
6967    }
6968}
6969pub mod dcpctr {
6970
6971    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6972    pub struct Pid_SPEC;
6973    pub type Pid = crate::EnumBitfieldStruct<u8, Pid_SPEC>;
6974    impl Pid {
6975        #[doc = "NAK response"]
6976        pub const _00: Self = Self::new(0);
6977
6978        #[doc = "BUF response (depends on the buffer state)"]
6979        pub const _01: Self = Self::new(1);
6980
6981        #[doc = "STALL response"]
6982        pub const _10: Self = Self::new(2);
6983
6984        #[doc = "STALL response"]
6985        pub const _11: Self = Self::new(3);
6986    }
6987    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6988    pub struct Ccpl_SPEC;
6989    pub type Ccpl = crate::EnumBitfieldStruct<u8, Ccpl_SPEC>;
6990    impl Ccpl {
6991        #[doc = "Disable control transfer completion"]
6992        pub const _0: Self = Self::new(0);
6993
6994        #[doc = "Enable control transfer completion"]
6995        pub const _1: Self = Self::new(1);
6996    }
6997    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6998    pub struct Pbusy_SPEC;
6999    pub type Pbusy = crate::EnumBitfieldStruct<u8, Pbusy_SPEC>;
7000    impl Pbusy {
7001        #[doc = "DCP not used for the USB bus"]
7002        pub const _0: Self = Self::new(0);
7003
7004        #[doc = "DCP in use for the USB bus"]
7005        pub const _1: Self = Self::new(1);
7006    }
7007    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7008    pub struct Sqmon_SPEC;
7009    pub type Sqmon = crate::EnumBitfieldStruct<u8, Sqmon_SPEC>;
7010    impl Sqmon {
7011        #[doc = "DATA0"]
7012        pub const _0: Self = Self::new(0);
7013
7014        #[doc = "ATA1"]
7015        pub const _1: Self = Self::new(1);
7016    }
7017    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7018    pub struct Sqset_SPEC;
7019    pub type Sqset = crate::EnumBitfieldStruct<u8, Sqset_SPEC>;
7020    impl Sqset {
7021        #[doc = "Invalid (writing 0 has no effect)"]
7022        pub const _0: Self = Self::new(0);
7023
7024        #[doc = "Set the expected value for the next transaction to DATA1"]
7025        pub const _1: Self = Self::new(1);
7026    }
7027    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7028    pub struct Sqclr_SPEC;
7029    pub type Sqclr = crate::EnumBitfieldStruct<u8, Sqclr_SPEC>;
7030    impl Sqclr {
7031        #[doc = "Invalid (writing 0 has no effect)"]
7032        pub const _0: Self = Self::new(0);
7033
7034        #[doc = "Clear the expected value for the next transaction to DATA0"]
7035        pub const _1: Self = Self::new(1);
7036    }
7037    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7038    pub struct Sureqclr_SPEC;
7039    pub type Sureqclr = crate::EnumBitfieldStruct<u8, Sureqclr_SPEC>;
7040    impl Sureqclr {
7041        #[doc = "Invalid (writing 0 has no effect)"]
7042        pub const _0: Self = Self::new(0);
7043
7044        #[doc = "Clear SUREQ to 0"]
7045        pub const _1: Self = Self::new(1);
7046    }
7047    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7048    pub struct Sureq_SPEC;
7049    pub type Sureq = crate::EnumBitfieldStruct<u8, Sureq_SPEC>;
7050    impl Sureq {
7051        #[doc = "Invalid (writing 0 has no effect)"]
7052        pub const _0: Self = Self::new(0);
7053
7054        #[doc = "Transmit setup packet"]
7055        pub const _1: Self = Self::new(1);
7056    }
7057    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7058    pub struct Bsts_SPEC;
7059    pub type Bsts = crate::EnumBitfieldStruct<u8, Bsts_SPEC>;
7060    impl Bsts {
7061        #[doc = "Buffer access disabled"]
7062        pub const _0: Self = Self::new(0);
7063
7064        #[doc = "Buffer access enabled"]
7065        pub const _1: Self = Self::new(1);
7066    }
7067}
7068#[doc(hidden)]
7069#[derive(Copy, Clone, Eq, PartialEq)]
7070pub struct Pipesel_SPEC;
7071impl crate::sealed::RegSpec for Pipesel_SPEC {
7072    type DataType = u16;
7073}
7074
7075#[doc = "Pipe Window Select Register"]
7076pub type Pipesel = crate::RegValueT<Pipesel_SPEC>;
7077
7078impl Pipesel {
7079    #[doc = "Pipe Window Select"]
7080    #[inline(always)]
7081    pub fn pipesel(
7082        self,
7083    ) -> crate::common::RegisterField<
7084        0,
7085        0xf,
7086        1,
7087        0,
7088        pipesel::Pipesel,
7089        pipesel::Pipesel,
7090        Pipesel_SPEC,
7091        crate::common::RW,
7092    > {
7093        crate::common::RegisterField::<
7094            0,
7095            0xf,
7096            1,
7097            0,
7098            pipesel::Pipesel,
7099            pipesel::Pipesel,
7100            Pipesel_SPEC,
7101            crate::common::RW,
7102        >::from_register(self, 0)
7103    }
7104}
7105impl ::core::default::Default for Pipesel {
7106    #[inline(always)]
7107    fn default() -> Pipesel {
7108        <crate::RegValueT<Pipesel_SPEC> as RegisterValue<_>>::new(0)
7109    }
7110}
7111pub mod pipesel {
7112
7113    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7114    pub struct Pipesel_SPEC;
7115    pub type Pipesel = crate::EnumBitfieldStruct<u8, Pipesel_SPEC>;
7116    impl Pipesel {
7117        #[doc = "No pipe selected"]
7118        pub const _0_X_0: Self = Self::new(0);
7119
7120        #[doc = "Pipe 1"]
7121        pub const _0_X_1: Self = Self::new(1);
7122
7123        #[doc = "Pipe 2"]
7124        pub const _0_X_2: Self = Self::new(2);
7125
7126        #[doc = "Pipe 3"]
7127        pub const _0_X_3: Self = Self::new(3);
7128
7129        #[doc = "Pipe 4"]
7130        pub const _0_X_4: Self = Self::new(4);
7131
7132        #[doc = "Pipe 5"]
7133        pub const _0_X_5: Self = Self::new(5);
7134
7135        #[doc = "Pipe 6"]
7136        pub const _0_X_6: Self = Self::new(6);
7137
7138        #[doc = "Pipe 7"]
7139        pub const _0_X_7: Self = Self::new(7);
7140
7141        #[doc = "Pipe 8"]
7142        pub const _0_X_8: Self = Self::new(8);
7143
7144        #[doc = "Pipe 9"]
7145        pub const _0_X_9: Self = Self::new(9);
7146    }
7147}
7148#[doc(hidden)]
7149#[derive(Copy, Clone, Eq, PartialEq)]
7150pub struct Pipecfg_SPEC;
7151impl crate::sealed::RegSpec for Pipecfg_SPEC {
7152    type DataType = u16;
7153}
7154
7155#[doc = "Pipe Configuration Register"]
7156pub type Pipecfg = crate::RegValueT<Pipecfg_SPEC>;
7157
7158impl Pipecfg {
7159    #[doc = "Endpoint Number"]
7160    #[inline(always)]
7161    pub fn epnum(
7162        self,
7163    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Pipecfg_SPEC, crate::common::RW> {
7164        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Pipecfg_SPEC,crate::common::RW>::from_register(self,0)
7165    }
7166
7167    #[doc = "Transfer Direction"]
7168    #[inline(always)]
7169    pub fn dir(
7170        self,
7171    ) -> crate::common::RegisterField<
7172        4,
7173        0x1,
7174        1,
7175        0,
7176        pipecfg::Dir,
7177        pipecfg::Dir,
7178        Pipecfg_SPEC,
7179        crate::common::RW,
7180    > {
7181        crate::common::RegisterField::<
7182            4,
7183            0x1,
7184            1,
7185            0,
7186            pipecfg::Dir,
7187            pipecfg::Dir,
7188            Pipecfg_SPEC,
7189            crate::common::RW,
7190        >::from_register(self, 0)
7191    }
7192
7193    #[doc = "Pipe Disabled at End of Transfer"]
7194    #[inline(always)]
7195    pub fn shtnak(
7196        self,
7197    ) -> crate::common::RegisterField<
7198        7,
7199        0x1,
7200        1,
7201        0,
7202        pipecfg::Shtnak,
7203        pipecfg::Shtnak,
7204        Pipecfg_SPEC,
7205        crate::common::RW,
7206    > {
7207        crate::common::RegisterField::<
7208            7,
7209            0x1,
7210            1,
7211            0,
7212            pipecfg::Shtnak,
7213            pipecfg::Shtnak,
7214            Pipecfg_SPEC,
7215            crate::common::RW,
7216        >::from_register(self, 0)
7217    }
7218
7219    #[doc = "Double Buffer Mode"]
7220    #[inline(always)]
7221    pub fn dblb(
7222        self,
7223    ) -> crate::common::RegisterField<
7224        9,
7225        0x1,
7226        1,
7227        0,
7228        pipecfg::Dblb,
7229        pipecfg::Dblb,
7230        Pipecfg_SPEC,
7231        crate::common::RW,
7232    > {
7233        crate::common::RegisterField::<
7234            9,
7235            0x1,
7236            1,
7237            0,
7238            pipecfg::Dblb,
7239            pipecfg::Dblb,
7240            Pipecfg_SPEC,
7241            crate::common::RW,
7242        >::from_register(self, 0)
7243    }
7244
7245    #[doc = "BRDY Interrupt Operation Specification"]
7246    #[inline(always)]
7247    pub fn bfre(
7248        self,
7249    ) -> crate::common::RegisterField<
7250        10,
7251        0x1,
7252        1,
7253        0,
7254        pipecfg::Bfre,
7255        pipecfg::Bfre,
7256        Pipecfg_SPEC,
7257        crate::common::RW,
7258    > {
7259        crate::common::RegisterField::<
7260            10,
7261            0x1,
7262            1,
7263            0,
7264            pipecfg::Bfre,
7265            pipecfg::Bfre,
7266            Pipecfg_SPEC,
7267            crate::common::RW,
7268        >::from_register(self, 0)
7269    }
7270
7271    #[doc = "Transfer Type"]
7272    #[inline(always)]
7273    pub fn r#type(
7274        self,
7275    ) -> crate::common::RegisterField<
7276        14,
7277        0x3,
7278        1,
7279        0,
7280        pipecfg::Type,
7281        pipecfg::Type,
7282        Pipecfg_SPEC,
7283        crate::common::RW,
7284    > {
7285        crate::common::RegisterField::<
7286            14,
7287            0x3,
7288            1,
7289            0,
7290            pipecfg::Type,
7291            pipecfg::Type,
7292            Pipecfg_SPEC,
7293            crate::common::RW,
7294        >::from_register(self, 0)
7295    }
7296}
7297impl ::core::default::Default for Pipecfg {
7298    #[inline(always)]
7299    fn default() -> Pipecfg {
7300        <crate::RegValueT<Pipecfg_SPEC> as RegisterValue<_>>::new(0)
7301    }
7302}
7303pub mod pipecfg {
7304
7305    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7306    pub struct Dir_SPEC;
7307    pub type Dir = crate::EnumBitfieldStruct<u8, Dir_SPEC>;
7308    impl Dir {
7309        #[doc = "Receiving direction"]
7310        pub const _0: Self = Self::new(0);
7311
7312        #[doc = "Transmitting direction"]
7313        pub const _1: Self = Self::new(1);
7314    }
7315    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7316    pub struct Shtnak_SPEC;
7317    pub type Shtnak = crate::EnumBitfieldStruct<u8, Shtnak_SPEC>;
7318    impl Shtnak {
7319        #[doc = "Continue pipe operation after transfer ends"]
7320        pub const _0: Self = Self::new(0);
7321
7322        #[doc = "Disable pipe after transfer ends"]
7323        pub const _1: Self = Self::new(1);
7324    }
7325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7326    pub struct Dblb_SPEC;
7327    pub type Dblb = crate::EnumBitfieldStruct<u8, Dblb_SPEC>;
7328    impl Dblb {
7329        #[doc = "Single buffer"]
7330        pub const _0: Self = Self::new(0);
7331
7332        #[doc = "Double buffer"]
7333        pub const _1: Self = Self::new(1);
7334    }
7335    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7336    pub struct Bfre_SPEC;
7337    pub type Bfre = crate::EnumBitfieldStruct<u8, Bfre_SPEC>;
7338    impl Bfre {
7339        #[doc = "Generate BRDY interrupt on transmitting or receiving data"]
7340        pub const _0: Self = Self::new(0);
7341
7342        #[doc = "Generate BRDY interrupt on completion of reading data"]
7343        pub const _1: Self = Self::new(1);
7344    }
7345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7346    pub struct Type_SPEC;
7347    pub type Type = crate::EnumBitfieldStruct<u8, Type_SPEC>;
7348    impl Type {
7349        #[doc = "Pipe not used"]
7350        pub const _00: Self = Self::new(0);
7351
7352        #[doc = "Pipes 1 and 2: Bulk transfer Pipes 3 to 5: Bulk transfer Pipes 6 to 9: Setting prohibited"]
7353        pub const _01: Self = Self::new(1);
7354
7355        #[doc = "Pipes 1 and 2: Setting prohibited Pipes 3 to 5: Setting prohibited Pipes 6 to 9: Interrupt transfer"]
7356        pub const _10: Self = Self::new(2);
7357
7358        #[doc = "Pipes 1 and 2: Isochronous transfer Pipes 3 to 5: Setting prohibited Pipes 6 to 9: Setting prohibited"]
7359        pub const _11: Self = Self::new(3);
7360    }
7361}
7362#[doc(hidden)]
7363#[derive(Copy, Clone, Eq, PartialEq)]
7364pub struct Pipemaxp_SPEC;
7365impl crate::sealed::RegSpec for Pipemaxp_SPEC {
7366    type DataType = u16;
7367}
7368
7369#[doc = "Pipe Maximum Packet Size Register"]
7370pub type Pipemaxp = crate::RegValueT<Pipemaxp_SPEC>;
7371
7372impl Pipemaxp {
7373    #[doc = "Maximum Packet Size"]
7374    #[inline(always)]
7375    pub fn mxps(
7376        self,
7377    ) -> crate::common::RegisterField<0, 0x1ff, 1, 0, u16, u16, Pipemaxp_SPEC, crate::common::RW>
7378    {
7379        crate::common::RegisterField::<0,0x1ff,1,0,u16,u16,Pipemaxp_SPEC,crate::common::RW>::from_register(self,0)
7380    }
7381
7382    #[doc = "Device Select"]
7383    #[inline(always)]
7384    pub fn devsel(
7385        self,
7386    ) -> crate::common::RegisterField<
7387        12,
7388        0xf,
7389        1,
7390        0,
7391        pipemaxp::Devsel,
7392        pipemaxp::Devsel,
7393        Pipemaxp_SPEC,
7394        crate::common::RW,
7395    > {
7396        crate::common::RegisterField::<
7397            12,
7398            0xf,
7399            1,
7400            0,
7401            pipemaxp::Devsel,
7402            pipemaxp::Devsel,
7403            Pipemaxp_SPEC,
7404            crate::common::RW,
7405        >::from_register(self, 0)
7406    }
7407}
7408impl ::core::default::Default for Pipemaxp {
7409    #[inline(always)]
7410    fn default() -> Pipemaxp {
7411        <crate::RegValueT<Pipemaxp_SPEC> as RegisterValue<_>>::new(0)
7412    }
7413}
7414pub mod pipemaxp {
7415
7416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7417    pub struct Devsel_SPEC;
7418    pub type Devsel = crate::EnumBitfieldStruct<u8, Devsel_SPEC>;
7419    impl Devsel {
7420        #[doc = "Address 0000b"]
7421        pub const _0_X_0: Self = Self::new(0);
7422
7423        #[doc = "Address 0001b"]
7424        pub const _0_X_1: Self = Self::new(1);
7425
7426        #[doc = "Address 0010b"]
7427        pub const _0_X_2: Self = Self::new(2);
7428
7429        #[doc = "Address 0011b"]
7430        pub const _0_X_3: Self = Self::new(3);
7431
7432        #[doc = "Address 0100b"]
7433        pub const _0_X_4: Self = Self::new(4);
7434
7435        #[doc = "Address 0101b"]
7436        pub const _0_X_5: Self = Self::new(5);
7437    }
7438}
7439#[doc(hidden)]
7440#[derive(Copy, Clone, Eq, PartialEq)]
7441pub struct Pipeperi_SPEC;
7442impl crate::sealed::RegSpec for Pipeperi_SPEC {
7443    type DataType = u16;
7444}
7445
7446#[doc = "Pipe Cycle Control Register"]
7447pub type Pipeperi = crate::RegValueT<Pipeperi_SPEC>;
7448
7449impl Pipeperi {
7450    #[doc = "Interval Error Detection Interval"]
7451    #[inline(always)]
7452    pub fn iitv(
7453        self,
7454    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Pipeperi_SPEC, crate::common::RW> {
7455        crate::common::RegisterField::<0,0x7,1,0,u8,u8,Pipeperi_SPEC,crate::common::RW>::from_register(self,0)
7456    }
7457
7458    #[doc = "Isochronous IN Buffer Flush"]
7459    #[inline(always)]
7460    pub fn ifis(
7461        self,
7462    ) -> crate::common::RegisterField<
7463        12,
7464        0x1,
7465        1,
7466        0,
7467        pipeperi::Ifis,
7468        pipeperi::Ifis,
7469        Pipeperi_SPEC,
7470        crate::common::RW,
7471    > {
7472        crate::common::RegisterField::<
7473            12,
7474            0x1,
7475            1,
7476            0,
7477            pipeperi::Ifis,
7478            pipeperi::Ifis,
7479            Pipeperi_SPEC,
7480            crate::common::RW,
7481        >::from_register(self, 0)
7482    }
7483}
7484impl ::core::default::Default for Pipeperi {
7485    #[inline(always)]
7486    fn default() -> Pipeperi {
7487        <crate::RegValueT<Pipeperi_SPEC> as RegisterValue<_>>::new(0)
7488    }
7489}
7490pub mod pipeperi {
7491
7492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7493    pub struct Ifis_SPEC;
7494    pub type Ifis = crate::EnumBitfieldStruct<u8, Ifis_SPEC>;
7495    impl Ifis {
7496        #[doc = "Do not flush buffer"]
7497        pub const _0: Self = Self::new(0);
7498
7499        #[doc = "Flush buffer"]
7500        pub const _1: Self = Self::new(1);
7501    }
7502}
7503#[doc(hidden)]
7504#[derive(Copy, Clone, Eq, PartialEq)]
7505pub struct Pipectr_SPEC;
7506impl crate::sealed::RegSpec for Pipectr_SPEC {
7507    type DataType = u16;
7508}
7509
7510#[doc = "PIPE%s Control Registers"]
7511pub type Pipectr = crate::RegValueT<Pipectr_SPEC>;
7512
7513impl Pipectr {
7514    #[doc = "Response PID"]
7515    #[inline(always)]
7516    pub fn pid(
7517        self,
7518    ) -> crate::common::RegisterField<
7519        0,
7520        0x3,
7521        1,
7522        0,
7523        pipectr::Pid,
7524        pipectr::Pid,
7525        Pipectr_SPEC,
7526        crate::common::RW,
7527    > {
7528        crate::common::RegisterField::<
7529            0,
7530            0x3,
7531            1,
7532            0,
7533            pipectr::Pid,
7534            pipectr::Pid,
7535            Pipectr_SPEC,
7536            crate::common::RW,
7537        >::from_register(self, 0)
7538    }
7539
7540    #[doc = "Pipe Busy"]
7541    #[inline(always)]
7542    pub fn pbusy(
7543        self,
7544    ) -> crate::common::RegisterField<
7545        5,
7546        0x1,
7547        1,
7548        0,
7549        pipectr::Pbusy,
7550        pipectr::Pbusy,
7551        Pipectr_SPEC,
7552        crate::common::R,
7553    > {
7554        crate::common::RegisterField::<
7555            5,
7556            0x1,
7557            1,
7558            0,
7559            pipectr::Pbusy,
7560            pipectr::Pbusy,
7561            Pipectr_SPEC,
7562            crate::common::R,
7563        >::from_register(self, 0)
7564    }
7565
7566    #[doc = "Sequence Toggle Bit Confirmation"]
7567    #[inline(always)]
7568    pub fn sqmon(
7569        self,
7570    ) -> crate::common::RegisterField<
7571        6,
7572        0x1,
7573        1,
7574        0,
7575        pipectr::Sqmon,
7576        pipectr::Sqmon,
7577        Pipectr_SPEC,
7578        crate::common::R,
7579    > {
7580        crate::common::RegisterField::<
7581            6,
7582            0x1,
7583            1,
7584            0,
7585            pipectr::Sqmon,
7586            pipectr::Sqmon,
7587            Pipectr_SPEC,
7588            crate::common::R,
7589        >::from_register(self, 0)
7590    }
7591
7592    #[doc = "Sequence Toggle Bit Set"]
7593    #[inline(always)]
7594    pub fn sqset(
7595        self,
7596    ) -> crate::common::RegisterField<
7597        7,
7598        0x1,
7599        1,
7600        0,
7601        pipectr::Sqset,
7602        pipectr::Sqset,
7603        Pipectr_SPEC,
7604        crate::common::W,
7605    > {
7606        crate::common::RegisterField::<
7607            7,
7608            0x1,
7609            1,
7610            0,
7611            pipectr::Sqset,
7612            pipectr::Sqset,
7613            Pipectr_SPEC,
7614            crate::common::W,
7615        >::from_register(self, 0)
7616    }
7617
7618    #[doc = "Sequence Toggle Bit Clear"]
7619    #[inline(always)]
7620    pub fn sqclr(
7621        self,
7622    ) -> crate::common::RegisterField<
7623        8,
7624        0x1,
7625        1,
7626        0,
7627        pipectr::Sqclr,
7628        pipectr::Sqclr,
7629        Pipectr_SPEC,
7630        crate::common::W,
7631    > {
7632        crate::common::RegisterField::<
7633            8,
7634            0x1,
7635            1,
7636            0,
7637            pipectr::Sqclr,
7638            pipectr::Sqclr,
7639            Pipectr_SPEC,
7640            crate::common::W,
7641        >::from_register(self, 0)
7642    }
7643
7644    #[doc = "Auto Buffer Clear Mode"]
7645    #[inline(always)]
7646    pub fn aclrm(
7647        self,
7648    ) -> crate::common::RegisterField<
7649        9,
7650        0x1,
7651        1,
7652        0,
7653        pipectr::Aclrm,
7654        pipectr::Aclrm,
7655        Pipectr_SPEC,
7656        crate::common::RW,
7657    > {
7658        crate::common::RegisterField::<
7659            9,
7660            0x1,
7661            1,
7662            0,
7663            pipectr::Aclrm,
7664            pipectr::Aclrm,
7665            Pipectr_SPEC,
7666            crate::common::RW,
7667        >::from_register(self, 0)
7668    }
7669
7670    #[doc = "Buffer Status"]
7671    #[inline(always)]
7672    pub fn bsts(
7673        self,
7674    ) -> crate::common::RegisterField<
7675        15,
7676        0x1,
7677        1,
7678        0,
7679        pipectr::Bsts,
7680        pipectr::Bsts,
7681        Pipectr_SPEC,
7682        crate::common::R,
7683    > {
7684        crate::common::RegisterField::<
7685            15,
7686            0x1,
7687            1,
7688            0,
7689            pipectr::Bsts,
7690            pipectr::Bsts,
7691            Pipectr_SPEC,
7692            crate::common::R,
7693        >::from_register(self, 0)
7694    }
7695}
7696impl ::core::default::Default for Pipectr {
7697    #[inline(always)]
7698    fn default() -> Pipectr {
7699        <crate::RegValueT<Pipectr_SPEC> as RegisterValue<_>>::new(0)
7700    }
7701}
7702pub mod pipectr {
7703
7704    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7705    pub struct Pid_SPEC;
7706    pub type Pid = crate::EnumBitfieldStruct<u8, Pid_SPEC>;
7707    impl Pid {
7708        #[doc = "NAK response"]
7709        pub const _00: Self = Self::new(0);
7710
7711        #[doc = "BUF response (depends buffer state)"]
7712        pub const _01: Self = Self::new(1);
7713
7714        #[doc = "STALL response"]
7715        pub const _10: Self = Self::new(2);
7716
7717        #[doc = "STALL response"]
7718        pub const _11: Self = Self::new(3);
7719    }
7720    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7721    pub struct Pbusy_SPEC;
7722    pub type Pbusy = crate::EnumBitfieldStruct<u8, Pbusy_SPEC>;
7723    impl Pbusy {
7724        #[doc = "Pipe n not in use for the transaction"]
7725        pub const _0: Self = Self::new(0);
7726
7727        #[doc = "Pipe n in use for the transaction"]
7728        pub const _1: Self = Self::new(1);
7729    }
7730    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7731    pub struct Sqmon_SPEC;
7732    pub type Sqmon = crate::EnumBitfieldStruct<u8, Sqmon_SPEC>;
7733    impl Sqmon {
7734        #[doc = "DATA0"]
7735        pub const _0: Self = Self::new(0);
7736
7737        #[doc = "DATA1"]
7738        pub const _1: Self = Self::new(1);
7739    }
7740    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7741    pub struct Sqset_SPEC;
7742    pub type Sqset = crate::EnumBitfieldStruct<u8, Sqset_SPEC>;
7743    impl Sqset {
7744        #[doc = "Invalid (writing 0 has no effect)"]
7745        pub const _0: Self = Self::new(0);
7746
7747        #[doc = "Set the expected value for the next transaction to DATA0"]
7748        pub const _1: Self = Self::new(1);
7749    }
7750    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7751    pub struct Sqclr_SPEC;
7752    pub type Sqclr = crate::EnumBitfieldStruct<u8, Sqclr_SPEC>;
7753    impl Sqclr {
7754        #[doc = "Invalid (writing 0 has no effect)"]
7755        pub const _0: Self = Self::new(0);
7756
7757        #[doc = "Clear the expected value for the next transaction to DATA0"]
7758        pub const _1: Self = Self::new(1);
7759    }
7760    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7761    pub struct Aclrm_SPEC;
7762    pub type Aclrm = crate::EnumBitfieldStruct<u8, Aclrm_SPEC>;
7763    impl Aclrm {
7764        #[doc = "Disable"]
7765        pub const _0: Self = Self::new(0);
7766
7767        #[doc = "Enable (all buffers initialized)"]
7768        pub const _1: Self = Self::new(1);
7769    }
7770    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7771    pub struct Bsts_SPEC;
7772    pub type Bsts = crate::EnumBitfieldStruct<u8, Bsts_SPEC>;
7773    impl Bsts {
7774        #[doc = "Buffer access disabled"]
7775        pub const _0: Self = Self::new(0);
7776
7777        #[doc = "Buffer access enabled"]
7778        pub const _1: Self = Self::new(1);
7779    }
7780}
7781#[doc(hidden)]
7782#[derive(Copy, Clone, Eq, PartialEq)]
7783pub struct Pipetre_SPEC;
7784impl crate::sealed::RegSpec for Pipetre_SPEC {
7785    type DataType = u16;
7786}
7787
7788#[doc = "PIPE%s Transaction Counter Enable Register"]
7789pub type Pipetre = crate::RegValueT<Pipetre_SPEC>;
7790
7791impl Pipetre {
7792    #[doc = "Transaction Counter Clear"]
7793    #[inline(always)]
7794    pub fn trclr(
7795        self,
7796    ) -> crate::common::RegisterField<
7797        8,
7798        0x1,
7799        1,
7800        0,
7801        pipetre::Trclr,
7802        pipetre::Trclr,
7803        Pipetre_SPEC,
7804        crate::common::RW,
7805    > {
7806        crate::common::RegisterField::<
7807            8,
7808            0x1,
7809            1,
7810            0,
7811            pipetre::Trclr,
7812            pipetre::Trclr,
7813            Pipetre_SPEC,
7814            crate::common::RW,
7815        >::from_register(self, 0)
7816    }
7817
7818    #[doc = "Transaction Counter Enable"]
7819    #[inline(always)]
7820    pub fn trenb(
7821        self,
7822    ) -> crate::common::RegisterField<
7823        9,
7824        0x1,
7825        1,
7826        0,
7827        pipetre::Trenb,
7828        pipetre::Trenb,
7829        Pipetre_SPEC,
7830        crate::common::RW,
7831    > {
7832        crate::common::RegisterField::<
7833            9,
7834            0x1,
7835            1,
7836            0,
7837            pipetre::Trenb,
7838            pipetre::Trenb,
7839            Pipetre_SPEC,
7840            crate::common::RW,
7841        >::from_register(self, 0)
7842    }
7843}
7844impl ::core::default::Default for Pipetre {
7845    #[inline(always)]
7846    fn default() -> Pipetre {
7847        <crate::RegValueT<Pipetre_SPEC> as RegisterValue<_>>::new(0)
7848    }
7849}
7850pub mod pipetre {
7851
7852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7853    pub struct Trclr_SPEC;
7854    pub type Trclr = crate::EnumBitfieldStruct<u8, Trclr_SPEC>;
7855    impl Trclr {
7856        #[doc = "Invalid (writing 0 has no effect)"]
7857        pub const _0: Self = Self::new(0);
7858
7859        #[doc = "Clear counter value"]
7860        pub const _1: Self = Self::new(1);
7861    }
7862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7863    pub struct Trenb_SPEC;
7864    pub type Trenb = crate::EnumBitfieldStruct<u8, Trenb_SPEC>;
7865    impl Trenb {
7866        #[doc = "Disable transaction counter"]
7867        pub const _0: Self = Self::new(0);
7868
7869        #[doc = "Enable transaction counter"]
7870        pub const _1: Self = Self::new(1);
7871    }
7872}
7873#[doc(hidden)]
7874#[derive(Copy, Clone, Eq, PartialEq)]
7875pub struct Pipetrn_SPEC;
7876impl crate::sealed::RegSpec for Pipetrn_SPEC {
7877    type DataType = u16;
7878}
7879
7880#[doc = "PIPE%s Transaction Counter Register"]
7881pub type Pipetrn = crate::RegValueT<Pipetrn_SPEC>;
7882
7883impl Pipetrn {
7884    #[doc = "Transaction Counter"]
7885    #[inline(always)]
7886    pub fn trncnt(
7887        self,
7888    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Pipetrn_SPEC, crate::common::RW>
7889    {
7890        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Pipetrn_SPEC,crate::common::RW>::from_register(self,0)
7891    }
7892}
7893impl ::core::default::Default for Pipetrn {
7894    #[inline(always)]
7895    fn default() -> Pipetrn {
7896        <crate::RegValueT<Pipetrn_SPEC> as RegisterValue<_>>::new(0)
7897    }
7898}
7899
7900#[doc(hidden)]
7901#[derive(Copy, Clone, Eq, PartialEq)]
7902pub struct Bcctrl1_SPEC;
7903impl crate::sealed::RegSpec for Bcctrl1_SPEC {
7904    type DataType = u32;
7905}
7906
7907#[doc = "Battery Charging Control Register 1"]
7908pub type Bcctrl1 = crate::RegValueT<Bcctrl1_SPEC>;
7909
7910impl Bcctrl1 {
7911    #[doc = "D- Line Pull-down Control"]
7912    #[inline(always)]
7913    pub fn rpdme(
7914        self,
7915    ) -> crate::common::RegisterField<
7916        0,
7917        0x1,
7918        1,
7919        0,
7920        bcctrl1::Rpdme,
7921        bcctrl1::Rpdme,
7922        Bcctrl1_SPEC,
7923        crate::common::RW,
7924    > {
7925        crate::common::RegisterField::<
7926            0,
7927            0x1,
7928            1,
7929            0,
7930            bcctrl1::Rpdme,
7931            bcctrl1::Rpdme,
7932            Bcctrl1_SPEC,
7933            crate::common::RW,
7934        >::from_register(self, 0)
7935    }
7936
7937    #[doc = "D+ Line IDPSRC Output Control"]
7938    #[inline(always)]
7939    pub fn idpsrce(
7940        self,
7941    ) -> crate::common::RegisterField<
7942        1,
7943        0x1,
7944        1,
7945        0,
7946        bcctrl1::Idpsrce,
7947        bcctrl1::Idpsrce,
7948        Bcctrl1_SPEC,
7949        crate::common::RW,
7950    > {
7951        crate::common::RegisterField::<
7952            1,
7953            0x1,
7954            1,
7955            0,
7956            bcctrl1::Idpsrce,
7957            bcctrl1::Idpsrce,
7958            Bcctrl1_SPEC,
7959            crate::common::RW,
7960        >::from_register(self, 0)
7961    }
7962
7963    #[doc = "D- Line VDMSRC (0.6 V) Output Control"]
7964    #[inline(always)]
7965    pub fn vdmsrce(
7966        self,
7967    ) -> crate::common::RegisterField<
7968        2,
7969        0x1,
7970        1,
7971        0,
7972        bcctrl1::Vdmsrce,
7973        bcctrl1::Vdmsrce,
7974        Bcctrl1_SPEC,
7975        crate::common::RW,
7976    > {
7977        crate::common::RegisterField::<
7978            2,
7979            0x1,
7980            1,
7981            0,
7982            bcctrl1::Vdmsrce,
7983            bcctrl1::Vdmsrce,
7984            Bcctrl1_SPEC,
7985            crate::common::RW,
7986        >::from_register(self, 0)
7987    }
7988
7989    #[doc = "D+ Line VDPSRC (0.6 V) Output Control"]
7990    #[inline(always)]
7991    pub fn vdpsrce(
7992        self,
7993    ) -> crate::common::RegisterField<
7994        3,
7995        0x1,
7996        1,
7997        0,
7998        bcctrl1::Vdpsrce,
7999        bcctrl1::Vdpsrce,
8000        Bcctrl1_SPEC,
8001        crate::common::RW,
8002    > {
8003        crate::common::RegisterField::<
8004            3,
8005            0x1,
8006            1,
8007            0,
8008            bcctrl1::Vdpsrce,
8009            bcctrl1::Vdpsrce,
8010            Bcctrl1_SPEC,
8011            crate::common::RW,
8012        >::from_register(self, 0)
8013    }
8014
8015    #[doc = "D+ Line 0.6\u{a0}V Input Detection Control"]
8016    #[inline(always)]
8017    pub fn pddete(
8018        self,
8019    ) -> crate::common::RegisterField<
8020        4,
8021        0x1,
8022        1,
8023        0,
8024        bcctrl1::Pddete,
8025        bcctrl1::Pddete,
8026        Bcctrl1_SPEC,
8027        crate::common::RW,
8028    > {
8029        crate::common::RegisterField::<
8030            4,
8031            0x1,
8032            1,
8033            0,
8034            bcctrl1::Pddete,
8035            bcctrl1::Pddete,
8036            Bcctrl1_SPEC,
8037            crate::common::RW,
8038        >::from_register(self, 0)
8039    }
8040
8041    #[doc = "D- Line 0.6\u{a0}V Input Detection Control"]
8042    #[inline(always)]
8043    pub fn chgdete(
8044        self,
8045    ) -> crate::common::RegisterField<
8046        5,
8047        0x1,
8048        1,
8049        0,
8050        bcctrl1::Chgdete,
8051        bcctrl1::Chgdete,
8052        Bcctrl1_SPEC,
8053        crate::common::RW,
8054    > {
8055        crate::common::RegisterField::<
8056            5,
8057            0x1,
8058            1,
8059            0,
8060            bcctrl1::Chgdete,
8061            bcctrl1::Chgdete,
8062            Bcctrl1_SPEC,
8063            crate::common::RW,
8064        >::from_register(self, 0)
8065    }
8066
8067    #[doc = "D+ Line 0.6 V Input Detection Status Flag"]
8068    #[inline(always)]
8069    pub fn pddetsts(
8070        self,
8071    ) -> crate::common::RegisterField<
8072        8,
8073        0x1,
8074        1,
8075        0,
8076        bcctrl1::Pddetsts,
8077        bcctrl1::Pddetsts,
8078        Bcctrl1_SPEC,
8079        crate::common::R,
8080    > {
8081        crate::common::RegisterField::<
8082            8,
8083            0x1,
8084            1,
8085            0,
8086            bcctrl1::Pddetsts,
8087            bcctrl1::Pddetsts,
8088            Bcctrl1_SPEC,
8089            crate::common::R,
8090        >::from_register(self, 0)
8091    }
8092
8093    #[doc = "D- Line 0.6 V Input Detection Status Flag"]
8094    #[inline(always)]
8095    pub fn chgdetsts(
8096        self,
8097    ) -> crate::common::RegisterField<
8098        9,
8099        0x1,
8100        1,
8101        0,
8102        bcctrl1::Chgdetsts,
8103        bcctrl1::Chgdetsts,
8104        Bcctrl1_SPEC,
8105        crate::common::R,
8106    > {
8107        crate::common::RegisterField::<
8108            9,
8109            0x1,
8110            1,
8111            0,
8112            bcctrl1::Chgdetsts,
8113            bcctrl1::Chgdetsts,
8114            Bcctrl1_SPEC,
8115            crate::common::R,
8116        >::from_register(self, 0)
8117    }
8118}
8119impl ::core::default::Default for Bcctrl1 {
8120    #[inline(always)]
8121    fn default() -> Bcctrl1 {
8122        <crate::RegValueT<Bcctrl1_SPEC> as RegisterValue<_>>::new(0)
8123    }
8124}
8125pub mod bcctrl1 {
8126
8127    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8128    pub struct Rpdme_SPEC;
8129    pub type Rpdme = crate::EnumBitfieldStruct<u8, Rpdme_SPEC>;
8130    impl Rpdme {
8131        #[doc = "Disable D- Line Pull-down"]
8132        pub const _0: Self = Self::new(0);
8133
8134        #[doc = "Enable D- Line Pull-down"]
8135        pub const _1: Self = Self::new(1);
8136    }
8137    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8138    pub struct Idpsrce_SPEC;
8139    pub type Idpsrce = crate::EnumBitfieldStruct<u8, Idpsrce_SPEC>;
8140    impl Idpsrce {
8141        #[doc = "Stopped"]
8142        pub const _0: Self = Self::new(0);
8143
8144        #[doc = "10 µA output"]
8145        pub const _1: Self = Self::new(1);
8146    }
8147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8148    pub struct Vdmsrce_SPEC;
8149    pub type Vdmsrce = crate::EnumBitfieldStruct<u8, Vdmsrce_SPEC>;
8150    impl Vdmsrce {
8151        #[doc = "Stopped"]
8152        pub const _0: Self = Self::new(0);
8153
8154        #[doc = "0.6 V output"]
8155        pub const _1: Self = Self::new(1);
8156    }
8157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8158    pub struct Vdpsrce_SPEC;
8159    pub type Vdpsrce = crate::EnumBitfieldStruct<u8, Vdpsrce_SPEC>;
8160    impl Vdpsrce {
8161        #[doc = "Stopped"]
8162        pub const _0: Self = Self::new(0);
8163
8164        #[doc = "0.6 V output"]
8165        pub const _1: Self = Self::new(1);
8166    }
8167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8168    pub struct Pddete_SPEC;
8169    pub type Pddete = crate::EnumBitfieldStruct<u8, Pddete_SPEC>;
8170    impl Pddete {
8171        #[doc = "Disable detection"]
8172        pub const _0: Self = Self::new(0);
8173
8174        #[doc = "Enable detection"]
8175        pub const _1: Self = Self::new(1);
8176    }
8177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8178    pub struct Chgdete_SPEC;
8179    pub type Chgdete = crate::EnumBitfieldStruct<u8, Chgdete_SPEC>;
8180    impl Chgdete {
8181        #[doc = "Disable detection"]
8182        pub const _0: Self = Self::new(0);
8183
8184        #[doc = "Enable detection"]
8185        pub const _1: Self = Self::new(1);
8186    }
8187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8188    pub struct Pddetsts_SPEC;
8189    pub type Pddetsts = crate::EnumBitfieldStruct<u8, Pddetsts_SPEC>;
8190    impl Pddetsts {
8191        #[doc = "Not detected"]
8192        pub const _0: Self = Self::new(0);
8193
8194        #[doc = "Detected"]
8195        pub const _1: Self = Self::new(1);
8196    }
8197    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8198    pub struct Chgdetsts_SPEC;
8199    pub type Chgdetsts = crate::EnumBitfieldStruct<u8, Chgdetsts_SPEC>;
8200    impl Chgdetsts {
8201        #[doc = "Not detected"]
8202        pub const _0: Self = Self::new(0);
8203
8204        #[doc = "Detected"]
8205        pub const _1: Self = Self::new(1);
8206    }
8207}
8208#[doc(hidden)]
8209#[derive(Copy, Clone, Eq, PartialEq)]
8210pub struct Bcctrl2_SPEC;
8211impl crate::sealed::RegSpec for Bcctrl2_SPEC {
8212    type DataType = u32;
8213}
8214
8215#[doc = "Battery Charging Control Register 2"]
8216pub type Bcctrl2 = crate::RegValueT<Bcctrl2_SPEC>;
8217
8218impl Bcctrl2 {
8219    #[doc = "Dedicated Charging Port (DCP) Mode Control"]
8220    #[inline(always)]
8221    pub fn dcpmode(
8222        self,
8223    ) -> crate::common::RegisterField<
8224        6,
8225        0x1,
8226        1,
8227        0,
8228        bcctrl2::Dcpmode,
8229        bcctrl2::Dcpmode,
8230        Bcctrl2_SPEC,
8231        crate::common::RW,
8232    > {
8233        crate::common::RegisterField::<
8234            6,
8235            0x1,
8236            1,
8237            0,
8238            bcctrl2::Dcpmode,
8239            bcctrl2::Dcpmode,
8240            Bcctrl2_SPEC,
8241            crate::common::RW,
8242        >::from_register(self, 0)
8243    }
8244
8245    #[doc = "Battery Charging Enable"]
8246    #[inline(always)]
8247    pub fn batchge(
8248        self,
8249    ) -> crate::common::RegisterField<
8250        7,
8251        0x1,
8252        1,
8253        0,
8254        bcctrl2::Batchge,
8255        bcctrl2::Batchge,
8256        Bcctrl2_SPEC,
8257        crate::common::RW,
8258    > {
8259        crate::common::RegisterField::<
8260            7,
8261            0x1,
8262            1,
8263            0,
8264            bcctrl2::Batchge,
8265            bcctrl2::Batchge,
8266            Bcctrl2_SPEC,
8267            crate::common::RW,
8268        >::from_register(self, 0)
8269    }
8270
8271    #[doc = "Detect Sensitivity Adjustment"]
8272    #[inline(always)]
8273    pub fn phydet(
8274        self,
8275    ) -> crate::common::RegisterField<12, 0x3, 1, 0, u8, u8, Bcctrl2_SPEC, crate::common::RW> {
8276        crate::common::RegisterField::<12,0x3,1,0,u8,u8,Bcctrl2_SPEC,crate::common::RW>::from_register(self,0)
8277    }
8278}
8279impl ::core::default::Default for Bcctrl2 {
8280    #[inline(always)]
8281    fn default() -> Bcctrl2 {
8282        <crate::RegValueT<Bcctrl2_SPEC> as RegisterValue<_>>::new(8192)
8283    }
8284}
8285pub mod bcctrl2 {
8286
8287    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8288    pub struct Dcpmode_SPEC;
8289    pub type Dcpmode = crate::EnumBitfieldStruct<u8, Dcpmode_SPEC>;
8290    impl Dcpmode {
8291        #[doc = "Disable DCP"]
8292        pub const _0: Self = Self::new(0);
8293
8294        #[doc = "Enable DCP"]
8295        pub const _1: Self = Self::new(1);
8296    }
8297    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8298    pub struct Batchge_SPEC;
8299    pub type Batchge = crate::EnumBitfieldStruct<u8, Batchge_SPEC>;
8300    impl Batchge {
8301        #[doc = "Disable Battery Charging"]
8302        pub const _0: Self = Self::new(0);
8303
8304        #[doc = "Enable Battery Charging"]
8305        pub const _1: Self = Self::new(1);
8306    }
8307}
8308#[doc(hidden)]
8309#[derive(Copy, Clone, Eq, PartialEq)]
8310pub struct Devadd_SPEC;
8311impl crate::sealed::RegSpec for Devadd_SPEC {
8312    type DataType = u16;
8313}
8314
8315#[doc = "Device Address %s Configuration Register"]
8316pub type Devadd = crate::RegValueT<Devadd_SPEC>;
8317
8318impl Devadd {
8319    #[doc = "Transfer Speed of Communication Target Device"]
8320    #[inline(always)]
8321    pub fn usbspd(
8322        self,
8323    ) -> crate::common::RegisterField<
8324        6,
8325        0x3,
8326        1,
8327        0,
8328        devadd::Usbspd,
8329        devadd::Usbspd,
8330        Devadd_SPEC,
8331        crate::common::RW,
8332    > {
8333        crate::common::RegisterField::<
8334            6,
8335            0x3,
8336            1,
8337            0,
8338            devadd::Usbspd,
8339            devadd::Usbspd,
8340            Devadd_SPEC,
8341            crate::common::RW,
8342        >::from_register(self, 0)
8343    }
8344}
8345impl ::core::default::Default for Devadd {
8346    #[inline(always)]
8347    fn default() -> Devadd {
8348        <crate::RegValueT<Devadd_SPEC> as RegisterValue<_>>::new(0)
8349    }
8350}
8351pub mod devadd {
8352
8353    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8354    pub struct Usbspd_SPEC;
8355    pub type Usbspd = crate::EnumBitfieldStruct<u8, Usbspd_SPEC>;
8356    impl Usbspd {
8357        #[doc = "Do not use DEVADDn"]
8358        pub const _00: Self = Self::new(0);
8359
8360        #[doc = "Low-speed"]
8361        pub const _01: Self = Self::new(1);
8362
8363        #[doc = "Full-speed"]
8364        pub const _10: Self = Self::new(2);
8365
8366        #[doc = "Setting prohibited"]
8367        pub const _11: Self = Self::new(3);
8368    }
8369}
8370#[doc(hidden)]
8371#[derive(Copy, Clone, Eq, PartialEq)]
8372pub struct Physectrl_SPEC;
8373impl crate::sealed::RegSpec for Physectrl_SPEC {
8374    type DataType = u32;
8375}
8376
8377#[doc = "PHY Single-ended Receiver Control Register"]
8378pub type Physectrl = crate::RegValueT<Physectrl_SPEC>;
8379
8380impl Physectrl {
8381    #[doc = "Single-ended Receiver Enable"]
8382    #[inline(always)]
8383    pub fn cnen(
8384        self,
8385    ) -> crate::common::RegisterField<
8386        4,
8387        0x1,
8388        1,
8389        0,
8390        physectrl::Cnen,
8391        physectrl::Cnen,
8392        Physectrl_SPEC,
8393        crate::common::RW,
8394    > {
8395        crate::common::RegisterField::<
8396            4,
8397            0x1,
8398            1,
8399            0,
8400            physectrl::Cnen,
8401            physectrl::Cnen,
8402            Physectrl_SPEC,
8403            crate::common::RW,
8404        >::from_register(self, 0)
8405    }
8406}
8407impl ::core::default::Default for Physectrl {
8408    #[inline(always)]
8409    fn default() -> Physectrl {
8410        <crate::RegValueT<Physectrl_SPEC> as RegisterValue<_>>::new(0)
8411    }
8412}
8413pub mod physectrl {
8414
8415    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8416    pub struct Cnen_SPEC;
8417    pub type Cnen = crate::EnumBitfieldStruct<u8, Cnen_SPEC>;
8418    impl Cnen {
8419        #[doc = "Single-ended receiver operation is disabled"]
8420        pub const _0: Self = Self::new(0);
8421
8422        #[doc = "Single-ended receiver operation is enabled"]
8423        pub const _1: Self = Self::new(1);
8424    }
8425}
8426#[doc(hidden)]
8427#[derive(Copy, Clone, Eq, PartialEq)]
8428pub struct Dpusr0R_SPEC;
8429impl crate::sealed::RegSpec for Dpusr0R_SPEC {
8430    type DataType = u32;
8431}
8432
8433#[doc = "Deep Software Standby USB Transceiver Control/Pin Monitor Register"]
8434pub type Dpusr0R = crate::RegValueT<Dpusr0R_SPEC>;
8435
8436impl Dpusr0R {
8437    #[doc = "USB Single-ended Receiver Control"]
8438    #[inline(always)]
8439    pub fn srpc0(
8440        self,
8441    ) -> crate::common::RegisterField<
8442        0,
8443        0x1,
8444        1,
8445        0,
8446        dpusr0r::Srpc0,
8447        dpusr0r::Srpc0,
8448        Dpusr0R_SPEC,
8449        crate::common::RW,
8450    > {
8451        crate::common::RegisterField::<
8452            0,
8453            0x1,
8454            1,
8455            0,
8456            dpusr0r::Srpc0,
8457            dpusr0r::Srpc0,
8458            Dpusr0R_SPEC,
8459            crate::common::RW,
8460        >::from_register(self, 0)
8461    }
8462
8463    #[doc = "DP Pull-Up Resistor Control"]
8464    #[inline(always)]
8465    pub fn rpue0(
8466        self,
8467    ) -> crate::common::RegisterField<
8468        1,
8469        0x1,
8470        1,
8471        0,
8472        dpusr0r::Rpue0,
8473        dpusr0r::Rpue0,
8474        Dpusr0R_SPEC,
8475        crate::common::RW,
8476    > {
8477        crate::common::RegisterField::<
8478            1,
8479            0x1,
8480            1,
8481            0,
8482            dpusr0r::Rpue0,
8483            dpusr0r::Rpue0,
8484            Dpusr0R_SPEC,
8485            crate::common::RW,
8486        >::from_register(self, 0)
8487    }
8488
8489    #[doc = "D+/D- Pull-Down Resistor Control"]
8490    #[inline(always)]
8491    pub fn drpd0(
8492        self,
8493    ) -> crate::common::RegisterField<
8494        3,
8495        0x1,
8496        1,
8497        0,
8498        dpusr0r::Drpd0,
8499        dpusr0r::Drpd0,
8500        Dpusr0R_SPEC,
8501        crate::common::RW,
8502    > {
8503        crate::common::RegisterField::<
8504            3,
8505            0x1,
8506            1,
8507            0,
8508            dpusr0r::Drpd0,
8509            dpusr0r::Drpd0,
8510            Dpusr0R_SPEC,
8511            crate::common::RW,
8512        >::from_register(self, 0)
8513    }
8514
8515    #[doc = "USB Transceiver Output Fix"]
8516    #[inline(always)]
8517    pub fn fixphy0(
8518        self,
8519    ) -> crate::common::RegisterField<
8520        4,
8521        0x1,
8522        1,
8523        0,
8524        dpusr0r::Fixphy0,
8525        dpusr0r::Fixphy0,
8526        Dpusr0R_SPEC,
8527        crate::common::RW,
8528    > {
8529        crate::common::RegisterField::<
8530            4,
8531            0x1,
8532            1,
8533            0,
8534            dpusr0r::Fixphy0,
8535            dpusr0r::Fixphy0,
8536            Dpusr0R_SPEC,
8537            crate::common::RW,
8538        >::from_register(self, 0)
8539    }
8540
8541    #[doc = "USB D+ Input"]
8542    #[inline(always)]
8543    pub fn dp0(self) -> crate::common::RegisterFieldBool<16, 1, 0, Dpusr0R_SPEC, crate::common::R> {
8544        crate::common::RegisterFieldBool::<16, 1, 0, Dpusr0R_SPEC, crate::common::R>::from_register(
8545            self, 0,
8546        )
8547    }
8548
8549    #[doc = "USB D- Input"]
8550    #[inline(always)]
8551    pub fn dm0(self) -> crate::common::RegisterFieldBool<17, 1, 0, Dpusr0R_SPEC, crate::common::R> {
8552        crate::common::RegisterFieldBool::<17, 1, 0, Dpusr0R_SPEC, crate::common::R>::from_register(
8553            self, 0,
8554        )
8555    }
8556
8557    #[doc = "USB OVRCURA Input"]
8558    #[inline(always)]
8559    pub fn dovca0(
8560        self,
8561    ) -> crate::common::RegisterFieldBool<20, 1, 0, Dpusr0R_SPEC, crate::common::R> {
8562        crate::common::RegisterFieldBool::<20, 1, 0, Dpusr0R_SPEC, crate::common::R>::from_register(
8563            self, 0,
8564        )
8565    }
8566
8567    #[doc = "USB VBUS Input"]
8568    #[inline(always)]
8569    pub fn dvbsts0(
8570        self,
8571    ) -> crate::common::RegisterFieldBool<23, 1, 0, Dpusr0R_SPEC, crate::common::R> {
8572        crate::common::RegisterFieldBool::<23, 1, 0, Dpusr0R_SPEC, crate::common::R>::from_register(
8573            self, 0,
8574        )
8575    }
8576}
8577impl ::core::default::Default for Dpusr0R {
8578    #[inline(always)]
8579    fn default() -> Dpusr0R {
8580        <crate::RegValueT<Dpusr0R_SPEC> as RegisterValue<_>>::new(0)
8581    }
8582}
8583pub mod dpusr0r {
8584
8585    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8586    pub struct Srpc0_SPEC;
8587    pub type Srpc0 = crate::EnumBitfieldStruct<u8, Srpc0_SPEC>;
8588    impl Srpc0 {
8589        #[doc = "Disable input through DP and DM inputs"]
8590        pub const _0: Self = Self::new(0);
8591
8592        #[doc = "Enable input through DP and DM inputs"]
8593        pub const _1: Self = Self::new(1);
8594    }
8595    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8596    pub struct Rpue0_SPEC;
8597    pub type Rpue0 = crate::EnumBitfieldStruct<u8, Rpue0_SPEC>;
8598    impl Rpue0 {
8599        #[doc = "Disable DP pull-up resistor"]
8600        pub const _0: Self = Self::new(0);
8601
8602        #[doc = "Enable DP pull-up resistor"]
8603        pub const _1: Self = Self::new(1);
8604    }
8605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8606    pub struct Drpd0_SPEC;
8607    pub type Drpd0 = crate::EnumBitfieldStruct<u8, Drpd0_SPEC>;
8608    impl Drpd0 {
8609        #[doc = "Disable DP/DM pull-down resistor"]
8610        pub const _0: Self = Self::new(0);
8611
8612        #[doc = "Enable DP/DM pull-down resistor"]
8613        pub const _1: Self = Self::new(1);
8614    }
8615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8616    pub struct Fixphy0_SPEC;
8617    pub type Fixphy0 = crate::EnumBitfieldStruct<u8, Fixphy0_SPEC>;
8618    impl Fixphy0 {
8619        #[doc = "Fix outputs in Normal mode and on return from Deep Software Standby mode"]
8620        pub const _0: Self = Self::new(0);
8621
8622        #[doc = "Fix outputs on transition to Deep Software Standby mode"]
8623        pub const _1: Self = Self::new(1);
8624    }
8625}
8626#[doc(hidden)]
8627#[derive(Copy, Clone, Eq, PartialEq)]
8628pub struct Dpusr1R_SPEC;
8629impl crate::sealed::RegSpec for Dpusr1R_SPEC {
8630    type DataType = u32;
8631}
8632
8633#[doc = "Deep Software Standby USB Suspend/Resume Interrupt Register"]
8634pub type Dpusr1R = crate::RegValueT<Dpusr1R_SPEC>;
8635
8636impl Dpusr1R {
8637    #[doc = "USB DP Interrupt Enable/Clear"]
8638    #[inline(always)]
8639    pub fn dpinte0(
8640        self,
8641    ) -> crate::common::RegisterField<
8642        0,
8643        0x1,
8644        1,
8645        0,
8646        dpusr1r::Dpinte0,
8647        dpusr1r::Dpinte0,
8648        Dpusr1R_SPEC,
8649        crate::common::RW,
8650    > {
8651        crate::common::RegisterField::<
8652            0,
8653            0x1,
8654            1,
8655            0,
8656            dpusr1r::Dpinte0,
8657            dpusr1r::Dpinte0,
8658            Dpusr1R_SPEC,
8659            crate::common::RW,
8660        >::from_register(self, 0)
8661    }
8662
8663    #[doc = "USB DM Interrupt Enable/Clear"]
8664    #[inline(always)]
8665    pub fn dminte0(
8666        self,
8667    ) -> crate::common::RegisterField<
8668        1,
8669        0x1,
8670        1,
8671        0,
8672        dpusr1r::Dminte0,
8673        dpusr1r::Dminte0,
8674        Dpusr1R_SPEC,
8675        crate::common::RW,
8676    > {
8677        crate::common::RegisterField::<
8678            1,
8679            0x1,
8680            1,
8681            0,
8682            dpusr1r::Dminte0,
8683            dpusr1r::Dminte0,
8684            Dpusr1R_SPEC,
8685            crate::common::RW,
8686        >::from_register(self, 0)
8687    }
8688
8689    #[doc = "USB OVRCURA Interrupt Enable/Clear"]
8690    #[inline(always)]
8691    pub fn dovrcrae0(
8692        self,
8693    ) -> crate::common::RegisterField<
8694        4,
8695        0x1,
8696        1,
8697        0,
8698        dpusr1r::Dovrcrae0,
8699        dpusr1r::Dovrcrae0,
8700        Dpusr1R_SPEC,
8701        crate::common::RW,
8702    > {
8703        crate::common::RegisterField::<
8704            4,
8705            0x1,
8706            1,
8707            0,
8708            dpusr1r::Dovrcrae0,
8709            dpusr1r::Dovrcrae0,
8710            Dpusr1R_SPEC,
8711            crate::common::RW,
8712        >::from_register(self, 0)
8713    }
8714
8715    #[doc = "USB VBUS Interrupt Enable/Clear"]
8716    #[inline(always)]
8717    pub fn dvbse0(
8718        self,
8719    ) -> crate::common::RegisterField<
8720        7,
8721        0x1,
8722        1,
8723        0,
8724        dpusr1r::Dvbse0,
8725        dpusr1r::Dvbse0,
8726        Dpusr1R_SPEC,
8727        crate::common::RW,
8728    > {
8729        crate::common::RegisterField::<
8730            7,
8731            0x1,
8732            1,
8733            0,
8734            dpusr1r::Dvbse0,
8735            dpusr1r::Dvbse0,
8736            Dpusr1R_SPEC,
8737            crate::common::RW,
8738        >::from_register(self, 0)
8739    }
8740
8741    #[doc = "USB DP Interrupt Source Recovery"]
8742    #[inline(always)]
8743    pub fn dpint0(
8744        self,
8745    ) -> crate::common::RegisterField<
8746        16,
8747        0x1,
8748        1,
8749        0,
8750        dpusr1r::Dpint0,
8751        dpusr1r::Dpint0,
8752        Dpusr1R_SPEC,
8753        crate::common::R,
8754    > {
8755        crate::common::RegisterField::<
8756            16,
8757            0x1,
8758            1,
8759            0,
8760            dpusr1r::Dpint0,
8761            dpusr1r::Dpint0,
8762            Dpusr1R_SPEC,
8763            crate::common::R,
8764        >::from_register(self, 0)
8765    }
8766
8767    #[doc = "USB DM Interrupt Source Recovery"]
8768    #[inline(always)]
8769    pub fn dmint0(
8770        self,
8771    ) -> crate::common::RegisterField<
8772        17,
8773        0x1,
8774        1,
8775        0,
8776        dpusr1r::Dmint0,
8777        dpusr1r::Dmint0,
8778        Dpusr1R_SPEC,
8779        crate::common::R,
8780    > {
8781        crate::common::RegisterField::<
8782            17,
8783            0x1,
8784            1,
8785            0,
8786            dpusr1r::Dmint0,
8787            dpusr1r::Dmint0,
8788            Dpusr1R_SPEC,
8789            crate::common::R,
8790        >::from_register(self, 0)
8791    }
8792
8793    #[doc = "USB OVRCURA Interrupt Source Recovery"]
8794    #[inline(always)]
8795    pub fn dovrcra0(
8796        self,
8797    ) -> crate::common::RegisterField<
8798        20,
8799        0x1,
8800        1,
8801        0,
8802        dpusr1r::Dovrcra0,
8803        dpusr1r::Dovrcra0,
8804        Dpusr1R_SPEC,
8805        crate::common::R,
8806    > {
8807        crate::common::RegisterField::<
8808            20,
8809            0x1,
8810            1,
8811            0,
8812            dpusr1r::Dovrcra0,
8813            dpusr1r::Dovrcra0,
8814            Dpusr1R_SPEC,
8815            crate::common::R,
8816        >::from_register(self, 0)
8817    }
8818
8819    #[doc = "USB VBUS Interrupt Source Recovery"]
8820    #[inline(always)]
8821    pub fn dvbint0(
8822        self,
8823    ) -> crate::common::RegisterField<
8824        23,
8825        0x1,
8826        1,
8827        0,
8828        dpusr1r::Dvbint0,
8829        dpusr1r::Dvbint0,
8830        Dpusr1R_SPEC,
8831        crate::common::R,
8832    > {
8833        crate::common::RegisterField::<
8834            23,
8835            0x1,
8836            1,
8837            0,
8838            dpusr1r::Dvbint0,
8839            dpusr1r::Dvbint0,
8840            Dpusr1R_SPEC,
8841            crate::common::R,
8842        >::from_register(self, 0)
8843    }
8844}
8845impl ::core::default::Default for Dpusr1R {
8846    #[inline(always)]
8847    fn default() -> Dpusr1R {
8848        <crate::RegValueT<Dpusr1R_SPEC> as RegisterValue<_>>::new(0)
8849    }
8850}
8851pub mod dpusr1r {
8852
8853    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8854    pub struct Dpinte0_SPEC;
8855    pub type Dpinte0 = crate::EnumBitfieldStruct<u8, Dpinte0_SPEC>;
8856    impl Dpinte0 {
8857        #[doc = "Disable recovery from Deep Software Standby mode by DP input"]
8858        pub const _0: Self = Self::new(0);
8859
8860        #[doc = "Enable recovery from Deep Software Standby mode by DP input"]
8861        pub const _1: Self = Self::new(1);
8862    }
8863    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8864    pub struct Dminte0_SPEC;
8865    pub type Dminte0 = crate::EnumBitfieldStruct<u8, Dminte0_SPEC>;
8866    impl Dminte0 {
8867        #[doc = "Disable recovery from Deep Software Standby mode by DM input"]
8868        pub const _0: Self = Self::new(0);
8869
8870        #[doc = "Enable recovery from Deep Software Standby mode by DM input"]
8871        pub const _1: Self = Self::new(1);
8872    }
8873    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8874    pub struct Dovrcrae0_SPEC;
8875    pub type Dovrcrae0 = crate::EnumBitfieldStruct<u8, Dovrcrae0_SPEC>;
8876    impl Dovrcrae0 {
8877        #[doc = "Disable recovery from Deep Software Standby mode by OVRCURA input"]
8878        pub const _0: Self = Self::new(0);
8879
8880        #[doc = "Enable recovery from Deep Software Standby mode by OVRCURA input"]
8881        pub const _1: Self = Self::new(1);
8882    }
8883    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8884    pub struct Dvbse0_SPEC;
8885    pub type Dvbse0 = crate::EnumBitfieldStruct<u8, Dvbse0_SPEC>;
8886    impl Dvbse0 {
8887        #[doc = "Disable recovery from Deep Software Standby mode by VBUS input"]
8888        pub const _0: Self = Self::new(0);
8889
8890        #[doc = "Enable recovery from Deep Software Standby mode by VBUS input"]
8891        pub const _1: Self = Self::new(1);
8892    }
8893    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8894    pub struct Dpint0_SPEC;
8895    pub type Dpint0 = crate::EnumBitfieldStruct<u8, Dpint0_SPEC>;
8896    impl Dpint0 {
8897        #[doc = "System has not recovered from Deep Software Standby mode"]
8898        pub const _0: Self = Self::new(0);
8899
8900        #[doc = "System recovered from Deep Software Standby mode because of DP"]
8901        pub const _1: Self = Self::new(1);
8902    }
8903    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8904    pub struct Dmint0_SPEC;
8905    pub type Dmint0 = crate::EnumBitfieldStruct<u8, Dmint0_SPEC>;
8906    impl Dmint0 {
8907        #[doc = "System has not recovered from Deep Software Standby mode"]
8908        pub const _0: Self = Self::new(0);
8909
8910        #[doc = "System recovered from Deep Software Standby mode because of DM input"]
8911        pub const _1: Self = Self::new(1);
8912    }
8913    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8914    pub struct Dovrcra0_SPEC;
8915    pub type Dovrcra0 = crate::EnumBitfieldStruct<u8, Dovrcra0_SPEC>;
8916    impl Dovrcra0 {
8917        #[doc = "System has not recovered from Deep Software Standby mode"]
8918        pub const _0: Self = Self::new(0);
8919
8920        #[doc = "System recovered from Deep Software Standby mode because of OVRCURA input"]
8921        pub const _1: Self = Self::new(1);
8922    }
8923    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8924    pub struct Dvbint0_SPEC;
8925    pub type Dvbint0 = crate::EnumBitfieldStruct<u8, Dvbint0_SPEC>;
8926    impl Dvbint0 {
8927        #[doc = "System has not recovered from Deep Software Standby mode"]
8928        pub const _0: Self = Self::new(0);
8929
8930        #[doc = "System recovered from Deep Software Standby mode because of VBUS input"]
8931        pub const _1: Self = Self::new(1);
8932    }
8933}