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ra4e1_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.20.00, with svd2pac 0.6.1 on Sun, 15 Mar 2026 07:04:18 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "System Clock Division Control Register"]
48    #[inline(always)]
49    pub const fn sckdivcr(
50        &self,
51    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(32usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Source Control Register"]
60    #[inline(always)]
61    pub const fn sckscr(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(38usize),
67            )
68        }
69    }
70
71    #[doc = "PLL Clock Control Register"]
72    #[inline(always)]
73    pub const fn pllccr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(40usize),
79            )
80        }
81    }
82
83    #[doc = "PLL Control Register"]
84    #[inline(always)]
85    pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
86        unsafe {
87            crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
88                self._svd2pac_as_ptr().add(42usize),
89            )
90        }
91    }
92
93    #[doc = "Main Clock Oscillator Control Register"]
94    #[inline(always)]
95    pub const fn mosccr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(50usize),
101            )
102        }
103    }
104
105    #[doc = "High-Speed On-Chip Oscillator Control Register"]
106    #[inline(always)]
107    pub const fn hococr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(54usize),
113            )
114        }
115    }
116
117    #[doc = "High-Speed On-Chip Oscillator Control Register 2"]
118    #[inline(always)]
119    pub const fn hococr2(
120        &self,
121    ) -> &'static crate::common::Reg<self::Hococr2_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Hococr2_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(55usize),
125            )
126        }
127    }
128
129    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
130    #[inline(always)]
131    pub const fn mococr(
132        &self,
133    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
134        unsafe {
135            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
136                self._svd2pac_as_ptr().add(56usize),
137            )
138        }
139    }
140
141    #[doc = "FLL Control Register 1"]
142    #[inline(always)]
143    pub const fn fllcr1(
144        &self,
145    ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
146        unsafe {
147            crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
148                self._svd2pac_as_ptr().add(57usize),
149            )
150        }
151    }
152
153    #[doc = "FLL Control Register 2"]
154    #[inline(always)]
155    pub const fn fllcr2(
156        &self,
157    ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
158        unsafe {
159            crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
160                self._svd2pac_as_ptr().add(58usize),
161            )
162        }
163    }
164
165    #[doc = "Oscillation Stabilization Flag Register"]
166    #[inline(always)]
167    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
168        unsafe {
169            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
170                self._svd2pac_as_ptr().add(60usize),
171            )
172        }
173    }
174
175    #[doc = "Clock Out Control Register"]
176    #[inline(always)]
177    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
178        unsafe {
179            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
180                self._svd2pac_as_ptr().add(62usize),
181            )
182        }
183    }
184
185    #[doc = "Trace Clock Control Register"]
186    #[inline(always)]
187    pub const fn trckcr(
188        &self,
189    ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
190        unsafe {
191            crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
192                self._svd2pac_as_ptr().add(63usize),
193            )
194        }
195    }
196
197    #[doc = "Oscillation Stop Detection Control Register"]
198    #[inline(always)]
199    pub const fn ostdcr(
200        &self,
201    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(64usize),
205            )
206        }
207    }
208
209    #[doc = "Oscillation Stop Detection Status Register"]
210    #[inline(always)]
211    pub const fn ostdsr(
212        &self,
213    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
214        unsafe {
215            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
216                self._svd2pac_as_ptr().add(65usize),
217            )
218        }
219    }
220
221    #[doc = "PLL2 Clock Control Register"]
222    #[inline(always)]
223    pub const fn pll2ccr(
224        &self,
225    ) -> &'static crate::common::Reg<self::Pll2Ccr_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Pll2Ccr_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(72usize),
229            )
230        }
231    }
232
233    #[doc = "PLL2 Control Register"]
234    #[inline(always)]
235    pub const fn pll2cr(
236        &self,
237    ) -> &'static crate::common::Reg<self::Pll2Cr_SPEC, crate::common::RW> {
238        unsafe {
239            crate::common::Reg::<self::Pll2Cr_SPEC, crate::common::RW>::from_ptr(
240                self._svd2pac_as_ptr().add(74usize),
241            )
242        }
243    }
244
245    #[doc = "MOCO User Trimming Control Register"]
246    #[inline(always)]
247    pub const fn mocoutcr(
248        &self,
249    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
250        unsafe {
251            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
252                self._svd2pac_as_ptr().add(97usize),
253            )
254        }
255    }
256
257    #[doc = "HOCO User Trimming Control Register"]
258    #[inline(always)]
259    pub const fn hocoutcr(
260        &self,
261    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
262        unsafe {
263            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
264                self._svd2pac_as_ptr().add(98usize),
265            )
266        }
267    }
268
269    #[doc = "USB Clock Division Control Register"]
270    #[inline(always)]
271    pub const fn usbckdivcr(
272        &self,
273    ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
274        unsafe {
275            crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
276                self._svd2pac_as_ptr().add(108usize),
277            )
278        }
279    }
280
281    #[doc = "USB Clock Control Register"]
282    #[inline(always)]
283    pub const fn usbckcr(
284        &self,
285    ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
286        unsafe {
287            crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
288                self._svd2pac_as_ptr().add(116usize),
289            )
290        }
291    }
292
293    #[doc = "Snooze Request Control Register 1"]
294    #[inline(always)]
295    pub const fn snzreqcr1(
296        &self,
297    ) -> &'static crate::common::Reg<self::Snzreqcr1_SPEC, crate::common::RW> {
298        unsafe {
299            crate::common::Reg::<self::Snzreqcr1_SPEC, crate::common::RW>::from_ptr(
300                self._svd2pac_as_ptr().add(136usize),
301            )
302        }
303    }
304
305    #[doc = "Snooze Control Register"]
306    #[inline(always)]
307    pub const fn snzcr(&self) -> &'static crate::common::Reg<self::Snzcr_SPEC, crate::common::RW> {
308        unsafe {
309            crate::common::Reg::<self::Snzcr_SPEC, crate::common::RW>::from_ptr(
310                self._svd2pac_as_ptr().add(146usize),
311            )
312        }
313    }
314
315    #[doc = "Snooze End Control Register 0"]
316    #[inline(always)]
317    pub const fn snzedcr0(
318        &self,
319    ) -> &'static crate::common::Reg<self::Snzedcr0_SPEC, crate::common::RW> {
320        unsafe {
321            crate::common::Reg::<self::Snzedcr0_SPEC, crate::common::RW>::from_ptr(
322                self._svd2pac_as_ptr().add(148usize),
323            )
324        }
325    }
326
327    #[doc = "Snooze End Control Register 1"]
328    #[inline(always)]
329    pub const fn snzedcr1(
330        &self,
331    ) -> &'static crate::common::Reg<self::Snzedcr1_SPEC, crate::common::RW> {
332        unsafe {
333            crate::common::Reg::<self::Snzedcr1_SPEC, crate::common::RW>::from_ptr(
334                self._svd2pac_as_ptr().add(149usize),
335            )
336        }
337    }
338
339    #[doc = "Snooze Request Control Register 0"]
340    #[inline(always)]
341    pub const fn snzreqcr0(
342        &self,
343    ) -> &'static crate::common::Reg<self::Snzreqcr0_SPEC, crate::common::RW> {
344        unsafe {
345            crate::common::Reg::<self::Snzreqcr0_SPEC, crate::common::RW>::from_ptr(
346                self._svd2pac_as_ptr().add(152usize),
347            )
348        }
349    }
350
351    #[doc = "Operating Power Control Register"]
352    #[inline(always)]
353    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
354        unsafe {
355            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
356                self._svd2pac_as_ptr().add(160usize),
357            )
358        }
359    }
360
361    #[doc = "Main Clock Oscillator Wait Control Register"]
362    #[inline(always)]
363    pub const fn moscwtcr(
364        &self,
365    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
366        unsafe {
367            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
368                self._svd2pac_as_ptr().add(162usize),
369            )
370        }
371    }
372
373    #[doc = "Sub Operating Power Control Register"]
374    #[inline(always)]
375    pub const fn sopccr(
376        &self,
377    ) -> &'static crate::common::Reg<self::Sopccr_SPEC, crate::common::RW> {
378        unsafe {
379            crate::common::Reg::<self::Sopccr_SPEC, crate::common::RW>::from_ptr(
380                self._svd2pac_as_ptr().add(170usize),
381            )
382        }
383    }
384
385    #[doc = "Reset Status Register 1"]
386    #[inline(always)]
387    pub const fn rstsr1(
388        &self,
389    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
390        unsafe {
391            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
392                self._svd2pac_as_ptr().add(192usize),
393            )
394        }
395    }
396
397    #[doc = "Voltage Monitor 1 Circuit Control Register 1"]
398    #[inline(always)]
399    pub const fn lvd1cr1(
400        &self,
401    ) -> &'static crate::common::Reg<self::Lvd1Cr1_SPEC, crate::common::RW> {
402        unsafe {
403            crate::common::Reg::<self::Lvd1Cr1_SPEC, crate::common::RW>::from_ptr(
404                self._svd2pac_as_ptr().add(224usize),
405            )
406        }
407    }
408
409    #[doc = "Voltage Monitor 1 Circuit Status Register"]
410    #[inline(always)]
411    pub const fn lvd1sr(
412        &self,
413    ) -> &'static crate::common::Reg<self::Lvd1Sr_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Lvd1Sr_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(225usize),
417            )
418        }
419    }
420
421    #[doc = "Voltage Monitor 2 Circuit Control Register 1"]
422    #[inline(always)]
423    pub const fn lvd2cr1(
424        &self,
425    ) -> &'static crate::common::Reg<self::Lvd2Cr1_SPEC, crate::common::RW> {
426        unsafe {
427            crate::common::Reg::<self::Lvd2Cr1_SPEC, crate::common::RW>::from_ptr(
428                self._svd2pac_as_ptr().add(226usize),
429            )
430        }
431    }
432
433    #[doc = "Voltage Monitor 2 Circuit Status Register"]
434    #[inline(always)]
435    pub const fn lvd2sr(
436        &self,
437    ) -> &'static crate::common::Reg<self::Lvd2Sr_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Lvd2Sr_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(227usize),
441            )
442        }
443    }
444
445    #[doc = "Clock Generation Function Security Attribute Register"]
446    #[inline(always)]
447    pub const fn cgfsar(
448        &self,
449    ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
450        unsafe {
451            crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
452                self._svd2pac_as_ptr().add(960usize),
453            )
454        }
455    }
456
457    #[doc = "Reset Security Attribution Register"]
458    #[inline(always)]
459    pub const fn rstsar(
460        &self,
461    ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
462        unsafe {
463            crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
464                self._svd2pac_as_ptr().add(964usize),
465            )
466        }
467    }
468
469    #[doc = "Low Power Mode Security Attribution Register"]
470    #[inline(always)]
471    pub const fn lpmsar(
472        &self,
473    ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
474        unsafe {
475            crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
476                self._svd2pac_as_ptr().add(968usize),
477            )
478        }
479    }
480
481    #[doc = "Low Voltage Detection Security Attribution Register"]
482    #[inline(always)]
483    pub const fn lvdsar(
484        &self,
485    ) -> &'static crate::common::Reg<self::Lvdsar_SPEC, crate::common::RW> {
486        unsafe {
487            crate::common::Reg::<self::Lvdsar_SPEC, crate::common::RW>::from_ptr(
488                self._svd2pac_as_ptr().add(972usize),
489            )
490        }
491    }
492
493    #[doc = "Battery Backup Function Security Attribute Register"]
494    #[inline(always)]
495    pub const fn bbfsar(
496        &self,
497    ) -> &'static crate::common::Reg<self::Bbfsar_SPEC, crate::common::RW> {
498        unsafe {
499            crate::common::Reg::<self::Bbfsar_SPEC, crate::common::RW>::from_ptr(
500                self._svd2pac_as_ptr().add(976usize),
501            )
502        }
503    }
504
505    #[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
506    #[inline(always)]
507    pub const fn dpfsar(
508        &self,
509    ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
510        unsafe {
511            crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
512                self._svd2pac_as_ptr().add(992usize),
513            )
514        }
515    }
516
517    #[doc = "Protect Register"]
518    #[inline(always)]
519    pub const fn prcr(&self) -> &'static crate::common::Reg<self::Prcr_SPEC, crate::common::RW> {
520        unsafe {
521            crate::common::Reg::<self::Prcr_SPEC, crate::common::RW>::from_ptr(
522                self._svd2pac_as_ptr().add(1022usize),
523            )
524        }
525    }
526
527    #[doc = "Deep Software Standby Control Register"]
528    #[inline(always)]
529    pub const fn dpsbycr(
530        &self,
531    ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
532        unsafe {
533            crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
534                self._svd2pac_as_ptr().add(1024usize),
535            )
536        }
537    }
538
539    #[doc = "Deep Software Standby Wait Control Register"]
540    #[inline(always)]
541    pub const fn dpswcr(
542        &self,
543    ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
544        unsafe {
545            crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
546                self._svd2pac_as_ptr().add(1025usize),
547            )
548        }
549    }
550
551    #[doc = "Deep Software Standby Interrupt Enable Register 0"]
552    #[inline(always)]
553    pub const fn dpsier0(
554        &self,
555    ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
556        unsafe {
557            crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
558                self._svd2pac_as_ptr().add(1026usize),
559            )
560        }
561    }
562
563    #[doc = "Deep Software Standby Interrupt Enable Register 1"]
564    #[inline(always)]
565    pub const fn dpsier1(
566        &self,
567    ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
568        unsafe {
569            crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
570                self._svd2pac_as_ptr().add(1027usize),
571            )
572        }
573    }
574
575    #[doc = "Deep Software Standby Interrupt Enable Register 2"]
576    #[inline(always)]
577    pub const fn dpsier2(
578        &self,
579    ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
580        unsafe {
581            crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
582                self._svd2pac_as_ptr().add(1028usize),
583            )
584        }
585    }
586
587    #[doc = "Deep Software Standby Interrupt Enable Register 3"]
588    #[inline(always)]
589    pub const fn dpsier3(
590        &self,
591    ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
592        unsafe {
593            crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
594                self._svd2pac_as_ptr().add(1029usize),
595            )
596        }
597    }
598
599    #[doc = "Deep Software Standby Interrupt Flag Register 0"]
600    #[inline(always)]
601    pub const fn dpsifr0(
602        &self,
603    ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
604        unsafe {
605            crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
606                self._svd2pac_as_ptr().add(1030usize),
607            )
608        }
609    }
610
611    #[doc = "Deep Software Standby Interrupt Flag Register 1"]
612    #[inline(always)]
613    pub const fn dpsifr1(
614        &self,
615    ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
616        unsafe {
617            crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
618                self._svd2pac_as_ptr().add(1031usize),
619            )
620        }
621    }
622
623    #[doc = "Deep Software Standby Interrupt Flag Register 2"]
624    #[inline(always)]
625    pub const fn dpsifr2(
626        &self,
627    ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
628        unsafe {
629            crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
630                self._svd2pac_as_ptr().add(1032usize),
631            )
632        }
633    }
634
635    #[doc = "Deep Software Standby Interrupt Flag Register 3"]
636    #[inline(always)]
637    pub const fn dpsifr3(
638        &self,
639    ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
640        unsafe {
641            crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
642                self._svd2pac_as_ptr().add(1033usize),
643            )
644        }
645    }
646
647    #[doc = "Deep Software Standby Interrupt Edge Register 0"]
648    #[inline(always)]
649    pub const fn dpsiegr0(
650        &self,
651    ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
652        unsafe {
653            crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
654                self._svd2pac_as_ptr().add(1034usize),
655            )
656        }
657    }
658
659    #[doc = "Deep Software Standby Interrupt Edge Register 1"]
660    #[inline(always)]
661    pub const fn dpsiegr1(
662        &self,
663    ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
664        unsafe {
665            crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
666                self._svd2pac_as_ptr().add(1035usize),
667            )
668        }
669    }
670
671    #[doc = "Deep Software Standby Interrupt Edge Register 2"]
672    #[inline(always)]
673    pub const fn dpsiegr2(
674        &self,
675    ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
676        unsafe {
677            crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
678                self._svd2pac_as_ptr().add(1036usize),
679            )
680        }
681    }
682
683    #[doc = "System Control OCD Control Register"]
684    #[inline(always)]
685    pub const fn syocdcr(
686        &self,
687    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
688        unsafe {
689            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
690                self._svd2pac_as_ptr().add(1038usize),
691            )
692        }
693    }
694
695    #[doc = "Reset Status Register 0"]
696    #[inline(always)]
697    pub const fn rstsr0(
698        &self,
699    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
700        unsafe {
701            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
702                self._svd2pac_as_ptr().add(1040usize),
703            )
704        }
705    }
706
707    #[doc = "Reset Status Register 2"]
708    #[inline(always)]
709    pub const fn rstsr2(
710        &self,
711    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
712        unsafe {
713            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
714                self._svd2pac_as_ptr().add(1041usize),
715            )
716        }
717    }
718
719    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
720    #[inline(always)]
721    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
722        unsafe {
723            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
724                self._svd2pac_as_ptr().add(1043usize),
725            )
726        }
727    }
728
729    #[doc = "Flash P/E Protect Register"]
730    #[inline(always)]
731    pub const fn fwepror(
732        &self,
733    ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
734        unsafe {
735            crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
736                self._svd2pac_as_ptr().add(1046usize),
737            )
738        }
739    }
740
741    #[doc = "Voltage Monitoring 1 Comparator Control Register"]
742    #[inline(always)]
743    pub const fn lvd1cmpcr(
744        &self,
745    ) -> &'static crate::common::Reg<self::Lvd1Cmpcr_SPEC, crate::common::RW> {
746        unsafe {
747            crate::common::Reg::<self::Lvd1Cmpcr_SPEC, crate::common::RW>::from_ptr(
748                self._svd2pac_as_ptr().add(1047usize),
749            )
750        }
751    }
752
753    #[doc = "Voltage Monitoring 2 Comparator Control Register"]
754    #[inline(always)]
755    pub const fn lvd2cmpcr(
756        &self,
757    ) -> &'static crate::common::Reg<self::Lvd2Cmpcr_SPEC, crate::common::RW> {
758        unsafe {
759            crate::common::Reg::<self::Lvd2Cmpcr_SPEC, crate::common::RW>::from_ptr(
760                self._svd2pac_as_ptr().add(1048usize),
761            )
762        }
763    }
764
765    #[doc = "Voltage Monitor 1 Circuit Control Register 0"]
766    #[inline(always)]
767    pub const fn lvd1cr0(
768        &self,
769    ) -> &'static crate::common::Reg<self::Lvd1Cr0_SPEC, crate::common::RW> {
770        unsafe {
771            crate::common::Reg::<self::Lvd1Cr0_SPEC, crate::common::RW>::from_ptr(
772                self._svd2pac_as_ptr().add(1050usize),
773            )
774        }
775    }
776
777    #[doc = "Voltage Monitor 2 Circuit Control Register 0"]
778    #[inline(always)]
779    pub const fn lvd2cr0(
780        &self,
781    ) -> &'static crate::common::Reg<self::Lvd2Cr0_SPEC, crate::common::RW> {
782        unsafe {
783            crate::common::Reg::<self::Lvd2Cr0_SPEC, crate::common::RW>::from_ptr(
784                self._svd2pac_as_ptr().add(1051usize),
785            )
786        }
787    }
788
789    #[doc = "Battery Backup Voltage Monitor Function Select Register"]
790    #[inline(always)]
791    pub const fn vbattmnselr(
792        &self,
793    ) -> &'static crate::common::Reg<self::Vbattmnselr_SPEC, crate::common::RW> {
794        unsafe {
795            crate::common::Reg::<self::Vbattmnselr_SPEC, crate::common::RW>::from_ptr(
796                self._svd2pac_as_ptr().add(1053usize),
797            )
798        }
799    }
800
801    #[doc = "Battery Backup Voltage Monitor Register"]
802    #[inline(always)]
803    pub const fn vbattmonr(
804        &self,
805    ) -> &'static crate::common::Reg<self::Vbattmonr_SPEC, crate::common::R> {
806        unsafe {
807            crate::common::Reg::<self::Vbattmonr_SPEC, crate::common::R>::from_ptr(
808                self._svd2pac_as_ptr().add(1054usize),
809            )
810        }
811    }
812
813    #[doc = "LDO Stop Control Register"]
814    #[inline(always)]
815    pub const fn ldoscr(
816        &self,
817    ) -> &'static crate::common::Reg<self::Ldoscr_SPEC, crate::common::RW> {
818        unsafe {
819            crate::common::Reg::<self::Ldoscr_SPEC, crate::common::RW>::from_ptr(
820                self._svd2pac_as_ptr().add(1088usize),
821            )
822        }
823    }
824
825    #[doc = "PLL2-LDO Stop Control Register"]
826    #[inline(always)]
827    pub const fn pl2ldoscr(
828        &self,
829    ) -> &'static crate::common::Reg<self::Pl2Ldoscr_SPEC, crate::common::RW> {
830        unsafe {
831            crate::common::Reg::<self::Pl2Ldoscr_SPEC, crate::common::RW>::from_ptr(
832                self._svd2pac_as_ptr().add(1092usize),
833            )
834        }
835    }
836
837    #[doc = "Sub-Clock Oscillator Control Register"]
838    #[inline(always)]
839    pub const fn sosccr(
840        &self,
841    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
842        unsafe {
843            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
844                self._svd2pac_as_ptr().add(1152usize),
845            )
846        }
847    }
848
849    #[doc = "Sub-Clock Oscillator Mode Control Register"]
850    #[inline(always)]
851    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
852        unsafe {
853            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
854                self._svd2pac_as_ptr().add(1153usize),
855            )
856        }
857    }
858
859    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
860    #[inline(always)]
861    pub const fn lococr(
862        &self,
863    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
864        unsafe {
865            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
866                self._svd2pac_as_ptr().add(1168usize),
867            )
868        }
869    }
870
871    #[doc = "LOCO User Trimming Control Register"]
872    #[inline(always)]
873    pub const fn locoutcr(
874        &self,
875    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
876        unsafe {
877            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
878                self._svd2pac_as_ptr().add(1170usize),
879            )
880        }
881    }
882
883    #[doc = "VBATT Input Control Register"]
884    #[inline(always)]
885    pub const fn vbtictlr(
886        &self,
887    ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
888        unsafe {
889            crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
890                self._svd2pac_as_ptr().add(1211usize),
891            )
892        }
893    }
894
895    #[doc = "VBATT Backup Enable Register"]
896    #[inline(always)]
897    pub const fn vbtber(
898        &self,
899    ) -> &'static crate::common::Reg<self::Vbtber_SPEC, crate::common::RW> {
900        unsafe {
901            crate::common::Reg::<self::Vbtber_SPEC, crate::common::RW>::from_ptr(
902                self._svd2pac_as_ptr().add(1216usize),
903            )
904        }
905    }
906
907    #[doc = "VBATT Backup Register"]
908    #[inline(always)]
909    pub const fn vbtbkr(
910        &self,
911    ) -> &'static crate::common::ClusterRegisterArray<
912        crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
913        128,
914        0x1,
915    > {
916        unsafe {
917            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x500usize))
918        }
919    }
920}
921#[doc(hidden)]
922#[derive(Copy, Clone, Eq, PartialEq)]
923pub struct Sbycr_SPEC;
924impl crate::sealed::RegSpec for Sbycr_SPEC {
925    type DataType = u16;
926}
927
928#[doc = "Standby Control Register"]
929pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
930
931impl Sbycr {
932    #[doc = "Software Standby Mode Select"]
933    #[inline(always)]
934    pub fn ssby(
935        self,
936    ) -> crate::common::RegisterField<
937        15,
938        0x1,
939        1,
940        0,
941        sbycr::Ssby,
942        sbycr::Ssby,
943        Sbycr_SPEC,
944        crate::common::RW,
945    > {
946        crate::common::RegisterField::<
947            15,
948            0x1,
949            1,
950            0,
951            sbycr::Ssby,
952            sbycr::Ssby,
953            Sbycr_SPEC,
954            crate::common::RW,
955        >::from_register(self, 0)
956    }
957}
958impl ::core::default::Default for Sbycr {
959    #[inline(always)]
960    fn default() -> Sbycr {
961        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(16384)
962    }
963}
964pub mod sbycr {
965
966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
967    pub struct Ssby_SPEC;
968    pub type Ssby = crate::EnumBitfieldStruct<u8, Ssby_SPEC>;
969    impl Ssby {
970        #[doc = "Sleep mode"]
971        pub const _0: Self = Self::new(0);
972
973        #[doc = "Software Standby mode."]
974        pub const _1: Self = Self::new(1);
975    }
976}
977#[doc(hidden)]
978#[derive(Copy, Clone, Eq, PartialEq)]
979pub struct Sckdivcr_SPEC;
980impl crate::sealed::RegSpec for Sckdivcr_SPEC {
981    type DataType = u32;
982}
983
984#[doc = "System Clock Division Control Register"]
985pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
986
987impl Sckdivcr {
988    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
989    #[inline(always)]
990    pub fn pckd(
991        self,
992    ) -> crate::common::RegisterField<
993        0,
994        0x7,
995        1,
996        0,
997        sckdivcr::Pckd,
998        sckdivcr::Pckd,
999        Sckdivcr_SPEC,
1000        crate::common::RW,
1001    > {
1002        crate::common::RegisterField::<
1003            0,
1004            0x7,
1005            1,
1006            0,
1007            sckdivcr::Pckd,
1008            sckdivcr::Pckd,
1009            Sckdivcr_SPEC,
1010            crate::common::RW,
1011        >::from_register(self, 0)
1012    }
1013
1014    #[doc = "Peripheral Module Clock C (PCLKC) Select"]
1015    #[inline(always)]
1016    pub fn pckc(
1017        self,
1018    ) -> crate::common::RegisterField<
1019        4,
1020        0x7,
1021        1,
1022        0,
1023        sckdivcr::Pckc,
1024        sckdivcr::Pckc,
1025        Sckdivcr_SPEC,
1026        crate::common::RW,
1027    > {
1028        crate::common::RegisterField::<
1029            4,
1030            0x7,
1031            1,
1032            0,
1033            sckdivcr::Pckc,
1034            sckdivcr::Pckc,
1035            Sckdivcr_SPEC,
1036            crate::common::RW,
1037        >::from_register(self, 0)
1038    }
1039
1040    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
1041    #[inline(always)]
1042    pub fn pckb(
1043        self,
1044    ) -> crate::common::RegisterField<
1045        8,
1046        0x7,
1047        1,
1048        0,
1049        sckdivcr::Pckb,
1050        sckdivcr::Pckb,
1051        Sckdivcr_SPEC,
1052        crate::common::RW,
1053    > {
1054        crate::common::RegisterField::<
1055            8,
1056            0x7,
1057            1,
1058            0,
1059            sckdivcr::Pckb,
1060            sckdivcr::Pckb,
1061            Sckdivcr_SPEC,
1062            crate::common::RW,
1063        >::from_register(self, 0)
1064    }
1065
1066    #[doc = "Peripheral Module Clock A (PCLKA) Select"]
1067    #[inline(always)]
1068    pub fn pcka(
1069        self,
1070    ) -> crate::common::RegisterField<
1071        12,
1072        0x7,
1073        1,
1074        0,
1075        sckdivcr::Pcka,
1076        sckdivcr::Pcka,
1077        Sckdivcr_SPEC,
1078        crate::common::RW,
1079    > {
1080        crate::common::RegisterField::<
1081            12,
1082            0x7,
1083            1,
1084            0,
1085            sckdivcr::Pcka,
1086            sckdivcr::Pcka,
1087            Sckdivcr_SPEC,
1088            crate::common::RW,
1089        >::from_register(self, 0)
1090    }
1091
1092    #[doc = "Reserved. Set these bits to the same value as PCKB\\[2:0\\]."]
1093    #[inline(always)]
1094    pub fn rsv(
1095        self,
1096    ) -> crate::common::RegisterField<
1097        16,
1098        0x7,
1099        1,
1100        0,
1101        sckdivcr::Rsv,
1102        sckdivcr::Rsv,
1103        Sckdivcr_SPEC,
1104        crate::common::RW,
1105    > {
1106        crate::common::RegisterField::<
1107            16,
1108            0x7,
1109            1,
1110            0,
1111            sckdivcr::Rsv,
1112            sckdivcr::Rsv,
1113            Sckdivcr_SPEC,
1114            crate::common::RW,
1115        >::from_register(self, 0)
1116    }
1117
1118    #[doc = "System Clock (ICLK) Select"]
1119    #[inline(always)]
1120    pub fn ick(
1121        self,
1122    ) -> crate::common::RegisterField<
1123        24,
1124        0x7,
1125        1,
1126        0,
1127        sckdivcr::Ick,
1128        sckdivcr::Ick,
1129        Sckdivcr_SPEC,
1130        crate::common::RW,
1131    > {
1132        crate::common::RegisterField::<
1133            24,
1134            0x7,
1135            1,
1136            0,
1137            sckdivcr::Ick,
1138            sckdivcr::Ick,
1139            Sckdivcr_SPEC,
1140            crate::common::RW,
1141        >::from_register(self, 0)
1142    }
1143
1144    #[doc = "FlashIF Clock (FCLK) Select"]
1145    #[inline(always)]
1146    pub fn fck(
1147        self,
1148    ) -> crate::common::RegisterField<
1149        28,
1150        0x7,
1151        1,
1152        0,
1153        sckdivcr::Fck,
1154        sckdivcr::Fck,
1155        Sckdivcr_SPEC,
1156        crate::common::RW,
1157    > {
1158        crate::common::RegisterField::<
1159            28,
1160            0x7,
1161            1,
1162            0,
1163            sckdivcr::Fck,
1164            sckdivcr::Fck,
1165            Sckdivcr_SPEC,
1166            crate::common::RW,
1167        >::from_register(self, 0)
1168    }
1169}
1170impl ::core::default::Default for Sckdivcr {
1171    #[inline(always)]
1172    fn default() -> Sckdivcr {
1173        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(570565154)
1174    }
1175}
1176pub mod sckdivcr {
1177
1178    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1179    pub struct Pckd_SPEC;
1180    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1181    impl Pckd {
1182        #[doc = "x 1/1"]
1183        pub const _000: Self = Self::new(0);
1184
1185        #[doc = "x 1/2"]
1186        pub const _001: Self = Self::new(1);
1187
1188        #[doc = "x 1/4"]
1189        pub const _010: Self = Self::new(2);
1190
1191        #[doc = "x 1/8"]
1192        pub const _011: Self = Self::new(3);
1193
1194        #[doc = "x 1/16"]
1195        pub const _100: Self = Self::new(4);
1196
1197        #[doc = "x 1/32"]
1198        pub const _101: Self = Self::new(5);
1199
1200        #[doc = "x 1/64"]
1201        pub const _110: Self = Self::new(6);
1202    }
1203    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1204    pub struct Pckc_SPEC;
1205    pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1206    impl Pckc {
1207        #[doc = "x 1/1"]
1208        pub const _000: Self = Self::new(0);
1209
1210        #[doc = "x 1/2"]
1211        pub const _001: Self = Self::new(1);
1212
1213        #[doc = "x 1/4"]
1214        pub const _010: Self = Self::new(2);
1215
1216        #[doc = "x 1/8"]
1217        pub const _011: Self = Self::new(3);
1218
1219        #[doc = "x 1/16"]
1220        pub const _100: Self = Self::new(4);
1221
1222        #[doc = "x 1/32"]
1223        pub const _101: Self = Self::new(5);
1224
1225        #[doc = "x 1/64"]
1226        pub const _110: Self = Self::new(6);
1227    }
1228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1229    pub struct Pckb_SPEC;
1230    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1231    impl Pckb {
1232        #[doc = "x 1/1"]
1233        pub const _000: Self = Self::new(0);
1234
1235        #[doc = "x 1/2"]
1236        pub const _001: Self = Self::new(1);
1237
1238        #[doc = "x 1/4"]
1239        pub const _010: Self = Self::new(2);
1240
1241        #[doc = "x 1/8"]
1242        pub const _011: Self = Self::new(3);
1243
1244        #[doc = "x 1/16"]
1245        pub const _100: Self = Self::new(4);
1246
1247        #[doc = "x 1/32"]
1248        pub const _101: Self = Self::new(5);
1249
1250        #[doc = "x 1/64"]
1251        pub const _110: Self = Self::new(6);
1252    }
1253    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1254    pub struct Pcka_SPEC;
1255    pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1256    impl Pcka {
1257        #[doc = "x 1/1"]
1258        pub const _000: Self = Self::new(0);
1259
1260        #[doc = "x 1/2"]
1261        pub const _001: Self = Self::new(1);
1262
1263        #[doc = "x 1/4"]
1264        pub const _010: Self = Self::new(2);
1265
1266        #[doc = "x 1/8"]
1267        pub const _011: Self = Self::new(3);
1268
1269        #[doc = "x 1/16"]
1270        pub const _100: Self = Self::new(4);
1271
1272        #[doc = "x 1/32"]
1273        pub const _101: Self = Self::new(5);
1274
1275        #[doc = "x 1/64"]
1276        pub const _110: Self = Self::new(6);
1277    }
1278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1279    pub struct Rsv_SPEC;
1280    pub type Rsv = crate::EnumBitfieldStruct<u8, Rsv_SPEC>;
1281    impl Rsv {
1282        #[doc = "x 1/1"]
1283        pub const _000: Self = Self::new(0);
1284
1285        #[doc = "x 1/2"]
1286        pub const _001: Self = Self::new(1);
1287
1288        #[doc = "x 1/4"]
1289        pub const _010: Self = Self::new(2);
1290
1291        #[doc = "x 1/8"]
1292        pub const _011: Self = Self::new(3);
1293
1294        #[doc = "x 1/16"]
1295        pub const _100: Self = Self::new(4);
1296
1297        #[doc = "x 1/32"]
1298        pub const _101: Self = Self::new(5);
1299
1300        #[doc = "x 1/64"]
1301        pub const _110: Self = Self::new(6);
1302    }
1303    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1304    pub struct Ick_SPEC;
1305    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1306    impl Ick {
1307        #[doc = "x 1/1"]
1308        pub const _000: Self = Self::new(0);
1309
1310        #[doc = "x 1/2"]
1311        pub const _001: Self = Self::new(1);
1312
1313        #[doc = "x 1/4"]
1314        pub const _010: Self = Self::new(2);
1315
1316        #[doc = "x 1/8"]
1317        pub const _011: Self = Self::new(3);
1318
1319        #[doc = "x 1/16"]
1320        pub const _100: Self = Self::new(4);
1321
1322        #[doc = "x 1/32"]
1323        pub const _101: Self = Self::new(5);
1324
1325        #[doc = "x 1/64"]
1326        pub const _110: Self = Self::new(6);
1327    }
1328    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1329    pub struct Fck_SPEC;
1330    pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1331    impl Fck {
1332        #[doc = "x 1/1"]
1333        pub const _000: Self = Self::new(0);
1334
1335        #[doc = "x 1/2"]
1336        pub const _001: Self = Self::new(1);
1337
1338        #[doc = "x 1/4"]
1339        pub const _010: Self = Self::new(2);
1340
1341        #[doc = "x 1/8"]
1342        pub const _011: Self = Self::new(3);
1343
1344        #[doc = "x 1/16"]
1345        pub const _100: Self = Self::new(4);
1346
1347        #[doc = "x 1/32"]
1348        pub const _101: Self = Self::new(5);
1349
1350        #[doc = "x 1/64"]
1351        pub const _110: Self = Self::new(6);
1352    }
1353}
1354#[doc(hidden)]
1355#[derive(Copy, Clone, Eq, PartialEq)]
1356pub struct Sckscr_SPEC;
1357impl crate::sealed::RegSpec for Sckscr_SPEC {
1358    type DataType = u8;
1359}
1360
1361#[doc = "System Clock Source Control Register"]
1362pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
1363
1364impl Sckscr {
1365    #[doc = "Clock Source Select"]
1366    #[inline(always)]
1367    pub fn cksel(
1368        self,
1369    ) -> crate::common::RegisterField<
1370        0,
1371        0x7,
1372        1,
1373        0,
1374        sckscr::Cksel,
1375        sckscr::Cksel,
1376        Sckscr_SPEC,
1377        crate::common::RW,
1378    > {
1379        crate::common::RegisterField::<
1380            0,
1381            0x7,
1382            1,
1383            0,
1384            sckscr::Cksel,
1385            sckscr::Cksel,
1386            Sckscr_SPEC,
1387            crate::common::RW,
1388        >::from_register(self, 0)
1389    }
1390}
1391impl ::core::default::Default for Sckscr {
1392    #[inline(always)]
1393    fn default() -> Sckscr {
1394        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
1395    }
1396}
1397pub mod sckscr {
1398
1399    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1400    pub struct Cksel_SPEC;
1401    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
1402    impl Cksel {
1403        #[doc = "HOCO"]
1404        pub const _000: Self = Self::new(0);
1405
1406        #[doc = "MOCO"]
1407        pub const _001: Self = Self::new(1);
1408
1409        #[doc = "LOCO"]
1410        pub const _010: Self = Self::new(2);
1411
1412        #[doc = "Main clock oscillator (MOSC)"]
1413        pub const _011: Self = Self::new(3);
1414
1415        #[doc = "Sub-clock oscillator (SOSC)"]
1416        pub const _100: Self = Self::new(4);
1417
1418        #[doc = "PLL"]
1419        pub const _101: Self = Self::new(5);
1420
1421        #[doc = "Setting prohibited"]
1422        pub const _110: Self = Self::new(6);
1423
1424        #[doc = "Setting prohibited"]
1425        pub const _111: Self = Self::new(7);
1426    }
1427}
1428#[doc(hidden)]
1429#[derive(Copy, Clone, Eq, PartialEq)]
1430pub struct Pllccr_SPEC;
1431impl crate::sealed::RegSpec for Pllccr_SPEC {
1432    type DataType = u16;
1433}
1434
1435#[doc = "PLL Clock Control Register"]
1436pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
1437
1438impl Pllccr {
1439    #[doc = "PLL Input Frequency Division Ratio Select"]
1440    #[inline(always)]
1441    pub fn plidiv(
1442        self,
1443    ) -> crate::common::RegisterField<
1444        0,
1445        0x3,
1446        1,
1447        0,
1448        pllccr::Plidiv,
1449        pllccr::Plidiv,
1450        Pllccr_SPEC,
1451        crate::common::RW,
1452    > {
1453        crate::common::RegisterField::<
1454            0,
1455            0x3,
1456            1,
1457            0,
1458            pllccr::Plidiv,
1459            pllccr::Plidiv,
1460            Pllccr_SPEC,
1461            crate::common::RW,
1462        >::from_register(self, 0)
1463    }
1464
1465    #[doc = "PLL Clock Source Select"]
1466    #[inline(always)]
1467    pub fn plsrcsel(
1468        self,
1469    ) -> crate::common::RegisterField<
1470        4,
1471        0x1,
1472        1,
1473        0,
1474        pllccr::Plsrcsel,
1475        pllccr::Plsrcsel,
1476        Pllccr_SPEC,
1477        crate::common::RW,
1478    > {
1479        crate::common::RegisterField::<
1480            4,
1481            0x1,
1482            1,
1483            0,
1484            pllccr::Plsrcsel,
1485            pllccr::Plsrcsel,
1486            Pllccr_SPEC,
1487            crate::common::RW,
1488        >::from_register(self, 0)
1489    }
1490
1491    #[doc = "PLL Frequency Multiplication Factor Select"]
1492    #[inline(always)]
1493    pub fn pllmul(
1494        self,
1495    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
1496        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
1497    }
1498}
1499impl ::core::default::Default for Pllccr {
1500    #[inline(always)]
1501    fn default() -> Pllccr {
1502        <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(4864)
1503    }
1504}
1505pub mod pllccr {
1506
1507    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1508    pub struct Plidiv_SPEC;
1509    pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
1510    impl Plidiv {
1511        #[doc = "/1"]
1512        pub const _00: Self = Self::new(0);
1513
1514        #[doc = "/2"]
1515        pub const _01: Self = Self::new(1);
1516
1517        #[doc = "/3"]
1518        pub const _10: Self = Self::new(2);
1519    }
1520    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1521    pub struct Plsrcsel_SPEC;
1522    pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
1523    impl Plsrcsel {
1524        #[doc = "Main clock oscillator"]
1525        pub const _0: Self = Self::new(0);
1526
1527        #[doc = "HOCO"]
1528        pub const _1: Self = Self::new(1);
1529    }
1530}
1531#[doc(hidden)]
1532#[derive(Copy, Clone, Eq, PartialEq)]
1533pub struct Pllcr_SPEC;
1534impl crate::sealed::RegSpec for Pllcr_SPEC {
1535    type DataType = u8;
1536}
1537
1538#[doc = "PLL Control Register"]
1539pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
1540
1541impl Pllcr {
1542    #[doc = "PLL Stop Control"]
1543    #[inline(always)]
1544    pub fn pllstp(
1545        self,
1546    ) -> crate::common::RegisterField<
1547        0,
1548        0x1,
1549        1,
1550        0,
1551        pllcr::Pllstp,
1552        pllcr::Pllstp,
1553        Pllcr_SPEC,
1554        crate::common::RW,
1555    > {
1556        crate::common::RegisterField::<
1557            0,
1558            0x1,
1559            1,
1560            0,
1561            pllcr::Pllstp,
1562            pllcr::Pllstp,
1563            Pllcr_SPEC,
1564            crate::common::RW,
1565        >::from_register(self, 0)
1566    }
1567}
1568impl ::core::default::Default for Pllcr {
1569    #[inline(always)]
1570    fn default() -> Pllcr {
1571        <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
1572    }
1573}
1574pub mod pllcr {
1575
1576    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1577    pub struct Pllstp_SPEC;
1578    pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
1579    impl Pllstp {
1580        #[doc = "PLL is operating"]
1581        pub const _0: Self = Self::new(0);
1582
1583        #[doc = "PLL is stopped."]
1584        pub const _1: Self = Self::new(1);
1585    }
1586}
1587#[doc(hidden)]
1588#[derive(Copy, Clone, Eq, PartialEq)]
1589pub struct Mosccr_SPEC;
1590impl crate::sealed::RegSpec for Mosccr_SPEC {
1591    type DataType = u8;
1592}
1593
1594#[doc = "Main Clock Oscillator Control Register"]
1595pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
1596
1597impl Mosccr {
1598    #[doc = "Main Clock Oscillator Stop"]
1599    #[inline(always)]
1600    pub fn mostp(
1601        self,
1602    ) -> crate::common::RegisterField<
1603        0,
1604        0x1,
1605        1,
1606        0,
1607        mosccr::Mostp,
1608        mosccr::Mostp,
1609        Mosccr_SPEC,
1610        crate::common::RW,
1611    > {
1612        crate::common::RegisterField::<
1613            0,
1614            0x1,
1615            1,
1616            0,
1617            mosccr::Mostp,
1618            mosccr::Mostp,
1619            Mosccr_SPEC,
1620            crate::common::RW,
1621        >::from_register(self, 0)
1622    }
1623}
1624impl ::core::default::Default for Mosccr {
1625    #[inline(always)]
1626    fn default() -> Mosccr {
1627        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
1628    }
1629}
1630pub mod mosccr {
1631
1632    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1633    pub struct Mostp_SPEC;
1634    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
1635    impl Mostp {
1636        #[doc = "Operate the main clock oscillator"]
1637        pub const _0: Self = Self::new(0);
1638
1639        #[doc = "Stop the main clock oscillator"]
1640        pub const _1: Self = Self::new(1);
1641    }
1642}
1643#[doc(hidden)]
1644#[derive(Copy, Clone, Eq, PartialEq)]
1645pub struct Hococr_SPEC;
1646impl crate::sealed::RegSpec for Hococr_SPEC {
1647    type DataType = u8;
1648}
1649
1650#[doc = "High-Speed On-Chip Oscillator Control Register"]
1651pub type Hococr = crate::RegValueT<Hococr_SPEC>;
1652
1653impl Hococr {
1654    #[doc = "HOCO Stop"]
1655    #[inline(always)]
1656    pub fn hcstp(
1657        self,
1658    ) -> crate::common::RegisterField<
1659        0,
1660        0x1,
1661        1,
1662        0,
1663        hococr::Hcstp,
1664        hococr::Hcstp,
1665        Hococr_SPEC,
1666        crate::common::RW,
1667    > {
1668        crate::common::RegisterField::<
1669            0,
1670            0x1,
1671            1,
1672            0,
1673            hococr::Hcstp,
1674            hococr::Hcstp,
1675            Hococr_SPEC,
1676            crate::common::RW,
1677        >::from_register(self, 0)
1678    }
1679}
1680impl ::core::default::Default for Hococr {
1681    #[inline(always)]
1682    fn default() -> Hococr {
1683        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
1684    }
1685}
1686pub mod hococr {
1687
1688    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1689    pub struct Hcstp_SPEC;
1690    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
1691    impl Hcstp {
1692        #[doc = "Operate the HOCO clock"]
1693        pub const _0: Self = Self::new(0);
1694
1695        #[doc = "Stop the HOCO clock"]
1696        pub const _1: Self = Self::new(1);
1697    }
1698}
1699#[doc(hidden)]
1700#[derive(Copy, Clone, Eq, PartialEq)]
1701pub struct Hococr2_SPEC;
1702impl crate::sealed::RegSpec for Hococr2_SPEC {
1703    type DataType = u8;
1704}
1705
1706#[doc = "High-Speed On-Chip Oscillator Control Register 2"]
1707pub type Hococr2 = crate::RegValueT<Hococr2_SPEC>;
1708
1709impl Hococr2 {
1710    #[doc = "HOCO Frequency Setting 0"]
1711    #[inline(always)]
1712    pub fn hcfrq0(
1713        self,
1714    ) -> crate::common::RegisterField<
1715        0,
1716        0x3,
1717        1,
1718        0,
1719        hococr2::Hcfrq0,
1720        hococr2::Hcfrq0,
1721        Hococr2_SPEC,
1722        crate::common::RW,
1723    > {
1724        crate::common::RegisterField::<
1725            0,
1726            0x3,
1727            1,
1728            0,
1729            hococr2::Hcfrq0,
1730            hococr2::Hcfrq0,
1731            Hococr2_SPEC,
1732            crate::common::RW,
1733        >::from_register(self, 0)
1734    }
1735}
1736impl ::core::default::Default for Hococr2 {
1737    #[inline(always)]
1738    fn default() -> Hococr2 {
1739        <crate::RegValueT<Hococr2_SPEC> as RegisterValue<_>>::new(0)
1740    }
1741}
1742pub mod hococr2 {
1743
1744    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1745    pub struct Hcfrq0_SPEC;
1746    pub type Hcfrq0 = crate::EnumBitfieldStruct<u8, Hcfrq0_SPEC>;
1747    impl Hcfrq0 {
1748        #[doc = "16 MHz"]
1749        pub const _00: Self = Self::new(0);
1750
1751        #[doc = "18 MHz"]
1752        pub const _01: Self = Self::new(1);
1753
1754        #[doc = "20 MHz"]
1755        pub const _10: Self = Self::new(2);
1756
1757        #[doc = "Setting prohibited"]
1758        pub const _11: Self = Self::new(3);
1759    }
1760}
1761#[doc(hidden)]
1762#[derive(Copy, Clone, Eq, PartialEq)]
1763pub struct Mococr_SPEC;
1764impl crate::sealed::RegSpec for Mococr_SPEC {
1765    type DataType = u8;
1766}
1767
1768#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
1769pub type Mococr = crate::RegValueT<Mococr_SPEC>;
1770
1771impl Mococr {
1772    #[doc = "MOCO Stop"]
1773    #[inline(always)]
1774    pub fn mcstp(
1775        self,
1776    ) -> crate::common::RegisterField<
1777        0,
1778        0x1,
1779        1,
1780        0,
1781        mococr::Mcstp,
1782        mococr::Mcstp,
1783        Mococr_SPEC,
1784        crate::common::RW,
1785    > {
1786        crate::common::RegisterField::<
1787            0,
1788            0x1,
1789            1,
1790            0,
1791            mococr::Mcstp,
1792            mococr::Mcstp,
1793            Mococr_SPEC,
1794            crate::common::RW,
1795        >::from_register(self, 0)
1796    }
1797}
1798impl ::core::default::Default for Mococr {
1799    #[inline(always)]
1800    fn default() -> Mococr {
1801        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
1802    }
1803}
1804pub mod mococr {
1805
1806    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1807    pub struct Mcstp_SPEC;
1808    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
1809    impl Mcstp {
1810        #[doc = "MOCO clock is operating"]
1811        pub const _0: Self = Self::new(0);
1812
1813        #[doc = "MOCO clock is stopped"]
1814        pub const _1: Self = Self::new(1);
1815    }
1816}
1817#[doc(hidden)]
1818#[derive(Copy, Clone, Eq, PartialEq)]
1819pub struct Fllcr1_SPEC;
1820impl crate::sealed::RegSpec for Fllcr1_SPEC {
1821    type DataType = u8;
1822}
1823
1824#[doc = "FLL Control Register 1"]
1825pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
1826
1827impl Fllcr1 {
1828    #[doc = "FLL Enable"]
1829    #[inline(always)]
1830    pub fn fllen(
1831        self,
1832    ) -> crate::common::RegisterField<
1833        0,
1834        0x1,
1835        1,
1836        0,
1837        fllcr1::Fllen,
1838        fllcr1::Fllen,
1839        Fllcr1_SPEC,
1840        crate::common::RW,
1841    > {
1842        crate::common::RegisterField::<
1843            0,
1844            0x1,
1845            1,
1846            0,
1847            fllcr1::Fllen,
1848            fllcr1::Fllen,
1849            Fllcr1_SPEC,
1850            crate::common::RW,
1851        >::from_register(self, 0)
1852    }
1853}
1854impl ::core::default::Default for Fllcr1 {
1855    #[inline(always)]
1856    fn default() -> Fllcr1 {
1857        <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
1858    }
1859}
1860pub mod fllcr1 {
1861
1862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1863    pub struct Fllen_SPEC;
1864    pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
1865    impl Fllen {
1866        #[doc = "FLL function is disabled"]
1867        pub const _0: Self = Self::new(0);
1868
1869        #[doc = "FLL function is enabled."]
1870        pub const _1: Self = Self::new(1);
1871    }
1872}
1873#[doc(hidden)]
1874#[derive(Copy, Clone, Eq, PartialEq)]
1875pub struct Fllcr2_SPEC;
1876impl crate::sealed::RegSpec for Fllcr2_SPEC {
1877    type DataType = u16;
1878}
1879
1880#[doc = "FLL Control Register 2"]
1881pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
1882
1883impl Fllcr2 {
1884    #[doc = "FLL Multiplication Control"]
1885    #[inline(always)]
1886    pub fn fllcntl(
1887        self,
1888    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
1889    {
1890        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
1891    }
1892}
1893impl ::core::default::Default for Fllcr2 {
1894    #[inline(always)]
1895    fn default() -> Fllcr2 {
1896        <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
1897    }
1898}
1899
1900#[doc(hidden)]
1901#[derive(Copy, Clone, Eq, PartialEq)]
1902pub struct Oscsf_SPEC;
1903impl crate::sealed::RegSpec for Oscsf_SPEC {
1904    type DataType = u8;
1905}
1906
1907#[doc = "Oscillation Stabilization Flag Register"]
1908pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
1909
1910impl Oscsf {
1911    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
1912    #[inline(always)]
1913    pub fn hocosf(
1914        self,
1915    ) -> crate::common::RegisterField<
1916        0,
1917        0x1,
1918        1,
1919        0,
1920        oscsf::Hocosf,
1921        oscsf::Hocosf,
1922        Oscsf_SPEC,
1923        crate::common::R,
1924    > {
1925        crate::common::RegisterField::<
1926            0,
1927            0x1,
1928            1,
1929            0,
1930            oscsf::Hocosf,
1931            oscsf::Hocosf,
1932            Oscsf_SPEC,
1933            crate::common::R,
1934        >::from_register(self, 0)
1935    }
1936
1937    #[doc = "Main Clock Oscillation Stabilization Flag"]
1938    #[inline(always)]
1939    pub fn moscsf(
1940        self,
1941    ) -> crate::common::RegisterField<
1942        3,
1943        0x1,
1944        1,
1945        0,
1946        oscsf::Moscsf,
1947        oscsf::Moscsf,
1948        Oscsf_SPEC,
1949        crate::common::R,
1950    > {
1951        crate::common::RegisterField::<
1952            3,
1953            0x1,
1954            1,
1955            0,
1956            oscsf::Moscsf,
1957            oscsf::Moscsf,
1958            Oscsf_SPEC,
1959            crate::common::R,
1960        >::from_register(self, 0)
1961    }
1962
1963    #[doc = "PLL Clock Oscillation Stabilization Flag"]
1964    #[inline(always)]
1965    pub fn pllsf(
1966        self,
1967    ) -> crate::common::RegisterField<
1968        5,
1969        0x1,
1970        1,
1971        0,
1972        oscsf::Pllsf,
1973        oscsf::Pllsf,
1974        Oscsf_SPEC,
1975        crate::common::R,
1976    > {
1977        crate::common::RegisterField::<
1978            5,
1979            0x1,
1980            1,
1981            0,
1982            oscsf::Pllsf,
1983            oscsf::Pllsf,
1984            Oscsf_SPEC,
1985            crate::common::R,
1986        >::from_register(self, 0)
1987    }
1988
1989    #[doc = "PLL2 Clock Oscillation Stabilization Flag"]
1990    #[inline(always)]
1991    pub fn pll2sf(
1992        self,
1993    ) -> crate::common::RegisterField<
1994        6,
1995        0x1,
1996        1,
1997        0,
1998        oscsf::Pll2Sf,
1999        oscsf::Pll2Sf,
2000        Oscsf_SPEC,
2001        crate::common::R,
2002    > {
2003        crate::common::RegisterField::<
2004            6,
2005            0x1,
2006            1,
2007            0,
2008            oscsf::Pll2Sf,
2009            oscsf::Pll2Sf,
2010            Oscsf_SPEC,
2011            crate::common::R,
2012        >::from_register(self, 0)
2013    }
2014}
2015impl ::core::default::Default for Oscsf {
2016    #[inline(always)]
2017    fn default() -> Oscsf {
2018        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
2019    }
2020}
2021pub mod oscsf {
2022
2023    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2024    pub struct Hocosf_SPEC;
2025    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
2026    impl Hocosf {
2027        #[doc = "The HOCO clock is stopped or is not yet stable"]
2028        pub const _0: Self = Self::new(0);
2029
2030        #[doc = "The HOCO clock is stable, so is available for use as the system clock"]
2031        pub const _1: Self = Self::new(1);
2032    }
2033    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2034    pub struct Moscsf_SPEC;
2035    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
2036    impl Moscsf {
2037        #[doc = "The main clock oscillator is stopped (MOSTP = 1) or is not yet stable"]
2038        pub const _0: Self = Self::new(0);
2039
2040        #[doc = "The main clock oscillator is stable, so is available for use as the system clock"]
2041        pub const _1: Self = Self::new(1);
2042    }
2043    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2044    pub struct Pllsf_SPEC;
2045    pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
2046    impl Pllsf {
2047        #[doc = "The PLL clock is stopped, or oscillation of the PLL clock is not stable yet"]
2048        pub const _0: Self = Self::new(0);
2049
2050        #[doc = "The PLL clock is stable, so is available for use as the system clock"]
2051        pub const _1: Self = Self::new(1);
2052    }
2053    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2054    pub struct Pll2Sf_SPEC;
2055    pub type Pll2Sf = crate::EnumBitfieldStruct<u8, Pll2Sf_SPEC>;
2056    impl Pll2Sf {
2057        #[doc = "The PLL2 clock is stopped, or oscillation of the PLL2 clock is not stable yet"]
2058        pub const _0: Self = Self::new(0);
2059
2060        #[doc = "The PLL2 clock is stable"]
2061        pub const _1: Self = Self::new(1);
2062    }
2063}
2064#[doc(hidden)]
2065#[derive(Copy, Clone, Eq, PartialEq)]
2066pub struct Ckocr_SPEC;
2067impl crate::sealed::RegSpec for Ckocr_SPEC {
2068    type DataType = u8;
2069}
2070
2071#[doc = "Clock Out Control Register"]
2072pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
2073
2074impl Ckocr {
2075    #[doc = "Clock Out Source Select"]
2076    #[inline(always)]
2077    pub fn ckosel(
2078        self,
2079    ) -> crate::common::RegisterField<
2080        0,
2081        0x7,
2082        1,
2083        0,
2084        ckocr::Ckosel,
2085        ckocr::Ckosel,
2086        Ckocr_SPEC,
2087        crate::common::RW,
2088    > {
2089        crate::common::RegisterField::<
2090            0,
2091            0x7,
2092            1,
2093            0,
2094            ckocr::Ckosel,
2095            ckocr::Ckosel,
2096            Ckocr_SPEC,
2097            crate::common::RW,
2098        >::from_register(self, 0)
2099    }
2100
2101    #[doc = "Clock Output Frequency Division Ratio"]
2102    #[inline(always)]
2103    pub fn ckodiv(
2104        self,
2105    ) -> crate::common::RegisterField<
2106        4,
2107        0x7,
2108        1,
2109        0,
2110        ckocr::Ckodiv,
2111        ckocr::Ckodiv,
2112        Ckocr_SPEC,
2113        crate::common::RW,
2114    > {
2115        crate::common::RegisterField::<
2116            4,
2117            0x7,
2118            1,
2119            0,
2120            ckocr::Ckodiv,
2121            ckocr::Ckodiv,
2122            Ckocr_SPEC,
2123            crate::common::RW,
2124        >::from_register(self, 0)
2125    }
2126
2127    #[doc = "Clock Out Enable"]
2128    #[inline(always)]
2129    pub fn ckoen(
2130        self,
2131    ) -> crate::common::RegisterField<
2132        7,
2133        0x1,
2134        1,
2135        0,
2136        ckocr::Ckoen,
2137        ckocr::Ckoen,
2138        Ckocr_SPEC,
2139        crate::common::RW,
2140    > {
2141        crate::common::RegisterField::<
2142            7,
2143            0x1,
2144            1,
2145            0,
2146            ckocr::Ckoen,
2147            ckocr::Ckoen,
2148            Ckocr_SPEC,
2149            crate::common::RW,
2150        >::from_register(self, 0)
2151    }
2152}
2153impl ::core::default::Default for Ckocr {
2154    #[inline(always)]
2155    fn default() -> Ckocr {
2156        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(0)
2157    }
2158}
2159pub mod ckocr {
2160
2161    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2162    pub struct Ckosel_SPEC;
2163    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2164    impl Ckosel {
2165        #[doc = "HOCO (value after reset)"]
2166        pub const _000: Self = Self::new(0);
2167
2168        #[doc = "MOCO"]
2169        pub const _001: Self = Self::new(1);
2170
2171        #[doc = "LOCO"]
2172        pub const _010: Self = Self::new(2);
2173
2174        #[doc = "MOSC"]
2175        pub const _011: Self = Self::new(3);
2176
2177        #[doc = "SOSC"]
2178        pub const _100: Self = Self::new(4);
2179
2180        #[doc = "Setting prohibited"]
2181        pub const _101: Self = Self::new(5);
2182    }
2183    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2184    pub struct Ckodiv_SPEC;
2185    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2186    impl Ckodiv {
2187        #[doc = "x 1/1"]
2188        pub const _000: Self = Self::new(0);
2189
2190        #[doc = "x 1/2"]
2191        pub const _001: Self = Self::new(1);
2192
2193        #[doc = "x 1/4"]
2194        pub const _010: Self = Self::new(2);
2195
2196        #[doc = "x 1/8"]
2197        pub const _011: Self = Self::new(3);
2198
2199        #[doc = "x 1/16"]
2200        pub const _100: Self = Self::new(4);
2201
2202        #[doc = "x 1/32"]
2203        pub const _101: Self = Self::new(5);
2204
2205        #[doc = "x 1/64"]
2206        pub const _110: Self = Self::new(6);
2207
2208        #[doc = "x 1/128"]
2209        pub const _111: Self = Self::new(7);
2210    }
2211    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2212    pub struct Ckoen_SPEC;
2213    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2214    impl Ckoen {
2215        #[doc = "Disable clock out"]
2216        pub const _0: Self = Self::new(0);
2217
2218        #[doc = "Enable clock out"]
2219        pub const _1: Self = Self::new(1);
2220    }
2221}
2222#[doc(hidden)]
2223#[derive(Copy, Clone, Eq, PartialEq)]
2224pub struct Trckcr_SPEC;
2225impl crate::sealed::RegSpec for Trckcr_SPEC {
2226    type DataType = u8;
2227}
2228
2229#[doc = "Trace Clock Control Register"]
2230pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
2231
2232impl Trckcr {
2233    #[doc = "Trace Clock operating frequency select"]
2234    #[inline(always)]
2235    pub fn trck(
2236        self,
2237    ) -> crate::common::RegisterField<
2238        0,
2239        0xf,
2240        1,
2241        0,
2242        trckcr::Trck,
2243        trckcr::Trck,
2244        Trckcr_SPEC,
2245        crate::common::RW,
2246    > {
2247        crate::common::RegisterField::<
2248            0,
2249            0xf,
2250            1,
2251            0,
2252            trckcr::Trck,
2253            trckcr::Trck,
2254            Trckcr_SPEC,
2255            crate::common::RW,
2256        >::from_register(self, 0)
2257    }
2258
2259    #[doc = "Trace Clock operating Enable"]
2260    #[inline(always)]
2261    pub fn trcken(
2262        self,
2263    ) -> crate::common::RegisterField<
2264        7,
2265        0x1,
2266        1,
2267        0,
2268        trckcr::Trcken,
2269        trckcr::Trcken,
2270        Trckcr_SPEC,
2271        crate::common::RW,
2272    > {
2273        crate::common::RegisterField::<
2274            7,
2275            0x1,
2276            1,
2277            0,
2278            trckcr::Trcken,
2279            trckcr::Trcken,
2280            Trckcr_SPEC,
2281            crate::common::RW,
2282        >::from_register(self, 0)
2283    }
2284}
2285impl ::core::default::Default for Trckcr {
2286    #[inline(always)]
2287    fn default() -> Trckcr {
2288        <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(1)
2289    }
2290}
2291pub mod trckcr {
2292
2293    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2294    pub struct Trck_SPEC;
2295    pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
2296    impl Trck {
2297        #[doc = "/1"]
2298        pub const _0_X_0: Self = Self::new(0);
2299
2300        #[doc = "/2 (value after reset)"]
2301        pub const _0_X_1: Self = Self::new(1);
2302
2303        #[doc = "/4"]
2304        pub const _0_X_2: Self = Self::new(2);
2305    }
2306    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2307    pub struct Trcken_SPEC;
2308    pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
2309    impl Trcken {
2310        #[doc = "Stop"]
2311        pub const _0: Self = Self::new(0);
2312
2313        #[doc = "Operation enable"]
2314        pub const _1: Self = Self::new(1);
2315    }
2316}
2317#[doc(hidden)]
2318#[derive(Copy, Clone, Eq, PartialEq)]
2319pub struct Ostdcr_SPEC;
2320impl crate::sealed::RegSpec for Ostdcr_SPEC {
2321    type DataType = u8;
2322}
2323
2324#[doc = "Oscillation Stop Detection Control Register"]
2325pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
2326
2327impl Ostdcr {
2328    #[doc = "Oscillation Stop Detection Interrupt Enable"]
2329    #[inline(always)]
2330    pub fn ostdie(
2331        self,
2332    ) -> crate::common::RegisterField<
2333        0,
2334        0x1,
2335        1,
2336        0,
2337        ostdcr::Ostdie,
2338        ostdcr::Ostdie,
2339        Ostdcr_SPEC,
2340        crate::common::RW,
2341    > {
2342        crate::common::RegisterField::<
2343            0,
2344            0x1,
2345            1,
2346            0,
2347            ostdcr::Ostdie,
2348            ostdcr::Ostdie,
2349            Ostdcr_SPEC,
2350            crate::common::RW,
2351        >::from_register(self, 0)
2352    }
2353
2354    #[doc = "Oscillation Stop Detection Function Enable"]
2355    #[inline(always)]
2356    pub fn ostde(
2357        self,
2358    ) -> crate::common::RegisterField<
2359        7,
2360        0x1,
2361        1,
2362        0,
2363        ostdcr::Ostde,
2364        ostdcr::Ostde,
2365        Ostdcr_SPEC,
2366        crate::common::RW,
2367    > {
2368        crate::common::RegisterField::<
2369            7,
2370            0x1,
2371            1,
2372            0,
2373            ostdcr::Ostde,
2374            ostdcr::Ostde,
2375            Ostdcr_SPEC,
2376            crate::common::RW,
2377        >::from_register(self, 0)
2378    }
2379}
2380impl ::core::default::Default for Ostdcr {
2381    #[inline(always)]
2382    fn default() -> Ostdcr {
2383        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
2384    }
2385}
2386pub mod ostdcr {
2387
2388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2389    pub struct Ostdie_SPEC;
2390    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
2391    impl Ostdie {
2392        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
2393        pub const _0: Self = Self::new(0);
2394
2395        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
2396        pub const _1: Self = Self::new(1);
2397    }
2398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2399    pub struct Ostde_SPEC;
2400    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
2401    impl Ostde {
2402        #[doc = "Disable oscillation stop detection function"]
2403        pub const _0: Self = Self::new(0);
2404
2405        #[doc = "Enable oscillation stop detection function"]
2406        pub const _1: Self = Self::new(1);
2407    }
2408}
2409#[doc(hidden)]
2410#[derive(Copy, Clone, Eq, PartialEq)]
2411pub struct Ostdsr_SPEC;
2412impl crate::sealed::RegSpec for Ostdsr_SPEC {
2413    type DataType = u8;
2414}
2415
2416#[doc = "Oscillation Stop Detection Status Register"]
2417pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
2418
2419impl Ostdsr {
2420    #[doc = "Oscillation Stop Detection Flag"]
2421    #[inline(always)]
2422    pub fn ostdf(
2423        self,
2424    ) -> crate::common::RegisterField<
2425        0,
2426        0x1,
2427        1,
2428        0,
2429        ostdsr::Ostdf,
2430        ostdsr::Ostdf,
2431        Ostdsr_SPEC,
2432        crate::common::RW,
2433    > {
2434        crate::common::RegisterField::<
2435            0,
2436            0x1,
2437            1,
2438            0,
2439            ostdsr::Ostdf,
2440            ostdsr::Ostdf,
2441            Ostdsr_SPEC,
2442            crate::common::RW,
2443        >::from_register(self, 0)
2444    }
2445}
2446impl ::core::default::Default for Ostdsr {
2447    #[inline(always)]
2448    fn default() -> Ostdsr {
2449        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
2450    }
2451}
2452pub mod ostdsr {
2453
2454    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2455    pub struct Ostdf_SPEC;
2456    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
2457    impl Ostdf {
2458        #[doc = "Main clock oscillation stop not detected"]
2459        pub const _0: Self = Self::new(0);
2460
2461        #[doc = "Main clock oscillation stop detected"]
2462        pub const _1: Self = Self::new(1);
2463    }
2464}
2465#[doc(hidden)]
2466#[derive(Copy, Clone, Eq, PartialEq)]
2467pub struct Pll2Ccr_SPEC;
2468impl crate::sealed::RegSpec for Pll2Ccr_SPEC {
2469    type DataType = u16;
2470}
2471
2472#[doc = "PLL2 Clock Control Register"]
2473pub type Pll2Ccr = crate::RegValueT<Pll2Ccr_SPEC>;
2474
2475impl Pll2Ccr {
2476    #[doc = "PLL2 Input Frequency Division Ratio Select"]
2477    #[inline(always)]
2478    pub fn pl2idiv(
2479        self,
2480    ) -> crate::common::RegisterField<
2481        0,
2482        0x3,
2483        1,
2484        0,
2485        pll2ccr::Pl2Idiv,
2486        pll2ccr::Pl2Idiv,
2487        Pll2Ccr_SPEC,
2488        crate::common::RW,
2489    > {
2490        crate::common::RegisterField::<
2491            0,
2492            0x3,
2493            1,
2494            0,
2495            pll2ccr::Pl2Idiv,
2496            pll2ccr::Pl2Idiv,
2497            Pll2Ccr_SPEC,
2498            crate::common::RW,
2499        >::from_register(self, 0)
2500    }
2501
2502    #[doc = "PLL2 Clock Source Select"]
2503    #[inline(always)]
2504    pub fn pl2srcsel(
2505        self,
2506    ) -> crate::common::RegisterField<
2507        4,
2508        0x1,
2509        1,
2510        0,
2511        pll2ccr::Pl2Srcsel,
2512        pll2ccr::Pl2Srcsel,
2513        Pll2Ccr_SPEC,
2514        crate::common::RW,
2515    > {
2516        crate::common::RegisterField::<
2517            4,
2518            0x1,
2519            1,
2520            0,
2521            pll2ccr::Pl2Srcsel,
2522            pll2ccr::Pl2Srcsel,
2523            Pll2Ccr_SPEC,
2524            crate::common::RW,
2525        >::from_register(self, 0)
2526    }
2527
2528    #[doc = "PLL2 Frequency Multiplication Factor Select"]
2529    #[inline(always)]
2530    pub fn pll2mul(
2531        self,
2532    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Pll2Ccr_SPEC, crate::common::RW> {
2533        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Pll2Ccr_SPEC,crate::common::RW>::from_register(self,0)
2534    }
2535}
2536impl ::core::default::Default for Pll2Ccr {
2537    #[inline(always)]
2538    fn default() -> Pll2Ccr {
2539        <crate::RegValueT<Pll2Ccr_SPEC> as RegisterValue<_>>::new(4864)
2540    }
2541}
2542pub mod pll2ccr {
2543
2544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2545    pub struct Pl2Idiv_SPEC;
2546    pub type Pl2Idiv = crate::EnumBitfieldStruct<u8, Pl2Idiv_SPEC>;
2547    impl Pl2Idiv {
2548        #[doc = "∕ 1 (value after reset)"]
2549        pub const _00: Self = Self::new(0);
2550
2551        #[doc = "∕ 2"]
2552        pub const _01: Self = Self::new(1);
2553
2554        #[doc = "∕ 3"]
2555        pub const _10: Self = Self::new(2);
2556    }
2557    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2558    pub struct Pl2Srcsel_SPEC;
2559    pub type Pl2Srcsel = crate::EnumBitfieldStruct<u8, Pl2Srcsel_SPEC>;
2560    impl Pl2Srcsel {
2561        #[doc = "Main clock oscillator"]
2562        pub const _0: Self = Self::new(0);
2563
2564        #[doc = "HOCO"]
2565        pub const _1: Self = Self::new(1);
2566    }
2567}
2568#[doc(hidden)]
2569#[derive(Copy, Clone, Eq, PartialEq)]
2570pub struct Pll2Cr_SPEC;
2571impl crate::sealed::RegSpec for Pll2Cr_SPEC {
2572    type DataType = u8;
2573}
2574
2575#[doc = "PLL2 Control Register"]
2576pub type Pll2Cr = crate::RegValueT<Pll2Cr_SPEC>;
2577
2578impl Pll2Cr {
2579    #[doc = "PLL2 Stop Control"]
2580    #[inline(always)]
2581    pub fn pll2stp(
2582        self,
2583    ) -> crate::common::RegisterField<
2584        0,
2585        0x1,
2586        1,
2587        0,
2588        pll2cr::Pll2Stp,
2589        pll2cr::Pll2Stp,
2590        Pll2Cr_SPEC,
2591        crate::common::RW,
2592    > {
2593        crate::common::RegisterField::<
2594            0,
2595            0x1,
2596            1,
2597            0,
2598            pll2cr::Pll2Stp,
2599            pll2cr::Pll2Stp,
2600            Pll2Cr_SPEC,
2601            crate::common::RW,
2602        >::from_register(self, 0)
2603    }
2604}
2605impl ::core::default::Default for Pll2Cr {
2606    #[inline(always)]
2607    fn default() -> Pll2Cr {
2608        <crate::RegValueT<Pll2Cr_SPEC> as RegisterValue<_>>::new(1)
2609    }
2610}
2611pub mod pll2cr {
2612
2613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2614    pub struct Pll2Stp_SPEC;
2615    pub type Pll2Stp = crate::EnumBitfieldStruct<u8, Pll2Stp_SPEC>;
2616    impl Pll2Stp {
2617        #[doc = "PLL2 is operating"]
2618        pub const _0: Self = Self::new(0);
2619
2620        #[doc = "PLL2 is stopped."]
2621        pub const _1: Self = Self::new(1);
2622    }
2623}
2624#[doc(hidden)]
2625#[derive(Copy, Clone, Eq, PartialEq)]
2626pub struct Mocoutcr_SPEC;
2627impl crate::sealed::RegSpec for Mocoutcr_SPEC {
2628    type DataType = u8;
2629}
2630
2631#[doc = "MOCO User Trimming Control Register"]
2632pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
2633
2634impl Mocoutcr {
2635    #[doc = "MOCO User Trimming"]
2636    #[inline(always)]
2637    pub fn mocoutrm(
2638        self,
2639    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
2640        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2641    }
2642}
2643impl ::core::default::Default for Mocoutcr {
2644    #[inline(always)]
2645    fn default() -> Mocoutcr {
2646        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
2647    }
2648}
2649
2650#[doc(hidden)]
2651#[derive(Copy, Clone, Eq, PartialEq)]
2652pub struct Hocoutcr_SPEC;
2653impl crate::sealed::RegSpec for Hocoutcr_SPEC {
2654    type DataType = u8;
2655}
2656
2657#[doc = "HOCO User Trimming Control Register"]
2658pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
2659
2660impl Hocoutcr {
2661    #[doc = "HOCO User Trimming"]
2662    #[inline(always)]
2663    pub fn hocoutrm(
2664        self,
2665    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
2666        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
2667    }
2668}
2669impl ::core::default::Default for Hocoutcr {
2670    #[inline(always)]
2671    fn default() -> Hocoutcr {
2672        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
2673    }
2674}
2675
2676#[doc(hidden)]
2677#[derive(Copy, Clone, Eq, PartialEq)]
2678pub struct Usbckdivcr_SPEC;
2679impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
2680    type DataType = u8;
2681}
2682
2683#[doc = "USB Clock Division Control Register"]
2684pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
2685
2686impl Usbckdivcr {
2687    #[doc = "USB Clock (USBCLK) Division Select"]
2688    #[inline(always)]
2689    pub fn usbckdiv(
2690        self,
2691    ) -> crate::common::RegisterField<
2692        0,
2693        0x7,
2694        1,
2695        0,
2696        usbckdivcr::Usbckdiv,
2697        usbckdivcr::Usbckdiv,
2698        Usbckdivcr_SPEC,
2699        crate::common::RW,
2700    > {
2701        crate::common::RegisterField::<
2702            0,
2703            0x7,
2704            1,
2705            0,
2706            usbckdivcr::Usbckdiv,
2707            usbckdivcr::Usbckdiv,
2708            Usbckdivcr_SPEC,
2709            crate::common::RW,
2710        >::from_register(self, 0)
2711    }
2712}
2713impl ::core::default::Default for Usbckdivcr {
2714    #[inline(always)]
2715    fn default() -> Usbckdivcr {
2716        <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
2717    }
2718}
2719pub mod usbckdivcr {
2720
2721    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2722    pub struct Usbckdiv_SPEC;
2723    pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
2724    impl Usbckdiv {
2725        #[doc = "∕ 4"]
2726        pub const _010: Self = Self::new(2);
2727
2728        #[doc = "∕ 3"]
2729        pub const _101: Self = Self::new(5);
2730
2731        #[doc = "∕ 5"]
2732        pub const _110: Self = Self::new(6);
2733    }
2734}
2735#[doc(hidden)]
2736#[derive(Copy, Clone, Eq, PartialEq)]
2737pub struct Usbckcr_SPEC;
2738impl crate::sealed::RegSpec for Usbckcr_SPEC {
2739    type DataType = u8;
2740}
2741
2742#[doc = "USB Clock Control Register"]
2743pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
2744
2745impl Usbckcr {
2746    #[doc = "USB Clock (USBCLK) Source Select"]
2747    #[inline(always)]
2748    pub fn usbcksel(
2749        self,
2750    ) -> crate::common::RegisterField<
2751        0,
2752        0x7,
2753        1,
2754        0,
2755        usbckcr::Usbcksel,
2756        usbckcr::Usbcksel,
2757        Usbckcr_SPEC,
2758        crate::common::RW,
2759    > {
2760        crate::common::RegisterField::<
2761            0,
2762            0x7,
2763            1,
2764            0,
2765            usbckcr::Usbcksel,
2766            usbckcr::Usbcksel,
2767            Usbckcr_SPEC,
2768            crate::common::RW,
2769        >::from_register(self, 0)
2770    }
2771
2772    #[doc = "USB Clock (USBCLK) Switching Request"]
2773    #[inline(always)]
2774    pub fn usbcksreq(
2775        self,
2776    ) -> crate::common::RegisterField<
2777        6,
2778        0x1,
2779        1,
2780        0,
2781        usbckcr::Usbcksreq,
2782        usbckcr::Usbcksreq,
2783        Usbckcr_SPEC,
2784        crate::common::RW,
2785    > {
2786        crate::common::RegisterField::<
2787            6,
2788            0x1,
2789            1,
2790            0,
2791            usbckcr::Usbcksreq,
2792            usbckcr::Usbcksreq,
2793            Usbckcr_SPEC,
2794            crate::common::RW,
2795        >::from_register(self, 0)
2796    }
2797
2798    #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
2799    #[inline(always)]
2800    pub fn usbcksrdy(
2801        self,
2802    ) -> crate::common::RegisterField<
2803        7,
2804        0x1,
2805        1,
2806        0,
2807        usbckcr::Usbcksrdy,
2808        usbckcr::Usbcksrdy,
2809        Usbckcr_SPEC,
2810        crate::common::R,
2811    > {
2812        crate::common::RegisterField::<
2813            7,
2814            0x1,
2815            1,
2816            0,
2817            usbckcr::Usbcksrdy,
2818            usbckcr::Usbcksrdy,
2819            Usbckcr_SPEC,
2820            crate::common::R,
2821        >::from_register(self, 0)
2822    }
2823}
2824impl ::core::default::Default for Usbckcr {
2825    #[inline(always)]
2826    fn default() -> Usbckcr {
2827        <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
2828    }
2829}
2830pub mod usbckcr {
2831
2832    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2833    pub struct Usbcksel_SPEC;
2834    pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
2835    impl Usbcksel {
2836        #[doc = "PLL"]
2837        pub const _101: Self = Self::new(5);
2838
2839        #[doc = "PLL2"]
2840        pub const _110: Self = Self::new(6);
2841    }
2842    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2843    pub struct Usbcksreq_SPEC;
2844    pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
2845    impl Usbcksreq {
2846        #[doc = "No request"]
2847        pub const _0: Self = Self::new(0);
2848
2849        #[doc = "Request switching."]
2850        pub const _1: Self = Self::new(1);
2851    }
2852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2853    pub struct Usbcksrdy_SPEC;
2854    pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
2855    impl Usbcksrdy {
2856        #[doc = "Impossible to Switch"]
2857        pub const _0: Self = Self::new(0);
2858
2859        #[doc = "Possible to Switch"]
2860        pub const _1: Self = Self::new(1);
2861    }
2862}
2863#[doc(hidden)]
2864#[derive(Copy, Clone, Eq, PartialEq)]
2865pub struct Snzreqcr1_SPEC;
2866impl crate::sealed::RegSpec for Snzreqcr1_SPEC {
2867    type DataType = u32;
2868}
2869
2870#[doc = "Snooze Request Control Register 1"]
2871pub type Snzreqcr1 = crate::RegValueT<Snzreqcr1_SPEC>;
2872
2873impl Snzreqcr1 {
2874    #[doc = "Enable AGT3 underflow snooze request"]
2875    #[inline(always)]
2876    pub fn snzreqen0(
2877        self,
2878    ) -> crate::common::RegisterField<
2879        0,
2880        0x1,
2881        1,
2882        0,
2883        snzreqcr1::Snzreqen0,
2884        snzreqcr1::Snzreqen0,
2885        Snzreqcr1_SPEC,
2886        crate::common::RW,
2887    > {
2888        crate::common::RegisterField::<
2889            0,
2890            0x1,
2891            1,
2892            0,
2893            snzreqcr1::Snzreqen0,
2894            snzreqcr1::Snzreqen0,
2895            Snzreqcr1_SPEC,
2896            crate::common::RW,
2897        >::from_register(self, 0)
2898    }
2899
2900    #[doc = "Enable AGT3 compare match A snooze request"]
2901    #[inline(always)]
2902    pub fn snzreqen1(
2903        self,
2904    ) -> crate::common::RegisterField<
2905        1,
2906        0x1,
2907        1,
2908        0,
2909        snzreqcr1::Snzreqen1,
2910        snzreqcr1::Snzreqen1,
2911        Snzreqcr1_SPEC,
2912        crate::common::RW,
2913    > {
2914        crate::common::RegisterField::<
2915            1,
2916            0x1,
2917            1,
2918            0,
2919            snzreqcr1::Snzreqen1,
2920            snzreqcr1::Snzreqen1,
2921            Snzreqcr1_SPEC,
2922            crate::common::RW,
2923        >::from_register(self, 0)
2924    }
2925
2926    #[doc = "Enable AGT3 compare match B snooze request"]
2927    #[inline(always)]
2928    pub fn snzreqen2(
2929        self,
2930    ) -> crate::common::RegisterField<
2931        2,
2932        0x1,
2933        1,
2934        0,
2935        snzreqcr1::Snzreqen2,
2936        snzreqcr1::Snzreqen2,
2937        Snzreqcr1_SPEC,
2938        crate::common::RW,
2939    > {
2940        crate::common::RegisterField::<
2941            2,
2942            0x1,
2943            1,
2944            0,
2945            snzreqcr1::Snzreqen2,
2946            snzreqcr1::Snzreqen2,
2947            Snzreqcr1_SPEC,
2948            crate::common::RW,
2949        >::from_register(self, 0)
2950    }
2951}
2952impl ::core::default::Default for Snzreqcr1 {
2953    #[inline(always)]
2954    fn default() -> Snzreqcr1 {
2955        <crate::RegValueT<Snzreqcr1_SPEC> as RegisterValue<_>>::new(0)
2956    }
2957}
2958pub mod snzreqcr1 {
2959
2960    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2961    pub struct Snzreqen0_SPEC;
2962    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
2963    impl Snzreqen0 {
2964        #[doc = "Disable the snooze request"]
2965        pub const _0: Self = Self::new(0);
2966
2967        #[doc = "Enable the snooze request"]
2968        pub const _1: Self = Self::new(1);
2969    }
2970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2971    pub struct Snzreqen1_SPEC;
2972    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
2973    impl Snzreqen1 {
2974        #[doc = "Disable the snooze request"]
2975        pub const _0: Self = Self::new(0);
2976
2977        #[doc = "Enable the snooze request"]
2978        pub const _1: Self = Self::new(1);
2979    }
2980    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2981    pub struct Snzreqen2_SPEC;
2982    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
2983    impl Snzreqen2 {
2984        #[doc = "Disable the snooze request"]
2985        pub const _0: Self = Self::new(0);
2986
2987        #[doc = "Enable the snooze request"]
2988        pub const _1: Self = Self::new(1);
2989    }
2990}
2991#[doc(hidden)]
2992#[derive(Copy, Clone, Eq, PartialEq)]
2993pub struct Snzcr_SPEC;
2994impl crate::sealed::RegSpec for Snzcr_SPEC {
2995    type DataType = u8;
2996}
2997
2998#[doc = "Snooze Control Register"]
2999pub type Snzcr = crate::RegValueT<Snzcr_SPEC>;
3000
3001impl Snzcr {
3002    #[doc = "RXD0 Snooze Request Enable"]
3003    #[inline(always)]
3004    pub fn rxdreqen(
3005        self,
3006    ) -> crate::common::RegisterField<
3007        0,
3008        0x1,
3009        1,
3010        0,
3011        snzcr::Rxdreqen,
3012        snzcr::Rxdreqen,
3013        Snzcr_SPEC,
3014        crate::common::RW,
3015    > {
3016        crate::common::RegisterField::<
3017            0,
3018            0x1,
3019            1,
3020            0,
3021            snzcr::Rxdreqen,
3022            snzcr::Rxdreqen,
3023            Snzcr_SPEC,
3024            crate::common::RW,
3025        >::from_register(self, 0)
3026    }
3027
3028    #[doc = "DTC Enable in Snooze mode"]
3029    #[inline(always)]
3030    pub fn snzdtcen(
3031        self,
3032    ) -> crate::common::RegisterField<
3033        1,
3034        0x1,
3035        1,
3036        0,
3037        snzcr::Snzdtcen,
3038        snzcr::Snzdtcen,
3039        Snzcr_SPEC,
3040        crate::common::RW,
3041    > {
3042        crate::common::RegisterField::<
3043            1,
3044            0x1,
3045            1,
3046            0,
3047            snzcr::Snzdtcen,
3048            snzcr::Snzdtcen,
3049            Snzcr_SPEC,
3050            crate::common::RW,
3051        >::from_register(self, 0)
3052    }
3053
3054    #[doc = "Snooze mode Enable"]
3055    #[inline(always)]
3056    pub fn snze(
3057        self,
3058    ) -> crate::common::RegisterField<
3059        7,
3060        0x1,
3061        1,
3062        0,
3063        snzcr::Snze,
3064        snzcr::Snze,
3065        Snzcr_SPEC,
3066        crate::common::RW,
3067    > {
3068        crate::common::RegisterField::<
3069            7,
3070            0x1,
3071            1,
3072            0,
3073            snzcr::Snze,
3074            snzcr::Snze,
3075            Snzcr_SPEC,
3076            crate::common::RW,
3077        >::from_register(self, 0)
3078    }
3079}
3080impl ::core::default::Default for Snzcr {
3081    #[inline(always)]
3082    fn default() -> Snzcr {
3083        <crate::RegValueT<Snzcr_SPEC> as RegisterValue<_>>::new(0)
3084    }
3085}
3086pub mod snzcr {
3087
3088    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3089    pub struct Rxdreqen_SPEC;
3090    pub type Rxdreqen = crate::EnumBitfieldStruct<u8, Rxdreqen_SPEC>;
3091    impl Rxdreqen {
3092        #[doc = "Ignore RXD0 falling edge in Software Standby mode"]
3093        pub const _0: Self = Self::new(0);
3094
3095        #[doc = "Detect RXD0 falling edge in Software Standby mode"]
3096        pub const _1: Self = Self::new(1);
3097    }
3098    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3099    pub struct Snzdtcen_SPEC;
3100    pub type Snzdtcen = crate::EnumBitfieldStruct<u8, Snzdtcen_SPEC>;
3101    impl Snzdtcen {
3102        #[doc = "Disable DTC operation"]
3103        pub const _0: Self = Self::new(0);
3104
3105        #[doc = "Enable DTC operation"]
3106        pub const _1: Self = Self::new(1);
3107    }
3108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3109    pub struct Snze_SPEC;
3110    pub type Snze = crate::EnumBitfieldStruct<u8, Snze_SPEC>;
3111    impl Snze {
3112        #[doc = "Disable Snooze mode"]
3113        pub const _0: Self = Self::new(0);
3114
3115        #[doc = "Enable Snooze mode"]
3116        pub const _1: Self = Self::new(1);
3117    }
3118}
3119#[doc(hidden)]
3120#[derive(Copy, Clone, Eq, PartialEq)]
3121pub struct Snzedcr0_SPEC;
3122impl crate::sealed::RegSpec for Snzedcr0_SPEC {
3123    type DataType = u8;
3124}
3125
3126#[doc = "Snooze End Control Register 0"]
3127pub type Snzedcr0 = crate::RegValueT<Snzedcr0_SPEC>;
3128
3129impl Snzedcr0 {
3130    #[doc = "AGT1 Underflow Snooze End Enable"]
3131    #[inline(always)]
3132    pub fn agtunfed(
3133        self,
3134    ) -> crate::common::RegisterField<
3135        0,
3136        0x1,
3137        1,
3138        0,
3139        snzedcr0::Agtunfed,
3140        snzedcr0::Agtunfed,
3141        Snzedcr0_SPEC,
3142        crate::common::RW,
3143    > {
3144        crate::common::RegisterField::<
3145            0,
3146            0x1,
3147            1,
3148            0,
3149            snzedcr0::Agtunfed,
3150            snzedcr0::Agtunfed,
3151            Snzedcr0_SPEC,
3152            crate::common::RW,
3153        >::from_register(self, 0)
3154    }
3155
3156    #[doc = "Last DTC Transmission Completion Snooze End Enable"]
3157    #[inline(always)]
3158    pub fn dtczred(
3159        self,
3160    ) -> crate::common::RegisterField<
3161        1,
3162        0x1,
3163        1,
3164        0,
3165        snzedcr0::Dtczred,
3166        snzedcr0::Dtczred,
3167        Snzedcr0_SPEC,
3168        crate::common::RW,
3169    > {
3170        crate::common::RegisterField::<
3171            1,
3172            0x1,
3173            1,
3174            0,
3175            snzedcr0::Dtczred,
3176            snzedcr0::Dtczred,
3177            Snzedcr0_SPEC,
3178            crate::common::RW,
3179        >::from_register(self, 0)
3180    }
3181
3182    #[doc = "Not Last DTC Transmission Completion Snooze End Enable"]
3183    #[inline(always)]
3184    pub fn dtcnzred(
3185        self,
3186    ) -> crate::common::RegisterField<
3187        2,
3188        0x1,
3189        1,
3190        0,
3191        snzedcr0::Dtcnzred,
3192        snzedcr0::Dtcnzred,
3193        Snzedcr0_SPEC,
3194        crate::common::RW,
3195    > {
3196        crate::common::RegisterField::<
3197            2,
3198            0x1,
3199            1,
3200            0,
3201            snzedcr0::Dtcnzred,
3202            snzedcr0::Dtcnzred,
3203            Snzedcr0_SPEC,
3204            crate::common::RW,
3205        >::from_register(self, 0)
3206    }
3207
3208    #[doc = "ADC12 Compare Match Snooze End Enable"]
3209    #[inline(always)]
3210    pub fn ad0mated(
3211        self,
3212    ) -> crate::common::RegisterField<
3213        3,
3214        0x1,
3215        1,
3216        0,
3217        snzedcr0::Ad0Mated,
3218        snzedcr0::Ad0Mated,
3219        Snzedcr0_SPEC,
3220        crate::common::RW,
3221    > {
3222        crate::common::RegisterField::<
3223            3,
3224            0x1,
3225            1,
3226            0,
3227            snzedcr0::Ad0Mated,
3228            snzedcr0::Ad0Mated,
3229            Snzedcr0_SPEC,
3230            crate::common::RW,
3231        >::from_register(self, 0)
3232    }
3233
3234    #[doc = "ADC12 Compare Mismatch Snooze End Enable"]
3235    #[inline(always)]
3236    pub fn ad0umted(
3237        self,
3238    ) -> crate::common::RegisterField<
3239        4,
3240        0x1,
3241        1,
3242        0,
3243        snzedcr0::Ad0Umted,
3244        snzedcr0::Ad0Umted,
3245        Snzedcr0_SPEC,
3246        crate::common::RW,
3247    > {
3248        crate::common::RegisterField::<
3249            4,
3250            0x1,
3251            1,
3252            0,
3253            snzedcr0::Ad0Umted,
3254            snzedcr0::Ad0Umted,
3255            Snzedcr0_SPEC,
3256            crate::common::RW,
3257        >::from_register(self, 0)
3258    }
3259
3260    #[doc = "SCI0 Address Mismatch Snooze End Enable"]
3261    #[inline(always)]
3262    pub fn sci0umted(
3263        self,
3264    ) -> crate::common::RegisterField<
3265        7,
3266        0x1,
3267        1,
3268        0,
3269        snzedcr0::Sci0Umted,
3270        snzedcr0::Sci0Umted,
3271        Snzedcr0_SPEC,
3272        crate::common::RW,
3273    > {
3274        crate::common::RegisterField::<
3275            7,
3276            0x1,
3277            1,
3278            0,
3279            snzedcr0::Sci0Umted,
3280            snzedcr0::Sci0Umted,
3281            Snzedcr0_SPEC,
3282            crate::common::RW,
3283        >::from_register(self, 0)
3284    }
3285}
3286impl ::core::default::Default for Snzedcr0 {
3287    #[inline(always)]
3288    fn default() -> Snzedcr0 {
3289        <crate::RegValueT<Snzedcr0_SPEC> as RegisterValue<_>>::new(0)
3290    }
3291}
3292pub mod snzedcr0 {
3293
3294    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3295    pub struct Agtunfed_SPEC;
3296    pub type Agtunfed = crate::EnumBitfieldStruct<u8, Agtunfed_SPEC>;
3297    impl Agtunfed {
3298        #[doc = "Disable the snooze end request"]
3299        pub const _0: Self = Self::new(0);
3300
3301        #[doc = "Enable the snooze end request"]
3302        pub const _1: Self = Self::new(1);
3303    }
3304    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3305    pub struct Dtczred_SPEC;
3306    pub type Dtczred = crate::EnumBitfieldStruct<u8, Dtczred_SPEC>;
3307    impl Dtczred {
3308        #[doc = "Disable the snooze end request"]
3309        pub const _0: Self = Self::new(0);
3310
3311        #[doc = "Enable the snooze end request"]
3312        pub const _1: Self = Self::new(1);
3313    }
3314    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3315    pub struct Dtcnzred_SPEC;
3316    pub type Dtcnzred = crate::EnumBitfieldStruct<u8, Dtcnzred_SPEC>;
3317    impl Dtcnzred {
3318        #[doc = "Disable the snooze end request"]
3319        pub const _0: Self = Self::new(0);
3320
3321        #[doc = "Enable the snooze end request"]
3322        pub const _1: Self = Self::new(1);
3323    }
3324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3325    pub struct Ad0Mated_SPEC;
3326    pub type Ad0Mated = crate::EnumBitfieldStruct<u8, Ad0Mated_SPEC>;
3327    impl Ad0Mated {
3328        #[doc = "Disable the snooze end request"]
3329        pub const _0: Self = Self::new(0);
3330
3331        #[doc = "Enable the snooze end request"]
3332        pub const _1: Self = Self::new(1);
3333    }
3334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3335    pub struct Ad0Umted_SPEC;
3336    pub type Ad0Umted = crate::EnumBitfieldStruct<u8, Ad0Umted_SPEC>;
3337    impl Ad0Umted {
3338        #[doc = "Disable the snooze end request"]
3339        pub const _0: Self = Self::new(0);
3340
3341        #[doc = "Enable the snooze end request"]
3342        pub const _1: Self = Self::new(1);
3343    }
3344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3345    pub struct Sci0Umted_SPEC;
3346    pub type Sci0Umted = crate::EnumBitfieldStruct<u8, Sci0Umted_SPEC>;
3347    impl Sci0Umted {
3348        #[doc = "Disable the snooze end request"]
3349        pub const _0: Self = Self::new(0);
3350
3351        #[doc = "Enable the snooze end request"]
3352        pub const _1: Self = Self::new(1);
3353    }
3354}
3355#[doc(hidden)]
3356#[derive(Copy, Clone, Eq, PartialEq)]
3357pub struct Snzedcr1_SPEC;
3358impl crate::sealed::RegSpec for Snzedcr1_SPEC {
3359    type DataType = u8;
3360}
3361
3362#[doc = "Snooze End Control Register 1"]
3363pub type Snzedcr1 = crate::RegValueT<Snzedcr1_SPEC>;
3364
3365impl Snzedcr1 {
3366    #[doc = "AGT3 underflow Snooze End Enable"]
3367    #[inline(always)]
3368    pub fn agt3unfed(
3369        self,
3370    ) -> crate::common::RegisterField<
3371        0,
3372        0x1,
3373        1,
3374        0,
3375        snzedcr1::Agt3Unfed,
3376        snzedcr1::Agt3Unfed,
3377        Snzedcr1_SPEC,
3378        crate::common::RW,
3379    > {
3380        crate::common::RegisterField::<
3381            0,
3382            0x1,
3383            1,
3384            0,
3385            snzedcr1::Agt3Unfed,
3386            snzedcr1::Agt3Unfed,
3387            Snzedcr1_SPEC,
3388            crate::common::RW,
3389        >::from_register(self, 0)
3390    }
3391}
3392impl ::core::default::Default for Snzedcr1 {
3393    #[inline(always)]
3394    fn default() -> Snzedcr1 {
3395        <crate::RegValueT<Snzedcr1_SPEC> as RegisterValue<_>>::new(0)
3396    }
3397}
3398pub mod snzedcr1 {
3399
3400    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3401    pub struct Agt3Unfed_SPEC;
3402    pub type Agt3Unfed = crate::EnumBitfieldStruct<u8, Agt3Unfed_SPEC>;
3403    impl Agt3Unfed {
3404        #[doc = "Disable the Snooze End request"]
3405        pub const _0: Self = Self::new(0);
3406
3407        #[doc = "Enable the Snooze End request"]
3408        pub const _1: Self = Self::new(1);
3409    }
3410}
3411#[doc(hidden)]
3412#[derive(Copy, Clone, Eq, PartialEq)]
3413pub struct Snzreqcr0_SPEC;
3414impl crate::sealed::RegSpec for Snzreqcr0_SPEC {
3415    type DataType = u32;
3416}
3417
3418#[doc = "Snooze Request Control Register 0"]
3419pub type Snzreqcr0 = crate::RegValueT<Snzreqcr0_SPEC>;
3420
3421impl Snzreqcr0 {
3422    #[doc = "Enable IRQ0 pin snooze request"]
3423    #[inline(always)]
3424    pub fn snzreqen0(
3425        self,
3426    ) -> crate::common::RegisterField<
3427        0,
3428        0x1,
3429        1,
3430        0,
3431        snzreqcr0::Snzreqen0,
3432        snzreqcr0::Snzreqen0,
3433        Snzreqcr0_SPEC,
3434        crate::common::RW,
3435    > {
3436        crate::common::RegisterField::<
3437            0,
3438            0x1,
3439            1,
3440            0,
3441            snzreqcr0::Snzreqen0,
3442            snzreqcr0::Snzreqen0,
3443            Snzreqcr0_SPEC,
3444            crate::common::RW,
3445        >::from_register(self, 0)
3446    }
3447
3448    #[doc = "Enable IRQ1 pin snooze request"]
3449    #[inline(always)]
3450    pub fn snzreqen1(
3451        self,
3452    ) -> crate::common::RegisterField<
3453        1,
3454        0x1,
3455        1,
3456        0,
3457        snzreqcr0::Snzreqen1,
3458        snzreqcr0::Snzreqen1,
3459        Snzreqcr0_SPEC,
3460        crate::common::RW,
3461    > {
3462        crate::common::RegisterField::<
3463            1,
3464            0x1,
3465            1,
3466            0,
3467            snzreqcr0::Snzreqen1,
3468            snzreqcr0::Snzreqen1,
3469            Snzreqcr0_SPEC,
3470            crate::common::RW,
3471        >::from_register(self, 0)
3472    }
3473
3474    #[doc = "Enable IRQ2 pin snooze request"]
3475    #[inline(always)]
3476    pub fn snzreqen2(
3477        self,
3478    ) -> crate::common::RegisterField<
3479        2,
3480        0x1,
3481        1,
3482        0,
3483        snzreqcr0::Snzreqen2,
3484        snzreqcr0::Snzreqen2,
3485        Snzreqcr0_SPEC,
3486        crate::common::RW,
3487    > {
3488        crate::common::RegisterField::<
3489            2,
3490            0x1,
3491            1,
3492            0,
3493            snzreqcr0::Snzreqen2,
3494            snzreqcr0::Snzreqen2,
3495            Snzreqcr0_SPEC,
3496            crate::common::RW,
3497        >::from_register(self, 0)
3498    }
3499
3500    #[doc = "Enable IRQ3 pin snooze request"]
3501    #[inline(always)]
3502    pub fn snzreqen3(
3503        self,
3504    ) -> crate::common::RegisterField<
3505        3,
3506        0x1,
3507        1,
3508        0,
3509        snzreqcr0::Snzreqen3,
3510        snzreqcr0::Snzreqen3,
3511        Snzreqcr0_SPEC,
3512        crate::common::RW,
3513    > {
3514        crate::common::RegisterField::<
3515            3,
3516            0x1,
3517            1,
3518            0,
3519            snzreqcr0::Snzreqen3,
3520            snzreqcr0::Snzreqen3,
3521            Snzreqcr0_SPEC,
3522            crate::common::RW,
3523        >::from_register(self, 0)
3524    }
3525
3526    #[doc = "Enable IRQ4 pin snooze request"]
3527    #[inline(always)]
3528    pub fn snzreqen4(
3529        self,
3530    ) -> crate::common::RegisterField<
3531        4,
3532        0x1,
3533        1,
3534        0,
3535        snzreqcr0::Snzreqen4,
3536        snzreqcr0::Snzreqen4,
3537        Snzreqcr0_SPEC,
3538        crate::common::RW,
3539    > {
3540        crate::common::RegisterField::<
3541            4,
3542            0x1,
3543            1,
3544            0,
3545            snzreqcr0::Snzreqen4,
3546            snzreqcr0::Snzreqen4,
3547            Snzreqcr0_SPEC,
3548            crate::common::RW,
3549        >::from_register(self, 0)
3550    }
3551
3552    #[doc = "Enable IRQ5 pin snooze request"]
3553    #[inline(always)]
3554    pub fn snzreqen5(
3555        self,
3556    ) -> crate::common::RegisterField<
3557        5,
3558        0x1,
3559        1,
3560        0,
3561        snzreqcr0::Snzreqen5,
3562        snzreqcr0::Snzreqen5,
3563        Snzreqcr0_SPEC,
3564        crate::common::RW,
3565    > {
3566        crate::common::RegisterField::<
3567            5,
3568            0x1,
3569            1,
3570            0,
3571            snzreqcr0::Snzreqen5,
3572            snzreqcr0::Snzreqen5,
3573            Snzreqcr0_SPEC,
3574            crate::common::RW,
3575        >::from_register(self, 0)
3576    }
3577
3578    #[doc = "Enable IRQ6 pin snooze request"]
3579    #[inline(always)]
3580    pub fn snzreqen6(
3581        self,
3582    ) -> crate::common::RegisterField<
3583        6,
3584        0x1,
3585        1,
3586        0,
3587        snzreqcr0::Snzreqen6,
3588        snzreqcr0::Snzreqen6,
3589        Snzreqcr0_SPEC,
3590        crate::common::RW,
3591    > {
3592        crate::common::RegisterField::<
3593            6,
3594            0x1,
3595            1,
3596            0,
3597            snzreqcr0::Snzreqen6,
3598            snzreqcr0::Snzreqen6,
3599            Snzreqcr0_SPEC,
3600            crate::common::RW,
3601        >::from_register(self, 0)
3602    }
3603
3604    #[doc = "Enable IRQ7 pin snooze request"]
3605    #[inline(always)]
3606    pub fn snzreqen7(
3607        self,
3608    ) -> crate::common::RegisterField<
3609        7,
3610        0x1,
3611        1,
3612        0,
3613        snzreqcr0::Snzreqen7,
3614        snzreqcr0::Snzreqen7,
3615        Snzreqcr0_SPEC,
3616        crate::common::RW,
3617    > {
3618        crate::common::RegisterField::<
3619            7,
3620            0x1,
3621            1,
3622            0,
3623            snzreqcr0::Snzreqen7,
3624            snzreqcr0::Snzreqen7,
3625            Snzreqcr0_SPEC,
3626            crate::common::RW,
3627        >::from_register(self, 0)
3628    }
3629
3630    #[doc = "Enable IRQ8 pin snooze request"]
3631    #[inline(always)]
3632    pub fn snzreqen8(
3633        self,
3634    ) -> crate::common::RegisterField<
3635        8,
3636        0x1,
3637        1,
3638        0,
3639        snzreqcr0::Snzreqen8,
3640        snzreqcr0::Snzreqen8,
3641        Snzreqcr0_SPEC,
3642        crate::common::RW,
3643    > {
3644        crate::common::RegisterField::<
3645            8,
3646            0x1,
3647            1,
3648            0,
3649            snzreqcr0::Snzreqen8,
3650            snzreqcr0::Snzreqen8,
3651            Snzreqcr0_SPEC,
3652            crate::common::RW,
3653        >::from_register(self, 0)
3654    }
3655
3656    #[doc = "Enable IRQ9 pin snooze request"]
3657    #[inline(always)]
3658    pub fn snzreqen9(
3659        self,
3660    ) -> crate::common::RegisterField<
3661        9,
3662        0x1,
3663        1,
3664        0,
3665        snzreqcr0::Snzreqen9,
3666        snzreqcr0::Snzreqen9,
3667        Snzreqcr0_SPEC,
3668        crate::common::RW,
3669    > {
3670        crate::common::RegisterField::<
3671            9,
3672            0x1,
3673            1,
3674            0,
3675            snzreqcr0::Snzreqen9,
3676            snzreqcr0::Snzreqen9,
3677            Snzreqcr0_SPEC,
3678            crate::common::RW,
3679        >::from_register(self, 0)
3680    }
3681
3682    #[doc = "Enable IRQ13 pin snooze request"]
3683    #[inline(always)]
3684    pub fn snzreqen13(
3685        self,
3686    ) -> crate::common::RegisterField<
3687        13,
3688        0x1,
3689        1,
3690        0,
3691        snzreqcr0::Snzreqen13,
3692        snzreqcr0::Snzreqen13,
3693        Snzreqcr0_SPEC,
3694        crate::common::RW,
3695    > {
3696        crate::common::RegisterField::<
3697            13,
3698            0x1,
3699            1,
3700            0,
3701            snzreqcr0::Snzreqen13,
3702            snzreqcr0::Snzreqen13,
3703            Snzreqcr0_SPEC,
3704            crate::common::RW,
3705        >::from_register(self, 0)
3706    }
3707
3708    #[doc = "Enable RTC alarm snooze request"]
3709    #[inline(always)]
3710    pub fn snzreqen24(
3711        self,
3712    ) -> crate::common::RegisterField<
3713        24,
3714        0x1,
3715        1,
3716        0,
3717        snzreqcr0::Snzreqen24,
3718        snzreqcr0::Snzreqen24,
3719        Snzreqcr0_SPEC,
3720        crate::common::RW,
3721    > {
3722        crate::common::RegisterField::<
3723            24,
3724            0x1,
3725            1,
3726            0,
3727            snzreqcr0::Snzreqen24,
3728            snzreqcr0::Snzreqen24,
3729            Snzreqcr0_SPEC,
3730            crate::common::RW,
3731        >::from_register(self, 0)
3732    }
3733
3734    #[doc = "Enable RTC period snooze request"]
3735    #[inline(always)]
3736    pub fn snzreqen25(
3737        self,
3738    ) -> crate::common::RegisterField<
3739        25,
3740        0x1,
3741        1,
3742        0,
3743        snzreqcr0::Snzreqen25,
3744        snzreqcr0::Snzreqen25,
3745        Snzreqcr0_SPEC,
3746        crate::common::RW,
3747    > {
3748        crate::common::RegisterField::<
3749            25,
3750            0x1,
3751            1,
3752            0,
3753            snzreqcr0::Snzreqen25,
3754            snzreqcr0::Snzreqen25,
3755            Snzreqcr0_SPEC,
3756            crate::common::RW,
3757        >::from_register(self, 0)
3758    }
3759
3760    #[doc = "Enable AGT1 underflow snooze request"]
3761    #[inline(always)]
3762    pub fn snzreqen28(
3763        self,
3764    ) -> crate::common::RegisterField<
3765        28,
3766        0x1,
3767        1,
3768        0,
3769        snzreqcr0::Snzreqen28,
3770        snzreqcr0::Snzreqen28,
3771        Snzreqcr0_SPEC,
3772        crate::common::RW,
3773    > {
3774        crate::common::RegisterField::<
3775            28,
3776            0x1,
3777            1,
3778            0,
3779            snzreqcr0::Snzreqen28,
3780            snzreqcr0::Snzreqen28,
3781            Snzreqcr0_SPEC,
3782            crate::common::RW,
3783        >::from_register(self, 0)
3784    }
3785
3786    #[doc = "Enable AGT1 compare match A snooze request"]
3787    #[inline(always)]
3788    pub fn snzreqen29(
3789        self,
3790    ) -> crate::common::RegisterField<
3791        29,
3792        0x1,
3793        1,
3794        0,
3795        snzreqcr0::Snzreqen29,
3796        snzreqcr0::Snzreqen29,
3797        Snzreqcr0_SPEC,
3798        crate::common::RW,
3799    > {
3800        crate::common::RegisterField::<
3801            29,
3802            0x1,
3803            1,
3804            0,
3805            snzreqcr0::Snzreqen29,
3806            snzreqcr0::Snzreqen29,
3807            Snzreqcr0_SPEC,
3808            crate::common::RW,
3809        >::from_register(self, 0)
3810    }
3811
3812    #[doc = "Enable AGT1 compare match B snooze request"]
3813    #[inline(always)]
3814    pub fn snzreqen30(
3815        self,
3816    ) -> crate::common::RegisterField<
3817        30,
3818        0x1,
3819        1,
3820        0,
3821        snzreqcr0::Snzreqen30,
3822        snzreqcr0::Snzreqen30,
3823        Snzreqcr0_SPEC,
3824        crate::common::RW,
3825    > {
3826        crate::common::RegisterField::<
3827            30,
3828            0x1,
3829            1,
3830            0,
3831            snzreqcr0::Snzreqen30,
3832            snzreqcr0::Snzreqen30,
3833            Snzreqcr0_SPEC,
3834            crate::common::RW,
3835        >::from_register(self, 0)
3836    }
3837}
3838impl ::core::default::Default for Snzreqcr0 {
3839    #[inline(always)]
3840    fn default() -> Snzreqcr0 {
3841        <crate::RegValueT<Snzreqcr0_SPEC> as RegisterValue<_>>::new(0)
3842    }
3843}
3844pub mod snzreqcr0 {
3845
3846    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3847    pub struct Snzreqen0_SPEC;
3848    pub type Snzreqen0 = crate::EnumBitfieldStruct<u8, Snzreqen0_SPEC>;
3849    impl Snzreqen0 {
3850        #[doc = "Disable the snooze request"]
3851        pub const _0: Self = Self::new(0);
3852
3853        #[doc = "Enable the snooze request"]
3854        pub const _1: Self = Self::new(1);
3855    }
3856    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3857    pub struct Snzreqen1_SPEC;
3858    pub type Snzreqen1 = crate::EnumBitfieldStruct<u8, Snzreqen1_SPEC>;
3859    impl Snzreqen1 {
3860        #[doc = "Disable the snooze request"]
3861        pub const _0: Self = Self::new(0);
3862
3863        #[doc = "Enable the snooze request"]
3864        pub const _1: Self = Self::new(1);
3865    }
3866    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3867    pub struct Snzreqen2_SPEC;
3868    pub type Snzreqen2 = crate::EnumBitfieldStruct<u8, Snzreqen2_SPEC>;
3869    impl Snzreqen2 {
3870        #[doc = "Disable the snooze request"]
3871        pub const _0: Self = Self::new(0);
3872
3873        #[doc = "Enable the snooze request"]
3874        pub const _1: Self = Self::new(1);
3875    }
3876    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3877    pub struct Snzreqen3_SPEC;
3878    pub type Snzreqen3 = crate::EnumBitfieldStruct<u8, Snzreqen3_SPEC>;
3879    impl Snzreqen3 {
3880        #[doc = "Disable the snooze request"]
3881        pub const _0: Self = Self::new(0);
3882
3883        #[doc = "Enable the snooze request"]
3884        pub const _1: Self = Self::new(1);
3885    }
3886    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3887    pub struct Snzreqen4_SPEC;
3888    pub type Snzreqen4 = crate::EnumBitfieldStruct<u8, Snzreqen4_SPEC>;
3889    impl Snzreqen4 {
3890        #[doc = "Disable the snooze request"]
3891        pub const _0: Self = Self::new(0);
3892
3893        #[doc = "Enable the snooze request"]
3894        pub const _1: Self = Self::new(1);
3895    }
3896    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3897    pub struct Snzreqen5_SPEC;
3898    pub type Snzreqen5 = crate::EnumBitfieldStruct<u8, Snzreqen5_SPEC>;
3899    impl Snzreqen5 {
3900        #[doc = "Disable the snooze request"]
3901        pub const _0: Self = Self::new(0);
3902
3903        #[doc = "Enable the snooze request"]
3904        pub const _1: Self = Self::new(1);
3905    }
3906    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3907    pub struct Snzreqen6_SPEC;
3908    pub type Snzreqen6 = crate::EnumBitfieldStruct<u8, Snzreqen6_SPEC>;
3909    impl Snzreqen6 {
3910        #[doc = "Disable the snooze request"]
3911        pub const _0: Self = Self::new(0);
3912
3913        #[doc = "Enable the snooze request"]
3914        pub const _1: Self = Self::new(1);
3915    }
3916    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3917    pub struct Snzreqen7_SPEC;
3918    pub type Snzreqen7 = crate::EnumBitfieldStruct<u8, Snzreqen7_SPEC>;
3919    impl Snzreqen7 {
3920        #[doc = "Disable the snooze request"]
3921        pub const _0: Self = Self::new(0);
3922
3923        #[doc = "Enable the snooze request"]
3924        pub const _1: Self = Self::new(1);
3925    }
3926    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3927    pub struct Snzreqen8_SPEC;
3928    pub type Snzreqen8 = crate::EnumBitfieldStruct<u8, Snzreqen8_SPEC>;
3929    impl Snzreqen8 {
3930        #[doc = "Disable the snooze request"]
3931        pub const _0: Self = Self::new(0);
3932
3933        #[doc = "Enable the snooze request"]
3934        pub const _1: Self = Self::new(1);
3935    }
3936    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3937    pub struct Snzreqen9_SPEC;
3938    pub type Snzreqen9 = crate::EnumBitfieldStruct<u8, Snzreqen9_SPEC>;
3939    impl Snzreqen9 {
3940        #[doc = "Disable the snooze request"]
3941        pub const _0: Self = Self::new(0);
3942
3943        #[doc = "Enable the snooze request"]
3944        pub const _1: Self = Self::new(1);
3945    }
3946    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3947    pub struct Snzreqen13_SPEC;
3948    pub type Snzreqen13 = crate::EnumBitfieldStruct<u8, Snzreqen13_SPEC>;
3949    impl Snzreqen13 {
3950        #[doc = "Disable the snooze request"]
3951        pub const _0: Self = Self::new(0);
3952
3953        #[doc = "Enable the snooze request"]
3954        pub const _1: Self = Self::new(1);
3955    }
3956    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3957    pub struct Snzreqen24_SPEC;
3958    pub type Snzreqen24 = crate::EnumBitfieldStruct<u8, Snzreqen24_SPEC>;
3959    impl Snzreqen24 {
3960        #[doc = "Disable the snooze request"]
3961        pub const _0: Self = Self::new(0);
3962
3963        #[doc = "Enable the snooze request"]
3964        pub const _1: Self = Self::new(1);
3965    }
3966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3967    pub struct Snzreqen25_SPEC;
3968    pub type Snzreqen25 = crate::EnumBitfieldStruct<u8, Snzreqen25_SPEC>;
3969    impl Snzreqen25 {
3970        #[doc = "Disable the snooze request"]
3971        pub const _0: Self = Self::new(0);
3972
3973        #[doc = "Enable the snooze request"]
3974        pub const _1: Self = Self::new(1);
3975    }
3976    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3977    pub struct Snzreqen28_SPEC;
3978    pub type Snzreqen28 = crate::EnumBitfieldStruct<u8, Snzreqen28_SPEC>;
3979    impl Snzreqen28 {
3980        #[doc = "Disable the snooze request"]
3981        pub const _0: Self = Self::new(0);
3982
3983        #[doc = "Enable the snooze request"]
3984        pub const _1: Self = Self::new(1);
3985    }
3986    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3987    pub struct Snzreqen29_SPEC;
3988    pub type Snzreqen29 = crate::EnumBitfieldStruct<u8, Snzreqen29_SPEC>;
3989    impl Snzreqen29 {
3990        #[doc = "Disable the snooze request"]
3991        pub const _0: Self = Self::new(0);
3992
3993        #[doc = "Enable the snooze request"]
3994        pub const _1: Self = Self::new(1);
3995    }
3996    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3997    pub struct Snzreqen30_SPEC;
3998    pub type Snzreqen30 = crate::EnumBitfieldStruct<u8, Snzreqen30_SPEC>;
3999    impl Snzreqen30 {
4000        #[doc = "Disable the snooze request"]
4001        pub const _0: Self = Self::new(0);
4002
4003        #[doc = "Enable the snooze request"]
4004        pub const _1: Self = Self::new(1);
4005    }
4006}
4007#[doc(hidden)]
4008#[derive(Copy, Clone, Eq, PartialEq)]
4009pub struct Opccr_SPEC;
4010impl crate::sealed::RegSpec for Opccr_SPEC {
4011    type DataType = u8;
4012}
4013
4014#[doc = "Operating Power Control Register"]
4015pub type Opccr = crate::RegValueT<Opccr_SPEC>;
4016
4017impl Opccr {
4018    #[doc = "Operating Power Control Mode Select"]
4019    #[inline(always)]
4020    pub fn opcm(
4021        self,
4022    ) -> crate::common::RegisterField<
4023        0,
4024        0x3,
4025        1,
4026        0,
4027        opccr::Opcm,
4028        opccr::Opcm,
4029        Opccr_SPEC,
4030        crate::common::RW,
4031    > {
4032        crate::common::RegisterField::<
4033            0,
4034            0x3,
4035            1,
4036            0,
4037            opccr::Opcm,
4038            opccr::Opcm,
4039            Opccr_SPEC,
4040            crate::common::RW,
4041        >::from_register(self, 0)
4042    }
4043
4044    #[doc = "Operating Power Control Mode Transition Status Flag"]
4045    #[inline(always)]
4046    pub fn opcmtsf(
4047        self,
4048    ) -> crate::common::RegisterField<
4049        4,
4050        0x1,
4051        1,
4052        0,
4053        opccr::Opcmtsf,
4054        opccr::Opcmtsf,
4055        Opccr_SPEC,
4056        crate::common::R,
4057    > {
4058        crate::common::RegisterField::<
4059            4,
4060            0x1,
4061            1,
4062            0,
4063            opccr::Opcmtsf,
4064            opccr::Opcmtsf,
4065            Opccr_SPEC,
4066            crate::common::R,
4067        >::from_register(self, 0)
4068    }
4069}
4070impl ::core::default::Default for Opccr {
4071    #[inline(always)]
4072    fn default() -> Opccr {
4073        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
4074    }
4075}
4076pub mod opccr {
4077
4078    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4079    pub struct Opcm_SPEC;
4080    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
4081    impl Opcm {
4082        #[doc = "High-speed mode"]
4083        pub const _00: Self = Self::new(0);
4084
4085        #[doc = "Setting prohibited"]
4086        pub const _01: Self = Self::new(1);
4087
4088        #[doc = "Setting prohibited"]
4089        pub const _10: Self = Self::new(2);
4090
4091        #[doc = "Low-speed mode"]
4092        pub const _11: Self = Self::new(3);
4093    }
4094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4095    pub struct Opcmtsf_SPEC;
4096    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
4097    impl Opcmtsf {
4098        #[doc = "Transition completed"]
4099        pub const _0: Self = Self::new(0);
4100
4101        #[doc = "During transition"]
4102        pub const _1: Self = Self::new(1);
4103    }
4104}
4105#[doc(hidden)]
4106#[derive(Copy, Clone, Eq, PartialEq)]
4107pub struct Moscwtcr_SPEC;
4108impl crate::sealed::RegSpec for Moscwtcr_SPEC {
4109    type DataType = u8;
4110}
4111
4112#[doc = "Main Clock Oscillator Wait Control Register"]
4113pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
4114
4115impl Moscwtcr {
4116    #[doc = "Main Clock Oscillator Wait Time Setting"]
4117    #[inline(always)]
4118    pub fn msts(
4119        self,
4120    ) -> crate::common::RegisterField<
4121        0,
4122        0xf,
4123        1,
4124        0,
4125        moscwtcr::Msts,
4126        moscwtcr::Msts,
4127        Moscwtcr_SPEC,
4128        crate::common::RW,
4129    > {
4130        crate::common::RegisterField::<
4131            0,
4132            0xf,
4133            1,
4134            0,
4135            moscwtcr::Msts,
4136            moscwtcr::Msts,
4137            Moscwtcr_SPEC,
4138            crate::common::RW,
4139        >::from_register(self, 0)
4140    }
4141}
4142impl ::core::default::Default for Moscwtcr {
4143    #[inline(always)]
4144    fn default() -> Moscwtcr {
4145        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
4146    }
4147}
4148pub mod moscwtcr {
4149
4150    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4151    pub struct Msts_SPEC;
4152    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
4153    impl Msts {
4154        #[doc = "Wait time = 3 cycles (11.4 us)"]
4155        pub const _0_X_0: Self = Self::new(0);
4156
4157        #[doc = "Wait time = 35 cycles (133.5 us)"]
4158        pub const _0_X_1: Self = Self::new(1);
4159
4160        #[doc = "Wait time = 67 cycles (255.6 us)"]
4161        pub const _0_X_2: Self = Self::new(2);
4162
4163        #[doc = "Wait time = 131 cycles (499.7 us)"]
4164        pub const _0_X_3: Self = Self::new(3);
4165
4166        #[doc = "Wait time = 259 cycles (988.0 us)"]
4167        pub const _0_X_4: Self = Self::new(4);
4168
4169        #[doc = "Wait time = 547 cycles (2086.6 us)"]
4170        pub const _0_X_5: Self = Self::new(5);
4171
4172        #[doc = "Wait time = 1059 cycles (4039.8 us)"]
4173        pub const _0_X_6: Self = Self::new(6);
4174
4175        #[doc = "Wait time = 2147 cycles (8190.2 us)"]
4176        pub const _0_X_7: Self = Self::new(7);
4177
4178        #[doc = "Wait time = 4291 cycles (16368.9 us)"]
4179        pub const _0_X_8: Self = Self::new(8);
4180
4181        #[doc = "Wait time = 8163 cycles (31139.4 us)"]
4182        pub const _0_X_9: Self = Self::new(9);
4183    }
4184}
4185#[doc(hidden)]
4186#[derive(Copy, Clone, Eq, PartialEq)]
4187pub struct Sopccr_SPEC;
4188impl crate::sealed::RegSpec for Sopccr_SPEC {
4189    type DataType = u8;
4190}
4191
4192#[doc = "Sub Operating Power Control Register"]
4193pub type Sopccr = crate::RegValueT<Sopccr_SPEC>;
4194
4195impl Sopccr {
4196    #[doc = "Sub Operating Power Control Mode Select"]
4197    #[inline(always)]
4198    pub fn sopcm(
4199        self,
4200    ) -> crate::common::RegisterField<
4201        0,
4202        0x1,
4203        1,
4204        0,
4205        sopccr::Sopcm,
4206        sopccr::Sopcm,
4207        Sopccr_SPEC,
4208        crate::common::RW,
4209    > {
4210        crate::common::RegisterField::<
4211            0,
4212            0x1,
4213            1,
4214            0,
4215            sopccr::Sopcm,
4216            sopccr::Sopcm,
4217            Sopccr_SPEC,
4218            crate::common::RW,
4219        >::from_register(self, 0)
4220    }
4221
4222    #[doc = "Operating Power Control Mode Transition Status Flag"]
4223    #[inline(always)]
4224    pub fn sopcmtsf(
4225        self,
4226    ) -> crate::common::RegisterField<
4227        4,
4228        0x1,
4229        1,
4230        0,
4231        sopccr::Sopcmtsf,
4232        sopccr::Sopcmtsf,
4233        Sopccr_SPEC,
4234        crate::common::R,
4235    > {
4236        crate::common::RegisterField::<
4237            4,
4238            0x1,
4239            1,
4240            0,
4241            sopccr::Sopcmtsf,
4242            sopccr::Sopcmtsf,
4243            Sopccr_SPEC,
4244            crate::common::R,
4245        >::from_register(self, 0)
4246    }
4247}
4248impl ::core::default::Default for Sopccr {
4249    #[inline(always)]
4250    fn default() -> Sopccr {
4251        <crate::RegValueT<Sopccr_SPEC> as RegisterValue<_>>::new(0)
4252    }
4253}
4254pub mod sopccr {
4255
4256    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4257    pub struct Sopcm_SPEC;
4258    pub type Sopcm = crate::EnumBitfieldStruct<u8, Sopcm_SPEC>;
4259    impl Sopcm {
4260        #[doc = "Other than Subosc-speed mode"]
4261        pub const _0: Self = Self::new(0);
4262
4263        #[doc = "Subosc-speed mode"]
4264        pub const _1: Self = Self::new(1);
4265    }
4266    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4267    pub struct Sopcmtsf_SPEC;
4268    pub type Sopcmtsf = crate::EnumBitfieldStruct<u8, Sopcmtsf_SPEC>;
4269    impl Sopcmtsf {
4270        #[doc = "Transition completed"]
4271        pub const _0: Self = Self::new(0);
4272
4273        #[doc = "During transition"]
4274        pub const _1: Self = Self::new(1);
4275    }
4276}
4277#[doc(hidden)]
4278#[derive(Copy, Clone, Eq, PartialEq)]
4279pub struct Rstsr1_SPEC;
4280impl crate::sealed::RegSpec for Rstsr1_SPEC {
4281    type DataType = u16;
4282}
4283
4284#[doc = "Reset Status Register 1"]
4285pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
4286
4287impl Rstsr1 {
4288    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
4289    #[inline(always)]
4290    pub fn iwdtrf(
4291        self,
4292    ) -> crate::common::RegisterField<
4293        0,
4294        0x1,
4295        1,
4296        0,
4297        rstsr1::Iwdtrf,
4298        rstsr1::Iwdtrf,
4299        Rstsr1_SPEC,
4300        crate::common::RW,
4301    > {
4302        crate::common::RegisterField::<
4303            0,
4304            0x1,
4305            1,
4306            0,
4307            rstsr1::Iwdtrf,
4308            rstsr1::Iwdtrf,
4309            Rstsr1_SPEC,
4310            crate::common::RW,
4311        >::from_register(self, 0)
4312    }
4313
4314    #[doc = "Watchdog Timer Reset Detect Flag"]
4315    #[inline(always)]
4316    pub fn wdtrf(
4317        self,
4318    ) -> crate::common::RegisterField<
4319        1,
4320        0x1,
4321        1,
4322        0,
4323        rstsr1::Wdtrf,
4324        rstsr1::Wdtrf,
4325        Rstsr1_SPEC,
4326        crate::common::RW,
4327    > {
4328        crate::common::RegisterField::<
4329            1,
4330            0x1,
4331            1,
4332            0,
4333            rstsr1::Wdtrf,
4334            rstsr1::Wdtrf,
4335            Rstsr1_SPEC,
4336            crate::common::RW,
4337        >::from_register(self, 0)
4338    }
4339
4340    #[doc = "Software Reset Detect Flag"]
4341    #[inline(always)]
4342    pub fn swrf(
4343        self,
4344    ) -> crate::common::RegisterField<
4345        2,
4346        0x1,
4347        1,
4348        0,
4349        rstsr1::Swrf,
4350        rstsr1::Swrf,
4351        Rstsr1_SPEC,
4352        crate::common::RW,
4353    > {
4354        crate::common::RegisterField::<
4355            2,
4356            0x1,
4357            1,
4358            0,
4359            rstsr1::Swrf,
4360            rstsr1::Swrf,
4361            Rstsr1_SPEC,
4362            crate::common::RW,
4363        >::from_register(self, 0)
4364    }
4365
4366    #[doc = "SRAM Parity Error Reset Detect Flag"]
4367    #[inline(always)]
4368    pub fn rperf(
4369        self,
4370    ) -> crate::common::RegisterField<
4371        8,
4372        0x1,
4373        1,
4374        0,
4375        rstsr1::Rperf,
4376        rstsr1::Rperf,
4377        Rstsr1_SPEC,
4378        crate::common::RW,
4379    > {
4380        crate::common::RegisterField::<
4381            8,
4382            0x1,
4383            1,
4384            0,
4385            rstsr1::Rperf,
4386            rstsr1::Rperf,
4387            Rstsr1_SPEC,
4388            crate::common::RW,
4389        >::from_register(self, 0)
4390    }
4391
4392    #[doc = "Bus Master MPU Error Reset Detect Flag"]
4393    #[inline(always)]
4394    pub fn busmrf(
4395        self,
4396    ) -> crate::common::RegisterField<
4397        11,
4398        0x1,
4399        1,
4400        0,
4401        rstsr1::Busmrf,
4402        rstsr1::Busmrf,
4403        Rstsr1_SPEC,
4404        crate::common::RW,
4405    > {
4406        crate::common::RegisterField::<
4407            11,
4408            0x1,
4409            1,
4410            0,
4411            rstsr1::Busmrf,
4412            rstsr1::Busmrf,
4413            Rstsr1_SPEC,
4414            crate::common::RW,
4415        >::from_register(self, 0)
4416    }
4417
4418    #[doc = "TrustZone Error Reset Detect Flag"]
4419    #[inline(always)]
4420    pub fn tzerf(
4421        self,
4422    ) -> crate::common::RegisterField<
4423        13,
4424        0x1,
4425        1,
4426        0,
4427        rstsr1::Tzerf,
4428        rstsr1::Tzerf,
4429        Rstsr1_SPEC,
4430        crate::common::RW,
4431    > {
4432        crate::common::RegisterField::<
4433            13,
4434            0x1,
4435            1,
4436            0,
4437            rstsr1::Tzerf,
4438            rstsr1::Tzerf,
4439            Rstsr1_SPEC,
4440            crate::common::RW,
4441        >::from_register(self, 0)
4442    }
4443}
4444impl ::core::default::Default for Rstsr1 {
4445    #[inline(always)]
4446    fn default() -> Rstsr1 {
4447        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
4448    }
4449}
4450pub mod rstsr1 {
4451
4452    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4453    pub struct Iwdtrf_SPEC;
4454    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
4455    impl Iwdtrf {
4456        #[doc = "Independent watchdog timer reset not detected"]
4457        pub const _0: Self = Self::new(0);
4458
4459        #[doc = "Independent watchdog timer reset detected"]
4460        pub const _1: Self = Self::new(1);
4461    }
4462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4463    pub struct Wdtrf_SPEC;
4464    pub type Wdtrf = crate::EnumBitfieldStruct<u8, Wdtrf_SPEC>;
4465    impl Wdtrf {
4466        #[doc = "Watchdog timer reset not detected"]
4467        pub const _0: Self = Self::new(0);
4468
4469        #[doc = "Watchdog timer reset detected"]
4470        pub const _1: Self = Self::new(1);
4471    }
4472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4473    pub struct Swrf_SPEC;
4474    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
4475    impl Swrf {
4476        #[doc = "Software reset not detected"]
4477        pub const _0: Self = Self::new(0);
4478
4479        #[doc = "Software reset detected"]
4480        pub const _1: Self = Self::new(1);
4481    }
4482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4483    pub struct Rperf_SPEC;
4484    pub type Rperf = crate::EnumBitfieldStruct<u8, Rperf_SPEC>;
4485    impl Rperf {
4486        #[doc = "SRAM parity error reset not detected"]
4487        pub const _0: Self = Self::new(0);
4488
4489        #[doc = "SRAM parity error reset detected"]
4490        pub const _1: Self = Self::new(1);
4491    }
4492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4493    pub struct Busmrf_SPEC;
4494    pub type Busmrf = crate::EnumBitfieldStruct<u8, Busmrf_SPEC>;
4495    impl Busmrf {
4496        #[doc = "Bus master MPU error reset not detected"]
4497        pub const _0: Self = Self::new(0);
4498
4499        #[doc = "Bus master MPU error reset detected"]
4500        pub const _1: Self = Self::new(1);
4501    }
4502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4503    pub struct Tzerf_SPEC;
4504    pub type Tzerf = crate::EnumBitfieldStruct<u8, Tzerf_SPEC>;
4505    impl Tzerf {
4506        #[doc = "TrustZone error reset not detected."]
4507        pub const _0: Self = Self::new(0);
4508
4509        #[doc = "TrustZone error reset detected."]
4510        pub const _1: Self = Self::new(1);
4511    }
4512}
4513#[doc(hidden)]
4514#[derive(Copy, Clone, Eq, PartialEq)]
4515pub struct Lvd1Cr1_SPEC;
4516impl crate::sealed::RegSpec for Lvd1Cr1_SPEC {
4517    type DataType = u8;
4518}
4519
4520#[doc = "Voltage Monitor 1 Circuit Control Register 1"]
4521pub type Lvd1Cr1 = crate::RegValueT<Lvd1Cr1_SPEC>;
4522
4523impl Lvd1Cr1 {
4524    #[doc = "Voltage Monitor 1 Interrupt Generation Condition Select"]
4525    #[inline(always)]
4526    pub fn idtsel(
4527        self,
4528    ) -> crate::common::RegisterField<
4529        0,
4530        0x3,
4531        1,
4532        0,
4533        lvd1cr1::Idtsel,
4534        lvd1cr1::Idtsel,
4535        Lvd1Cr1_SPEC,
4536        crate::common::RW,
4537    > {
4538        crate::common::RegisterField::<
4539            0,
4540            0x3,
4541            1,
4542            0,
4543            lvd1cr1::Idtsel,
4544            lvd1cr1::Idtsel,
4545            Lvd1Cr1_SPEC,
4546            crate::common::RW,
4547        >::from_register(self, 0)
4548    }
4549
4550    #[doc = "Voltage Monitor 1 Interrupt Type Select"]
4551    #[inline(always)]
4552    pub fn irqsel(
4553        self,
4554    ) -> crate::common::RegisterField<
4555        2,
4556        0x1,
4557        1,
4558        0,
4559        lvd1cr1::Irqsel,
4560        lvd1cr1::Irqsel,
4561        Lvd1Cr1_SPEC,
4562        crate::common::RW,
4563    > {
4564        crate::common::RegisterField::<
4565            2,
4566            0x1,
4567            1,
4568            0,
4569            lvd1cr1::Irqsel,
4570            lvd1cr1::Irqsel,
4571            Lvd1Cr1_SPEC,
4572            crate::common::RW,
4573        >::from_register(self, 0)
4574    }
4575}
4576impl ::core::default::Default for Lvd1Cr1 {
4577    #[inline(always)]
4578    fn default() -> Lvd1Cr1 {
4579        <crate::RegValueT<Lvd1Cr1_SPEC> as RegisterValue<_>>::new(1)
4580    }
4581}
4582pub mod lvd1cr1 {
4583
4584    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4585    pub struct Idtsel_SPEC;
4586    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4587    impl Idtsel {
4588        #[doc = "When VCC >= Vdet1 (rise) is detected"]
4589        pub const _00: Self = Self::new(0);
4590
4591        #[doc = "When VCC < Vdet1 (fall) is detected"]
4592        pub const _01: Self = Self::new(1);
4593
4594        #[doc = "When fall and rise are detected"]
4595        pub const _10: Self = Self::new(2);
4596
4597        #[doc = "Settings prohibited"]
4598        pub const _11: Self = Self::new(3);
4599    }
4600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4601    pub struct Irqsel_SPEC;
4602    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4603    impl Irqsel {
4604        #[doc = "Non-maskable interrupt"]
4605        pub const _0: Self = Self::new(0);
4606
4607        #[doc = "Maskable interrupt"]
4608        pub const _1: Self = Self::new(1);
4609    }
4610}
4611#[doc(hidden)]
4612#[derive(Copy, Clone, Eq, PartialEq)]
4613pub struct Lvd1Sr_SPEC;
4614impl crate::sealed::RegSpec for Lvd1Sr_SPEC {
4615    type DataType = u8;
4616}
4617
4618#[doc = "Voltage Monitor 1 Circuit Status Register"]
4619pub type Lvd1Sr = crate::RegValueT<Lvd1Sr_SPEC>;
4620
4621impl Lvd1Sr {
4622    #[doc = "Voltage Monitor 1 Voltage Variation Detection Flag"]
4623    #[inline(always)]
4624    pub fn det(
4625        self,
4626    ) -> crate::common::RegisterField<
4627        0,
4628        0x1,
4629        1,
4630        0,
4631        lvd1sr::Det,
4632        lvd1sr::Det,
4633        Lvd1Sr_SPEC,
4634        crate::common::RW,
4635    > {
4636        crate::common::RegisterField::<
4637            0,
4638            0x1,
4639            1,
4640            0,
4641            lvd1sr::Det,
4642            lvd1sr::Det,
4643            Lvd1Sr_SPEC,
4644            crate::common::RW,
4645        >::from_register(self, 0)
4646    }
4647
4648    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
4649    #[inline(always)]
4650    pub fn mon(
4651        self,
4652    ) -> crate::common::RegisterField<
4653        1,
4654        0x1,
4655        1,
4656        0,
4657        lvd1sr::Mon,
4658        lvd1sr::Mon,
4659        Lvd1Sr_SPEC,
4660        crate::common::R,
4661    > {
4662        crate::common::RegisterField::<
4663            1,
4664            0x1,
4665            1,
4666            0,
4667            lvd1sr::Mon,
4668            lvd1sr::Mon,
4669            Lvd1Sr_SPEC,
4670            crate::common::R,
4671        >::from_register(self, 0)
4672    }
4673}
4674impl ::core::default::Default for Lvd1Sr {
4675    #[inline(always)]
4676    fn default() -> Lvd1Sr {
4677        <crate::RegValueT<Lvd1Sr_SPEC> as RegisterValue<_>>::new(2)
4678    }
4679}
4680pub mod lvd1sr {
4681
4682    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4683    pub struct Det_SPEC;
4684    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4685    impl Det {
4686        #[doc = "Not detected"]
4687        pub const _0: Self = Self::new(0);
4688
4689        #[doc = "Vdet1 crossing is detected"]
4690        pub const _1: Self = Self::new(1);
4691    }
4692    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4693    pub struct Mon_SPEC;
4694    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4695    impl Mon {
4696        #[doc = "VCC < Vdet1"]
4697        pub const _0: Self = Self::new(0);
4698
4699        #[doc = "VCC >= Vdet1 or MON is disabled"]
4700        pub const _1: Self = Self::new(1);
4701    }
4702}
4703#[doc(hidden)]
4704#[derive(Copy, Clone, Eq, PartialEq)]
4705pub struct Lvd2Cr1_SPEC;
4706impl crate::sealed::RegSpec for Lvd2Cr1_SPEC {
4707    type DataType = u8;
4708}
4709
4710#[doc = "Voltage Monitor 2 Circuit Control Register 1"]
4711pub type Lvd2Cr1 = crate::RegValueT<Lvd2Cr1_SPEC>;
4712
4713impl Lvd2Cr1 {
4714    #[doc = "Voltage Monitor 2 Interrupt Generation Condition Select"]
4715    #[inline(always)]
4716    pub fn idtsel(
4717        self,
4718    ) -> crate::common::RegisterField<
4719        0,
4720        0x3,
4721        1,
4722        0,
4723        lvd2cr1::Idtsel,
4724        lvd2cr1::Idtsel,
4725        Lvd2Cr1_SPEC,
4726        crate::common::RW,
4727    > {
4728        crate::common::RegisterField::<
4729            0,
4730            0x3,
4731            1,
4732            0,
4733            lvd2cr1::Idtsel,
4734            lvd2cr1::Idtsel,
4735            Lvd2Cr1_SPEC,
4736            crate::common::RW,
4737        >::from_register(self, 0)
4738    }
4739
4740    #[doc = "Voltage Monitor 2 Interrupt Type Select"]
4741    #[inline(always)]
4742    pub fn irqsel(
4743        self,
4744    ) -> crate::common::RegisterField<
4745        2,
4746        0x1,
4747        1,
4748        0,
4749        lvd2cr1::Irqsel,
4750        lvd2cr1::Irqsel,
4751        Lvd2Cr1_SPEC,
4752        crate::common::RW,
4753    > {
4754        crate::common::RegisterField::<
4755            2,
4756            0x1,
4757            1,
4758            0,
4759            lvd2cr1::Irqsel,
4760            lvd2cr1::Irqsel,
4761            Lvd2Cr1_SPEC,
4762            crate::common::RW,
4763        >::from_register(self, 0)
4764    }
4765}
4766impl ::core::default::Default for Lvd2Cr1 {
4767    #[inline(always)]
4768    fn default() -> Lvd2Cr1 {
4769        <crate::RegValueT<Lvd2Cr1_SPEC> as RegisterValue<_>>::new(1)
4770    }
4771}
4772pub mod lvd2cr1 {
4773
4774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4775    pub struct Idtsel_SPEC;
4776    pub type Idtsel = crate::EnumBitfieldStruct<u8, Idtsel_SPEC>;
4777    impl Idtsel {
4778        #[doc = "When VCC>= Vdet2 (rise) is detected"]
4779        pub const _00: Self = Self::new(0);
4780
4781        #[doc = "When VCC < Vdet2 (fall) is detected"]
4782        pub const _01: Self = Self::new(1);
4783
4784        #[doc = "When fall and rise are detected"]
4785        pub const _10: Self = Self::new(2);
4786
4787        #[doc = "Settings prohibited"]
4788        pub const _11: Self = Self::new(3);
4789    }
4790    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4791    pub struct Irqsel_SPEC;
4792    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
4793    impl Irqsel {
4794        #[doc = "Non-maskable interrupt"]
4795        pub const _0: Self = Self::new(0);
4796
4797        #[doc = "Maskable interrupt"]
4798        pub const _1: Self = Self::new(1);
4799    }
4800}
4801#[doc(hidden)]
4802#[derive(Copy, Clone, Eq, PartialEq)]
4803pub struct Lvd2Sr_SPEC;
4804impl crate::sealed::RegSpec for Lvd2Sr_SPEC {
4805    type DataType = u8;
4806}
4807
4808#[doc = "Voltage Monitor 2 Circuit Status Register"]
4809pub type Lvd2Sr = crate::RegValueT<Lvd2Sr_SPEC>;
4810
4811impl Lvd2Sr {
4812    #[doc = "Voltage Monitor 2 Voltage Variation Detection Flag"]
4813    #[inline(always)]
4814    pub fn det(
4815        self,
4816    ) -> crate::common::RegisterField<
4817        0,
4818        0x1,
4819        1,
4820        0,
4821        lvd2sr::Det,
4822        lvd2sr::Det,
4823        Lvd2Sr_SPEC,
4824        crate::common::RW,
4825    > {
4826        crate::common::RegisterField::<
4827            0,
4828            0x1,
4829            1,
4830            0,
4831            lvd2sr::Det,
4832            lvd2sr::Det,
4833            Lvd2Sr_SPEC,
4834            crate::common::RW,
4835        >::from_register(self, 0)
4836    }
4837
4838    #[doc = "Voltage Monitor 2 Signal Monitor Flag"]
4839    #[inline(always)]
4840    pub fn mon(
4841        self,
4842    ) -> crate::common::RegisterField<
4843        1,
4844        0x1,
4845        1,
4846        0,
4847        lvd2sr::Mon,
4848        lvd2sr::Mon,
4849        Lvd2Sr_SPEC,
4850        crate::common::R,
4851    > {
4852        crate::common::RegisterField::<
4853            1,
4854            0x1,
4855            1,
4856            0,
4857            lvd2sr::Mon,
4858            lvd2sr::Mon,
4859            Lvd2Sr_SPEC,
4860            crate::common::R,
4861        >::from_register(self, 0)
4862    }
4863}
4864impl ::core::default::Default for Lvd2Sr {
4865    #[inline(always)]
4866    fn default() -> Lvd2Sr {
4867        <crate::RegValueT<Lvd2Sr_SPEC> as RegisterValue<_>>::new(2)
4868    }
4869}
4870pub mod lvd2sr {
4871
4872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4873    pub struct Det_SPEC;
4874    pub type Det = crate::EnumBitfieldStruct<u8, Det_SPEC>;
4875    impl Det {
4876        #[doc = "Not detected"]
4877        pub const _0: Self = Self::new(0);
4878
4879        #[doc = "Vdet2 crossing is detected"]
4880        pub const _1: Self = Self::new(1);
4881    }
4882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4883    pub struct Mon_SPEC;
4884    pub type Mon = crate::EnumBitfieldStruct<u8, Mon_SPEC>;
4885    impl Mon {
4886        #[doc = "VCC < Vdet2"]
4887        pub const _0: Self = Self::new(0);
4888
4889        #[doc = "VCC>= Vdet2 or MON is disabled"]
4890        pub const _1: Self = Self::new(1);
4891    }
4892}
4893#[doc(hidden)]
4894#[derive(Copy, Clone, Eq, PartialEq)]
4895pub struct Cgfsar_SPEC;
4896impl crate::sealed::RegSpec for Cgfsar_SPEC {
4897    type DataType = u32;
4898}
4899
4900#[doc = "Clock Generation Function Security Attribute Register"]
4901pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
4902
4903impl Cgfsar {
4904    #[doc = "Non Secure Attribute bit 00"]
4905    #[inline(always)]
4906    pub fn nonsec00(
4907        self,
4908    ) -> crate::common::RegisterField<
4909        0,
4910        0x1,
4911        1,
4912        0,
4913        cgfsar::Nonsec00,
4914        cgfsar::Nonsec00,
4915        Cgfsar_SPEC,
4916        crate::common::RW,
4917    > {
4918        crate::common::RegisterField::<
4919            0,
4920            0x1,
4921            1,
4922            0,
4923            cgfsar::Nonsec00,
4924            cgfsar::Nonsec00,
4925            Cgfsar_SPEC,
4926            crate::common::RW,
4927        >::from_register(self, 0)
4928    }
4929
4930    #[doc = "Non Secure Attribute bit 02"]
4931    #[inline(always)]
4932    pub fn nonsec02(
4933        self,
4934    ) -> crate::common::RegisterField<
4935        2,
4936        0x1,
4937        1,
4938        0,
4939        cgfsar::Nonsec02,
4940        cgfsar::Nonsec02,
4941        Cgfsar_SPEC,
4942        crate::common::RW,
4943    > {
4944        crate::common::RegisterField::<
4945            2,
4946            0x1,
4947            1,
4948            0,
4949            cgfsar::Nonsec02,
4950            cgfsar::Nonsec02,
4951            Cgfsar_SPEC,
4952            crate::common::RW,
4953        >::from_register(self, 0)
4954    }
4955
4956    #[doc = "Non Secure Attribute bit 03"]
4957    #[inline(always)]
4958    pub fn nonsec03(
4959        self,
4960    ) -> crate::common::RegisterField<
4961        3,
4962        0x1,
4963        1,
4964        0,
4965        cgfsar::Nonsec03,
4966        cgfsar::Nonsec03,
4967        Cgfsar_SPEC,
4968        crate::common::RW,
4969    > {
4970        crate::common::RegisterField::<
4971            3,
4972            0x1,
4973            1,
4974            0,
4975            cgfsar::Nonsec03,
4976            cgfsar::Nonsec03,
4977            Cgfsar_SPEC,
4978            crate::common::RW,
4979        >::from_register(self, 0)
4980    }
4981
4982    #[doc = "Non Secure Attribute bit 04"]
4983    #[inline(always)]
4984    pub fn nonsec04(
4985        self,
4986    ) -> crate::common::RegisterField<
4987        4,
4988        0x1,
4989        1,
4990        0,
4991        cgfsar::Nonsec04,
4992        cgfsar::Nonsec04,
4993        Cgfsar_SPEC,
4994        crate::common::RW,
4995    > {
4996        crate::common::RegisterField::<
4997            4,
4998            0x1,
4999            1,
5000            0,
5001            cgfsar::Nonsec04,
5002            cgfsar::Nonsec04,
5003            Cgfsar_SPEC,
5004            crate::common::RW,
5005        >::from_register(self, 0)
5006    }
5007
5008    #[doc = "Non Secure Attribute bit 05"]
5009    #[inline(always)]
5010    pub fn nonsec05(
5011        self,
5012    ) -> crate::common::RegisterField<
5013        5,
5014        0x1,
5015        1,
5016        0,
5017        cgfsar::Nonsec05,
5018        cgfsar::Nonsec05,
5019        Cgfsar_SPEC,
5020        crate::common::RW,
5021    > {
5022        crate::common::RegisterField::<
5023            5,
5024            0x1,
5025            1,
5026            0,
5027            cgfsar::Nonsec05,
5028            cgfsar::Nonsec05,
5029            Cgfsar_SPEC,
5030            crate::common::RW,
5031        >::from_register(self, 0)
5032    }
5033
5034    #[doc = "Non Secure Attribute bit 06"]
5035    #[inline(always)]
5036    pub fn nonsec06(
5037        self,
5038    ) -> crate::common::RegisterField<
5039        6,
5040        0x1,
5041        1,
5042        0,
5043        cgfsar::Nonsec06,
5044        cgfsar::Nonsec06,
5045        Cgfsar_SPEC,
5046        crate::common::RW,
5047    > {
5048        crate::common::RegisterField::<
5049            6,
5050            0x1,
5051            1,
5052            0,
5053            cgfsar::Nonsec06,
5054            cgfsar::Nonsec06,
5055            Cgfsar_SPEC,
5056            crate::common::RW,
5057        >::from_register(self, 0)
5058    }
5059
5060    #[doc = "Non Secure Attribute bit 07"]
5061    #[inline(always)]
5062    pub fn nonsec07(
5063        self,
5064    ) -> crate::common::RegisterField<
5065        7,
5066        0x1,
5067        1,
5068        0,
5069        cgfsar::Nonsec07,
5070        cgfsar::Nonsec07,
5071        Cgfsar_SPEC,
5072        crate::common::RW,
5073    > {
5074        crate::common::RegisterField::<
5075            7,
5076            0x1,
5077            1,
5078            0,
5079            cgfsar::Nonsec07,
5080            cgfsar::Nonsec07,
5081            Cgfsar_SPEC,
5082            crate::common::RW,
5083        >::from_register(self, 0)
5084    }
5085
5086    #[doc = "Non Secure Attribute bit 08"]
5087    #[inline(always)]
5088    pub fn nonsec08(
5089        self,
5090    ) -> crate::common::RegisterField<
5091        8,
5092        0x1,
5093        1,
5094        0,
5095        cgfsar::Nonsec08,
5096        cgfsar::Nonsec08,
5097        Cgfsar_SPEC,
5098        crate::common::RW,
5099    > {
5100        crate::common::RegisterField::<
5101            8,
5102            0x1,
5103            1,
5104            0,
5105            cgfsar::Nonsec08,
5106            cgfsar::Nonsec08,
5107            Cgfsar_SPEC,
5108            crate::common::RW,
5109        >::from_register(self, 0)
5110    }
5111
5112    #[doc = "Non Secure Attribute bit 09"]
5113    #[inline(always)]
5114    pub fn nonsec09(
5115        self,
5116    ) -> crate::common::RegisterField<
5117        9,
5118        0x1,
5119        1,
5120        0,
5121        cgfsar::Nonsec09,
5122        cgfsar::Nonsec09,
5123        Cgfsar_SPEC,
5124        crate::common::RW,
5125    > {
5126        crate::common::RegisterField::<
5127            9,
5128            0x1,
5129            1,
5130            0,
5131            cgfsar::Nonsec09,
5132            cgfsar::Nonsec09,
5133            Cgfsar_SPEC,
5134            crate::common::RW,
5135        >::from_register(self, 0)
5136    }
5137
5138    #[doc = "Non Secure Attribute bit 11"]
5139    #[inline(always)]
5140    pub fn nonsec11(
5141        self,
5142    ) -> crate::common::RegisterField<
5143        11,
5144        0x1,
5145        1,
5146        0,
5147        cgfsar::Nonsec11,
5148        cgfsar::Nonsec11,
5149        Cgfsar_SPEC,
5150        crate::common::RW,
5151    > {
5152        crate::common::RegisterField::<
5153            11,
5154            0x1,
5155            1,
5156            0,
5157            cgfsar::Nonsec11,
5158            cgfsar::Nonsec11,
5159            Cgfsar_SPEC,
5160            crate::common::RW,
5161        >::from_register(self, 0)
5162    }
5163
5164    #[doc = "Non Secure Attribute bit 16"]
5165    #[inline(always)]
5166    pub fn nonsec16(
5167        self,
5168    ) -> crate::common::RegisterField<
5169        16,
5170        0x1,
5171        1,
5172        0,
5173        cgfsar::Nonsec16,
5174        cgfsar::Nonsec16,
5175        Cgfsar_SPEC,
5176        crate::common::RW,
5177    > {
5178        crate::common::RegisterField::<
5179            16,
5180            0x1,
5181            1,
5182            0,
5183            cgfsar::Nonsec16,
5184            cgfsar::Nonsec16,
5185            Cgfsar_SPEC,
5186            crate::common::RW,
5187        >::from_register(self, 0)
5188    }
5189}
5190impl ::core::default::Default for Cgfsar {
5191    #[inline(always)]
5192    fn default() -> Cgfsar {
5193        <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(4294967295)
5194    }
5195}
5196pub mod cgfsar {
5197
5198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5199    pub struct Nonsec00_SPEC;
5200    pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
5201    impl Nonsec00 {
5202        #[doc = "Secure"]
5203        pub const _0: Self = Self::new(0);
5204
5205        #[doc = "Non Secure"]
5206        pub const _1: Self = Self::new(1);
5207    }
5208    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5209    pub struct Nonsec02_SPEC;
5210    pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
5211    impl Nonsec02 {
5212        #[doc = "Secure"]
5213        pub const _0: Self = Self::new(0);
5214
5215        #[doc = "Non Secure"]
5216        pub const _1: Self = Self::new(1);
5217    }
5218    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5219    pub struct Nonsec03_SPEC;
5220    pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
5221    impl Nonsec03 {
5222        #[doc = "Secure"]
5223        pub const _0: Self = Self::new(0);
5224
5225        #[doc = "Non Secure"]
5226        pub const _1: Self = Self::new(1);
5227    }
5228    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5229    pub struct Nonsec04_SPEC;
5230    pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
5231    impl Nonsec04 {
5232        #[doc = "Secure"]
5233        pub const _0: Self = Self::new(0);
5234
5235        #[doc = "Non Secure"]
5236        pub const _1: Self = Self::new(1);
5237    }
5238    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5239    pub struct Nonsec05_SPEC;
5240    pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
5241    impl Nonsec05 {
5242        #[doc = "Secure"]
5243        pub const _0: Self = Self::new(0);
5244
5245        #[doc = "Non Secure"]
5246        pub const _1: Self = Self::new(1);
5247    }
5248    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5249    pub struct Nonsec06_SPEC;
5250    pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
5251    impl Nonsec06 {
5252        #[doc = "Secure"]
5253        pub const _0: Self = Self::new(0);
5254
5255        #[doc = "Non Secure"]
5256        pub const _1: Self = Self::new(1);
5257    }
5258    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5259    pub struct Nonsec07_SPEC;
5260    pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
5261    impl Nonsec07 {
5262        #[doc = "Secure"]
5263        pub const _0: Self = Self::new(0);
5264
5265        #[doc = "Non Secure"]
5266        pub const _1: Self = Self::new(1);
5267    }
5268    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5269    pub struct Nonsec08_SPEC;
5270    pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
5271    impl Nonsec08 {
5272        #[doc = "Secure"]
5273        pub const _0: Self = Self::new(0);
5274
5275        #[doc = "Non Secure"]
5276        pub const _1: Self = Self::new(1);
5277    }
5278    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5279    pub struct Nonsec09_SPEC;
5280    pub type Nonsec09 = crate::EnumBitfieldStruct<u8, Nonsec09_SPEC>;
5281    impl Nonsec09 {
5282        #[doc = "Secure"]
5283        pub const _0: Self = Self::new(0);
5284
5285        #[doc = "Non Secure"]
5286        pub const _1: Self = Self::new(1);
5287    }
5288    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5289    pub struct Nonsec11_SPEC;
5290    pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
5291    impl Nonsec11 {
5292        #[doc = "Secure"]
5293        pub const _0: Self = Self::new(0);
5294
5295        #[doc = "Non Secure"]
5296        pub const _1: Self = Self::new(1);
5297    }
5298    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5299    pub struct Nonsec16_SPEC;
5300    pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
5301    impl Nonsec16 {
5302        #[doc = "Secure"]
5303        pub const _0: Self = Self::new(0);
5304
5305        #[doc = "Non Secure"]
5306        pub const _1: Self = Self::new(1);
5307    }
5308}
5309#[doc(hidden)]
5310#[derive(Copy, Clone, Eq, PartialEq)]
5311pub struct Rstsar_SPEC;
5312impl crate::sealed::RegSpec for Rstsar_SPEC {
5313    type DataType = u32;
5314}
5315
5316#[doc = "Reset Security Attribution Register"]
5317pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
5318
5319impl Rstsar {
5320    #[doc = "Non Secure Attribute bit 0"]
5321    #[inline(always)]
5322    pub fn nonsec0(
5323        self,
5324    ) -> crate::common::RegisterField<
5325        0,
5326        0x1,
5327        1,
5328        0,
5329        rstsar::Nonsec0,
5330        rstsar::Nonsec0,
5331        Rstsar_SPEC,
5332        crate::common::RW,
5333    > {
5334        crate::common::RegisterField::<
5335            0,
5336            0x1,
5337            1,
5338            0,
5339            rstsar::Nonsec0,
5340            rstsar::Nonsec0,
5341            Rstsar_SPEC,
5342            crate::common::RW,
5343        >::from_register(self, 0)
5344    }
5345
5346    #[doc = "Non Secure Attribute bit 1"]
5347    #[inline(always)]
5348    pub fn nonsec1(
5349        self,
5350    ) -> crate::common::RegisterField<
5351        1,
5352        0x1,
5353        1,
5354        0,
5355        rstsar::Nonsec1,
5356        rstsar::Nonsec1,
5357        Rstsar_SPEC,
5358        crate::common::RW,
5359    > {
5360        crate::common::RegisterField::<
5361            1,
5362            0x1,
5363            1,
5364            0,
5365            rstsar::Nonsec1,
5366            rstsar::Nonsec1,
5367            Rstsar_SPEC,
5368            crate::common::RW,
5369        >::from_register(self, 0)
5370    }
5371
5372    #[doc = "Non Secure Attribute bit 2"]
5373    #[inline(always)]
5374    pub fn nonsec2(
5375        self,
5376    ) -> crate::common::RegisterField<
5377        2,
5378        0x1,
5379        1,
5380        0,
5381        rstsar::Nonsec2,
5382        rstsar::Nonsec2,
5383        Rstsar_SPEC,
5384        crate::common::RW,
5385    > {
5386        crate::common::RegisterField::<
5387            2,
5388            0x1,
5389            1,
5390            0,
5391            rstsar::Nonsec2,
5392            rstsar::Nonsec2,
5393            Rstsar_SPEC,
5394            crate::common::RW,
5395        >::from_register(self, 0)
5396    }
5397}
5398impl ::core::default::Default for Rstsar {
5399    #[inline(always)]
5400    fn default() -> Rstsar {
5401        <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(4294967295)
5402    }
5403}
5404pub mod rstsar {
5405
5406    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5407    pub struct Nonsec0_SPEC;
5408    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5409    impl Nonsec0 {
5410        #[doc = "Secure"]
5411        pub const _0: Self = Self::new(0);
5412
5413        #[doc = "Non Secure"]
5414        pub const _1: Self = Self::new(1);
5415    }
5416    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5417    pub struct Nonsec1_SPEC;
5418    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5419    impl Nonsec1 {
5420        #[doc = "Secure"]
5421        pub const _0: Self = Self::new(0);
5422
5423        #[doc = "Non Secure"]
5424        pub const _1: Self = Self::new(1);
5425    }
5426    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5427    pub struct Nonsec2_SPEC;
5428    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5429    impl Nonsec2 {
5430        #[doc = "Secure"]
5431        pub const _0: Self = Self::new(0);
5432
5433        #[doc = "Non Secure"]
5434        pub const _1: Self = Self::new(1);
5435    }
5436}
5437#[doc(hidden)]
5438#[derive(Copy, Clone, Eq, PartialEq)]
5439pub struct Lpmsar_SPEC;
5440impl crate::sealed::RegSpec for Lpmsar_SPEC {
5441    type DataType = u32;
5442}
5443
5444#[doc = "Low Power Mode Security Attribution Register"]
5445pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
5446
5447impl Lpmsar {
5448    #[doc = "Non Secure Attribute bit 0"]
5449    #[inline(always)]
5450    pub fn nonsec0(
5451        self,
5452    ) -> crate::common::RegisterField<
5453        0,
5454        0x1,
5455        1,
5456        0,
5457        lpmsar::Nonsec0,
5458        lpmsar::Nonsec0,
5459        Lpmsar_SPEC,
5460        crate::common::RW,
5461    > {
5462        crate::common::RegisterField::<
5463            0,
5464            0x1,
5465            1,
5466            0,
5467            lpmsar::Nonsec0,
5468            lpmsar::Nonsec0,
5469            Lpmsar_SPEC,
5470            crate::common::RW,
5471        >::from_register(self, 0)
5472    }
5473
5474    #[doc = "Non Secure Attribute bit 2"]
5475    #[inline(always)]
5476    pub fn nonsec2(
5477        self,
5478    ) -> crate::common::RegisterField<
5479        2,
5480        0x1,
5481        1,
5482        0,
5483        lpmsar::Nonsec2,
5484        lpmsar::Nonsec2,
5485        Lpmsar_SPEC,
5486        crate::common::RW,
5487    > {
5488        crate::common::RegisterField::<
5489            2,
5490            0x1,
5491            1,
5492            0,
5493            lpmsar::Nonsec2,
5494            lpmsar::Nonsec2,
5495            Lpmsar_SPEC,
5496            crate::common::RW,
5497        >::from_register(self, 0)
5498    }
5499
5500    #[doc = "Non Secure Attribute bit 4"]
5501    #[inline(always)]
5502    pub fn nonsec4(
5503        self,
5504    ) -> crate::common::RegisterField<
5505        4,
5506        0x1,
5507        1,
5508        0,
5509        lpmsar::Nonsec4,
5510        lpmsar::Nonsec4,
5511        Lpmsar_SPEC,
5512        crate::common::RW,
5513    > {
5514        crate::common::RegisterField::<
5515            4,
5516            0x1,
5517            1,
5518            0,
5519            lpmsar::Nonsec4,
5520            lpmsar::Nonsec4,
5521            Lpmsar_SPEC,
5522            crate::common::RW,
5523        >::from_register(self, 0)
5524    }
5525
5526    #[doc = "Non Secure Attribute bit 8"]
5527    #[inline(always)]
5528    pub fn nonsec8(
5529        self,
5530    ) -> crate::common::RegisterField<
5531        8,
5532        0x1,
5533        1,
5534        0,
5535        lpmsar::Nonsec8,
5536        lpmsar::Nonsec8,
5537        Lpmsar_SPEC,
5538        crate::common::RW,
5539    > {
5540        crate::common::RegisterField::<
5541            8,
5542            0x1,
5543            1,
5544            0,
5545            lpmsar::Nonsec8,
5546            lpmsar::Nonsec8,
5547            Lpmsar_SPEC,
5548            crate::common::RW,
5549        >::from_register(self, 0)
5550    }
5551
5552    #[doc = "Non Secure Attribute bit 9"]
5553    #[inline(always)]
5554    pub fn nonsec9(
5555        self,
5556    ) -> crate::common::RegisterField<
5557        9,
5558        0x1,
5559        1,
5560        0,
5561        lpmsar::Nonsec9,
5562        lpmsar::Nonsec9,
5563        Lpmsar_SPEC,
5564        crate::common::RW,
5565    > {
5566        crate::common::RegisterField::<
5567            9,
5568            0x1,
5569            1,
5570            0,
5571            lpmsar::Nonsec9,
5572            lpmsar::Nonsec9,
5573            Lpmsar_SPEC,
5574            crate::common::RW,
5575        >::from_register(self, 0)
5576    }
5577
5578    #[doc = "Non Secure Attribute bit 13"]
5579    #[inline(always)]
5580    pub fn nonsec13(
5581        self,
5582    ) -> crate::common::RegisterField<
5583        13,
5584        0x1,
5585        1,
5586        0,
5587        lpmsar::Nonsec13,
5588        lpmsar::Nonsec13,
5589        Lpmsar_SPEC,
5590        crate::common::RW,
5591    > {
5592        crate::common::RegisterField::<
5593            13,
5594            0x1,
5595            1,
5596            0,
5597            lpmsar::Nonsec13,
5598            lpmsar::Nonsec13,
5599            Lpmsar_SPEC,
5600            crate::common::RW,
5601        >::from_register(self, 0)
5602    }
5603}
5604impl ::core::default::Default for Lpmsar {
5605    #[inline(always)]
5606    fn default() -> Lpmsar {
5607        <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(4294967295)
5608    }
5609}
5610pub mod lpmsar {
5611
5612    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5613    pub struct Nonsec0_SPEC;
5614    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5615    impl Nonsec0 {
5616        #[doc = "Secure"]
5617        pub const _0: Self = Self::new(0);
5618
5619        #[doc = "Non Secure"]
5620        pub const _1: Self = Self::new(1);
5621    }
5622    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5623    pub struct Nonsec2_SPEC;
5624    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
5625    impl Nonsec2 {
5626        #[doc = "Secure"]
5627        pub const _0: Self = Self::new(0);
5628
5629        #[doc = "Non Secure"]
5630        pub const _1: Self = Self::new(1);
5631    }
5632    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5633    pub struct Nonsec4_SPEC;
5634    pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
5635    impl Nonsec4 {
5636        #[doc = "Secure"]
5637        pub const _0: Self = Self::new(0);
5638
5639        #[doc = "Non Secure"]
5640        pub const _1: Self = Self::new(1);
5641    }
5642    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5643    pub struct Nonsec8_SPEC;
5644    pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
5645    impl Nonsec8 {
5646        #[doc = "Secure"]
5647        pub const _0: Self = Self::new(0);
5648
5649        #[doc = "Non Secure"]
5650        pub const _1: Self = Self::new(1);
5651    }
5652    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5653    pub struct Nonsec9_SPEC;
5654    pub type Nonsec9 = crate::EnumBitfieldStruct<u8, Nonsec9_SPEC>;
5655    impl Nonsec9 {
5656        #[doc = "Secure"]
5657        pub const _0: Self = Self::new(0);
5658
5659        #[doc = "Non Secure"]
5660        pub const _1: Self = Self::new(1);
5661    }
5662    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5663    pub struct Nonsec13_SPEC;
5664    pub type Nonsec13 = crate::EnumBitfieldStruct<u8, Nonsec13_SPEC>;
5665    impl Nonsec13 {
5666        #[doc = "Secure"]
5667        pub const _0: Self = Self::new(0);
5668
5669        #[doc = "Non Secure"]
5670        pub const _1: Self = Self::new(1);
5671    }
5672}
5673#[doc(hidden)]
5674#[derive(Copy, Clone, Eq, PartialEq)]
5675pub struct Lvdsar_SPEC;
5676impl crate::sealed::RegSpec for Lvdsar_SPEC {
5677    type DataType = u32;
5678}
5679
5680#[doc = "Low Voltage Detection Security Attribution Register"]
5681pub type Lvdsar = crate::RegValueT<Lvdsar_SPEC>;
5682
5683impl Lvdsar {
5684    #[doc = "Non Secure Attribute bit 0"]
5685    #[inline(always)]
5686    pub fn nonsec0(
5687        self,
5688    ) -> crate::common::RegisterField<
5689        0,
5690        0x1,
5691        1,
5692        0,
5693        lvdsar::Nonsec0,
5694        lvdsar::Nonsec0,
5695        Lvdsar_SPEC,
5696        crate::common::RW,
5697    > {
5698        crate::common::RegisterField::<
5699            0,
5700            0x1,
5701            1,
5702            0,
5703            lvdsar::Nonsec0,
5704            lvdsar::Nonsec0,
5705            Lvdsar_SPEC,
5706            crate::common::RW,
5707        >::from_register(self, 0)
5708    }
5709
5710    #[doc = "Non Secure Attribute bit 1"]
5711    #[inline(always)]
5712    pub fn nonsec1(
5713        self,
5714    ) -> crate::common::RegisterField<
5715        1,
5716        0x1,
5717        1,
5718        0,
5719        lvdsar::Nonsec1,
5720        lvdsar::Nonsec1,
5721        Lvdsar_SPEC,
5722        crate::common::RW,
5723    > {
5724        crate::common::RegisterField::<
5725            1,
5726            0x1,
5727            1,
5728            0,
5729            lvdsar::Nonsec1,
5730            lvdsar::Nonsec1,
5731            Lvdsar_SPEC,
5732            crate::common::RW,
5733        >::from_register(self, 0)
5734    }
5735}
5736impl ::core::default::Default for Lvdsar {
5737    #[inline(always)]
5738    fn default() -> Lvdsar {
5739        <crate::RegValueT<Lvdsar_SPEC> as RegisterValue<_>>::new(4294967295)
5740    }
5741}
5742pub mod lvdsar {
5743
5744    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5745    pub struct Nonsec0_SPEC;
5746    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
5747    impl Nonsec0 {
5748        #[doc = "Secure"]
5749        pub const _0: Self = Self::new(0);
5750
5751        #[doc = "Non Secure"]
5752        pub const _1: Self = Self::new(1);
5753    }
5754    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5755    pub struct Nonsec1_SPEC;
5756    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
5757    impl Nonsec1 {
5758        #[doc = "Secure"]
5759        pub const _0: Self = Self::new(0);
5760
5761        #[doc = "Non Secure"]
5762        pub const _1: Self = Self::new(1);
5763    }
5764}
5765#[doc(hidden)]
5766#[derive(Copy, Clone, Eq, PartialEq)]
5767pub struct Bbfsar_SPEC;
5768impl crate::sealed::RegSpec for Bbfsar_SPEC {
5769    type DataType = u32;
5770}
5771
5772#[doc = "Battery Backup Function Security Attribute Register"]
5773pub type Bbfsar = crate::RegValueT<Bbfsar_SPEC>;
5774
5775impl Bbfsar {
5776    #[doc = "Non Secure Attribute bit 0"]
5777    #[inline(always)]
5778    pub fn nonsec0(
5779        self,
5780    ) -> crate::common::RegisterField<
5781        0,
5782        0x1,
5783        1,
5784        0,
5785        bbfsar::Nonsec0,
5786        bbfsar::Nonsec0,
5787        Bbfsar_SPEC,
5788        crate::common::RW,
5789    > {
5790        crate::common::RegisterField::<
5791            0,
5792            0x1,
5793            1,
5794            0,
5795            bbfsar::Nonsec0,
5796            bbfsar::Nonsec0,
5797            Bbfsar_SPEC,
5798            crate::common::RW,
5799        >::from_register(self, 0)
5800    }
5801
5802    #[doc = "Non Secure Attribute bit 1"]
5803    #[inline(always)]
5804    pub fn nonsec1(
5805        self,
5806    ) -> crate::common::RegisterField<
5807        1,
5808        0x1,
5809        1,
5810        0,
5811        bbfsar::Nonsec1,
5812        bbfsar::Nonsec1,
5813        Bbfsar_SPEC,
5814        crate::common::RW,
5815    > {
5816        crate::common::RegisterField::<
5817            1,
5818            0x1,
5819            1,
5820            0,
5821            bbfsar::Nonsec1,
5822            bbfsar::Nonsec1,
5823            Bbfsar_SPEC,
5824            crate::common::RW,
5825        >::from_register(self, 0)
5826    }
5827
5828    #[doc = "Non Secure Attribute bit 2"]
5829    #[inline(always)]
5830    pub fn nonsec2(
5831        self,
5832    ) -> crate::common::RegisterField<
5833        2,
5834        0x1,
5835        1,
5836        0,
5837        bbfsar::Nonsec2,
5838        bbfsar::Nonsec2,
5839        Bbfsar_SPEC,
5840        crate::common::RW,
5841    > {
5842        crate::common::RegisterField::<
5843            2,
5844            0x1,
5845            1,
5846            0,
5847            bbfsar::Nonsec2,
5848            bbfsar::Nonsec2,
5849            Bbfsar_SPEC,
5850            crate::common::RW,
5851        >::from_register(self, 0)
5852    }
5853
5854    #[doc = "Non Secure Attribute bit 16"]
5855    #[inline(always)]
5856    pub fn nonsec16(
5857        self,
5858    ) -> crate::common::RegisterField<
5859        16,
5860        0x1,
5861        1,
5862        0,
5863        bbfsar::Nonsec16,
5864        bbfsar::Nonsec16,
5865        Bbfsar_SPEC,
5866        crate::common::RW,
5867    > {
5868        crate::common::RegisterField::<
5869            16,
5870            0x1,
5871            1,
5872            0,
5873            bbfsar::Nonsec16,
5874            bbfsar::Nonsec16,
5875            Bbfsar_SPEC,
5876            crate::common::RW,
5877        >::from_register(self, 0)
5878    }
5879
5880    #[doc = "Non Secure Attribute bit 17"]
5881    #[inline(always)]
5882    pub fn nonsec17(
5883        self,
5884    ) -> crate::common::RegisterField<
5885        17,
5886        0x1,
5887        1,
5888        0,
5889        bbfsar::Nonsec17,
5890        bbfsar::Nonsec17,
5891        Bbfsar_SPEC,
5892        crate::common::RW,
5893    > {
5894        crate::common::RegisterField::<
5895            17,
5896            0x1,
5897            1,
5898            0,
5899            bbfsar::Nonsec17,
5900            bbfsar::Nonsec17,
5901            Bbfsar_SPEC,
5902            crate::common::RW,
5903        >::from_register(self, 0)
5904    }
5905
5906    #[doc = "Non Secure Attribute bit 18"]
5907    #[inline(always)]
5908    pub fn nonsec18(
5909        self,
5910    ) -> crate::common::RegisterField<
5911        18,
5912        0x1,
5913        1,
5914        0,
5915        bbfsar::Nonsec18,
5916        bbfsar::Nonsec18,
5917        Bbfsar_SPEC,
5918        crate::common::RW,
5919    > {
5920        crate::common::RegisterField::<
5921            18,
5922            0x1,
5923            1,
5924            0,
5925            bbfsar::Nonsec18,
5926            bbfsar::Nonsec18,
5927            Bbfsar_SPEC,
5928            crate::common::RW,
5929        >::from_register(self, 0)
5930    }
5931
5932    #[doc = "Non Secure Attribute bit 19"]
5933    #[inline(always)]
5934    pub fn nonsec19(
5935        self,
5936    ) -> crate::common::RegisterField<
5937        19,
5938        0x1,
5939        1,
5940        0,
5941        bbfsar::Nonsec19,
5942        bbfsar::Nonsec19,
5943        Bbfsar_SPEC,
5944        crate::common::RW,
5945    > {
5946        crate::common::RegisterField::<
5947            19,
5948            0x1,
5949            1,
5950            0,
5951            bbfsar::Nonsec19,
5952            bbfsar::Nonsec19,
5953            Bbfsar_SPEC,
5954            crate::common::RW,
5955        >::from_register(self, 0)
5956    }
5957
5958    #[doc = "Non Secure Attribute bit 20"]
5959    #[inline(always)]
5960    pub fn nonsec20(
5961        self,
5962    ) -> crate::common::RegisterField<
5963        20,
5964        0x1,
5965        1,
5966        0,
5967        bbfsar::Nonsec20,
5968        bbfsar::Nonsec20,
5969        Bbfsar_SPEC,
5970        crate::common::RW,
5971    > {
5972        crate::common::RegisterField::<
5973            20,
5974            0x1,
5975            1,
5976            0,
5977            bbfsar::Nonsec20,
5978            bbfsar::Nonsec20,
5979            Bbfsar_SPEC,
5980            crate::common::RW,
5981        >::from_register(self, 0)
5982    }
5983
5984    #[doc = "Non Secure Attribute bit 21"]
5985    #[inline(always)]
5986    pub fn nonsec21(
5987        self,
5988    ) -> crate::common::RegisterField<
5989        21,
5990        0x1,
5991        1,
5992        0,
5993        bbfsar::Nonsec21,
5994        bbfsar::Nonsec21,
5995        Bbfsar_SPEC,
5996        crate::common::RW,
5997    > {
5998        crate::common::RegisterField::<
5999            21,
6000            0x1,
6001            1,
6002            0,
6003            bbfsar::Nonsec21,
6004            bbfsar::Nonsec21,
6005            Bbfsar_SPEC,
6006            crate::common::RW,
6007        >::from_register(self, 0)
6008    }
6009
6010    #[doc = "Non Secure Attribute bit 22"]
6011    #[inline(always)]
6012    pub fn nonsec22(
6013        self,
6014    ) -> crate::common::RegisterField<
6015        22,
6016        0x1,
6017        1,
6018        0,
6019        bbfsar::Nonsec22,
6020        bbfsar::Nonsec22,
6021        Bbfsar_SPEC,
6022        crate::common::RW,
6023    > {
6024        crate::common::RegisterField::<
6025            22,
6026            0x1,
6027            1,
6028            0,
6029            bbfsar::Nonsec22,
6030            bbfsar::Nonsec22,
6031            Bbfsar_SPEC,
6032            crate::common::RW,
6033        >::from_register(self, 0)
6034    }
6035
6036    #[doc = "Non Secure Attribute bit 23"]
6037    #[inline(always)]
6038    pub fn nonsec23(
6039        self,
6040    ) -> crate::common::RegisterField<
6041        23,
6042        0x1,
6043        1,
6044        0,
6045        bbfsar::Nonsec23,
6046        bbfsar::Nonsec23,
6047        Bbfsar_SPEC,
6048        crate::common::RW,
6049    > {
6050        crate::common::RegisterField::<
6051            23,
6052            0x1,
6053            1,
6054            0,
6055            bbfsar::Nonsec23,
6056            bbfsar::Nonsec23,
6057            Bbfsar_SPEC,
6058            crate::common::RW,
6059        >::from_register(self, 0)
6060    }
6061}
6062impl ::core::default::Default for Bbfsar {
6063    #[inline(always)]
6064    fn default() -> Bbfsar {
6065        <crate::RegValueT<Bbfsar_SPEC> as RegisterValue<_>>::new(65535)
6066    }
6067}
6068pub mod bbfsar {
6069
6070    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6071    pub struct Nonsec0_SPEC;
6072    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
6073    impl Nonsec0 {
6074        #[doc = "Secure"]
6075        pub const _0: Self = Self::new(0);
6076
6077        #[doc = "Non Secure"]
6078        pub const _1: Self = Self::new(1);
6079    }
6080    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6081    pub struct Nonsec1_SPEC;
6082    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
6083    impl Nonsec1 {
6084        #[doc = "Secure"]
6085        pub const _0: Self = Self::new(0);
6086
6087        #[doc = "Non Secure"]
6088        pub const _1: Self = Self::new(1);
6089    }
6090    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6091    pub struct Nonsec2_SPEC;
6092    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
6093    impl Nonsec2 {
6094        #[doc = "Secure"]
6095        pub const _0: Self = Self::new(0);
6096
6097        #[doc = "Non Secure"]
6098        pub const _1: Self = Self::new(1);
6099    }
6100    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6101    pub struct Nonsec16_SPEC;
6102    pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
6103    impl Nonsec16 {
6104        #[doc = "Secure"]
6105        pub const _0: Self = Self::new(0);
6106
6107        #[doc = "Non Secure"]
6108        pub const _1: Self = Self::new(1);
6109    }
6110    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6111    pub struct Nonsec17_SPEC;
6112    pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
6113    impl Nonsec17 {
6114        #[doc = "Secure"]
6115        pub const _0: Self = Self::new(0);
6116
6117        #[doc = "Non Secure"]
6118        pub const _1: Self = Self::new(1);
6119    }
6120    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6121    pub struct Nonsec18_SPEC;
6122    pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
6123    impl Nonsec18 {
6124        #[doc = "Secure"]
6125        pub const _0: Self = Self::new(0);
6126
6127        #[doc = "Non Secure"]
6128        pub const _1: Self = Self::new(1);
6129    }
6130    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6131    pub struct Nonsec19_SPEC;
6132    pub type Nonsec19 = crate::EnumBitfieldStruct<u8, Nonsec19_SPEC>;
6133    impl Nonsec19 {
6134        #[doc = "Secure"]
6135        pub const _0: Self = Self::new(0);
6136
6137        #[doc = "Non Secure"]
6138        pub const _1: Self = Self::new(1);
6139    }
6140    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6141    pub struct Nonsec20_SPEC;
6142    pub type Nonsec20 = crate::EnumBitfieldStruct<u8, Nonsec20_SPEC>;
6143    impl Nonsec20 {
6144        #[doc = "Secure"]
6145        pub const _0: Self = Self::new(0);
6146
6147        #[doc = "Non Secure"]
6148        pub const _1: Self = Self::new(1);
6149    }
6150    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6151    pub struct Nonsec21_SPEC;
6152    pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
6153    impl Nonsec21 {
6154        #[doc = "Secure"]
6155        pub const _0: Self = Self::new(0);
6156
6157        #[doc = "Non Secure"]
6158        pub const _1: Self = Self::new(1);
6159    }
6160    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6161    pub struct Nonsec22_SPEC;
6162    pub type Nonsec22 = crate::EnumBitfieldStruct<u8, Nonsec22_SPEC>;
6163    impl Nonsec22 {
6164        #[doc = "Secure"]
6165        pub const _0: Self = Self::new(0);
6166
6167        #[doc = "Non Secure"]
6168        pub const _1: Self = Self::new(1);
6169    }
6170    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6171    pub struct Nonsec23_SPEC;
6172    pub type Nonsec23 = crate::EnumBitfieldStruct<u8, Nonsec23_SPEC>;
6173    impl Nonsec23 {
6174        #[doc = "Secure"]
6175        pub const _0: Self = Self::new(0);
6176
6177        #[doc = "Non Secure"]
6178        pub const _1: Self = Self::new(1);
6179    }
6180}
6181#[doc(hidden)]
6182#[derive(Copy, Clone, Eq, PartialEq)]
6183pub struct Dpfsar_SPEC;
6184impl crate::sealed::RegSpec for Dpfsar_SPEC {
6185    type DataType = u32;
6186}
6187
6188#[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
6189pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
6190
6191impl Dpfsar {
6192    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 0"]
6193    #[inline(always)]
6194    pub fn dpfsa00(
6195        self,
6196    ) -> crate::common::RegisterField<
6197        0,
6198        0x1,
6199        1,
6200        0,
6201        dpfsar::Dpfsa00,
6202        dpfsar::Dpfsa00,
6203        Dpfsar_SPEC,
6204        crate::common::RW,
6205    > {
6206        crate::common::RegisterField::<
6207            0,
6208            0x1,
6209            1,
6210            0,
6211            dpfsar::Dpfsa00,
6212            dpfsar::Dpfsa00,
6213            Dpfsar_SPEC,
6214            crate::common::RW,
6215        >::from_register(self, 0)
6216    }
6217
6218    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 1"]
6219    #[inline(always)]
6220    pub fn dpfsa01(
6221        self,
6222    ) -> crate::common::RegisterField<
6223        1,
6224        0x1,
6225        1,
6226        0,
6227        dpfsar::Dpfsa01,
6228        dpfsar::Dpfsa01,
6229        Dpfsar_SPEC,
6230        crate::common::RW,
6231    > {
6232        crate::common::RegisterField::<
6233            1,
6234            0x1,
6235            1,
6236            0,
6237            dpfsar::Dpfsa01,
6238            dpfsar::Dpfsa01,
6239            Dpfsar_SPEC,
6240            crate::common::RW,
6241        >::from_register(self, 0)
6242    }
6243
6244    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6245    #[inline(always)]
6246    pub fn dpfsa04(
6247        self,
6248    ) -> crate::common::RegisterField<
6249        4,
6250        0x1,
6251        1,
6252        0,
6253        dpfsar::Dpfsa04,
6254        dpfsar::Dpfsa04,
6255        Dpfsar_SPEC,
6256        crate::common::RW,
6257    > {
6258        crate::common::RegisterField::<
6259            4,
6260            0x1,
6261            1,
6262            0,
6263            dpfsar::Dpfsa04,
6264            dpfsar::Dpfsa04,
6265            Dpfsar_SPEC,
6266            crate::common::RW,
6267        >::from_register(self, 0)
6268    }
6269
6270    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6271    #[inline(always)]
6272    pub fn dpfsa05(
6273        self,
6274    ) -> crate::common::RegisterField<
6275        5,
6276        0x1,
6277        1,
6278        0,
6279        dpfsar::Dpfsa05,
6280        dpfsar::Dpfsa05,
6281        Dpfsar_SPEC,
6282        crate::common::RW,
6283    > {
6284        crate::common::RegisterField::<
6285            5,
6286            0x1,
6287            1,
6288            0,
6289            dpfsar::Dpfsa05,
6290            dpfsar::Dpfsa05,
6291            Dpfsar_SPEC,
6292            crate::common::RW,
6293        >::from_register(self, 0)
6294    }
6295
6296    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6297    #[inline(always)]
6298    pub fn dpfsa06(
6299        self,
6300    ) -> crate::common::RegisterField<
6301        6,
6302        0x1,
6303        1,
6304        0,
6305        dpfsar::Dpfsa06,
6306        dpfsar::Dpfsa06,
6307        Dpfsar_SPEC,
6308        crate::common::RW,
6309    > {
6310        crate::common::RegisterField::<
6311            6,
6312            0x1,
6313            1,
6314            0,
6315            dpfsar::Dpfsa06,
6316            dpfsar::Dpfsa06,
6317            Dpfsar_SPEC,
6318            crate::common::RW,
6319        >::from_register(self, 0)
6320    }
6321
6322    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6323    #[inline(always)]
6324    pub fn dpfsa07(
6325        self,
6326    ) -> crate::common::RegisterField<
6327        7,
6328        0x1,
6329        1,
6330        0,
6331        dpfsar::Dpfsa07,
6332        dpfsar::Dpfsa07,
6333        Dpfsar_SPEC,
6334        crate::common::RW,
6335    > {
6336        crate::common::RegisterField::<
6337            7,
6338            0x1,
6339            1,
6340            0,
6341            dpfsar::Dpfsa07,
6342            dpfsar::Dpfsa07,
6343            Dpfsar_SPEC,
6344            crate::common::RW,
6345        >::from_register(self, 0)
6346    }
6347
6348    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6349    #[inline(always)]
6350    pub fn dpfsa08(
6351        self,
6352    ) -> crate::common::RegisterField<
6353        8,
6354        0x1,
6355        1,
6356        0,
6357        dpfsar::Dpfsa08,
6358        dpfsar::Dpfsa08,
6359        Dpfsar_SPEC,
6360        crate::common::RW,
6361    > {
6362        crate::common::RegisterField::<
6363            8,
6364            0x1,
6365            1,
6366            0,
6367            dpfsar::Dpfsa08,
6368            dpfsar::Dpfsa08,
6369            Dpfsar_SPEC,
6370            crate::common::RW,
6371        >::from_register(self, 0)
6372    }
6373
6374    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 4 to 9)"]
6375    #[inline(always)]
6376    pub fn dpfsa09(
6377        self,
6378    ) -> crate::common::RegisterField<
6379        9,
6380        0x1,
6381        1,
6382        0,
6383        dpfsar::Dpfsa09,
6384        dpfsar::Dpfsa09,
6385        Dpfsar_SPEC,
6386        crate::common::RW,
6387    > {
6388        crate::common::RegisterField::<
6389            9,
6390            0x1,
6391            1,
6392            0,
6393            dpfsar::Dpfsa09,
6394            dpfsar::Dpfsa09,
6395            Dpfsar_SPEC,
6396            crate::common::RW,
6397        >::from_register(self, 0)
6398    }
6399
6400    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 16"]
6401    #[inline(always)]
6402    pub fn dpfsa16(
6403        self,
6404    ) -> crate::common::RegisterField<
6405        16,
6406        0x1,
6407        1,
6408        0,
6409        dpfsar::Dpfsa16,
6410        dpfsar::Dpfsa16,
6411        Dpfsar_SPEC,
6412        crate::common::RW,
6413    > {
6414        crate::common::RegisterField::<
6415            16,
6416            0x1,
6417            1,
6418            0,
6419            dpfsar::Dpfsa16,
6420            dpfsar::Dpfsa16,
6421            Dpfsar_SPEC,
6422            crate::common::RW,
6423        >::from_register(self, 0)
6424    }
6425
6426    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 17"]
6427    #[inline(always)]
6428    pub fn dpfsa17(
6429        self,
6430    ) -> crate::common::RegisterField<
6431        17,
6432        0x1,
6433        1,
6434        0,
6435        dpfsar::Dpfsa17,
6436        dpfsar::Dpfsa17,
6437        Dpfsar_SPEC,
6438        crate::common::RW,
6439    > {
6440        crate::common::RegisterField::<
6441            17,
6442            0x1,
6443            1,
6444            0,
6445            dpfsar::Dpfsa17,
6446            dpfsar::Dpfsa17,
6447            Dpfsar_SPEC,
6448            crate::common::RW,
6449        >::from_register(self, 0)
6450    }
6451
6452    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 18"]
6453    #[inline(always)]
6454    pub fn dpfsa18(
6455        self,
6456    ) -> crate::common::RegisterField<
6457        18,
6458        0x1,
6459        1,
6460        0,
6461        dpfsar::Dpfsa18,
6462        dpfsar::Dpfsa18,
6463        Dpfsar_SPEC,
6464        crate::common::RW,
6465    > {
6466        crate::common::RegisterField::<
6467            18,
6468            0x1,
6469            1,
6470            0,
6471            dpfsar::Dpfsa18,
6472            dpfsar::Dpfsa18,
6473            Dpfsar_SPEC,
6474            crate::common::RW,
6475        >::from_register(self, 0)
6476    }
6477
6478    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 19"]
6479    #[inline(always)]
6480    pub fn dpfsa19(
6481        self,
6482    ) -> crate::common::RegisterField<
6483        19,
6484        0x1,
6485        1,
6486        0,
6487        dpfsar::Dpfsa19,
6488        dpfsar::Dpfsa19,
6489        Dpfsar_SPEC,
6490        crate::common::RW,
6491    > {
6492        crate::common::RegisterField::<
6493            19,
6494            0x1,
6495            1,
6496            0,
6497            dpfsar::Dpfsa19,
6498            dpfsar::Dpfsa19,
6499            Dpfsar_SPEC,
6500            crate::common::RW,
6501        >::from_register(self, 0)
6502    }
6503
6504    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 20"]
6505    #[inline(always)]
6506    pub fn dpfsa20(
6507        self,
6508    ) -> crate::common::RegisterField<
6509        20,
6510        0x1,
6511        1,
6512        0,
6513        dpfsar::Dpfsa20,
6514        dpfsar::Dpfsa20,
6515        Dpfsar_SPEC,
6516        crate::common::RW,
6517    > {
6518        crate::common::RegisterField::<
6519            20,
6520            0x1,
6521            1,
6522            0,
6523            dpfsar::Dpfsa20,
6524            dpfsar::Dpfsa20,
6525            Dpfsar_SPEC,
6526            crate::common::RW,
6527        >::from_register(self, 0)
6528    }
6529
6530    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 24"]
6531    #[inline(always)]
6532    pub fn dpfsa24(
6533        self,
6534    ) -> crate::common::RegisterField<
6535        24,
6536        0x1,
6537        1,
6538        0,
6539        dpfsar::Dpfsa24,
6540        dpfsar::Dpfsa24,
6541        Dpfsar_SPEC,
6542        crate::common::RW,
6543    > {
6544        crate::common::RegisterField::<
6545            24,
6546            0x1,
6547            1,
6548            0,
6549            dpfsar::Dpfsa24,
6550            dpfsar::Dpfsa24,
6551            Dpfsar_SPEC,
6552            crate::common::RW,
6553        >::from_register(self, 0)
6554    }
6555
6556    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 26"]
6557    #[inline(always)]
6558    pub fn dpfsa26(
6559        self,
6560    ) -> crate::common::RegisterField<
6561        26,
6562        0x1,
6563        1,
6564        0,
6565        dpfsar::Dpfsa26,
6566        dpfsar::Dpfsa26,
6567        Dpfsar_SPEC,
6568        crate::common::RW,
6569    > {
6570        crate::common::RegisterField::<
6571            26,
6572            0x1,
6573            1,
6574            0,
6575            dpfsar::Dpfsa26,
6576            dpfsar::Dpfsa26,
6577            Dpfsar_SPEC,
6578            crate::common::RW,
6579        >::from_register(self, 0)
6580    }
6581
6582    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 27"]
6583    #[inline(always)]
6584    pub fn dpfsa27(
6585        self,
6586    ) -> crate::common::RegisterField<
6587        27,
6588        0x1,
6589        1,
6590        0,
6591        dpfsar::Dpfsa27,
6592        dpfsar::Dpfsa27,
6593        Dpfsar_SPEC,
6594        crate::common::RW,
6595    > {
6596        crate::common::RegisterField::<
6597            27,
6598            0x1,
6599            1,
6600            0,
6601            dpfsar::Dpfsa27,
6602            dpfsar::Dpfsa27,
6603            Dpfsar_SPEC,
6604            crate::common::RW,
6605        >::from_register(self, 0)
6606    }
6607}
6608impl ::core::default::Default for Dpfsar {
6609    #[inline(always)]
6610    fn default() -> Dpfsar {
6611        <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(4294967295)
6612    }
6613}
6614pub mod dpfsar {
6615
6616    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6617    pub struct Dpfsa00_SPEC;
6618    pub type Dpfsa00 = crate::EnumBitfieldStruct<u8, Dpfsa00_SPEC>;
6619    impl Dpfsa00 {
6620        #[doc = "Secure"]
6621        pub const _0: Self = Self::new(0);
6622
6623        #[doc = "Non Secure"]
6624        pub const _1: Self = Self::new(1);
6625    }
6626    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6627    pub struct Dpfsa01_SPEC;
6628    pub type Dpfsa01 = crate::EnumBitfieldStruct<u8, Dpfsa01_SPEC>;
6629    impl Dpfsa01 {
6630        #[doc = "Secure"]
6631        pub const _0: Self = Self::new(0);
6632
6633        #[doc = "Non Secure"]
6634        pub const _1: Self = Self::new(1);
6635    }
6636    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6637    pub struct Dpfsa04_SPEC;
6638    pub type Dpfsa04 = crate::EnumBitfieldStruct<u8, Dpfsa04_SPEC>;
6639    impl Dpfsa04 {
6640        #[doc = "Secure"]
6641        pub const _0: Self = Self::new(0);
6642
6643        #[doc = "Non Secure"]
6644        pub const _1: Self = Self::new(1);
6645    }
6646    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6647    pub struct Dpfsa05_SPEC;
6648    pub type Dpfsa05 = crate::EnumBitfieldStruct<u8, Dpfsa05_SPEC>;
6649    impl Dpfsa05 {
6650        #[doc = "Secure"]
6651        pub const _0: Self = Self::new(0);
6652
6653        #[doc = "Non Secure"]
6654        pub const _1: Self = Self::new(1);
6655    }
6656    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6657    pub struct Dpfsa06_SPEC;
6658    pub type Dpfsa06 = crate::EnumBitfieldStruct<u8, Dpfsa06_SPEC>;
6659    impl Dpfsa06 {
6660        #[doc = "Secure"]
6661        pub const _0: Self = Self::new(0);
6662
6663        #[doc = "Non Secure"]
6664        pub const _1: Self = Self::new(1);
6665    }
6666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6667    pub struct Dpfsa07_SPEC;
6668    pub type Dpfsa07 = crate::EnumBitfieldStruct<u8, Dpfsa07_SPEC>;
6669    impl Dpfsa07 {
6670        #[doc = "Secure"]
6671        pub const _0: Self = Self::new(0);
6672
6673        #[doc = "Non Secure"]
6674        pub const _1: Self = Self::new(1);
6675    }
6676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6677    pub struct Dpfsa08_SPEC;
6678    pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
6679    impl Dpfsa08 {
6680        #[doc = "Secure"]
6681        pub const _0: Self = Self::new(0);
6682
6683        #[doc = "Non Secure"]
6684        pub const _1: Self = Self::new(1);
6685    }
6686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6687    pub struct Dpfsa09_SPEC;
6688    pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
6689    impl Dpfsa09 {
6690        #[doc = "Secure"]
6691        pub const _0: Self = Self::new(0);
6692
6693        #[doc = "Non Secure"]
6694        pub const _1: Self = Self::new(1);
6695    }
6696    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6697    pub struct Dpfsa16_SPEC;
6698    pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
6699    impl Dpfsa16 {
6700        #[doc = "Secure"]
6701        pub const _0: Self = Self::new(0);
6702
6703        #[doc = "Non Secure"]
6704        pub const _1: Self = Self::new(1);
6705    }
6706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6707    pub struct Dpfsa17_SPEC;
6708    pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
6709    impl Dpfsa17 {
6710        #[doc = "Secure"]
6711        pub const _0: Self = Self::new(0);
6712
6713        #[doc = "Non Secure"]
6714        pub const _1: Self = Self::new(1);
6715    }
6716    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6717    pub struct Dpfsa18_SPEC;
6718    pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
6719    impl Dpfsa18 {
6720        #[doc = "Secure"]
6721        pub const _0: Self = Self::new(0);
6722
6723        #[doc = "Non Secure"]
6724        pub const _1: Self = Self::new(1);
6725    }
6726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6727    pub struct Dpfsa19_SPEC;
6728    pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
6729    impl Dpfsa19 {
6730        #[doc = "Secure"]
6731        pub const _0: Self = Self::new(0);
6732
6733        #[doc = "Non Secure"]
6734        pub const _1: Self = Self::new(1);
6735    }
6736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6737    pub struct Dpfsa20_SPEC;
6738    pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
6739    impl Dpfsa20 {
6740        #[doc = "Secure"]
6741        pub const _0: Self = Self::new(0);
6742
6743        #[doc = "Non Secure"]
6744        pub const _1: Self = Self::new(1);
6745    }
6746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6747    pub struct Dpfsa24_SPEC;
6748    pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
6749    impl Dpfsa24 {
6750        #[doc = "Secure"]
6751        pub const _0: Self = Self::new(0);
6752
6753        #[doc = "Non Secure"]
6754        pub const _1: Self = Self::new(1);
6755    }
6756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6757    pub struct Dpfsa26_SPEC;
6758    pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
6759    impl Dpfsa26 {
6760        #[doc = "Secure"]
6761        pub const _0: Self = Self::new(0);
6762
6763        #[doc = "Non Secure"]
6764        pub const _1: Self = Self::new(1);
6765    }
6766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6767    pub struct Dpfsa27_SPEC;
6768    pub type Dpfsa27 = crate::EnumBitfieldStruct<u8, Dpfsa27_SPEC>;
6769    impl Dpfsa27 {
6770        #[doc = "Secure"]
6771        pub const _0: Self = Self::new(0);
6772
6773        #[doc = "Non Secure"]
6774        pub const _1: Self = Self::new(1);
6775    }
6776}
6777#[doc(hidden)]
6778#[derive(Copy, Clone, Eq, PartialEq)]
6779pub struct Prcr_SPEC;
6780impl crate::sealed::RegSpec for Prcr_SPEC {
6781    type DataType = u16;
6782}
6783
6784#[doc = "Protect Register"]
6785pub type Prcr = crate::RegValueT<Prcr_SPEC>;
6786
6787impl Prcr {
6788    #[doc = "Enable writing to the registers related to the clock generation circuit"]
6789    #[inline(always)]
6790    pub fn prc0(
6791        self,
6792    ) -> crate::common::RegisterField<
6793        0,
6794        0x1,
6795        1,
6796        0,
6797        prcr::Prc0,
6798        prcr::Prc0,
6799        Prcr_SPEC,
6800        crate::common::RW,
6801    > {
6802        crate::common::RegisterField::<
6803            0,
6804            0x1,
6805            1,
6806            0,
6807            prcr::Prc0,
6808            prcr::Prc0,
6809            Prcr_SPEC,
6810            crate::common::RW,
6811        >::from_register(self, 0)
6812    }
6813
6814    #[doc = "Enable writing to the registers related to the low power modes, and the battery backup function"]
6815    #[inline(always)]
6816    pub fn prc1(
6817        self,
6818    ) -> crate::common::RegisterField<
6819        1,
6820        0x1,
6821        1,
6822        0,
6823        prcr::Prc1,
6824        prcr::Prc1,
6825        Prcr_SPEC,
6826        crate::common::RW,
6827    > {
6828        crate::common::RegisterField::<
6829            1,
6830            0x1,
6831            1,
6832            0,
6833            prcr::Prc1,
6834            prcr::Prc1,
6835            Prcr_SPEC,
6836            crate::common::RW,
6837        >::from_register(self, 0)
6838    }
6839
6840    #[doc = "Enable writing to the registers related to the LVD"]
6841    #[inline(always)]
6842    pub fn prc3(
6843        self,
6844    ) -> crate::common::RegisterField<
6845        3,
6846        0x1,
6847        1,
6848        0,
6849        prcr::Prc3,
6850        prcr::Prc3,
6851        Prcr_SPEC,
6852        crate::common::RW,
6853    > {
6854        crate::common::RegisterField::<
6855            3,
6856            0x1,
6857            1,
6858            0,
6859            prcr::Prc3,
6860            prcr::Prc3,
6861            Prcr_SPEC,
6862            crate::common::RW,
6863        >::from_register(self, 0)
6864    }
6865
6866    #[inline(always)]
6867    pub fn prc4(
6868        self,
6869    ) -> crate::common::RegisterField<
6870        4,
6871        0x1,
6872        1,
6873        0,
6874        prcr::Prc4,
6875        prcr::Prc4,
6876        Prcr_SPEC,
6877        crate::common::RW,
6878    > {
6879        crate::common::RegisterField::<
6880            4,
6881            0x1,
6882            1,
6883            0,
6884            prcr::Prc4,
6885            prcr::Prc4,
6886            Prcr_SPEC,
6887            crate::common::RW,
6888        >::from_register(self, 0)
6889    }
6890
6891    #[doc = "PRC Key Code"]
6892    #[inline(always)]
6893    pub fn prkey(
6894        self,
6895    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Prcr_SPEC, crate::common::W> {
6896        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Prcr_SPEC,crate::common::W>::from_register(self,0)
6897    }
6898}
6899impl ::core::default::Default for Prcr {
6900    #[inline(always)]
6901    fn default() -> Prcr {
6902        <crate::RegValueT<Prcr_SPEC> as RegisterValue<_>>::new(0)
6903    }
6904}
6905pub mod prcr {
6906
6907    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6908    pub struct Prc0_SPEC;
6909    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
6910    impl Prc0 {
6911        #[doc = "Disable writes"]
6912        pub const _0: Self = Self::new(0);
6913
6914        #[doc = "Enable writes"]
6915        pub const _1: Self = Self::new(1);
6916    }
6917    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6918    pub struct Prc1_SPEC;
6919    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
6920    impl Prc1 {
6921        #[doc = "Disable writes"]
6922        pub const _0: Self = Self::new(0);
6923
6924        #[doc = "Enable writes"]
6925        pub const _1: Self = Self::new(1);
6926    }
6927    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6928    pub struct Prc3_SPEC;
6929    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
6930    impl Prc3 {
6931        #[doc = "Disable writes"]
6932        pub const _0: Self = Self::new(0);
6933
6934        #[doc = "Enable writes"]
6935        pub const _1: Self = Self::new(1);
6936    }
6937    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6938    pub struct Prc4_SPEC;
6939    pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
6940    impl Prc4 {
6941        #[doc = "Disable writes"]
6942        pub const _0: Self = Self::new(0);
6943
6944        #[doc = "Enable writes"]
6945        pub const _1: Self = Self::new(1);
6946    }
6947}
6948#[doc(hidden)]
6949#[derive(Copy, Clone, Eq, PartialEq)]
6950pub struct Dpsbycr_SPEC;
6951impl crate::sealed::RegSpec for Dpsbycr_SPEC {
6952    type DataType = u8;
6953}
6954
6955#[doc = "Deep Software Standby Control Register"]
6956pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
6957
6958impl Dpsbycr {
6959    #[doc = "Power-Supply Control"]
6960    #[inline(always)]
6961    pub fn deepcut(
6962        self,
6963    ) -> crate::common::RegisterField<
6964        0,
6965        0x3,
6966        1,
6967        0,
6968        dpsbycr::Deepcut,
6969        dpsbycr::Deepcut,
6970        Dpsbycr_SPEC,
6971        crate::common::RW,
6972    > {
6973        crate::common::RegisterField::<
6974            0,
6975            0x3,
6976            1,
6977            0,
6978            dpsbycr::Deepcut,
6979            dpsbycr::Deepcut,
6980            Dpsbycr_SPEC,
6981            crate::common::RW,
6982        >::from_register(self, 0)
6983    }
6984
6985    #[doc = "I/O Port Retention"]
6986    #[inline(always)]
6987    pub fn iokeep(
6988        self,
6989    ) -> crate::common::RegisterField<
6990        6,
6991        0x1,
6992        1,
6993        0,
6994        dpsbycr::Iokeep,
6995        dpsbycr::Iokeep,
6996        Dpsbycr_SPEC,
6997        crate::common::RW,
6998    > {
6999        crate::common::RegisterField::<
7000            6,
7001            0x1,
7002            1,
7003            0,
7004            dpsbycr::Iokeep,
7005            dpsbycr::Iokeep,
7006            Dpsbycr_SPEC,
7007            crate::common::RW,
7008        >::from_register(self, 0)
7009    }
7010
7011    #[doc = "Deep Software Standby"]
7012    #[inline(always)]
7013    pub fn dpsby(
7014        self,
7015    ) -> crate::common::RegisterField<
7016        7,
7017        0x1,
7018        1,
7019        0,
7020        dpsbycr::Dpsby,
7021        dpsbycr::Dpsby,
7022        Dpsbycr_SPEC,
7023        crate::common::RW,
7024    > {
7025        crate::common::RegisterField::<
7026            7,
7027            0x1,
7028            1,
7029            0,
7030            dpsbycr::Dpsby,
7031            dpsbycr::Dpsby,
7032            Dpsbycr_SPEC,
7033            crate::common::RW,
7034        >::from_register(self, 0)
7035    }
7036}
7037impl ::core::default::Default for Dpsbycr {
7038    #[inline(always)]
7039    fn default() -> Dpsbycr {
7040        <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(1)
7041    }
7042}
7043pub mod dpsbycr {
7044
7045    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7046    pub struct Deepcut_SPEC;
7047    pub type Deepcut = crate::EnumBitfieldStruct<u8, Deepcut_SPEC>;
7048    impl Deepcut {
7049        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGTn (n = 0 to 3), and USBFS resume detecting unit is supplied in Deep Software Standby mode."]
7050        pub const _00: Self = Self::new(0);
7051
7052        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode."]
7053        pub const _01: Self = Self::new(1);
7054
7055        #[doc = "Setting prohibited"]
7056        pub const _10: Self = Self::new(2);
7057
7058        #[doc = "Power to the standby RAM, Low-speed on-chip oscillator, AGT, and USBFS resume detecting unit is not supplied in Deep Software Standby mode. In addition, LVD is disabled and the low power function in a power-on reset circuit is enabled."]
7059        pub const _11: Self = Self::new(3);
7060    }
7061    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7062    pub struct Iokeep_SPEC;
7063    pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
7064    impl Iokeep {
7065        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
7066        pub const _0: Self = Self::new(0);
7067
7068        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
7069        pub const _1: Self = Self::new(1);
7070    }
7071    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7072    pub struct Dpsby_SPEC;
7073    pub type Dpsby = crate::EnumBitfieldStruct<u8, Dpsby_SPEC>;
7074    impl Dpsby {
7075        #[doc = "Sleep mode (SBYCR.SSBY=0) / Software Standby mode (SBYCR.SSBY=1)"]
7076        pub const _0: Self = Self::new(0);
7077
7078        #[doc = "Sleep mode (SBYCR.SSBY=0)  / Deep Software Standby mode (SBYCR.SSBY=1)"]
7079        pub const _1: Self = Self::new(1);
7080    }
7081}
7082#[doc(hidden)]
7083#[derive(Copy, Clone, Eq, PartialEq)]
7084pub struct Dpswcr_SPEC;
7085impl crate::sealed::RegSpec for Dpswcr_SPEC {
7086    type DataType = u8;
7087}
7088
7089#[doc = "Deep Software Standby Wait Control Register"]
7090pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
7091
7092impl Dpswcr {
7093    #[doc = "Deep Software Wait Standby Time Setting Bit"]
7094    #[inline(always)]
7095    pub fn wtsts(
7096        self,
7097    ) -> crate::common::RegisterField<
7098        0,
7099        0x3f,
7100        1,
7101        0,
7102        dpswcr::Wtsts,
7103        dpswcr::Wtsts,
7104        Dpswcr_SPEC,
7105        crate::common::RW,
7106    > {
7107        crate::common::RegisterField::<
7108            0,
7109            0x3f,
7110            1,
7111            0,
7112            dpswcr::Wtsts,
7113            dpswcr::Wtsts,
7114            Dpswcr_SPEC,
7115            crate::common::RW,
7116        >::from_register(self, 0)
7117    }
7118}
7119impl ::core::default::Default for Dpswcr {
7120    #[inline(always)]
7121    fn default() -> Dpswcr {
7122        <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(25)
7123    }
7124}
7125pub mod dpswcr {
7126
7127    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7128    pub struct Wtsts_SPEC;
7129    pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
7130    impl Wtsts {
7131        #[doc = "Wait cycle for fast recovery"]
7132        pub const _0_X_0_E: Self = Self::new(14);
7133
7134        #[doc = "Wait cycle for slow recovery"]
7135        pub const _0_X_19: Self = Self::new(25);
7136    }
7137}
7138#[doc(hidden)]
7139#[derive(Copy, Clone, Eq, PartialEq)]
7140pub struct Dpsier0_SPEC;
7141impl crate::sealed::RegSpec for Dpsier0_SPEC {
7142    type DataType = u8;
7143}
7144
7145#[doc = "Deep Software Standby Interrupt Enable Register 0"]
7146pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
7147
7148impl Dpsier0 {
7149    #[doc = "IRQ0-DS Pin Enable"]
7150    #[inline(always)]
7151    pub fn dirq0e(
7152        self,
7153    ) -> crate::common::RegisterField<
7154        0,
7155        0x1,
7156        1,
7157        0,
7158        dpsier0::Dirq0E,
7159        dpsier0::Dirq0E,
7160        Dpsier0_SPEC,
7161        crate::common::RW,
7162    > {
7163        crate::common::RegisterField::<
7164            0,
7165            0x1,
7166            1,
7167            0,
7168            dpsier0::Dirq0E,
7169            dpsier0::Dirq0E,
7170            Dpsier0_SPEC,
7171            crate::common::RW,
7172        >::from_register(self, 0)
7173    }
7174
7175    #[doc = "IRQ1-DS Pin Enable"]
7176    #[inline(always)]
7177    pub fn dirq1e(
7178        self,
7179    ) -> crate::common::RegisterField<
7180        1,
7181        0x1,
7182        1,
7183        0,
7184        dpsier0::Dirq1E,
7185        dpsier0::Dirq1E,
7186        Dpsier0_SPEC,
7187        crate::common::RW,
7188    > {
7189        crate::common::RegisterField::<
7190            1,
7191            0x1,
7192            1,
7193            0,
7194            dpsier0::Dirq1E,
7195            dpsier0::Dirq1E,
7196            Dpsier0_SPEC,
7197            crate::common::RW,
7198        >::from_register(self, 0)
7199    }
7200
7201    #[doc = "IRQ4-DS Pin Enable"]
7202    #[inline(always)]
7203    pub fn dirq4e(
7204        self,
7205    ) -> crate::common::RegisterField<
7206        4,
7207        0x1,
7208        1,
7209        0,
7210        dpsier0::Dirq4E,
7211        dpsier0::Dirq4E,
7212        Dpsier0_SPEC,
7213        crate::common::RW,
7214    > {
7215        crate::common::RegisterField::<
7216            4,
7217            0x1,
7218            1,
7219            0,
7220            dpsier0::Dirq4E,
7221            dpsier0::Dirq4E,
7222            Dpsier0_SPEC,
7223            crate::common::RW,
7224        >::from_register(self, 0)
7225    }
7226
7227    #[doc = "IRQ5-DS Pin Enable"]
7228    #[inline(always)]
7229    pub fn dirq5e(
7230        self,
7231    ) -> crate::common::RegisterField<
7232        5,
7233        0x1,
7234        1,
7235        0,
7236        dpsier0::Dirq5E,
7237        dpsier0::Dirq5E,
7238        Dpsier0_SPEC,
7239        crate::common::RW,
7240    > {
7241        crate::common::RegisterField::<
7242            5,
7243            0x1,
7244            1,
7245            0,
7246            dpsier0::Dirq5E,
7247            dpsier0::Dirq5E,
7248            Dpsier0_SPEC,
7249            crate::common::RW,
7250        >::from_register(self, 0)
7251    }
7252
7253    #[doc = "IRQ6-DS Pin Enable"]
7254    #[inline(always)]
7255    pub fn dirq6e(
7256        self,
7257    ) -> crate::common::RegisterField<
7258        6,
7259        0x1,
7260        1,
7261        0,
7262        dpsier0::Dirq6E,
7263        dpsier0::Dirq6E,
7264        Dpsier0_SPEC,
7265        crate::common::RW,
7266    > {
7267        crate::common::RegisterField::<
7268            6,
7269            0x1,
7270            1,
7271            0,
7272            dpsier0::Dirq6E,
7273            dpsier0::Dirq6E,
7274            Dpsier0_SPEC,
7275            crate::common::RW,
7276        >::from_register(self, 0)
7277    }
7278
7279    #[doc = "IRQ7-DS Pin Enable"]
7280    #[inline(always)]
7281    pub fn dirq7e(
7282        self,
7283    ) -> crate::common::RegisterField<
7284        7,
7285        0x1,
7286        1,
7287        0,
7288        dpsier0::Dirq7E,
7289        dpsier0::Dirq7E,
7290        Dpsier0_SPEC,
7291        crate::common::RW,
7292    > {
7293        crate::common::RegisterField::<
7294            7,
7295            0x1,
7296            1,
7297            0,
7298            dpsier0::Dirq7E,
7299            dpsier0::Dirq7E,
7300            Dpsier0_SPEC,
7301            crate::common::RW,
7302        >::from_register(self, 0)
7303    }
7304}
7305impl ::core::default::Default for Dpsier0 {
7306    #[inline(always)]
7307    fn default() -> Dpsier0 {
7308        <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
7309    }
7310}
7311pub mod dpsier0 {
7312
7313    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7314    pub struct Dirq0E_SPEC;
7315    pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
7316    impl Dirq0E {
7317        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7318        pub const _0: Self = Self::new(0);
7319
7320        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7321        pub const _1: Self = Self::new(1);
7322    }
7323    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7324    pub struct Dirq1E_SPEC;
7325    pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
7326    impl Dirq1E {
7327        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7328        pub const _0: Self = Self::new(0);
7329
7330        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7331        pub const _1: Self = Self::new(1);
7332    }
7333    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7334    pub struct Dirq4E_SPEC;
7335    pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
7336    impl Dirq4E {
7337        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7338        pub const _0: Self = Self::new(0);
7339
7340        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7341        pub const _1: Self = Self::new(1);
7342    }
7343    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7344    pub struct Dirq5E_SPEC;
7345    pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
7346    impl Dirq5E {
7347        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7348        pub const _0: Self = Self::new(0);
7349
7350        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7351        pub const _1: Self = Self::new(1);
7352    }
7353    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7354    pub struct Dirq6E_SPEC;
7355    pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
7356    impl Dirq6E {
7357        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7358        pub const _0: Self = Self::new(0);
7359
7360        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7361        pub const _1: Self = Self::new(1);
7362    }
7363    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7364    pub struct Dirq7E_SPEC;
7365    pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
7366    impl Dirq7E {
7367        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7368        pub const _0: Self = Self::new(0);
7369
7370        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7371        pub const _1: Self = Self::new(1);
7372    }
7373}
7374#[doc(hidden)]
7375#[derive(Copy, Clone, Eq, PartialEq)]
7376pub struct Dpsier1_SPEC;
7377impl crate::sealed::RegSpec for Dpsier1_SPEC {
7378    type DataType = u8;
7379}
7380
7381#[doc = "Deep Software Standby Interrupt Enable Register 1"]
7382pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
7383
7384impl Dpsier1 {
7385    #[doc = "IRQ8-DS Pin Enable"]
7386    #[inline(always)]
7387    pub fn dirq8e(
7388        self,
7389    ) -> crate::common::RegisterField<
7390        0,
7391        0x1,
7392        1,
7393        0,
7394        dpsier1::Dirq8E,
7395        dpsier1::Dirq8E,
7396        Dpsier1_SPEC,
7397        crate::common::RW,
7398    > {
7399        crate::common::RegisterField::<
7400            0,
7401            0x1,
7402            1,
7403            0,
7404            dpsier1::Dirq8E,
7405            dpsier1::Dirq8E,
7406            Dpsier1_SPEC,
7407            crate::common::RW,
7408        >::from_register(self, 0)
7409    }
7410
7411    #[doc = "IRQ9-DS Pin Enable"]
7412    #[inline(always)]
7413    pub fn dirq9e(
7414        self,
7415    ) -> crate::common::RegisterField<
7416        1,
7417        0x1,
7418        1,
7419        0,
7420        dpsier1::Dirq9E,
7421        dpsier1::Dirq9E,
7422        Dpsier1_SPEC,
7423        crate::common::RW,
7424    > {
7425        crate::common::RegisterField::<
7426            1,
7427            0x1,
7428            1,
7429            0,
7430            dpsier1::Dirq9E,
7431            dpsier1::Dirq9E,
7432            Dpsier1_SPEC,
7433            crate::common::RW,
7434        >::from_register(self, 0)
7435    }
7436}
7437impl ::core::default::Default for Dpsier1 {
7438    #[inline(always)]
7439    fn default() -> Dpsier1 {
7440        <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
7441    }
7442}
7443pub mod dpsier1 {
7444
7445    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7446    pub struct Dirq8E_SPEC;
7447    pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
7448    impl Dirq8E {
7449        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7450        pub const _0: Self = Self::new(0);
7451
7452        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7453        pub const _1: Self = Self::new(1);
7454    }
7455    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7456    pub struct Dirq9E_SPEC;
7457    pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
7458    impl Dirq9E {
7459        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7460        pub const _0: Self = Self::new(0);
7461
7462        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7463        pub const _1: Self = Self::new(1);
7464    }
7465}
7466#[doc(hidden)]
7467#[derive(Copy, Clone, Eq, PartialEq)]
7468pub struct Dpsier2_SPEC;
7469impl crate::sealed::RegSpec for Dpsier2_SPEC {
7470    type DataType = u8;
7471}
7472
7473#[doc = "Deep Software Standby Interrupt Enable Register 2"]
7474pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
7475
7476impl Dpsier2 {
7477    #[doc = "LVD1 Deep Software Standby Cancel Signal Enable"]
7478    #[inline(always)]
7479    pub fn dlvd1ie(
7480        self,
7481    ) -> crate::common::RegisterField<
7482        0,
7483        0x1,
7484        1,
7485        0,
7486        dpsier2::Dlvd1Ie,
7487        dpsier2::Dlvd1Ie,
7488        Dpsier2_SPEC,
7489        crate::common::RW,
7490    > {
7491        crate::common::RegisterField::<
7492            0,
7493            0x1,
7494            1,
7495            0,
7496            dpsier2::Dlvd1Ie,
7497            dpsier2::Dlvd1Ie,
7498            Dpsier2_SPEC,
7499            crate::common::RW,
7500        >::from_register(self, 0)
7501    }
7502
7503    #[doc = "LVD2 Deep Software Standby Cancel Signal Enable"]
7504    #[inline(always)]
7505    pub fn dlvd2ie(
7506        self,
7507    ) -> crate::common::RegisterField<
7508        1,
7509        0x1,
7510        1,
7511        0,
7512        dpsier2::Dlvd2Ie,
7513        dpsier2::Dlvd2Ie,
7514        Dpsier2_SPEC,
7515        crate::common::RW,
7516    > {
7517        crate::common::RegisterField::<
7518            1,
7519            0x1,
7520            1,
7521            0,
7522            dpsier2::Dlvd2Ie,
7523            dpsier2::Dlvd2Ie,
7524            Dpsier2_SPEC,
7525            crate::common::RW,
7526        >::from_register(self, 0)
7527    }
7528
7529    #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
7530    #[inline(always)]
7531    pub fn drtciie(
7532        self,
7533    ) -> crate::common::RegisterField<
7534        2,
7535        0x1,
7536        1,
7537        0,
7538        dpsier2::Drtciie,
7539        dpsier2::Drtciie,
7540        Dpsier2_SPEC,
7541        crate::common::RW,
7542    > {
7543        crate::common::RegisterField::<
7544            2,
7545            0x1,
7546            1,
7547            0,
7548            dpsier2::Drtciie,
7549            dpsier2::Drtciie,
7550            Dpsier2_SPEC,
7551            crate::common::RW,
7552        >::from_register(self, 0)
7553    }
7554
7555    #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
7556    #[inline(always)]
7557    pub fn drtcaie(
7558        self,
7559    ) -> crate::common::RegisterField<
7560        3,
7561        0x1,
7562        1,
7563        0,
7564        dpsier2::Drtcaie,
7565        dpsier2::Drtcaie,
7566        Dpsier2_SPEC,
7567        crate::common::RW,
7568    > {
7569        crate::common::RegisterField::<
7570            3,
7571            0x1,
7572            1,
7573            0,
7574            dpsier2::Drtcaie,
7575            dpsier2::Drtcaie,
7576            Dpsier2_SPEC,
7577            crate::common::RW,
7578        >::from_register(self, 0)
7579    }
7580
7581    #[doc = "NMI Pin Enable"]
7582    #[inline(always)]
7583    pub fn dnmie(
7584        self,
7585    ) -> crate::common::RegisterField<
7586        4,
7587        0x1,
7588        1,
7589        0,
7590        dpsier2::Dnmie,
7591        dpsier2::Dnmie,
7592        Dpsier2_SPEC,
7593        crate::common::RW,
7594    > {
7595        crate::common::RegisterField::<
7596            4,
7597            0x1,
7598            1,
7599            0,
7600            dpsier2::Dnmie,
7601            dpsier2::Dnmie,
7602            Dpsier2_SPEC,
7603            crate::common::RW,
7604        >::from_register(self, 0)
7605    }
7606}
7607impl ::core::default::Default for Dpsier2 {
7608    #[inline(always)]
7609    fn default() -> Dpsier2 {
7610        <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
7611    }
7612}
7613pub mod dpsier2 {
7614
7615    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7616    pub struct Dlvd1Ie_SPEC;
7617    pub type Dlvd1Ie = crate::EnumBitfieldStruct<u8, Dlvd1Ie_SPEC>;
7618    impl Dlvd1Ie {
7619        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7620        pub const _0: Self = Self::new(0);
7621
7622        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7623        pub const _1: Self = Self::new(1);
7624    }
7625    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7626    pub struct Dlvd2Ie_SPEC;
7627    pub type Dlvd2Ie = crate::EnumBitfieldStruct<u8, Dlvd2Ie_SPEC>;
7628    impl Dlvd2Ie {
7629        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7630        pub const _0: Self = Self::new(0);
7631
7632        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7633        pub const _1: Self = Self::new(1);
7634    }
7635    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7636    pub struct Drtciie_SPEC;
7637    pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
7638    impl Drtciie {
7639        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7640        pub const _0: Self = Self::new(0);
7641
7642        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7643        pub const _1: Self = Self::new(1);
7644    }
7645    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7646    pub struct Drtcaie_SPEC;
7647    pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
7648    impl Drtcaie {
7649        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7650        pub const _0: Self = Self::new(0);
7651
7652        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7653        pub const _1: Self = Self::new(1);
7654    }
7655    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7656    pub struct Dnmie_SPEC;
7657    pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
7658    impl Dnmie {
7659        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7660        pub const _0: Self = Self::new(0);
7661
7662        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7663        pub const _1: Self = Self::new(1);
7664    }
7665}
7666#[doc(hidden)]
7667#[derive(Copy, Clone, Eq, PartialEq)]
7668pub struct Dpsier3_SPEC;
7669impl crate::sealed::RegSpec for Dpsier3_SPEC {
7670    type DataType = u8;
7671}
7672
7673#[doc = "Deep Software Standby Interrupt Enable Register 3"]
7674pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
7675
7676impl Dpsier3 {
7677    #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Signal Enable"]
7678    #[inline(always)]
7679    pub fn dusbfs0ie(
7680        self,
7681    ) -> crate::common::RegisterField<
7682        0,
7683        0x1,
7684        1,
7685        0,
7686        dpsier3::Dusbfs0Ie,
7687        dpsier3::Dusbfs0Ie,
7688        Dpsier3_SPEC,
7689        crate::common::RW,
7690    > {
7691        crate::common::RegisterField::<
7692            0,
7693            0x1,
7694            1,
7695            0,
7696            dpsier3::Dusbfs0Ie,
7697            dpsier3::Dusbfs0Ie,
7698            Dpsier3_SPEC,
7699            crate::common::RW,
7700        >::from_register(self, 0)
7701    }
7702
7703    #[doc = "AGT1 Underflow Deep Software Standby Cancel Signal Enable"]
7704    #[inline(always)]
7705    pub fn dagt1ie(
7706        self,
7707    ) -> crate::common::RegisterField<
7708        2,
7709        0x1,
7710        1,
7711        0,
7712        dpsier3::Dagt1Ie,
7713        dpsier3::Dagt1Ie,
7714        Dpsier3_SPEC,
7715        crate::common::RW,
7716    > {
7717        crate::common::RegisterField::<
7718            2,
7719            0x1,
7720            1,
7721            0,
7722            dpsier3::Dagt1Ie,
7723            dpsier3::Dagt1Ie,
7724            Dpsier3_SPEC,
7725            crate::common::RW,
7726        >::from_register(self, 0)
7727    }
7728
7729    #[doc = "AGT3 Underflow Deep Software Standby Cancel Signal Enable"]
7730    #[inline(always)]
7731    pub fn dagt3ie(
7732        self,
7733    ) -> crate::common::RegisterField<
7734        3,
7735        0x1,
7736        1,
7737        0,
7738        dpsier3::Dagt3Ie,
7739        dpsier3::Dagt3Ie,
7740        Dpsier3_SPEC,
7741        crate::common::RW,
7742    > {
7743        crate::common::RegisterField::<
7744            3,
7745            0x1,
7746            1,
7747            0,
7748            dpsier3::Dagt3Ie,
7749            dpsier3::Dagt3Ie,
7750            Dpsier3_SPEC,
7751            crate::common::RW,
7752        >::from_register(self, 0)
7753    }
7754}
7755impl ::core::default::Default for Dpsier3 {
7756    #[inline(always)]
7757    fn default() -> Dpsier3 {
7758        <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
7759    }
7760}
7761pub mod dpsier3 {
7762
7763    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7764    pub struct Dusbfs0Ie_SPEC;
7765    pub type Dusbfs0Ie = crate::EnumBitfieldStruct<u8, Dusbfs0Ie_SPEC>;
7766    impl Dusbfs0Ie {
7767        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7768        pub const _0: Self = Self::new(0);
7769
7770        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7771        pub const _1: Self = Self::new(1);
7772    }
7773    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7774    pub struct Dagt1Ie_SPEC;
7775    pub type Dagt1Ie = crate::EnumBitfieldStruct<u8, Dagt1Ie_SPEC>;
7776    impl Dagt1Ie {
7777        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7778        pub const _0: Self = Self::new(0);
7779
7780        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7781        pub const _1: Self = Self::new(1);
7782    }
7783    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7784    pub struct Dagt3Ie_SPEC;
7785    pub type Dagt3Ie = crate::EnumBitfieldStruct<u8, Dagt3Ie_SPEC>;
7786    impl Dagt3Ie {
7787        #[doc = "Cancelling Deep Software Standby mode is disabled"]
7788        pub const _0: Self = Self::new(0);
7789
7790        #[doc = "Cancelling Deep Software Standby mode is enabled"]
7791        pub const _1: Self = Self::new(1);
7792    }
7793}
7794#[doc(hidden)]
7795#[derive(Copy, Clone, Eq, PartialEq)]
7796pub struct Dpsifr0_SPEC;
7797impl crate::sealed::RegSpec for Dpsifr0_SPEC {
7798    type DataType = u8;
7799}
7800
7801#[doc = "Deep Software Standby Interrupt Flag Register 0"]
7802pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
7803
7804impl Dpsifr0 {
7805    #[doc = "IRQ0-DS Pin Deep Software Standby Cancel Flag"]
7806    #[inline(always)]
7807    pub fn dirq0f(
7808        self,
7809    ) -> crate::common::RegisterField<
7810        0,
7811        0x1,
7812        1,
7813        0,
7814        dpsifr0::Dirq0F,
7815        dpsifr0::Dirq0F,
7816        Dpsifr0_SPEC,
7817        crate::common::RW,
7818    > {
7819        crate::common::RegisterField::<
7820            0,
7821            0x1,
7822            1,
7823            0,
7824            dpsifr0::Dirq0F,
7825            dpsifr0::Dirq0F,
7826            Dpsifr0_SPEC,
7827            crate::common::RW,
7828        >::from_register(self, 0)
7829    }
7830
7831    #[doc = "IRQ1-DS Pin Deep Software Standby Cancel Flag"]
7832    #[inline(always)]
7833    pub fn dirq1f(
7834        self,
7835    ) -> crate::common::RegisterField<
7836        1,
7837        0x1,
7838        1,
7839        0,
7840        dpsifr0::Dirq1F,
7841        dpsifr0::Dirq1F,
7842        Dpsifr0_SPEC,
7843        crate::common::RW,
7844    > {
7845        crate::common::RegisterField::<
7846            1,
7847            0x1,
7848            1,
7849            0,
7850            dpsifr0::Dirq1F,
7851            dpsifr0::Dirq1F,
7852            Dpsifr0_SPEC,
7853            crate::common::RW,
7854        >::from_register(self, 0)
7855    }
7856
7857    #[doc = "IRQ4-DS Pin Deep Software Standby Cancel Flag"]
7858    #[inline(always)]
7859    pub fn dirq4f(
7860        self,
7861    ) -> crate::common::RegisterField<
7862        4,
7863        0x1,
7864        1,
7865        0,
7866        dpsifr0::Dirq4F,
7867        dpsifr0::Dirq4F,
7868        Dpsifr0_SPEC,
7869        crate::common::RW,
7870    > {
7871        crate::common::RegisterField::<
7872            4,
7873            0x1,
7874            1,
7875            0,
7876            dpsifr0::Dirq4F,
7877            dpsifr0::Dirq4F,
7878            Dpsifr0_SPEC,
7879            crate::common::RW,
7880        >::from_register(self, 0)
7881    }
7882
7883    #[doc = "IRQ5-DS Pin Deep Software Standby Cancel Flag"]
7884    #[inline(always)]
7885    pub fn dirq5f(
7886        self,
7887    ) -> crate::common::RegisterField<
7888        5,
7889        0x1,
7890        1,
7891        0,
7892        dpsifr0::Dirq5F,
7893        dpsifr0::Dirq5F,
7894        Dpsifr0_SPEC,
7895        crate::common::RW,
7896    > {
7897        crate::common::RegisterField::<
7898            5,
7899            0x1,
7900            1,
7901            0,
7902            dpsifr0::Dirq5F,
7903            dpsifr0::Dirq5F,
7904            Dpsifr0_SPEC,
7905            crate::common::RW,
7906        >::from_register(self, 0)
7907    }
7908
7909    #[doc = "IRQ6-DS Pin Deep Software Standby Cancel Flag"]
7910    #[inline(always)]
7911    pub fn dirq6f(
7912        self,
7913    ) -> crate::common::RegisterField<
7914        6,
7915        0x1,
7916        1,
7917        0,
7918        dpsifr0::Dirq6F,
7919        dpsifr0::Dirq6F,
7920        Dpsifr0_SPEC,
7921        crate::common::RW,
7922    > {
7923        crate::common::RegisterField::<
7924            6,
7925            0x1,
7926            1,
7927            0,
7928            dpsifr0::Dirq6F,
7929            dpsifr0::Dirq6F,
7930            Dpsifr0_SPEC,
7931            crate::common::RW,
7932        >::from_register(self, 0)
7933    }
7934
7935    #[doc = "IRQ7-DS Pin Deep Software Standby Cancel Flag"]
7936    #[inline(always)]
7937    pub fn dirq7f(
7938        self,
7939    ) -> crate::common::RegisterField<
7940        7,
7941        0x1,
7942        1,
7943        0,
7944        dpsifr0::Dirq7F,
7945        dpsifr0::Dirq7F,
7946        Dpsifr0_SPEC,
7947        crate::common::RW,
7948    > {
7949        crate::common::RegisterField::<
7950            7,
7951            0x1,
7952            1,
7953            0,
7954            dpsifr0::Dirq7F,
7955            dpsifr0::Dirq7F,
7956            Dpsifr0_SPEC,
7957            crate::common::RW,
7958        >::from_register(self, 0)
7959    }
7960}
7961impl ::core::default::Default for Dpsifr0 {
7962    #[inline(always)]
7963    fn default() -> Dpsifr0 {
7964        <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
7965    }
7966}
7967pub mod dpsifr0 {
7968
7969    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7970    pub struct Dirq0F_SPEC;
7971    pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
7972    impl Dirq0F {
7973        #[doc = "The cancel request is not generated"]
7974        pub const _0: Self = Self::new(0);
7975
7976        #[doc = "The cancel request is generated"]
7977        pub const _1: Self = Self::new(1);
7978    }
7979    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7980    pub struct Dirq1F_SPEC;
7981    pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
7982    impl Dirq1F {
7983        #[doc = "The cancel request is not generated"]
7984        pub const _0: Self = Self::new(0);
7985
7986        #[doc = "The cancel request is generated"]
7987        pub const _1: Self = Self::new(1);
7988    }
7989    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7990    pub struct Dirq4F_SPEC;
7991    pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
7992    impl Dirq4F {
7993        #[doc = "The cancel request is not generated"]
7994        pub const _0: Self = Self::new(0);
7995
7996        #[doc = "The cancel request is generated"]
7997        pub const _1: Self = Self::new(1);
7998    }
7999    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8000    pub struct Dirq5F_SPEC;
8001    pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
8002    impl Dirq5F {
8003        #[doc = "The cancel request is not generated"]
8004        pub const _0: Self = Self::new(0);
8005
8006        #[doc = "The cancel request is generated"]
8007        pub const _1: Self = Self::new(1);
8008    }
8009    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8010    pub struct Dirq6F_SPEC;
8011    pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
8012    impl Dirq6F {
8013        #[doc = "The cancel request is not generated"]
8014        pub const _0: Self = Self::new(0);
8015
8016        #[doc = "The cancel request is generated"]
8017        pub const _1: Self = Self::new(1);
8018    }
8019    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8020    pub struct Dirq7F_SPEC;
8021    pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
8022    impl Dirq7F {
8023        #[doc = "The cancel request is not generated"]
8024        pub const _0: Self = Self::new(0);
8025
8026        #[doc = "The cancel request is generated"]
8027        pub const _1: Self = Self::new(1);
8028    }
8029}
8030#[doc(hidden)]
8031#[derive(Copy, Clone, Eq, PartialEq)]
8032pub struct Dpsifr1_SPEC;
8033impl crate::sealed::RegSpec for Dpsifr1_SPEC {
8034    type DataType = u8;
8035}
8036
8037#[doc = "Deep Software Standby Interrupt Flag Register 1"]
8038pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
8039
8040impl Dpsifr1 {
8041    #[doc = "IRQ8-DS Pin Deep Software Standby Cancel Flag"]
8042    #[inline(always)]
8043    pub fn dirq8f(
8044        self,
8045    ) -> crate::common::RegisterField<
8046        0,
8047        0x1,
8048        1,
8049        0,
8050        dpsifr1::Dirq8F,
8051        dpsifr1::Dirq8F,
8052        Dpsifr1_SPEC,
8053        crate::common::RW,
8054    > {
8055        crate::common::RegisterField::<
8056            0,
8057            0x1,
8058            1,
8059            0,
8060            dpsifr1::Dirq8F,
8061            dpsifr1::Dirq8F,
8062            Dpsifr1_SPEC,
8063            crate::common::RW,
8064        >::from_register(self, 0)
8065    }
8066
8067    #[doc = "IRQ9-DS Pin Deep Software Standby Cancel Flag"]
8068    #[inline(always)]
8069    pub fn dirq9f(
8070        self,
8071    ) -> crate::common::RegisterField<
8072        1,
8073        0x1,
8074        1,
8075        0,
8076        dpsifr1::Dirq9F,
8077        dpsifr1::Dirq9F,
8078        Dpsifr1_SPEC,
8079        crate::common::RW,
8080    > {
8081        crate::common::RegisterField::<
8082            1,
8083            0x1,
8084            1,
8085            0,
8086            dpsifr1::Dirq9F,
8087            dpsifr1::Dirq9F,
8088            Dpsifr1_SPEC,
8089            crate::common::RW,
8090        >::from_register(self, 0)
8091    }
8092}
8093impl ::core::default::Default for Dpsifr1 {
8094    #[inline(always)]
8095    fn default() -> Dpsifr1 {
8096        <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
8097    }
8098}
8099pub mod dpsifr1 {
8100
8101    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8102    pub struct Dirq8F_SPEC;
8103    pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
8104    impl Dirq8F {
8105        #[doc = "The cancel request is not generated"]
8106        pub const _0: Self = Self::new(0);
8107
8108        #[doc = "The cancel request is generated"]
8109        pub const _1: Self = Self::new(1);
8110    }
8111    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8112    pub struct Dirq9F_SPEC;
8113    pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
8114    impl Dirq9F {
8115        #[doc = "The cancel request is not generated"]
8116        pub const _0: Self = Self::new(0);
8117
8118        #[doc = "The cancel request is generated"]
8119        pub const _1: Self = Self::new(1);
8120    }
8121}
8122#[doc(hidden)]
8123#[derive(Copy, Clone, Eq, PartialEq)]
8124pub struct Dpsifr2_SPEC;
8125impl crate::sealed::RegSpec for Dpsifr2_SPEC {
8126    type DataType = u8;
8127}
8128
8129#[doc = "Deep Software Standby Interrupt Flag Register 2"]
8130pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
8131
8132impl Dpsifr2 {
8133    #[doc = "LVD1 Deep Software Standby Cancel Flag"]
8134    #[inline(always)]
8135    pub fn dlvd1if(
8136        self,
8137    ) -> crate::common::RegisterField<
8138        0,
8139        0x1,
8140        1,
8141        0,
8142        dpsifr2::Dlvd1If,
8143        dpsifr2::Dlvd1If,
8144        Dpsifr2_SPEC,
8145        crate::common::RW,
8146    > {
8147        crate::common::RegisterField::<
8148            0,
8149            0x1,
8150            1,
8151            0,
8152            dpsifr2::Dlvd1If,
8153            dpsifr2::Dlvd1If,
8154            Dpsifr2_SPEC,
8155            crate::common::RW,
8156        >::from_register(self, 0)
8157    }
8158
8159    #[doc = "LVD2 Deep Software Standby Cancel Flag"]
8160    #[inline(always)]
8161    pub fn dlvd2if(
8162        self,
8163    ) -> crate::common::RegisterField<
8164        1,
8165        0x1,
8166        1,
8167        0,
8168        dpsifr2::Dlvd2If,
8169        dpsifr2::Dlvd2If,
8170        Dpsifr2_SPEC,
8171        crate::common::RW,
8172    > {
8173        crate::common::RegisterField::<
8174            1,
8175            0x1,
8176            1,
8177            0,
8178            dpsifr2::Dlvd2If,
8179            dpsifr2::Dlvd2If,
8180            Dpsifr2_SPEC,
8181            crate::common::RW,
8182        >::from_register(self, 0)
8183    }
8184
8185    #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
8186    #[inline(always)]
8187    pub fn drtciif(
8188        self,
8189    ) -> crate::common::RegisterField<
8190        2,
8191        0x1,
8192        1,
8193        0,
8194        dpsifr2::Drtciif,
8195        dpsifr2::Drtciif,
8196        Dpsifr2_SPEC,
8197        crate::common::RW,
8198    > {
8199        crate::common::RegisterField::<
8200            2,
8201            0x1,
8202            1,
8203            0,
8204            dpsifr2::Drtciif,
8205            dpsifr2::Drtciif,
8206            Dpsifr2_SPEC,
8207            crate::common::RW,
8208        >::from_register(self, 0)
8209    }
8210
8211    #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
8212    #[inline(always)]
8213    pub fn drtcaif(
8214        self,
8215    ) -> crate::common::RegisterField<
8216        3,
8217        0x1,
8218        1,
8219        0,
8220        dpsifr2::Drtcaif,
8221        dpsifr2::Drtcaif,
8222        Dpsifr2_SPEC,
8223        crate::common::RW,
8224    > {
8225        crate::common::RegisterField::<
8226            3,
8227            0x1,
8228            1,
8229            0,
8230            dpsifr2::Drtcaif,
8231            dpsifr2::Drtcaif,
8232            Dpsifr2_SPEC,
8233            crate::common::RW,
8234        >::from_register(self, 0)
8235    }
8236
8237    #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
8238    #[inline(always)]
8239    pub fn dnmif(
8240        self,
8241    ) -> crate::common::RegisterField<
8242        4,
8243        0x1,
8244        1,
8245        0,
8246        dpsifr2::Dnmif,
8247        dpsifr2::Dnmif,
8248        Dpsifr2_SPEC,
8249        crate::common::RW,
8250    > {
8251        crate::common::RegisterField::<
8252            4,
8253            0x1,
8254            1,
8255            0,
8256            dpsifr2::Dnmif,
8257            dpsifr2::Dnmif,
8258            Dpsifr2_SPEC,
8259            crate::common::RW,
8260        >::from_register(self, 0)
8261    }
8262}
8263impl ::core::default::Default for Dpsifr2 {
8264    #[inline(always)]
8265    fn default() -> Dpsifr2 {
8266        <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
8267    }
8268}
8269pub mod dpsifr2 {
8270
8271    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8272    pub struct Dlvd1If_SPEC;
8273    pub type Dlvd1If = crate::EnumBitfieldStruct<u8, Dlvd1If_SPEC>;
8274    impl Dlvd1If {
8275        #[doc = "The cancel request is not generated"]
8276        pub const _0: Self = Self::new(0);
8277
8278        #[doc = "The cancel request is generated"]
8279        pub const _1: Self = Self::new(1);
8280    }
8281    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8282    pub struct Dlvd2If_SPEC;
8283    pub type Dlvd2If = crate::EnumBitfieldStruct<u8, Dlvd2If_SPEC>;
8284    impl Dlvd2If {
8285        #[doc = "The cancel request is not generated"]
8286        pub const _0: Self = Self::new(0);
8287
8288        #[doc = "The cancel request is generated"]
8289        pub const _1: Self = Self::new(1);
8290    }
8291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8292    pub struct Drtciif_SPEC;
8293    pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
8294    impl Drtciif {
8295        #[doc = "The cancel request is not generated"]
8296        pub const _0: Self = Self::new(0);
8297
8298        #[doc = "The cancel request is generated"]
8299        pub const _1: Self = Self::new(1);
8300    }
8301    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8302    pub struct Drtcaif_SPEC;
8303    pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
8304    impl Drtcaif {
8305        #[doc = "The cancel request is not generated"]
8306        pub const _0: Self = Self::new(0);
8307
8308        #[doc = "The cancel request is generated"]
8309        pub const _1: Self = Self::new(1);
8310    }
8311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8312    pub struct Dnmif_SPEC;
8313    pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
8314    impl Dnmif {
8315        #[doc = "The cancel request is not generated"]
8316        pub const _0: Self = Self::new(0);
8317
8318        #[doc = "The cancel request is generated"]
8319        pub const _1: Self = Self::new(1);
8320    }
8321}
8322#[doc(hidden)]
8323#[derive(Copy, Clone, Eq, PartialEq)]
8324pub struct Dpsifr3_SPEC;
8325impl crate::sealed::RegSpec for Dpsifr3_SPEC {
8326    type DataType = u8;
8327}
8328
8329#[doc = "Deep Software Standby Interrupt Flag Register 3"]
8330pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
8331
8332impl Dpsifr3 {
8333    #[doc = "USBFS0 Suspend/Resume Deep Software Standby Cancel Flag"]
8334    #[inline(always)]
8335    pub fn dusbfs0if(
8336        self,
8337    ) -> crate::common::RegisterField<
8338        0,
8339        0x1,
8340        1,
8341        0,
8342        dpsifr3::Dusbfs0If,
8343        dpsifr3::Dusbfs0If,
8344        Dpsifr3_SPEC,
8345        crate::common::RW,
8346    > {
8347        crate::common::RegisterField::<
8348            0,
8349            0x1,
8350            1,
8351            0,
8352            dpsifr3::Dusbfs0If,
8353            dpsifr3::Dusbfs0If,
8354            Dpsifr3_SPEC,
8355            crate::common::RW,
8356        >::from_register(self, 0)
8357    }
8358
8359    #[doc = "AGT1 Underflow Deep Software Standby Cancel Flag"]
8360    #[inline(always)]
8361    pub fn dagt1if(
8362        self,
8363    ) -> crate::common::RegisterField<
8364        2,
8365        0x1,
8366        1,
8367        0,
8368        dpsifr3::Dagt1If,
8369        dpsifr3::Dagt1If,
8370        Dpsifr3_SPEC,
8371        crate::common::RW,
8372    > {
8373        crate::common::RegisterField::<
8374            2,
8375            0x1,
8376            1,
8377            0,
8378            dpsifr3::Dagt1If,
8379            dpsifr3::Dagt1If,
8380            Dpsifr3_SPEC,
8381            crate::common::RW,
8382        >::from_register(self, 0)
8383    }
8384
8385    #[doc = "AGT3 Underflow Deep Software Standby Cancel Flag"]
8386    #[inline(always)]
8387    pub fn dagt3if(
8388        self,
8389    ) -> crate::common::RegisterField<
8390        3,
8391        0x1,
8392        1,
8393        0,
8394        dpsifr3::Dagt3If,
8395        dpsifr3::Dagt3If,
8396        Dpsifr3_SPEC,
8397        crate::common::RW,
8398    > {
8399        crate::common::RegisterField::<
8400            3,
8401            0x1,
8402            1,
8403            0,
8404            dpsifr3::Dagt3If,
8405            dpsifr3::Dagt3If,
8406            Dpsifr3_SPEC,
8407            crate::common::RW,
8408        >::from_register(self, 0)
8409    }
8410}
8411impl ::core::default::Default for Dpsifr3 {
8412    #[inline(always)]
8413    fn default() -> Dpsifr3 {
8414        <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
8415    }
8416}
8417pub mod dpsifr3 {
8418
8419    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8420    pub struct Dusbfs0If_SPEC;
8421    pub type Dusbfs0If = crate::EnumBitfieldStruct<u8, Dusbfs0If_SPEC>;
8422    impl Dusbfs0If {
8423        #[doc = "The cancel request is not generated."]
8424        pub const _0: Self = Self::new(0);
8425
8426        #[doc = "The cancel request is generated."]
8427        pub const _1: Self = Self::new(1);
8428    }
8429    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8430    pub struct Dagt1If_SPEC;
8431    pub type Dagt1If = crate::EnumBitfieldStruct<u8, Dagt1If_SPEC>;
8432    impl Dagt1If {
8433        #[doc = "The cancel request is not generated."]
8434        pub const _0: Self = Self::new(0);
8435
8436        #[doc = "The cancel request is generated."]
8437        pub const _1: Self = Self::new(1);
8438    }
8439    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8440    pub struct Dagt3If_SPEC;
8441    pub type Dagt3If = crate::EnumBitfieldStruct<u8, Dagt3If_SPEC>;
8442    impl Dagt3If {
8443        #[doc = "The cancel request is not generated."]
8444        pub const _0: Self = Self::new(0);
8445
8446        #[doc = "The cancel request is generated."]
8447        pub const _1: Self = Self::new(1);
8448    }
8449}
8450#[doc(hidden)]
8451#[derive(Copy, Clone, Eq, PartialEq)]
8452pub struct Dpsiegr0_SPEC;
8453impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
8454    type DataType = u8;
8455}
8456
8457#[doc = "Deep Software Standby Interrupt Edge Register 0"]
8458pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
8459
8460impl Dpsiegr0 {
8461    #[doc = "IRQ0-DS Pin Edge Select"]
8462    #[inline(always)]
8463    pub fn dirq0eg(
8464        self,
8465    ) -> crate::common::RegisterField<
8466        0,
8467        0x1,
8468        1,
8469        0,
8470        dpsiegr0::Dirq0Eg,
8471        dpsiegr0::Dirq0Eg,
8472        Dpsiegr0_SPEC,
8473        crate::common::RW,
8474    > {
8475        crate::common::RegisterField::<
8476            0,
8477            0x1,
8478            1,
8479            0,
8480            dpsiegr0::Dirq0Eg,
8481            dpsiegr0::Dirq0Eg,
8482            Dpsiegr0_SPEC,
8483            crate::common::RW,
8484        >::from_register(self, 0)
8485    }
8486
8487    #[doc = "IRQ1-DS Pin Edge Select"]
8488    #[inline(always)]
8489    pub fn dirq1eg(
8490        self,
8491    ) -> crate::common::RegisterField<
8492        1,
8493        0x1,
8494        1,
8495        0,
8496        dpsiegr0::Dirq1Eg,
8497        dpsiegr0::Dirq1Eg,
8498        Dpsiegr0_SPEC,
8499        crate::common::RW,
8500    > {
8501        crate::common::RegisterField::<
8502            1,
8503            0x1,
8504            1,
8505            0,
8506            dpsiegr0::Dirq1Eg,
8507            dpsiegr0::Dirq1Eg,
8508            Dpsiegr0_SPEC,
8509            crate::common::RW,
8510        >::from_register(self, 0)
8511    }
8512
8513    #[doc = "IRQ4-DS Pin Edge Select"]
8514    #[inline(always)]
8515    pub fn dirq4eg(
8516        self,
8517    ) -> crate::common::RegisterField<
8518        4,
8519        0x1,
8520        1,
8521        0,
8522        dpsiegr0::Dirq4Eg,
8523        dpsiegr0::Dirq4Eg,
8524        Dpsiegr0_SPEC,
8525        crate::common::RW,
8526    > {
8527        crate::common::RegisterField::<
8528            4,
8529            0x1,
8530            1,
8531            0,
8532            dpsiegr0::Dirq4Eg,
8533            dpsiegr0::Dirq4Eg,
8534            Dpsiegr0_SPEC,
8535            crate::common::RW,
8536        >::from_register(self, 0)
8537    }
8538
8539    #[doc = "IRQ5-DS Pin Edge Select"]
8540    #[inline(always)]
8541    pub fn dirq5eg(
8542        self,
8543    ) -> crate::common::RegisterField<
8544        5,
8545        0x1,
8546        1,
8547        0,
8548        dpsiegr0::Dirq5Eg,
8549        dpsiegr0::Dirq5Eg,
8550        Dpsiegr0_SPEC,
8551        crate::common::RW,
8552    > {
8553        crate::common::RegisterField::<
8554            5,
8555            0x1,
8556            1,
8557            0,
8558            dpsiegr0::Dirq5Eg,
8559            dpsiegr0::Dirq5Eg,
8560            Dpsiegr0_SPEC,
8561            crate::common::RW,
8562        >::from_register(self, 0)
8563    }
8564
8565    #[doc = "IRQ6-DS Pin Edge Select"]
8566    #[inline(always)]
8567    pub fn dirq6eg(
8568        self,
8569    ) -> crate::common::RegisterField<
8570        6,
8571        0x1,
8572        1,
8573        0,
8574        dpsiegr0::Dirq6Eg,
8575        dpsiegr0::Dirq6Eg,
8576        Dpsiegr0_SPEC,
8577        crate::common::RW,
8578    > {
8579        crate::common::RegisterField::<
8580            6,
8581            0x1,
8582            1,
8583            0,
8584            dpsiegr0::Dirq6Eg,
8585            dpsiegr0::Dirq6Eg,
8586            Dpsiegr0_SPEC,
8587            crate::common::RW,
8588        >::from_register(self, 0)
8589    }
8590
8591    #[doc = "IRQ7-DS Pin Edge Select"]
8592    #[inline(always)]
8593    pub fn dirq7eg(
8594        self,
8595    ) -> crate::common::RegisterField<
8596        7,
8597        0x1,
8598        1,
8599        0,
8600        dpsiegr0::Dirq7Eg,
8601        dpsiegr0::Dirq7Eg,
8602        Dpsiegr0_SPEC,
8603        crate::common::RW,
8604    > {
8605        crate::common::RegisterField::<
8606            7,
8607            0x1,
8608            1,
8609            0,
8610            dpsiegr0::Dirq7Eg,
8611            dpsiegr0::Dirq7Eg,
8612            Dpsiegr0_SPEC,
8613            crate::common::RW,
8614        >::from_register(self, 0)
8615    }
8616}
8617impl ::core::default::Default for Dpsiegr0 {
8618    #[inline(always)]
8619    fn default() -> Dpsiegr0 {
8620        <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
8621    }
8622}
8623pub mod dpsiegr0 {
8624
8625    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8626    pub struct Dirq0Eg_SPEC;
8627    pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
8628    impl Dirq0Eg {
8629        #[doc = "A cancel request is generated at a falling edge"]
8630        pub const _0: Self = Self::new(0);
8631
8632        #[doc = "A cancel request is generated at a rising edge"]
8633        pub const _1: Self = Self::new(1);
8634    }
8635    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8636    pub struct Dirq1Eg_SPEC;
8637    pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
8638    impl Dirq1Eg {
8639        #[doc = "A cancel request is generated at a falling edge"]
8640        pub const _0: Self = Self::new(0);
8641
8642        #[doc = "A cancel request is generated at a rising edge"]
8643        pub const _1: Self = Self::new(1);
8644    }
8645    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8646    pub struct Dirq4Eg_SPEC;
8647    pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
8648    impl Dirq4Eg {
8649        #[doc = "A cancel request is generated at a falling edge"]
8650        pub const _0: Self = Self::new(0);
8651
8652        #[doc = "A cancel request is generated at a rising edge"]
8653        pub const _1: Self = Self::new(1);
8654    }
8655    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8656    pub struct Dirq5Eg_SPEC;
8657    pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
8658    impl Dirq5Eg {
8659        #[doc = "A cancel request is generated at a falling edge"]
8660        pub const _0: Self = Self::new(0);
8661
8662        #[doc = "A cancel request is generated at a rising edge"]
8663        pub const _1: Self = Self::new(1);
8664    }
8665    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8666    pub struct Dirq6Eg_SPEC;
8667    pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
8668    impl Dirq6Eg {
8669        #[doc = "A cancel request is generated at a falling edge"]
8670        pub const _0: Self = Self::new(0);
8671
8672        #[doc = "A cancel request is generated at a rising edge"]
8673        pub const _1: Self = Self::new(1);
8674    }
8675    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8676    pub struct Dirq7Eg_SPEC;
8677    pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
8678    impl Dirq7Eg {
8679        #[doc = "A cancel request is generated at a falling edge"]
8680        pub const _0: Self = Self::new(0);
8681
8682        #[doc = "A cancel request is generated at a rising edge"]
8683        pub const _1: Self = Self::new(1);
8684    }
8685}
8686#[doc(hidden)]
8687#[derive(Copy, Clone, Eq, PartialEq)]
8688pub struct Dpsiegr1_SPEC;
8689impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
8690    type DataType = u8;
8691}
8692
8693#[doc = "Deep Software Standby Interrupt Edge Register 1"]
8694pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
8695
8696impl Dpsiegr1 {
8697    #[doc = "IRQ8-DS Pin Edge Select"]
8698    #[inline(always)]
8699    pub fn dirq8eg(
8700        self,
8701    ) -> crate::common::RegisterField<
8702        0,
8703        0x1,
8704        1,
8705        0,
8706        dpsiegr1::Dirq8Eg,
8707        dpsiegr1::Dirq8Eg,
8708        Dpsiegr1_SPEC,
8709        crate::common::RW,
8710    > {
8711        crate::common::RegisterField::<
8712            0,
8713            0x1,
8714            1,
8715            0,
8716            dpsiegr1::Dirq8Eg,
8717            dpsiegr1::Dirq8Eg,
8718            Dpsiegr1_SPEC,
8719            crate::common::RW,
8720        >::from_register(self, 0)
8721    }
8722
8723    #[doc = "IRQ9-DS Pin Edge Select"]
8724    #[inline(always)]
8725    pub fn dirq9eg(
8726        self,
8727    ) -> crate::common::RegisterField<
8728        1,
8729        0x1,
8730        1,
8731        0,
8732        dpsiegr1::Dirq9Eg,
8733        dpsiegr1::Dirq9Eg,
8734        Dpsiegr1_SPEC,
8735        crate::common::RW,
8736    > {
8737        crate::common::RegisterField::<
8738            1,
8739            0x1,
8740            1,
8741            0,
8742            dpsiegr1::Dirq9Eg,
8743            dpsiegr1::Dirq9Eg,
8744            Dpsiegr1_SPEC,
8745            crate::common::RW,
8746        >::from_register(self, 0)
8747    }
8748}
8749impl ::core::default::Default for Dpsiegr1 {
8750    #[inline(always)]
8751    fn default() -> Dpsiegr1 {
8752        <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
8753    }
8754}
8755pub mod dpsiegr1 {
8756
8757    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8758    pub struct Dirq8Eg_SPEC;
8759    pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
8760    impl Dirq8Eg {
8761        #[doc = "A cancel request is generated at a falling edge."]
8762        pub const _0: Self = Self::new(0);
8763
8764        #[doc = "A cancel request is generated at a rising edge."]
8765        pub const _1: Self = Self::new(1);
8766    }
8767    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8768    pub struct Dirq9Eg_SPEC;
8769    pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
8770    impl Dirq9Eg {
8771        #[doc = "A cancel request is generated at a falling edge."]
8772        pub const _0: Self = Self::new(0);
8773
8774        #[doc = "A cancel request is generated at a rising edge."]
8775        pub const _1: Self = Self::new(1);
8776    }
8777}
8778#[doc(hidden)]
8779#[derive(Copy, Clone, Eq, PartialEq)]
8780pub struct Dpsiegr2_SPEC;
8781impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
8782    type DataType = u8;
8783}
8784
8785#[doc = "Deep Software Standby Interrupt Edge Register 2"]
8786pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
8787
8788impl Dpsiegr2 {
8789    #[doc = "LVD1 Edge Select"]
8790    #[inline(always)]
8791    pub fn dlvd1eg(
8792        self,
8793    ) -> crate::common::RegisterField<
8794        0,
8795        0x1,
8796        1,
8797        0,
8798        dpsiegr2::Dlvd1Eg,
8799        dpsiegr2::Dlvd1Eg,
8800        Dpsiegr2_SPEC,
8801        crate::common::RW,
8802    > {
8803        crate::common::RegisterField::<
8804            0,
8805            0x1,
8806            1,
8807            0,
8808            dpsiegr2::Dlvd1Eg,
8809            dpsiegr2::Dlvd1Eg,
8810            Dpsiegr2_SPEC,
8811            crate::common::RW,
8812        >::from_register(self, 0)
8813    }
8814
8815    #[doc = "LVD2 Edge Select"]
8816    #[inline(always)]
8817    pub fn dlvd2eg(
8818        self,
8819    ) -> crate::common::RegisterField<
8820        1,
8821        0x1,
8822        1,
8823        0,
8824        dpsiegr2::Dlvd2Eg,
8825        dpsiegr2::Dlvd2Eg,
8826        Dpsiegr2_SPEC,
8827        crate::common::RW,
8828    > {
8829        crate::common::RegisterField::<
8830            1,
8831            0x1,
8832            1,
8833            0,
8834            dpsiegr2::Dlvd2Eg,
8835            dpsiegr2::Dlvd2Eg,
8836            Dpsiegr2_SPEC,
8837            crate::common::RW,
8838        >::from_register(self, 0)
8839    }
8840
8841    #[doc = "NMI Pin Edge Select"]
8842    #[inline(always)]
8843    pub fn dnmieg(
8844        self,
8845    ) -> crate::common::RegisterField<
8846        4,
8847        0x1,
8848        1,
8849        0,
8850        dpsiegr2::Dnmieg,
8851        dpsiegr2::Dnmieg,
8852        Dpsiegr2_SPEC,
8853        crate::common::RW,
8854    > {
8855        crate::common::RegisterField::<
8856            4,
8857            0x1,
8858            1,
8859            0,
8860            dpsiegr2::Dnmieg,
8861            dpsiegr2::Dnmieg,
8862            Dpsiegr2_SPEC,
8863            crate::common::RW,
8864        >::from_register(self, 0)
8865    }
8866}
8867impl ::core::default::Default for Dpsiegr2 {
8868    #[inline(always)]
8869    fn default() -> Dpsiegr2 {
8870        <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
8871    }
8872}
8873pub mod dpsiegr2 {
8874
8875    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8876    pub struct Dlvd1Eg_SPEC;
8877    pub type Dlvd1Eg = crate::EnumBitfieldStruct<u8, Dlvd1Eg_SPEC>;
8878    impl Dlvd1Eg {
8879        #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
8880        pub const _0: Self = Self::new(0);
8881
8882        #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
8883        pub const _1: Self = Self::new(1);
8884    }
8885    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8886    pub struct Dlvd2Eg_SPEC;
8887    pub type Dlvd2Eg = crate::EnumBitfieldStruct<u8, Dlvd2Eg_SPEC>;
8888    impl Dlvd2Eg {
8889        #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
8890        pub const _0: Self = Self::new(0);
8891
8892        #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
8893        pub const _1: Self = Self::new(1);
8894    }
8895    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8896    pub struct Dnmieg_SPEC;
8897    pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
8898    impl Dnmieg {
8899        #[doc = "A cancel request is generated at a falling edge"]
8900        pub const _0: Self = Self::new(0);
8901
8902        #[doc = "A cancel request is generated at a rising edge"]
8903        pub const _1: Self = Self::new(1);
8904    }
8905}
8906#[doc(hidden)]
8907#[derive(Copy, Clone, Eq, PartialEq)]
8908pub struct Syocdcr_SPEC;
8909impl crate::sealed::RegSpec for Syocdcr_SPEC {
8910    type DataType = u8;
8911}
8912
8913#[doc = "System Control OCD Control Register"]
8914pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
8915
8916impl Syocdcr {
8917    #[doc = "Deep Software Standby OCD flag"]
8918    #[inline(always)]
8919    pub fn docdf(
8920        self,
8921    ) -> crate::common::RegisterField<
8922        0,
8923        0x1,
8924        1,
8925        0,
8926        syocdcr::Docdf,
8927        syocdcr::Docdf,
8928        Syocdcr_SPEC,
8929        crate::common::RW,
8930    > {
8931        crate::common::RegisterField::<
8932            0,
8933            0x1,
8934            1,
8935            0,
8936            syocdcr::Docdf,
8937            syocdcr::Docdf,
8938            Syocdcr_SPEC,
8939            crate::common::RW,
8940        >::from_register(self, 0)
8941    }
8942
8943    #[doc = "Debugger Enable bit"]
8944    #[inline(always)]
8945    pub fn dbgen(
8946        self,
8947    ) -> crate::common::RegisterField<
8948        7,
8949        0x1,
8950        1,
8951        0,
8952        syocdcr::Dbgen,
8953        syocdcr::Dbgen,
8954        Syocdcr_SPEC,
8955        crate::common::RW,
8956    > {
8957        crate::common::RegisterField::<
8958            7,
8959            0x1,
8960            1,
8961            0,
8962            syocdcr::Dbgen,
8963            syocdcr::Dbgen,
8964            Syocdcr_SPEC,
8965            crate::common::RW,
8966        >::from_register(self, 0)
8967    }
8968}
8969impl ::core::default::Default for Syocdcr {
8970    #[inline(always)]
8971    fn default() -> Syocdcr {
8972        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(0)
8973    }
8974}
8975pub mod syocdcr {
8976
8977    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8978    pub struct Docdf_SPEC;
8979    pub type Docdf = crate::EnumBitfieldStruct<u8, Docdf_SPEC>;
8980    impl Docdf {
8981        #[doc = "DBIRQ is not generated"]
8982        pub const _0: Self = Self::new(0);
8983
8984        #[doc = "DBIRQ is generated"]
8985        pub const _1: Self = Self::new(1);
8986    }
8987    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8988    pub struct Dbgen_SPEC;
8989    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
8990    impl Dbgen {
8991        #[doc = "On-chip debugger is disabled"]
8992        pub const _0: Self = Self::new(0);
8993
8994        #[doc = "On-chip debugger is enabled"]
8995        pub const _1: Self = Self::new(1);
8996    }
8997}
8998#[doc(hidden)]
8999#[derive(Copy, Clone, Eq, PartialEq)]
9000pub struct Rstsr0_SPEC;
9001impl crate::sealed::RegSpec for Rstsr0_SPEC {
9002    type DataType = u8;
9003}
9004
9005#[doc = "Reset Status Register 0"]
9006pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
9007
9008impl Rstsr0 {
9009    #[doc = "Power-On Reset Detect Flag"]
9010    #[inline(always)]
9011    pub fn porf(
9012        self,
9013    ) -> crate::common::RegisterField<
9014        0,
9015        0x1,
9016        1,
9017        0,
9018        rstsr0::Porf,
9019        rstsr0::Porf,
9020        Rstsr0_SPEC,
9021        crate::common::RW,
9022    > {
9023        crate::common::RegisterField::<
9024            0,
9025            0x1,
9026            1,
9027            0,
9028            rstsr0::Porf,
9029            rstsr0::Porf,
9030            Rstsr0_SPEC,
9031            crate::common::RW,
9032        >::from_register(self, 0)
9033    }
9034
9035    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
9036    #[inline(always)]
9037    pub fn lvd0rf(
9038        self,
9039    ) -> crate::common::RegisterField<
9040        1,
9041        0x1,
9042        1,
9043        0,
9044        rstsr0::Lvd0Rf,
9045        rstsr0::Lvd0Rf,
9046        Rstsr0_SPEC,
9047        crate::common::RW,
9048    > {
9049        crate::common::RegisterField::<
9050            1,
9051            0x1,
9052            1,
9053            0,
9054            rstsr0::Lvd0Rf,
9055            rstsr0::Lvd0Rf,
9056            Rstsr0_SPEC,
9057            crate::common::RW,
9058        >::from_register(self, 0)
9059    }
9060
9061    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
9062    #[inline(always)]
9063    pub fn lvd1rf(
9064        self,
9065    ) -> crate::common::RegisterField<
9066        2,
9067        0x1,
9068        1,
9069        0,
9070        rstsr0::Lvd1Rf,
9071        rstsr0::Lvd1Rf,
9072        Rstsr0_SPEC,
9073        crate::common::RW,
9074    > {
9075        crate::common::RegisterField::<
9076            2,
9077            0x1,
9078            1,
9079            0,
9080            rstsr0::Lvd1Rf,
9081            rstsr0::Lvd1Rf,
9082            Rstsr0_SPEC,
9083            crate::common::RW,
9084        >::from_register(self, 0)
9085    }
9086
9087    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
9088    #[inline(always)]
9089    pub fn lvd2rf(
9090        self,
9091    ) -> crate::common::RegisterField<
9092        3,
9093        0x1,
9094        1,
9095        0,
9096        rstsr0::Lvd2Rf,
9097        rstsr0::Lvd2Rf,
9098        Rstsr0_SPEC,
9099        crate::common::RW,
9100    > {
9101        crate::common::RegisterField::<
9102            3,
9103            0x1,
9104            1,
9105            0,
9106            rstsr0::Lvd2Rf,
9107            rstsr0::Lvd2Rf,
9108            Rstsr0_SPEC,
9109            crate::common::RW,
9110        >::from_register(self, 0)
9111    }
9112
9113    #[doc = "Deep Software Standby Reset Detect Flag"]
9114    #[inline(always)]
9115    pub fn dpsrstf(
9116        self,
9117    ) -> crate::common::RegisterField<
9118        7,
9119        0x1,
9120        1,
9121        0,
9122        rstsr0::Dpsrstf,
9123        rstsr0::Dpsrstf,
9124        Rstsr0_SPEC,
9125        crate::common::RW,
9126    > {
9127        crate::common::RegisterField::<
9128            7,
9129            0x1,
9130            1,
9131            0,
9132            rstsr0::Dpsrstf,
9133            rstsr0::Dpsrstf,
9134            Rstsr0_SPEC,
9135            crate::common::RW,
9136        >::from_register(self, 0)
9137    }
9138}
9139impl ::core::default::Default for Rstsr0 {
9140    #[inline(always)]
9141    fn default() -> Rstsr0 {
9142        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
9143    }
9144}
9145pub mod rstsr0 {
9146
9147    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9148    pub struct Porf_SPEC;
9149    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
9150    impl Porf {
9151        #[doc = "Power-on reset not detected"]
9152        pub const _0: Self = Self::new(0);
9153
9154        #[doc = "Power-on reset detected"]
9155        pub const _1: Self = Self::new(1);
9156    }
9157    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9158    pub struct Lvd0Rf_SPEC;
9159    pub type Lvd0Rf = crate::EnumBitfieldStruct<u8, Lvd0Rf_SPEC>;
9160    impl Lvd0Rf {
9161        #[doc = "Voltage monitor 0 reset not detected"]
9162        pub const _0: Self = Self::new(0);
9163
9164        #[doc = "Voltage monitor 0 reset detected"]
9165        pub const _1: Self = Self::new(1);
9166    }
9167    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9168    pub struct Lvd1Rf_SPEC;
9169    pub type Lvd1Rf = crate::EnumBitfieldStruct<u8, Lvd1Rf_SPEC>;
9170    impl Lvd1Rf {
9171        #[doc = "Voltage monitor 1 reset not detected"]
9172        pub const _0: Self = Self::new(0);
9173
9174        #[doc = "Voltage monitor 1 reset detected"]
9175        pub const _1: Self = Self::new(1);
9176    }
9177    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9178    pub struct Lvd2Rf_SPEC;
9179    pub type Lvd2Rf = crate::EnumBitfieldStruct<u8, Lvd2Rf_SPEC>;
9180    impl Lvd2Rf {
9181        #[doc = "Voltage monitor 2 reset not detected"]
9182        pub const _0: Self = Self::new(0);
9183
9184        #[doc = "Voltage monitor 2 reset detected"]
9185        pub const _1: Self = Self::new(1);
9186    }
9187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9188    pub struct Dpsrstf_SPEC;
9189    pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
9190    impl Dpsrstf {
9191        #[doc = "Deep software standby mode cancellation not requested by an interrupt."]
9192        pub const _0: Self = Self::new(0);
9193
9194        #[doc = "Deep software standby mode cancellation requested by an interrupt."]
9195        pub const _1: Self = Self::new(1);
9196    }
9197}
9198#[doc(hidden)]
9199#[derive(Copy, Clone, Eq, PartialEq)]
9200pub struct Rstsr2_SPEC;
9201impl crate::sealed::RegSpec for Rstsr2_SPEC {
9202    type DataType = u8;
9203}
9204
9205#[doc = "Reset Status Register 2"]
9206pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
9207
9208impl Rstsr2 {
9209    #[doc = "Cold/Warm Start Determination Flag"]
9210    #[inline(always)]
9211    pub fn cwsf(
9212        self,
9213    ) -> crate::common::RegisterField<
9214        0,
9215        0x1,
9216        1,
9217        0,
9218        rstsr2::Cwsf,
9219        rstsr2::Cwsf,
9220        Rstsr2_SPEC,
9221        crate::common::RW,
9222    > {
9223        crate::common::RegisterField::<
9224            0,
9225            0x1,
9226            1,
9227            0,
9228            rstsr2::Cwsf,
9229            rstsr2::Cwsf,
9230            Rstsr2_SPEC,
9231            crate::common::RW,
9232        >::from_register(self, 0)
9233    }
9234}
9235impl ::core::default::Default for Rstsr2 {
9236    #[inline(always)]
9237    fn default() -> Rstsr2 {
9238        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
9239    }
9240}
9241pub mod rstsr2 {
9242
9243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9244    pub struct Cwsf_SPEC;
9245    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
9246    impl Cwsf {
9247        #[doc = "Cold start"]
9248        pub const _0: Self = Self::new(0);
9249
9250        #[doc = "Warm start"]
9251        pub const _1: Self = Self::new(1);
9252    }
9253}
9254#[doc(hidden)]
9255#[derive(Copy, Clone, Eq, PartialEq)]
9256pub struct Momcr_SPEC;
9257impl crate::sealed::RegSpec for Momcr_SPEC {
9258    type DataType = u8;
9259}
9260
9261#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
9262pub type Momcr = crate::RegValueT<Momcr_SPEC>;
9263
9264impl Momcr {
9265    #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
9266    #[inline(always)]
9267    pub fn modrv(
9268        self,
9269    ) -> crate::common::RegisterField<
9270        4,
9271        0x3,
9272        1,
9273        0,
9274        momcr::Modrv,
9275        momcr::Modrv,
9276        Momcr_SPEC,
9277        crate::common::RW,
9278    > {
9279        crate::common::RegisterField::<
9280            4,
9281            0x3,
9282            1,
9283            0,
9284            momcr::Modrv,
9285            momcr::Modrv,
9286            Momcr_SPEC,
9287            crate::common::RW,
9288        >::from_register(self, 0)
9289    }
9290
9291    #[doc = "Main Clock Oscillator Switching"]
9292    #[inline(always)]
9293    pub fn mosel(
9294        self,
9295    ) -> crate::common::RegisterField<
9296        6,
9297        0x1,
9298        1,
9299        0,
9300        momcr::Mosel,
9301        momcr::Mosel,
9302        Momcr_SPEC,
9303        crate::common::RW,
9304    > {
9305        crate::common::RegisterField::<
9306            6,
9307            0x1,
9308            1,
9309            0,
9310            momcr::Mosel,
9311            momcr::Mosel,
9312            Momcr_SPEC,
9313            crate::common::RW,
9314        >::from_register(self, 0)
9315    }
9316}
9317impl ::core::default::Default for Momcr {
9318    #[inline(always)]
9319    fn default() -> Momcr {
9320        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(0)
9321    }
9322}
9323pub mod momcr {
9324
9325    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9326    pub struct Modrv_SPEC;
9327    pub type Modrv = crate::EnumBitfieldStruct<u8, Modrv_SPEC>;
9328    impl Modrv {
9329        #[doc = "20 MHz to 24 MHz"]
9330        pub const _00: Self = Self::new(0);
9331
9332        #[doc = "16 MHz to 20 MHz"]
9333        pub const _01: Self = Self::new(1);
9334
9335        #[doc = "8 MHz to 16 MHz"]
9336        pub const _10: Self = Self::new(2);
9337
9338        #[doc = "8 MHz"]
9339        pub const _11: Self = Self::new(3);
9340    }
9341    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9342    pub struct Mosel_SPEC;
9343    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
9344    impl Mosel {
9345        #[doc = "Resonator"]
9346        pub const _0: Self = Self::new(0);
9347
9348        #[doc = "External clock input"]
9349        pub const _1: Self = Self::new(1);
9350    }
9351}
9352#[doc(hidden)]
9353#[derive(Copy, Clone, Eq, PartialEq)]
9354pub struct Fwepror_SPEC;
9355impl crate::sealed::RegSpec for Fwepror_SPEC {
9356    type DataType = u8;
9357}
9358
9359#[doc = "Flash P/E Protect Register"]
9360pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
9361
9362impl Fwepror {
9363    #[doc = "Flash Programming and Erasure"]
9364    #[inline(always)]
9365    pub fn flwe(
9366        self,
9367    ) -> crate::common::RegisterField<
9368        0,
9369        0x3,
9370        1,
9371        0,
9372        fwepror::Flwe,
9373        fwepror::Flwe,
9374        Fwepror_SPEC,
9375        crate::common::RW,
9376    > {
9377        crate::common::RegisterField::<
9378            0,
9379            0x3,
9380            1,
9381            0,
9382            fwepror::Flwe,
9383            fwepror::Flwe,
9384            Fwepror_SPEC,
9385            crate::common::RW,
9386        >::from_register(self, 0)
9387    }
9388}
9389impl ::core::default::Default for Fwepror {
9390    #[inline(always)]
9391    fn default() -> Fwepror {
9392        <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
9393    }
9394}
9395pub mod fwepror {
9396
9397    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9398    pub struct Flwe_SPEC;
9399    pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
9400    impl Flwe {
9401        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9402        pub const _00: Self = Self::new(0);
9403
9404        #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9405        pub const _01: Self = Self::new(1);
9406
9407        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9408        pub const _10: Self = Self::new(2);
9409
9410        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
9411        pub const _11: Self = Self::new(3);
9412    }
9413}
9414#[doc(hidden)]
9415#[derive(Copy, Clone, Eq, PartialEq)]
9416pub struct Lvd1Cmpcr_SPEC;
9417impl crate::sealed::RegSpec for Lvd1Cmpcr_SPEC {
9418    type DataType = u8;
9419}
9420
9421#[doc = "Voltage Monitoring 1 Comparator Control Register"]
9422pub type Lvd1Cmpcr = crate::RegValueT<Lvd1Cmpcr_SPEC>;
9423
9424impl Lvd1Cmpcr {
9425    #[doc = "Voltage Detection 1 Level Select (Standard voltage during drop in voltage)"]
9426    #[inline(always)]
9427    pub fn lvd1lvl(
9428        self,
9429    ) -> crate::common::RegisterField<
9430        0,
9431        0x1f,
9432        1,
9433        0,
9434        lvd1cmpcr::Lvd1Lvl,
9435        lvd1cmpcr::Lvd1Lvl,
9436        Lvd1Cmpcr_SPEC,
9437        crate::common::RW,
9438    > {
9439        crate::common::RegisterField::<
9440            0,
9441            0x1f,
9442            1,
9443            0,
9444            lvd1cmpcr::Lvd1Lvl,
9445            lvd1cmpcr::Lvd1Lvl,
9446            Lvd1Cmpcr_SPEC,
9447            crate::common::RW,
9448        >::from_register(self, 0)
9449    }
9450
9451    #[doc = "Voltage Detection 1 Enable"]
9452    #[inline(always)]
9453    pub fn lvd1e(
9454        self,
9455    ) -> crate::common::RegisterField<
9456        7,
9457        0x1,
9458        1,
9459        0,
9460        lvd1cmpcr::Lvd1E,
9461        lvd1cmpcr::Lvd1E,
9462        Lvd1Cmpcr_SPEC,
9463        crate::common::RW,
9464    > {
9465        crate::common::RegisterField::<
9466            7,
9467            0x1,
9468            1,
9469            0,
9470            lvd1cmpcr::Lvd1E,
9471            lvd1cmpcr::Lvd1E,
9472            Lvd1Cmpcr_SPEC,
9473            crate::common::RW,
9474        >::from_register(self, 0)
9475    }
9476}
9477impl ::core::default::Default for Lvd1Cmpcr {
9478    #[inline(always)]
9479    fn default() -> Lvd1Cmpcr {
9480        <crate::RegValueT<Lvd1Cmpcr_SPEC> as RegisterValue<_>>::new(19)
9481    }
9482}
9483pub mod lvd1cmpcr {
9484
9485    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9486    pub struct Lvd1Lvl_SPEC;
9487    pub type Lvd1Lvl = crate::EnumBitfieldStruct<u8, Lvd1Lvl_SPEC>;
9488    impl Lvd1Lvl {
9489        #[doc = "2.99 V (Vdet1_1)"]
9490        pub const _0_X_11: Self = Self::new(17);
9491
9492        #[doc = "2.92 V (Vdet1_2)"]
9493        pub const _0_X_12: Self = Self::new(18);
9494
9495        #[doc = "2.85 V (Vdet1_3)"]
9496        pub const _0_X_13: Self = Self::new(19);
9497    }
9498    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9499    pub struct Lvd1E_SPEC;
9500    pub type Lvd1E = crate::EnumBitfieldStruct<u8, Lvd1E_SPEC>;
9501    impl Lvd1E {
9502        #[doc = "Voltage detection 1 circuit disabled"]
9503        pub const _0: Self = Self::new(0);
9504
9505        #[doc = "Voltage detection 1 circuit enabled"]
9506        pub const _1: Self = Self::new(1);
9507    }
9508}
9509#[doc(hidden)]
9510#[derive(Copy, Clone, Eq, PartialEq)]
9511pub struct Lvd2Cmpcr_SPEC;
9512impl crate::sealed::RegSpec for Lvd2Cmpcr_SPEC {
9513    type DataType = u8;
9514}
9515
9516#[doc = "Voltage Monitoring 2 Comparator Control Register"]
9517pub type Lvd2Cmpcr = crate::RegValueT<Lvd2Cmpcr_SPEC>;
9518
9519impl Lvd2Cmpcr {
9520    #[doc = "Voltage Detection 2 Level Select (Standard voltage during drop in voltage)"]
9521    #[inline(always)]
9522    pub fn lvd2lvl(
9523        self,
9524    ) -> crate::common::RegisterField<
9525        0,
9526        0x7,
9527        1,
9528        0,
9529        lvd2cmpcr::Lvd2Lvl,
9530        lvd2cmpcr::Lvd2Lvl,
9531        Lvd2Cmpcr_SPEC,
9532        crate::common::RW,
9533    > {
9534        crate::common::RegisterField::<
9535            0,
9536            0x7,
9537            1,
9538            0,
9539            lvd2cmpcr::Lvd2Lvl,
9540            lvd2cmpcr::Lvd2Lvl,
9541            Lvd2Cmpcr_SPEC,
9542            crate::common::RW,
9543        >::from_register(self, 0)
9544    }
9545
9546    #[doc = "Voltage Detection 2 Enable"]
9547    #[inline(always)]
9548    pub fn lvd2e(
9549        self,
9550    ) -> crate::common::RegisterField<
9551        7,
9552        0x1,
9553        1,
9554        0,
9555        lvd2cmpcr::Lvd2E,
9556        lvd2cmpcr::Lvd2E,
9557        Lvd2Cmpcr_SPEC,
9558        crate::common::RW,
9559    > {
9560        crate::common::RegisterField::<
9561            7,
9562            0x1,
9563            1,
9564            0,
9565            lvd2cmpcr::Lvd2E,
9566            lvd2cmpcr::Lvd2E,
9567            Lvd2Cmpcr_SPEC,
9568            crate::common::RW,
9569        >::from_register(self, 0)
9570    }
9571}
9572impl ::core::default::Default for Lvd2Cmpcr {
9573    #[inline(always)]
9574    fn default() -> Lvd2Cmpcr {
9575        <crate::RegValueT<Lvd2Cmpcr_SPEC> as RegisterValue<_>>::new(7)
9576    }
9577}
9578pub mod lvd2cmpcr {
9579
9580    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9581    pub struct Lvd2Lvl_SPEC;
9582    pub type Lvd2Lvl = crate::EnumBitfieldStruct<u8, Lvd2Lvl_SPEC>;
9583    impl Lvd2Lvl {
9584        #[doc = "2.99 V (Vdet2_1)"]
9585        pub const _101: Self = Self::new(5);
9586
9587        #[doc = "2.92 V (Vdet2_2)"]
9588        pub const _110: Self = Self::new(6);
9589
9590        #[doc = "2.85 V (Vdet2_3)"]
9591        pub const _111: Self = Self::new(7);
9592    }
9593    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9594    pub struct Lvd2E_SPEC;
9595    pub type Lvd2E = crate::EnumBitfieldStruct<u8, Lvd2E_SPEC>;
9596    impl Lvd2E {
9597        #[doc = "Voltage detection 2 circuit disabled"]
9598        pub const _0: Self = Self::new(0);
9599
9600        #[doc = "Voltage detection 2 circuit enabled"]
9601        pub const _1: Self = Self::new(1);
9602    }
9603}
9604#[doc(hidden)]
9605#[derive(Copy, Clone, Eq, PartialEq)]
9606pub struct Lvd1Cr0_SPEC;
9607impl crate::sealed::RegSpec for Lvd1Cr0_SPEC {
9608    type DataType = u8;
9609}
9610
9611#[doc = "Voltage Monitor 1 Circuit Control Register 0"]
9612pub type Lvd1Cr0 = crate::RegValueT<Lvd1Cr0_SPEC>;
9613
9614impl Lvd1Cr0 {
9615    #[doc = "Voltage Monitor 1 Interrupt/Reset Enable"]
9616    #[inline(always)]
9617    pub fn rie(
9618        self,
9619    ) -> crate::common::RegisterField<
9620        0,
9621        0x1,
9622        1,
9623        0,
9624        lvd1cr0::Rie,
9625        lvd1cr0::Rie,
9626        Lvd1Cr0_SPEC,
9627        crate::common::RW,
9628    > {
9629        crate::common::RegisterField::<
9630            0,
9631            0x1,
9632            1,
9633            0,
9634            lvd1cr0::Rie,
9635            lvd1cr0::Rie,
9636            Lvd1Cr0_SPEC,
9637            crate::common::RW,
9638        >::from_register(self, 0)
9639    }
9640
9641    #[doc = "Voltage monitor 1 Digital Filter Disabled Mode Select"]
9642    #[inline(always)]
9643    pub fn dfdis(
9644        self,
9645    ) -> crate::common::RegisterField<
9646        1,
9647        0x1,
9648        1,
9649        0,
9650        lvd1cr0::Dfdis,
9651        lvd1cr0::Dfdis,
9652        Lvd1Cr0_SPEC,
9653        crate::common::RW,
9654    > {
9655        crate::common::RegisterField::<
9656            1,
9657            0x1,
9658            1,
9659            0,
9660            lvd1cr0::Dfdis,
9661            lvd1cr0::Dfdis,
9662            Lvd1Cr0_SPEC,
9663            crate::common::RW,
9664        >::from_register(self, 0)
9665    }
9666
9667    #[doc = "Voltage Monitor 1 Circuit Comparison Result Output Enable"]
9668    #[inline(always)]
9669    pub fn cmpe(
9670        self,
9671    ) -> crate::common::RegisterField<
9672        2,
9673        0x1,
9674        1,
9675        0,
9676        lvd1cr0::Cmpe,
9677        lvd1cr0::Cmpe,
9678        Lvd1Cr0_SPEC,
9679        crate::common::RW,
9680    > {
9681        crate::common::RegisterField::<
9682            2,
9683            0x1,
9684            1,
9685            0,
9686            lvd1cr0::Cmpe,
9687            lvd1cr0::Cmpe,
9688            Lvd1Cr0_SPEC,
9689            crate::common::RW,
9690        >::from_register(self, 0)
9691    }
9692
9693    #[doc = "Sampling Clock Select"]
9694    #[inline(always)]
9695    pub fn fsamp(
9696        self,
9697    ) -> crate::common::RegisterField<
9698        4,
9699        0x3,
9700        1,
9701        0,
9702        lvd1cr0::Fsamp,
9703        lvd1cr0::Fsamp,
9704        Lvd1Cr0_SPEC,
9705        crate::common::RW,
9706    > {
9707        crate::common::RegisterField::<
9708            4,
9709            0x3,
9710            1,
9711            0,
9712            lvd1cr0::Fsamp,
9713            lvd1cr0::Fsamp,
9714            Lvd1Cr0_SPEC,
9715            crate::common::RW,
9716        >::from_register(self, 0)
9717    }
9718
9719    #[doc = "Voltage Monitor 1 Circuit Mode Select"]
9720    #[inline(always)]
9721    pub fn ri(
9722        self,
9723    ) -> crate::common::RegisterField<
9724        6,
9725        0x1,
9726        1,
9727        0,
9728        lvd1cr0::Ri,
9729        lvd1cr0::Ri,
9730        Lvd1Cr0_SPEC,
9731        crate::common::RW,
9732    > {
9733        crate::common::RegisterField::<
9734            6,
9735            0x1,
9736            1,
9737            0,
9738            lvd1cr0::Ri,
9739            lvd1cr0::Ri,
9740            Lvd1Cr0_SPEC,
9741            crate::common::RW,
9742        >::from_register(self, 0)
9743    }
9744
9745    #[doc = "Voltage Monitor 1 Reset Negate Select"]
9746    #[inline(always)]
9747    pub fn rn(
9748        self,
9749    ) -> crate::common::RegisterField<
9750        7,
9751        0x1,
9752        1,
9753        0,
9754        lvd1cr0::Rn,
9755        lvd1cr0::Rn,
9756        Lvd1Cr0_SPEC,
9757        crate::common::RW,
9758    > {
9759        crate::common::RegisterField::<
9760            7,
9761            0x1,
9762            1,
9763            0,
9764            lvd1cr0::Rn,
9765            lvd1cr0::Rn,
9766            Lvd1Cr0_SPEC,
9767            crate::common::RW,
9768        >::from_register(self, 0)
9769    }
9770}
9771impl ::core::default::Default for Lvd1Cr0 {
9772    #[inline(always)]
9773    fn default() -> Lvd1Cr0 {
9774        <crate::RegValueT<Lvd1Cr0_SPEC> as RegisterValue<_>>::new(130)
9775    }
9776}
9777pub mod lvd1cr0 {
9778
9779    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9780    pub struct Rie_SPEC;
9781    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
9782    impl Rie {
9783        #[doc = "Disable"]
9784        pub const _0: Self = Self::new(0);
9785
9786        #[doc = "Enable"]
9787        pub const _1: Self = Self::new(1);
9788    }
9789    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9790    pub struct Dfdis_SPEC;
9791    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
9792    impl Dfdis {
9793        #[doc = "Enable the digital filter"]
9794        pub const _0: Self = Self::new(0);
9795
9796        #[doc = "Disable the digital filter"]
9797        pub const _1: Self = Self::new(1);
9798    }
9799    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9800    pub struct Cmpe_SPEC;
9801    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
9802    impl Cmpe {
9803        #[doc = "Disable voltage monitor 1 circuit comparison result output"]
9804        pub const _0: Self = Self::new(0);
9805
9806        #[doc = "Enable voltage monitor 1 circuit comparison result output"]
9807        pub const _1: Self = Self::new(1);
9808    }
9809    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9810    pub struct Fsamp_SPEC;
9811    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
9812    impl Fsamp {
9813        #[doc = "1/2 LOCO frequency"]
9814        pub const _00: Self = Self::new(0);
9815
9816        #[doc = "1/4 LOCO frequency"]
9817        pub const _01: Self = Self::new(1);
9818
9819        #[doc = "1/8 LOCO frequency"]
9820        pub const _10: Self = Self::new(2);
9821
9822        #[doc = "1/16 LOCO frequency"]
9823        pub const _11: Self = Self::new(3);
9824    }
9825    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9826    pub struct Ri_SPEC;
9827    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
9828    impl Ri {
9829        #[doc = "Generate voltage monitor 1 interrupt on Vdet1 crossing"]
9830        pub const _0: Self = Self::new(0);
9831
9832        #[doc = "Enable voltage monitor 1 reset when the voltage falls to and below Vdet1"]
9833        pub const _1: Self = Self::new(1);
9834    }
9835    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9836    pub struct Rn_SPEC;
9837    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
9838    impl Rn {
9839        #[doc = "Negate after a stabilization time (tLVD1) when VCC > Vdet1 is detected"]
9840        pub const _0: Self = Self::new(0);
9841
9842        #[doc = "Negate after a stabilization time (tLVD1) on assertion of the LVD1 reset"]
9843        pub const _1: Self = Self::new(1);
9844    }
9845}
9846#[doc(hidden)]
9847#[derive(Copy, Clone, Eq, PartialEq)]
9848pub struct Lvd2Cr0_SPEC;
9849impl crate::sealed::RegSpec for Lvd2Cr0_SPEC {
9850    type DataType = u8;
9851}
9852
9853#[doc = "Voltage Monitor 2 Circuit Control Register 0"]
9854pub type Lvd2Cr0 = crate::RegValueT<Lvd2Cr0_SPEC>;
9855
9856impl Lvd2Cr0 {
9857    #[doc = "Voltage Monitor 2 Interrupt/Reset Enable"]
9858    #[inline(always)]
9859    pub fn rie(
9860        self,
9861    ) -> crate::common::RegisterField<
9862        0,
9863        0x1,
9864        1,
9865        0,
9866        lvd2cr0::Rie,
9867        lvd2cr0::Rie,
9868        Lvd2Cr0_SPEC,
9869        crate::common::RW,
9870    > {
9871        crate::common::RegisterField::<
9872            0,
9873            0x1,
9874            1,
9875            0,
9876            lvd2cr0::Rie,
9877            lvd2cr0::Rie,
9878            Lvd2Cr0_SPEC,
9879            crate::common::RW,
9880        >::from_register(self, 0)
9881    }
9882
9883    #[doc = "Voltage monitor 2 Digital Filter Disabled Mode Select"]
9884    #[inline(always)]
9885    pub fn dfdis(
9886        self,
9887    ) -> crate::common::RegisterField<
9888        1,
9889        0x1,
9890        1,
9891        0,
9892        lvd2cr0::Dfdis,
9893        lvd2cr0::Dfdis,
9894        Lvd2Cr0_SPEC,
9895        crate::common::RW,
9896    > {
9897        crate::common::RegisterField::<
9898            1,
9899            0x1,
9900            1,
9901            0,
9902            lvd2cr0::Dfdis,
9903            lvd2cr0::Dfdis,
9904            Lvd2Cr0_SPEC,
9905            crate::common::RW,
9906        >::from_register(self, 0)
9907    }
9908
9909    #[doc = "Voltage Monitor 2 Circuit Comparison Result Output Enable"]
9910    #[inline(always)]
9911    pub fn cmpe(
9912        self,
9913    ) -> crate::common::RegisterField<
9914        2,
9915        0x1,
9916        1,
9917        0,
9918        lvd2cr0::Cmpe,
9919        lvd2cr0::Cmpe,
9920        Lvd2Cr0_SPEC,
9921        crate::common::RW,
9922    > {
9923        crate::common::RegisterField::<
9924            2,
9925            0x1,
9926            1,
9927            0,
9928            lvd2cr0::Cmpe,
9929            lvd2cr0::Cmpe,
9930            Lvd2Cr0_SPEC,
9931            crate::common::RW,
9932        >::from_register(self, 0)
9933    }
9934
9935    #[doc = "Sampling Clock Select"]
9936    #[inline(always)]
9937    pub fn fsamp(
9938        self,
9939    ) -> crate::common::RegisterField<
9940        4,
9941        0x3,
9942        1,
9943        0,
9944        lvd2cr0::Fsamp,
9945        lvd2cr0::Fsamp,
9946        Lvd2Cr0_SPEC,
9947        crate::common::RW,
9948    > {
9949        crate::common::RegisterField::<
9950            4,
9951            0x3,
9952            1,
9953            0,
9954            lvd2cr0::Fsamp,
9955            lvd2cr0::Fsamp,
9956            Lvd2Cr0_SPEC,
9957            crate::common::RW,
9958        >::from_register(self, 0)
9959    }
9960
9961    #[doc = "Voltage Monitor 2 Circuit Mode Select"]
9962    #[inline(always)]
9963    pub fn ri(
9964        self,
9965    ) -> crate::common::RegisterField<
9966        6,
9967        0x1,
9968        1,
9969        0,
9970        lvd2cr0::Ri,
9971        lvd2cr0::Ri,
9972        Lvd2Cr0_SPEC,
9973        crate::common::RW,
9974    > {
9975        crate::common::RegisterField::<
9976            6,
9977            0x1,
9978            1,
9979            0,
9980            lvd2cr0::Ri,
9981            lvd2cr0::Ri,
9982            Lvd2Cr0_SPEC,
9983            crate::common::RW,
9984        >::from_register(self, 0)
9985    }
9986
9987    #[doc = "Voltage Monitor 2 Reset Negate Select"]
9988    #[inline(always)]
9989    pub fn rn(
9990        self,
9991    ) -> crate::common::RegisterField<
9992        7,
9993        0x1,
9994        1,
9995        0,
9996        lvd2cr0::Rn,
9997        lvd2cr0::Rn,
9998        Lvd2Cr0_SPEC,
9999        crate::common::RW,
10000    > {
10001        crate::common::RegisterField::<
10002            7,
10003            0x1,
10004            1,
10005            0,
10006            lvd2cr0::Rn,
10007            lvd2cr0::Rn,
10008            Lvd2Cr0_SPEC,
10009            crate::common::RW,
10010        >::from_register(self, 0)
10011    }
10012}
10013impl ::core::default::Default for Lvd2Cr0 {
10014    #[inline(always)]
10015    fn default() -> Lvd2Cr0 {
10016        <crate::RegValueT<Lvd2Cr0_SPEC> as RegisterValue<_>>::new(130)
10017    }
10018}
10019pub mod lvd2cr0 {
10020
10021    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10022    pub struct Rie_SPEC;
10023    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
10024    impl Rie {
10025        #[doc = "Disable"]
10026        pub const _0: Self = Self::new(0);
10027
10028        #[doc = "Enable"]
10029        pub const _1: Self = Self::new(1);
10030    }
10031    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10032    pub struct Dfdis_SPEC;
10033    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
10034    impl Dfdis {
10035        #[doc = "Enable the digital filter"]
10036        pub const _0: Self = Self::new(0);
10037
10038        #[doc = "Disable the digital filter"]
10039        pub const _1: Self = Self::new(1);
10040    }
10041    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10042    pub struct Cmpe_SPEC;
10043    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
10044    impl Cmpe {
10045        #[doc = "Disable voltage monitor 2 circuit comparison result output"]
10046        pub const _0: Self = Self::new(0);
10047
10048        #[doc = "Enable voltage monitor 2 circuit comparison result output"]
10049        pub const _1: Self = Self::new(1);
10050    }
10051    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10052    pub struct Fsamp_SPEC;
10053    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
10054    impl Fsamp {
10055        #[doc = "1/2 LOCO frequency"]
10056        pub const _00: Self = Self::new(0);
10057
10058        #[doc = "1/4 LOCO frequency"]
10059        pub const _01: Self = Self::new(1);
10060
10061        #[doc = "1/8 LOCO frequency"]
10062        pub const _10: Self = Self::new(2);
10063
10064        #[doc = "1/16 LOCO frequency"]
10065        pub const _11: Self = Self::new(3);
10066    }
10067    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10068    pub struct Ri_SPEC;
10069    pub type Ri = crate::EnumBitfieldStruct<u8, Ri_SPEC>;
10070    impl Ri {
10071        #[doc = "Generate voltage monitor 2 interrupt on Vdet2 crossing"]
10072        pub const _0: Self = Self::new(0);
10073
10074        #[doc = "Enable voltage monitor 2 reset when the voltage falls to and below Vdet2"]
10075        pub const _1: Self = Self::new(1);
10076    }
10077    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10078    pub struct Rn_SPEC;
10079    pub type Rn = crate::EnumBitfieldStruct<u8, Rn_SPEC>;
10080    impl Rn {
10081        #[doc = "Negate after a stabilization time (tLVD2) when VCC > Vdet2 is detected"]
10082        pub const _0: Self = Self::new(0);
10083
10084        #[doc = "Negate after a stabilization time (tLVD2) on assertion of the LVD2 reset"]
10085        pub const _1: Self = Self::new(1);
10086    }
10087}
10088#[doc(hidden)]
10089#[derive(Copy, Clone, Eq, PartialEq)]
10090pub struct Vbattmnselr_SPEC;
10091impl crate::sealed::RegSpec for Vbattmnselr_SPEC {
10092    type DataType = u8;
10093}
10094
10095#[doc = "Battery Backup Voltage Monitor Function Select Register"]
10096pub type Vbattmnselr = crate::RegValueT<Vbattmnselr_SPEC>;
10097
10098impl Vbattmnselr {
10099    #[doc = "VBATT Low Voltage Detect Function Select Bit"]
10100    #[inline(always)]
10101    pub fn vbattmnsel(
10102        self,
10103    ) -> crate::common::RegisterField<
10104        0,
10105        0x1,
10106        1,
10107        0,
10108        vbattmnselr::Vbattmnsel,
10109        vbattmnselr::Vbattmnsel,
10110        Vbattmnselr_SPEC,
10111        crate::common::RW,
10112    > {
10113        crate::common::RegisterField::<
10114            0,
10115            0x1,
10116            1,
10117            0,
10118            vbattmnselr::Vbattmnsel,
10119            vbattmnselr::Vbattmnsel,
10120            Vbattmnselr_SPEC,
10121            crate::common::RW,
10122        >::from_register(self, 0)
10123    }
10124}
10125impl ::core::default::Default for Vbattmnselr {
10126    #[inline(always)]
10127    fn default() -> Vbattmnselr {
10128        <crate::RegValueT<Vbattmnselr_SPEC> as RegisterValue<_>>::new(0)
10129    }
10130}
10131pub mod vbattmnselr {
10132
10133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10134    pub struct Vbattmnsel_SPEC;
10135    pub type Vbattmnsel = crate::EnumBitfieldStruct<u8, Vbattmnsel_SPEC>;
10136    impl Vbattmnsel {
10137        #[doc = "Disables VBATT low voltage detect function"]
10138        pub const _0: Self = Self::new(0);
10139
10140        #[doc = "Enables VBATT low voltage detect function"]
10141        pub const _1: Self = Self::new(1);
10142    }
10143}
10144#[doc(hidden)]
10145#[derive(Copy, Clone, Eq, PartialEq)]
10146pub struct Vbattmonr_SPEC;
10147impl crate::sealed::RegSpec for Vbattmonr_SPEC {
10148    type DataType = u8;
10149}
10150
10151#[doc = "Battery Backup Voltage Monitor Register"]
10152pub type Vbattmonr = crate::RegValueT<Vbattmonr_SPEC>;
10153
10154impl Vbattmonr {
10155    #[doc = "VBATT Voltage Monitor Bit"]
10156    #[inline(always)]
10157    pub fn vbattmon(
10158        self,
10159    ) -> crate::common::RegisterField<
10160        0,
10161        0x1,
10162        1,
10163        0,
10164        vbattmonr::Vbattmon,
10165        vbattmonr::Vbattmon,
10166        Vbattmonr_SPEC,
10167        crate::common::R,
10168    > {
10169        crate::common::RegisterField::<
10170            0,
10171            0x1,
10172            1,
10173            0,
10174            vbattmonr::Vbattmon,
10175            vbattmonr::Vbattmon,
10176            Vbattmonr_SPEC,
10177            crate::common::R,
10178        >::from_register(self, 0)
10179    }
10180}
10181impl ::core::default::Default for Vbattmonr {
10182    #[inline(always)]
10183    fn default() -> Vbattmonr {
10184        <crate::RegValueT<Vbattmonr_SPEC> as RegisterValue<_>>::new(0)
10185    }
10186}
10187pub mod vbattmonr {
10188
10189    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10190    pub struct Vbattmon_SPEC;
10191    pub type Vbattmon = crate::EnumBitfieldStruct<u8, Vbattmon_SPEC>;
10192    impl Vbattmon {
10193        #[doc = "VBATT ≥ Vbattldet"]
10194        pub const _0: Self = Self::new(0);
10195
10196        #[doc = "VBATT < Vbattldet"]
10197        pub const _1: Self = Self::new(1);
10198    }
10199}
10200#[doc(hidden)]
10201#[derive(Copy, Clone, Eq, PartialEq)]
10202pub struct Ldoscr_SPEC;
10203impl crate::sealed::RegSpec for Ldoscr_SPEC {
10204    type DataType = u8;
10205}
10206
10207#[doc = "LDO Stop Control Register"]
10208pub type Ldoscr = crate::RegValueT<Ldoscr_SPEC>;
10209
10210impl Ldoscr {
10211    #[doc = "LDO0 Stop"]
10212    #[inline(always)]
10213    pub fn ldostp0(
10214        self,
10215    ) -> crate::common::RegisterField<
10216        0,
10217        0x1,
10218        1,
10219        0,
10220        ldoscr::Ldostp0,
10221        ldoscr::Ldostp0,
10222        Ldoscr_SPEC,
10223        crate::common::RW,
10224    > {
10225        crate::common::RegisterField::<
10226            0,
10227            0x1,
10228            1,
10229            0,
10230            ldoscr::Ldostp0,
10231            ldoscr::Ldostp0,
10232            Ldoscr_SPEC,
10233            crate::common::RW,
10234        >::from_register(self, 0)
10235    }
10236
10237    #[doc = "LDO1 Stop"]
10238    #[inline(always)]
10239    pub fn ldostp1(
10240        self,
10241    ) -> crate::common::RegisterField<
10242        1,
10243        0x1,
10244        1,
10245        0,
10246        ldoscr::Ldostp1,
10247        ldoscr::Ldostp1,
10248        Ldoscr_SPEC,
10249        crate::common::RW,
10250    > {
10251        crate::common::RegisterField::<
10252            1,
10253            0x1,
10254            1,
10255            0,
10256            ldoscr::Ldostp1,
10257            ldoscr::Ldostp1,
10258            Ldoscr_SPEC,
10259            crate::common::RW,
10260        >::from_register(self, 0)
10261    }
10262}
10263impl ::core::default::Default for Ldoscr {
10264    #[inline(always)]
10265    fn default() -> Ldoscr {
10266        <crate::RegValueT<Ldoscr_SPEC> as RegisterValue<_>>::new(0)
10267    }
10268}
10269pub mod ldoscr {
10270
10271    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10272    pub struct Ldostp0_SPEC;
10273    pub type Ldostp0 = crate::EnumBitfieldStruct<u8, Ldostp0_SPEC>;
10274    impl Ldostp0 {
10275        #[doc = "LDO0 is enabled"]
10276        pub const _0: Self = Self::new(0);
10277
10278        #[doc = "LDO0 is stopped"]
10279        pub const _1: Self = Self::new(1);
10280    }
10281    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10282    pub struct Ldostp1_SPEC;
10283    pub type Ldostp1 = crate::EnumBitfieldStruct<u8, Ldostp1_SPEC>;
10284    impl Ldostp1 {
10285        #[doc = "LDO1 is enabled"]
10286        pub const _0: Self = Self::new(0);
10287
10288        #[doc = "LDO1 is stopped"]
10289        pub const _1: Self = Self::new(1);
10290    }
10291}
10292#[doc(hidden)]
10293#[derive(Copy, Clone, Eq, PartialEq)]
10294pub struct Pl2Ldoscr_SPEC;
10295impl crate::sealed::RegSpec for Pl2Ldoscr_SPEC {
10296    type DataType = u8;
10297}
10298
10299#[doc = "PLL2-LDO Stop Control Register"]
10300pub type Pl2Ldoscr = crate::RegValueT<Pl2Ldoscr_SPEC>;
10301
10302impl Pl2Ldoscr {
10303    #[doc = "PLL2-LDO Stop"]
10304    #[inline(always)]
10305    pub fn pl2ldostp(
10306        self,
10307    ) -> crate::common::RegisterField<
10308        0,
10309        0x1,
10310        1,
10311        0,
10312        pl2ldoscr::Pl2Ldostp,
10313        pl2ldoscr::Pl2Ldostp,
10314        Pl2Ldoscr_SPEC,
10315        crate::common::RW,
10316    > {
10317        crate::common::RegisterField::<
10318            0,
10319            0x1,
10320            1,
10321            0,
10322            pl2ldoscr::Pl2Ldostp,
10323            pl2ldoscr::Pl2Ldostp,
10324            Pl2Ldoscr_SPEC,
10325            crate::common::RW,
10326        >::from_register(self, 0)
10327    }
10328}
10329impl ::core::default::Default for Pl2Ldoscr {
10330    #[inline(always)]
10331    fn default() -> Pl2Ldoscr {
10332        <crate::RegValueT<Pl2Ldoscr_SPEC> as RegisterValue<_>>::new(0)
10333    }
10334}
10335pub mod pl2ldoscr {
10336
10337    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10338    pub struct Pl2Ldostp_SPEC;
10339    pub type Pl2Ldostp = crate::EnumBitfieldStruct<u8, Pl2Ldostp_SPEC>;
10340    impl Pl2Ldostp {
10341        #[doc = "PLL2-LDO is enabled"]
10342        pub const _0: Self = Self::new(0);
10343
10344        #[doc = "PLL2-LDO is stopped"]
10345        pub const _1: Self = Self::new(1);
10346    }
10347}
10348#[doc(hidden)]
10349#[derive(Copy, Clone, Eq, PartialEq)]
10350pub struct Sosccr_SPEC;
10351impl crate::sealed::RegSpec for Sosccr_SPEC {
10352    type DataType = u8;
10353}
10354
10355#[doc = "Sub-Clock Oscillator Control Register"]
10356pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
10357
10358impl Sosccr {
10359    #[doc = "Sub Clock Oscillator Stop"]
10360    #[inline(always)]
10361    pub fn sostp(
10362        self,
10363    ) -> crate::common::RegisterField<
10364        0,
10365        0x1,
10366        1,
10367        0,
10368        sosccr::Sostp,
10369        sosccr::Sostp,
10370        Sosccr_SPEC,
10371        crate::common::RW,
10372    > {
10373        crate::common::RegisterField::<
10374            0,
10375            0x1,
10376            1,
10377            0,
10378            sosccr::Sostp,
10379            sosccr::Sostp,
10380            Sosccr_SPEC,
10381            crate::common::RW,
10382        >::from_register(self, 0)
10383    }
10384}
10385impl ::core::default::Default for Sosccr {
10386    #[inline(always)]
10387    fn default() -> Sosccr {
10388        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(0)
10389    }
10390}
10391pub mod sosccr {
10392
10393    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10394    pub struct Sostp_SPEC;
10395    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
10396    impl Sostp {
10397        #[doc = "Operate the sub-clock oscillator"]
10398        pub const _0: Self = Self::new(0);
10399
10400        #[doc = "Stop the sub-clock oscillator"]
10401        pub const _1: Self = Self::new(1);
10402    }
10403}
10404#[doc(hidden)]
10405#[derive(Copy, Clone, Eq, PartialEq)]
10406pub struct Somcr_SPEC;
10407impl crate::sealed::RegSpec for Somcr_SPEC {
10408    type DataType = u8;
10409}
10410
10411#[doc = "Sub-Clock Oscillator Mode Control Register"]
10412pub type Somcr = crate::RegValueT<Somcr_SPEC>;
10413
10414impl Somcr {
10415    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
10416    #[inline(always)]
10417    pub fn sodrv(
10418        self,
10419    ) -> crate::common::RegisterField<
10420        1,
10421        0x1,
10422        1,
10423        0,
10424        somcr::Sodrv,
10425        somcr::Sodrv,
10426        Somcr_SPEC,
10427        crate::common::RW,
10428    > {
10429        crate::common::RegisterField::<
10430            1,
10431            0x1,
10432            1,
10433            0,
10434            somcr::Sodrv,
10435            somcr::Sodrv,
10436            Somcr_SPEC,
10437            crate::common::RW,
10438        >::from_register(self, 0)
10439    }
10440}
10441impl ::core::default::Default for Somcr {
10442    #[inline(always)]
10443    fn default() -> Somcr {
10444        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
10445    }
10446}
10447pub mod somcr {
10448
10449    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10450    pub struct Sodrv_SPEC;
10451    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
10452    impl Sodrv {
10453        #[doc = "Standard"]
10454        pub const _0: Self = Self::new(0);
10455
10456        #[doc = "Low"]
10457        pub const _1: Self = Self::new(1);
10458    }
10459}
10460#[doc(hidden)]
10461#[derive(Copy, Clone, Eq, PartialEq)]
10462pub struct Lococr_SPEC;
10463impl crate::sealed::RegSpec for Lococr_SPEC {
10464    type DataType = u8;
10465}
10466
10467#[doc = "Low-Speed On-Chip Oscillator Control Register"]
10468pub type Lococr = crate::RegValueT<Lococr_SPEC>;
10469
10470impl Lococr {
10471    #[doc = "LOCO Stop"]
10472    #[inline(always)]
10473    pub fn lcstp(
10474        self,
10475    ) -> crate::common::RegisterField<
10476        0,
10477        0x1,
10478        1,
10479        0,
10480        lococr::Lcstp,
10481        lococr::Lcstp,
10482        Lococr_SPEC,
10483        crate::common::RW,
10484    > {
10485        crate::common::RegisterField::<
10486            0,
10487            0x1,
10488            1,
10489            0,
10490            lococr::Lcstp,
10491            lococr::Lcstp,
10492            Lococr_SPEC,
10493            crate::common::RW,
10494        >::from_register(self, 0)
10495    }
10496}
10497impl ::core::default::Default for Lococr {
10498    #[inline(always)]
10499    fn default() -> Lococr {
10500        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
10501    }
10502}
10503pub mod lococr {
10504
10505    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10506    pub struct Lcstp_SPEC;
10507    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
10508    impl Lcstp {
10509        #[doc = "Operate the LOCO clock"]
10510        pub const _0: Self = Self::new(0);
10511
10512        #[doc = "Stop the LOCO clock"]
10513        pub const _1: Self = Self::new(1);
10514    }
10515}
10516#[doc(hidden)]
10517#[derive(Copy, Clone, Eq, PartialEq)]
10518pub struct Locoutcr_SPEC;
10519impl crate::sealed::RegSpec for Locoutcr_SPEC {
10520    type DataType = u8;
10521}
10522
10523#[doc = "LOCO User Trimming Control Register"]
10524pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
10525
10526impl Locoutcr {
10527    #[doc = "LOCO User Trimming"]
10528    #[inline(always)]
10529    pub fn locoutrm(
10530        self,
10531    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
10532        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
10533    }
10534}
10535impl ::core::default::Default for Locoutcr {
10536    #[inline(always)]
10537    fn default() -> Locoutcr {
10538        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
10539    }
10540}
10541
10542#[doc(hidden)]
10543#[derive(Copy, Clone, Eq, PartialEq)]
10544pub struct Vbtictlr_SPEC;
10545impl crate::sealed::RegSpec for Vbtictlr_SPEC {
10546    type DataType = u8;
10547}
10548
10549#[doc = "VBATT Input Control Register"]
10550pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
10551
10552impl Vbtictlr {
10553    #[doc = "VBATT CH0 Input Enable"]
10554    #[inline(always)]
10555    pub fn vch0inen(
10556        self,
10557    ) -> crate::common::RegisterField<
10558        0,
10559        0x1,
10560        1,
10561        0,
10562        vbtictlr::Vch0Inen,
10563        vbtictlr::Vch0Inen,
10564        Vbtictlr_SPEC,
10565        crate::common::RW,
10566    > {
10567        crate::common::RegisterField::<
10568            0,
10569            0x1,
10570            1,
10571            0,
10572            vbtictlr::Vch0Inen,
10573            vbtictlr::Vch0Inen,
10574            Vbtictlr_SPEC,
10575            crate::common::RW,
10576        >::from_register(self, 0)
10577    }
10578}
10579impl ::core::default::Default for Vbtictlr {
10580    #[inline(always)]
10581    fn default() -> Vbtictlr {
10582        <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
10583    }
10584}
10585pub mod vbtictlr {
10586
10587    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10588    pub struct Vch0Inen_SPEC;
10589    pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
10590    impl Vch0Inen {
10591        #[doc = "RTCIC0 input disable"]
10592        pub const _0: Self = Self::new(0);
10593
10594        #[doc = "RTCIC0 input enable"]
10595        pub const _1: Self = Self::new(1);
10596    }
10597}
10598#[doc(hidden)]
10599#[derive(Copy, Clone, Eq, PartialEq)]
10600pub struct Vbtber_SPEC;
10601impl crate::sealed::RegSpec for Vbtber_SPEC {
10602    type DataType = u8;
10603}
10604
10605#[doc = "VBATT Backup Enable Register"]
10606pub type Vbtber = crate::RegValueT<Vbtber_SPEC>;
10607
10608impl Vbtber {
10609    #[doc = "VBATT backup register access enable bit"]
10610    #[inline(always)]
10611    pub fn vbae(
10612        self,
10613    ) -> crate::common::RegisterField<
10614        3,
10615        0x1,
10616        1,
10617        0,
10618        vbtber::Vbae,
10619        vbtber::Vbae,
10620        Vbtber_SPEC,
10621        crate::common::RW,
10622    > {
10623        crate::common::RegisterField::<
10624            3,
10625            0x1,
10626            1,
10627            0,
10628            vbtber::Vbae,
10629            vbtber::Vbae,
10630            Vbtber_SPEC,
10631            crate::common::RW,
10632        >::from_register(self, 0)
10633    }
10634}
10635impl ::core::default::Default for Vbtber {
10636    #[inline(always)]
10637    fn default() -> Vbtber {
10638        <crate::RegValueT<Vbtber_SPEC> as RegisterValue<_>>::new(8)
10639    }
10640}
10641pub mod vbtber {
10642
10643    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10644    pub struct Vbae_SPEC;
10645    pub type Vbae = crate::EnumBitfieldStruct<u8, Vbae_SPEC>;
10646    impl Vbae {
10647        #[doc = "Disable to access VBTBKR"]
10648        pub const _0: Self = Self::new(0);
10649
10650        #[doc = "Enable to access VBTBKR"]
10651        pub const _1: Self = Self::new(1);
10652    }
10653}
10654#[doc(hidden)]
10655#[derive(Copy, Clone, Eq, PartialEq)]
10656pub struct Vbtbkr_SPEC;
10657impl crate::sealed::RegSpec for Vbtbkr_SPEC {
10658    type DataType = u8;
10659}
10660
10661#[doc = "VBATT Backup Register"]
10662pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
10663
10664impl Vbtbkr {
10665    #[doc = "VBATT Backup Register"]
10666    #[inline(always)]
10667    pub fn vbtbkr(
10668        self,
10669    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Vbtbkr_SPEC, crate::common::RW> {
10670        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Vbtbkr_SPEC,crate::common::RW>::from_register(self,0)
10671    }
10672}
10673impl ::core::default::Default for Vbtbkr {
10674    #[inline(always)]
10675    fn default() -> Vbtbkr {
10676        <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
10677    }
10678}